End VERISTAR_SOUND.
Module VeriStarSound (VSM: VERISTAR_MODEL) : VERISTAR_SOUND
with Module VSM := VSM.
Module VSM := VSM.  Import VSM. Import VeriStarLogic.
Module CS  := Clausify_Sound VSM. Import CS.
Module SPS := SP_Sound VSM.       Import SPS.
Module NS  := Norm_Sound VSM.     Import NS.
Module WFS := WF_Sound VSM.       Import WFS.
Module UFS := UF_Sound VSM.       Import UFS.
Module CL  := CL_Sound VSM.       Import CL.
(* import theorem prover *)

(* Specifications: *)
(* begin hide *)
(* redundancy elimination --- should go elsewhere *)
Lemma relim1_sound c s st :
clause_denote c st -> setd clause_denote inter TT s st ->
setd clause_denote inter TT (relim1 c s) st.