(* *********************************************************************)
(*                                                                     *)
(*              The Compcert verified compiler                         *)
(*                                                                     *)
(*          Xavier Leroy, INRIA Paris-Rocquencourt                     *)
(*           Prashanth Mundkur, SRI International                      *)
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(*  Copyright Institut National de Recherche en Informatique et en     *)
(*  Automatique.  All rights reserved.  This file is distributed       *)
(*  under the terms of the INRIA Non-Commercial License Agreement.     *)
(*                                                                     *)
(*  The contributions by Prashanth Mundkur are reused and adapted      *)
(*  under the terms of a Contributor License Agreement between         *)
(*  SRI International and INRIA.                                       *)
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(* *********************************************************************)
(** ** Machine registers *)
(** The following type defines the machine registers that can be referenced as locations.  These include: - Integer registers that can be allocated to RTL pseudo-registers ([Rxx]). - Floating-point registers that can be allocated to RTL pseudo-registers ([Fxx]).  The type [mreg] does not include reserved machine registers such as the zero register (x0), the link register (x1), the stack pointer (x2), the global pointer (x3), and the thread pointer (x4). Finally, register x31 is reserved for use as a temporary by the assembly-code generator [Asmgen]. *)
Inductive mreg: Type :=
(** Allocatable integer regs. *)
| R5:  mreg | R6:  mreg | R7:  mreg
| R8:  mreg | R9:  mreg | R10: mreg | R11: mreg
| R12: mreg | R13: mreg | R14: mreg | R15: mreg
| R16: mreg | R17: mreg | R18: mreg | R19: mreg
| R20: mreg | R21: mreg | R22: mreg | R23: mreg
| R24: mreg | R25: mreg | R26: mreg | R27: mreg
| R28: mreg | R29: mreg | R30: mreg
(** Allocatable double-precision float regs *)
| F0:  mreg | F1:  mreg | F2:  mreg | F3:  mreg
| F4:  mreg | F5:  mreg | F6:  mreg | F7:  mreg
| F8:  mreg | F9:  mreg | F10: mreg | F11: mreg
| F12: mreg | F13: mreg | F14: mreg | F15: mreg
| F16: mreg | F17: mreg | F18: mreg | F19: mreg
| F20: mreg | F21: mreg | F22: mreg | F23: mreg
| F24: mreg | F25: mreg | F26: mreg | F27: mreg
| F28: mreg | F29: mreg | F30: mreg | F31: mreg.

(* Specifications: *)
Lemma mreg_eq: forall (r1 r2: mreg), {r1 = r2} + {r1 <> r2}.
Instance Decidable_eq_mreg : forall (x y: mreg), Decidable (eq x y) := Decidable_eq mreg_eq.