Section FineGrainedExecutions.
Context
{Sem : Semantics}
{initU : seq.seq nat}
{SemAx : CoreLanguage.SemAxioms}.
Existing Instance dryResources.
Existing Instance HybridFineMachine.scheduler.
Existing Instance OrdinalPool.OrdinalThreadPool.
Existing Instance DryHybridMachineSig.
Existing Instance FineDilMem.
Existing Instance dryFineMach.
(** A location that the machine has no access to (i.e. the permission is empty in all its resources) *)
Inductive deadLocation tp m b ofs : Prop :=
| Dead: forall
(Hvalid: Mem.valid_block m b)
(Hthreads: forall i (cnti: containsThread tp i),
(getThreadR cnti).1 !! b ofs = None /\ (getThreadR cnti).2 !! b ofs = None)
(Hresources: forall l pmap,
lockRes tp l = Some pmap ->
pmap.1 !! b ofs = None /\ pmap.2 !! b ofs = None),
deadLocation tp m b ofs.
(** ** Properties of specific stepss and executions *)
(** [True] whenever some resource in [tp] has above [Readable] lock-permission on [laddr]*)
(* I could not prove the stronger version, where quantification happens inside each case*)
Definition isLock tp laddr :=
forall ofs, Intv.In ofs (laddr.2, laddr.2 + lksize.LKSIZE)%Z ->
(exists i (cnti: containsThread tp i),
Mem.perm_order'' ((getThreadR cnti).2 !! (laddr.1) ofs) (Some Readable)) \/
(exists laddr' rmap, lockRes tp laddr' = Some rmap /\
Mem.perm_order'' (rmap.2 !! (laddr.1) ofs) (Some Readable)).

(** If some address is a lock and there is no event of type Freelock at this address in some trace tr then the address is still a lock at the resulting state *)
Lemma remLockRes_Freelock_execution:
forall U U' tr tr' tp m tp' m' addr
(Hlock: lockRes tp addr)
(HisLock: isLock tp addr)
(Hstep: multi_step (U, tr, tp) m
(U', tr ++ tr', tp') m')
(Hfreelock: forall (u : nat) (evu : machine_event),
nth_error tr' u = Some evu ->
action evu <> Freelock \/
location evu <> Some (addr, lksize.LKSIZE_nat)),
lockRes tp' addr /\
isLock tp' addr.