(* *********************************************************************)
(*                                                                     *)
(*              The Compcert verified compiler                         *)
(*                                                                     *)
(*         Xavier Leroy, Collège de France and INRIA Paris             *)
(*                                                                     *)
(*  Copyright Institut National de Recherche en Informatique et en     *)
(*  Automatique.  All rights reserved.  This file is distributed       *)
(*  under the terms of the INRIA Non-Commercial License Agreement.     *)
(*                                                                     *)
(* *********************************************************************)
(** Abstract syntax and semantics for AArch64 assembly language *)
Require Stacklayout.
(** * Abstract syntax *)
(** Integer registers, floating-point registers. *)
(** In assembly files, [Xn] denotes the full 64-bit register and [Wn] the low 32 bits of [Xn]. *)
Inductive ireg: Type :=
| X0  | X1  | X2  | X3  | X4  | X5  |  X6  | X7
| X8  | X9  | X10 | X11 | X12 | X13 |  X14 | X15
| X16 | X17 | X18 | X19 | X20 | X21 |  X22 | X23
| X24 | X25 | X26 | X27 | X28 | X29 |  X30.
Inductive ireg0: Type :=
| RR0 (r: ireg) | XZR.
Inductive iregsp: Type :=
| RR1 (r: ireg) | XSP.
Coercion RR0: ireg >-> ireg0.
Coercion RR1: ireg >-> iregsp.

Lemma ireg_eq: forall (x y: ireg), {x=y} + {x<>y}.