Definition t := preg.Definition eq := preg_eq.Module Pregmap := EMap(PregEq).(** Conventional names for stack pointer ([SP]) and return address ([RA]) *)

Notation "'SP'" := GPR1 (only parsing) : asm.Notation "'RA'" := LR (only parsing) : asm.(** Symbolic constants.  Immediate operands to an arithmetic instruction
  or an indexed memory access can be either integer literals,
  or the low or high 16 bits of a symbolic reference (the address
  of a symbol plus a displacement), or a 16-bit offset from the
  small data area register.  These symbolic references are
  resolved later by the linker.
*)

Inductive constant: Type :=
  | Cint: int -> constant
  | Csymbol_low: ident -> ptrofs -> constant
  | Csymbol_high: ident -> ptrofs -> constant
  | Csymbol_sda: ident -> ptrofs -> constant
  | Csymbol_rel_low: ident -> ptrofs -> constant
  | Csymbol_rel_high: ident -> ptrofs -> constant.(** Symbolic constants.  Immediate operands to an arithmetic instruction
  or an indexed memory access can be either integer literals,
  or the low or high 16 bits of a symbolic reference (the address
  of a symbol plus a displacement), or a 16-bit offset from the
  small data area register.  These symbolic references are
  resolved later by the linker.
*)

Inductive constant: Type :=
  | Cint: int -> constant
  | Csymbol_low: ident -> ptrofs -> constant
  | Csymbol_high: ident -> ptrofs -> constant
  | Csymbol_sda: ident -> ptrofs -> constant
  | Csymbol_rel_low: ident -> ptrofs -> constant
  | Csymbol_rel_high: ident -> ptrofs -> constant.(** Symbolic constants.  Immediate operands to an arithmetic instruction
  or an indexed memory access can be either integer literals,
  or the low or high 16 bits of a symbolic reference (the address
  of a symbol plus a displacement), or a 16-bit offset from the
  small data area register.  These symbolic references are
  resolved later by the linker.
*)

Inductive constant: Type :=
  | Cint: int -> constant
  | Csymbol_low: ident -> ptrofs -> constant
  | Csymbol_high: ident -> ptrofs -> constant
  | Csymbol_sda: ident -> ptrofs -> constant
  | Csymbol_rel_low: ident -> ptrofs -> constant
  | Csymbol_rel_high: ident -> ptrofs -> constant.(** Symbolic constants.  Immediate operands to an arithmetic instruction
  or an indexed memory access can be either integer literals,
  or the low or high 16 bits of a symbolic reference (the address
  of a symbol plus a displacement), or a 16-bit offset from the
  small data area register.  These symbolic references are
  resolved later by the linker.
*)

Inductive constant: Type :=
  | Cint: int -> constant
  | Csymbol_low: ident -> ptrofs -> constant
  | Csymbol_high: ident -> ptrofs -> constant
  | Csymbol_sda: ident -> ptrofs -> constant
  | Csymbol_rel_low: ident -> ptrofs -> constant
  | Csymbol_rel_high: ident -> ptrofs -> constant.(** Symbolic constants.  Immediate operands to an arithmetic instruction
  or an indexed memory access can be either integer literals,
  or the low or high 16 bits of a symbolic reference (the address
  of a symbol plus a displacement), or a 16-bit offset from the
  small data area register.  These symbolic references are
  resolved later by the linker.
*)

Inductive constant: Type :=
  | Cint: int -> constant
  | Csymbol_low: ident -> ptrofs -> constant
  | Csymbol_high: ident -> ptrofs -> constant
  | Csymbol_sda: ident -> ptrofs -> constant
  | Csymbol_rel_low: ident -> ptrofs -> constant
  | Csymbol_rel_high: ident -> ptrofs -> constant.(** Symbolic constants.  Immediate operands to an arithmetic instruction
  or an indexed memory access can be either integer literals,
  or the low or high 16 bits of a symbolic reference (the address
  of a symbol plus a displacement), or a 16-bit offset from the
  small data area register.  These symbolic references are
  resolved later by the linker.
*)

Inductive constant: Type :=
  | Cint: int -> constant
  | Csymbol_low: ident -> ptrofs -> constant
  | Csymbol_high: ident -> ptrofs -> constant
  | Csymbol_sda: ident -> ptrofs -> constant
  | Csymbol_rel_low: ident -> ptrofs -> constant
  | Csymbol_rel_high: ident -> ptrofs -> constant.(** Symbolic constants.  Immediate operands to an arithmetic instruction
  or an indexed memory access can be either integer literals,
  or the low or high 16 bits of a symbolic reference (the address
  of a symbol plus a displacement), or a 16-bit offset from the
  small data area register.  These symbolic references are
  resolved later by the linker.
*)

Inductive constant: Type :=
  | Cint: int -> constant
  | Csymbol_low: ident -> ptrofs -> constant
  | Csymbol_high: ident -> ptrofs -> constant
  | Csymbol_sda: ident -> ptrofs -> constant
  | Csymbol_rel_low: ident -> ptrofs -> constant
  | Csymbol_rel_high: ident -> ptrofs -> constant.(** A note on constants: while immediate operands to PowerPC
  instructions must be representable in 16 bits (with
  sign extension or left shift by 16 positions for some instructions),
  we do not attempt to capture these restrictions in the
  abstract syntax nor in the semantics.  The assembler will
  emit an error if immediate operands exceed the representable
  range.  Of course, our PPC generator (file [Asmgen]) is
  careful to respect this range. *)

(** Bits in the condition register.  We are only interested in bits
  0, 1, 2, 3 and 6. *)

Inductive crbit: Type :=
  | CRbit_0: crbit
  | CRbit_1: crbit
  | CRbit_2: crbit
  | CRbit_3: crbit
  | CRbit_6: crbit.(** A note on constants: while immediate operands to PowerPC
  instructions must be representable in 16 bits (with
  sign extension or left shift by 16 positions for some instructions),
  we do not attempt to capture these restrictions in the
  abstract syntax nor in the semantics.  The assembler will
  emit an error if immediate operands exceed the representable
  range.  Of course, our PPC generator (file [Asmgen]) is
  careful to respect this range. *)

(** Bits in the condition register.  We are only interested in bits
  0, 1, 2, 3 and 6. *)

Inductive crbit: Type :=
  | CRbit_0: crbit
  | CRbit_1: crbit
  | CRbit_2: crbit
  | CRbit_3: crbit
  | CRbit_6: crbit.(** A note on constants: while immediate operands to PowerPC
  instructions must be representable in 16 bits (with
  sign extension or left shift by 16 positions for some instructions),
  we do not attempt to capture these restrictions in the
  abstract syntax nor in the semantics.  The assembler will
  emit an error if immediate operands exceed the representable
  range.  Of course, our PPC generator (file [Asmgen]) is
  careful to respect this range. *)

(** Bits in the condition register.  We are only interested in bits
  0, 1, 2, 3 and 6. *)

Inductive crbit: Type :=
  | CRbit_0: crbit
  | CRbit_1: crbit
  | CRbit_2: crbit
  | CRbit_3: crbit
  | CRbit_6: crbit.(** A note on constants: while immediate operands to PowerPC
  instructions must be representable in 16 bits (with
  sign extension or left shift by 16 positions for some instructions),
  we do not attempt to capture these restrictions in the
  abstract syntax nor in the semantics.  The assembler will
  emit an error if immediate operands exceed the representable
  range.  Of course, our PPC generator (file [Asmgen]) is
  careful to respect this range. *)

(** Bits in the condition register.  We are only interested in bits
  0, 1, 2, 3 and 6. *)

Inductive crbit: Type :=
  | CRbit_0: crbit
  | CRbit_1: crbit
  | CRbit_2: crbit
  | CRbit_3: crbit
  | CRbit_6: crbit.(** A note on constants: while immediate operands to PowerPC
  instructions must be representable in 16 bits (with
  sign extension or left shift by 16 positions for some instructions),
  we do not attempt to capture these restrictions in the
  abstract syntax nor in the semantics.  The assembler will
  emit an error if immediate operands exceed the representable
  range.  Of course, our PPC generator (file [Asmgen]) is
  careful to respect this range. *)

(** Bits in the condition register.  We are only interested in bits
  0, 1, 2, 3 and 6. *)

Inductive crbit: Type :=
  | CRbit_0: crbit
  | CRbit_1: crbit
  | CRbit_2: crbit
  | CRbit_3: crbit
  | CRbit_6: crbit.(** A note on constants: while immediate operands to PowerPC
  instructions must be representable in 16 bits (with
  sign extension or left shift by 16 positions for some instructions),
  we do not attempt to capture these restrictions in the
  abstract syntax nor in the semantics.  The assembler will
  emit an error if immediate operands exceed the representable
  range.  Of course, our PPC generator (file [Asmgen]) is
  careful to respect this range. *)

(** Bits in the condition register.  We are only interested in bits
  0, 1, 2, 3 and 6. *)

Inductive crbit: Type :=
  | CRbit_0: crbit
  | CRbit_1: crbit
  | CRbit_2: crbit
  | CRbit_3: crbit
  | CRbit_6: crbit.(** The instruction set.  Most instructions correspond exactly to
  actual instructions of the PowerPC processor. See the PowerPC
  reference manuals for more details.  Some instructions,
  described below, are pseudo-instructions: they expand to
  canned instruction sequences during the printing of the assembly
  code. *)

Definition label := positive.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.Inductive instruction : Type :=
  | Padd: ireg -> ireg -> ireg -> instruction                 (**r integer addition *)
  | Padd64: ireg -> ireg -> ireg -> instruction               (**r integer addition (PPC64) *)
  | Paddc: ireg -> ireg -> ireg -> instruction                (**r integer addition and set carry *)
  | Padde: ireg -> ireg -> ireg -> instruction                (**r integer addition with carry *)
  | Paddi: ireg -> ireg -> constant -> instruction            (**r add immediate *)
  | Paddi64: ireg -> ireg -> int64 -> instruction             (**r add immediate (PPC64) *)
  | Paddic: ireg -> ireg -> constant -> instruction           (**r add immediate and set carry *)
  | Paddis: ireg -> ireg -> constant -> instruction           (**r add immediate high *)
  | Paddis64: ireg -> ireg -> int64 -> instruction            (**r add immediate high (PPC64) *)
  | Paddze: ireg -> ireg -> instruction                       (**r add carry *)
  | Paddze64: ireg -> ireg -> instruction                     (**r add carry (PPC64) *)
  | Pallocframe: Z -> ptrofs -> ptrofs -> instruction         (**r allocate new stack frame (pseudo) *)
  | Pand_: ireg -> ireg -> ireg -> instruction                (**r bitwise and *)
  | Pand_64: ireg -> ireg -> ireg -> instruction              (**r bitwise and (PPC64) *)
  | Pandc: ireg -> ireg -> ireg -> instruction                (**r bitwise and-complement *)
  | Pandi_: ireg -> ireg -> constant -> instruction           (**r and immediate and set conditions *)
  | Pandi_64: ireg -> ireg -> int64 -> instruction            (**r and immediate and set conditions (PPC64) *)
  | Pandis_: ireg -> ireg -> constant -> instruction          (**r and immediate high and set conditions *)
  | Pandis_64: ireg -> ireg -> int64 -> instruction           (**r and immediate high and set conditions (PPC64) *)
  | Pb: label -> instruction                                  (**r unconditional branch *)
  | Pbctr: signature -> instruction                           (**r branch to contents of register CTR *)
  | Pbctrl: signature -> instruction                          (**r branch to contents of CTR and link *)
  | Pbdnz: label -> instruction                               (**r decrement CTR and branch if not zero *)
  | Pbf: crbit -> label -> instruction                        (**r branch if false *)
  | Pbl: ident -> signature -> instruction                    (**r branch and link *)
  | Pbs: ident -> signature -> instruction                    (**r branch to symbol *)
  | Pblr: instruction                                         (**r branch to contents of register LR *)
  | Pbt: crbit -> label -> instruction                        (**r branch if true *)
  | Pbtbl: ireg -> list label -> instruction                  (**r N-way branch through a jump table (pseudo) *)
  | Pcmpb: ireg -> ireg -> ireg -> instruction                (**r compare bytes *)
  | Pcmpld: ireg -> ireg -> instruction                       (**r unsigned integer comparison (PPC64) *)
  | Pcmpldi: ireg -> int64 -> instruction                     (**r same, with immediate argument (PPC64) *)
  | Pcmplw: ireg -> ireg -> instruction                       (**r unsigned integer comparison *)
  | Pcmplwi: ireg -> constant -> instruction                  (**r same, with immediate argument *)
  | Pcmpd: ireg -> ireg -> instruction                        (**r signed integer comparison (PPC64) *)
  | Pcmpdi: ireg -> int64 -> instruction                      (**r same, with immediate argument (PPC64) *)
  | Pcmpw: ireg -> ireg -> instruction                        (**r signed integer comparison *)
  | Pcmpwi: ireg -> constant -> instruction                   (**r same, with immediate argument *)
  | Pcntlzd: ireg -> ireg -> instruction                      (**r count leading zeros (PPC64) *)
  | Pcntlzw: ireg -> ireg -> instruction                      (**r count leading zeros *)
  | Pcreqv: crbit -> crbit -> crbit -> instruction            (**r not-xor between condition bits *)
  | Pcror: crbit -> crbit -> crbit -> instruction             (**r or between condition bits *)
  | Pcrxor: crbit -> crbit -> crbit -> instruction            (**r xor between condition bits *)
  | Pdcbf: ireg -> ireg -> instruction                        (**r data cache flush *)
  | Pdcbi: ireg -> ireg -> instruction                        (**r data cache invalidate *)
  | Pdcbt: int -> ireg -> ireg -> instruction                 (**r data cache block touch *)
  | Pdcbtst: int -> ireg -> ireg -> instruction               (**r data cache block touch *)
  | Pdcbtls: int -> ireg -> ireg -> instruction               (**r data cache block touch and lock *)
  | Pdcbz: ireg -> ireg -> instruction                        (**r data cache block zero *)
  | Pdivw: ireg -> ireg -> ireg -> instruction                (**r signed division *)
  | Pdivd: ireg -> ireg -> ireg -> instruction                (**r signed division (PPC64) *)
  | Pdivwu: ireg -> ireg -> ireg -> instruction               (**r unsigned division *)
  | Pdivdu: ireg -> ireg -> ireg -> instruction               (**r unsigned division (PPC64) *)
  | Peieio: instruction                                       (**r EIEIO barrier *)
  | Peqv: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-xor *)
  | Pextsb: ireg -> ireg -> instruction                       (**r 8-bit sign extension *)
  | Pextsh: ireg -> ireg -> instruction                       (**r 16-bit sign extension *)
  | Pextsw: ireg -> ireg -> instruction                       (**r 64-bit sign extension (PPC64) *)
  | Pextzw: ireg -> ireg -> instruction                       (**r 64-bit zero extension (pseudo, PPC64) *)
  | Pfreeframe: Z -> ptrofs -> instruction                    (**r deallocate stack frame and restore previous frame (pseudo) *)
  | Pfabs: freg -> freg -> instruction                        (**r float absolute value *)
  | Pfabss: freg -> freg -> instruction                       (**r float absolute value *)
  | Pfadd: freg -> freg -> freg -> instruction                (**r float addition *)
  | Pfadds: freg -> freg -> freg -> instruction               (**r float addition *)
  | Pfcmpu: freg -> freg -> instruction                       (**r float comparison *)
  | Pfcfi: freg -> ireg -> instruction                        (**r signed-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfl: freg -> ireg -> instruction                        (**r signed-long-to-float conversion (pseudo, PPC64) *)
  | Pfcfiu: freg -> ireg -> instruction                       (**r unsigned-int-to-float conversion (pseudo, PPC64) *)
  | Pfcfid: freg -> freg -> instruction                       (**r signed-long-to-float conversion (PPC64) *)
  | Pfcti: ireg -> freg -> instruction                        (**r float-to-signed-int conversion, round towards 0 (pseudo) *)
  | Pfctiu: ireg -> freg -> instruction                       (**r float-to-unsigned-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctid: ireg -> freg -> instruction                       (**r float-to-signed-int conversion, round towards 0 (pseudo, PPC64) *)
  | Pfctidz: freg -> freg -> instruction                      (**r float-to-signed-long conversion, round towards 0 (PPC64) *)
  | Pfctiw: freg -> freg -> instruction                       (**r float-to-signed-int conversion, round by default *)
  | Pfctiwz: freg -> freg -> instruction                      (**r float-to-signed-int conversion, round towards 0 *)
  | Pfdiv: freg -> freg -> freg -> instruction                (**r float division *)
  | Pfdivs: freg -> freg -> freg -> instruction               (**r float division *)
  | Pfmake: freg -> ireg -> ireg -> instruction               (**r build a float from 2 ints (pseudo) *)
  | Pfmr: freg -> freg -> instruction                         (**r float move *)
  | Pfmul: freg -> freg -> freg -> instruction                (**r float multiply *)
  | Pfmuls: freg -> freg -> freg -> instruction               (**r float multiply *)
  | Pfneg: freg -> freg -> instruction                        (**r float negation *)
  | Pfnegs: freg -> freg -> instruction                       (**r float negation *)
  | Pfrsp: freg -> freg -> instruction                        (**r float round to single precision *)
  | Pfxdp: freg -> freg -> instruction                        (**r float extend to double precision (pseudo) *)
  | Pfsub: freg -> freg -> freg -> instruction                (**r float subtraction *)
  | Pfsubs: freg -> freg -> freg -> instruction               (**r float subtraction *)
  | Pfmadd: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-add *)
  | Pfmsub: freg -> freg -> freg -> freg -> instruction       (**r fused multiply-sub *)
  | Pfnmadd: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-add *)
  | Pfnmsub: freg -> freg -> freg -> freg -> instruction      (**r fused neg-multiply-sub *)
  | Pfsqrt: freg -> freg -> instruction                       (**r square root *)
  | Pfrsqrte: freg -> freg -> instruction                     (**r approximate reciprocal of square root *)
  | Pfres: freg -> freg -> instruction                        (**r approximate inverse *)
  | Pfsel: freg -> freg -> freg -> freg -> instruction        (**r FP conditional move *)
  | Pisel: ireg -> ireg -> ireg -> crbit -> instruction       (**r integer select *)
  | Pisync: instruction                                       (**r ISYNC barrier *)
  | Picbi: ireg -> ireg -> instruction                        (**r instruction cache invalidate *)
  | Picbtls: int -> ireg -> ireg -> instruction               (**r instruction cache block touch and lock set *)
  | Plbz: ireg -> constant -> ireg -> instruction             (**r load 8-bit unsigned int *)
  | Plbzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pld: ireg -> constant -> ireg -> instruction              (**r load 64-bit int (PPC64) *)
  | Pldx: ireg -> ireg -> ireg -> instruction                 (**r same, with 2 index regs *)
  | Pld_a: ireg -> constant -> ireg -> instruction            (**r load 64-bit quantity to int reg (PPC64) *)
  | Pldbrx: ireg -> ireg -> ireg -> instruction               (**r load 64-bit int and reverse endianness (PPC64) *)
  | Pldx_a: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Plfd: freg -> constant -> ireg -> instruction             (**r load 64-bit float *)
  | Plfdx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plfd_a: freg -> constant -> ireg -> instruction           (**r load 64-bit quantity to float reg *)
  | Plfdx_a: freg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plfs: freg -> constant -> ireg -> instruction             (**r load 32-bit float *)
  | Plfsx: freg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plha: ireg -> constant -> ireg -> instruction             (**r load 16-bit signed int *)
  | Plhax: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plhbrx: ireg -> ireg -> ireg -> instruction               (**r load 16-bit int and reverse endianness *)
  | Plhz: ireg -> constant -> ireg -> instruction             (**r load 16-bit unsigned int *)
  | Plhzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pldi: ireg -> int64 -> instruction                        (**r load 64-bit int constant (PPC64) *)
  | Plmake: ireg -> ireg -> ireg -> instruction               (**r build an int64 from 2 ints (pseudo, PPC64) *)
  | Pllo: ireg -> instruction                                 (**r extract low 32 bits of an int64 (pseudo, PPC64) *)
  | Plhi: ireg -> ireg -> instruction                         (**r extract high 32 bits of an int64 (pseudo, PPC64) *)
  | Plfi: freg -> float -> instruction                        (**r load float constant *)
  | Plfis: freg -> float32 -> instruction                     (**r load float constant *)
  | Plwz: ireg -> constant -> ireg -> instruction             (**r load 32-bit int *)
  | Plwzu: ireg -> constant -> ireg -> instruction            (**r load 32-bit int with update *)
  | Plwzx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Plwz_a: ireg -> constant -> ireg -> instruction           (**r load 32-bit quantity to int reg *)
  | Plwzx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Plwarx: ireg -> ireg -> ireg -> instruction               (**r load with reservation *)
  | Plwbrx: ireg -> ireg -> ireg -> instruction               (**r load 32-bit int and reverse endianness *)
  | Pmbar: int -> instruction                                 (**r memory barrier *)
  | Pmfcr: ireg -> instruction                                (**r move condition register to reg *)
  | Pmfcrbit: ireg -> crbit -> instruction                    (**r move condition bit to reg (pseudo) *)
  | Pmflr: ireg -> instruction                                (**r move LR to reg *)
  | Pmr: ireg -> ireg -> instruction                          (**r integer move *)
  | Pmtctr: ireg -> instruction                               (**r move ireg to CTR *)
  | Pmtlr: ireg -> instruction                                (**r move ireg to LR *)
  | Pmfspr: ireg -> int -> instruction                        (**r move from special register *)
  | Pmtspr: int -> ireg -> instruction                        (**r move to special register *)
  | Pmulli: ireg -> ireg -> constant -> instruction           (**r integer multiply immediate *)
  | Pmullw: ireg -> ireg -> ireg -> instruction               (**r integer multiply *)
  | Pmulld: ireg -> ireg -> ireg -> instruction               (**r integer multiply (PPC64) *)
  | Pmulhw: ireg -> ireg -> ireg -> instruction               (**r multiply high signed *)
  | Pmulhwu: ireg -> ireg -> ireg -> instruction              (**r multiply high signed *)
  | Pmulhd: ireg -> ireg -> ireg -> instruction               (**r multiply high double word signed (PPC64) *)
  | Pmulhdu: ireg -> ireg -> ireg -> instruction              (**r multiply high double word unsigned (PPC64) *)
  | Pnand: ireg -> ireg -> ireg -> instruction                (**r bitwise not-and *)
  | Pnor: ireg -> ireg -> ireg -> instruction                 (**r bitwise not-or *)
  | Pnor64: ireg -> ireg -> ireg -> instruction               (**r bitwise not-or (PPC64) *)
  | Por: ireg -> ireg -> ireg -> instruction                  (**r bitwise or *)
  | Por64: ireg -> ireg -> ireg -> instruction                (**r bitwise or (PPC64) *)
  | Porc: ireg -> ireg -> ireg -> instruction                 (**r bitwise or-complement *)
  | Pori: ireg -> ireg -> constant -> instruction             (**r or with immediate *)
  | Pori64: ireg -> ireg -> int64 -> instruction              (**r or with immediate (PPC64) *)
  | Poris: ireg -> ireg -> constant -> instruction            (**r or with immediate high *)
  | Poris64: ireg -> ireg -> int64 -> instruction             (**r or with immediate high (PPC64) *)
  | Prldicl: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask left (PPC64) *)
  | Prldinm: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and mask (PPC64) *)
  | Prldimi: ireg -> ireg -> int -> int64 -> instruction      (**r rotate and insert (PPC64) *)
  | Prlwinm: ireg -> ireg -> int -> int -> instruction        (**r rotate and mask *)
  | Prlwimi: ireg -> ireg -> int -> int -> instruction        (**r rotate and insert *)
  | Psld: ireg -> ireg -> ireg -> instruction                 (**r shift left 64 bits (PPC64) *)
  | Pslw: ireg -> ireg -> ireg -> instruction                 (**r shift left *)
  | Psrad: ireg -> ireg -> ireg -> instruction                (**r shift right signed 64 bits (PPC64) *)
  | Psradi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate 64 bits (PPC64) *)
  | Psraw: ireg -> ireg -> ireg -> instruction                (**r shift right signed *)
  | Psrawi: ireg -> ireg -> int -> instruction                (**r shift right signed immediate *)
  | Psrd: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned 64 bits (PPC64) *)
  | Psrw: ireg -> ireg -> ireg -> instruction                 (**r shift right unsigned *)
  | Pstb: ireg -> constant -> ireg -> instruction             (**r store 8-bit int *)
  | Pstbx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstd: ireg -> constant -> ireg -> instruction             (**r store 64-bit integer (PPC64) *)
  | Pstdx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs (PPC64) *)
  | Pstdbrx: ireg -> ireg -> ireg -> instruction              (**r store 64-bit int with reverse endianness (PPC64) *)
  | Pstdu: ireg -> constant -> ireg -> instruction            (**r store 64-bit integer with update (PPC64) *)
  | Pstd_a: ireg -> constant -> ireg -> instruction           (**r store 64-bit quantity from int reg (PPC64) *)
  | Pstdx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs (PPC64) *)
  | Pstfd: freg -> constant -> ireg -> instruction            (**r store 64-bit float *)
  | Pstfdu: freg -> constant -> ireg -> instruction           (**r store 64-bit float with update *)
  | Pstfdx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Pstfd_a: freg -> constant -> ireg -> instruction          (**r store 64-bit quantity from float reg *)
  | Pstfdx_a: freg -> ireg -> ireg -> instruction             (**r same, with 2 index regs *)
  | Pstfs: freg -> constant -> ireg -> instruction            (**r store 32-bit float *)
  | Pstfsx: freg -> ireg -> ireg -> instruction               (**r same, with 2 index regs *)
  | Psth: ireg -> constant -> ireg -> instruction             (**r store 16-bit int *)
  | Psthx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Psthbrx: ireg -> ireg -> ireg -> instruction              (**r store 16-bit int with reverse endianness *)
  | Pstw: ireg -> constant -> ireg -> instruction             (**r store 32-bit int *)
  | Pstwu: ireg -> constant -> ireg -> instruction            (**r store 32-bit int with update *)
  | Pstwx: ireg -> ireg -> ireg -> instruction                (**r same, with 2 index regs *)
  | Pstwux: ireg -> ireg -> ireg -> instruction               (**r same, with 2 index regs and update *)
  | Pstw_a: ireg -> constant -> ireg -> instruction           (**r store 32-bit quantity from int reg *)
  | Pstwx_a: ireg -> ireg -> ireg -> instruction              (**r same, with 2 index regs *)
  | Pstwbrx: ireg -> ireg -> ireg -> instruction              (**r store 32-bit int with reverse endianness *)
  | Pstwcx_: ireg -> ireg -> ireg -> instruction              (**r store conditional *)
  | Psubfc: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction *)
  | Psubfc64: ireg -> ireg -> ireg -> instruction             (**r reversed integer subtraction (PPC64) *)
  | Psubfe: ireg -> ireg -> ireg -> instruction               (**r reversed integer subtraction with carry *)
  | Psubfze: ireg -> ireg -> instruction                      (**r integer opposite with carry *)
  | Psubfic: ireg -> ireg -> constant -> instruction          (**r integer subtraction from immediate *)
  | Psubfic64: ireg -> ireg -> int64 -> instruction           (**r integer subtraction from immediate (PPC64) *)
  | Psync: instruction                                        (**r SYNC barrier *)
  | Plwsync: instruction                                      (**r LWSYNC barrier *)
  | Ptrap: instruction                                        (**r unconditional trap *)
  | Pxor: ireg -> ireg -> ireg -> instruction                 (**r bitwise xor *)
  | Pxor64: ireg -> ireg -> ireg -> instruction               (**r bitwise xor (PPC64) *)
  | Pxori: ireg -> ireg -> constant -> instruction            (**r bitwise xor with immediate *)
  | Pxori64: ireg -> ireg -> int64 -> instruction             (**r bitwise xor with immediate (PPC64) *)
  | Pxoris: ireg -> ireg -> constant -> instruction           (**r bitwise xor with immediate high *)
  | Pxoris64: ireg -> ireg -> int64 -> instruction            (**r bitwise xor with immediate high (PPC64) *)
  | Plabel: label -> instruction                              (**r define a code label *)
  | Pbuiltin: external_function -> list (builtin_arg preg) -> builtin_res preg -> instruction (**r built-in function (pseudo) *)
  | Pcfi_adjust: int -> instruction                           (**r .cfi_adjust debug directive *)
  | Pcfi_rel_offset: int -> instruction.(**r .cfi_rel_offset lr debug directive *)

(** The pseudo-instructions are the following:

- [Plabel]: define a code label at the current program point
- [Plfi]: load a floating-point constant in a float register.
  Expands to a float load [lfd] from an address in the constant data section
  initialized with the floating-point constant:
<<
        addis   r12, 0, ha16(lbl)
        lfd     rdst, lo16(lbl)(r12)
        .const_data
lbl:    .double floatcst
        .text
>>
  Initialized data in the constant data section are not modeled here,
  which is why we use a pseudo-instruction for this purpose.
- [Pfcti]: convert a float to a signed integer.  This requires a transfer
  via memory of a 32-bit integer from a float register to an int register.
  Expands to:
<<
        fctiwz  f13, rsrc
        stfdu   f13, -8(r1)
        lwz     rdst, 4(r1)
        addi    r1, r1, 8
>>
- [Pfmake]: build a double float from two 32-bit integers.  This also
  requires a transfer via memory.  Expands to:
<<
        stwu    rsrc1, -8(r1)
        stw     rsrc2, 4(r1)
        lfd     rdst, 0(r1)
        addi    r1, r1, 8
>>
- [Pallocframe sz ofs retofs]: in the formal semantics, this pseudo-instruction
  allocates a memory block with bounds [0] and [sz], stores the value
  of register [r1] (the stack pointer, by convention) at offset [ofs]
  in this block, and sets [r1] to a pointer to the bottom of this
  block.  In the printed PowerPC assembly code, this allocation
  is just a store-decrement of register [r1], assuming that [ofs = 0]:
<<
        stwu    r1, -sz(r1)
>>
  This cannot be expressed in our memory model, which does not reflect
  the fact that stack frames are adjacent and allocated/freed
  following a stack discipline.
- [Pfreeframe sz ofs]: in the formal semantics, this pseudo-instruction
  reads the word at offset [ofs] in the block pointed by [r1] (the
  stack pointer), frees this block, and sets [r1] to the value of the
  word at offset [ofs].  In the printed PowerPC assembly code, this
  freeing is just a load of register [r1] relative to [r1] itself:
<<
        lwz     r1, ofs(r1)
>>
  Again, our memory model cannot comprehend that this operation
  frees (logically) the current stack frame.
- [Pbtbl reg table]: this is a N-way branch, implemented via a jump table
  as follows:
<<
        addis   r12, reg, ha16(lbl)
        lwz     r12, lo16(lbl)(r12)
        mtctr   r12
        bctr    r12
lbl:    .long   table[0], table[1], ...
>>
  Note that [reg] contains 4 times the index of the desired table entry.
*)

Definition code := list instruction.Record function : Type := mkfunction { fn_sig: signature; fn_code: code }.Record function : Type := mkfunction { fn_sig: signature; fn_code: code }.Record function : Type := mkfunction { fn_sig: signature; fn_code: code }.Record function : Type := mkfunction { fn_sig: signature; fn_code: code }.Definition fundef := AST.fundef function.Definition program := AST.program fundef unit.(** * Operational semantics *)

(** The semantics operates over a single mapping from registers
  (type [preg]) to values.  We maintain (but do not enforce)
  the convention that integer registers are mapped to values of
  type [Tint], float registers to values of type [Tfloat],
  and boolean registers ([CARRY], [CR0_0], etc) to either
  [Vzero] or [Vone]. *)

Definition regset := Pregmap.t val.Definition genv := Genv.t fundef unit.Notation "a # b" := (a b) (at level 1, only parsing) : asm.Notation "a # b <- c" := (Pregmap.set b c a) (at level 1, b at next level) : asm.(** Looking up instructions in a code sequence by position. *)

Fixpoint find_instr (pos: Z) (c: code) {struct c} : option instruction :=
  match c with
  | nil => None
  | i :: il => if zeq pos 0 then Some i else find_instr (pos - 1) il
  end.(** Position corresponding to a label *)

Definition is_label (lbl: label) (instr: instruction) : bool :=
  match instr with
  | Plabel lbl' => if peq lbl lbl' then true else false
  | _ => false
  end.

(* Specifications: *)
Lemma is_label_correct: forall lbl instr, if is_label lbl instr then instr = Plabel lbl else instr <> Plabel lbl.