(** * Abstract syntax *)

(** Integer registers, floating-point registers. *)

Inductive ireg: Type :=
  | IR0: ireg  | IR1: ireg  | IR2: ireg  | IR3: ireg
  | IR4: ireg  | IR5: ireg  | IR6: ireg  | IR7: ireg
  | IR8: ireg  | IR9: ireg  | IR10: ireg | IR11: ireg
  | IR12: ireg | IR13: ireg | IR14: ireg.(** * Abstract syntax *)

(** Integer registers, floating-point registers. *)

Inductive ireg: Type :=
  | IR0: ireg  | IR1: ireg  | IR2: ireg  | IR3: ireg
  | IR4: ireg  | IR5: ireg  | IR6: ireg  | IR7: ireg
  | IR8: ireg  | IR9: ireg  | IR10: ireg | IR11: ireg
  | IR12: ireg | IR13: ireg | IR14: ireg.(** * Abstract syntax *)

(** Integer registers, floating-point registers. *)

Inductive ireg: Type :=
  | IR0: ireg  | IR1: ireg  | IR2: ireg  | IR3: ireg
  | IR4: ireg  | IR5: ireg  | IR6: ireg  | IR7: ireg
  | IR8: ireg  | IR9: ireg  | IR10: ireg | IR11: ireg
  | IR12: ireg | IR13: ireg | IR14: ireg.(** * Abstract syntax *)

(** Integer registers, floating-point registers. *)

Inductive ireg: Type :=
  | IR0: ireg  | IR1: ireg  | IR2: ireg  | IR3: ireg
  | IR4: ireg  | IR5: ireg  | IR6: ireg  | IR7: ireg
  | IR8: ireg  | IR9: ireg  | IR10: ireg | IR11: ireg
  | IR12: ireg | IR13: ireg | IR14: ireg.(** * Abstract syntax *)

(** Integer registers, floating-point registers. *)

Inductive ireg: Type :=
  | IR0: ireg  | IR1: ireg  | IR2: ireg  | IR3: ireg
  | IR4: ireg  | IR5: ireg  | IR6: ireg  | IR7: ireg
  | IR8: ireg  | IR9: ireg  | IR10: ireg | IR11: ireg
  | IR12: ireg | IR13: ireg | IR14: ireg.(** * Abstract syntax *)

(** Integer registers, floating-point registers. *)

Inductive ireg: Type :=
  | IR0: ireg  | IR1: ireg  | IR2: ireg  | IR3: ireg
  | IR4: ireg  | IR5: ireg  | IR6: ireg  | IR7: ireg
  | IR8: ireg  | IR9: ireg  | IR10: ireg | IR11: ireg
  | IR12: ireg | IR13: ireg | IR14: ireg.(** * Abstract syntax *)

(** Integer registers, floating-point registers. *)

Inductive ireg: Type :=
  | IR0: ireg  | IR1: ireg  | IR2: ireg  | IR3: ireg
  | IR4: ireg  | IR5: ireg  | IR6: ireg  | IR7: ireg
  | IR8: ireg  | IR9: ireg  | IR10: ireg | IR11: ireg
  | IR12: ireg | IR13: ireg | IR14: ireg.(** * Abstract syntax *)

(** Integer registers, floating-point registers. *)

Inductive ireg: Type :=
  | IR0: ireg  | IR1: ireg  | IR2: ireg  | IR3: ireg
  | IR4: ireg  | IR5: ireg  | IR6: ireg  | IR7: ireg
  | IR8: ireg  | IR9: ireg  | IR10: ireg | IR11: ireg
  | IR12: ireg | IR13: ireg | IR14: ireg.(** * Abstract syntax *)

(** Integer registers, floating-point registers. *)

Inductive ireg: Type :=
  | IR0: ireg  | IR1: ireg  | IR2: ireg  | IR3: ireg
  | IR4: ireg  | IR5: ireg  | IR6: ireg  | IR7: ireg
  | IR8: ireg  | IR9: ireg  | IR10: ireg | IR11: ireg
  | IR12: ireg | IR13: ireg | IR14: ireg.(** * Abstract syntax *)

(** Integer registers, floating-point registers. *)

Inductive ireg: Type :=
  | IR0: ireg  | IR1: ireg  | IR2: ireg  | IR3: ireg
  | IR4: ireg  | IR5: ireg  | IR6: ireg  | IR7: ireg
  | IR8: ireg  | IR9: ireg  | IR10: ireg | IR11: ireg
  | IR12: ireg | IR13: ireg | IR14: ireg.(** * Abstract syntax *)

(** Integer registers, floating-point registers. *)

Inductive ireg: Type :=
  | IR0: ireg  | IR1: ireg  | IR2: ireg  | IR3: ireg
  | IR4: ireg  | IR5: ireg  | IR6: ireg  | IR7: ireg
  | IR8: ireg  | IR9: ireg  | IR10: ireg | IR11: ireg
  | IR12: ireg | IR13: ireg | IR14: ireg.(** * Abstract syntax *)

(** Integer registers, floating-point registers. *)

Inductive ireg: Type :=
  | IR0: ireg  | IR1: ireg  | IR2: ireg  | IR3: ireg
  | IR4: ireg  | IR5: ireg  | IR6: ireg  | IR7: ireg
  | IR8: ireg  | IR9: ireg  | IR10: ireg | IR11: ireg
  | IR12: ireg | IR13: ireg | IR14: ireg.(** * Abstract syntax *)

(** Integer registers, floating-point registers. *)

Inductive ireg: Type :=
  | IR0: ireg  | IR1: ireg  | IR2: ireg  | IR3: ireg
  | IR4: ireg  | IR5: ireg  | IR6: ireg  | IR7: ireg
  | IR8: ireg  | IR9: ireg  | IR10: ireg | IR11: ireg
  | IR12: ireg | IR13: ireg | IR14: ireg.(** * Abstract syntax *)

(** Integer registers, floating-point registers. *)

Inductive ireg: Type :=
  | IR0: ireg  | IR1: ireg  | IR2: ireg  | IR3: ireg
  | IR4: ireg  | IR5: ireg  | IR6: ireg  | IR7: ireg
  | IR8: ireg  | IR9: ireg  | IR10: ireg | IR11: ireg
  | IR12: ireg | IR13: ireg | IR14: ireg.(** * Abstract syntax *)

(** Integer registers, floating-point registers. *)

Inductive ireg: Type :=
  | IR0: ireg  | IR1: ireg  | IR2: ireg  | IR3: ireg
  | IR4: ireg  | IR5: ireg  | IR6: ireg  | IR7: ireg
  | IR8: ireg  | IR9: ireg  | IR10: ireg | IR11: ireg
  | IR12: ireg | IR13: ireg | IR14: ireg.(** * Abstract syntax *)

(** Integer registers, floating-point registers. *)

Inductive ireg: Type :=
  | IR0: ireg  | IR1: ireg  | IR2: ireg  | IR3: ireg
  | IR4: ireg  | IR5: ireg  | IR6: ireg  | IR7: ireg
  | IR8: ireg  | IR9: ireg  | IR10: ireg | IR11: ireg
  | IR12: ireg | IR13: ireg | IR14: ireg.Inductive freg: Type :=
  | FR0: freg  | FR1: freg  | FR2: freg  | FR3: freg
  | FR4: freg  | FR5: freg  | FR6: freg  | FR7: freg
  | FR8: freg  | FR9: freg  | FR10: freg  | FR11: freg
  | FR12: freg  | FR13: freg  | FR14: freg  | FR15: freg.Inductive freg: Type :=
  | FR0: freg  | FR1: freg  | FR2: freg  | FR3: freg
  | FR4: freg  | FR5: freg  | FR6: freg  | FR7: freg
  | FR8: freg  | FR9: freg  | FR10: freg  | FR11: freg
  | FR12: freg  | FR13: freg  | FR14: freg  | FR15: freg.Inductive freg: Type :=
  | FR0: freg  | FR1: freg  | FR2: freg  | FR3: freg
  | FR4: freg  | FR5: freg  | FR6: freg  | FR7: freg
  | FR8: freg  | FR9: freg  | FR10: freg  | FR11: freg
  | FR12: freg  | FR13: freg  | FR14: freg  | FR15: freg.Inductive freg: Type :=
  | FR0: freg  | FR1: freg  | FR2: freg  | FR3: freg
  | FR4: freg  | FR5: freg  | FR6: freg  | FR7: freg
  | FR8: freg  | FR9: freg  | FR10: freg  | FR11: freg
  | FR12: freg  | FR13: freg  | FR14: freg  | FR15: freg.Inductive freg: Type :=
  | FR0: freg  | FR1: freg  | FR2: freg  | FR3: freg
  | FR4: freg  | FR5: freg  | FR6: freg  | FR7: freg
  | FR8: freg  | FR9: freg  | FR10: freg  | FR11: freg
  | FR12: freg  | FR13: freg  | FR14: freg  | FR15: freg.Inductive freg: Type :=
  | FR0: freg  | FR1: freg  | FR2: freg  | FR3: freg
  | FR4: freg  | FR5: freg  | FR6: freg  | FR7: freg
  | FR8: freg  | FR9: freg  | FR10: freg  | FR11: freg
  | FR12: freg  | FR13: freg  | FR14: freg  | FR15: freg.Inductive freg: Type :=
  | FR0: freg  | FR1: freg  | FR2: freg  | FR3: freg
  | FR4: freg  | FR5: freg  | FR6: freg  | FR7: freg
  | FR8: freg  | FR9: freg  | FR10: freg  | FR11: freg
  | FR12: freg  | FR13: freg  | FR14: freg  | FR15: freg.Inductive freg: Type :=
  | FR0: freg  | FR1: freg  | FR2: freg  | FR3: freg
  | FR4: freg  | FR5: freg  | FR6: freg  | FR7: freg
  | FR8: freg  | FR9: freg  | FR10: freg  | FR11: freg
  | FR12: freg  | FR13: freg  | FR14: freg  | FR15: freg.Inductive freg: Type :=
  | FR0: freg  | FR1: freg  | FR2: freg  | FR3: freg
  | FR4: freg  | FR5: freg  | FR6: freg  | FR7: freg
  | FR8: freg  | FR9: freg  | FR10: freg  | FR11: freg
  | FR12: freg  | FR13: freg  | FR14: freg  | FR15: freg.Inductive freg: Type :=
  | FR0: freg  | FR1: freg  | FR2: freg  | FR3: freg
  | FR4: freg  | FR5: freg  | FR6: freg  | FR7: freg
  | FR8: freg  | FR9: freg  | FR10: freg  | FR11: freg
  | FR12: freg  | FR13: freg  | FR14: freg  | FR15: freg.Inductive freg: Type :=
  | FR0: freg  | FR1: freg  | FR2: freg  | FR3: freg
  | FR4: freg  | FR5: freg  | FR6: freg  | FR7: freg
  | FR8: freg  | FR9: freg  | FR10: freg  | FR11: freg
  | FR12: freg  | FR13: freg  | FR14: freg  | FR15: freg.Inductive freg: Type :=
  | FR0: freg  | FR1: freg  | FR2: freg  | FR3: freg
  | FR4: freg  | FR5: freg  | FR6: freg  | FR7: freg
  | FR8: freg  | FR9: freg  | FR10: freg  | FR11: freg
  | FR12: freg  | FR13: freg  | FR14: freg  | FR15: freg.Inductive freg: Type :=
  | FR0: freg  | FR1: freg  | FR2: freg  | FR3: freg
  | FR4: freg  | FR5: freg  | FR6: freg  | FR7: freg
  | FR8: freg  | FR9: freg  | FR10: freg  | FR11: freg
  | FR12: freg  | FR13: freg  | FR14: freg  | FR15: freg.Inductive freg: Type :=
  | FR0: freg  | FR1: freg  | FR2: freg  | FR3: freg
  | FR4: freg  | FR5: freg  | FR6: freg  | FR7: freg
  | FR8: freg  | FR9: freg  | FR10: freg  | FR11: freg
  | FR12: freg  | FR13: freg  | FR14: freg  | FR15: freg.Inductive freg: Type :=
  | FR0: freg  | FR1: freg  | FR2: freg  | FR3: freg
  | FR4: freg  | FR5: freg  | FR6: freg  | FR7: freg
  | FR8: freg  | FR9: freg  | FR10: freg  | FR11: freg
  | FR12: freg  | FR13: freg  | FR14: freg  | FR15: freg.Inductive freg: Type :=
  | FR0: freg  | FR1: freg  | FR2: freg  | FR3: freg
  | FR4: freg  | FR5: freg  | FR6: freg  | FR7: freg
  | FR8: freg  | FR9: freg  | FR10: freg  | FR11: freg
  | FR12: freg  | FR13: freg  | FR14: freg  | FR15: freg.Inductive freg: Type :=
  | FR0: freg  | FR1: freg  | FR2: freg  | FR3: freg
  | FR4: freg  | FR5: freg  | FR6: freg  | FR7: freg
  | FR8: freg  | FR9: freg  | FR10: freg  | FR11: freg
  | FR12: freg  | FR13: freg  | FR14: freg  | FR15: freg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.Inductive sreg: Type :=
  | SR0: sreg  | SR1: sreg  | SR2: sreg  | SR3: sreg
  | SR4: sreg  | SR5: sreg  | SR6: sreg  | SR7: sreg
  | SR8: sreg  | SR9: sreg  | SR10: sreg  | SR11: sreg
  | SR12: sreg  | SR13: sreg  | SR14: sreg  | SR15: sreg
  | SR16: sreg  | SR17: sreg  | SR18: sreg  | SR19: sreg
  | SR20: sreg  | SR21: sreg  | SR22: sreg  | SR23: sreg
  | SR24: sreg  | SR25: sreg  | SR26: sreg  | SR27: sreg
  | SR28: sreg  | SR29: sreg  | SR30: sreg  | SR31: sreg.

(* Specifications: *)
Lemma ireg_eq: forall (x y: ireg), {x=y} + {x<>y}.
Lemma freg_eq: forall (x y: freg), {x=y} + {x<>y}.