ppxscal/embedding_network huggingface dataset:
DGDBM: programming support for distributed transactions over replicated files
Authors: Maria Consuelo Franky
Venue: ACM SIGOPS Operating Systems Review (1995)

This paper describes a set of facilities for programming distributed transactions over replicated files which are accessed by primary key. The files are located on several computers communicated by a network. Each site has the set of GNU dbm (Gdbm) routines for local file management [15]. Above this platform we have built an interface and a set of services for distributed transaction programming. The resulting programming environment,"DGDBM", offers transparency in relation to data distribution and data replication, giving a centralized vision to the programmer. It assures the functions of management of distributed transactions like as failure recovery, mutual consistency between copies and concurrence control. DGDBM is an useful support for distributed application programming over replicated files in UNIX networks and it is available as an API (application programming interface) for the C programmer. This paper describes the services offered by DGDBM to the programmer, the architecture of the system, the adopted solutions for distributed transaction management, the general aspects of design and implementation and the perspectives and planned extensions for this project.
Chiron-1: a software architecture for user interface development, maintenance, and run-time support
Authors: Richard N. Taylor, Kari A. Nies, Gregory Alan Bolcer, Craig A. MacFarlane, Kenneth M. Anderson, Gregory F. Johnson
Venue: ACM Transactions on Computer-Human Interaction (TOCHI) (1995)

The Chiron-1 user interface system demonstrates key techniques that enable a strict separation of an application from its user interface. These techniques include separating the control-flow aspects of the application and user interface: they are concurrent and may contain many threads. Chiron also separates windowing and look-and-feel issues from dialogue and abstract presentation decisions via mechanisms employing a client-server architecture. To separate application code from user interface code, user interface agents called artists are attached to instances of application abstract data types (ADTs). Operations on ADTs within the application implicitly trigger user interface activities within the artists. Multiple artists can be attached to ADTs, providing multiple views and alternative forms of access and manipulation by either a single user or by multiple users. Each artist and the application run in separate threads of control. Artists maintain the user interface by making remote calls to an abstract depiction hierarchy in the Chiron server, insulting the user interface code from the specifics of particular windowing systems and toolkits. The Chiron server and clients execute in separate processes. The client-server architecture also supports multilingual systems: mechanisms are demonstrated that support clients written in programming languages other than that of the server while nevertheless supporting object-oriented server concepts. The system has been used in several universities and research and development projects. It is available by anonymous ftp.
Laboratory projects for promoting hands-on learning in a computer security course
Authors: Janice E. Huss
Venue: ACM SIGCSE Bulletin (1995)

This paper describes two laboratory projects which were developed for use in a computer security course. The first project requires that students examine and analyze an existing computer network environment in order to find security flaws. A sample network environment containing numerous flaws was developed for this purpose. The second project requires students to analyze the security needs of a hypothetical college with respect to its academic computing network and establish a secure computing environment which meets those needs. The environment for both projects consisted of a network of IBM compatible computers running Artisoft's LANtastic Network Operating System for DOS.
Learning Fallible Deterministic Finite Automata
Authors: Dana Ron, Ronitt Rubinfeld
Venue: Machine Learning (1995)

We consider the problem of learning from a fallible expert that answers all queries about a concept, but often gives incorrect answers. The expert can also be thought of as a truth table describing the concept which has been partially corrupted. In order to learn the underlying concept with arbitrarily high precision, we would like to use its structure in order to correct most of the incorrect answers. We assume that the expert's errors are uniformly and independently distributed, occur with any fixed probability strictly smaller than &frac12;, and are persistent. In particular, we present a polynomial time algorithm using membership queries for correcting and learning fallible Deterministic Finite Automata under the uniform distribution.
Approximate Max-Flow on Small Depth Networks
Authors: Edith Cohen
Venue: SIAM Journal on Computing (1995)

We consider the maximum flow problem on directed acyclic networks with $m$ edges and depth $r$ (length of the longest $s$-$t$ path). Our main result is a new deterministic algorithm for solving the relaxed problem of computing an $s$-$t$ flow of value at least $(1-\epsilon)$ of the maximum flow. For instances where $r$ and $\epsilon^{-1}$ are small (i.e., $O(\polylog(m))$), this algorithm is in $\NC$ and uses only $O(m)$ processors, which is a significant improvement over existing parallel algorithms. As one consequence, we obtain an $\NC$ $O(m)$ processor algorithm to find a bipartite matching of cardinality $(1-\epsilon)$ of the maximum (for $\epsilon^{-1}= O(\polylog(m))$). We use a novel approach based on path-counts to compute blocking flows in parallel. This approach produces fractional flow even when capacities are integral. To encounter that, we provide a rounding algorithm that is of independent interest. In polylogarithmic time using $O(m)$ processors, the algorithm rounds any fractional flow on a network with integral capacities to an integral flow. The rounding technique extends to networks with costs.
Sensitivity-driven co-synthesis of distributed embedded systems
Authors: Ti-Yen Yen, Wayne Wolf
Venue: Proceedings of the 8th international symposium on System synthesis (1995)

Abstract: Describes a new, sensitivity-driven algorithm for the co-synthesis of real-time distributed embedded systems. Many embedded computing systems are distributed systems: communicating periodic processes executing on several CPUs/ASICs connected by communication links. We use performance estimates to compute a local sensitivity of the design to process allocation. We propose a priority prediction method to schedule processes. Based on these techniques, we develop a gradient-search algorithm which co-synthesizes heterogeneous distributed systems of arbitrary topology and the associated application software architecture. Experimental results show that our algorithm can find good implementation architectures in small amounts of CPU time.
Dynamic self-invalidation: reducing coherence overhead in shared-memory multiprocessors
Authors: Alvin R. Lebeck, David A. Wood
Venue: ACM SIGARCH Computer Architecture News (1995)

This paper introduces dynamic self-invalidation (DSI), a new technique for reducing cache coherence overhead in shared-memory multiprocessors. DSI eliminates invalidation messages by having a processor automatically invalidate its local copy of a cache block before a conflicting access by another processor. Eliminating invalidation overhead is particularly important under sequential consistency, where the latency of invalidating outstanding copies can increase a program's critical path.DSI is applicable to software, hardware, and hybrid coherence schemes. In this paper we evaluate DSI in the context of hardware directory-based write-invalidate coherence protocols. Our results show that DSI reduces execution time of a sequentially consistent full-map coherence protocol by as much as 41%. This is comparable to an implementation of weak consistency that uses a coalescing write-buffer to allow up to 16 outstanding requests for exclusive blocks. When used in conjunction with weak consistency, DSI can exploit tear-off blocks---which eliminate both invalidation and acknowledgment messages---for a total reduction in messages of up to 26%.
The EDR electronic dictionary
Authors: Toshio Yokoi
Venue: Communications of the ACM (1995)

Natural language processing will grow into a vital industrial technology in the next five to 10 years. But this growth depends on the development of large linguistic databases that capture natural language phenomena [1, 2]. Another important theme for future work is development of large knowledge bases that are shared widely by different groups. One promising approach to such knowledge bases draws on natural language processing and linguistic knowledge. This article describes the EDR Electronic Dictionary [3], which seeks to provide a foundation for linguistic databases, and explains the relation of electronic dictionaries to very large knowledge bases.
Multiple-process behavioral synthesis for mixed hardware-software systems
Authors: Jay K. Adams, Donald E. Thomas
Venue: Proceedings of the 8th international symposium on System synthesis (1995)

Abstract: Systems composed of microprocessors interacting with ASICs are necessarily multiple-process systems, since the controller in the microprocessor is separate from any controllers on the ASIC. For this reason, the design of such systems offers an opportunity to exploit not only hardware-software tradeoffs, but concurrency tradeoffs as well. The paper describes an automated iterative improvement technique for performing concurrency optimization and hardware-software tradeoffs simultaneously. Experimental results illustrate that addressing these two issues simultaneously enables us to identify a number of interesting cost/performance points that would not have been found otherwise.
A pragmatic Ada software design/development methodology
Authors: Wayne Pullan
Venue: ACM SIGAda Ada Letters (1995)

A pragmatic design method is described which has been successfully applied to two medium size Ada projects. This design method parallels (albeit at a much less sophisticated level) the domain oriented methodologies currently becoming popular with the advent of products such as Microsoft Visual Basic (TM).
Finding and reminding: file organization from the desktop
Authors: Deborah Barreau, Bonnie A. Nardi
Venue: ACM SIGCHI Bulletin (1995)

This paper summarizes and synthesizes two independent studies of the ways users organize and find files on their computers. The first study (Barreau 1995) investigated information organization practices among users of DOS, Windows and OS/2. The second study (Nardi, Anderson and Erickson 1995), examined the finding and filing practices of Macintosh users. There were more similarities in the two studies than differences. Users in both studies (1) preferred location-based finding because of its crucial reminding function; (2) avoided elaborate filing schemes; (3) archived relatively little information; and (4) worked with three types of information: ephemeral, working and archived. A main difference between the study populations was that the Macintosh users used subdirectories to organize information and the DOS users did not.
Efficient Image Processing Algorithms on the Scan Line Array Processor
Authors: David Helman, Joseph JáJá
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1995)

We develop efficient algorithms for low and intermediate level image processing on the scan line array processor, a SIMD machine consisting of a linear array of cells that processes images in a scan line fashion. For low level processing, we present algorithms for block DFT, block DCT, convolution, template matching, shrinking, and expanding which run in real-time. By real-time, we mean that, if the required processing is based on neighborhoods of size m×m, then the output lines are generated at a rate of O(m) operations per line and a latency of O(m) scan lines, which is the best that can be achieved on this model. We also develop an algorithm for median filtering which runs in almost real-time at a cost of O(m${\rm log}$m) time per scan line and a latency of ${\bf \lfloor^{\underline m}_{\,\, 2}\rfloor}$ scan lines. For intermediate level processing, we present optimal algorithms for translation, histogram computation, scaling, and rotation. We also develop efficient algorithms for labelling the connected components and determining the convex hulls of multiple figures which run in O(n${\rm log}$n) and O(n${\rm log}$2n) time, respectively. The latter algorithms are significantly simpler and easier to implement than those already reported in the literature for linear arrays.
Quantification of quality-of-presentations (QOPs) for multimedia synchronization schemes
Authors: Chung-Ming Huang, Ruey-Yang Lee
Venue: ACM SIGCOMM Computer Communication Review (1996)

Storing different numbers of media units in advance can guarantee different levels of synchronization qualities. That is, allocating some buffers at the receive client site can smooth intra/inter asynchrony anomalies, which are the side effects of delay jitters. Additionally, the commencement of a multimedia presentation can be smoothly invoked after a pre-defined number of media units has been stored in each medium stream's buffer. To maintain synchronization qualities, video streams can adopt the non-blocking or the restricted blocking synchronization scheme, and audio streams can adopt the blocking synchronization scheme. In this paper, we derive mathematical relationships among associated parameters such that Quality Of Presentations (QOPs), i.e., intra-medium and inter-media asynchrony anomalies, for live continuous multimedia presentations can be analyzed. Using the mathematical analysis, trade-offs between QOPs and networking/system resources can be identified.
Existence and Uniqueness of Optimal MatrixScalings
Authors: V. Balakrishnan, S. Boyd
Venue: SIAM Journal on Matrix Analysis and Applications (1995)

The problem of finding a diagonal similarity scaling to minimize the scaled singular value of a matrix arises frequently in robustness analysis of control systems. It is shown here that the set of optimal diagonal scalings is nonempty and bounded if and only if the matrix that is being scaled is irreducible. For an irreducible matrix, a sufficient condition is derived for the uniqueness of the optimal scaling.
How many queries are needed to learn?
Authors: Lisa Hellerstein, Krishnan Pillaipakkamnatt, Vijay Raghavan, Dawn Wilkins
Venue: Journal of the ACM (JACM) (1996)

We investigate the query complexity of exact learning in the membership and (proper) equivalence query model. We give a complete characterization of concept classes that are learnable with a polynomial number of polynomial sized queries in this model. We give applications of this characterization, including results on learning a natural subclass of DNF formulas, and on learning with membership queries alone. Query complexity has previously been used to prove lower bounds on the time complexity of exact learning. We show a new relationship between query complexity and time complexity in exact learning: If any &ldquo;honest&rdquo; class is exactly and properly learnable with polynomial query complexity, but not learnable in polynomial time, then P = NP. In particular, we show that an honest class is exactly polynomial-query learnable if and only if it is learnable using an oracle for &Ggr;p4.
Spain: computer graphics education evolves with curricula structure
Authors: Pere Brunet, Isabel Navazo
Venue: ACM SIGGRAPH Computer Graphics (1996)

Computer graphics education is becoming more and more relevant in technical studies in Spain. This positive evolution is partly due to the changes in the curricula structure in the undergraduate studies in Spain in recent years. New and updated curricula are being set up in most universities with a semester structure for their courses. As a consequence, a good number of computer graphics courses have been created, and the number of universities offering graphics courses has clearly increased.Due to the converging interests in computer graphics education, a Computer Graphics Education Group has existed within the Spanish chapter of the Eurographics Association since 1992. The main activities of the group include annual meetings to discuss curricula, covered topics, methodology and resources. Relevant information and support materials are accessible and shared through the Internet (http://smagris.eleinf.uv.es/DOCEN-CIA_IG/docencia.html).Undergraduate university studies in Spain are either technical (three years) or high (five years). Most of the computer graphics courses are offered in both curricula. Graduate courses are organized in Ph.D. programs. Ph.D. programs in computer graphics are emerging as the new universities settle their studies. In the next two sections we briefly summarize the organization and contents of the computer graphics courses in Spain.
China: computer graphics education available at universities, institutes and training centers
Authors: Jiaoying Shi, Zhigeng Pan
Venue: ACM SIGGRAPH Computer Graphics (1996)

Computer graphics education started in China in the late 1970s and has expanded considerably during the last 10 years. Universities all over the country have computer graphics in their programs, In addition, there are job training courses for students and training seminars for computer graphics educators and researchers. Computer graphics knowledge can be acquired in universities and training centers, and computer graphics education usually forms part of a curriculum of a more general subject (usually computer science).Academic education in China takes place at universities, where three levels of education programs are offered. The undergraduate student program, which leads to a bachelor's degree, takes four to five years. At this level, an introduction to the basics of computer graphics and related subjects is given. Key universities, such as Tsinghua University, Nanjing University and Zhejiang University, provide undergraduate courses on computer graphics.The graduate student program, which leads to a master's degree, takes two and one-half to three years. Here the depth of the subject increases and a special subfield can be chosen. Students have some required courses and many optional courses. The graduate study ends with the master's thesis which allows students to go deeper into a special field. Many universities offer the master's degree in computer graphics.At the highest level is the Ph.D. candidate program which leads to a doctorate and takes three to four years. For a doctorate, a written dissertation is required. In the first three semesters, the Ph.D. candidate may take several courses related to his research topic. For example, if the Ph.D. student's research topic is computer graphics, he or she may take courses such as realistic graphics, geometric modeling or computer-aided design. In China, only some key universities offer the Ph.D. degree to students in the field of computer graphics.
On the Variance of the Height of Random Binary Search Trees
Authors: Luc Devroye, Bruce Reed
Venue: SIAM Journal on Computing (1995)

Let $H_n$ be the height of a random binary search tree on $n$ nodes. We show that there exists a constant $\alpha = 4.31107\ldots$ such that ${\rm P} \{ |H_n - \alpha \log n | > \beta \log \log n \} \to 0$, where $\beta>15 \alpha / \ln 2 = 93.2933\ldots$. The proof uses the second moment method and does not rely on properties of branching processes. We also show that $\Var \{ H_n \} = O( (\log \log n)^2)$.
TIERS: Topology independent pipelined routing and scheduling for VirtualWire compilation
Authors: Charles Selvidge, Anant Agarwal, Matt Dahl, Jonathan Babb
Venue: Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays (1995)

TIERS is a new pipelined routing and scheduling algorithm implemented in a complete VirtualWireTM compilation and synthesis system. TIERS is described and compared to prior work both analytically and quantitatively. TIERS improves system speed by as much as a factor of 2.5 over prior work. TIERS routing results for both Altera and Xilinx based FPGA systems are provided.
Sequential experimentation for estimating the optimal delay of activities in PERT networks
Authors: Arnold H. Buss
Venue: Proceedings of the 27th conference on Winter simulation (1995)

Applies the response surface methodology (RSM) utilizing simple fractional designs to optimize the expected present value (EPV) of a stochastic project network with respect to the delay of activities. Such a delay could increase the EPV by postponing negative cash flows, possibly at the expense of also delaying the final payment for the project. The problem was challenging, due to a combination of high variability with a relatively flat objective function near the optimum. Comparisons with the true optimal solutions, where available, indicated the robustness of the approach.
Sliceable Floorplanning by Graph Dualization
Authors: Gary K. H. Yeap, Majid Sarrafzadeh
Venue: SIAM Journal on Discrete Mathematics (1995)

Previous algorithms on rectangular dual graph floorplanning generate general floorplans which include the class of nonsliceable floorplans. We examine the framework of generating sliceable floorplans using the rectangular dual graph approach and present an algorithm that generates a sliceable floorplan if the input graph satisfies certain sufficient conditions. For general input, the algorithm is still able to generate sliceable floorplans by introducing pseudomodules where the areas occupied by the pseudomodules are used for wiring. For an $n$-vertex adjacency graph, the algorithm generates a sliceable floorplan in $O(n \log n + hn)$ time where $h$ is the height of the sliceable floorplan tree.
PMRSB: parallel multilevel recursive spectral bisection
Authors: Stephen T. Barnard
Venue: Proceedings of the 1995 ACM/IEEE conference on Supercomputing (CDROM) (1995)

The design of a parallel implementation of multilevel recursive spectral bisection on the Cray T3D is described. The code is intended to be fast enough to enable dynamic repartitioning of adaptive meshes and to partition meshes that are too large for workstations. Two innovations in the implementation are recursive asynchronous task teams and a parallel version of the multilevel accelerator. A performance improvement of a factor of 140 over the best available serial implementation is demonstrated.
An Efficient Two-Dimensional Vortex Method with Long Time Accuracy
Authors: Ibrahim Bless Ranero, Tomás Chacón Rebello
Venue: SIAM Journal on Numerical Analysis (1996)

This paper deals with efficient techniques for the numerical solution of two-dimensional free-space incompressible Euler equations. We develop an algorithm for fast computation of velocity in a vortex method based upon discretization of vorticity by finite elements. We prove that the method with fast computation of velocity is numerically stable and convergent with second-order accuracy. Some standard numerical tests show that the algorithm with Delaunay regridding bears good stability and accuracy properties for long integration times, with a relatively low computational cost. Moreover, the algorithm is found to be more accurate than high-order vortex--blob methods with regridding for long enough integration times.