ppxscal/embedding_network huggingface dataset:
Planning and design of information systems using OODPM
Authors: Offer Drori
Venue: ACM SIGSOFT Software Engineering Notes (1996)

The process of system analysis and its planning includes various stages. Over the years various methodologies have been defined for this process. The methodologies themselves constitute a method that regulates the various stages in the process of planning and developing the information system. Each methodology has its own advantages and disadvantages but, generally, the correct methodology must be adapted to the required system.The aim of this article is to describe a new methodology, known as OODPM - Object Oriented Design by a Prototype Methodology, that integrates two existing methodologies, namely OOD and Prototype, bringing together many advantages. The principle advantages of this method are as follows: the ability to reduce planning time; to better define user requirements; to plan an enhanced information system; to bridge the gap between the design of the required solution and its development. This article will offer a brief survey of the methodologies currently used in the development and planning of information systems, focusing on the OODPM method and the tools it uses.
On-Line and First-Fit Coloring of Graphs That Do Not Induce $P_5$
Authors: Henry A. Kierstead, Stephen G. Penrice, William T. Trotter
Venue: SIAM Journal on Discrete Mathematics (1995)

For a graph $H$, let $\Forb(H)$ be the class of graphs that do not induce $H$, and let $P_5$ be the path on five vertices. In this article, we answer two questions of Gyarfas and Lehel. First, we show that there exists a function $f(\omega)$ such that for any graph $G \in \Forb(P_{5})$, the on-line coloring algorithm First-Fit uses at most # f(\omega(G))$ colors on $G$, where $\omega(G)$ is the clique size of $G$. Second, we show that there exists an on-line algorithm $A$ that will color any graph $G \in \Forb(P_{5})$ with a number of colors exponential in $\omega(G)$. Finally, we extend some of our results to larger classes of graphs defined in terms of a list of forbidden subgraphs.
ATM network: goals and challenges
Authors: B. G. Kim, P. Wang
Venue: Communications of the ACM (1995)

Asynchronous transfer mode (ATM) can provide both circuit and packet-switching services with the same protocol, and this integration of circuit and packet-switching services can be beneficial in many ways. Four major benefits of the ATM technique are considered here: scalability, statistical multiplexing, traffic integration, and network simplicity. In the course of achieving those benefits, ATM makes compromises. In this article we assess the benefits and ensuing penalties of these compromises and put them into perspective.
The Appropriateness of Predicate Invention as Bias Shift Operation in ILP
Authors: Irene Stahl
Venue: Machine Learning (1995)

The task of predicate invention in Inductive Logic Programming is to extend the hypothesis language with new predicates if the vocabulary given initially is insufficient for the learning task. However, whether predicate invention really helps to make learning succeed in the extended language depends on the language bias currently employed.In this paper, we investigate for which commonly employed language biases predicate invention is an appropriate shift operation. We prove that for some restricted languages predicate invention does not help when the learning task fails and we characterize the languages for which predicate invention is useful. We investigate the decidability of the bias shift problem for these languages and discuss the capabilities of predicate invention as a bias shift operation.
A note on combination generators
Authors: C. T. Gan
Venue: ACM Transactions on Mathematical Software (TOMS) (1985)

A recent study by Akl indicates that Mifsud's algorithm, which involves unnecessary searching operations, is the fastest existing combination generator. A modified Page and Wilson's algorithm, which is essentially similar to Mifsud's algorithm, is presented. A theoretical analysis of the modified algorithm is also given.
A type of duality between self-organizing maps and minimal wiring
Authors: Graeme Mitchison
Venue: Neural Computation (1995)

I show here that two interpretations of neural maps are closely related. The first, due to Kohonen, sees these maps as forming by an adaptive process in response to stimuli. The second---the minimal wiring or dimension-reduction perspective---interprets the maps as the solution of a minimization problem, where the goal is to keep the "wiring" between neurons with similar receptive fields as short as possible. Recent work by Luttrell provides a bridging concept, by showing that Kohonen's algorithm can be regarded as an approximation to gradient descent on a certain functional. I show how this functional can be generalized in a way that allows it to be interpreted as a measure of wirelength.
Performance prediction of parallel systems with scalable specifications&mdash;methodology and case study
Authors: H. Wabnig, G. Haring
Venue: ACM SIGMETRICS Performance Evaluation Review (1995)

This paper describes the general methodology of specifying parallel systems within the PAPS (Performance Analysis of Parallel Systems) toolset and presents a case study that shows the applicability and accuracy of the Petri net based performance prediction tools contained in the toolset. Parallel systems are specified in the PAPS toolset by separately defining the program workload, the hardware resources, and the mapping of the program to the hardware. The resource parameterization is described in detail for a multiprocessor computer with a store amp; forward communication network. The Gaussian elimination algorithm is taken as a workload example to demonstrate how regularly structured parallel algorithms are modelled with acyclic task graphs. Three different program specifications with various levels of model accuracy are developed and their parameterization is described. The predicted execution time is compared with the measured execution times of the real program on the parallel hardware. It is shown that the Petri net based performance prediction tools provide accurate performance predicitons.
Lightweight lexical source model extraction
Authors: Gail C. Murphy, David Notkin
Venue: ACM Transactions on Software Engineering and Methodology (TOSEM) (1996)

Software engineers maintaining an existing software system often depend on the mechanized extraction of information from system artifacts. Some useful kinds of information&mdash;source models&mdash;are well known: call graphs, file dependences, etc. Predicting every kind of source model that a software engineer may need is impossible. We have developed a lightweight approach for generating flexible and tolerant source model extractors from lexical specifications. The approach is lightweight in that the specifications are relatively small and easy to write. It is flexible in that there are few constraints on the kinds of artifacts from which source models are extracted (e.g., we can extract from source code, structured data files, documentation, etc.). It is tolerant in that there are few constraints on the condition of the artifacts. For example, we can extract from source that cannot necessarily be compiled. Our approach extended the kinds of source models that can be easily produced from lexical information while avoiding the constraints and brittleness of most parser-based approaches. We have developed tools to support this approach and applied the tools to the extraction of a number of different source models (file dependences, event interactions, call graphs) from a variety of system artifacts (C, C++, CLOS, Eiffel. TCL, structured data). We discuss our approach and describe its application to extract source models not available using existing systems; for example, we compute the implicitly-invokes relation over Field tools. We compare and contrast our approach to the conventional lexical and syntactic approaches of generating source models.
An educational tool for testing hierarchical multilevel caches
Authors: J. A. Gómez Pulido, J. M. Sánchez Pérez, J. A. Moreno Zamora
Venue: ACM SIGARCH Computer Architecture News (1996)

In this work we present a simulator for a multilevel cache memory system on a monoprocessor environment. It has incorporated a full graphic interface operating on a PC-DOS environment. At first, the simulator was conceived as a tool for applying it to teaching of cache memories. However, the potentiality of the developed system has proved its utility on program analysis and design strategies of memory systems. The above characteristics enable the simulator to be used for designing systems that run optimally a determinate kind of programs and improve the operating mode of a determinate architecture
Regular models of phonological rule systems
Authors: Ronald M. Kaplan, Martin Kay
Venue: Computational Linguistics (1994)

This paper presents a set of mathematical and computational tools for manipulating and reasoning about regular languages and regular relations and argues that they provide a solid basis for computational phonology. It shows in detail how this framework applies to ordered sets of context-sensitive rewriting rules and also to grammars in Koskenniemi's two-level formalism. This analysis provides a common representation of phonological constraints that supports efficient generation and recognition by a single simple interpreter.
Reciprocal Realizations on the Circle
Authors: Jan-Ake Sand
Venue: SIAM Journal on Control and Optimization (1996)

Reciprocal realizations on a circle are defined. The concepts of minimality, interior observability, and exterior observability are introduced and related to each other, using geometric methods. In particular, the concept of a splitting subspace plays a central role.
The Efficiency of Subgradient Projection Methods for Convex Optimization, Part II: Implementations and Extensions
Authors: Krzysztof C. Kiwiel
Venue: SIAM Journal on Control and Optimization (1996)

In the first part of this paper we studied subgradient methods for convex optimization that use projections onto successive approximations of level sets of the objective corresponding to estimates of the optimal value. We presented several variants and showed that they enjoy almost optimal efficiency estimates. In this part of the paper we discuss possible implementations of such methods. In particular, their projection subproblems may be solved inexactly via relaxation methods, thus opening the way for parallel implementations. We discuss accelerations of relaxation methods based on simultaneous projections, surrogate constraints, and conjugate and projected (conditional) subgradient techniques.
An analysis of dynamic branch prediction schemes on system workloads
Authors: Nicolas Gloy, Cliff Young, J. Bradley Chen, Michael D. Smith
Venue: ACM SIGARCH Computer Architecture News (1996)

Recent studies of dynamic branch prediction schemes rely almost exclusively on user-only simulations to evaluate performance. We find that an evaluation of these schemes with user and kernel references often leads to different conclusions. By analyzing our own Atom-generated system traces and the system traces from the Instruction Benchmark Suite, we quantify the effects of kernel and user interactions on branch prediction accuracy. We find that user-only traces yield accurate prediction results only when the kernel accounts for less than 5% of the total executed instructions. Schemes that appear to predict well under user-only traces are not always the most effective on full-system traces: the recently-proposed two-level adaptive schemes can suffer from higher aliasing than the original per-branch 2-bit counter scheme. We also find that flushing the branch history state at fixed intervals does not accurately model the true effects of user/kernel interaction.
Second Derivatives for Optimizing Eigenvalues of Symmetric Matrices
Authors: Michael L. Overton, Robert S. Womersley
Venue: SIAM Journal on Matrix Analysis and Applications (1995)

Let $A$ denote an $n \times n$ real symmetric matrix-valued function depending on a vector of real parameters, $x \in \Re^{m}$. Assume that $A$ is a twice continuously differentiable function of $x$, with the second derivative satisfying a Lipschitz condition. Consider the following optimization problem: minimize the largest eigenvalue of $A(x)$. Let $x^*$ denote a minimum. Typically, the maximum eigenvalue of $A(x^*)$ is multiple, so the objective function is not differentiable at $x^*$, and straightforward application of Newton's method is not possible. Nonetheless, the formulation of a method with local quadratic convergence is possible. The main idea is to minimize the maximum eigenvalue subject to a constraint that this eigenvalue has a certain multiplicity. The manifold $\Omega$ of matrices with such multiple eigenvalues is parameterized using a matrix exponential representation, leading to the definition of an appropriate Lagrangian function. Consideration of the Hessian of this Lagrangian function leads to the second derivative matrix used by Newton's method. The convergence proof is nonstandard because the parameterization of $\Omega$ is explicitly known only in the limit. In the special case of multiplicity one, the maximum eigenvalue is a smooth function and the method reduces to a standard Newton iteration.
Algorithms for deferred view maintenance
Authors: Latha S. Colby, Timothy Griffin, Leonid Libkin, Inderpal Singh Mumick, Howard Trickey
Venue: ACM SIGMOD Record (1996)

Materialized views and view maintenance are important for data warehouses, retailing, banking, and billing applications. We consider two related view maintenance problems: 1) how to maintain views after the base tables have already been modified, and 2) how to minimize the time for which the view is inaccessible during maintenance.Typically, a view is maintained immediately, as a part of the transaction that updates the base tables. Immediate maintenance imposes a significant overhead on update transactions that cannot be tolerated in many applications. In contrast, deferred maintenance allows a view to become inconsistent with its definition. A refresh operation is used to reestablish consistency. We present new algorithms to incrementally refresh a view during deferred maintenance. Our algorithms avoid a state bug that has artificially limited techniques previously used for deferred maintenance.Incremental deferred view maintenance requires auxiliary tables that contain information recorded since the last view refresh. We present three scenarios for the use of auxiliary tables and show how these impact per-transaction overhead and view refresh time. Each scenario is described by an invariant that is required to hold in all database states. We then show that, with the proper choice of auxiliary tables, it is possible to lower both per-transaction overhead and view refresh time.
An Asynchronous Distributed Approach for the Simulation of Behavior-Level Models on Parallel Processors
Authors: Sumit Ghosh, Meng-Lin Yu
Venue: IEEE Transactions on Parallel and Distributed Systems (1995)

Traditional approaches to the distributed simulation of digital designs are limited in that they are inefficient and prone to deadlock for systems with feedback loops. This paper proposes an asynchronous distributed algorithm to the simulation and verification of behavior-level models and describes its implementation on an actual loosely-coupled parallel processor. The approach is relatively efficient for realistic digital designs and mathematically shown to be deadlock free. Additionally, it includes a new technique [6] for modeling the timing of digital systems that guarantees the accuracy of the simulation results. In the discipline of computer-aided design of digital systems, a behavior model refers to a compact and executable representation of the activities of a complex digital component or an entire digital system such as the Motorola 68000, expressed through a high-level hardware description language such as ADLIB [2] or VHDL [1]. Behavior models are popular because of their flexibility; however, they execute excruciatingly slow on uniprocessor computers. The approach presented in this paper has the potential to significantly reduce the execution time through concurrent execution on multiple processors. In this approach, a design is first partitioned by the user and the behavior models corresponding to the digital components of each partition are assigned to a unique processor of the parallel processor system. In course of execution, a behavior model receives signal transitions from other models through the explicit communication links, termed protocols, that model the connectivity of the digital design. Every model is completely unaware of the existence of other entities in the simulation system and is solely responsible for accurately scheduling its execution on the underlying processor. Thus, scheduling is distributed in the models and the approach, like the Chandy¿Misra algorithm [11], does not require any knowledge of the global simulation time. However, this paper differs from [11] in that 1) it redefines the notion of deadlock in nonfeedback systems [11] as starvation and proposes a new methodology to address it, and 2) introduces a new mode¿¿exception-mode¿, of execution to prevent the occurrence of deadlock in feedback systems. This paper also reports on an implementation of the approach on the 64 node Bell Labs hypercube [3], [4] and the ARMSTRONG [24] system at Brown University. Performance statistics based on the simulation of several representative designs indicate that the approach achieves significant speedup for realistic combinational behavior-level digital systems while the speedup for sequential designs is a function of the system and other factors.Index Terms¿Distributed simulation, digital systems simulation, asynchronous algorithms, parallel processors.
Neural Networks for Full-Scale Protein Sequence Classification: Sequence Encoding with Singular Value Decomposition
Authors: Cathy Wu, Michael Berry, Sailaja Shivakumar, Jerry McLarty
Venue: Machine Learning (1995)

A neural network classification method has been developed as an alternative approach to the search/organization problem of protein sequence databases. The neural networks used are three-layered, feed-forward, back-propagation networks. The protein sequences are encoded into neural input vectors by a hashing method that counts occurrences of n-gram words. A new SVD (singular value decomposition) method, which compresses the long and sparse n-gram input vectors and captures semantics of n-gram words, has improved the generalization capability of the network. A full-scale protein classification system has been implemented on a Cray supercomputer to classify unknown sequences into 3311 PIR (Protein Identification Resource) superfamilies/families at a speed of less than 0.05 CPU second per sequence. The sensitivity is close to 90% overall, and approaches 100% for large superfamilies. The system could be used to reduce the database search time and is being used to help organize the PIR protein sequence database.
The complexity of probabilistic verification
Authors: Costas Courcoubetis, Mihalis Yannakakis
Venue: Journal of the ACM (JACM) (1995)

We determine the complexity of testing whether a finite state, sequential or concurrent probabilistic program satisfies its specification expressed in linear-time temporal logic. For sequential programs, we present an algorithm that runs in time linear in the program and exponential in the specification, and also show that the problem is in PSPACE, matching the known lower bound. For concurrent programs, we show that the problem can be solved in time polynomial in the program and doubly exponential in the specification, and prove that it is complete for double exponential time. We also address these questions for specifications described by &ohgr;-automata or formulas in extended temporal logic.
A Memory Interference Model for Regularly Patterned Multiple Stream Vector Accesses
Authors: Qing Yang, Tao Yang
Venue: IEEE Transactions on Parallel and Distributed Systems (1995)

Most existing analytical models for memory interference generally assume random bank selection for each memory access. In vector computers, however, memory accesses are typically regularly patterned with a number of data items being accessed concurrently from different banks. Very little is known about the queueing behavior of memory interferences in multiple stream vector accesses. This paper presents an analytical model for memory interferences due to vector accesses in multiple vector processor systems. The model captures the effects of both bank conflicts among elements within one vector access stream and conflicts among multiple vector access streams on system performance. The model is based on a closed queueing network assuming an ideal interconnection network. An approximation technique is proposed to solve the memory queueing system that serves customers in a complicated way (non-FIFO). We also carry out extensive simulation experiments to study memory interference and validate our analytical model. Simulation results and analytical results are in a very good agreement, indicating that the model is very accurate. We further validate our analysis by comparing the numerical results obtained from our analytical model with those measurement results that were published by other researchers. Based on our analytical model and simulations, we carry out performance evaluation of the multiple vector processor systems. Our numerical results show that memory access conflicts pose a severe limitation on the number of useful processors in the system, implying that memory system design is essential to high-performance computing.
Optimal signature extraction and information loss
Authors: Christos Faloutsos, Stavros Christodoulakis
Venue: ACM Transactions on Database Systems (TODS) (1987)

Signature files seem to be a promising access method for text and attributes. According to this method, the documents (or records) are stored sequentially in one file ("text file"), while abstractions of the documents ("signatures") are stored sequentially in another file ("signature file"). In order to resolve a query, the signature file is scanned first, and many nonqualifying documents are immediately rejected. We develop a framework that includes primary key hashing, multiattribute hashing, and signature files. Our effort is to find the optimal signature extraction method. The main contribution of this paper is that we present optimal and efficient suboptimal algorithms for assigning words to signatures in several environments. Another contribution is that we use information theory, and study the relationship of the false drop probability Fd and the information that is lost during signature extraction. We give tight lower bounds on the achievable Fd and show that a simple relationship holds between the two quantities in the case of optimal signature extraction with uniform occurrence and query frequencies. We examine hashing as a method to map words to signatures (instead of the optimal way), and show that the same relationship holds between Fd and loss, indicating that an invariant may exist between these two quantities for every signature extraction method.
Synthesis of pipelined DSP accelerators with dynamic scheduling
Authors: Patrick Schaumont, Bart Vanthournout, Ivo Bolsens, Hugo De Man
Venue: Proceedings of the 8th international symposium on System synthesis (1995)

Abstract: To construct complete systems on silicon, application specific DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology is presented to synthesize high throughput DSP functions into accelerator processors containing a datapath of highly pipelined, bit-parallel hardware units. Emphasis is put on the definition of a controller architecture that allows efficient run-time schedules of these DSP algorithms on such highly pipelined data paths. The methodology is illustrated by means of an FFT butterfly accelerator block.