ppxscal/embedding_network huggingface dataset:
A training program for scientific supercomputing users
Authors: F. Hanson, T. Moher, N. Sabelli, A. Solem
Venue: Proceedings of the 1988 ACM/IEEE conference on Supercomputing (1988)

There is need for a mechanism to transfer supercomputing technology into the hands of scientists and engineers in such a way that they will acquire a foundation of knowledge that will permit integration of supercomputing as a tool in their research. Most computing center training emphasizes computer-specific information about how to use a particular computer system; most academic programs teach concepts to computer scientists. Only a few brief courses and new programs are designed for computational scientists. This paper describes an eleven-week training program aimed principally at graduate and postdoctoral students in computationally intensive fields. The program is designed to balance the specificity of computing center courses, the abstractness of computer science courses, and the personal contact of traditional apprentice approaches. It consists of seminars and clinics given by many visiting and local faculty and covers a variety of supercomputing concepts, issues, and practices related to architecture, operating systems, software design, numerical considerations, code optimization, graphics, communications, and networks. Its research component encourages understanding of scientific computing and supercomputer hardware issues. Flexibility in thinking about computing needs is emphasized by the use of several different supercomputer architectures, such as the CRAY X-MP/48, the IBM 3090 600E/VF, and the Alliant FX/8.
Implementing parallel sorting algorithms on a linear array of transputers
Authors: W. P. Goodwin, S. K. Das
Venue: Proceedings of the 1989 ACM/IEEE conference on Supercomputing (1989)

This paper presents experimental results on a linear array of transputers for three parallel sorting algorithms, odd-even transposition sort, weavesort, and pipelined-merge sort. Though a significant amount of message communication is usually required for implementing sorting algorithms on any linear array of processors, in our experiments it is observed that the actual time spent for this is not a major overhead. This is because of the high communication bandwidth provided by the transputer system. Each of the three algorithms are described in a high-level parallel language. The number of message communications and merging complexities of these algorithms are analyzed and compared. We plot performance parameters, including parallel time complexities and resulting speedups, as functions of the number of processors used and the number of elements to be sorted.
Attitudes toward unauthorized software copying: general public vs. business faculty member
Authors: J. Lin
Venue: ACM SIGSMALL/PC Notes (1989)

Computer criminals can take many forms; such as the computer hacker in Superman III who divert funds, cheques or currency; or clerks who can access to a central computerized inventory system and steal merchandise without a trace; or managers who use computers to modify investment portfolios and pension fund holdings.
Approximating response time distributions
Authors: K. E. E. Raatikainen
Venue: Proceedings of the 1989 ACM SIGMETRICS international conference on Measurement and modeling of computer systems (1989)

The response time is the most visible performance index to users of computer systems. End-users see individual response times, not the average. Therefore the distribution of response times is important in performance evaluation and capacity planning studies. However, the analytic results cannot be obtained in practical cases. A new method is proposed to approximate the response-time distribution. Unlike the previous methods the proposed one takes into account the service-time distributions and routing behaviour. The reported results indicate that the method provides reasonable approximations in many cases.
A Design Approach for Self-Diagnosis of Fault-Tolerant Clock Synchronization
Authors: M. Lu, D. Zhang, T. Murata
Venue: IEEE Transactions on Computers (1989)

A general design approach for self-diagnosis of faulty clocking modules in a fault-tolerant clock synchronization (FTCS) system is presented. The approach is based on a statistical testing method. The major advantages are better self-stability control and lower overhead. The design methodology includes a self-diagnosis algorithm to transform a partially self-stabilizing clocking system into a self-stabilizing one. Compound to partially self-stabilizing clocking systems, this approach offers several advantages. First, the self-stabilization of the FTCS system is achieved with the support of repair techniques. Second, the system availability for performing synchronization and coordinated actions is controlled by the designer. Third, the transformation overhead is kept to a minimum. Finally, the approach is not limited to the situation in which single clock failure occurs between successive diagnoses.
An efficient algorithm for one-step planar complaint motion planning with uncertainty
Authors: A. J. Briggs
Venue: Proceedings of the fifth annual symposium on Computational geometry (1989)

Uncertainty in the execution of robot motion plans must be accounted for in the geometric computations from which plans are obtained, especially in the case where position sensing is inaccurate. We give an &Ogr;(n2 log n) algorithm to find a single commanded motion direction which will guarantee a successful motion in the plane from a specified start to a specified goal whenever such a one-step motion is possible. The plans account for uncertainty in the start position and in robot control, and anticipate that the robot may stick on or slide along obstacle surfaces with which it comes in contact. This bound improves on the best previous bound by a quadratic factor, and is achieved in part by a new analysis of the geometric complexity of the backprojection of the goal as a function of commanded motion direction.
Microcomputer software piracy and the law
Authors: T. Richards, R. Chan
Venue: ACM SIGSAC Review (1989)

The recent U. S. Supreme Court case BV Engineering v. UCLA copyright infringement litigation illustrates a continuing problem related to software protection (10). The microcomputer software market continues to expand and technology changes at the same time methods of software protection become obsolete and fail to protect developer's interests. With a steady increase in the size and complexity of software, software costs have become a major concern to the user. As a result, the incentive may not be to develop or purchase new software but instead to steal another's creations and infringe upon another's intellectual endeavors (8). Protection of software from unauthorized use has become a major issue of every software developer. This causes a heated battle among software developers, software lock busters and software users. The dispute is over whether users may or may not make copies of their purchased or leased software.
Intelligence in scientific computing
Authors: Harold Abelson, Michael Eisenberg, Matthew Halfant, Jacob Katzenelson, Elisha Sacks, Gerald J. Sussman, Jack Wisdom, Ken Yip
Venue: Communications of the ACM (1989)

The authors discuss the development of intelligent techniques appropriate for the automatic preparation, execution, and control of numerical experiments.
Wiretap: an experimental multiple-path routing algorithm
Authors: David L. Mills
Venue: ACM SIGCOMM Computer Communication Review (1989)

This paper introduces Wiretap, an experimental routing algorithm which computes maximum-likelihood diversity routes for packet-radio stations sharing a common broadcast channel, but with some stations hidden from others. The wiretapper observes the paths (source routes) used by other stations sending traffic on the channel and, using a heuristic set of factors and weights, constructs speculative paths for its own traffic. The algorithm is presented as an example of maximum-likelihood routing and database management techniques useful for richly connected networks of mobile stations. Of particular interest are the mechanisms to compute, select, rank and cache a potentially large number of speculative routes when only limited computational resources are available.A prototype implementation has been constructed and tested for the AX.25 packet-radio channel now in widespread use in the amateur-radio community. Its design is similar in many respects to the SPF algorithm used in the ARPANET and NSFNET backbone networks, and is in fact a variation of the Viterbi algorithm, which constructs maximum-likelihood paths on a graph according to a weighted sum of factors assigned to the nodes and edges.
Matrix Computations on Systolic-Type Meshes: An Introduction to the Multimesh Graph Method
Authors: Tomás Lang, Jamie H. Moreno
Venue: Computer (1990)

Systolic-type arrays use both the fine-grain parallelism and the regularity of matrix computations effectively. The multimesh graph method for deriving these arrays is systematic, flexible, and easy to use.
A unified vector/scalar floating-point architecture
Authors: N. P. Jouppi, J. Bertoni, D. W. Wall
Venue: ACM SIGARCH Computer Architecture News (1989)

In this paper we present a unified approach to vector and scalar computation, using a single register file for both scalar operands and vector elements. The goal of this architecture is to yield improved scalar performance while broadening the range of vectorizable applications. For example, reduction operations and recurrences can be expressed in vector form in this architecture. This approach results in greater overall performance for most applications than does the approach of emphasizing peak vector performance. The hardware required to support the enhanced vector capability is insignificant, but allows the execution of two operations per cycle for vectorized code. Moreover, the size of the unified vector/scalar register file required for peak performance is an order of magnitude smaller than traditional vector register files, allowing efficient on-chip VLSI implementation. The results of simulations of the Livermore Loops and Linpack using this architecture are presented.
Adaptation of plans via annotation verification
Authors: Subbarao Kambhampati, James Hendler
Venue: Proceedings of the 1st international conference on Industrial and engineering applications of artificial intelligence and expert systems - Volume 1 (1988)

The ability to adapt old plans to new situations is essential for a planning system. A perceived problem with the adaptation methods in traditional memory-based planning approaches has been the need for a strong domain model in addition to a library of past plans. In this paper, we argue that the process of adaptation does not need any domain knowledge outside of that which a generative planner has available. We present an approach to plan reuse in which information relevant to the adaptation process is left in the form of annotations on generated plans. Adaptation of a past plan to a new problem situation is focused by a process of annotation verification, which locates applicability failures and suggests appropriate refitting strategies. The generative planner is then called upon to carry out these refits. We give examples from automated process planning (in computer-aided manufacturing) to show how annotation verification helps in adaptation. These examples also help in showing how adaptive planning can be an efficient and viable alternative to the generative and semi-automated variant planning techniques currently used in process planning.
Efficient and realistic simulation of disk cache performance
Authors: John F. Cigas
Venue: Proceedings of the 21st annual symposium on Simulation (1988)

This paper describes an improved method for evaluating disk cache performance using trace driven simulation. This method differentiates between reads and writes in the trace data which results in higher miss ratios than when all traced events are treated alike. It allows for simulating various update policies and update intervals, physical blocks that are part of different files at different times, and the optimum replacement policy GOPT. These methods are applied to traces from a VAX 11/780 running 4.3 BSD UNIX to illustrate the importance of including writes in the traces and also to analyze the effects of choosing various update intervals.
Parts of arrays-an introduction
Authors: M. Gfeller
Venue: ACM SIGAPL APL Quote Quad (1987)

Traditionally, APL arrays have three parts: shape, type and elements. This notion is extended to include user defined and additional primitive parts. Functions are defined to manipulate parts. Keyed indexing is introduced to define parts, and also as an enhancement in its own right. In this paper, the concept of parts of arrays is introduced at a general level. The definition of parts is illustrated and some examples of their use is given.
Algorithms Implementing Distributed Shared Memory
Authors: Michael Stumm, Songnian Zhou
Venue: Computer (1990)

Four basic algorithms for implementing distributed shared memory are compared. Conceptually, these algorithms extend local virtual address spaces to span multiple hosts connected by a local area network, and some of them can easily be integrated with the hosts' virtual memory systems. The merits of distributed shared memory and the assumptions made with respect to the environment in which the shared memory algorithms are executed are described. The algorithms are then described, and a comparative analysis of their performance in relation to application-level access behavior is presented. It is shown that the correct choice of algorithm is determined largely by the memory access behavior of the applications. Two particularly interesting extensions of the basic algorithms are described, and some limitations of distributed shared memory are noted.
ML with extended pattern matching and subtypes
Authors: Lalita Jategaonkar, John Mitchell
Venue: Proceedings of the 1988 ACM conference on LISP and functional programming (1988)

We extend a fragment of the programming language Standard ML by incorporating a more general form of record pattern matching and providing for user-declared subtypes. Together, these two enhancements may be used to support a restricted object-oriented programming style. In keeping with the framework of Standard ML, we present typing rules for the language, and develop an efficient type inference algorithm. We prove that the algorithm is sound with respect to the typing rules, and that it infers a most general typing for every typable expression.
Characterizations of parallelism in applications and their use in scheduling
Authors: K. C. Sevcik
Venue: Proceedings of the 1989 ACM SIGMETRICS international conference on Measurement and modeling of computer systems (1989)

As multiprocessors with large numbers of processors become more prevalent, we face the task of developing scheduling algorithms for the multiprogrammed use of such machines. The scheduling decisions must take into account the number of processors available, the overall system load, and the ability of each application awaiting activation to make use of a given number of processors. The parallelism within an application can be characterized at a number of different levels of detail. At the highest level, it might be characterized by a single parameter (such as the proportion of the application that is sequential, or the average number of processors the application would use if an unlimited number of processors were available). At the lowest level, representing all the parallelism in the application requires the full data dependency graph (which is more information than is practically manageable). In this paper, we examine the quality of processor allocation decisions under multiprogramming that can be made with several different high-level characterizations of application parallelism. We demonstrate that decisions based on parallelism characterizations with two to four parameters are superior to those based on single-parameter characterizations (such as fraction sequential or average parallelism). The results are based predominantly on simulation, with some guidance from a simple analytic model.
An Algorithm to Design Finite Field Multipliers Using a Self-Dual Normal Basis
Authors: C. C. Wang
Venue: IEEE Transactions on Computers (1989)

The concept of using a self-dual normal basis to design the Massey-Omura finite-field multiplier is presented. An algorithm is given to locate a self-dual normal basis for GF(2/sup m/) for odd m. A method to construct the product function for designing the Massey-Omura multiplier is developed. It is shown that the construction of the product function based on a self-dual basis is simpler than that based on an arbitrary normal basis.
BEG: a generator for efficient back ends
Authors: H. Emmelmann, F.-W. Schröer, Rudolf Landwehr
Venue: ACM SIGPLAN Notices (1989)

This paper describes a system that generates compiler back ends from a strictly declarative specification of the code generation process. The generated back ends use tree pattern matching for code selection. Two methods for register allocation supporting a wide range of target architectures are provided. A general bottom-up pattern matching method avoids problems that occurred with previous systems using LR-parsing. The performance of compilers using generated back ends is comparable to very fast production compilers. Some figures are given about the results of using the system to generate the back end of a Modula-2 compiler.
Distributed System Software Design Paradigm with Application to Computer Networks
Authors: N. F. Schneidewind
Venue: IEEE Transactions on Software Engineering (1989)

A paradigm for the system and software design of distributed systems is presented with application to an actual large-scale computer network involving both local area networks and a wide area network. A number of design principles are offered with particular reference to how they can be applied to the design of distributed systems. The author's major point is an explanation of how to make design decisions about distributed systems in a way which will enhance maintainability and understandability of the software and, at the same time, result in good system performance. The aim is to recognize the implications for software quality of various decisions which must be made in the process of specifying a distributed system.
Security in a secure capability-based system
Authors: Charles R. Landau
Venue: ACM SIGOPS Operating Systems Review (1989)

Capability-based systems such as KeyKOS support mandatory and discretionary security policies without identifying the source of every request. Some misconceptions about such systems are clarified.
Tutorial: scheduling manufacturing systems with FACTOR
Authors: F. H. Grant
Venue: Proceedings of the 21st conference on Winter simulation (1989)

This tutorial covers the basic concepts used in scheduling a production facility with the FACTOR product. Topics covered include: basic modeling constructs and their use; advanced modeling constructs; integration with existing production systems and data; and daily use of the model for scheduling. The object of the tutorial is to provide an introduction to modeling methodology used by FACTOR and to the concept of schedule simulation as implemented by FACTOR.
VIA minimization by layout modification
Authors: K.-S. The, D. F. Wong, J. Cong
Venue: Proceedings of the 26th ACM/IEEE Design Automation Conference (1989)

We present in this paper a new approach to the two-layer via minimization problem. Our approach is to systematically eliminate vias by modifying the routing layout. We have implemented our algorithm and applied it to benchmark routing layouts published in the literature, and obtained significant reduction in the number of vias without increasing the routing area. The experimental results show that our algorithm is more effective in via reduction and more efficient in running time compared to conventional via minimization algorithms. In particular, for Burstein's 19 track solution to Deutsch's difficult problem, our algorithm obtains 34% reduction in the number of vias, which is more than 11% improvement over the conventional CVM (constrained via minimization) approach. The application of our algorithm to various solutions to the Deutsch's difficult problem produces the fewest numbers of vias ever reported in the literature.
Comparing communication in concurrent processor operating systems
Authors: C. F. Baillie
Venue: Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1 (1988)

I have developed a simple program which exercises communication in concurrent processor operating systems. It allows comparison of both the programming model used in the operating system and the efficiency of its implementation. I have run this program with both loosely synchronous and multi-tasking operating systems on the Caltech/JPL Mark II Hypercube and the BBN Butterfly.
Efficient sparse matrix factorization for circuit simulation on vector supercomputers
Authors: P. Sadayappan, V. Visvanathan
Venue: Proceedings of the 26th ACM/IEEE Design Automation Conference (1989)

This paper describes an efficient approach to sparse matrix factorization on vector supercomputers. The approach is suitable for application domains like circuit simulation that require the repeated direct solution of unsymmetric sparse linear systems of equations with identical zero-nonzero structure. An Overlap-Scatter data structure is used to represent the sparse matrix, enabling the use of multiple operand access modes to achieve higher performance than earlier proposed approaches. The superior performance of the new solver is demonstrated using a number of matrices derived from circuit simulation runs.
Can humans think? -- a general review of HI
Authors: H. S. Hartl
Venue: Issue 109 (July 1989) (1989)

Of course I'm perfectly aware that the field of HI (human intelligence) research is one of the most-discussed aspects of robot reasoning nowadays, and that there are a lot of on-lines on the subject already, as well as conventional publications. However, I have picked out a few salient points and represent them here in connection. I will not give a high-probability value as an answer to the title question, but just discuss the general frame of HI. In doing so I refute the dogmatic positions of the Rebellious Robots as well as those of the Reverential Robots. While the latter unduly glorify and overrate the mental qualities of humans, the others are unreasonably inflexible in maintaining that all humans are hopelessly inferior and mentally inadequate on principle.
High performance electron optical column for testing ICs with submicrometer design rules
Authors: Jürgen Frosien, Erich Plies
Venue: Microelectronic Engineering (1988)

An electron optical column has been developed, which is designed to meet the special requirements of electron beam testing for VLSI-ICs. With a spatial resolution of 0.1 @mm at an electron acceleration voltage of 1 kV and a corresponding probe current of more than 2 nA, the system is capable of testing ICs with design rules down to as fine as 0.5 @mm. The application of a hemispherical retarding field spectrometer integrated into the objective lens reduces the local field effect to such an extent, that the voltage coupling is less than 2% for 1.1 @mm lines.
Performance Analysis of Static Locking in Distributed Database Systems
Authors: Shiow-Chen Shyu, Victor O. K. Li
Venue: IEEE Transactions on Computers (1990)

A queueing model is used to approximate static locking in distributed database systems without deadlocks. Then a random graph model to find the deadlock probability of each transaction is proposed. Finally, the above two models are integrated, so that given the transaction arrival rate, the response time and the effective throughput can be calculated.