ppxscal/embedding_network huggingface dataset:
On Modeling Cost Functions for Object-Oriented Databases
Authors: Elisa Bertino, Paola Foscoli
Venue: IEEE Transactions on Knowledge and Data Engineering (1997)

In this paper, we present a set of parameters able to exactly model topologies of object references in object-oriented databases. These parameters are important since they are used to model query execution strategy costs for optimization. The model we present considers also the cases of multivalued attributes and null references. Moreover, a set of derived parameters are introduced and their mathematical derivations are shown. These derived parameters are important, since they allow selectivity of nested predicates to be estimated. Moreover, they are used in estimating storage, access, and update costs for a number of access structures specifically tailored to efficiently support object-oriented queries.
Molecular control of the threshold voltage of an NMOS Inversion layer
Authors: Jinman Yang, T. J. Thornton, M. Kozicki, L. de la Garza, D. Gust
Venue: Microelectronic Engineering (2002)

We have developed a hybrid molecular-MOSFET structure that is sensitive to the presence of a molecular monolayer attached to its surface. The device is fabricated from a silicon-on-insulator wafer and we use a substrate voltage, Vsub, to invert the buried Si:SiO2 interface. This allows the top surface of the silicon to be free of any insulating layers, apart from a thin native oxide that forms on exposure to air. The buried inversion layer is only a few hundred angstroms away from the exposed surface, and the threshold voltage of the device, Vth, is strongly influenced by the surface potential. A spiropyran monolayer is attached to the surface of the device by means of carboxylic-SiO2 bonding. After attachment of the monolayer, the threshold voltage of the device shifts to more negative values. We explain this result in terms of an increase in the concentration of fixed positive charge at the upper Si:SiO2 interface due to protonation of the surface by the molecular monolayer.
Representation and Processing of Structures with Binary Sparse Distributed Codes
Authors: Dmitri A. Rachkovskij
Venue: IEEE Transactions on Knowledge and Data Engineering (2001)

The schemes for compositional distributed representations include those allowing on-the-fly construction of fixed dimensionality codevectors to encode structures of various complexity. Similarity of such codevectors takes into account both structural and semantic similarity of represented structures. In this paper, we provide a comparative description of sparse binary distributed representation developed in the framework of the associative-projective neural network architecture and the more well-known holographic reduced representations of Plate and binary spatter codes of Kanerva. The key procedure in associative-projective neural networks is context-dependent thinning which binds codevectors and maintains their sparseness. The codevectors are stored in structured memory array which can be realized as distributed auto-associative memory. Examples of distributed representation of structured data are given. Fast estimation of the similarity of analogical episodes by the overlap of their codevectors is used in the modeling of analogical reasoning both for retrieval of analogs from memory and for analogical mapping.
Self-Checking Comparator with One Periodic Output
Authors: S. Kundu, E. s. Sogomonyan, M. Goessel, S. Tarnick
Venue: IEEE Transactions on Computers (1996)

In this paper we propose a new self-checking comparator with one periodic output. The comparator can be used as a two-rail checker or as an equality checker. Two different input patterns are sufficient to detect all the faults considered.
Some Remarks on the Semantics of FIPA's Agent Communication Language
Authors: Jeremy Pitt, Abe Mamdani
Venue: Autonomous Agents and Multi-Agent Systems (1999)

The Foundation for Intelligent Physical Agents (FIPA) standardisation body has produced a set of specifications outlining a generic model for the architecture and operation of agent-based systems. The FIPA'97 Specification Part 2 is the normative specification of an Agent Communication Language (ACL) which agents use to &lsquo;talk&rsquo; to each other. The FIPA ACL is based on speech act theory. Its syntax is defined by performatives parameterised by attribute value pairs, while its semantics is given in terms of the mental states of the communicating agents (i.e. intentionality). However, it is not clear if the formal semantics is meant as a normative or informative specification. The primary purpose of this paper is then to give an expository analysis of the FIPA ACL semantics to clarify this situation. We also offer some guidelines motivated from our own analysis, experience and understanding of how the semantic definitions and logical axioms should be interpreted and applied. However, our conclusion is that while the FIPA ACL specification offers significant potential to a developer using it for guidance, there are limitations on using an agent's mental state to specify the meaning of a performative as part of a normative standard. We consider some possibilities for making improvements in this direction.
The Universal-Relation Data Model for Logical Independence
Authors: Moshe Y. Vardi
Venue: IEEE Software (1988)

The universal-relation model is introduced, and its fundamental ideas are outlined. This model keeps access-path independence by removing the need for logical navigation among relations. One benefit is a simple yet powerful query-language interface. Two universal-relation database-management systems are discussed that provide good examples of the model: System/U, developed at Stanford University, and FIDL, developed at International Computers Ltd. in Britain.
Performance Analysis and Its Impact on Design
Authors: Pradip Bose, Thomas M. Conte
Venue: Computer (1998)

Gone are the days when one or two expert architects would use hunches, experience, and rules of thumb to determine a processor's features. Marketplace competition has long since forced companies to replace this ad hoc process with a targeted and highly systematic process that focuses new designs on specific workloads. At the core of these processes are models of the processor's performance and its workloads. Developing and verifying these models is the domain now called performance analysis. However, a systematic design process has some disadvantages because it can constrain the diversity and accuracy of the workloads we can measure. These are hot problems in performance analysis. In this article, the authors describe the advances in performance analysis over the last decade, focusing on architectural performance. They predict that the industry will soon need new simulation methods to accommodate future processors. Researchers have presented some of these advanced simulation methodologies at past workshops on Performance Analysis and its Impact on Design (PAID) workshops. This articleýa tutorialýis the one of three articles in this issue about performance analysis. It is accompanied by articles based on presentations from last year's workshop. Although the PAID workshops focus on computer (hardware- software) systems, these techniques are in many ways universal and adaptable to the analysis of other performance-critical systems.
Spoken Language Recognition on a DSP Array Processor
Authors: S. Glinski, D. Roe
Venue: IEEE Transactions on Parallel and Distributed Systems (1994)

A new architecture is presented to support the general class of real-timelarge-vocabulary speaker-independent continuous speech recognizers incorporatinglanguage models. Many such recognizers require multiple high-performance centralprocessing units (CPU's) as well as high interprocessor communication bandwidth. Thisarray processor provides a peak CPU performance of 2.56 giga-floating point operationsper second (GFLOPS) as well as a high-speed communication network. In order toefficiently utilize these resources, algorithms were devised for partitioning speech modelsfor mapping into the array processor. Also, a novel scheme is presented for a functionalpartitioning of the speech recognizer computations. The recognizer is functionallypartitioned into six stages, namely, the linear predictive coding (LPC) based featureextractor, mixture probability computer, (phone) state probability computer, wordprobability computer, phrase probability computer, and traceback computer. Each ofthese stages is further subdivided as many times as necessary to fit the individualprocessing elements (PE's). The functional stages are pipelined and synchronized with the frame rate of the incoming speech signal. This partitioning also allows a multistage stack decoder to be implemented for reduction of computation.
Enhanced Iterative-Deepening Search
Authors: A. Reinefeld, T. A. Marsland
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1994)

Iterative-deepening searches mimic a breadth-first node expansion with a series of depth-first searches that operate with successively extended search horizons. They have been proposed as a simple way to reduce the space complexity of best-first searches like A* from exponential to linear in the search depth. But there is more to iterative-deepening than just a reduction of storage space. As the authors show, the search efficiency can be greatly improved by exploiting previously gained node information. The information management techniques considered here owe much to their counterparts from the domain of two-player games, namely the use of fast-execution memory functions to guide the search. The authors' methods not only save node expansions, but are also faster and easier to implement than previous proposals.
Towards a Reference Model for Surveying Mobile Agent Systems
Authors: Alberto Rodrigues Silva, Artur Romão, Dwight Deugo, Miguel Mira Da Silva
Venue: Autonomous Agents and Multi-Agent Systems (2001)

There are increasing numbers of systems and research projects involving software agents and mobile agents. However, there is no reference model or conceptual framework to compare the resulting systems. In this paper, we propose a reference model to identify, classify and evaluate mobile agent systems having a significant set of non-trivial architectural issues and technical and functional features in order to support agent-based applications. Our proposed reference model describes a generic and global architecture and identifies a set of technical and functional features. The items analyzed include the following: execution, management of agent types, management of identifiers, persistence, navigation, communication, interaction with external resources, and security. We apply this reference model to analyze, compare, and discuss some well-known mobile agent systems: Telescript, Aglets, ffMain, D'Agents, and AgentSpace.
Design and Test Education in Latin America
Venue: IEEE Design Test (2002)

The Latin American Test Workshop, held recently in Montevideo, Uruguay, was the occasion for the IEEE Design & Test roundtable on design and test education in Latin America. The roundtable discussions focused on undergraduate and graduate design and test edu-cation, industrial partnerships, and collaborative research with other parts of the international community. Much of the participants' discussion revolved around the educational requirements for design-and-test engineering skills that industry urgently needs and how to best meet those requirements.
Effect of Data Skewness and Workload Balance in Parallel Data Mining
Authors: D. W. Cheung, S. D. Lee, V. Xiao
Venue: IEEE Transactions on Knowledge and Data Engineering (2002)

To mine association rules efficiently, we have developed a new parallel mining algorithm FPM on a distributed share-nothing parallel system in which data are partitioned across the processors. FPM is an enhancement of the FDM algorithm, which we previously proposed for distributed mining of association rules. FPM requires fewer rounds of message exchanges than FDM and, hence, has a better response time in a parallel environment. The algorithm has been experimentally found to outperform CD, a representative parallel algorithm for the same goal. The efficiency of FPM is attributed to the incorporation of two powerful candidate sets pruning techniques: distributed and global prunings. The two techniques are sensitive to two data distribution characteristics, data skewness, and workload balance. Metrics based on entropy are proposed for these two characteristics. The prunings are very effective when both the skewness and balance are high. In order to increase the efficiency of FPM, we have developed methods to partition a database so that the resulting partitions have high balance and skewness. Experiments have shown empirically that our partitioning algorithms can achieve these aims very well, in particular, the results are consistently better than a random partitioning. Moreover, the partitioning algorithms incur little overhead. So, using our partitioning algorithms and FPM together, we can mine association rules from a database efficiently.
Mondrian memory protection
Authors: Emmett Witchel, Josh Cates, Krste Asanović
Venue: Proceedings of the 10th international conference on Architectural support for programming languages and operating systems (2002)

Mondrian memory protection (MMP) is a fine-grained protection scheme that allows multiple protection domains to flexibly share memory and export protected services. In contrast to earlier page-based systems, MMP allows arbitrary permissions control at the granularity of individual words. We use a compressed permissions table to reduce space overheads and employ two levels of permissions caching to reduce run-time overheads. The protection tables in our implementation add less than 9% overhead to the memory space used by the application. Accessing the protection tables adds than 8% additional memory references to the accesses made by the application. Although it can be layered on top of demand-paged virtual memory, MMP is also well-suited to embedded systems with a single physical address space. We extend MMP to support segment translation which allows a memory segment to appear at another location in the address space. We use this translation to implement zero-copy networking underneath the standard read system call interface, where packet payload fragments are connected together by the translation system to avoid data copying. This saves 52% of the memory references used by a traditional copying network stack.
Managing the US Navy's First OO Digital Mapping Project
Authors: Kevin Shaw, Maria Cobb, Miyi Chung, David Arctur
Venue: Computer (1996)

In the late 1980s the Defense Mapping Agency began converting their paper maps into digital format. A military standard known as Vector Product Format emerged as the format for storing digital vector data. The VPF relational data model, however, has problems representing complex spatial data. In 1991, the US Navy, a DMA database user, began investigating how object technology could improve its digital maps. This research led to the development of the Object Vector Product Format, an object-oriented approach to viewing and editing digital maps and charts. By combining multiple relational databases into a single OO database, OVPF offers users such key advantages as the ability to immediately update and modify the content of the original data. Over the course of developing OVPF we have also learned some valuable lessons about managing OO projects. Our experiences have given us insight into some important risk-management techniques, including how to manage the expectations of decision-makers and sponsors and how to implement effective training methods. anaging the OVPF project was much more rewarding than most due to the greatly increased productivity offered by an OO approach.
Overcoming Superstrictness in Line Drawing Interpretation
Authors: L. Ros, F. Thomas
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (2002)

This paper presents a new algorithm for correcting incorrect line drawings¿incorrect projections of a polyhedral scene. Such incorrect drawings arise, e.g., when an image of a polyhedral world is taken, the edges and vertices are extracted, and a drawing is synthesized. Along the way, the true positions of the vertices in the 2D projection are perturbed due to digitization errors and the preprocessing. As most available algorithms for interpreting line drawings are ¿superstrict,¿ they judge these noisy inputs as incorrect and fail to reconstruct a three-dimensional scene from them. The presented method overcomes this problem by moving the positions of all vertices until a very close correct drawing is found. The closeness criterion is to minimize the sum of squared distances from each vertex in the input drawing to its corrected position. With this tool, any superstrict method for line drawing interpretation is now practical, as it can be applied to the corrected version of the input drawing.
Bandwidth tradeoff between TCP and link-level FEC
Authors: Chadi Barakat, Eitan Altman
Venue: Computer Networks: The International Journal of Computer and Telecommunications Networking (2002)

Forward error correction (FEC) is widely used for the improvement of the quality of noisy transmission media as wireless links. This improvement is of importance for a transport protocol as TCP which uses the loss of packets as an indication of network congestion. FEC shields TCP from losses not caused by congestion and helps it to improve its throughput but on the other hand it consumes a part of the available bandwidth that could be used by TCP. In this paper we study in detail this bandwidth tradeoff between TCP and FEC. By analysis and simulations we show how TCP performance varies as a function of the amount of FEC.
Semiconductor Research Corporation: Taking Moore's Law Into the Next Century
Authors: Scott Hamilton
Venue: Computer (1999)

The Semiconductor Research Corp. is one of the few organizations to get fierce competitors like Intel, Motorola, and IBM to the same table, let alone cooperate. And it has also wrangled money- $37 million annually-from these companies and others. With this money, it funds future research to keep the engines of semiconductor production churning. In short, the SRC is bent on taking Moore's law into the next century by coordinating "precompetitive" academic research to meet industry's needs. Together with its sister organizations- the Semiconductor Industry Association and Sematech-SRC helps chart and promote the continued progress of the semiconductor industry. Their main tool for doing so is the National Technology Roadmap for Semiconductors. Published every two years, this document outlines research areas that need attention so that the industry can maintain the pace of semiconductor production. This article discusses two of those areas- interconnects, and design and test-in depth.
An Execution-Backtracking Approach to Debugging
Authors: Hiralal Agrawal, Richard A. DeMillo, Eugene H. Spafford
Venue: IEEE Software (1991)

Spyder, a system for selective checkpointing of computational sequences, is presented. It lets users backtrack from checkpoints without the need to reexecute the program to reach recent prior states. In contrast to more comprehensive (and storage-intensive) checkpointing schemes, backtracking in this approach is constrained to limit storage requirements. The resulting debugger offers a structured view of dynamic events, similar to lexical scope rules' effect on static visibility. The debugger also speeds backtracking to statements before loops and provides what-if capabilities.
Induction, Domains, Calculi: Strachey's Contributions to Programming-Language Engineering
Authors: David A. Schmidt
Venue: Higher-Order and Symbolic Computation (2000)

In collaboration with his colleagues at Oxford, Christopher Strachey pioneered the analysis of programming languages in terms of semantic features. Three of Strachey's contributions&mdash;inductive definition of semantics, semantic-domain definitions, and calculi for semantic description&mdash;are presented, and their consequences on languages research are described. Strachey's impact, present and future, on the computer programming &ldquo;mainstream&rdquo; is also outlined.
Optimal bounded disorder
Authors: Ricardo A. Baeza-Yates, Héctor Soza-Pollman
Venue: Information Processing Letters (2002)

In this paper we present for the Bounded Disorder file organization a model that relates the secondary overflow bucket size to the primary bucket size of the data nodes (supposedly different from that of overflow) and the whole size of a data node, by considering the tree index, This result is obtained by minimizing the cost of inserting data into the structure and enables to compute the optimal overflow bucket size. Both the normal and partial expansion cases are considered and a model for the optimal relation of the parameters involved is developed.
On Concurrency Control in Multidatabase Systems with an Extended Transaction Model
Authors: Kamel Barkaoui, Rabah Benamara
Venue: The Journal of Supercomputing (2003)

A major concurrency control problem that we have to cope in multidatabase systems is the global deadlock detection and resolution problem. This detection must take into account the autonomy of local systems, which make impossible the visibility of the state of local transactions. A well-known approach to detect such deadlocks, called potential global deadlocks, is one based on the potential conflict graph (PCG) appropriate for the multidatabase transaction model with a global commit protocol. This classical transaction model is very constraining for applications manipulating great volumes of information, and where subtransaction terminations (commit or abort) of global transactions are not totally dependant. In this paper we present an effective potential global deadlock characterization, and an efficient potential global deadlock detection algorithm, in multidatabase systems with an extended transaction model more suited for such applications.
Incremental Syntactic Parsing of Natural Language Corpora with Simple Synchrony Networks
Authors: Peter C. R. Lane, James B. Henderson
Venue: IEEE Transactions on Knowledge and Data Engineering (2001)

This article explores the use of Simple Synchrony Networks (SSNs) for learning to parse English sentences drawn from a corpus of naturally occurring text. Parsing natural language sentences requires taking a sequence of words and outputting a hierarchical structure representing how those words fit together to form constituents. Feed-forward and Simple Recurrent Networks have had great difficulty with this task, in part because the number of relationships required to specify a structure is too large for the number of unit outputs they have available. SSNs have the representational power to output the necessary $O(n^2)$ possible structural relationships because SSNs extend the $O(n)$ incremental outputs of Simple Recurrent Networks with the $O(n)$ entity outputs provided by Temporal Synchrony Variable Binding. This article presents an incremental representation of constituent structures which allows SSNs to make effective use of both these dimensions. Experiments on learning to parse naturally occurring text show that this output format supports both effective representation and effective generalization in SSNs. To emphasize the importance of this generalization ability, this article also proposes a short-term memory mechanism for retaining a bounded number of constituents during parsing. This mechanism improves the $O(n^2)$ speed of the basic SSN architecture to linear time, but experiments confirm that the generalization ability of SSN networks is maintained.