ppxscal/embedding_network huggingface dataset:
Screen management in the &ldquo;real world&rdquo;
Authors: Edmund W. Stawick
Venue: ACM SIGAPL APL Quote Quad (1987)

An application-based screen management system was developed in APL for a mainframe-based interactive database. It requires no special hardware or software support and therefore runs on any asynchronous communications device. The system includes features unique to most on-line databases yet common to many screen-oriented PC systems. The foundation of the design is the division of all report information into discrete, logical sections. By dividing a report in this way and by providing the user with a powerful set of commands to allow movement both between and within these logical sections, one achieves a very flexible and user-friendly interface.
Unification problems with one-sided distributivity
Authors: Erik Tiden, Stefan Arnborg
Venue: Journal of Symbolic Computation (1987)

This work is a study of unification in some equational theories that have a one-sided distributivity axiom: x x (y + z) = x x y + x x z. First one-sided distributivity, the theory which has only this axiom, is studied. It is shown that, although one-sided distributivity is a simple theory in many ways, its unification problem is not trivial, and known universal unification procedures fail to provide a decision procedure for it. We give a unification procedure based on a process of decomposition combined with a generalized occurs check, which may be applied in any permutative theory, and another test. These tests together ensure termination. Next, we show that unification is undecidable if the laws of associativity x + (y + z) = (x + y) + z and a one-sided unit element x x 1 = x are added to one-sided distributivity. Unification under one-sided distributivity with (one-sided) unit element is shown to be as hard as Markov's problem (associative unification), whereas unification under two-sided distributivity, with or without unit element, is NP-hard. The study of these problems is motivated by possible applications in circuit synthesis and by the need for gaining insight in the problem of combining theories with overlapping sets of operator symbols.
Functional abstraction from structure in VLSI simulation models
Authors: R. H. Lathrop, R. J. Hall, R. S. Kirk
Venue: Proceedings of the 24th ACM/IEEE Design Automation Conference (1987)

High-level functional (or behavioral) simulation models are difficult, time-consuming, and expensive to develop. We report on a method for automatically generating the program code for a high-level functional simulation model. The high-level model is produced directly from the program code for the circuit components' functional models and a netlist description of their connectivity. A prototype has been implemented in LISP for the SIMMER functional simulator.
Predictive test compression by hashing
Authors: T. Raita, J. Teuhola
Venue: Proceedings of the 10th annual international ACM SIGIR conference on Research and development in information retrieval (1987)

The knowledge of a short substring constitutes a good basis for guessing the next character in a natural language text. This observation, i.e. repeated guessing and encoding of subsequent characters, is very fundamental for the predictive text compression. The paper describes a family of such compression methods, using a hash table for searching the prediction information. The experiments show that the methods produce good compression gains and, moreover, are very fast. The one-pass versions are especially apt for &ldquo;on-the-fly&rdquo; compression of transmitted data, and could be a basis for specialized hardware.
Survey of educational programs in medical information science
Authors: John P Glaser, Jane Edgar
Venue: ACM SIGMICRO Newsletter (1987)

The behavior of a VLSI device can be expressed in occam, a language based on communicating processes. It is then possible to establish that the design behaves as intended, by simulation and by proof techniques using the formal semantics of occam. Finally, the occam source can be directly compiled into correct silicon layout.
APL extensions&mdash;a users view
Authors: Maurice H. Jordan
Venue: Proceedings of the international conference on APL: APL in transition (1987)

There has been much heated argument about extensions in APL. This paper reflects 5 years' experience with one brand of extensions (STSC's nested array system). Useful and irritating features are discussed. Facilities available are compared with other implementations - APL2, Dyalog, and IPSA. Topics covered include event handling, file systems, strand notation, indexing, the each dual and rank operators, and interfaces to other languages. The paper is illustrated with examples drawn from code produced internally, and from VECTOR competitions.
Simulation of a computer with variable hardware and variable instruction set
Authors: S. DasGupta, H. Chang
Venue: Proceedings of the 20th annual symposium on Simulation (1987)

Parallel processing systems are used today in many applications such as in vision, robotics, real-time processes etc. It is therefore important to develop simulators to aid automated design of parallel-processing systems. This Paper discusses development of a Meta-simulator for simulating and analyzing such systems. This could form a part of a general multi-processor system CAD package. The statistical results derived using the simulator can be used to generate Reduced Instruction Set Computing (RISC) elements providing reduced hardware complexity and improved overall system performance. Two methods of implementation - namely using, Instruction Set Processing Specification, ISPS and High Level Language, C are reviewed and compared. Evaluation of candidate architectures requires use of high level and assembly languages for writing benchmark programs for the simulator. We therefore discuss the notion of Meta-Assembler and Meta-Compiler also.
A hierarchical boundary model for solid object representation
Authors: Leila De Floriani, Bianca Falcidieno
Venue: ACM Transactions on Graphics (TOG) (1988)

A new hierarchical model for solid object representation is described. This model, called a hierarchical face adjacency hypergraph (HFAH), is based on a relational description of the object boundary, called a face adjacency hypergraph (FAH), which considers faces as the primary topological entities defining the object boundary. The HFAH consists of a hierarchy of FAHs describing the decomposition of the boundary of an object into form features. In this paper the HFAH is described together with its internal encoding structure. Two basic transformations, called refinement and abstraction, are defined on the hierarchical model; these allow effective and efficient modifications of the hierarchical boundary model.
A theory of intersection anomalies in relational database schemes
Authors: Catriel Beeri, Michael Kifer
Venue: Journal of the ACM (JACM) (1987)

The desirability of acyclic database schemes is well argued in [8] and [13]. For schemas described by multivalued dependencies, acyclicity means that the dependencies do not split each other's left-hand sides and do not form intersection anomalies. In a recent work [4] it is argued that real-world database schemes always meet the former requirement, and in [5] it is shown that any given real-world scheme can be made to satisfy also the latter requirement, after being properly extended. However, the method of elimination of intersection anomalies proposed in [5] is intrinsically nondeterministic&mdash;an undesirable property for a design tool. In the present work it is shown that this nondeterminism does not, however, affect the final result of the design process. In addition, we present an efficient deterministic algorithm, which is equivalent to the nondeterministic process of [5]. Along the way a study of intersection anomalies, which is interesting in its own right, is performed.
Optimization on networks
Authors: D. Binger
Venue: ACM SIGSAM Bulletin (1987)

The project is to use PROLOG to solve an optimization problem on a network. A brief introduction to networks includes the definitions necessary for the description of the optimal flow algorithm, which uses the painted network algorithm as a subroutine. An implementation of the painted network algorithm in PROLOG is given.
On the complexity of join dependencies
Authors: Marc Gyssens
Venue: ACM Transactions on Database Systems (TODS) (1986)

In [10] a method is proposed for decomposing join dependencies (jds) in a relational database using the notion of a hinge. This method was subsequently studied in [11] and [12]. We show how the technique of decomposition can be used to make integrity checking more efficient. It turns out that it is important to find a decomposition that minimizes the number of edges of its largest element. We show that the decompositions obtained with the method described in [10] are optimal in this respect. This minimality criterion leads to the definition of the degree of cyclicity, which allows us to classify jds and leads to the notion of n-cyclicity, of which acyclicity is a special case for n = 2. We then show that, for a fixed value of n (which may be greater than 2). integrity checking can be performed in polynomial time provided we restrict ourselves to n-cyclic jds. Finally, we generalize a well-known characterization for acyclic jds by proving that n-cyclicity is equivalent to &ldquo;n-wise consistency implies global consistency.&rdquo; As a consequence, consistency checking can be performed in polynomial time if we restrict ourselves to n-cyclic jds, for a tired value of n, not necessarily equal to 2.
Multiprocessor cache design considerations
Authors: R. L. Lee, P. C. Yew, D. H. Lawrie
Venue: Proceedings of the 14th annual international symposium on Computer architecture (1987)

In this paper, cache design is explored for large high-performance multiprocessors with hundreds or thousands of processors and memory modules interconnected by a pipe-lined multi-stage network. The majority of the multiprocessor cache studies in the literature exclusively focus on the issue of cache coherence enforcement. However, there are other characteristics unique to such multiprocessors which create an environment for cache performance that is very different from that of many uniprocessors. Multiprocessor conditions are identified and modeled, including, 1) the cost of a cache coherence enforcement scheme, 2) the effect of a high degree of overlap between cache miss services, 3) the cost of a pin limited data path between shared memory and caches, 4) the effect of a high degree of data prefetching, 5) the program behavior of a scientific workload as represented by 23 numerical subroutines, and 6) the parallel execution of programs. This model is used to show that the cache miss ratio is not a suitable performance measure in the multiprocessors of interest and to show that the optimal cache block size in such multiprocessors is much smaller than in many uniprocessors.
Worldview: An Integrated Geometric-Modeling/ Drafting System
Authors: Yehuda E. Kalay
Venue: IEEE Computer Graphics and Applications (1987)

Worldview is a computer-aided architectural and engineering design system that combines the power of geometric modeling utilities with the intuitive design and communication capabilities of drafting utilities. This article describes the basic design concepts and implementation of the system, achieved by representing the designed artifact nonredundantly in a three-dimensional "world" and manipulating it through multiple two-dimensional "viwes." The world consists of a collection of shapes that store all the formative information pertinent to the designed artifact, while the views consist of images of selected shapes, generated through particular two-way mapping transforms. Several views that dapict the same set of shapes through different transforms can be displayed simultaneously, using multiple, dynamic, user-defined windows, thereby enabling addressability of points in the 3D world. Views also include such design and communication aids as dimension lines, construction lines, annotations, and graphic symbols to enhance the visual content of the images without encumbering the representation of the shapes themselves. Modifications applied to the shapes through any view are immediately apparent in all other views in which the shapes are imaged. The shapes are represented by a data structure based on the hybrid-edge data model, which facilites the integration of points, lines, surfaces, and volumetric bodies into one formative hierarchy. The integration of drafting and modeling simplifies the use of powerful modeling utilities by designers, facilitates the communication of the designed artifact, and enhances the integrity of the design as a whole.
Fourth annual UCLA survey of business school computer usage
Authors: Jason, L. Frand, Julia, A. Britt, John, E. Anderson, Ephraim, R. McLean
Venue: Communications of the ACM (1988)

The Fourth Survey is based upon data from 128 AACSB-accredited business schools. It provides a wide variety of information to deans and others involved in making computer related strategic decisions, resource allocations, and program plans.
Real-time shaded NC milling display
Authors: Tim Van Hook
Venue: ACM SIGGRAPH Computer Graphics (1986)

The real-time shaded display of a solid model being milled by a cutting tool following an NC path is attained by the image-space Boolean subtraction of solid objects. The technique is suitable for implementation in microcode in a raster graphic display processor. Update rates of 10 cutting operations per second are typical.
Machine-independent virtual memory management for paged uniprocessor and multiprocessor architectures
Authors: Richard Rashid, Avadis Tevanian, Michael Young, David Golub, Robert Baron, David Black, William Bolosky, Jonathan Chew
Venue: ACM SIGARCH Computer Architecture News (1987)

This paper describes the design and implementation of virtual memory management within the CMU Mach Operating System and the experiences gained by the Mach kernel group in porting that system to a variety of architectures. As of this writing, Mach runs on more than half a dozen uniprocessors and multiprocessors including the VAX family of uniprocessors and multiprocessors, the IBM RT PC, the SUN 3, the Encore MultiMax, the Sequent Balance 21000 and several experimental computers. Although these systems vary considerably in the kind of hardware support for memory management they provide, the machine-dependent portion of Mach virtual memory consists of a single code module and its related header file. This separation of software memory management from hardware support has been accomplished without sacrificing system performance. In addition to improving portability, it makes possible a relatively unbiased examination of the pros and cons of various hardware memory management schemes, especially as they apply to the support of multiprocessors.
An Approach to the Modeling of Software Testing with Some Applications
Authors: Thomas Downs
Venue: IEEE Transactions on Software Engineering (1985)

In this paper, an approach to the modeling of software testing is described. A major aim of this approach is to allow the assessment of the effects of different testing (and debugging) strategies in different situations. It is shown how the techniques developed can be used to estimate, prior to the commencement of testing, the optimum allocation of test effort for software which is to be nonuniformly executed in its operational phase. In addition, the question of application of statistical models in cases where the data environment undergoes changes is discussed. Finally, two models are presented for the assessment of the effects of imperfections in the debugging process.
A process specification of expert lawyer reasoning
Authors: D. P. O'Neil
Venue: Proceedings of the 1st international conference on Artificial intelligence and law (1987)

The ability to think like a lawyer is an often heard phrase but a vaguely understood phenomena. What is lawyer reasoning? Does it differ from reasoning in other fields and disciplines? This paper begins to answer these questions by explicating the problem solving and reasoning processes of an experienced practicing attorney and law professor in the field of housing law. A particularly noteworthy finding of these investigations involves the subject's construction and use of &ldquo;component&rdquo; mental models and &ldquo;stories&rdquo;. The active construction of mental models and the coherence of stories comprise the expert's problem solving and ald indexing and retrieval of legal theories from previous case experiences in episodic memory. These characteristics have strong architectural consequences for the use of artificial intelligence tools and techniques in law. Parallels are drawn between the approach taken in this study of lawyer reasoning and the growing body of research on &ldquo;mental models&rdquo;. Current efforts aimed at specifying the conceptual differences between novice and expert practitioners are outlined.
Automatic decomposition of scientific programs for parallel execution
Authors: r. Allen, D. Callahan, K. Kennedy
Venue: Proceedings of the 14th ACM SIGACT-SIGPLAN symposium on Principles of programming languages (1987)

An algorithm for transforming sequential programs into equivalent parallel programs is presented. The method concentrates on finding loops whose separate iterations can be run in parallel without synchronization. Although a simple version of the method can be shown to be optimal, the problem of generating optimal code when loop interchange is employed is shown to be intractable. These methods are implemented in an experimental translation system developed at Rice University.
The distributed deadlock detection algorithm
Authors: D. Z. Badal
Venue: ACM Transactions on Computer Systems (TOCS) (1986)

We propose a distributed deadlock detection algorithm for distributed computer systems. We consider two types of resources, depending on whether the remote resource lock granularity and mode can or cannot be determined without access to the remote resource site. We present the algorithm, its performance analysis, and an informal argument about its correctness. The proposed algorithm has a hierarchical design intended to detect the most frequent deadlocks with maximum efficiency.
Monotone versus positive
Authors: Miklos Ajtai, Yuri Gurevich
Venue: Journal of the ACM (JACM) (1987)

In connection with the least fixed point operator the following question was raised: Suppose that a first-order formula P(P) is (semantically) monotone in a predicate symbol P on finite structures. Is P(P) necessarily equivalent on finite structures to a first-order formula with only positive occurrences of P? In this paper, this question is answered negatively. Moreover, the counterexample naturally gives a uniform sequence of constant-depth, polynomial-size, monotone Boolean circuits that is not equivalent to any (however nonuniform) sequence of constant-depth, polynomial-size, positive Boolean circuits.
Notions of dependency satisfaction
Authors: Marc H. Graham, Alberto O. Mendelzon, Moshe Y. Vardi
Venue: Journal of the ACM (JACM) (1986)

Two notions of dependency satisfaction, consistency and completeness, are introduced. Consistency is the natural generalization of weak-instance satisfaction and seems appropriate when only equality-generating dependencies are given, but disagrees with the standard notion in the presence of tuple-generating dependencies. Completeness is based on the intuitive semantics of tuple-generating dependencies but differs from the standard notion for equality-generating dependencies. It is argued that neither approach is the correct one, but rather that they correspond to different policies on constraint enforcement, and each one is appropriate in different circumstances. Consistency and completeness of a state are characterized in terms of the tableau associated with the state and in terms of logical properties of a set of first-order sentences associated with the state. A close relation between the problems of testing for consistency and completeness and of testing implication of dependencies is established, leading to lower and upper bounds for the complexity of consistency and completeness. The possibility of formalizing dependency satisfaction without using a universal relation scheme is examined.
Generalized fisheye views
Authors: G. W. Furnas
Venue: ACM SIGCHI Bulletin (1986)

In many contexts, humans often represent their own &ldquo;neighborhood&rdquo; in great detail, yet only major landmarks further away. This suggests that such views (&ldquo;fisheye views&rdquo;) might be useful for the computer display of large information structures like programs, data bases, online text, etc. This paper explores fisheye views presenting, in turn, naturalistic studies, a general formalism, a specific instantiation, a resulting computer program, example displays and an evaluation.
Data Diversity: An Approach to Software Fault Tolerance
Authors: Paul E. Ammann, John C. Knight
Venue: IEEE Transactions on Computers (1988)

Data diversity is described, and the results of a pilot study are presented. The regions of the input space that cause failure for certain experimental programs are discussed, and data reexpression, the way in which alternate input data sets can be obtained, is examined. A description is given of the retry block which is the data-diverse equivalent of the recovery block, and a model of the retry block, together with some empirical results is presented. N-copy programming which is the data-diverse equivalent of N-version programming is considered, and a simple model and some empirical results are also given.
The Gradient Model Load Balancing Method
Authors: Frank C. H. Lin, Robert M. Keller
Venue: IEEE Transactions on Software Engineering (1987)

A dynamic load balancing method is proposed for a class of large-diameter multiprocessor systems. The method is based on the "gradient model," which entails transferring backlogged tasks to nearby idle processors according to a pressure gradient indirectly established by requests from idle processors. The algorithm is fully distributed and asynchronous. Global balance is achieved by successive refinements of many localized balances. The gradient model is formulated so as to be independent of system topology.
A new string search hardware architecture for VLSI
Authors: K. Takahashi, H. Yamada, H. Nagai, K. Matsumi
Venue: ACM SIGARCH Computer Architecture News (1986)

This paper presents a new architecture for practical string search hardware design. This architecture is based on the finite state automaton design concept using a character control charge transfer model. The resultant hardware is a set of programmable sequential logic (PSL) circuits, each of which consists of a sequential logic and memory parts. The logic part is an array of logical gates, each of which is controlled by the read-out signal from the memory part, to connect the flip-flops. The memory part stores each variable-length pattern string character on a bit line by bit line basis. Then, several pattern strings in the memory part can be compared with the serial input data string in parallel, even at a non-anchor mode and an approximate matching mode. This new hardware can be easily implemented in an LSI chip, which allows 8192 pattern string storage using 1 Mb RAM cells.
Computing systems' defenses
Authors: Stanley A Kurban
Venue: ACM SIGSAC Review (1986)

In 1983, teenagers used computers in their homes to look at and modify data in computers thousands of miles away. Reports of these incidents, television dramas, and the movie "WarGames" have all aroused interest in the subject of how and how effectively computing systems' defenses withstand attacks by unauthorized individuals. The subject is of more than passing concern.