ppxscal/embedding_network huggingface dataset:
Exploiting context to support social awareness and social navigation
Authors: Keith Cheverst, Keith Mitchell, Nigel Davies, Gareth Smith
Venue: ACM SIGGROUP Bulletin (2000)

The utilization of context (such as user location and user profile) opens up many new avenues for encouraging social interaction. The web-based GUIDE system enables visitors to the city of Lancaster to interact with an information model that represents the city via a hand-held and context-aware tourist guide. Our current work is focusing on extending the functionality of the (previously single user) GUIDE system by making parts of the information model public. In particular, the physical location of visitors can now be represented in the information space in order to enable a form of social awareness among city visitors. In addition, visitors can also change the information space by, for example, augmenting existing descriptions of the city's attractions with their own ratings. We believe that explicitly capturing and tagging the context associated with ratings provides a powerful mechanism for automatically tailoring information presented to the user.
Detecting Corrupted Pages in M Replicated Large Files
Authors: F. k. Hwang, Wenan Zang
Venue: IEEE Transactions on Parallel and Distributed Systems (1997)

A file in a distributed database system is replicated on M sites and may contain corrupted pages. Abdel-Ghaffar and El Abbadi gave a detection scheme assuming that the number of corrupted pages f
Detection and identification of potential faults via multi-level hypotheses testing
Authors: Asok Ray, Shashi Phoha
Venue: Signal Processing (2002)

This short communication formulates a recursive algorithm of multi-level hypotheses testing for real-time detection and identification of potential faults from continuous sensor signals. The usage of the recursive algorithm is illustrated on a data set of temperature sensors, collected from the Instrumentation & Control system of an operating power plant.
A parametric test method for analog components in integrated mixed-signal circuits
Authors: M. Pronath, V. Gloeckel, H. Graeb
Venue: Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design (2000)

In this paper, we present a novel approach to use test stimuli generated by digital components of a mixed-signal circuit for testing its analog components. A wavelet transform is applied to the response signal of the device under test (DUT). We will show, that in comparison to Fourier transform or no transform at all, particular properties of this transformation are advantageous for mixed-signal test and especially built-in self test.We introduce a new method for test measurement selection based on a non-deterministic parametric fault model for analog circuits. This approach allows for noise and measurement error in testing. We show, how test quality can be optimized in the presented fault model. Our test methodology is demonstrated on an analog CMOS bandpass filter.
New Redundant Representations of Complex Numbers and Vectors
Authors: J. Duprat, Y. Herreros, S. Kla
Venue: IEEE Transactions on Computers (1993)

The authors present a redundant representation for complex numbers called polygonal representation. This representation enables fast carry-free addition, in a way quite similar to the carry-free addition in signed-digit number systems and is convenient for multiplication. The technique is generalized in order to handle n-dimensional vectors.
Mining Very Large Databases
Authors: Venkatesh Ganti, Johannes Gehrke, Raghu Ramakrishnan
Venue: Computer (1999)

Established companies have had decades to accumulate masses of data about their customers, suppliers, products and services, and employees. Data mining, also known as knowledge discovery in databases, gives organizations the tools to sift through these vast data stores to find the trends, patterns, and correlations that can guide strategic decision making. Traditionally, algorithms for data analysis assume that the input data contains relatively few records. Current databases, however, are much too large to be held in main memory. To be efficient, the data-mining techniques applied to very large databases must be highly scalable. An algorithm is said to be scalable if--given a fixed amount of main memory--its runtime increases linearly with the number of records in the input database. Recent work has focused on scaling data-mining algorithms to very large data sets. In this survey, the authors describe a broad range of algorithms that address three classical data-mining problems: market basket analysis, clustering, and classification.
Highly accurate fast methods for extraction and sparsification of substrate coupling based on low-rank approximation
Authors: Joe Kanapka, Jacob White
Venue: Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design (2001)

More aggressive design practices have created renewed interest in techniques for analyzing substrate coupling problems. Most previous work has focused primarily on faster techniques for extracting coupling resistances, but has offered little help for reducing the resulting resistance matrix, whose number of nonzero entries grows quadratically with the number of contacts. Wavelet-like methods have been applied to sparsifying the resistance matrix representing the substrate coupling, but the accuracy of the method is very sensitive to the particulars of the contact layout. In this paper we show that for the substrate problem it is possible to improve considerably on the wavelet-like methods by making use of the algorithmic structure common to the fast multipole and wavelet-like algorithms, but making judicious use of low-rank approximations. The approach, motivated by the hierarchical SVD algorithm, can achieve more than an order of magnitude better accuracy for commensurate sparsity, or can achieve much better sparsity at commensurate accuracy, when compared to the wavelet-like algorithm.
Runtime vs. Manual Data Distribution for Architecture-Agnostic Shared-Memory Programming Models
Authors: Dimitrios S. Nikolopoulos, Eduard Ayguadé, Constantine D. Polychronopoulos
Venue: International Journal of Parallel Programming (2002)

This paper compares data distribution methodologies for scaling the performance of OpenMP on NUMA architectures. We investigate the performance of automatic page placement algorithms implemented in the operating system, runtime algorithms based on dynamic page migration, runtime algorithms based on loop scheduling transformations and manual data distribution. These techniques present the programmer with trade-offs between performance and programming effort. Automatic page placement algorithms are transparent to the programmer, but may compromise memory access locality. Dynamic page migration algorithms are also transparent, but require careful engineering and tuned implementations to be effective. Manual data distribution requires substantial programming effort and architecture-specific extensions to the API, but may localize memory accesses in a nearly optimal manner. Loop scheduling transformations may or may not require intervention from the programmer, but conform better to an architecture-agnostic programming paradigm like OpenMP. We identify the conditions under which runtime data distribution algorithms can optimize memory access locality in OpenMP. We also present two novel runtime data distribution techniques, one based on memory access traces and another based on affinity scheduling of parallel loops. These techniques can be used to effectively replace manual data distribution in regular applications. The results provide a proof of concept that it is possible to scale a portable shared-memory programming model up to more than 100 processors, without modifying the API and without exposing architectural details to the programmer.
Unveiling the ISCAS-85 Benchmarks: A Case Study in Reverse Engineering
Authors: Mark C. Hansen, Hakan Yalcin, John P. Hayes
Venue: IEEE Design Test (1999)

Digital designers normally proceed from behavioral specification to logic circuit; rarely do they need to go in the reverse direction. One such situation is examined here: recovering the high-level specifications of a popular set of benchmark logic circuits. The authors present their methodology and experience in reverse engineering the ISCAS-85 circuits. They also discuss a few of the practical uses of the resulting high-level benchmarks and make them available for other researchers to use.
A Study of Concurrency Control in Real-Time, Active Database Systems
Authors: A. H. Datta, S. H. Son
Venue: IEEE Transactions on Knowledge and Data Engineering (2002)

Real-Time, Active Database Systems (RTADBSs) have attracted a considerable amount of research attention in the very recent past and a number of important applications have been identified for such systems, such as telecommunications network management, automated air traffic control, automated financial trading, process control and military command, and control systems. In spite of the recognized importance of this area, very little research has been devoted to exploring the dynamics of transaction processing in RTADBSs. Concurrency Control (CC) constitutes an integral part of any transaction processing strategy and, thus, deserves special attention. In this paper, we study CC strategies in RTADBSs and postulate a number of CC algorithms. These algorithms exploit the special needs and features of RTADBSs and are shown to deliver substantially superior performance to conventional real-time CC algorithms.
Reliability Analysis of Distributed Systems Based on a Fast Reliability Algorithm
Authors: D. J. Chen, T. H. Huang
Venue: IEEE Transactions on Parallel and Distributed Systems (1992)

The reliability of a distributed processing system (DPS) can be expressed by the analysis of distributed program reliability (DPR) and distributed system reliability (DSR). One of the good approaches to formulate these reliability performance indexes is to generate all disjoint file spanning trees (FSTs) in the DPS graph such that the DPR and DSR can be expressed by the probability that at least one of these FSTs is working. In the paper, a unified algorithm to efficiently generate disjoint FSTs by cutting different links is presented, and the DPR and DSR are computed based on a simple and consistent union operation on the probability space of the FSTs. The DPS reliability related problems are also discussed. For speeding up the reliability evaluation, nodes merged, series, and parallel reduction concepts are incorporated in the algorithm. Based on the comparison of number of subgraphs (or FSTs) generated by the proposed algorithm and by existing evaluation algorithms, it is concluded that the proposed algorithm is much more economic in terms of time and space than the existing algorithms.
Products of Networks with Logarithmic Diameter and Fixed Degree
Authors: Kemal Efe, Antonio Fernández
Venue: IEEE Transactions on Parallel and Distributed Systems (1995)

This paper first analyzes some general properties of product networks pertinent to parallel architectures and then focuses on three case studies. These are products of complete binary trees, shuffle-exchange, and de Bruijn networks. It is shown that all of these are powerful architectures for parallel computation, as evidenced by their ability to efficiently emulate numerous other architectures. In particular, r-dimensional grids, and r-dimensional meshes of trees can be embedded efficiently in products of these graphs, i.e. either as a subgraph or with small constant dilation and congestion. In addition, the shuffle-exchange network can be embedded in r-dimensional product of shuffle exchange networks with dilation cost 2r and congestion cost 2. Similarly, the de Bruijn network can be embedded in r-dimensional product of de Bruijn networks with dilation cost r and congestion cost 4. Moreover, it is well known that shuffle-exchange and de Bruijn graphs can emulate the hypercube with a small constant slowdown for ¿normal¿ algorithms. This means that their product versions can also emulate these hypercube algorithms with constant slowdown. Conclusions include a discussion of many open research areas.
Scattering and Gathering Messages in Networks of Processors
Authors: S. N. Bhatt, G. Pucci, A. Ranade, A. L. Rosenberg
Venue: IEEE Transactions on Computers (1993)

The operations of scattering and gathering in a network of processors involve one processor of the network (P/sub 0/) communicating with all other processors. In scattering, P/sub 0/ sends distinct messages to P/sub 0/. The authors consider networks that are trees of processors. Algorithms for scattering messages from and gathering messages to the processor that resides at the root of the tree are presented. The algorithms are quite general, in that the messages transmitted can differ arbitrarily in length; quite strong, in that they send messages along noncolliding paths, and hence do not require any buffering or queueing mechanisms in the processors; and quite efficient in that algorithms for scattering in general trees are optimal, the algorithm for gathering in a path is optimal and the algorithms for gathering in general trees are nearly optimal. The algorithms can easily be converted using spanning trees to efficient algorithms for scattering and gathering in networks of arbitrary topologies.
Main Memory Orientated Optimization of OO Queries Using Typed Datalog with Foreign Predicates
Authors: W. Litwin, T. Risch
Venue: IEEE Transactions on Knowledge and Data Engineering (1992)

Object-oriented database systems (OODBs) have created a demand for relationally complete, extensible, and declarative object-oriented query languages. Until now, the runtime performance of such languages was far behind that of procedural OO interfaces. One reason is the internal use of a relational engine with magnetic disk resident databases. The authors address the processing of the declarative OO language WS-OSQL, provided by the fully operational prototype OODB called WS-IRIS. A WS-IRIS database is main memory (MM) resident. The system architecture, data structures, and optimization techniques are designed accordingly. WS-OSQL queries are compiled into an OO extension of Datalog called ObjectLog, providing for objects, typing, overloading, and foreign predicates for extensibility. Cost-based optimizations in WS-IRIS using ObjectLog are presented. Performance tests show that WS-IRIS is about as fast as current OODBs with procedural interfaces only and is much faster than known relationally complete systems. These results would not be possible for a traditional disk-based implementation. However, MM residency of a database appears to be only a necessary condition for better performance. An efficient optimization is of crucial importance as well.
Wavelet representation of contour sets
Authors: Martin Bertram, Daniel E. Laney, Mark A. Duchaineau, Charles D. Hansen, Bernd Hamann, Kenneth I. Joy
Venue: Proceedings of the conference on Visualization '01 (2001)

We present a new wavelet compression and multiresolution modeling approach for sets of contours (level sets). In contrast to previous wavelet schemes, our algorithm creates a parametrization of a scalar field induced by its contours and compactly stores this parametrization rather than function values sampled on a regular grid. Our representation is based on hierarchical polygon meshes with subdivision connectivity whose vertices are transformed into wavelet coefficients. From this sparse set of coefficients, every set of contours can be efficiently reconstructed at multiple levels of resolution. When applying lossy compression, introducing high quantization errors, our method preserves contour topology, in contrast to compression methods applied to the corresponding field function. We provide numerical results for scalar fields defined on planar domains. Our approach generalizes to volumetric domains, time-varying contours, and level sets of vector fields.
A Distributed Recovery Block Approach to Fault-Tolerant Execution of Application Tasks in Hypercubes
Authors: K. H. Kim, A. Kavianpour
Venue: IEEE Transactions on Parallel and Distributed Systems (1993)

An approach to fault-tolerant execution of real-time application tasks in hypercubes isproposed. The approach is based on the distributed recovery block (DRB) scheme anddoes not require special hardware mechanisms in support of fault tolerance. Each task isassigned to a pair of processors forming a DRB computing station for execution in adual-redundant and self-checking mode. Assignment of all tasks in an application in sucha form is called the full DRB mapping. The DRB scheme was developed as an approach to uniform treatment of hardware and software faults with the effect of fast forwardrecovery. However, if the system developer is concerned with hardware fault possibilitiesonly, then forming DRB stations becomes a mechanical process not burdening theapplication software designer in any way. A procedure for converting an efficientnonredundant task-to-processor mapping into an efficient full DRB mapping is presented.
Treatment of extrahepatic bile duct disease in infancy and early childhood
Authors: G. Steinau, S. Krischer, G. Staatz, A. Marx, V. Schumpelick
Venue: Technology and Health Care (2002)

Extrahepatic bile duct disease is a rare finding in infancy and early childhood. However, there is an increasing number of patients operated at this age reported in the literature. This increase may have multifactorial reasons, e.g. real increase, better ability of detection as a result of better diagnostic techniques and knowledge of predisposing factors of extrahepatic bile duct disease in childhood, especially in early childhood and infancy. The following report describes three cases of extrahepatic bile duct disease in infancy and early childhood treated at the Department of Surgery of the University of Technology in Aachen, Germany.From 1986 to 1998 28 Patients below 18 years were operated at our Department of Surgery. There was a recognizable increase of patients in 1996, 1997 and 1998. Whereas from 1986 to 1995 an average of 1.5 Cholecystectomies in pediatric patients were done, the years from 1996 to 1998 show an average of 5,33 patients operated per year. Every patient obtained a Cholecystectomy - 15 conventional open Cholecystectomies and 13 Laparoscopies, which were primarily performed in children in our clinic in 1991. Besides cholecystectomy in one case a Hepaticoenterostomy was necessary and in another case surgical treatment of the Papilla of Vater and the Common Bile Duct was performed. In 22 patients symptomatic Cholelithiasis was the indication for a Cholecystectomy. Another Patient had a gallbladder polyp consisting of heterotopic Duodenal glands, two patients showed a shock gallbladder following trauma and cardiac operation and three patients had chronic Cholecystitis without gallstones. Clinical data was collected and retrospectively reviewed. Additionally, we created a personal questionnaire to carry through a follow-up.Three Patients were less than 3 1/2 years old. The youngest patient was only 5 months old and presented with Cholelithiasis and Choledocholithiasis. Another male patient, aged 2 years received a Cholecystectomy and a Hepaticoenterostomy because of a Choledochal Cyst Type Ib (Todani-Classification). And a 3-year-old-girl had a shock gallbladder caused by thromboembolism following cardiac operation nine days before.
Determination of Coronary Failure with the Application of FFT and AR Methods
Authors: Selami Serhatlioglu, Oktay Burma, Fırat Hardalaç, İnan Güler
Venue: Journal of Medical Systems (2003)

In this study, Doppler signals recorded from the output of carotid artery of 30 patients were transferred to a personal computer (PC) by using a 16-bit sound card. Doppler difference frequencies were recorded from each of the patients, and then analyzed using fast Fourier transform (FFT) and least squares autoregressive (AR) methods to obtain their sonograms. These sonograms are then used to compare with the applied methods in terms of medical evaluation.
Large Dynamic Range Computations Over Small Finite Rings
Authors: N. M. Wigley, G. A. Jullien, D. Reaume
Venue: IEEE Transactions on Computers (1994)

Presents a new multivariate mapping strategy for the recently introduced Modulus Replication Residue Number System (MRRNS). This mapping allows computation over a large dynamic range using replications of extremely small rings. The technique maintains the useful features of the MRRNS, namely: ease of input coding; absence of a Chinese Remainder Theorem inverse mapping across the full dynamic range; replication of identical rings; and natural integration of complex data processing. The concepts are illustrated by a specific example of complex inner product processing associated with a radix-4 decimation in time fast Fourier transform algorithm. A complete quantization analysis is performed and an efficient scaling strategy chosen based on the analysis. The example processor uses replications of three rings: modulo-3, -5, and -7; the effective dynamic range is in excess of 32 b. The paper also includes very-large-scale-integration implementation strategies for the processor architecture that consists of arrays of massively parallel linear bit-level pipelines.
Processor Array Synthesis from Shift-Variant Deep Nested Do Loops
Authors: Surin Kittitornkun, Yu Hen Hu
Venue: The Journal of Supercomputing (2003)

The consolidation of Internet devices into a universal/portable device will soon be accomplishable through the incorporation of reconfigurable computing in system-on-a-chip (SOC). At any particular moment, it could be a video/audio mobile phone, an MP3 song player, and other devices. The basic construct of these multimedia processing algorithms can be described as deep nested Do loop algorithms. They are considered the most demanding data-intensive algorithms and hence ideal candidates for an array of reconfigurable nanoprocessors. Therefore, algorithm to hardware synthesis methodology is important for an efficient exploitation of both spatial parallelism and temporal pipelining. In this paper, we propose a processor array synthesis methodology. It can map an n-level nested Do loop represented by a nonuniform or shift-variant data dependence graph to a near-optimal of one-or two-dimensional processor array under the available resource constraints to satisfy high-throughput computation demands.