ppxscal/embedding_network huggingface dataset:
Parallel implementation of volume rendering on Denali graphics systems
Authors: Sheng-Yih Guan, Avi Bleiweiss, Richard Lipes
Venue: Proceedings of the 9th International Symposium on Parallel Processing (1995)

Traditional 3D graphics systems, e.g. Denali, with texture mapping capability implement the standard graphics pipeline in a pipelined parallel architecture. The systems are sufficiently powerful and flexible to support efficiently applications such as volume rendering. We discuss how Denali, manufactured by Kubota Graphics Corporation accelerates volume rendering. Volume rendering methods including maximum intensity projection and iso-surface rendering are implemented using Denali's 3D texture mapping capability. The volume rendering realization utilizes a partitioning data allocation scheme instead of a replicating approach to reduce dramatically texture memory requirements. Denali has two major parallel components: Transformation and Rasterization Modules (TRMs) and Frame Buffer Modules (FBMs). The flexible TRMs, containing a general purpose RISC processor, use object parallelism. The FBMs, containing hardware ASICs and pixel memory, use pixel parallelism. The TRMs and FBMs use dynamic and static load balancing schemes respectively to assign a roughly equal amount of computation to each parallel node.
Fast and Scalable Conflict Detection for Packet Classifiers
Authors: Florin Baboescu, George Varghese
Venue: Proceedings of the 10th IEEE International Conference on Network Protocols (2002)

Packet filters provide roles for classifying packets based on header fields. High speed packet classification has received much study. However, the twin problems of fast updates and fast conflict detection have not received much attention. A conflict occurs when two classifiers overlap, potentially creating ambiguity for packets that match both filters. For example, if Rule 1 specifies that all packets going to CNN be rote controlled and Rule 2 specifies that all packets coming from Walmart be given high priority, the roles conflict for traffic from Walmart to CNN. There has been prior work on efficient conflict detection for two dimensional classifiers. However, the best known algorithm for conflict detection for geneml classifiers is the naive O(N2) algorithm of comparing each pair of rules for a conflict. In this paper, we describe an efficient and scalable conflict detection algorithm for the general casethat is significantly faster. For example, for a database of 20,000 roles, our algorithm is 40 times faster. than the naive implementation. Even without considering conflicts, our algorithm also provides a packet classifier with fast updates and fast lookups that can be used for stateful packet filtering.
Graphical Tools for Rule Development in the Active DBMS SAMOS
Authors: Anca Vaduva, Stella Gatziu, Klaus R. Dittrich
Venue: Proceedings of the Thirteenth International Conference on Data Engineering (1997)

Summary form only given. Active database management systems (active DBMS) support the definition, management and execution of event/condition/action rules specifying reactive application behavior. Although the advantages of active mechanisms are nowadays well known, there is still no wide use in practice. One main problem is that especially for large rule sets, defined by different persons at different points in time, potential conflicts and dependencies between rules are hard to predict and rule behavior is difficult to control. Therefore, tools are needed to assist the development and maintenance of rule bases. These tools should provide for graphical interfaces supporting both, "static" activities (performed during rule specification) such as rule editing, browsing, design, rule analysis, and "dynamic" activities (performed at runtime, during the execution of an application) such as testing, debugging and understanding of rule behavior. The aim of the article is to show the use of three of these tools, namely the rule editor, the browser and the termination analyzer in the process of developing applications for the active object oriented DBMS SAMOS.
Memory organization for video algorithms on programmable signal processors
Authors: Eddy de Greef, Francky Catthoor, Hugo De Man
Venue: Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors (1995)

In this paper, several DSP system design principles are presented which are valid for a large class of memory-intensive algorithms. Our main focus lies on the optimization of the memory and I/O, since these are dominant cost factors in the domain of video and imaging applications. This has resulted in several formalizable mapping principles, which allow to prevent the memory from becoming a bottleneck. First, it as shown that for this class of applications, compile-time data caching decisions not only have a large effect on the performance, but also can have an even larger effect on the overall system cost and power consumption. This is illustrated by means of experiments in which the whole range of no cache up to large cache sizes is scanned. Next, it is shown that when enforcing constant I/O rates to reduce buffer sizes, the area gain may be far more important than the small performance decrease associated with it. A technique to achieve this in an efficient way is proposed. The main test-vehicle which is used throughout the paper to demonstrate our approach is the class of motion estimation type algorithms.
A Universal Relation Approach to Federated Database Management
Authors: J. Leon Zhao, Arie Segev, Abhirup Chatterjee
Venue: Proceedings of the Eleventh International Conference on Data Engineering (1995)

We describe a manufacturing environment where, driven by market forces, organizations cooperate as well as compete with one another. We argue that a federated database system (FDBS) is appropriate for such an environment. Contrary to conventional wisdom, complete transparency, assumed desirable and mandatory in distributed database systems, is neither desirable nor feasible in this environment. We propose a new approach that is based on schema coordination rather than integration under which each component database is free to change its data structure, attribute naming, and data semantics. A federated metadata model based on the notion of universal relation is introduced for the FDBS. We also develop the query processing paradigm, and present procedures for query transformation and heterogeneity resolution.
Face Recognition Using a Fuzzy-Gaussian Neural Network
Authors: Victor-Emil Neagoe, Iuliana-Florentina Iatan
Venue: Proceedings of the 1st IEEE International Conference on Cognitive Informatics (2002)

We present a face recognition approach using a new version of Chen and Teng fuzzy neural network [1], which we have modified from an identifier into a neuro-fuzzy classifier called Fuzzy-Gaussian Neural Network (FGNN). We have deduced the modified equations fortraining the FGNN. Our presented face recognition cascade has two stages:(a) Feature extraction using either the Principal Component Analysis (PCA) or the Discrete Cosine Transform (DCT);(b) Pattern classification using the FGNN.We have performed the software implementation of the algorithm and have experimented the face recognition task for a database of 100 images (10 classes) . The recognition score has been of 100% (for the test lot) for almost all the considered variants of feature extraction .We have also compared the performances of the FGNN with those obtained using a classical multilayer fuzzy perceptron (FP). We can deduce the significant advantage of the proposed FGNN over FP.
The Affinity Entry Consistency Protocol
Authors: Cristiana Bentes Seidel, Ricardo Bianchini, Claudio Luis de Amorim
Venue: Proceedings of the international Conference on Parallel Processing (1997)

In this paper we propose a novel software-only distributed shared-memory system (SW-DSM), the Affinity Entry Consistency (AEC) protocol. The protocol is based on Entry Consistency but, unlike previous approaches, does not require the explicit association of shared data to synchronization variables, uses the page as its coherence unit, and generates the set of modifications (in the form of diffs) made to shared pages eagerly. The AEC protocol hides the overhead of generating and applying diffs behind synchronization delays, and uses a novel technique, Lock Acquirer Prediction (LAP), to tolerate the overhead of transferring diffs through the network. LAP attempts to predict the next acquirer of a lock at the time of the release, so that the acquirer can be updated even before requesting ownership of the lock. Using execution-driven simulation of real applications, we show that LAP performs very well under AEC; LAP predictions are within the 80-97% range of accuracy. Our results also show that LAP improves performance by 7-28% for our applications. In addition, we find that most of the diff creation overhead in the AEC protocol can usually be overlapped with synchronization latencies. A comparison against simulated TreadMarks shows that AEC outperforms TreadMarks by as much as 47%. We conclude that LAP is a useful technique for improving the performance of update-based SW-DSMs, while AEC is an efficient implementation of the Entry Consistency model.
Renaissance: A Method to Support Software System Evolution
Authors: Ian Warren, Jane Ransom
Venue: Proceedings of the 26th International Computer Software and Applications Conference on Prolonging Software Life: Development and Redevelopment (2002)

Legacy systems are often business critical and are associated with high maintenance costs. In this paper, we present an overview of a method, Renaissance, which aims to manage the process of regaining control over such systems. Renaissance supports system evolution byfirst recovering a stable basis using reengineering, and subsequently continuously improving the system by a stream of incremental changes. In both cases, the extent of evolution is determined by a phase which takes account of technical, business, and organisational factors. Renaissance defines a process framework, a predefined number of evolution strategies, an information repository, and a generic set of personnel responsibilities. The method can be tailored to the needs of particular projects and organisations, and it is notprescriptive of particular tools and techniques.
An Architecture for Collaboratively Assembled Moderated Information Bearing Web Sites
Authors: Richard Cooper
Venue: Proceedings of the 13th International Workshop on Database and Expert Systems Applications (2002)

As originally conceived, the World Wide Web was intended for the purpose of sharing information. Many websites realise this aim by publishing pages from a data repository which supports browsing and searching. Building such a site is challenging in the first place, but since the information to be published will be spread among the community who wish to share the data, maintenance is an even greater challenge. In this case, the developers must continuously solicit, receive, moderate and integrate new information into the web site. The additional task of moderation is considerably more time consuming even than the initial web site construction and requires appropriate tools to expedite the process.This paper describes the prototype of an architecture for constructing web sites which take part in a cycle of publishing and receiving data, in which the pages also solicit fresh information by the use of forms and e-mail. The architecture facilitates both site construction and maintenance, by allowing the date to be declaratively specified and then generating the data repository, web pages and moderating program automatically. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
The Combined Effectiveness of Unimodular Transformations, Tiling, and Software Prefetching
Authors: Rafael H. Saavedra-Barrera, Weihua Mao, Daeyeon Park, Jacqueline Chame, Sungdo Moon
Venue: Proceedings of the 10th International Parallel Processing Symposium (1996)

Unimodular transformations, tiling, and software prefetching are loop optimizations known to be effective in increasing parallelism, reducing cache miss rates, and eliminating processor stall time. Although these optimizations individually are quite effective, there is the expectation that even better improvements can be obtained by combining them together. In this paper we show that indeed this is the case when unimodular transformations are combined with either tiling or software prefetching. However, our results also show that although combining tiling with prefetching tends to improve the performance of tiling alone, it is also the case that in some situations tiling can degrade the cache performance of software prefetching. The reasons for this unexpected behavior are three fold: 1) tiling introduces interference misses inside the localized space which are difficult to characterize with current techniques based on locality analysis; 2) prefetch predicates are computed using only estimates on the amount of capacity misses, so the latency induced by cache interference is not completely covered; and 3) tiling limits the maximum amount of latency that can be masked with prefetching.
Image Moments-Based Structuring and Tracking of Objects
Authors: Lourena Rocha, Luiz Velho, Paulo Cezar Pinto Carvalho
Venue: Proceedings of the 15th Brazilian Symposium on Computer Graphics and Image Processing (2002)

This paper presents a new method for structuring and tracking of objects in video sequences. Our approach is based on image moments and the bsp-tree data structure. We use invariant properties of these moments to construct a bsp-tree and determine an ellipsis that approximates the object's shape. Then, we employ this information to track objects frame by frame through the image sequence. The method works well for segmented images with a single object and we assume that the motion will not change abruptly.
Evaluating an Adaptive Windowing Scheme in Speckle Noise MAP Filtering
Authors: F. N. S. Medeiros, Nelson D. A. Mascarenhas, R. C. P. Marques, C. M. Laprano
Venue: Proceedings of the 15th Brazilian Symposium on Computer Graphics and Image Processing (2002)

Abstract. Synthetic aperture radar (SAR) images are corrupted by speckle noise, which degrades the quality and interpretation of the images. Speckle removal provides a better interpretability of SAR images if the technique performs the filtering without loss of spatial resolution and preserves fine details and edges. This work aims to redefine the neighborhood areas around the noisy pixel and in this area the local mean and variance are computed to estimate the Maximum a Posteriori (MAP) filter parameters. The proposed modified MAP algorithm improves the ability to filter the speckle noise without blurring edges and targets by applying the MAP estimator in the current adaptive window that is controlled by a measure of homogeneity in the area around the noisy pixel. This adaptive windowing was also incorporated to the classical Kuan [3] and Frost [13] filters in order to evaluate the performance of the proposed scheme. The effectiveness in reducing speckle by the modified MAP filter is evaluated in terms of qualitative and quantitative aspects such as line and edgepreservation and the improvement of the signal to noise ratio. The tests were performed in real SAR images.
The Multikey Type Index for Persistent Object Sets
Authors: Thomas A. Mück, Martin L. Polaschek
Venue: Proceedings of the Thirteenth International Conference on Data Engineering (1997)

Multikey index structures for type hierarchies are a recently discussed alternative to traditional B/sup +/-tree indexing schemes. We describe an efficient implementation of this alternative called the multikey type index (MT-index). A prerequisite for our approach is an optimal linearization of the type hierarchy that allows us to map queries in object type hierarchies to minimal-volume range queries in multi-attribute search structures. This provides access to an already-existing large and versatile tool-box. The outline of an index implementation by means of a multi-attribute search structure (e.g. the hB-tree or any other structure with comparable performance) is followed by an analytical performance evaluation. Selected performance figures are compared to previous approaches, in particular to the H-tree and the class hierarchy tree. The comparison results allow for practically relevant conclusions with respect to index selection based on query profiles.
Auctions with Severely Bounded Communication
Authors: Liad Blumrosen, Noam Nisan
Venue: Proceedings of the 43rd Symposium on Foundations of Computer Science (2002)

We study auctions with severe bounds on the communication allowed: each bidder may only transmit t bits of information to the auctioneer. We consider both welfare-maximizing and revenue-maximizing auctions under this communication restriction. For both measures, we determine the optimal auction and show that the loss incurred relative to unconstrained auctions is mild. We prove non-surprising properties of these kinds of auctions, e.g. thatdiscrete prices are informationally efficient, as well as some surprising properties, e.g. that asymmetric auctions are better than symmetric ones.
Hardware Versus Software Implementation of COMA
Authors: Adrian Moga, Michel Dubois, Alain Gefflaut
Venue: Proceedings of the international Conference on Parallel Processing (1997)

Traditionally, cache coherence in multiprocessors has been maintained in hardware. However, the cost-effectiveness of hardwired protocols is questionable. Virtual Shared Memory systems have highlighted the many advantages of software-implemented protocols, albeit at a performance price. The performance gap is narrowed by hybrid systems with the addition of hardware support for fine-grain sharing. We have developed a software protocol for a COMA (Cache-Only Memory Architecture). We call the system SC-COMA for Software-Controlled COMA, to emphasize that the protocol engine is emulated by software executed on the main processor. Contrary to user-level protocols, the software handling coherence events in SC-COMA runs in sub-kernel mode, transparently providing the same services to applications as a hardware counterpart. The software emulation layer has been written and we compare SC-COMA to an idealized hardware COMA through detailed simulations. Our results show that SC-COMA is competitive. On systems with 32 processors, it achieves a slowdown of 11-56% with respect to its hardware counterpart, across a range of applications and memory pressures. SC-COMA scales well, up to 32 nodes. A study on the impact of faster processors on SC-COMA's relative performance indicates a consistent improvement, but with a limitation due to the loosely-integrated design. We conclude that SC-COMA is a viable solution to easily transform networks of workstations into powerful multiprocessors.
An Efficient Parallel Algorithm for Solving the Knapsack Problem on the Hypercube
Authors: A. Goldman, Denis Trystram
Venue: Proceedings of the 11th International Symposium on Parallel Processing (1997)

In this paper, we present a new algorithm to solve the integral knapsack problem on the hypercube. The main idea is to use the fact that the precedence graph of the dynamic programming function of the knapsack problem is an irregular mesh. We propose a scheduling algorithm for irregular meshes on the hypercube. The efficiency of the algorithm is independent on the number of processors. We also present some improvements for the solution of the 0/1 knapsack problem on the hypercube.
An efficient cut-based algorithm on minimizing the number of L-shaped channels for safe routing ordering
Authors: Jin-Tai Yan
Venue: Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors (1995)

In this paper, based on the assumptions of the geometrical topology in a floorplan graph and the precedence relations in a channel precedence graph, the cuts are further classified into S-cuts, redundant L-cuts, balanced L-cuts, non-minimal L-cuts, non-critical L-cuts and critical L-cuts. An efficient cut-based algorithm on minimizing the number of L-shaped channels is proposed. The time complexity of the algorithm is proved to be in O(n) time, where n is the number of line segments in a floorplan graph. Finally, several examples have been tested on Dai's and Cai's algorithms and the proposed algorithm. The experimental results show that the proposed algorithm defines fewer L-shaped channels than Dai's and Cai's algorithms in the definition of straight and L-shaped channels for the assignment of safe routing ordering.
Optimal Scheduling for UET-UCT Generalized n-Dimensional Grid Task Graphs
Authors: Theodore Andronikos, Nectarios Koziris, George K. Papakonstantinou, Panayotis Tsanakas
Venue: Proceedings of the 11th International Symposium on Parallel Processing (1997)

The n-dimensional grid is one of the most representative patterns of data flow in parallel computation. The most frequently used scheduling models for grids is the unit execution - unit communication time (UET-UCT). In this paper we enhance the model of n-dimensional grid by adding extra diagonal edges. First, we calculate the optimal makespan for the generalized UET-UCT grid topology and, then, we establish the minimum number of processors required, to achieve the optimal makespan. Furthermore, we solve the scheduling problem for generalized n-dimensional grids by proposing an optimal time and space scheduling strategy. We thus prove that UET-UCT scheduling of generalized n-dimensional grids is low complexity tractable.
Application Load Imbalance on Parallel Processors
Authors: Vasudha Govindan, Mark A. Franklin
Venue: Proceedings of the 10th International Parallel Processing Symposium (1996)

This paper addresses the issue of dynamic load imbalance in a class of synchronous iterative applications, and develops a model to represent their workload dynamics. Such models of application load dynamics help in more accurate performance prediction and in the design of efficient load balancing algorithms. Our model captures the workload dynamics across iterations, and predicts the workload distribution at any given iteration as the cumulative effect of workload dynamics during the preceding iterations. The model parameters are derived using empirical data from initial runs of the application. The model development is illustrated using data from a parallel N-body simulation application.
Modeling Web Navigation by Statechart
Authors: Karl R. P. H. Leung, Lucas Chi Kwong Hui, S. M. Yiu, Ricky W. M. Tang
Venue: 24th International Computer Software and Applications Conference (2000)

There is a trend of increasing size of web sites and increasing complexity of web pages by dynamic content in recent years. Currently available web navigation modeling tools are unable to cope with the need of modeling these contemporary web sites, especially those with dynamic content. This need is analyzed in this paper and a web navigation model based on statechart is proposed to meet the requirements. The model will serve as a tool for the modeling and analyzing navigation of complex and dynamic web sites.
Failure Planning in STESCA
Authors: Michael L. Nelson, Guillermo Flores,  Jr.
Venue: 23rd International Computer Software and Applications Conference (1999)

Mission specification for autonomous or robotic vehicles can be fairly straightforward if everything goes well. However, if part of the mission fails for any reason, the vehicle must have some type of backup plan. Unfortunately, this failure planning adds to the complexity of the overall mission. We are developing the Spreadsheet Approach for mission specification to make failure planning as easy as possible for the user of the vehicle.