ppxscal/embedding_network huggingface dataset:
The x-legion: a compiler-approach to exploit locality and portability of divide-and-conquer algorithms
Authors: Paolo Nicola D'Alberto
Venue:  (2005)

The solution of linear systems is an ancient and inexhaustible problem. In time, the theory and the techniques to solve this problem have evolved and, today, hardware and software technologies thrive to achieve high-performance systems for the efficient solution of systems based on what is now defined as matrix linear algebra, and, in turn, efficient matrix computations and matrix algorithms. My main contribution is in the investigation and implementation of techniques for the analysis of data locality in divide-and-conquer (D C) algorithms, both recursive and non recursive, and their application to drive novel memory-hierarchy adaptations at compile time&mdash;i.e., static&mdash;or at run time&mdash;i.e., dynamic. I show the practicality and benefits of these techniques when applied to algorithms for linear algebra, matrix computation kernels and graph manipulation. In practice, I investigate and propose techniques for code organization through data-layout and computation re-organization in order to exploit data locality. Especially in this work, I present compiler-driven optimizations for the best utilization of the memory hierarchy starting from the register files to the efficient utilization of the translation look-aside buffer (TLB) and, thus, hard-disk access(es). These compile-time techniques are deployed in an investigative framework: X-Legion compiler&mdash;i.e., the tenth-legion compiler. JuliusC (Julius Caesar) is the leading component of the X-Legion compiler and it analyzes the division process of recursive D C algorithms. Such an information leads to the modeling of the computation unfolding, the (automatic) reduction of the algorithm division work, and the targeting of optimizations driven by another compiler component, STAMINA. In fact, STAMINA is an analysis tool for the estimation of cache interference due to data memory reference in loop nests. In turn, the interference analysis drives the application of further optimizations to exploit spatial and temporal locality such as cache-line size adaptation and dynamic mapping.
An Operating System Framework for Reconfigurable Systems
Authors: Bo Zhou, Weidong Qiu, Chenlian Peng
Venue: Proceedings of the The Fifth International Conference on Computer and Information Technology (2005)

Reconfigurable computing have been accepted as vehicles for both achieving potentially much higher performance than software and maintaining a higher level of flexibility than hardware. However, there is still no much operating system support for it. Based on the essential differences between software-tasks and hardware-tasks, this pa-per presents and implements a RTOS for reconfigurable systems using uniform multitask model, called SHUM-UCOS (Software-Tasks Hardware-Tasks Uniform Management UCOS) , which is designed with the UCOSII as prototype. This RTOS traces and manages the usage of re-configurable resources (FPGAs), and can improve the utilization of these resource and the parallelism of the tasks with the hardware-tasks preconfiguration. And it has been proved by experiments that SHUM-UCOS can shorten the migration time from software implements to hardware implements with the performance improvement.
Cryogenic Memories for RSFQ Ultra-High-Speed Processor
Authors: T. Van Duzer
Venue: Proceedings of the 2005 ACM/IEEE conference on Supercomputing (2005)

The gap between logic speed and memory access is a growing problem in all computing systems and it is exacerbated for ultra-high speed processors such as the proposed cryogenic Rapid Single Flux Quantum (RSFQ) logic working at 50 .100 GHz. The Superconducting Technology Assessment (STA) Panel considered two levels in a hierarchy of cryogenic memory located off of the processor chip. The first level of off-chip memory would be located on the MCM at 4 Kelvin (4 K) with the processor chip in order to minimize propagation-time delays. We are planning for a 1 Mb memory for this stage. The second-level memory would be much larger and could be located on a more efficient refrigerator stage at 40-77 K.
A study of computer ownership and school and home use of computer technology of the students of alliance high school (nebraska)
Authors: Valorie J. Foy
Venue:  (2005)

This study was designed to determine high school students' ownership and use of computers and technology by gender, ethnicity, socio-economic status (based on free-and-reduced lunch), and grade in school. The dependent variables in the study were (1) home ownership of computer; (2) home ownership of Internet access; (3) home use of computers for word processing, research on the Internet, drill-and-practice, and e-mail; (4) school use of computers for word processing, research on the Internet, drill-and-practice, and e-mail; and (5) alternative location (not school or home) use of computers for word processing, research on the Internet, drill-and-practice, and e-mail. A student survey was conducted to determine student ownership and use of computers and Internet. In addition, a survey was conducted of teachers to determine if they required students to use computers in their classrooms and/or if they expected students to complete homework assignments on computers. The findings of this study included: (a) The relationship between having a computer in the home and ethnicity was found to be statistically significant. (b) The relationship between having Internet in the home and ethnicity, income, gender, and grade was significant. (c) The relationship between using computers at home to word process and ethnicity, income, gender, and grade was significant. (d) The relationship between use of computers at home for Internet research was significant for gender and grade in school. (e) The relationship between use of computers to do drill-and-practice and grade in school showed significant difference. (f) The relationship between use of computers at home to e-mail and grade in school showed a significant difference. (g) Teachers assigned homework that required students to use computers more than they assigned in-class work that required students is to use computers. (h) Word processing was the use for which students were most asked to use computers by teachers. (i) Students were almost never or not at all asked to use drill-and-practice, do research on the Internet, or use e-mail to complete homework or in-class work by the majority of teachers. (j) Most students use drill-and-practice very little. The goal of the research was to inform educators of the equity of access to computers and technology. The results may assist schools in applying for and effectively using technology grants and may inform educators in student-use of computers.
Performance implications of single thread migration on a chip multi-core
Authors: Theofanis Constantinou, Yiannakis Sazeides, Pierre Michaud, Damien Fetis, Andre Seznec
Venue: ACM SIGARCH Computer Architecture News (2005)

High performance multi-core processors are becoming an industry reality. Although multi-cores are suited for multithreaded and multi-programmed workloads, many applications are still mono-thread and multi-core performance with a single thread workload is an important issue. Furthermore, recent studies suggest that performance, power and temperature considerations of future multi-cores may necessitate activity-migration between cores.Motivated by the above, this paper investigates the performance implications of single thread migration on a multi-core. Specifically, the study considers the influence on the performance of a single thread of the following migration and multi-core parameters: frequency of migration, core warm-up modes, subset of resources that are warmed-up, number of cores, and cache hierarchy organization. The results of this study can provide insight to architects on how to design performance-efficient power and thermal strategies for a multi-core chip.The experimental results, for the benchmarks and microarchitectures used in this study, show that the performance loss due to activity migration on a multi-core with private L1s and a shared L2 can be minimized if: (a) a migrating thread continues its execution on a core that was previously visited by the thread, and (b) cores remember their predictor state since their previous activation (all other core resources can be cold). The analogous conclusions for a multi-core with private L1s and L2s and a shared L3 are: remembering the predictor state, maintaining the tags of the various L2 caches coherent and allowing L2-L2 data transfers from inactive cores to the active core.The data also show that when migration period is at least every 160K cycles, the transfer of register state between two cores and the flushing of dirty private L1 data have a negligible performance overhead.
Generalized benchmark generation for dynamic combinatorial problems
Authors: Abdunnaser Younes, Paul Calamai, Otman Basir
Venue: Proceedings of the 2005 workshops on Genetic and evolutionary computation (2005)

Several general purpose benchmark generators are now available in the literature. They are convenient tools in dynamic continuous optimization as they can produce test instances with controllable features. Yet, a parallel work in dynamic discrete optimization still lacks.In constructing benchmarks for dynamic combinatorial problems, two issues should be addressed: first, test cases that can effectively test an algorithm ability to adapt can be difficult to create; second, it might be necessary to optimize several instances of an NP-hard problem. Hence, this paper proposes a method for generating benchmarks with known solutions without the need to re-optimize. Consequently, the method does not suffer the usual limitations on the problem size or the sequence length.The paper also proposes a general framework for the generation of test problems. It aims to unify existing approaches and to form a basis for designing newer benchmarks. Such a framework can be more appreciated knowing that combinatorial problems tend to assume very distinct structures, and hence, relevant benchmarks are basically too specific to be of interest to the general reader.
Improved learning of Riemannian metrics for exploratory analysis
Authors: Jaakko Peltonen, Arto Klami, Samuel Kaski
Venue: Neural Networks (2004)

We have earlier introduced a principle for learning metrics, which shows how metric-based methods can be made to focus on discriminative properties of data. The main applications are in supervising unsupervised learning to model interesting variation in data, instead of modeling all variation as plain unsupervised learning does. The metrics are derived by approximations to an information-geometric formulation. In this paper, we review the theory, introduce better approximations to the distances, and show how to apply them in two different kinds of unsupervised methods: prototype-based and pairwise distance-based. The two examples are self-organizing maps and multidimensional scaling (Sammon's mapping).
Navier-Stokes equations with several independent pressure laws and explicit predictor-corrector schemes
Authors: C. Chalons, F. Coquel
Venue: Numerische Mathematik (2005)

This work is concerned with the numerical capture of stiff viscous shock solutions of Navier-Stokes equations for complex compressible materials, in the regime of large Reynolds numbers. After [2] and [6], a relevant numerical capture is known to require the satisfaction of an extended set of non classical Rankine-Hugoniot conditions due to the non conservation form of the governing PDE model. Here, we show how to enforce their validity at the discrete level without the need for solving local non linear algebraic problems. Non linearities are bypassed when introducing new averaging techniques which are proved to satisfy all the desirable stability properties when invoking suitable approximate Riemann solutions. A relaxation procedure is proposed to that purpose with the benefit of a fairly simple overall numerical method.
The Globus Striped GridFTP Framework and Server
Authors: William Allcock, John Bresnahan, Rajkumar Kettimuthu, Michael Link, Catalin Dumitrescu, Ioan Raicu, Ian Foster
Venue: Proceedings of the 2005 ACM/IEEE conference on Supercomputing (2005)

The GridFTP extensions to the File Transfer Protocol define a general-purpose mechanism for secure, reliable, high-performance data movement. We report here on the Globus striped GridFTP framework, a set of client and server libraries designed to support the construction of data-intensive tools and applications. We describe the design of both this framework and a striped GridFTP server constructed within the framework. We show that this server is faster than other FTP servers in both single-process and striped configurations, achieving, for example, speeds of 27.3 Gbit/s memory-to-memory and 17 Gbit/s disk-to-disk over a 60 millisecond round trip time, 30 Gbit/s network. In another experiment, we show that the server can support 1800 concurrent clients without excessive load. We argue that this combination of performance and modular structure make the Globus GridFTP framework both a good foundation on which to build tools and applications, and a unique testbed for the study of innovative data management techniques and network protocols.
Incomplete-data classification using logistic regression
Authors: David Williams, Xuejun Liao, Ya Xue, Lawrence Carin
Venue: Proceedings of the 22nd international conference on Machine learning (2005)

A logistic regression classification algorithm is developed for problems in which the feature vectors may be missing data (features). Single or multiple imputation for the missing data is avoided by performing analytic integration with an estimated conditional density function (conditioned on the non-missing data). Conditional density functions are estimated using a Gaussian mixture model (GMM), with parameter estimation performed using both expectation maximization (EM) and Variational Bayesian EM (VB-EM). Using widely available real data, we demonstrate the general advantage of the VB-EM GMM estimation for handling incomplete data, vis-&agrave;-vis the EM algorithm. Moreover, it is demonstrated that the approach proposed here is generally superior to standard imputation procedures.
Intelligent power management system for n+ rechargeable solid-state microscale batteries
Authors: Mahmoud Ahmad Alahmad
Venue:  (2005)

Jet Propulsion Laboratory (JPL) has been pursing miniaturized power sources for aerospace applications. In the area of power storage, they have developed a rechargeable solid state micro-scale lithium battery, rated at 4.25 V with a 50 nAH capacity. It is fabricated on a single 4-inch wafer using microelectronic fabrication techniques. Up to 20,000 microbatteries can be fabricated on a single wafer. A system to charge, discharge and monitor the status of each microbattery is required to utilize the microbatteries in practical applications. This Ph.D. dissertation describes the development of a novel N+ Switch Array Matrix (N+ SAM) topology. This topology is unique in its dynamic reconfiguration ability by providing selective connection and isolation and it is versatile in its core design by incorporating passive, active or energy storage elements. It is customized for the microbatteries to provide selective voltage and capacity ratios by reconfiguring the microbatteries during the charge or discharge cycle. In addition, a microbattery model and a categorization model have been developed to identify the status of each microbattery in the topology at any given time. An Intelligent Power Management System has been developed based on the N+ SAM topology to provide user-defined methods and connections for charging and discharging arbitrary number N microbatteries connected in series, parallel, or series-parallel configurations. Using the categorization model, the system provides real time information regarding the condition and status of each microbattery. Using the microbattery model, the system also provides real time fault tolerant capabilities and protection using voltage setting to terminate the charge and discharge if required. A two microbattery prototype circuit has been designed and built using a microprocessor-based controller and off-the-shelf components for the verification of the system's operation. The results of the prototype circuit are presented. Finally, the system sub-circuit components have been designed using specialized technologies that are suitable for integrated circuit applications. Test results of the fabricated circuits are reported to verify the operational results.
Towards Autonomic Minimization of Security Vulnerabilities Exploitation in Hybrid Network Environments
Authors: Rui Costa Cardoso, Mario M. Freire
Venue: Proceedings of the Joint International Conference on Autonomic and Autonomous Systems and International Conference on Networking and Services (2005)

Security is a serious trend in hybrid networks. In this paper, we present a new methodology based on software agents for minimizing the dissemination of vulnerabilities in this kind of networks. The suitable placement of software agents in the network could enhance and minimize the spreading of exploitation of vulnerabilities in networked systems and devices. Each agent can propagate warnings to their neighbors and therefore alert them of impending threats. Using this approach, the overall awareness of the network to security vulnerabilities and exposures is increased. Moreover, in this kind of network environments susceptible of high fluctuation in the number of connected systems and frequent migration between network segments, a distributed vulnerability assessment could minimize potential threats to security.
On Ovoids of Parabolic Quadrics
Authors: Simeon Ball, Patrick Govaerts, Leo Storme
Venue: Designs, Codes and Cryptography (2006)

It is known that every ovoid of the parabolic quadric Q(4, q), q=ph, p prime, intersects every three-dimensional elliptic quadric in 1 mod p points. We present a new approach which gives us a second proof of this result and, in the case when p=2, allows us to prove that every ovoid of Q(4, q) either intersects all the three-dimensional elliptic quadrics in 1 mod 4 points or intersects all the three-dimensional elliptic quadrics in 3 mod 4 points.We also prove that every ovoid of Q(4, q), q prime, is an elliptic quadric. This theorem has several applications, one of which is the non-existence of ovoids of Q(6, q), q prime, q>3.We conclude with a 1 mod p result for ovoids of Q(6, q), q=ph, p prime.
Rotation Invariant Thinning Algorithm to Detect Ridge Bifurcations for Fingerprint Identification
Authors: Pradeep M. Patil, Shekar R. Suralkar, Faiyaz B. Sheikh
Venue: Proceedings of the 17th IEEE International Conference on Tools with Artificial Intelligence (2005)

In this paper we have modified the thinning algorithm proposed by Ahmed and Ward [1]. The unique feature that distinguishes the algorithm is its ability to thin any symbol or fingerprint to its central line taking care that the shape of the symbol is preserved while being rotation invariant. Our Modified algorithm also incorporates a process to thin zigzag diagonal lines having a width of two pixels which was not considered in [1]. The algorithm is iterative and makes use of parallel processing to speed up execution. The system has 21 rules in its inference engine which are applied simultaneously to every pixel in each iteration. The algorithm is implemented for thinning fingerprints, fonts and symbols to a single pixel width. We also introduce a 24 rule based mask for detection of ridge bifurcations, which can be helpful for recognition/authentication of fingerprints as a biometric.
Using real-time dependability in adaptive service selection
Authors: Markus C. Huebscher, Julie A. McCann
Venue: Proceedings of the Joint International Conference on Autonomic and Autonomous Systems and International Conference on Networking and Services (2005)

In Service-Oriented Architectures (SOA), services advertise a description of the type of service they can provide. Sometimes, services also advertise Quality of Information (QoI) attributes describing the quality of their provided service. When there are multiple alternative service providers for the same type of service, a client can use the advertised QoI to select the best alternative. However, these QoI attributes may not be reliable, leading the client to select a sub-optimal alternative. We suggest a mechanism in SOAs for rating the current dependability of the advertised QoI of each alternative, and using this dependability to automatically select the best alternative service provider. We present results of a case study that considers weather forecast services.
A Coordination Model for Wearable Fashion
Authors: Akira Wakita, Motohiro Tanji, Sohei Kitada, Midori Shibutani, Hiroko Uchiyama, Masa Inakage
Venue: Proceedings of the Ninth IEEE International Symposium on Wearable Computers (2005)

Recently, the wearable computing technologies keep empowering a variety of fashion items. Each wearable fashion item is attractive and providing quite new possibilities in terms of new computing devices. However, the conceptual model that supports fashionable coordination among those items is not proposed yet. To address this problem, we present a coordination model for wearable fashion by utilizing the conceptual model of analog synthesizers. We show some behavior styles and these description method with schematic block diagram. A set of prototyping clothing based on the model will also be presented for estimations.
Policy-based dissemination of partial web-ontologies
Authors: Saket Kaushik, Duminda Wijesekera, Paul Ammann
Venue: Proceedings of the 2005 workshop on Secure web services (2005)

Traditional discretionary access control, without data alteration operators, applied directly on ontologies can result in revealing unintended information because ontologies contain meta-information about objects. As an alternative we provide a constraint logic programming based policy language that can extract, rove or desensitize sensitive concepts in ontologies prior to requested disclosures. Our policies are stratified Horn clauses with constructive negation, and our constraint syst uses a finitary syst of ZF sets developed by Dovier et al. - and consequently, admits a three-valued Kripke-Kleene santics. Consequently, it is suitable for safeguarding meta-information stored on the Santic web using OWL. We show how our three-valued santics faithfully represents traditional OWL santics.