ppxscal/embedding_network huggingface dataset:
Database concurrency control using data flow graphs
Authors: M. H. Eich, David L. Wells
Venue: ACM Transactions on Database Systems (TODS) (1988)

A specialized data flow graph, Database Flow Graph (DBFG) is introduced. DBFGs may be used for scheduling database operations, particularly in an MIMD database machine environment. A DBFG explicitly maintains intertransaction and intratransaction dependencies, and is constructed from the Transaction Flow Graphs (TFG) of active transactions. A TFG, in turn, is the generalization of a query tree used, for example, in DIRECT [15]. All DBFG schedules are serializable and deadlock free. Operations needed to create and maintain the DBFG structure as transactions are added or removed from the system are discussed. Simulation results show that DBFG scheduling performs as well as two-phase locking.
VLSI assist for a multiprocessor
Authors: Bob Beck, Bob Kasten, Shreekant Thakkar
Venue: ACM SIGARCH Computer Architecture News (1987)

Multiprocessors have long been of interest to computer community. They provide the potential for accelerating applications through parallelism and increased throughput for large multi-user system. Three factors have limited the commercial success of multiprocessor systems; entry cost, range of performance, and ease of application. Advances in very large scale integration (VLSI) and in computer aided design (CAD) have removed these limitations, making possible a new class of multiprocessor systems based on VLSI components. A set of requirements for building an efficient shared multiprocessor system are discussed, including: low-level mutual exclusion, interrupt distribution, inter-processor signaling, process dispatching, caching, and system configuration. A system that meets these requirements is described and evaluated.
Matrix multiplication via arithmetic progressions
Authors: D. Coppersmith, S. Winograd
Venue: Proceedings of the nineteenth annual ACM symposium on Theory of computing (1987)

We present a new method for accelerating matrix multiplication asymptotically. This work builds on recent ideas of Volker Strassen, by using a basic trilinear form which is not a matrix product. We make novel use of the Salem-Spencer Theorem, which gives a fairly dense set of integers with no three-term arithmetic progression. Our resulting matrix exponent is 2.376.
Representation and recognition of objects from depth maps
Authors: J. K. Aggarwal, B. C. Vemuri
Venue: Proceedings of the 1987 Fall Joint Computer Conference on Exploring technology: today and tomorrow (1987)

Object manipulation by a robot requires some degree of sensing, and of all possible forms of sensory perception, visual sensing is one of the most attractive because of its non-contact nature, high speed and accuracy. Visual data can be obtained in two or three-dimensional (depth map) form from commercially available sensors. Interpreting visual data has been one of the major themes of computer vision researchers in the past decade. In this paper, we present efficient techniques for object representation and recognition from dense range (depth) maps. The objects and models are represented by regions that are a collection of surface patches homogeneous in curvature-based surface properties. The recognition scheme is based on matching object surface descriptions with model surface descriptions. The recognition task includes both locating the overall object and identifying each of its features. Location is achieved by finding a geometrical &ldquo;registration&rdquo; function that correctly superimposes an arbitrary instance of the known model and the model. A localization technique is presented which requires that correspondence be established exactly, between one point on the object surface and one on the model surface. Once the single point correspondence is specified, closed form solutions are given for determining the attitude of the unknown view of the object in 3 space with respect to the model.
An updated information systems curriculum: first revision
Authors: Osvaldo Laurido-Santos
Venue: Proceedings of the eighteenth SIGCSE technical symposium on Computer science education (1987)

Our original proposal for &ldquo;An Updated Information Systems Curriculus&rdquo; was presented on March 15, 1985 at the ACM SIGCSE Symposium (2). This paper presents our first revision of the original proposal. It includes two new courses and a redistribution of some of the topics covered on some courses.
An electro-optic data communication system for the Delft parallel processor
Authors: E. E. E. Frietman A. B. Ruighaver
Venue: ACM SIGARCH Computer Architecture News (1987)

The Delft Parallel Processor (DPP), which has already been operational since 1981, is part of a long term research project for the application of a large-scale Multiple Instruction stream, Multiple Data stream (MIMD) architecture in the field of scientific computing. As a result of this project a second modern version, the DPP84, equipped with up to 16 Processing Elements (PE's), is now operational and has been installed at several sites inside and outside the Technical University Delft. The most important part of the DPP is its communication system, which is based on a "multiple broadcast" concept. This allows all the PE's to be fully interconnected through fast parallel data channels. To realize a large-scale next-generation MIMD supercomputer in which all PE's are fully interconnected, a different technical approach to this communication system is needed. This paper introduces the concept of an Electro-Optic Communication System (EOCS). In order to be able to implement a high-bandwidth parallel interconnection structure, the application of flexible polymer fiber-optic cables is considered.
Pitfalls in PROLOG programming
Authors: K W Ng, W Y Ma
Venue: ACM SIGPLAN Notices (1986)

A programming language is an intermediate medium between the human user and the machine. Ideally it should reduce the gap between human reasoning and the machine's processing mechanism to the minimum. Accordingly, none of the contemporaryprogramming languages can be said to be ideal. Prolog is no exception. However, it is usually emphasized that programming in Prolog is very easy, even a beginner can handle it within a few hours of learning. The rationale behind this conception is that Prolog clauses are actually some logical statements, and logic is the basis of every rational subject. The problem arises in that Prolog programming is not equivalent to logic programming. Prolog still shares the effect of the influence of the fundamental Von Neumann computer architecture on conventional programming languages. If a user wants to write a Prolog program just according to his logical reasoning, he will probably fall into an unexpected trap of the language.
Software implementation of a recursive fault tolerance algorithm on a network of computers
Authors: P. Agrawal
Venue: ACM SIGARCH Computer Architecture News (1986)

RAFT is a recursive algorithm for fault tolerance that uses a combination of dynamic space and time redundancy techniques for detecting faulty processors and recovering from errors. U* is a multicomputer testbed consisting of a network of AT T 3B2 computers running a network operating system based on the UNIX system. This paper describes a software implementation of RAFT on U*, and demonstrates the effectiveness of a RAFT-like scheme for designing fault-tolerant multicomputer systems. Results of Monte Carlo experiments, conducted on this system that validated the theoretical basis of RAFT, are presented. Experimentally observed performance penalty, incurred due to fault tolerance, is also presented.
Reference model for DBMS standardization
Venue: ACM SIGMOD Record (1986)

This report proposes a Reference Model (RM) for database management system (DBMS) standardization. A Reference Model is a conceptual framework whose purpose is to divide standardization work into manageable pieces and to show at a general level how these pieces are related with each other. The proposed RM comprises a Data Mapping Control System (DMCS) that retrieves and stores application data, application schemas, and data dictionary schemas. This DMCS is bounded by two interfaces: the Data Language (DL) interface which defines the services offered by the DMCS to various Data Management Tools (DMT), and the internal Data Language (i-DL) interface which defines the services required by the DMCS from the host operating system. This report suggests two candidates for standardization: the DL and the i-DL.
The APL:9SPlus:2E System for the Macintosh: an overview
Authors: Edward R. Myers
Venue: Proceedings of the international conference on APL: APL in transition (1987)

The APL*PLUS System for the Macintosh&trade; is a full-featured APL interpreter that integrates the Macintosh user interface style into a standard APL*PLUS System environment. An overview of these Macintosh-specific features along with a comparison of the capacity and performance of the APL*PLUS Mac System to other APL systems suggests that APL applications that are highly interactive, require large workspaces, and need advanced graphics are best implemented on the Macintosh.
Comments on "Matrix Processors Using p-Adic Arithmetic for Exact Linear Computations"
Authors: R N Gorgui-Naguib, R A King
Venue: IEEE Transactions on Computers (1986)

The addition and multiplication algorithms of two Hensel codes were presented in two earlier papers [1], [2] on p-adic arithmetic. It is shown here that these algorithms do not always generate a correct result having the same code word length as the two operands and the correct algorithms are given.
A mathematical approach to nondeterminism in data types
Authors: Wim H. Hesselink
Venue: ACM Transactions on Programming Languages and Systems (TOPLAS) (1988)

The theory of abstract data types is generalized to the case of nondeterministic operations (set-valuedfunctions). Since the nondeterminism of operations may be coupled, signatures are extended so that operations can have results in Cartesian products. Input/output behavior is used to characterize implementation of one model by another. It is described by means of accumulated arrows, which form a generalization of the term algebra. Morphisms of nondeterministic models are introduced. Both innovations prove to be powerful tools in the analysis of input/output behavior. Extraction equivalence and observable equivalence of values are investigated. Quotient models for such equivalence relations are constructed. The equivalence relations are compared with each other, with separation of values by means of experiments, and with the separation property that characterizes a terminal model. Examples are given to show that the four concepts are different. In deterministic models the concepts coincide.
Analysis of function applications in deep arrays
Authors: J. Philip Benkard
Venue: ACM SIGAPL APL Quote Quad (1986)

Function arrays are easy to understand in APL when the leaves are primitive scalar functions. Herein other kinds of functions, called generically subscalars, are studied as items in functions arrays. Some example primitive shave an internal analog of structure. They are explicated using an experimental DEPTH operator and some defined subprimitive functions. Subscalar leaves of function arrays interrupt the promulgation of scalar conformance in a resumable fashion reminiscent of the data types of Kajiya [6].
MIS in Soviet industrial enterprise: the limits of reform from above
Authors: William K. McHenry, Seymour E. Goodman
Venue: Communications of the ACM (1986)

The USSR has carried out a large-scale program to bring computer-based information systems, called Automated Enterprise Management Systems (ASUPs), to industrial enterprises. This program illustrates the extent to which computer-based information systems are inextricably embedded in the surrounding social, economic, and political systems.
Boundary evaluation of non-convex primitives to produce parametric trimmed surfaces
Authors: Gary A. Crocker, William F. Reinke
Venue: Proceedings of the 14th annual conference on Computer graphics and interactive techniques (1987)

To integrate a CSG-based solid modeler into an existing wireframe/surface modeling system, new boundary evaluation technology has been developed. This scheme uses exact representations for the simple quadric surfaces and both exact and approximate representations of higher-order curved surfaces. It supports parametric primitives (box, wedge, sphere, cylinder, cone, torus), procedural primitives (extrusion, revolution, tube) and a sculptured surface primitive. The output includes curves, parametric trimmed surfaces, and a data structure of adjacency information.An existing boundary evaluator (PADL-2's) has been enhanced to allow a general non-convex faceted primitive with planar and quadric facets. This new hybrid evaluator combines two techniques for curve/primitive classification. PADL-2's existing halfspace-based classification is reserved for the simple convex primitives, and a new ray firing based classification is applied to the non-convex primitives. After evaluation, approximate intersection curves (from intersections involving higher order surfaces) are refined to a specified tolerance by exploiting an exact parametric representation of the surfaces of the primitives. The refined curves and the quadric surface intersection curves are used to create a parametric trimmed surface representation of the solid. This combination of techniques and representations offers advantages in accuracy, robustness and efficiency suitable to a production environment.
Instruction issue logic for high-performance, interruptable pipelined processors
Authors: G. S. Sohi, S. Vajapeyam
Venue: Proceedings of the 14th annual international symposium on Computer architecture (1987)

The performance of pipelined processors is severely limited by data dependencies. In order to achieve high performance, a mechanism to alleviate the effects of data dependencies must exist. If a pipelined CPU with multiple functional units is to be used in the presence of a virtual memory hierarchy, a mechanism must also exist for determining the state of the machine precisely. In this paper, we combine the issues of dependency-resolution and preciseness of state. We present a design for instruction issue logic that resolves dependencies dynamically and, at the same time, guarantees a precise state of the machine, without a significant hardware overhead. Detailed simulation studies for the proposed mechanism, using the Lawrence Livermore loops as a benchmark, are presented.
A VLIW architecture for a trace Scheduling Compiler
Authors: Robert P. Colwell, Robert P. Nix, John J. O'Donnell, David B. Papworth, Paul K. Rodman
Venue: IEEE Transactions on Computers (1988)

A VLIW (very long instruction word) architecture machine called the TRACE has been built along with its companion Trace Scheduling compacting compiler. This machine has three hardware configurations, capable of executing 7, 14, or 28 operations simultaneously. The 'seven-wide' achieves a performance improvement of a factor of five or six for a wide range of scientific code, compared to machines of higher cost and fast chip implementation technology (such as the VAX 8700). The TRACE extends some basic reduced-instruction-set computer (RISC) precepts: the architecture is load/store, the microarchitecture is exposed to the compiler, there is no microcode, and there is almost no hardware devoted to synchronization, arbitration, or interlocking of any kind (the compiler has sole responsibility for run-time resource usage). The authors discuss the design of this machine and present some initial performance results.
The reduction of perturbed Markov generators: an algorithm exposing the role of transient states
Authors: Jan Robin Rohlicek, Alan S. Willsky
Venue: Journal of the ACM (JACM) (1988)

A new algorithm for the hierarchical aggregation of singularly perturbed finite-state Markov processes is derived. The approach taken bridges the gap between conceptually simple results for a relatively restricted class of processes and the significantly more complex results for the general case. The critical role played by (almost) transient states is exposed, resulting in a straightforward algorithm for the construction of a sequence of aggregate generators associated with various time scales. These generators together provide a uniform asymptotic approximation of the original probability transition function.
On strictness and its analysis
Authors: T.-M. Kuo, P. Mishra
Venue: Proceedings of the 14th ACM SIGACT-SIGPLAN symposium on Principles of programming languages (1987)

We study the strictness problem for the untyped lambda-calculus and for an ML-like typed calculus. We establish that strictness is a necessary and sufficient condition for the &ldquo;eager&rdquo; evaluation of function arguments. For the untyped calculus, we show that the strictness problem is elementary and describe a complete algorithm for strictness analysis of convergent terms. We show that typed terms possess a much richer set of strictness properties. A type-theoretic characterization of strictness is developed and it is shown that the strictness properties of a term can be represented as a collection of types related to the standard term type. A set of type inference rules that support reasoning about strictness related types is given. The inference rules are shown to be invariant under type change by substitution. This provides a sound basis for reasoning about strictness properties of terms by considering only their principal type. For our final result, we describe a practical system that carries out type checking and strictness analysis simultaneously in a unified framework. Our main result is thus the discovery that the problem of strictness analysis is a particular case of type inference.
On the verification of sequential machines at differing levels of abstraction
Authors: S. Devadas, H.-K. T. Ma, A. R. Newton
Venue: Proceedings of the 24th ACM/IEEE Design Automation Conference (1987)

In this paper, an algorithm is presented for the verification of the equivalence of two sequential circuit descriptions at the same or differing levels of abstraction, namely at the register-transfer (RT) level and the logic level. The descriptions represent general finite automata at the differing levels - a finite automaton can be described in a ISP-like language and its equivalence to a logic level implementation can be verified using our algorithm. Two logic level automatons can be similarly verified for equivalence. Previous approaches to sequential circuit verification have been restricted to verifying relatively simple descriptions with small amounts of memory. Unlike these approaches, our technique is shown to be computationally efficient for much more complex circuits. The efficiency of our algorithm lies in the exploitation of don't care information derivable from the RTL or logic level description (e.g. invalid input and output sequences) during the verification process. Using efficient cube enumeration procedures at the logic level we have been able to verify the equivalence of finite automata with a large number of states in small amounts of CPU-time.
How to construct random functions
Authors: Oded Goldreich, Shafi Goldwasser, Silvio Micali
Venue: Journal of the ACM (JACM) (1986)

A constructive theory of randomness for functions, based on computational complexity, is developed, and a pseudorandom function generator is presented. This generator is a deterministic polynomial-time algorithm that transforms pairs (g, r), where g is any one-way function and r is a random k-bit string, to polynomial-time computable functions &fnof;r: {1, &hellip; , 2k} &rarr; {1, &hellip; , 2k}. These &fnof;r's cannot be distinguished from random functions by any probabilistic polynomial-time algorithm that asks and receives the value of a function at arguments of its choice. The result has applications in cryptography, random constructions, and complexity theory.
Data allocation in distributed database systems
Authors: Peter M. G. Apers
Venue: ACM Transactions on Database Systems (TODS) (1988)

The problem of allocating the data of a database to the sites of a communication network is investigated. This problem deviates from the well-known file allocation problem in several aspects. First, the objects to be allocated are not known a priori; second, these objects are accessed by schedules that contain transmissions between objects to produce the result. A model that makes it possible to compare the cost of allocations is presented; the cost can be computed for different cost functions and for processing schedules produced by arbitrary query processing algorithms. For minimizing the total transmission cost, a method is proposed to determine the fragments to be allocated from the relations in the conceptual schema and the queries and updates executed by the users. For the same cost function, the complexity of the data allocation problem is investigated. Methods for obtaining optimal and heuristic solutions under various ways of computing the cost of an allocation are presented and compared. Two different approaches to the allocation management problem are presented and their merits are discussed.
A Multiplier Chip with Multiple-Valued Bidirectional Current-Mode Logic Circuits
Authors: Michitaka Kameyama, Shoji Kawahito, Tatsuo Higuchi
Venue: Computer (1988)

A description is given of a 32*32-bit signed digit multiplier implemented with multiple-valued, bidirectional, current-mode circuits and based on two-microcomputer complementary metal-oxide-semiconductor technology. The multiplier can perform 32-bit two's-complement multiplication with three-stage SD full adders using a binary-tree addition scheme The effective multiplier size in the chip and the power dissipation are almost half that of the corresponding binary CMOS multiplier. The multiply time is comparable to that of the fastest binary multiplier. These results establish the effectiveness of the technology for future very large scale integration.
Reading and writing with computers: a framework for explaining differences in performance
Authors: Wilfred J. Hansen, Christina Haas
Venue: Communications of the ACM (1988)

Several factors can influence the behavior of users as they read and write with computers. Recent research indicates that both quality and quantity depend upon page size, legibility, responsiveness and tangibility.
Contexts&mdash;a partitioning concept for hypertext
Authors: Norman M. Delisle, Mayer D. Schwartz
Venue: ACM Transactions on Information Systems (TOIS) (1987)

Hypertext systems provide good information management support for a wide variety of documentation efforts. These efforts range from developing software to writing a book. However, existing hypertext systems provide poor support for collaboration among teams of authors. This paper starts by briefly describing properties of several existing hypertext systems. Then several models for forming partitions in a hypertext database are examined and contexts, a partitioning scheme that supports multiperson cooperative efforts, are introduced. The semantic issues involved in defining contexts are explored in detail.
Beginners' strategies in example based expert systems
Authors: T Whalen, B Schott
Venue: Proceedings of the ACM SIGART international symposium on Methodologies for intelligent systems (1986)

Supervising student teams who worked with expert practitioners to build prototype expert systems has yielded insights into the frustrations and rewards of the early stages of knowledge engineering. This paper presents these insights to the expert systems community, particularly those beginning their first project or entering a wholly new application area. We focus on example based rule induction shells without imprecision. While such tools are generally too limited for implementing a finished, deliverable expert system, they are useful for &ldquo;breaking the ice&rdquo; with a quick, inexpensive demonstration system while acquiring the vital first elements of the eventual expert knowledge base.