ppxscal/embedding_network huggingface dataset:
A 2.5GHz CMOS Fully-Integrated \Delta\Sigma-Controlled Fractional-N Frequency Synthesizer
Authors: Rasoul Dehghani
Venue: Proceedings of the 17th International Conference on VLSI Design (2004)

The design of a fully-integrated \Delta\Sigma-controlledfractional-N frequency synthesizer is described.Using adual modulus 64/72 prescalar based on injection lockingtechnique and a novel third order digital \Delta\Sigma modulator,we achieved an extremely low power synthesizer in2.5GHz band.. Total power dissipation of the frequencysynthesizer is less than 6mW at a 1.5V supply.The loopbandwidth is optimized to achieve a -123dBc/Hz phasenoise at 3MHz offset frequency.The locking time of theloop is less than 30µs.
On a Theorem of Ganter
Authors: Van H. Vu
Venue: Combinatorics, Probability and Computing (1997)

We prove a generalization of a theorem of Ganter concerning the embedding of partial Steiner systems into Steiner systems. As an application we discuss a further version of the problem of Rosenfeld on embedding graphs into strongly regular graphs.
Capturing collaborative designs to assist the pedagogical process
Authors: Mark Ratcliffe, Lynda Thomas, Wayne Ellis, Benjy Thomasson
Venue: ACM SIGCSE Bulletin (2003)

This paper describes a project being undertaken at the University of Wales, Aberystwyth that captures students' designs in an attempt to improve the pedagogy. To enhance their understanding of object oriented programming, students are given an environment that enables distance working and encourages group collaboration whilst capturing all aspects of development of their designs. To enhance the teaching of programming and software design, instructors are given access to complete design histories enabling them to better understand how the students view their design processes, the problems that arise and the steps that they take to resolve them.
Technology Selection and Commitment in New Product Development: The Role of Uncertainty and Design Flexibility
Authors: V. Krishnan, Shantanu Bhattacharya
Venue: Management Science (2002)

Selecting the right technologies to incorporate in new products is a particularly challenging aspect of new product definition and development. While newer advanced technologies may offer improved performance, they also make the product development process more risky and challenging. In this paper, we focus on the problem of technology selection and commitment under uncertainty, a major challenge to firms in turbulent environments. We argue that the "pizza-bin" approach of rejecting prospective technologies outright may not serve firms well when the pressure to differentiate products is enormous. After motivating the challenges and decisions facing firms using a real-life application from Dell Computer Corporation, we formulate a mathematical model of a firm that must define its products in the presence of technology uncertainty. Specifically, the firm faces two options: (i) aproven technology that is known to be viable and (ii) aprospective technology that offers superior price to performance results but whose viability is not a fully certain outcome. To minimize the impact of technology uncertainty, we consider two approaches to design flexibility, termedparallel path andsufficient design, which allow the firm to concurrently develop its products while the technology is being validated. Our analysis helps understand appropriateness of the different flexible design approaches. We illustrate our model with the Dell portable computer example and note the managerial implications of our analysis.
Distributed Path Selection (DPS) A Traf.c Engineering Protocol for IP-Networks
Authors: Chris Loeser, André Brinkmann, Ulrich Rückert
Venue: Proceedings of the Proceedings of the 37th Annual Hawaii International Conference on System Sciences (HICSS'04) - Track 7 - Volume 7 (2004)

The path selection strategy of an autonomous system (AS) has got a strong impact on the latency of packets travelling through the AS and the throughput of the underlying network. Intheoretical analysis it has been shown for a simple load balancing approach that it can achieve a near optimal packet throughput even in the case of a dynamically changing network and for adversarial packet injections. Similar results have not been shown for any other protocol. The drawbacks of this load balancing approach are that it requires a large amount of information that has to be spread among the network, that it does not detect the drop out of nodes, and that it requires a complex buffer management. In this paper we examine the new routing protocol DPS (Distributed Path Selection) that is based on this simple load balancing approach. DPS overcomes its restrictions by the use of new protocol enhancements and is able to transfer the optimal properties of the load balancing approach into a routing protocol. Comparing DPS with OSPF and RIP by simulation, we will show that DPS is able to significantly improve the properties of the path system by considering the network topology as well as the traffic pattern while calculating the path system in a reasonable amount of time.
Universal aspects of probabilistic automata
Authors: Lutz Schröder, Paulo Mateus
Venue: Mathematical Structures in Computer Science (2002)

Frequently, mathematical structures of a certain type and their morphisms fail to form a category for lack of composability of the morphisms; one example of this problem is the class of probabilistic automata when equipped with morphisms that allow restriction as well as relabelling. The proper mathematical framework for this situation is provided by a generalisation of category theory in the shape of the so-called precategories, which are introduced and studied in this paper. In particular, notions of adjointness, weak adjointness and partial adjointness for precategories are presented and justified in detail. This makes it possible to use universal properties as characterisations of well-known basic constructions in the theory of (generative) probabilistic automata: we show that accessible automata and decision trees, respectively, form coreflective subprecategories of the precategory of probabilistic automata. Moreover, the aggregation of two automata is identified as a partial product, whereas restriction and interconnection of automata are recognised as Cartesian lifts.
Heterogeneous Architecture and Testbed for Simulation of Large-Scale Real-Time Systems
Authors: Mandar A. Mathuré, Vinay Jonnalagadda, Janusz Zalewski
Venue: Proceedings of the Seventh IEEE International Symposium on Distributed Simulation and Real-Time Applications (2003)

This paper presents the development of distributed simulation architecture and testbed by combining three different types of tools based on three different approaches to real-time simulation: queuing theory (with SES/workbench as supporting tool), finite state machines (with high-level software design tools, such as Rational Rose Realtime or ObjecTime Developer), and continuous simulation based on solving differential equations (injecting real-time data from a real-time simulator running on a VMEbus platform under VxWorks real-time kernel). Such a combination is very advantageous because it provides the capability of making real-time decisions within the design and simulation tools, which can help significantly improve the quality of simulations.
Dynamical properties of strongly interacting Markov chains
Authors: Nihat Ay, Thomas Wennekers
Venue: Neural Networks (2003)

Spatial interdependences of multiple stochastic units can be suitably quantified by the Kullback-Leibler divergence of the joint probability distribution from the corresponding factorized distribution. In the present paper, a generalized measure for stochastic interaction, which also captures temporal interdependences, is analysed within the setting of Markov chains. The dynamical properties of systems with strongly interacting stochastic units are analytically studied and illustrated by computer simulations. In particular, the emergence of determinism in such systems is demonstrated.
Face reconstruction from monocular video using uncertainty analysis and a generic model
Authors: Amit K. Roy Chowdhury, Rama Chellappa
Venue: Computer Vision and Image Understanding (2003)

Reconstructing a 3D model of a human face from a monocular video sequence is an important problem in computer vision, with applications to recognition, surveillance, multimedia, etc. However, the quality of 3D reconstructions using structure from motion (SfM) algorithms is often not satisfactory. One of the reasons is the poor quality of the input video data. Hence, it is important that 3D face reconstruction algorithms take into account the statistics representing the quality of the video. Also, because of the structural similarities of most faces, it is natural that the performance of these algorithms can be improved by using a generic model of a face. Most of the existing work using this approach initializes the reconstruction algorithm with this generic model. The problem with this approach is that the algorithm can converge to a solution very close to this initial value, resulting in a reconstruction which resembles the generic model rather than the particular face in the video which needs to be modeled. In this paper, we propose a method of 3D reconstruction of a human face from video in which the 3D reconstruction algorithm and the generic model are handled separately. We show that it is possible to obtain a reasonably good 3D SfM estimate purely from the video sequence, provided the quality of the input video is statistically assessed and incorporated into the algorithm. The final 3D model is obtained after combining the SfM estimate and the generic model using an energy function that corrects for the errors in the estimate by comparing the local regions in the two models. The main advantage of our algorithm over others is that it is able to retain the specific features of the face in the video sequence even when these features are different from those of the generic model and it does so even as the quality of the input video varies. The evolution of the 3D model through the various stages of the algorithm and an analysis of its accuracy are presented.
On the capacity of finite state channels and the analysis of convolutional accumulate-m codes
Authors: Henry David Pfister
Venue:  (2003)

What are the fundamental limits of communications channels and channel coding systems? In general, these limits manifest themselves as thresholds which separate what is possible from what is not. For example, the capacity of a communications channel is a coding rate threshold above which reliable communication is not possible. At any coding rate below capacity, however, reliable communication is possible. Likewise, all fixed rate coding schemes have channel noise thresholds above which the probability of decoding error cannot be made arbitrarily small. When the channel noise is below the threshold, many of the same coding systems can operate with very small error probability. In this dissertation, we consider the noise thresholds of Convolutional Accumulate- m (CA-m) codes, the capacity of finite state channels (FSCs), and the information rates achievable via joint iterative decoding of irregular low-density parity-check (LDPC) codes over channels with memory. CA-m codes are a class of turbo-like codes formed by serially concatenating a terminated convolutional code with a cascade of m interleaved rate-1 &ldquo;accumulate&rdquo; codes. The first two chapters consider these codes from two different perspectives. First, the sequence of m encoders is analyzed as a Markov chain to show that these codes converge to random codes, which are nearly optimal, as m goes to infinity. Next, a detailed threshold analysis is performed for both maximum likelihood and iterative decoding of long CA-m codes with finite m. A FSC is a discrete-time channel whose output depends on both the channel input and the channel state. A simple Monte Carlo method is introduced which estimates the achievable information rate of any FSC driven by finite memory Markov inputs. Until recently, there has been no practical method of estimating the capacity of a FSC. This Monte Carlo method enables one to compute a non-decreasing sequence of lower bounds on the capacity. The joint iterative decoding of irregular LDPC codes over channels with memory is also considered. For a class of erasure channels with memory, we derive a closed form recursion that can be used to verify necessary and sufficient conditions for successful decoding.
Ion beam fabrication of metal/insulator/HT-superconductor nanostructures for field effect transistor
Authors: V. M. Mikoushkin, V. V. Mamutin, S. E. Sysoev, V. V. Shnitov, Yu. S. Gordeev
Venue: Microelectronic Engineering (2003)

The paper suggests a new method of controllable fabrication of 'Metal/Insulator/Superconductor' (MIS) structures with nano- and subnanometer thicknesses of layers and interfaces. The method is based on ion-induced self-organizing restructuring near surface regions of high temperature superconductors (HTSC). At the first stage of the process, break of chemical metal-oxygen bonds stimulated by ion bombarding takes place. Then metal atoms diffuse towards the surface and form metallic segregate. The irradiated region loses its superconductivity and is turns into insulator. The dielectric layer thickness is determined by the ion penetration depth that can be regulated by varying the ion energies. The processes pointed out and properties of the structures created have been studied by using electron spectroscopy. As compared to the known structures, the discovered ones are characterized by fundamentally thinner layers and interfaces.
Post-Javaism
Authors: Andrew P. Black
Venue: IEEE Internet Computing (2004)

The Java programming language has been a phenomenal success. It's a significant improvement over C and C++, and its libraries for network and GUI programming have introduced large numbers of programmers to previously esoteric disciplines.But Java isn't the end of programming language history. What language will we use 10 or 20 years from now?
Arithmetic shifting considered harmful
Authors: Guy L. Steele
Venue: ACM SIGPLAN Notices (1977)

For more than a decade there has been great confusion over the semantics of the standard "arithmetic right shift" instruction. This confusion particularly afflicts authors of computer reference handlings and of optimizing compilers. The fact that shifting is not always equivalent to division has been rediscovered over and over again over the year, but has never been publicized.This paper quotes a large number of sources to prove the widest extent of this confusion, and then proceeds to a short discussion of the problem itself and what to do about it.
First Order Conditions for Nonsmooth Discretized Constrained Optimal Control Problems
Authors: Xiaojun Chen
Venue: SIAM Journal on Control and Optimization (2003)

This paper studies first order conditions (Karush--Kuhn--Tucker conditions) for discretized optimal control problems with nonsmooth constraints. We present a simple condition which can be used to verify that a local optimal point satisfies the first order conditions and that a point satisfying the first order conditions is a global or local optimal solution of the optimal control problem.
Casual 3D photography
Authors: Askold V. Strat, Manuel M. Oliveira
Venue: ACM SIGGRAPH 2003 Sketches Applications (2003)

We describe the construction of a lightweight, point-and-shoot 3D color camera, intended for reconstruction of smooth surfaces. Our approach extracts 3D shape from a single image and is completely automatic. The 3D camera consists of an eye-safe laser pattern generator attached to a consumer-grade digital camera and some image processing software.
Compiler-decided dynamic memory allocation for scratch-pad based embedded systems
Authors: Sumesh Udayakumaran, Rajeev Barua
Venue: Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems (2003)

This paper presents a highly predictable, low overhead and yet dynamic, memory allocation strategy for embedded systems with scratch-pad memory. A scratch-pad is a fast compiler-managed SRAM memory that replaces the hardware-managed cache. It is motivated by its better real-time guarantees vs cache and by its significantly lower overheads in energy consumption, area and overall runtime, even with a simple allocation scheme [4].Existing scratch-pad allocation methods are of two types. First, software-caching schemes emulate the workings of a hardware cache in software. Instructions are inserted before each load/store to check the software-maintained cache tags. Such methods incur large overheads in runtime, code size, energy consumption and SRAM space for tags and deliver poor real-time guarantees just like hardware caches. A second category of algorithms partitionsm variables at compile-time into the two banks. For example, our previous work in [3] derives a provably optimal static allocation for global and stack variables and achieves a speedup over all earlier methods. However, a drawback of such static allocation schemes is that they do not account for dynamic program behavior. It is easy to see why a data allocation that never changes at runtime cannot achieve the full locality benefits of a cache.In this paper we present a dynamic allocation method for global and stack data that for the first time, (i) accounts for changing program requirements at runtime (ii) has no software-caching tags (iii) requires no run-time checks (iv) has extremely low overheads, and (v) yields 100% predictable memory access times. In this method data that is about to be accessed frequently is copied into the SRAM using compiler-inserted code at fixed and infrequent points in the program. Earlier data is evicted if necessary. When compared to a provably optimal static allocation our results show runtime reductions ranging from 11% to 38%, averaging 31.2%, using no additional hardware support. With hardware support for pseudo-DMA and full DMA, which is already provided in some commercial systems, the runtime reductions increase to 33.4% and 34.2% respectively.
Smart doorplate
Authors: Wolfgang Trumler, Faruk Bagci, Jan Petzold, Theo Ungerer
Venue: Personal and Ubiquitous Computing (2003)

This paper introduces the vision of smart doorplates within an office building. The doorplates are able to display current situational information about the office owner, to act instead of the office owner in case of absence, and to direct visitors to the current location of the office owner based on a location-tracking system. Different scenarios are proposed and a prototype implementation is presented.
Modification of silicon-on-insulator structures under nano-scale device fabrication
Authors: O. V. Naumova, I. V. Antonova, V. P. Popov, Yu V. Nastaushev, T. A. Gavrilova, L. V. Litvin, A. L. Aseev
Venue: Microelectronic Engineering (2003)

Based on the characterization of the ultrathin silicon-on-insulator (SOI) test structures, the effects of charge at the interface between the top silicon layer and the buried oxide (bonded interface) are studied during different technology steps (thinning of the top silicon layer and plasma etching). SOI structures were fabricated by wafer bonding and hydrogen slicing technology. An increase in the charge with the thinning of the top silicon layer and introduction of the mobile charge or the slow interface states after the plasma etching were found for the SOI structures. The conductance oscillations have been observed at room temperature in the ultrathin silicon layers due to formation of tunnel barriers for one type of carriers caused by charge fluctuation.
Augmenting Conjoint Analysis to Estimate Consumer Reservation Price
Authors: Kamel Jedidi, Z. John Zhang
Venue: Management Science (2002)

Consumer reservation price is a key concept in marketing and economics. Theoretically, this concept has been instrumental in studying consumer purchase decisions,competitive pricing strategies,and welfare economics. Managerially,knowledge of consumer reservation prices is critical for implementing many pricing tactics such as bundling,tar get promotions,nonlinear pricing,and one-to-one pricing,and for assessing the impact of marketing strategy on demand. Despite the practical and theoretical importance of this concept, its measurement at the individual level in a practical setting proves elusive.We propose a conjoint-based approach to estimate consumer-level reservation prices. This approach integrates the preference estimation of traditional conjoint with the economic theory of consumer choice. This integration augments the capability of traditional conjoint such that consumers' reservation prices for a product can be derived directly from the individuallevel estimates of conjoint coefficients. With this augmentation,we can model a consumer's decision of not only which product to buy,but also whether to buy at all in a category. Thus, we can simulate simultaneously three effects that a change in price or the introduction of a new product may generate in a market: the customer switching effect,the cannibalization effect,and the market expansion effect. We show in a pilot application how this approach can aid product and pricing decisions. We also demonstrate the predictive validity of our approach using data from a commercial study of automobile batteries.
MOM-G: Message-Oriented Middleware on Grid Environment Based on OGSA
Authors: Jianquan Tang, Weiqing Tong, Jingbo Ding, Lizhi Cai
Venue: Proceedings of the 2003 International Conference on Computer Networks and Mobile Computing (2003)

OGSA (open gird service architecture) implements grid service that is an abstract of every resource via the web services. But the XML-RPC (remote procedure call based on the eXtensibile Mark Language) convention that grid service commonly uses limits the convenientand massive data transmission. A new mechanism, which is MOM (message-oriented middleware) based on OGSA, is presented here to efficiently solve this problem. It can be utilized by the grid service instances to exchange data with high performance by simplifyingdata communication mechanism in OGSA. Our MOM mechanism is based not on RPC style message, but original SOAP (simple object access protocol) message.
A BSP/CGM Algorithm for Computing Euler Tours in Graphs
Authors: E. N. Cáceres, C. Y. Nasu
Venue: Proceedings of the 15th Symposium on Computer Architecture and High Performance Computing (2003)

In this paper we describe a parallel algorithm using the BSP/CGM model (Bulk Synchronous Parallel/Coarse Grained Multicomputer) to obtain the Euler tours in graphs. It is based on the PRAM (Parallel Random Access Machine) algorithm by Cáceres et al. For an input graph of n vertices and m edges, the algorithm requires local computation time of O(m + n)/p), O(m + n'p) memory and O(log p) communication rounds, where p is the number of processors. To our knowledge there are no other parallel algorithms under the coarse-grained models for the Euler tours in graphs. The proposed algorithm is implemented using MPI (Message Passing Interface) and the C language. The parallel program runs on a Beowulf with 66 nodes. The implementation results confirm the theoretical complexity results of the algorithm.