ppxscal/embedding_network huggingface dataset:
Workshops of CASCON 2007
Authors: Kelly Lyons
Venue: Proceedings of the 2007 conference of the center for advanced studies on Collaborative research (2007)

CASCON workshops provide a forum to present, discuss, and debate issues, problems, ideas, emerging technologies, work-in-progress, or directions on topics such as software best practices, software engineering, distributed and Web-based systems, data management, software development tools, electronic commerce, and user experience. Interdisciplinary workshops are particularly encouraged. The workshop format may include position papers, expert panels, hands-on exercises, and discussions. In 2007 there were 43 workshops over the course of four days.
Satisfiability-based automatic test program generation and design for testability for microprocessors
Authors: Loganathan Lingappan, Niraj K. Jha
Venue: IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2007)

In this paper, we present a satisfiability (SAT)-based framework for automatically generating test programs that target gate-level stuck-at faults in microprocessors. The microarchitectural description of a processor is first translated into a unified register-transfer level (RTL) circuit description, called assignment decision diagram (ADD), for test analysis. Test generation involves extraction of justification/propagation paths in the unified circuit representation from an embedded module's input-output (I/O) ports to primary I/O ports, abstraction of RTL modules in the justification/propagation paths, and translation of these paths into Boolean clauses in conjunctive normal form (CNF). Additional clauses are added that capture precomputed test vectors/responses at the embedded module's I/O ports. An SAT solver is then invoked to find valid paths that justify the precomputed vectors to primary input ports and propagate the good/faulty responses to primary output ports. Since the ADD is derived directly from a microarchitectural description, the generated test sequences correspond to a test program. If a given SAT instance is not satisfable, then Boolean implications (also known as the unsatisfiable segment) that are responsible for unsatisfiability are efficiently and accurately identified. We show that adding design for testability (DFT) elements is equivalent to modifying these clauses such that the unsatisfiable segment becomes satisfiable. Test generation at the RTL also imposes a large number of initial conditions that need to be satisfied for Successful detection of targeted stuck-at faults. We demonstrate that application of the Boolean constraint propagation (BCP) engine in SAT solvers propagates these conditions leading to significant pruning of the sequential search space which in turn leads to a reduction in test generation time. Experimental results demonstrate an 11.1X speedup in test generation time for test generation at the RTL over a state-of-the-art gate-level sequential generator called MIX, at comparable fault coverages. An unsatisifiability-based DFT approach at the RTL improves this fault coverage to near 100% and incurs very low area overhead (3.1%). Unlike previous approaches that either generate a test program consisting of random instruction sequences or assume the existence of test program templates, the proposed approach constructs test programs in a deterministic fashion from the microarchitectural description of a processor.
SA-REST and (S)mashups: Adding Semantics to RESTful Services
Authors: Jon Lathem, Karthik Gomadam, Amit P. Sheth
Venue: Proceedings of the International Conference on Semantic Computing (2007)

The evolution of the Web 2.0 phenomenon has led to the increased adoption of the RESTful services paradigm. RESTful services often take the form of RSS/Atom feeds and AJAX based light weight services. The XML based messaging paradigm of RESTful services has made it possible to compose various services together. Such compositions of RESTful services is widely referred to as Mashups. In this paper, we outline the limitations in current approaches to creating mashups. We address these limitations by proposing a framework called as SA-REST. SA-REST adds semantics to RESTful services. Our proposed framework builds upon the original ideas in WSDL-S, our W3C submission, which was subsequently adapted for Semantic Annotation of WSDL (SAWSDL), now a W3C proposed recommendation. We demonstrate use of microformats for semantic annotation of RESTful services and then the use of such semantically enabled services with better support for interoperability for creating dynamic mashups called SMashups.
Improving the quality of use case descriptions: empirical assessment of writing guidelines
Authors: Keith Thomas Phalp, Jonathan Vincent, Karl Cox
Venue: Software Quality Control (2007)

Use cases are the main requirements vehicle of the UML and are used widely to specify systems. Hence, the need to write clear and accurate use case descriptions has a significant impact for many practitioners. However, many have pointed to weaknesses in the support offered to those writing use cases, and a number of authors advocate the use of rules in the composition and structuring of use case descriptions. These rules constrain the user, by only allowing certain grammatical constructions, typically guiding the structure or the style of the description For example, the CREWS research project pioneered Use Case Authoring Guidelines, suggesting that the adoption of such guidelines improved resulting use case descriptions. Replication of CREWS studies appeared to confirm the view that use case descriptions were improved through the application of guideline sets, but also noted that learning such rules presented a significant overhead. Hence, a leaner set of guidelines (the CP rules) was developed.This paper describes empirical work to assess the utility of these two sets of writing guidelines (CREWS and CP). In particular, descriptions are assessed against a set of established criteria--a use case quality description checklist, which the authors described in a previous paper.Our findings suggest that the leaner set of guidelines performs at least as well in terms of their ability to produce clear and accurate (comprehensible) descriptions. Hence, that a tractable set of rules may prove applicable to the industrial context, which could lead to effective validation of use cases.
A Flexible Real-Time Locking Protocol for Multiprocessors
Authors: Aaron Block, Hennadiy Leontyev, Bjorn B. Brandenburg, James H. Anderson
Venue: Proceedings of the 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (2007)

Real-time scheduling algorithms for multiprocessor systems have been the subject of considerable recent interest. For such an algorithm to be truly useful in practice, support for semaphore-based locking must be provided. However, for many global scheduling algorithms, no such mechanisms have been proposed. Furthermore, in the partitioned case, most prior semaphore schemes are either inefficient or restrict critical sections considerably. In this paper, a new flexible multiprocessor locking scheme is presented that can be applied under both partitioning and global scheduling. This scheme allows unrestricted critical-section nesting, but has been designed to deal with the common case of short non-nested accesses efficiently.
On The Passing Of MOBIDIC-B
Authors: M. D. Abrams, R. Rosenthal
Venue: Computer (1973)

In 1965 MOBIDIC-B was acquired by the National Bureau of Standards for use in its computer research facility. It has been employed as both object and tool in numerous projects including intermachine communication, multi-programming, process control and research applications programming. During its tenure significant modifications have been made to its hardware configuration and instruction set. Its history is summarzed in Figure 1. Now that MOBIDIC-B is nearing the end of its useful life, it is fitting that we record the essential characteristics of this one-of-a-kind, but significant, machine.
Ensembling Bayesian network structure learning on limited data
Authors: Feng Liu, Fengzhan Tian, Qiliang Zhu
Venue: Proceedings of the sixteenth ACM conference on Conference on information and knowledge management (2007)

In recent years, Bagging method has been applied to learn Bayesian networks (BNs), especially on limited datasets. However, the BNs learned using Bagging method from limited datasets can be biased towards complex models. We present an efficient approach to produce more accurate BNs from limited datasets. Based on the Markov condition of BN learning, we proposed a novel sampling method, called Root Nodes based Sampling (RNS), and a BNs fusion method. The experimental results reveal that our ensemble method can achieve more accurate results in terms of accuracy on limited datasets.
Robust Stability Analysis for Uncertain Fuzzy Systems with Time-Varying Delays
Authors: Yijing Wang, Zhiqiang Zuo
Venue: Proceedings of the Fourth International Conference on Fuzzy Systems and Knowledge Discovery - Volume 01 (2007)

This paper considers the problem of robust stability for Takagi-Sugeno fuzzy systems with time-varying delays and norm-bounded uncertainties. By choosing a more general Lyapunov-Krasovskii functional and using some slack ma- trix variables to express the relationship between the system matrices and the terms of Leibniz-Newton formula, a new less conservative delay-dependent condition for robust sta- bility is derived. Neither model transformation nor bound- ing technique for cross terms is involved in the derivation of the stability condition. Two numerical examples are given to illustrate the effectiveness of the proposed methods.
Spectral Properties of Waveforms Generated by Smooth Sequences
Authors: M. Cohn, A. J. Lincoln
Venue: IEEE Transactions on Computers (1971)

We investigate the spectral component at a desired frequency (f= p/2q) of two-level waveforms constrained to change level only at integer values of time. We conclude that the component at the frequency is maximized if and only if the level changes coincide with the pulses of a smooth sequence of rate p/q.
An Efficient Ellipse-Drawing Algorithm
Authors: Jerry Van Aken
Venue: IEEE Computer Graphics and Applications (1984)

Low-cost PCs and workstations with bit-mapped graphics possess limited processing power. As a result, efficient algorithms are needed to draw curves interactively.
Self-Adaptive Crossover Particle Swarm Optimizer for Multi-dimension Functions Optimization
Authors: Dongyong Yang, Jinyin Chen, Matsumoto Naofumi
Venue: Proceedings of the Third International Conference on Natural Computation - Volume 04 (2007)

Based on analyzing that solution diversity can be improved by bringing crossover operation into particle swarm optimization, crossover particle swarm optimizer is put forward and applied to optimize multi-dimension benchmark functions. Outcomes testify that Crossover PSO can achieve better performances than other current mended PSOs, and cost less CPU time. Four self-adaptive probability models are adopted to adjust the crossover probability based on particle swarm optimization convergence model. Results and convergence rate of the four models are compared and analyzed finally.
Application-independent accurate mouse placements on surfaces of arbitrary geometry
Authors: Harlen Costa Batagelo, Wu Shin Ting
Venue: Proceedings of the XX Brazilian Symposium on Computer Graphics and Image Processing (2007)

Most direct manipulation tasks rely on precise placements of the cursor on the object of interest. Commonly, this requires the knowledge of distinct application-dependent geometry attributes of this object computed on the CPU. In this work, we present a simple yet general GPU-based framework for computing such attributes without depending on application-specific algorithms. In particular, it provides, for each pixel of the rendered model, elements of discrete differential geometry that require only the vertex data and 1-ring connectivity of each vertex stored in video memory. We validate our framework by showing how, only by providing correct mouse placements even when the geometry is modified on GPU, it can support the implementation of many direct manipulation tasks presented on the literature. Implementation results are presented.
Dynamic Programming for Minimum Steiner Trees
Authors: B. Fuchs, W. Kern, D. Molle, S. Richter, P. Rossmanith, X. Wang
Venue: Theory of Computing Systems (2007)

We present a new dynamic programming algorithm that solves the minimum Steiner tree problem on graphs with k terminals in time O*(ck) for any c > 2. This improves the running time of the previously fastest parameterized algorithm by Dreyfus-Wagner of order O*(3k) and the so-called "full set dynamic programming" algorithm solving rectilinear instances in time O*(2.38k).
Sharp groups, two-weight codes and maximal arcs
Authors: David M. Bundy
Venue: European Journal of Combinatorics (2008)

Many rank 2 sharp groups have a normal elementary abelian subgroup whose action can be constructed from a two-weight linear code. The sharp groups of this kind are characterized using a correspondence between these two-weight codes and maximal arcs in a projective geometry. A description of those rank 2 sharp groups which occur as subgroups of an affine linear group is also given. These sharp groups are either geometric or have a normal elementary abelian subgroup corresponding to a two-weight linear code which in turn corresponds to the complement of a hyperplane in a projective geometry.
Systolic Architecture for Computational Fluid Dynamics on FPGAs
Authors: Kentaro Sano, Takanori Iizuka, Satoru Yamamoto
Venue: Proceedings of the 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (2007)

This paper presents an FPGA-based flow solver based on the systolic architecture. We show that the fractional-step method employing central difference schemes can be expressed as a systolic algorithm, and therefore the systolic architecture is suitable for a dedicated processor to the flow solver. We have designed a 2D systolic array of cells, each of which has a micro-programmable data-path containing a MAC (multiplication and accumulation) unit and a local memory to store necessary data for computational fluid dynamics. With ALTERA Stratix II FPGA, we implemented 96(= 12 × 8) cells running at 60MHz. Since the MAC unit has both an adder and a multiplier for single-precision floating-point numbers, the total peak performance is 11.5(= 96×60MHz×2) GFlops. We made a choice of 2D square driven cavity flow as a benchmark computation based on the fractional-step method. For this computation, the FPGA-based processor running only at 60MHz achieved 7.14 and 6.41 times faster computations than Pentium4 processor at 3.2 GHz and Itanium2 at 1.4 GHz, respectively.
Measuring Reuse during the Analysis Phase of Domain Framework Development
Authors: Simone Nasser Matos, Clovis Torres Fernandes
Venue: Proceedings of the International Conference on Software Engineering Advances (2007)

Some metrics applied to the domain framework development not evaluate the reuse from example applications model. This work establishes a group of metrics that can be applied to evaluate the reuse during the analysis phase of domain framework development. Using the proposed group of metrics, it was possible to measure the requirements reuse of the example applications. These metrics allow confronting the amount of frozen and hot spots found in initial phases. The application of these metrics was illustrated by a Car Racing Game framework, built through a responsibility-driven method.
Mobile Phone Based Interaction with Everyday Products - On the Go
Authors: Robert Adelmann
Venue: Proceedings of the The 2007 International Conference on Next Generation Mobile Applications, Services and Technologies (2007)

Linking the physical world with information and services is a powerful concept. Even though RFID technology is very promising, the widespread use of RFID tags on retail products remains unlikely for the next years. In contrast, barcodes are ubiquitous - printed on virtually all consumer items world-wide. Recently there is an increasing interest in applications based on the recognition of standard 1D barcodes using the built-in cameras of mobile phones. Since many of the potential applications are especially useful when being "on the go", e.g., while shopping, a simple and fast user interaction is essential. In this paper we want to present two contributions that enable such a simple and fast interaction with everyday products and their services: A system for the recognition of 1D barcodes on mobile phones that differs in two aspects from already existing solutions: the fast and robust real-time recognition of codes on the camera's video images as well as the live detection of additional code parameters, like the barcode's relative orientation to the mobile phone. Besides that, we present and suggest the usage of these additional parameters in order to ease and accelerate the user interaction process - for example with the help of orientation sensitive menus.
Key-Insulated Group Signature Scheme with Verifier-Local Revocation
Authors: Rupeng Li, Jia Yu, Jin Wang, Guowen Li, Daxing Li
Venue: Proceedings of the Eighth ACIS International Conference on Software Engineering, Artificial Intelligence, Networking, and Parallel/Distributed Computing - Volume 03 (2007)

In group signature schemes, the user's group secret key is often stored on insecure devices e.g. mobile phones that are likely to be compromised by an adversary. To mitigate the damage of key exposure in group signature schemes, we proposed a key-insulated group signature scheme. The group secret key stored on an insecure device is refreshed at discrete time periods via interaction with a physically-secure device that stores a "master key". Our scheme has secure and random-access key updates. The exposure of up to t of the T time periods, chosen adaptively by the adversary, still keeps any period that was not exposed secure. Our scheme also adopts method of Verifier-Local Revocation (VLR) and supports backward unlinkability, i.e. previously signed signatures remain valid, anonymous and unlinkable even after the signer is revoked.
A use of discontinuity elements in coarse and fine stereo matching
Authors: Panadda Sangteanchai, Suthep Madarasami
Venue: Proceedings of the third conference on IASTED International Conference: Advances in Computer Science and Technology (2007)

We present a coarse-and-fine algorithm that also uses discontinuity edge elements for stereo matching. The model uses a pyramid of multi-resolution scale images as input to create multiple disparity maps and discontinuity maps for the horizontal and vertical edges. The energy cost model includes the data constraint within each grid layer, smoothness constraint within each grid, and the inter-grid constraint to make sure there is consistency between neighboring resolution grids. Edge elements have an effect on the smoothness constraint in all the resolution levels to reduce an error from trying to smooth between discontinuity regions. We also propose a method to propagate the edge constraint between neighboring resolution grids. Using the Gibbs Sampler with simulated annealing optimization, we obtain the disparity and edge maps as a result of our algorithm. Results for various test images are presented.
Design and Implementation of Control Point under the Home Network Environments
Authors: Oh-Hyun Kwon, Sung-Min Cho
Venue: Proceedings of the 5th ACIS International Conference on Software Engineering Research, Management & Applications (2007)

Variable types of middleware and devices could be required for the construction of home networks. Recently, interoperability among various type of system is emphasized in spite of the increasing cost and complexity of interface. This thesis is dealing with the Control Point that can control and interface with variable devices under the home network environments composed of different typed middleware and devices. For example, UPnP devices or other type of devices including software bundle can be used on some framework like OSGi. These devices and software should be operated as one unit system, and for this, we'd like to design and implement Control Point to handle UPnP devices and other system devices under the home network environments. We applied design pattern for the enforcing reusability and extension of the classes designed.
A Prototype of Semantic-Based Intelligent Search Engine for Chinese Documents
Authors: Haiyan Che, Jigui Sun, Tao Jing, Xi Bai
Venue: Proceedings of the Fourth International Conference on Fuzzy Systems and Knowledge Discovery - Volume 02 (2007)

To overcome the shortcomings of traditional search engines, advocates a prototype of semantic-based search engine, called CRAB. By combining technologies of Semantic Web, Information Extraction (IE), Natural Language Processing (NLP) and a novel theme-based method, this framework can extract factual knowledge from Chinese natural language documents automatically. Instead of list of document links, results of user's query request returned from CRAB are semantically coherent reports generated intelligently, which can satisfy users greatly.
Evaluation of Ontology Development Methodology with CMM-i
Authors: Jeong Ah Kim, Seung Young Choi
Venue: Proceedings of the 5th ACIS International Conference on Software Engineering Research, Management & Applications (2007)

As the importance of Semantic Web and web 2.0 are rapidly increased, many tries on ontology construction have been increased. For ontology development, many methodologies and techniques are proposed and applied. But, until now, there is not standard methodology for ontology engineering even ontology engineering has similar characteristics with software engineering. In this paper, to suggest the guideline of ontology methodology, we evaluate the ontology development methodologies with CMM-i.
Computer Graphics for Quality Assurance
Authors: V. W. Gott
Venue: IEEE Computer Graphics and Applications (1982)

A computer graphics system expedites the acquisition of reliable data for use in analysis and quality inspection of parts and tools. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
B74-4 Minicomputers in Data Processing and Simulation
Authors: J. D. Schoeffler
Venue: IEEE Transactions on Computers (1974)

The stated purpose of Branko Soucek's book Minicomputers in Data Processing and Simulation is to present the theory and application of digital simulation and measurement of data with emphasis on the use of minicomputers. The title is somewhat misleading, however, because the book is of interest to an even wider audience, including those interested in data acquisition, monitoring, industrial process and manufacturing control, and others. In particular, the section concerned with minicomputer hardware organization and interfacing collects information of great interest in a very readable fashion and fills a long existing void.
Modeling Security Protocols as Games
Authors: Mohamed Saleh, Mourad Debbabi
Venue: Proceedings of the Third International Symposium on Information Assurance and Security (2007)

We model security protocols as a game tree using concepts of game semantics. The model interprets protocol specifications as strategies over a game tree that represents the type of the protocol. The specifications are written in the simple arrow notation commonly used. The model allows us to give formal semantics to this notation. Furthermore, the model can be used for verification of various security properties.