ppxscal/embedding_network huggingface dataset:
Lattice computers for approximating Euclidean space
Authors: John Case, Dayanand S. Rajan, Anil M. Shende
Venue: Journal of the ACM (JACM) (2001)

In the context of mesh-like, parallel processing computers for (i) approximating continuous space and (ii) analog simulation of the motion of objects and waves in continuous space, the present paper is concerned with which mesh-like interconnection of processors might be particularly suitable for the task and why. Processor interconnection schemes based on nearest neighbor connections in geometric lattices are presented along with motivation. Then two major threads are exploded regarding which lattices would be good: the regular lattices, for their symmetry and other properties in common with continuous space, and the well-known root lattices, for being, in a sense, the lattices required for physically natural basic algorithms for motion. The main theorem of the present paper implies that thewell-known lattice An is the regular lattice having the maximum number of nearest neighbors among the n-dimensional regular lattices. It is noted that the only n-dimensional lattices that are both regular and root are An and Zn (Zn is the lattice of n-cubes. The remainder of the paper specifies other desirable properties of An including other ways it is superior to Zn for our purposes.
Effectiveness of the ASIP design system PEAS-III in design of pipelined processors
Authors: Akira Kitajima, Makiko Itoh, Jun Sato, Akichika Shiomi, Yoshinori Takeuchi, Masaharu Imai
Venue: Proceedings of the 2001 Asia and South Pacific Design Automation Conference (2001)

In this paper, the effectiveness of the ASIP (Application Specific Instruction set Processor) design system PEAS-III is evaluated through experiments. Examples in experiments are a MIPS R3000 compatible processor, DLX, a simple RISC controller, and PEAS-I core. While they are simple in-order pipelined processors, they have enough facilities for real embedded system design. Through experiments, easiness of design and modification for improvement and design quality in terms of performance and hardware cost are discussed. It has been confirmed that the design method used in PEAS-III is effective to design space exploration for simple pipelined processors.
Timestamps in key distribution protocols
Authors: Dorothy E. Denning, Giovanni Maria Sacco
Venue: Communications of the ACM (1981)

The distribution of keys in a computer network using single key or public key encryption is discussed. We consider the possibility that communication keys may be compromised, and show that key distribution protocols with timestamps prevent replays of compromised keys. The timestamps have the additional benefit of replacing a two-step handshake.
Addressing verification bottlenecks of fully synthesized processor cores using equivalence checkers
Authors: G. Subash Chandar, S. Vaideeswaran
Venue: Proceedings of the 2001 Asia and South Pacific Design Automation Conference (2001)

Formal verification plays an important role in the verification of complex processors. In this paper, we discuss the usage and impact of equivalence checking in the verification of TI's TMS320C27X DSP core. During various phases of the design, we need to ensure the correctness of the design, a significant part of which could be best done with an equivalence checker. (For example, verifying the functionality of the netlist after CTS insertion with the one before CTS insertion). The capabilities and limitations of the commercial equivalence checkers are studied and a set of guidelines for their effective usage during different phases of the design is proposed. Also, a set of RTL coding guidelines to make the design equivalence checker friendly is detailed. Further, we discuss constrained mode equivalence checking which could be used if the implementation design is a super set of reference design. The verification cycle time reduction and the salient features of an automated methodology that was developed specifically for our DSP core are described.
Remarks on simulation of Boolean functions
Authors: George G. Dodd
Venue: Communications of the ACM (1965)

Recently M. Morris Mano presented a method for performing Boolean OR, AND and NOT operations by means of arithmetic and conditional transfer operations in a decimal computer lacking builtin logical instructions [1]. When A, B, C are variables whose defined value is 0 or 1 and a, b, c are the corresponding integer variables with values 0 or 1, his Boolean OR was defined by: &ldquo;The result of an OR operation of Boolean variables is the same as the arithmetic addition of the a, b, c integer variables after which the following test is made: (a) If the sum is equal to zero, the result is correct; (b) If the sum is larger than zero, the answer is 1.&rdquo;
BUGSYS: a programming system for picture processing&mdash;not for debugging
Authors: R. S. Ledley, J. Jacobsen, M. Belson
Venue: Communications of the ACM (1966)

BUGSYS is a picture processing and measuring system that depends upon a pictorial input to the computer's memory. BUGSYS can be used for many types of applications. In particular, the authors have used the system for the analysis of linear graphs. The main concept of the system is the use of a collection of programmable pointers, which are visualized as a family of &ldquo;bugs.&rdquo;
Evolving coordination strategies in simulated robot soccer
Authors: André L. V. Coelho, Daniel Weingaertner
Venue: Proceedings of the fifth international conference on Autonomous agents (2001)

This paper describes research investigating the evolution of coordination strategies in robot soccer teams. Each player (viewed as an agent) is provided with a common set of skills and is assigned to perform over a delimited area inside a soccer field. The idea is to optimize the whole team behavior by means of a spatial co- adaptation process in which new players are selected in such a way to comply with the already existing ones.
A Residue Number System on Reconfigurable Mesh with Applications to Prefix Sums and Approximate String Matching
Authors: Alan A. Bertossi, Alessandro Mei
Venue: IEEE Transactions on Parallel and Distributed Systems (2000)

Several new number representations based on a Residue Number System are presented which use the smallest prime numbers as moduli and are suited for parallel computations on a reconfigurable mesh architecture. The bit model of linear reconfigurable mesh with exclusive write and unit-time delay for broadcasting on a subbus is assumed. It is shown how to convert in $O(1)$ time any integer, ranging between $0$ and $n-1$, from any commonly used representation to any new representation proposed in this paper (and vice versa) using an $n\times O\left({\log^2 n\over\log\log n}\right)$ reconfigurable mesh. In particular, some of the previously known conversion techniques are improved. Moreover, as a byproduct, it is shown how to compute in $O(1)$ time the Prefix Sums of $n$ bits by a reconfigurable mesh having the above mentioned size, thus improving previously known results. Applications to the Prefix Sums of $N$h-bit integers and to Approximate String Matching with $\alpha$ mismatches are also considered. The Summation and the Prefix Sums can be computed in $O(1)$ time using $O\left(h\log N+ {\log^2 N\over\log\log N}\right)\times Nh$ and $O\left({h^2+\log^2 N\over\log(h+\log N)}\right)\times O(N(h+\log N))$ reconfigurable meshes, respectively. Moreover, it is shown for the first time how to find in $O(1)$ time all the occurrences of a pattern of length $m$ in a text of length $n$, allowing less than $\alpha$ mismatches, using a reconfigurable mesh of size $O(m\log|\Sigma|)\times O\left(n\left(\log|\Sigma|+{\log^2\alpha\over\log\log\alpha}\right)\right)$, where the pattern and the text are strings over a finite alphabet $\Sigma$ and $\alpha
Matrix Multiplication and Data Routing Using a Partitioned Optical Passive Stars Network
Authors: Sartaj Sahni
Venue: IEEE Transactions on Parallel and Distributed Systems (2000)

We develop optimal or near optimal algorithms to multiply matrices and perform commonly occurring data permutations and BPC permutations on multiprocessor computers interconnected by a partitioned optical passive stars network.
Intimacy and embodiment: implications for art and technology
Authors: Sidney Fels
Venue: Proceedings of the 2000 ACM workshops on Multimedia (2000)

People have aesthetic experiences when they manipulate objects skillfully. Highly skilled performance with an object requires forming a highly intimate relationship with it. Aesthetics flow from this intimacy. This paper discusses three works which bring together technology and art to illustrate the issues of intimacy and embodiment. The three works are: Iamascope, video cubism and the forklift ballet.
The importance of modal bandwidth in Gigabit Ethernet systems
Authors: David N. Koon
Venue: International Journal of Network Management (2001)

This article deals with the evaluation of bandwidth measurements in Gigabit Ethernet Systems using an empirical data model. It concentrates on the use of multimode fibers due to the advent of Vertical Surface Emitting Laser &lpar;VCSEL&rpar; technology that improves the performance of multimode fiber optics. Copyright &copy; 2001 John Wiley Sons, Ltd.
Bootstrap confidence intervals for ratios of expectations
Authors: Denis Choquet, Pierre L 'ecuyer, Christian Léger
Venue: ACM Transactions on Modeling and Computer Simulation (TOMACS) (1999)

We are concerned with computing a confidence interval for the ratio E[Y]/E[X, where (X,Y) is a pair of random variables. This ratio estimation problem arises in, for instance, regenerative simulation. As an alternative to confidence intervals based on asymptotic normality, we study and compare different variants of the bootstrap for one-sided and two-sided intervals. We point out situations where these techniques provide confidence intervals with coverage much closer to the nominal value than do the classical methods.
Block structures, indirect addressing, and garbage collection
Authors: R. Y. Kain
Venue: Communications of the ACM (1969)

Programming languages have included explicit or implicit block structures to provide a naming convenience for the programmer. However, when indirect addressing is used, as in SNOBOL, naming constraints may be introduced. Two modifications to SNOBOL are described, resulting in two desirable consequences: (1) naming constraints disappear even when there is indirect addressing within function definitions; and (2) there is a significant saving in the number of calls to the garbage collector, because some garbage is collected, at little expense, each time a function returns to its calling program. These modifications have been implemented as an extension to a SNOBOL dialect.
Towards effective embedded processors in codesigns: customizable partitioned caches
Authors: Peter Petrov, Alex Orailğlu
Venue: Proceedings of the ninth international symposium on Hardware/software codesign (2001)

This paper explores an application-specific customization technique for the data cache, one of the foremost area/power consuming and performance determining microarchitectural features of modern embedded processors. The automated methodology for customizing the processor microarchitecture that we propose results in increased performance, reduced power consumption and improved determinism of critical system parts while the fixed design ensures processor standardization. The resulting improvements help to enlarge the significant role of embedded processors in modern hardware/software codesign techniques by leading to increased processor utilization and reduced hardware cost. A novel methodology for static analysis and a field-reprogrammable implementation of a customizable cache controller that implements a partitioned cache structure is proposed. The simulation results show significant decrease of miss ratio compared to traditional cache organizations.
Algorithm 464: eigenvalues of a real, symmetric, tridiagonal matrix [F2]
Authors: Christian H. Reinsch
Venue: Communications of the ACM (1973)

This algorithm uses a rational variant of the QR transformation with explicit shift for the computation of all of the eigenvalues of a real, symmetric, and tridiagonal matrix. Details are described in [1]. Procedures tred1 or tred3 published in [2] may be used to reduce any real, symmetric matrix to tridiagonal form. Turn the matrix end-for-end if necessary to bring very large entries to the bottom right-hand corner.
Impact of computing platforms on the performance of the asymmetric traveling salesman problem
Authors: Milan E. Soklic
Venue: ACM SIGCSE Bulletin (2000)

This article discusses a serial and a parallel version of a heuristic algorithm for a solution to the traveling salesman problem, implementation of these algorithms, and their performance in terms of finding the most favorable solution, and an average solution. The algorithms implemented in C sequential programming language, and in Occam concurrent programming language were run on different computing platforms to study their impact on the comparative value of the solutions each platform provided. The programs were tested on reference data from TSPLIB data files, a collection of sample instances of traveling salesman problem. Experimental results, using asymmetric cost matrix, indicate good performance compared to the optimal solutions provided in the TSPLIB reference library.
Noncommutative Enumeration in Graded Posets
Authors: Louis J. Billera, Niandong Liu
Venue: Journal of Algebraic Combinatorics: An International Journal (2000)

We define a noncommutative algebra of flag-enumeration functionals on graded posets and show it to be isomorphic to the free associative algebra on countably many generators. Restricted to Eulerian posets, this ring has a particularly appealing presentation with kernel generated by Euler relations. A consequence is that even on Eulerian posets, the algebra is free, with generators corresponding to odd jumps in flags. In this context, the coefficients of the cd-index provide a graded basis.
What Do You Know about Mail?Knowledge Representation in the SINIX Consultant
Authors: Christel Kemke
Venue: Artificial Intelligence Review (2000)

The SINIX Consultant is an intelligent help system for the SINIX operating system which answers natural language questions about SINIX concepts and commands and gives unsolicited advice to a user as well. In this paper the representation of domain knowledge in the SINIX Consultant will be discussed, i.e. the representation of concepts of the SINIX operating system in the so-called SINIX Knowledge Base. The SINIX Knowledge Base is a taxonomical hierarchy of SINIX concepts which are divided into objects and actions operating on these objects. A single concept in the knowledge base is described by a set of attributes reflecting structural or syntactical features, the use, application and purpose of the command or object, and additional information for explaining the concept to the user. The description of commands in the SINIX Knowledge Base which is mainly used in order to generate tutorial explanations and advice for the user, and the main ideas of describing SINIX objects are outlined in this paper.
A collaborative and interdisciplinary computer animation course
Authors: David S. Ebert, Dan Bailey
Venue: ACM SIGGRAPH Computer Graphics (2000)

David Ebert and Dan Bailey have developed an innovative and supportive environment for art and computer science students to collaborate on large scale graphics projects. This is exciting because in many academic institutions, students from these two disciplines never have a chance to meet each other, much less work together. Ebert hails from the CSEE Department at the University of Maryland Baltimore County, and Bailey is a member of the Visual Arts Department at UMBC. In this article, they discuss their choice of topics, their pedagogy and an evaluation of what worked.
Multi-modal haptic device for large-scale virtual environments
Authors: Laroussi Buoguila, Masahiro Ishii, Makoto Sato
Venue: Proceedings of the eighth ACM international conference on Multimedia (2000)

The paper aims to present a new human-scale haptic device for virtual environment named Scaleable-SPIDAR (Space Interface Device for Artificial Reality), which provide to both hands different aspects of force feedback sensations, associated mainly with weight, contact and inertia within a cave-like space. Tensioned string techniques are used to generate such haptic sensations, while keeping the space transparent and unbulky. The device is scaleable so as to enclose different cave-like working space. Scaleable-SPIDAR is coupled with a large screen where a computer generated virtual world is displayed. The used approach is shown to be simple, safe and multi-modal interface for human-scale virtual environment (VE).
A parallel object-oriented manufacturing simulation language
Authors: Ye Zhang, Wentong Cai, Stephen J. Turner
Venue: Proceedings of the fifteenth workshop on Parallel and distributed simulation (2001)

When used to simulate manufacturing systems, most existing parallel simulation languages cannot easily implement some features of those systems, such as the scheduling rules of a machine or the sharing of operators by multiple machines. This paper presents the design and implementation of a Parallel Object-oriented Manufacturing Simulation Language, called POMSim. A POMSim simulation is developed by using the concept of classes (entity-types) and inheritance to support iterative design of efficient simulation models. POMSim completely hides all the details of parallel simulation, and provides simple and direct constructs to efficiently model the scheduling rules in manufacturing simulation. It also provides asynchronous method invocation and synchronous function call. Pomsim libraries predefine a set of basic classes for manufacturing simulation, each of which represents a particular component in the physical manufacturing system.
A Further Extension of the KKMS Theorem
Authors: Yakar Kannai, Myrna H. Wooders
Venue: Mathematics of Operations Research (2000)

Reny and Wooders (1998) showed that there is some point in the intersection of sets in Shapley's (1973) generalization of the Knaster-Kuratowski-Mazurkiwicz Theorem with the property that the collection of all sets containing that point is partnered as well as balanced. We provide a further extension by showing that the collection of all such sets can be chosen to be strictly balanced, implying the Reny-Wooders result. Our proof is topological, based on the Eilenberg-Montgomery Fixed Point Theorem. Reny and Wooders (1998) also show that if the collection of partnered points in the intersection is countable, then at least one of them is minimally partnered. Applying degree theory for correspondences, we show that if this collection is assumed to be zero-dimensional, then there is at least one strictly balanced and minimally partnered point in the intersection. Our approach sheds a new geometric-topological light on the Reny-Wooders results.
Exploring spatial audio conferencing functionality in multiuser virtual environments (poster session)
Authors: Yasuhiro Yamazaki, Jens Herder
Venue: Proceedings of the third international conference on Collaborative virtual environments (2000)

A chatspace was developed that allows conversation with 3D sound using networked streaming in a shared virtual environment. The system provides an interface to advanced audio features, such as a &ldquo;whisper function&rdquo; for conveying a confided audio stream. This study explores the use of spatial audio to enhance a user's experience in multiuser virtual environments.
At the Forge: Content Management
Authors: Reuven M. Lerner
Venue: Linux Journal (2000)

Reuven writes about Mason, the Web development system.
A programmable multi-language generator for CoDesign
Authors: J. P. Calvez, D. Heller, F. Muller, O. Pasquier
Venue: Proceedings of the conference on Design, automation and test in Europe (1998)

This paper presents an innovative technique to efficiently develop hardware and software code generators. The specification model is first converted into its equivalent data structure. Target programs result from a set of transformation rules applied to the data structure. These rules are written in a textual form named Script. Moreover, transformations for a specific code generator are easier to describe because our solution uses a template of the required output as another input. The result is a meta-generator entirely written in Java. The concept and its implementation have been demonstrated by developing a C/WxWorks code generator, a behavioral VHDL generator, a synthesizable VHDL generator.
Generic Convergence of Descent Methods in Banach Spaces
Authors: Simeon Reich, Alexander J. Zaslavski
Venue: Mathematics of Operations Research (2000)

Given a continuous convex functionf on a Banach spaceX , we consider a complete metric space of vector fieldsV onX with the topology of uniform convergence on bounded subsets. With each such vector field we associate two iterative processes. We show that for a genericV the values of the functionf tend to its infimum for both processes.
Design and implementation of an interoperable GIS-interface for grid data
Authors: Ludger Becker, Stefan Hammelbeck, Klaus Hinrichs
Venue: Proceedings of the 8th ACM international symposium on Advances in geographic information systems (2000)

The paper describes experiences gained during the design and implementation of the VirGIS interface for spatio-temporal applications using grid data. The interface is designed to offer a high degree of interoperability. There are two implementations of the interface. This paper primarily considers the one that is based on the Object-Oriented Geo-Data Model OOGDM.
A prediction system for multimedia pre-fetching in Internet
Authors: Zhong Su, Qiang Yang, Hong-Jiang Zhang
Venue: Proceedings of the eighth ACM international conference on Multimedia (2000)

The rapid development of Internet has resulted in more and more multimedia in Web content. However, due to the limitation in the bandwidth and huge size of the multimedia data, users always suffer from long time waiting. On the other hand, if we can predict the web object or page that the user most likely will view next while the user is viewing the current page, and pre-fetch the content, then the perceived network latency can be significantly reduced. In this paper, we present an n-gram based model to utilize path profiles of users from very large web log to predict the users' future requests. Our model is based on a simple extension of existing point-based models for such predictions, but our results show that by sacrificing the applicability somewhat one can gain a great deal in prediction precision. Also we present an efficient method to compress the prediction model size so that it can be fitted into the main memory. Our result can potentially be applied to a wide range of applications on the web, including pro-fetching, enhancement of recommendation systems as well as web caching policies. The experiments based on three realistic web logs have proved the effectiveness of the proposed scheme.
Optimal temporal partitioning and synthesis for reconfigurable architectures
Authors: M. Kaul, R. Vemuri
Venue: Proceedings of the conference on Design, automation and test in Europe (1998)

We develop a 0-1 non-linear programming (NLP) model for combined temporal partitioning and high-level synthesis from behavioral specifications destined to be implemented on reconfigurable processors. We present tight linearizations of the NLP model. We present effective variable selection heuristics for a branch and bound solution of the derived linear programming model. We show how tight linearizations combined with good variable selection techniques during branch and bound yield optimal results in relatively short execution times.