ppxscal/embedding_network huggingface dataset:
Superscalar Instruction Execution in the 21164 Alpha Microprocessor
Authors: John H. Edmondson, Paul Rubinfeld, Ronald Preston, Vidya Rajagopalan
Venue: IEEE Micro (1995)

The 21164 is a new quad-issue superscalar Alpha microprocessor. This new high-performance chip can execute 1.2 billion instructions per second. The part became available in January of 1995 and delivered SPECint92/SPECfp92 performance of 335/500 (estimated), performance unmatched by other commercially available microprocessors. It is implemented in 0.5 micron CMOS and the CPU clock speed is 300 MHz. Instruction execution is controlled by the quad-issue superscalar instruction unit. There are two 64-bit integer execution pipelines and two 64-bit floating-point pipelines. Memory instructions are initiated in the integer pipelines and are completed by the memory and bus interface units that together implement a high-throughput memory subsystem employing a multi-level cache hierarchy.
Riemann-problem and level-set approaches for homentropic two-fluid flow computations
Authors: B. Koren, M. R. Lewis, E. H. van Brummelen, B. van Leer
Venue: Journal of Computational Physics (2002)

A finite-volume method is presented for the computation of compressible flows of two immiscible fluids at very different densities. A novel ingredient in the method is a linearized, two-fluid Osher scheme, allowing for flux computations in the case of different fluids (e.g., water and air) left and right of a cell face. A level-set technique is employed to distinguish between the two fluids. The level-set equation is incorporated into the system of hyperbolic conservation laws. Fixes are presented for the solution errors (pressure oscillations) that may occur near two-fluid interfaces when applying a capturing method. The fixes are analyzed and tested. For two-fluid flows with arbitrarily large density ratios, a simple variant of the ghost-fluid method appears to be a perfect remedy. Computations for compressible water-air flows yield perfectly sharp, pressure-oscillation-free interfaces. The masses of the separate fluids appear to be conserved up to first-order accuracy.
Six Translations between Software-Speak and Management-Speak
Authors: Dorothy McKinney
Venue: IEEE Software (2002)

A source of communication problems between software engineers and managers is that they have not learned to speak each other's language. The author includes examples of some translations between "software-speak" and "management-speak." To prevent miscommunication, you should also think about the project from the other's perspective.When management is unable or unwilling to accept "reality" as the software engineering team sees it, the software engineer must then understand the business realities that management faces, and look for ways the organization, its customers, and the software team can all win.When a project looks hopeless, one approach is to look at previous project debacles to find possible solutions.
The Living Virtual Kinka Kuji Temple: A Dynamic Environment
Authors: Scot Thrane Refsland, Takeo Ojika, Robert Berry
Venue: IEEE MultiMedia (2000)

The authors used emergent properties and chaos found in live data streams to bring a "living" element (fireflies) into a model of the Golden Temple (Kinka Kuji) in Kyoto, Japan.
A Participant's Perspective
Authors: R. Gary Daniels
Venue: IEEE Micro (1996)

As an active participant for the last 25 years, R. Gary Daniels, senior vice president and general manager of Motorola's Microcontroller Technologies Group, shares his views on the history of the microprocessor--beginning with Intel's 4004 in 1971 to the present. The article reviews significant events that set the stage for the microprocessor, including the introduction of the world's first electronic computer in 1946 and the invention of the transistor in 1948. The "father" of the 6805, Daniels examines key microprocessor and microcontroller milestones of companies including Motorola, Texas Instruments, Zilog, and Digital Equipment.
A Filter That Prevents the Spread of Mail-Attachment-Type Trojan Horse Computer Worms
Authors: Shinji Kobayashi, Masamichi Goudge, Toshio Makie, Eisuke Hanada, Mine Harada, Yoshiaki Nose
Venue: Journal of Medical Systems (2002)

The malicious code &ldquo;W32/Sircam&rdquo; is spread via e-mail and potentially through the file space shared by local area networks. Such Trojan-horse-type computer worms easily penetrate Internet firewalls and propagate via the &ldquo;backdoor&rdquo; to other computers. Once a malicious code, such as &ldquo;W32/Sircam,&rdquo; has been executed on a system, it may reveal or delete confidential data, such as clinical records. In order to protect against the leakage of clinical records, we devised a mail filter that successfully prevents the spread of mail containing this malicious code. It is significant that neither access control nor packet filtering is guaranteed to prevent the spread of this mail-attachment-type Trojan horse computer worm.
Intelligent Agents in the Nuclear Industry
Authors: Huaiqing Wang, Chen Wang
Venue: Computer (1997)

The Advanced Plant Analysis and Control System introduces intelligent agents into the operation of a modern nuclear operating environment. APACS was designed to demonstrate the benefits of introducing intelligent agent technology into the real-time process industry. APACS differs from other monitoring systems in that it allows the addition of new agents without interrupting the operation of existing agents. It could therefore be adapted to other domains. Preliminary efforts are already underway to adapt the APACS agents to deal with petrochemical plants. Migrating the APACS system to a petrochemical plant would only require constructing a new domain ontology, because many of the existing agent implementations could be efficiently reused.
Advance: Network- and Customer-Administration Architecture
Authors: Terry Turner, Ben Hurley
Venue: IEEE Software (1993)

Advance, one of the RACE I telecommunication-management-network projects, is reviewed. The main goal of Advance was to recommend how sophisticated network- and customer-administration systems should be designed and developed. Although the project did not set out to define an architecture for advanced information processing, the project team found that this work was much more important than the initial RACE work plan suggested. Advance examined many architectural issues, defined a unifying concept, and developed a prototype architecture and computing platform.
Packet Scheduling in Next-Generation Multiterabit Networks
Authors: Itamar Elhanany, Michael Kahane, Dan Sadot
Venue: Computer (2001)

Multiterabit networks will require innovative queuing strategies and high-performance scheduling algorithms to meet the future packet-scheduling challenge.
Finding Solutions Through Pattern Languages
Venue: Computer (1994)

Considers how interest in patterns and pattern languages has been on the upswing, fueled by the realization among software developers that they must simplify the process of building increasingly large and complex systems. Patterns are forms for describing architectural constructs in a manner that emphasizes these constructs' potential for reuse. They provide a way to document and share design expertise in an application-independent fashion. As evidence of this growing interest, early in August more than 70 software practitioners gathered to discuss patterns and pattern languages at the first annual conference on Pattern Languages of Programs.
A Comparison of RISC Architectures
Authors: Richard S. Piepho, William S. Wu
Venue: IEEE Micro (1989)

Three new RISC (reduced instruction set computer) architectures, the Intel i860, the Motorola 88000, and the Sun Microsystems Sparc, are compared. The relative importance of an architectural comparison, as opposed to a comparison of implementations, is discussed, followed by a high-level overview of each of the architectures. The relative strengths and weaknesses of the three architectures in a number of key areas are analyzed, and their overall relative strengths and weaknesses are summarized.
Identifying Faces in a 2D Line Drawing Representing a Manifold Object
Authors: Jianzhuang Liu, Yong Tsui Lee, Wai-Kuen Cham
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (2002)

A straightforward way to illustrate a 3D model is to use a line drawing. Faces in a 2D line drawing provide important information for reconstructing its 3D geometry. Manifold objects belong to a class of common solids and most solid systems are based on manifold geometry. In this paper, a new method is proposed for finding faces from single 2D line drawings representing manifolds. The face identification is formulated based on a property of manifolds: each edge of a manifold is shared exactly by two faces. The two main steps in our method are 1) searching for cycles from a line drawing and 2) searching for faces from the cycles. In order to speed up the face identification procedure, a number of properties, most of which relate to planar manifold geometry in line drawings, are presented to identify most of the cycles that are or are not real faces in a drawing, thus reducing the number of unknown cycles in the second searching. Schemes to deal with manifolds with curved faces and manifolds each represented by two or more disjoint graphs are also proposed. The experimental results show that our method can handle manifolds previous methods can handle, as well as those they cannot.
Simulations of Time-Dependent Flows of Viscoelastic Fluids with Spectral Element Methods
Authors: Nicolas Fiétier, Michel O. Deville
Venue: Journal of Scientific Computing (2002)

This paper presents the application of spectral element methods to simulate the time-dependent flow of viscoelastic fluids in non-trivial geometries using a closed-form differential constitutive equation. As an example, results relative to the flow of a FENE-CR fluid in a two-dimensional four-to-one contraction are given.
An Approximation Algorithm for Scheduling Tasks on Varying Partition Sizes in Partitionable Multiprocessor Systems
Authors: R. Krishnamurti, E. Ma
Venue: IEEE Transactions on Computers (1992)

A partitionable multiprocessor system can form multiple partitions, each consisting of a controller and a varying number of processors. Given such a system and a set of tasks, each of which can be executed on partitions of varying sizes, the authors study the problem of choosing the partition sizes and a minimum completion time schedule for the execution of these tasks. They assume that the number of tasks to be scheduled on the system is no more than the maximum number of partitions that can be formed simultaneously by the system, and that parallelization of the tasks can achieve at most perfect speedup. They show this scheduling problem to be NP-hard, and present a polynomial time approximation algorithm for this problem. The authors derive a parameter dependent, asymptotically tight worst-case performance bound for the algorithm, and evaluate its average performance through simulation.
The State of the Art in Electronic Payment Systems
Authors: N. Asokan, Phillipe A. Janson, Michael Steiner, Michael Waidner
Venue: Computer (1997)

The exchange of goods conducted face-to- face between two parties dates back to before the beginning of recorded history. Traditional means of payment have always had security problems, but now electronic payments retain the same drawbacks and add some risks. Unlike paper, digital "documents" can be copied perfectly and arbitrarily often; digital signatures can be produced by anybody who knows the secret cryptographic key; a buyer's name can be associated with every payment, eliminating the anonymity of cash. Without new security measures, wide-spread electronic commerce is not viable. On the other hand, properly designed electronic payment systems can actually provide better security than traditional means of payments, in addition to flexibility. This article provides an overview of electronic payment systems, focusing on issues related to security.
A New Technique for Fast Number Comparison in the Residue Number System
Authors: G. Dimauro, S. Impedovo, G. Pirlo
Venue: IEEE Transactions on Computers (1993)

A technique for number comparison in the residue number system is presented, and its theoretical validity is proved. The proposed solution is based on using a diagonal function to obtain a magnitude order of the numbers. In a first approach the function is computed using a suitable extra modulus. In the final implementation of the technique the extra modulus has been inserted in the set of moduli of the residue system, avoiding redundancy. The technique is compared with other approaches.
Approximating normals for marching cubes applied to locally supported isosurfaces
Authors: Gregory M. Nielson, Adam Huang, Steve Sylvester
Venue: Proceedings of the conference on Visualization '02 (2002)

We present some new methods for computing estimates of normal vectors at the vertices of a triangular mesh surface approximation to an isosurface which has been computed by the marching cube algorithm. These estimates are required for the smooth rendering of triangular mesh surfaces. The conventional method of computing estimates based upon divided difference approximations of the gradient can lead to poor estimates in some applications. This is particularly true for isosurfaces obtained from a field function, which is defined only for values near to the isosurface. We describe some efficient methods for computing the topology of the triangular mesh surface, which is used for obtaining local estimates of the normals. In addition, a new, one pass, approach for these types of applications is described and compared to existing methods.
Gr&ouml;bner Bases for Problem Solving in Multidimensional Systems
Authors: C. Charoenlarpnopparut, N. K. Bose
Venue: Multidimensional Systems and Signal Processing (2001)

The objective here is to underscore recent usage of the algorithmic theory of Gr&ouml;bner bases in multidimensional systems since that possibility was highlighted about fifteen years back. The main contribution here focuses on the constructive aspects of the solution, known to exist, of the two-band multidimensional IIR perfect reconstruction problem using Gr&ouml;bner bases. Other recent research results on the subject with future prospects are also briefly cited.
Copper alloy formation and film properties after annealing of Al/Cu stacks in different ambients
Authors: Zhitao Chen, Kristin Richter, Stephan Riedel, Stefan E. Schulz, Thomas Gessner
Venue: Microelectronic Engineering (2002)

In this work, the improvement of MOCVD Cu properties by alloy formation was investigated. Sequential deposited A1/Cu bilayer and A1/Cu/A1 trilayer were annealed at 230-450°C in vacuum and H2. Additionally, the trilayer was annealed in N2. Vacuum annealing of both bilayer and trilayer stacks results in significant interdiffusion of A1 into Cu and remarkable resistivity increase accompanied with much better adhesion. A strong adhesion coupled with a moderate resistivity increase was found for the trilayer annealing in N2, being a promising approach for fabrication of copper alloy metallization. H2 annealing provides sufficient adhesion only for the trilayer and only at a very high temperature (400°C). The sheet resistance of all differently processed wafers were stable during half-year-storage except for one sample. The different results between the tested annealing ambients are discussed in detail in this paper.
RPL: An Expert System Language with Query Power
Authors: Lois M. L. Delcambre
Venue: IEEE Expert: Intelligent Systems and Their Applications (1988)

The author introduces RPL (the relational production language) and explores the opportunities it presents for expert database systems. RPL is a language for developing expert systems that bridges the gap between expert systems and database systems. The author also introduces an expert database system architecture based on the RPL approach. Specifically, she proposes a two-level database hierarchy in which the systems' outer level comprises conventional databases and the inner level contains an RPL interpreter using a memory-resident relational database to replace working memory. The system then uses RPL rules to express and control data staging between levels. The author also discusses related work, describes ongoing research, and presents her conclusions.
Trade-Off Analysis of Real-Time Control Performance and Schedulability*
Authors: Danbing Seto, John P. Lehoczky, Lui Sha, Kang G. Shin
Venue: Real-Time Systems (2001)

Most real-time computer-controlled systems are developed in two separate stages: controller design followed by its digital implementation. Computational tasks that implement the control algorithms are usually scheduled by treating their execution times and periods as unchangeable parameters. Task schedulability therefore depends only on the limited computing resources available. On the other hand, controller design is primarily based on the continuous-time dynamics of the physical system being controlled. The set of tasks resulting from this controller design may not be schedulable with the limited computing resources available. Even if the given set of tasks is schedulable, their overall performance may not be optimal in the sense that they do not make a full use of the computing resources. In this paper, we propose an integrated approach to controller design and task scheduling. Specifically, task frequencies (or periods) are allowed to vary within a certain range as long as such changes do not affect critical control functions such as the maintenance of system stability. We present an algorithm that determines the task frequencies such that a prescribed aspect of system performance is optimized subject to satisfaction of computing resource constraints. The tasks are then scheduled with the chosen frequencies. The proposed approach also addresses the issue of choosing controller processors.
Finding the right ATM switch for the market
Authors: Reza Rooholamini, Vladimir Cherkassky, Mark Garver
Venue: Computer (1994)

The asynchronous transfer mode (ATM) promises to be the ultimate on-premise internetworking technology. Its high-bandwidth uniform switches can transfer graphics, audio, video. and text from application to application at much higher speeds than now available. In fact, ATM may well be the technology that brings the computer and communications industries together. Because ATM as a public service offering by telecommunications companies will probably not be in place before 1996-1997, the authors focus on the ATM LAN and the corporate backbone. Most of the proposals on the internal architecture of the ATM switch are still at a research-and-evaluation stage, based on the switching architectures of the 1970s and 198Os. Various objectives, such as blocking, routing, performance and VLSI implementation, motivated past work. Although these attributes are essential, they don't address concerns important to the commercial ATM market, such as the general cost of ownership and incremental deployment, scalability, reliability, and efficient bandwidth utilization. The few ATM switches on the market today embody attributes that meet current demands but must evolve to meet the future. The authors assess the architectural characteristics deemed necessary for the ATM switch, providing an overview of its purpose and protocols, and summarize key ATM switch proposals. They summarize commercial market requirements and profile several commercially available systems to show the current gap between the research community and the commercial market, providing a model for the future.
Using metrics to manage software projects
Authors: Edward F. Weller
Venue: Computer (1994)

Five years ago, Bull's Enterprise Servers Operation in Phoenix, Arizona, used a software process that, although understandable, was unpredictable in terms of product quality and delivery schedule. The process generated products with unsatisfactory quality levels and required significant extra effort to avoid major schedule slips. All but the smallest software projects require metrics for effective project management. Hence, as part of a program designed to improve the quality, productivity, and predictability of software development projects, the Phoenix operation launched a series of improvements in 1989. One improvement based software project management on additional software measures. Another introduced an inspection program, since inspection data was essential to project management improvements. Project sizes varied from several thousand lines of code (KLOC) to more than 300 KLOC. The improvement projects enhanced quality and productivity. In essence, Bull now has a process that is repeatable and manageable, and that delivers higher quality products at lower cost. We describe the metrics we selected and implemented, illustrating with examples drawn from several development projects.
Thermophysical Algebraic Invariants from Infrared Imagery for Object Recognition
Authors: J. Michel, N. Nandhakumar, V. Velten
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1997)

An important issue in developing a model-based vision system is the specification of features that are invariant to viewing and scene conditions and also specific, i.e., the feature must have different values for different classes of objects. We formulate a new approach for establishing invariant features. Our approach is unique in the field since it considers not just surface reflection and surface geometry in the specification of invariant features, but it also takes into account internal object composition and state which affect images sensed in the nonvisible spectrum. A new type of invariance called Thermophysical Invariance is defined. Features are defined such that they are functions of only the thermophysical properties of the imaged objects. The approach is based on a physics-based model that is derived from the principle of the conservation of energy applied at the surface of the imaged object.
On Using Twisted-Ring Counters for Test Set Embedding in BIST
Authors: Shivakumar Swaminathan, Krishnendu Chakrabarty
Venue: Journal of Electronic Testing: Theory and Applications (2001)

We present a novel built-in self-test (BIST) architecture for high-performance circuits. The proposed approach is especially suitable for embedding precomputed test sets for core-based systems since it does not require a structural model of the circuit, either for fault simulation or for test generation. It utilizes a twisted-ring counter (TRC) for test-per-clock BIST and is appropriate for high-performance designs because it does not add any mapping logic to critical functional paths. Test patterns are generated on-chip by carefully reseeding the TRC. We show that a small number of seeds is adequate for generating test sequences that embed complete test sets for the ISCAS benchmark circuits.Instead of being stored on-chip, the seed patterns can also be scanned in using a low-cost, slower tester. The seeds can be viewed as an encoded version of the test set that is stored in tester memory. This requires almost 10X less memory than compacted test sets obtained from ATPG programs. This allows us to effectively combine high-quality BIST with external testing using slow testers. As the cost of high-speed testers increases, methodologies that facilitate testing using slow testers become especially important. The proposed approach is a step in that direction.