ppxscal/embedding_network huggingface dataset:
Design of efficient filter on liquid crystal polymer substrate for 5 GHz wireless LAN applications
Authors: Yasar Amin, Hannu Tenhunen, Habibullah Jamal, Li-Rong Zheng
Venue: Proceedings of the 4th WSEAS International Conference on Telecommunications and Informatics (2005)

Next generation wireless communications terminals will demand the use of advanced component integration processes and high density packaging technologies in order to reduce size and to increase performance. This paper presents high-density multilayer interconnects and integrated passives used to design high performance prototype filter for 5GHz wireless LAN receiver realized on LCP substrate. The thin film implementation of Multichip Module technology is identified as a useful platform for the integration of GaAs MMIC and silicon device technologies for microwave applications where performance, size and weight are critical factors. The ability of the MCM-D technology to provide controlled impedance, microstrip structures and integrated thin film passive components with useful performance in the microwave frequency regime has now been demonstrated.
Cache-efficient dynamic programming algorithms for multicores
Authors: Rezaul Alam Chowdhury, Vijaya Ramachandran
Venue: Proceedings of the twentieth annual symposium on Parallelism in algorithms and architectures (2008)

We present cache-efficient chip multiprocessor (CMP) algorithms with good speed-up for some widely used dynamic programming algorithms. We consider three types of caching systems for CMPs: D-CMP with a private cache for each core, S-CMP with a single cache shared by all cores, and Multicore, which has private L1 caches and a shared L2 cache. We derive results for three classes of problems: local dependency dynamic programming (LDDP), Gaussian Elimination Paradigm (GEP), and parenthesis problem. For each class of problems, we develop a generic CMP algorithm with an associated tiling sequence. We then tailor this tiling sequence to each caching model and provide a parallel schedule that results in a cache-efficient parallel execution up to the critical path length of the underlying dynamic programming algorithm. We present experimental results on an 8-core Opteron for two sequence alignment problems that are important examples of LDDP. Our experimental results show good speed-ups for simple versions of our algorithms.
Analysis and Design of Multi Agent Knowledge Development Process
Authors: Cheah Wai Shiang, Leon Sterling
Venue: Proceedings of the 19th Australian Conference on Software Engineering (2008)

Within multi agent systems (MAS), knowledge plays an important role in agent communication, reasoning and supporting interoperability. It is often considered as an ontology which contains explicit domain knowledge to be used by agents. Although there are many ontology development or engineering methodologies, current efforts to incorporate knowledge into MAS are too focused on computational aspects or ad hoc. Working at the computational model is too low level, and many processes are left implicit to the developer. This paper focuses on engineering the agent knowledge development process. A set of activities is proposed to externalize processes involved in managing agent domain knowledge, preferring software engineering approaches to ad hoc processes. The activities are classified into analysis and design steps together forming a development model suite (e.g. user model, motivation model, task model and design model). With guidance, we have successfully developed agents’ knowledge based on a real life application in finding a potential advisor for a graduate student. Finally, it enables the agent developer to use, reuse and maintain the agent knowledge.
Elastic Timing Scheme for Energy-Efficient and Robust Performance
Authors: Rupak Samanta, Ganesh Venkataraman, Nimay Shah, Jiang Hu
Venue: Proceedings of the 9th international symposium on Quality Electronic Design (2008)

In nanometer regime, IC designers are struggling between significant variation effects and tight power constraints. The conventional approach - using timing safety margin, consumes power continuously to guard against low robability timing variations. Such power inefficiency is largely eliminated in the Razor technology which detects and corrects variation induced timing errors at runtime. However, the error correction scheme of Razor causes pipeline stalling/flushing and therefore is not preferred in real-time systems or sequential circuits with feedback loops. We propose an elastic timing scheme which can correct timing errors without stalling/flushing pipeline. This is achieved by dynamically boosting circuit speed when timing error occurs. A dynamic clock skew shifting technique is suggested to reduce the boosting cost. An optimization algorithm is also provided to minimize thecost overhead. Compared to conventional safety margin based approach, the elastic timing scheme can reduce power dissipation by 20% − 27% on ISCAS89 sequential circuits while retaining similar variation tolerance. After optimization, the boosting is needed for only a small portion of entire circuit. As a result, the area overhead is usually less than 5%.
Harmonic Balance, Melnikov method and nonlinear oscillators under resonant perturbation
Authors: Michele Bonnin
Venue: International Journal of Circuit Theory and Applications (2008)

The subharmonic Melnikov's method is a classical tool for the analysis of subharmonic orbits in weakly perturbed nonlinear oscillators, but its application requires the availability of an analytical expression for the periodic trajectories of the unperturbed system. On the other hand, spectral techniques, like the Harmonic Balance, have been widely applied to the analysis and design of nonlinear oscillators. In this manuscript, we show that bifurcations of subharmonic orbits in perturbed systems can be easily detected computing the Melnikov's integral over the Harmonic Balance approximation of the unperturbed orbits. The proposed method significantly extends the applicability of the Melnikov's method since the orbits of any nonlinear oscillator can be easily detected by the Harmonic Balance technique, and the integrability of the unperturbed equations is not required anymore. As examples, several case studies are presented, the results obtained are confirmed by extensive numerical experiments. Copyright &copy; 2007 John Wiley & Sons, Ltd.
Effect of unstable routing in location-aware mobile ad hoc networks on a geographic DHT protocol
Authors: Dae-Woong Kim, Woo-Ram Park, Chan-Ik Park
Venue: Proceedings of the 13th International Conference on Parallel and Distributed Systems - Volume 02 (2007)

Geographic distributed hash table (DHT) protocols assume that the set of (key, value) pairs, called indexes, should be distributed among nodes. In geographic DHT protocols, the overhead of index redistribution due to node mobility may be high enough to impact the normal lookup operation if each node contains a large number of indexes. In our previous work, we proposed an efficient lookup protocol, called Double Indirect Access (DIA), that dispenses with index redistribution to improve lookup performance. We also evaluated the performance of DIA by using our own simulator which could show only limited simulation results with the assumptions that all nodes are connected and the packets are transferred instantly without delay. In this paper, we implement DIA into the packet-level simulator ns2 in order to evaluate how DIA is affected by the underlying unstable routing in MANET. The metrics of the effectiveness are considered lookup success rate and bandwidth consumption, and the simulation results show that DIA performs better than a conventional geographic DHT protocol.
Interactive debugging of parallel programs: Distributed scheme of interacting components
Authors: A. B. Bugerya
Venue: Programming and Computing Software (2008)

A general scheme of the organization of a distributed debugger of parallel programs. The experience of using this scheme for developing a debugger of programs in NORMA and for developing a system for examining MPI programs is discussed.
Automatically identifying localizable queries
Authors: Michael J. Welch, Junghoo Cho
Venue: Proceedings of the 31st annual international ACM SIGIR conference on Research and development in information retrieval (2008)

Personalization of web search results as a technique for improving user satisfaction has received notable attention in the research community over the past decade. Much of this work focuses on modeling and establishing a profile for each user to aid in personalization. Our work takes a more query-centric approach. In this paper, we present a method for efficient, automatic identification of a class of queries we define as localizable from a web search engine query log. We determine a set of relevant features and use conventional machine learning techniques to classify queries. Our experiments find that our technique is able to identify localizable queries with 94% accuracy.
Optimal Strategy For Eliminating Coupling Terms From A Design Matrix
Authors: Taesik Lee
Venue: Journal of Integrated Design Process Science (2006)

Eliminating an off-diagonal term from a design matrix brings value in a few different contexts. For a coupled design, it can decouple the design matrix. For a decoupled design, it will increase the flexibility of design interaction structure and thereby reducing the imaginary complexity. While eliminating an off-diagonal term is always preferred in the Axiomatic Design framework, the cost and benefit of eliminating it must be balanced to justify the effort. Assuming the cost is proportional to the number of off-diagonal terms to eliminate, this paper presents methods to identify a minimum set of off-diagonal terms that achieve the two objectives - decoupling and imaginary complexity. For the decoupling problem, the cycle matrix, C, provides an effective means to identify the optimal set of off-diagonal terms. The method we presented for the coupling problem guarantees the optimal solution. For the imaginary complexity problem, we presented a heuristic approach as a preliminary result to developing a complete method to select the optimal set.
No reference image quality assessment for JPEG2000 based on spatial features
Authors: Z. M. Parvez Sazzad, Y. Kawayoke, Y. Horita
Venue: Image Communication (2008)

Perceptual image quality evaluation has become an important issue, due to increasing transmission of multimedia contents over the Internet and 3G mobile networks. Most of the no reference perceptual image quality evaluations traditionally attempted to quantify the predefined artifacts of the coded images. Under the assumption that human visual perception is very sensitive to edge information of an image and any kinds of artifacts create pixel distortion, we propose a new approach for designing a no reference image quality evaluation model for JPEG2000 images in this paper, which uses pixel distortions and edge information. Subjective experiment results on the images are used to train and test the model, which has achieved good quality prediction performance.
General bounds on statistical query learning and PAC learning with noise via hypothesis boosting
Authors: J. A. Aslam
Venue: Proceedings of the 1993 IEEE 34th Annual Foundations of Computer Science (1993)

We derive general bounds on the complexity of learning in the statistical query model and in the PAC model with classification noise. We do so by considering the problem of boosting the accuracy of weak learning algorithms which fall within the statistical query model. This new model was introduced by M. Kearns (1993) to provide a general framework for efficient PAC learning in the presence of classification noise.
Secure Software Design in Practice
Authors: Per Håkon Meland, Jostein Jensen
Venue: Proceedings of the 2008 Third International Conference on Availability, Reliability and Security (2008)

This paper presents a set of practical techniques and tools for creating secure software with a special focus on the design phase of the development lifecycle. The target group is the ordinary ”developer-on-the-street”, who is not primarily interested in (or knowledgeable about) security, but must focus on designing/implementing as much functionality as possible before the deadline and on budget.
Transition path delay faults: a new path delay fault model for small and large delay defects
Authors: Irith Pomeranz, Sudhakar M. Reddy
Venue: IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2008)

We propose a new path delay fault model called the transition path delay fault model. This model addresses the following issue. The path delay fault model captures small extra delays, such that each one by itself will not cause the circuit to fail, but their cumulative effect along a path from inputs to outputs can result in faulty behavior. However, non-robust tests for path delay faults may not detect situations where the cumulative effect of small extra delays is sufficient to cause faulty behavior after any number of extra delays are accumulated along a subpath. Under the new path delay fault model, a path delay fault is detected when all the single transition faults along the path are detected by the same test. This ensures that if the accumulation of small extra delays along a subpath is sufficient to cause faulty behavior, the faulty behavior will be detected due to the detection of a transition fault at the end of the subpath. We discuss the new model and present experimental results to demonstrate its viability as an alternative to the standard path delay fault model. We describe an efficient fault simulation procedure for this model. We also describe test generation procedures. An efficient test generation procedure we discuss combines tests for transition faults along the target paths in order to obtain tests that satisfy the requirements of the new model.
Efficient mart-aided modeling for microarchitecture design space exploration and performance prediction
Authors: Bin Li, Lu Peng, Balachandran Ramadass
Venue: ACM SIGMETRICS Performance Evaluation Review (2008)

Computer architects usually evaluate new designs by cycle-accurate processor simulation. This approach provides detailed insight into processor performance, power consumption and complexity. However, only configurations in a subspace can be simulated in practice due to long simulation time and limited resource, leading to suboptimal conclusions which might not be applied in a larger design space. In this paper, we propose an automated performance prediction approach which employs state-of-the-art techniques from experiment design, machine learning and data mining. Our method not only produces highly accurate estimations for unsampled points in the design space, but also provides interpretation tools that help investigators to understand performance bottlenecks. According to our experiments, by sampling only 0.02% of the full design space with about 15 millions points, the median percentage errors, based on 5000 independent test points, range from 0.32% to 3.12% in 12 benchmarks. Even for the worst-case performance, the percentage errors are within 7% for 10 out of 12 benchmarks. In addition, the proposed model can also help architects to find important design parameters and performance bottlenecks.
The fast householder Bi-SVD subspace tracking algorithm
Authors: Peter Strobach
Venue: Signal Processing (2008)

A new bi-iteration type subspace tracker for updating a rank-r SVD approximant of a time-varying cross-correlation matrix of dimension NxM is introduced. The algorithm is based on updated orthonormal-square (QS) decompositions with row-Householder reflections and attains a dominant complexity of 3Nr+3Mr operations per time update, which is the lower bound of dominant complexity for an algorithm of this kind. A closed-form quasicode listing of the algorithm is provided. Computer experiments validate the theoretical results.
Analysis of Hybrid Systems Using HySAT
Authors: Christian Herde, Andreas Eggers, Martin Fränzle, Tino Teige
Venue: Proceedings of the Third International Conference on Systems (2008)

In this paper we describe the complete workflow of analyzing the dynamic behavior of safety-critical embedded systems with HySAT. HySAT is an arithmetic constraint solver with a tightly integrated bounded model checker for hybrid discrete-continuous systems which —in contrast to many other solvers— is not confined to linear arithmetic, but can also deal with nonlinear constraints involving transcendental functions. Based on a controller for train separation implementing a “moving block” interlocking scheme in the forthcoming European Train Control System Level 3, we exemplify the usage of the tool over the whole cycle from encoding a hybrid system to interpreting the results.
Scaling climate simulation applications on the IBM Blue Gene/L system
Authors: J. M. Dennis, H. M. Tufo
Venue: IBM Journal of Research and Development (2008)

We examine the ability of the IBM Blue Gene/L™ (BG/L) architecture to provide ultrahigh-resolution climate simulation capability. Our investigations show that it is possible to scale climate models to more than 32,000 processors on a 20-rack BG/L system using a variety of commonly employed techniques. One novel contribution is our load-balancing strategy that is based on newly developed space-filling curve partitioning algorithms. Here, we examine three models: the Parallel Ocean Program (POP), the Community Ice CodE (CICE), and the High-Order Method Modeling Environment (HOMME). The POP and CICE models are components of the next-generation Community Climate System Model (CCSM), which is based at the National Center for Atmospheric Research and is one of the leading coupled climate system models. HOMME is an experimental dynamical "core" (i.e., the CCSM component that calculates atmosphere dynamics) currently being evaluated within the Community Atmospheric Model, the atmospheric component of CCSM. For our scaling studies, we concentrate on 1/10° resolution simulations for CICE and POP, and 1/3° resolution for HOMME. The ability to simulate high resolutions on the massively parallel systems, which will dominate high-performance computing for the foreseeable future, is essential to the advancement of climate science.
Dually nondeterministic functions
Authors: Joseph M. Morris, Malcolm Tyrrell
Venue: ACM Transactions on Programming Languages and Systems (TOPLAS) (2008)

Nondeterminacy is a fundamental notion in computing. We show that it can be described by a general theory that accounts for it in the form in which it occurs in many programming contexts, among them specifications, competing agents, data refinement, abstract interpretation, imperative programming, process algebras, and recursion theory. Underpinning these applications is a theory of nondeterministic functions; we construct such a theory. The theory consists of an algebra with which practitioners can reason about nondeterministic functions, and a denotational model to establish the soundness of the theory. The model is based on the idea of free completely distributive lattices over partially ordered sets. We deduce the important properties of nondeterministic functions.
Variable Block Size Architecture for Loops
Authors: S. Subha
Venue: Proceedings of the Fifth International Conference on Information Technology: New Generations (2008)

This paper proposes a cache reconfiguration method to find the optimal block size for various variables accessed in loops. The method involves analyzing the temporal and spatial locality of the variables based on the data dependences of the variables in a loop obtained from their reference and offset matrices, formulating an optimization problem with the objective to minimize the average memory access time and solving it for the optimal block size for each of the variables for any given cache size. The paper proposes a cache architecture that places the variables in the cache with their respective block sizes and accesses them to achieve minimum average memory access time. Simulations support the theoretical results. The proposed model performs better than prefetching for chosen example.
On learning discretized geometric concepts
Authors: N. H. Bshouty
Venue: Proceedings of the 35th Annual Symposium on Foundations of Computer Science (1994)

We present a polynomial time online learning algorithm that learns any discretized geometric concept generated from any number of halfspaces with any number of known (to the learner) slopes in a constant dimensional space. In particular, our algorithm learns (from equivalence queries only) unions of discretized axis-parallel rectangles in a constant dimensional space in polynomial time. The algorithm also runs in polynomial time in l if the teacher lies on l counterexamples. We then show a PAC-learning algorithm for the above discretized geometric concept when the example oracle lies on the labels of the examples with a fixed probability p/spl les/ 1/2 -1/r that runs in polynomial time also with r. We use these methods, as well as a bounded version of the finite injury priority method, to construct algorithms for learning several classes of rectangles. In particular we design efficient algorithms for learning several classes of unions of discretized axis-parallel rectangles in either arbitrary dimensional spaces or constant dimensional spaces.
Total domination in graphs with minimum degree three
Authors: Odile Favaron, Michael A. Henning, Christina M. Mynhart, Joël Puech
Venue: Journal of Graph Theory (2000)

A set S of vertices of a graph G is a total dominating set, if every vertex of V(G) is adjacent to some vertex in S. The total domination number of G, denoted by &gamma;t(G), is the minimum cardinality of a total dominating set of G. We prove that, if G is a graph of order n with minimum degree at least 3, then &gamma;t(G) &le; 7n-13. &copy; 2000 John Wiley & Sons, Inc. J Graph Theory 34:9&ndash;19, 2000 This article was written while the first and fourth authors were visiting the University of Sourth Africa supported by a grant under the Franco-South African Agreement for Co-operation in Science and Engineering.
Design patterns in X3D toolkits
Authors: Shyam Sunder Santoshi Visamsetty, Puranjoy Bhattacharjee, Nicholas Polys
Venue: Proceedings of the 13th international symposium on 3D web technology (2008)

Design patterns capture reusable solutions to common problems, and have been used as an approach to simplifying the development and maintenance of software systems. This paper extracts several design patterns from the implementations of recent popular 3D Visualization toolkits. While these toolkits follow the same X3D standard, their respective realizations of this standard differ to an extent. The use of these design patterns leads to better modularity, making the resulting code base easier to maintain and extend. Therefore, our initial catalog of 3D visualization design patterns can guide the designers of future toolkits in their quest to create more maintainable and extensible software.