ppxscal/embedding_network huggingface dataset:
An approach to natural language processing in the rule-based expert system
Authors: Jan Kazimierczak
Venue: Proceedings of the 1990 ACM annual conference on Cooperation (1990)

This paper deals with the transformation of knowledge expressed in the natural language into symbolic expressions. It is shown that rules supplied from experts can be transformed by computer into such symbolic expressions as enable using the logic programming to make the plausible inferences. These symbolic expressions are stored in the knowledge base and represent the knowledge acquired from experts. First, the synthesis of the symbolic expression representing the initial knowledge in the knowledge base is considered. Then, the problem of acquiring new elements of knowledge for the knowledge base is argued. Finally, a way of transforming the symbolic expressions into PROLOG rules is introduced.
Very high performance networking for supercomputing
Authors: Marke Clinger
Venue: Proceedings of the 1990 ACM/IEEE conference on Supercomputing (1990)

NASA Ames has installed a very high bandwidth, 1 gigabit/second, local area network provided by Ultra Network Technologies to study the feasibility and performance of networking supercomputers with minisupercomputers and workstations at the effective bandwidth needed for computing environments of the future. A network display device, which provides interactive graphics over the network, was also installed to study the impact of this new bandwidth on visualization and the impact of interactive graphics on network performance. Three classes of computers were defined for study: workstations, minisupercomputers, and supercomputers. Interactions between these classes in a typical operational environment were also studied. This paper presents the results of investigations of network performance in a production facility through distributed processing.
Estimeetings: Development Estimates and a Front-End Process for a Large Project
Authors: Louis M. Taff, James W. Borchering, W. Richard Hudgins,  Jr.
Venue: IEEE Transactions on Software Engineering (1991)

A method for estimating software development effort in the early phases of a large software-intensive project and a front-end process incorporating this method are presented. The application of this methodology to the domestic US 5ESS Switch project (a large multiyear continuing effort, with new features incorporated into yearly releases) is described. For each feature to be estimated, a feature team generates a detailed feature definition with high-level functionality requirements and a high-level design proposal. These are used in a formal working meeting of estimators from affected parts of the project. The meeting produces a development estimate for use in deciding which features to include in the next release. The benefits of this methodology include well-defined milestones (high-level features requirements, high-level designs and estimates), and less tangible benefits like better working relationships between parts of the project, interorganizational synergy and increased confidence in the front-end process.
Environment Evolution: The Prism Model of Changes
Authors: Nazim H. Madhavji
Venue: IEEE Transactions on Software Engineering (1992)

A software development environment supports a complex network of items of at least the following major types: people, policies, laws, resources, processes and results. Such items may need to be changed on an on-going basis. The authors have designed in the Prism project a model of changes and two supporting change-related environment infrastructures with the following key features: separation of changes to the described items from the changes to the environmental facilities encapsulating these items; a facility, called the dependency structure, for describing various items and their interdependencies, and for identifying the items affected by a given change; a facility, called the change structure for classifying, recording, and analyzing change-related data and for making qualitative judgments of the consequences of a change; identification of the many distinct properties of a change; and a built-in mechanism for providing feedback. The author's approach to the problem of change and its rationale is described.
Software development: image processing by template polynomials
Authors: Prabir Bhattacharya, Kai Qian
Venue: Proceedings of the 1990 ACM annual conference on Cooperation (1990)

By representing a gray image by a polynomial in two variables, we show that most of the standard image processing operations can be performed by using algebraic operations. Further, using the polynomial approach we develop methods to perform connected component labelling and template matching. A parallel algorithm by template decomposition and its implementation on a mesh-connected array machine is presented.
Reasoning About Edges in Scale Space
Authors: Yi Lu, Ramesh C. Jain
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1992)

Explores the role of reasoning in early vision processing. In particular, the problem of detecting edges is addressed. The authors do not try to develop another edge detector, but rather, they study an edge detector rigorously to understand its behavior well enough to formulate a reasoning process that allow appliance of the detector judiciously to recover useful information. They present a multiscale reasoning algorithm for edge recovery: reasoning about edges in scale space (RESS). The knowledge in RESS is acquired from the theory of edge behavior in scale space and represented by a number of procedures. RESS recovers desired edge curves through a number of reasoning processes on zero crossing images at various scales. The knowledge of edge behavior in scale space enables RESS to select proper scale parameters, recover missing edges, eliminate noise or false edges, and correct the locations of edges. A brief evaluation of RESS is performed by comparing it with two well-known multistage edge detection algorithms.
An intermediate representation for behavioral synthesis
Authors: Nikil D. Dutt, Tedd Hadley, Daniel D. Gajski
Venue: Proceedings of the 27th ACM/IEEE Design Automation Conference (1991)

This paper describes an intermediate representation for behavioral and structural designs that is based on annotated state tables. It facilitates user control of the synthesis process by allowing specification of partially design structures, and a mixture of behavior, structure and user specified bindings between the abstract behavior and the structure. The format's general model allows the capture of synchronous and asynchronous behavior, and permits hierarchical descriptions with concurrency. The format is easily translated to VHDL for simulation at each stage of the design process. It therefore complements a good simulation language (VHDL) by providing an excellent input path for behavioral and register-transfer synthesis. The format's simple and uniform syntax allows it to be used both as an intermediate exchange format for various behavioral synthesis tools, and as a graphical tabular interface for the user, thereby allowing a natural medium for automatic or manual refinement of the design.
Enhancing program comprehension: formatting and documenting
Authors: Mouloud Arab
Venue: ACM SIGPLAN Notices (1992)

In order to make computer programs more readable, presentation and documentation of program source texts need to be enhanced. In this paper, we propose a presentation scheme which highlights the structure of the program and we present some aspects concerning the internal documentation (comments) which enhance the program comprehension. This presentation facilitates error correction and makes the program more readable for other programmers. We propose an automatic formatting and documenting tool which takes into account human factors in man/machine interaction aspect. It provides satisfactory results, programmers produce structured programs which help them in detecting bad constructs and in achieving homogeneity of their programs' presentation and internal documentation.
Camera Calibration by Vanishing Lines for 3-D Computer Vision
Authors: Ling-Ling Wang, Wen-Hsiang Tsai
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1991)

A novel approach to camera calibration by vanishing lines is proposed. Calibrated parameters include the orientation, position, and focal length of a camera. A hexagon is used as the calibration target to generate a vanishing line of the ground plane from its projected image. It is shown that the vanishing line includes useful geometric hints about the camera orientation parameters and the focal length, from which the orientation parameters can be solved easily and analytically. And the camera position parameters can be calibrated by the use of related geometric projective relationships. The simplicity of the target eliminates the complexity of the environment setup and simplifies the feature extraction in relevant image processing. The calibration formulas are also simple to compute. Experimental results show the feasibility of the proposed approach.
The Orientation of Modules Based on Graph Decomposition
Authors: C. K. Cheng, S. Z. Yao, T. C. Hu
Venue: IEEE Transactions on Computers (1991)

In the layout stage of VLSI and printed circuit board (PCB) design, after all circuit modules (rectangular) are placed, it is possible to flip the modules so as to reduce the total net length. The authors formulate the orientation of modules as a graph problem and prove it to be NP-complete. The orientation problem is shown to be equivalent to finding a minimum cut of a graph with some arcs of negative capacities. In many cases, the graph can be decomposed into subgraphs to reduce the search space for optimum orientation. Experiments with real cases show that module orientation reduces the total net length and improves the routability.
The use of fractals in visualizing iterative techniques from numerical analysis (abstract)
Authors: Valerie A. Miller, G. Scott Owen
Venue: Proceedings of the 1990 ACM annual conference on Cooperation (1990)

With the advent of inexpensive and yet powerful personal computers with good graphics capability, we can now use sophisticated computer graphics as both an educational and research tool in mathematics. In this project we are interested in applying these Mathematical Visualization techniques to specific areas of the mathematics curriculum and research. Our initial focus is on comparing different numerical analysis methods; specifically to compare different techniques for determining the root of a single unknown in a single equation. Since many numerical analysis methods require an initial guess to a solution and then perform iterative computations to converge to a root of the equation, the goal is to compare the rates of convergence for the different techniques for the same type of equation. The four methods we are using are as follows: Halley's, Secant, Newton's, and Aitkens's method. We can compare the different methods by computing the same map of initial starting points versus the rate of convergence. We take a region of space, which contains the roots, and then for each point in the region, we use that point as the initial guess, determine the number of iterations, N, to convergence (if any) and then assign a color value to this N, thereby generating a fractal image. This way the different methods can be visually compared. Since the number of iterations needed for convergence is not necessarily directly related to the computer time required, e.g. one method may require a large number of very rapid iterations while a second method might require fewer but more expensive iterations, we also generate images which have been adjusted for the expected cost of each iteration.
AUTOMATE, a computing package for automata and finite semigroups
Authors: J. M. Champarnaud, G. Hansel
Venue: Journal of Symbolic Computation (1991)

AUTOMATE is a package for symbolic computation on finite automata, extended rational expressions and finite semigroups. On the one hand, it enables one to compute the deterministic minimal automaton of the language represented by a rational expression or given by its table. On the other hand, given the transition table of a deterministic automaton, AUTOMATE computes the associated transition monoid. The regular D-classes structure, and many properties of the elements in the monoid are provided. The program AUTOMATE has been written in C and is quite portable. The user interface includes specialized editors for easy displaying of the computed results.
The Fortran (not the foresight) Saga: the light and the dark
Authors: Brian Meek
Venue: ACM SIGPLAN Fortran Forum (1990)

Week by week we read about corporate battles for shares in a market, be it hardware, software or services, about takeover manoeuvrings and buyouts, about rival consortia seeking to dominate areas like Unix or networking. Yet these ongoing stories, hard though they may sometimes be to follow, have the complexity of a Ladybird book, compared with the long-running saga of the Fortran 8X standard.
The Probability of Load Balancing Success in a Homogeneous Network
Authors: C. Gary Rommel
Venue: IEEE Transactions on Software Engineering (1991)

The problem of load balancing in distributed systems composed of several homogeneous sites connected by a subnet is examined. The author determines a general formula for the probability that any one site in the system is underloaded while some other site in the system is overloaded. This probability can be used to define the likelihood of load balancing success in a distributed operating system. This probability gives insight into the utilization of the system and is an aid in determining a measure of effectiveness of the system. From this formula one can determine this probability when the workload is composed of processes typical to distributed systems. The influence of variants in the load balancing algorithm on this probability is demonstrated.
Building and Using a Highly Parallel Programmable Logic Array
Authors: Maya Gokhale, William Holmes, Andrew Kopser, Sara Lucas, Ronald Minnich, Douglas Sweely, Daniel Lopresti
Venue: Computer (1991)

A two-slot addition called Splash, which enables a Sun workstation to outperform a Cray-2 on certain applications, is discussed. Following an overview of the Splash design and programming, hardware development is described. The development of the logic description generator is examined in detail. Splash's runtime environment is described, and an example application, that of sequence comparison, is given.
A Contention-Based Bus-Control Scheme for Multiprocessor Systems
Authors: Jie-Yong Juang, Benjamin W. Wah
Venue: IEEE Transactions on Computers (1991)

The authors study contention-based bus-control schemes for scheduling processors in using a bit-parallel shared bus. The protocol is designed under the requirements that each processor exhibit a random access behavior, that there be no centralized bus control in the system, and that access be granted in real time. The proposed scheme is based on splitting algorithms used in conventional contention-resolution schemes, and utilizes two-state information obtained from collision detection. Two versions of the bus-control scheme are studied. The static one resolves contentions of N requesting processors in an average of O(log/sub W/2/N) iterations, where W is the number of bits in the bit-parallel bus. An adaptive version resolves contentions in an average time that is independent of N.
Scheduler activations: effective kernel support for the user-level management of parallelism
Authors: Thomas E. Anderson, Brian N. Bershad, Edward D. Lazowska, Henry M. Levy
Venue: ACM SIGOPS Operating Systems Review (1991)

Threads are the vehicle for concurrency in many approaches to parallel programming. Threads separate the notion of a sequential execution stream from the other aspects of traditional UNIX-like processes, such as address spaces and I/O descriptors. The objective of this separation is to make the expression and control of parallelism sufficiently cheap that the programmer or compiler can exploit even fine-grained parallelism with acceptable overhead.Threads can be supported either by the operating system kernel or by user-level library code in the application address space, but neither approach has been fully satisfactory. This paper addresses this dilemma. First, we argue that the performance of kernel threads is inherently worse than that of user-level threads, rather than this being an artifact of existing implementations; we thus argue that managing parallelism at the user level is essential to high-performance parallel computing. Next, we argue that the lack of system integration exhibited by user-level threads is a consequence of the lack of kernel support for user-level threads provided by contemporary multiprocessor operating systems; we thus argue that kernel threads or processes, as currently conceived, are the wrong abstraction on which to support user-level management of parallelism. Finally, we describe the design, implementation, and performance of a new kernel interface and user-level thread package that together provide the same functionality as kernel threads without compromising the performance and flexibility advantages of user-level management of parallelism.
Microcode simulator for Apple Macintosh
Authors: Roy Fuller
Venue: ACM SIGCSE Bulletin (1992)

No fewer than three microcode simulators have been described in this bulletin since 1987. Carlson's [1] runs on an IBM mainframe, Donaldson's [3] on DOS machines and Dunworth's [4] on DOS or unix machines. All have a traditional textual interface. We wanted a visual interface that would display a circuit diagram (figure 1) and let a user follow the execution of a microprogram by watching the action of the gates. The first version became operational in the fall of 1990 and has survived two academic years of use by undergraduates.Microcode has traditionally been written using an obtuse mnemonic with such instructions as "a=7, b=3, ab, add, ramf, mar=y". We did not want students to have to contend with that kind of syntax, so our users write microcode by responding to a series of dialogs. The user makes a choice either by the "point and click" technique or by typing a keystroke equivalent. For example, the keystroke corresponding to the addition operation is "+".When the input #1 dialog comes up, the user can put register 7 on input bus "a" by typing "7". Keystrokes are buffered, allowing "power programmers" to type as fast as they wish. The dialogs can keep up with most programmers on any of the various Mac-II models. Even on the slower Mac SE, the standard sequence of eight dialogues can be completed in approximately four seconds, which is considerably less time than it takes to flawlessly type "a=7, b=3, ab, add, ramf, mar=y". After two years of field testing, several improvements suggested by students have been incorporated into the editor. Students, with the exceptions of a few intransigent DOS zealots, are now generally satisfied with the operation of the microcode editor.
A confluent calculus of Macro expansion and evaluation
Authors: Ana Bove, Laura Arbilla
Venue: ACM SIGPLAN Lisp Pointers (1992)

Syntactic abbreviations or macros provide a powerful tool to increase the syntactic expressiveness of programming languages. The expansion of these abbreviations can be modeled with substitutions. This paper presents an operational semantics of macro expansions and evaluation where substitutions are handled explicitly. The semantics is defined in terms of a confluent, simple, and intuitive set of rewriting rules. The resulting semantics is also a basis for developing correct implementations.
Scanning regular languages by dual finite automata
Authors: Pei-Chi Wu, Feng-Jian Wang, Kai-Ru Young
Venue: ACM SIGPLAN Notices (1992)

A regular language is generally accepted by a single finite automaton. An approach of dual finite automata is presented here. An input string is scanned by two deterministic finite automata (DFA's): reading from the string's head and tail respectively. One of them accepts the regular language itself; the other accepts the language's reversal. Whether a string is accepted depends on the states of both automata, when their reading heads meet. Dual finite automata can be applied in compiler generation and parallel computing.
Text-to-Speech Conversion Technology
Authors: Michael H. O'Malley
Venue: Computer (1990)

The historical and theoretical bases of contemporary high-performance text-to-speech (TTS) systems and their current design are discussed. The major elements of a TTS system are described, with particular reference to vocal tract models. The stages involved in the process of converting text into speech parameters are examined, covering text normalization, word pronunciation, prosodies, phonetic rules, voice tables, and hardware implementation. Examples are drawn mainly from Berkeley Speech Technologies' proprietary text-to-speech system, T-T-S, but other approaches are indicated briefly.
Teaching C with UNIX for college credit to professional programmers
Authors: Lawrence Osborne
Venue: ACM SIGCSE Bulletin (1992)

This paper addresses the problem of introducing the UNIX operating system and the C language to professional programmers and system analyists who have had little or no experience with either UNIX or C. Workshops given to industrial employees ordinarily last for no more than a few consecutive days and offer no college credit. In contrast, the course described in this paper required approximately nine days, spread over a three week period, and the students earned three hours of undergraduate credit towards a degree in computer science. A detailed breakdown of the contents of the lectures is given, and examples of the programming exercises done in the laboratory component of the course are presented. Observations on the effectiveness of the approach and suggestions for future improvements in the course are offered in the final section of the paper.
Functional programming in a parallel environment: the implementation of FP in MDC
Authors: T. Christopher, D. Ameiss
Venue: ACM SIGPLAN Notices (1990)

Functional Programming has been proposed as a style of programming suitable for parallel computation. At IIT we have developed a language, MDC, for parallel programming using message passing. We contend that MDC is highly suitable for programming parallel computers. This paper evaluates both claims by implementing functional programming in MDC. The relative ease of implementation supports both claims.
A RAM Architecture for Concurrent Access and on Chip Testing
Authors: Jyh-Charn Liu, Kang G. Shin
Venue: IEEE Transactions on Computers (1991)

A novel RAM architecture supporting concurrent memory access and on chip testing (CMAT) is proposed. A large-capacity memory chip is decomposed into test neighborhoods (TNDs), each of which is tested independently. When there are data stored in a TND, the data are saved into a buffer before testing the TND, and the TND's contents are restored using buffered data after testing the TND. If an external request is not made to the TND, the request can be directed to the addressed memory cells. Otherwise, the buffered data can be loaded back into the TND, or the request is detoured to a corresponding buffer. By deriving an analytical model, the performance penalty and hardware overhead of the CMAT architecture are shown to be very small.