ppxscal/embedding_network huggingface dataset:
The standardization of programming languages
Authors: Franz L. Alt
Venue: Proceedings of the 1964 19th ACM national conference (1964)

Standardization in the computer field has been under discussion for at least ten years; and for the last four or five years, concrete efforts in this direction have been under way, centered in the American Standards Association. Yet even today there is no clear-cut answer to the question whether or when or to what extent standardization in this field is desirable. Work is being done on standardizing of both hardware and software; and in the latter area, it ranges from the smallest units-and-mdash;characters-and-mdash;to the largest-and-mdash;programming languages. Why should there still be so much difference of opinion on the value of standards? As a staff member of the National Bureau of Standards I know from daily experience that in most fields of technology standardization is an unmixed blessing. Things are not nearly so simple in the field of computer languages. Whatever the advantages of standardizing one or a few computer languages, we pay a heavy price for it. But we also pay a price for failing to standardize, or standardizing too late. And the heaviest penalty of all is for standardizing prematurely or on the wrong language. Between these conflicting tendencies we have to try to reach an optimum compromise. But what is optimum depends on the viewpoint. There are a few persons who are flatly opposed to any standardization of programming languages at this time. Many more agree that some amount of standardization is now desirable, but in varying degrees and with varying safeguards. What seems best to the user does not seem best to the producer of computers, and what is best for one particular company is contrary to the interest of all other companies.
Automatic generation of microprocessor test programs
Authors: C. Bellon, A. Liothin, S. Sadier, G. Saucier, R. Velazco, F. Grillot, M. Issenman
Venue: Proceedings of the 19th Design Automation Conference (1982)

This paper presents an automatic generation system for behavioral test programs of microprocessors. First, the test environment is presented, as well as its consequences on test program generation. In the second part, the test principles are outlined; it is a behavioral test, i.e a test determined from the user's description of the microprocessor; the resulting test programs are quite modular. The third part presents the description language and the generation system.
Those magnificent men and their computing machines
Authors: Patrick M. Beatts
Venue: Proceedings of the 1968 23rd ACM national conference (1968)

The title must bow to the Hollywood film of a similar name from which it is plagiarized, and the author wishes to recall to those who attended the Spring JCC at Anaheim the fulsome praise expressed by Ray Bradbury, who denied his agreement to the comments he heard about &ldquo;wonderful computers,&rdquo; and instead told his lunchtime audience that &ldquo;You are wonderful, because you made the machines.&rdquo; The purpose of this talk is to attempt to put flesh on that skeleton, and bring into practical focus what his somewhat casual statement in sober fact implies. Let us, therefore, start with a more serious comment, this time from a member of the club, a fairly prominent scientific executive in the employ of a fairly prominent computer manufacturer.
The Paralyzer: Ivtran's Parallelism Analyzer and Synthesizer
Authors: David L. Presberg
Venue: Proceedings of the conference on Programming languages and compilers for parallel and vector machines (1975)

The ILLIAC IV Fortran compiler's Parallelism Analyzer and Synthesizer (mnemonicized as the Paralyzer) detects computations in Fortran DO loops which can be performed in parallel. It is a step of the compiling process which lies between source language parsing and target code generation, and as such can be considered as a high-level optimization step specific to the ILLIAC architecture. The Paralyzer performs its transformations within the Intermediate Language tables of the compiler. The parallel execution constructs introduced into the user's program are those which can be expressed in the extended Fortran language, IVTRAN, the source language of the compiler [1]. With a decompiler from the Intermediate Language to IVTRAN source, the Paralyzer can act as a source-to-source translater. Some pertinent characteristics of the ILLIAC IV motivate the parallelism detection methods employed by the Paralyzer. ILLIAC is in the general class of parallel processors known as array processors. That is to say, it performs identical computations in a lock-step, synchronous fashion over separate data streams. Its computational access to main memory is highly constrained: each of the 64 Processing Units can access directly only a private section of the whole memory. Data can be passed from one Processing Unit to another by a relatively expensive routing instruction. This is executed identically by all Processing Units and passes data a uniform end-around distance in the fixed ordering of the Processing Units. The machine executes most efficiently those computations which are element-by-element operations on vectors or arrays. Thus, the most fruitful sources of parallelism in Fortran programs intended for ILLIAC IV execution are DO loops containing array references with subscripts depending on the DO index variables.
Formal specification and automatic programming
Authors: Mehdi Jazayeri
Venue: Proceedings of the 2nd international conference on Software engineering (1976)

An automatic programming system is proposed based on the works of Noonan [2] and Jazayeri and Walter [10]. The system may be used to automatically produce text processing programs or to test the specifications for such programs. This is the first of three reports covering, respectively, the background and overview, architecture, and implementation of the system.
Addressable data graphs (Extended Abstract)
Authors: Arnold L. Rosenberg
Venue: Proceedings of the third annual ACM symposium on Theory of computing (1971)

This paper continues the study of the classes of data graphs which are implementable in a random access memory using &ldquo;relative addressing&rdquo; and &ldquo;relocatable realization&rdquo;, which was initiated in [1]. A new characterization of the class of rooted (&equil;relative addressable) data graphs yields simple and natural proofs of the preservation of rootedness under broad families of operations for composing data graphs. These positive results somewhat diminish the impact of the general unsolvability of detecting rootedness and free-rootedness (&equil;relocatability) in data graphs.
An editor-based programming support environment (abstract only)
Authors: W. J. Hansen
Venue: ACM SIGSOC Bulletin (1982)

Users of interactive systems typically must deal with numerous interactive interfaces, including especially the text editor and the system command interpreter. Unfortunately, the various interfaces too often have differing and even conflicting conventions. This paper suggests that an enhanced text editor can serve as the interactive interface for most purposes. For example, consider the file directory instead of choosing among half a dozen or more system commands to view and modify it, the user can edit an image that represents the directory. Deletion, renaming, and movement to another directory are easily accomplished with ordinary editor commands. Other system commands can he supplanted by a mechanism of "creation sequences" for files. Rather than execute the creation sequence, the user simply asks to view the file resulting from it.To facilitate this form of interaction, the text editor must include some novel features. It must permit structured files; where the structure can be a field structure within records or a hierarchical structure between records. A suitable editor is sketched.
ASSET, a digital computer language for the simulation of communication systems
Authors: R. R. Bowen, C. D. Shepard, R. V. Baser
Venue: Proceedings of the 6th conference on Winter simulation (1973)

ASSET has been written to simulate time-continuous communication, control, and radar systems on the XDS Sigma 7. Both the detailed responses of such systems to specific inputs, and system performance characteristics such as signal to noise ratio, probability of error, probability of detection, mean squared error, etc. can be measured with ASSET. In general, the simulation technique is to convert the continuous-time system to a sampled-data system, and then to represent the sampled-data system blocks by ASSET statements. ASSET was designed with three goals in mind: ease of programming, measurement accuracy, and efficient Monte Carlo simulation; careful choice of measurement technique and compiler design resulted in what the authors believe to be an optimum compromise between these sometimes conflicting requirements.
The impact of cost of living and population changes on the social security system
Authors: Lawrence C. Marsh, Meredith Scovill
Venue: Proceedings of the 9th conference on Winter simulation - Volume 1 (1977)

The social security system offers an interesting challenge to modelers. It is probably the only program in the government sector that is essentially a closed system since revenues must equal receipts if the system is to remain self-financed. Furthermore, the program is now tied to changes in the Consumer Price Index (CPI)and average wages rather than to the convenience of legislators. (This is subject to change.) Most features of the system can therefore be modeled from economic and demographic variables alone. To model the system one needs a population sector, estimates for changes in the CPI and wages, and unemployment and labor force participation rates, and information on the relationships between these variables and social security benefits and receipts. This paper presents a model which traces social security receipts and expenditures from 1950 to the present and then projects them to the year 2000. To find the impact on the system, one enters the appropriate unemployment and labor force participation rates, CPI changes, and the rate of increase in average wages. As predicted, tax rates will need to increase if the system is to remain self-financing under anticipated future conditions. One new aspect to this model is the introduction of varying labor forces participation rates for women. If female force participation rates increase, projected tax rates can decrease and the changing age structure of the population will not have the anticipated effect at the end of the century.
A user's view of the medium sized joint administrative/academic computing center
Authors: John Beidler
Venue: Proceedings of the 3rd annual ACM SIGUCCS conference on User services (1975)

The purpose of this paper is to look at attitudes. Our concern here is for both the attitudes administrative and academic users have regarding the computer center as well as for the attitudes of the computer center's staff towards those using the resources of the computer center. Here we suggest a way of measuring some of these attitudes and ways of reacting to them.
A meta-assembler for highly-parallel microprogrammable systems
Authors: Gilbert R. Berglass
Venue: ACM SIGMICRO Newsletter (1980)

This paper describes a software system whose input is a description of a highly parallel (horizontally) microprogrammable machine as reflected in the organization of the machine's &ldquo;word&rdquo; and a set of user-specified statement &ldquo;patterns&rdquo; defining the microprogramming language. Programs in the user-defined language are assembled into relocatable segments, which are linked together by a loader to form object modules. This design has proved effective in an environment where a group of engineers and programmers were involved in the programming of several architecturally different components for the emulation of the IBM System/370 on the NANODATA QMX.
Digital simulation as an evaluation aid in the development of dynamic color graphics human-machine interfaces
Authors: James R. Delaney
Venue: Proceedings of the 15th annual symposium on Simulation (1982)

As part of a continuing effort in the area of system control of military communications networks, the MITRE Corporation, under the auspices of the Rome Air Development Center, has developed a testbed for the evaluation of graphics human-machine interfaces for communications network control centers. The testbed uses a MITRE-developed communications network simulator, SCAT/G, to drive the candidate network status displays. By duplicating the dynamics of the communications network and its environment, SCAT/G provides a realistic testing ground for the graphics displays.
Automated testing in APL&mdash;an application of exception handling
Authors: Jan F. Prins
Venue: Proceedings of the international conference on APL (1982)

Several APL systems have recently been enhanced to include exception handling facilities. The construction of an automated tester is presented as a case study of one such definition: the latent expression exception handling system [1] available on STSC's APL*PLUS@@@@ System. The automated tester was developed as a tool to manage the systematic verification of APL system features through programmed tests. A test is an APL program containing assertions that prescribe the outcome of associated statements. The tester verifies that the asserted outcomes are in fact realized during execution. This paper describes the central role of exception handling in the implementation of the automated tester. When tests are executed as APL programs, the exceptions generated by the assertion construct can be used to control interpretation of the assertion. Other errors encountered during test execution must be intercepted and recorded, so that it is possible to assert that a statement results in an error. Finally, since the tester should execute large sets of tests unattended, it should not be interrupted by improper tests or unexpected results.
Three levels of accuracy for the simulation of different fault types in digital systems
Authors: E. W. Thompson, S. A. Szygenda
Venue: Proceedings of the 12th Design Automation Conference (1975)

CC-TEGAS3 is a time domain digital logic simulation and test generation system. Presently there are six primary modes of simulation with other modes in development. Modes one through three are for true value simulation only and are used for logic verification and design verification. Modes four through six correspond to modes one through three, respectively, but are for fault simulation. These later modes allow a user to simulate faults at either the logic verification level, (using assignable nominal element propagation delays), or at the design verification level using assignable minimum-maximum delay times. Mode six represents one of the most accurate fault simulators yet to be implemented. The description, analysis, design considerations, implementation techniques, and data structures used in the fault simulation modes of the CC-TEGAS3 system are the subject of this paper.
Stop losing sleep over incomplete data type specifications
Authors: Jean Jacques Thiel
Venue: Proceedings of the 11th ACM SIGACT-SIGPLAN symposium on Principles of programming languages (1984)

We give an algorithm to test the completeness of definitions holding on the rewrite systems that they generate. At the opposite of existing techniques that are very restrictive (left-hand sides of definitions must be linear) or rather inefficient our solution is both powerful and efficient. Also, the algorithm that we give detects ambigous or/and incomplete definitions and can tell you why they are ambigous or/and incomplete. It applies too to definitions in presence of equations.
Robots in design (Panel Discussion)
Authors: Ernest L. Hall
Venue: Proceedings of the 20th Design Automation Conference (1983)

The purpose of this panel is to discuss the significant new tool that designers now have available for automating many tasks now performed manually. This tool is the robot. Robots are universal manipulators. They are programmable, multifunctional, and have already been applied to a variety of tasks from playing checkers and decorating candy to spray painting, welding, and even ship loading. Most current robots come in two flavors: the six degrees of freedom, fixed location arm such as those produced by Cincinnati Milicron, Unimation, and IBM; and the mobile variety, such as the Heath HERO and the University of Tennessee MERV. Both flavors are useful in the design automation process. Perhaps the arm will also do my drawing or typing of specifications and the mobile robot will bring my coffee and the parts to build my design. There are many issues which should be addressed in using robots in design automation. Cost justifications must be made. Comparisons of robots to other methods, such as hard automation which may have been used for years and with which workers are familiar, must be made. Selection of robots and perhaps the CAD/CAM support equipment must be made. Planning must be done and redone to make the robot installation smooth and effective. However, the carrot at the end of this stick is greater consistency and productivity. This will lead to a lower cost, higher quality product, which is the bottom line. It is my pleasure to introduce the distinguished panelists, each of whom is actively engaged in robotics in design or maintenance. These experts in robotics bring views from a variety of applications. Universities and industries, designers, manufacturers, and users are represented.
ALMS: Automated logic mapping system
Authors: R. L. Russo, P. K. Wolff,  Sr.
Venue: Proceedings of the 8th Design Automation Workshop (1971)

ALMS is a set of design automation computer programs which accepts as input a description of a logic design, specifications of modules (e.g., chips, cards, etc.) into which the blocks of the design are to be partitioned or mapped, and some constraints that must be satisfied. It produces as output a documented assignment of the blocks to the modules satisfying the specified constraints. The system algorithms are presented, system features are discussed, program execution times are given and results are presented and compared to manual solutions for the same tasks. Three conclusions are reached. First is that computer programs make it possible to perform partitioning and mapping experiments which were not possible before. Second, for one-level partitions (e.g., logic gates on chips), highly automatic solutions obtained by the program are at least as good as manual solutions and are less costly to obtain. Third, for multi-level partitions (e.g., logic gates on chips on cards) or for mappings, the solutions obtained with the program are again at least as good as manual solutions; further-more, ALMS allows a designer to try more alternatives than he could manually, so that he can trade-off the time and cost of trying additional alternatives against the value of a better solution.
A man-machine approach toward solving the traveling salesman problem
Authors: Patrick Krolak, Wayne Felts, George Marble
Venue: Proceedings of the 7th Design Automation Workshop (1970)

The traveling salesman problem, (form a circuit through N points with no subloops in such a way as to minimize the length of the circuit), is a close kin to many board wiring problems. It has been attacked by many mathematical methods with only meager results. Only for special forms of the problem or for problems with relatively few points can it be solved exactly even using very large amounts of computer time. Heuristic procedures have been proposed and tested with only slightly better results. This paper will describe a computer-aided heuristic technique which uses only a modest amount of computer time in real time to solve large (100-200) point problems. This technique takes advantage of both the computer's and the human's problem solving abilities. The computer is not asked to solve the problem in a brute force way as is the case in many of today's heuristics but it is asked to organize the data for the human in a fashion that allows the human to solve the problem easily. The techniques employed in this paper require that the computer and the human cooperate to find the solution to the problem in reasonable amounts of both of their times. The computer initially uses a series of heuristics that produce groups of points and some partial connections of these points. The human is asked to connect the points within the groups and then connect the groups in a manner that produces a circuit and appears to the human to maximize the ratio of enclosed area to perimeter. The computer takes this solution and uses another set of heuristics to make improvements. The solution is displayed to the human and if he is satisfied the procedure stops; if not the former procedure is repeated until the human is satisfied that cost for finding a better solution exceeds his estimate of the best possible improvement that could be obtained by further work. The heuristic procedures seek to group points around information obtained from solving a series of mathematical programming problems (assignment problems) and some observed correlations between these problems and the traveling salesman problem. The results are very good. The man-machine interaction solution for all problems in the literature is within one per cent of the solution for a fraction of the computer time. The experience to date indicates that the technique can be taught to inexperienced persons and their results, after training, are similar to those of the authors'.
A tutorial on statistical analysis of simulation output data
Authors: Averill M. Law
Venue: Proceedings of the 11th conference on Winter simulation - Volume 1 (1979)

In many simulation studies a large amount of time and money is spent on model development, but little effort is made to analyze the simulation output data in a proper manner. Since most simulation models use random variables as input, the output data are themselves random and care must therefore be taken in drawing conclusions about the system under study. In this talk we present a state-of-the-art survey of procedures which can be used for constructing confidence intervals for measures of performance of a simulated system. The emphasis will be on simple, easy-to-use procedures which have been shown to perform well in practice. We conclude with a discussion of computer packages for automatic output data analysis. The complete content of this talk may be found in Law [1] and Law and Kelton [2,3], which are available from this author.
Overloading in preliminary Ada
Authors: Guido Persch, Georg Winterstein, Manfred Dausmann, Sophia Drossopoulou
Venue: Proceedings of the ACM-SIGPLAN symposium on The ADA programming language (1980)

Ada permits the overloading of enumeration literals, aggregates, subprograms and operators, i.e. the declaration of the same designator with different meanings in the same scope. This leads to difficulties during the semantic analysis of expressions and subprogram calls. For selecting the meaning not only the designator but also the types of its operands or parameters and the type of its result must be used. We show that the identification of expressions is possible in two passes, the first bottom-up, the second top-down.