ppxscal/embedding_network huggingface dataset:
Traffic phase effects in packet-switched gateways
Authors: Sally Floyd, Van Jacobson
Venue: ACM SIGCOMM Computer Communication Review (1991)

Much of the traffic in existing packet networks is highly periodic, either because of periodic sources (e.g., real time speech or video, rate control) or because window flow control protocols have a periodic cycle equal to the connection roundtrip time (e.g., a network-bandwidth limited TCP bulk data transfer). Control theory suggests that this periodicity can resonate (i.e., have a strong, non-linear interaction) with deterministic estimation or control algorithms in network gateways.1 In this paper we define the notion of traffic phase in a packet-switched network and describe how phase differences between competing traffic streams can be the dominant factor in relative throughput. Drop Tail gateways in a TCP/IP network with strongly periodic traffic can result in systematic discrimination against some connections. We demonstrate this behavior with both simulations and theoretical analysis. This discrimination can be eliminated with the addition of appropriate randomization to the network. In particular, analysis suggests that simply coding a gateway to drop a random packet from its queue (rather than the tail) on overflow is often sufficient.We do not claim that Random Drop gateways solve all of the problems of Drop Tail gateways. Biases against bursty traffic and long roundtrip time connections are shared by both Drop Tail and Random Drop gateways. Correcting the bursty traffic bias has led us to investigate a different kind of randomized gateway algorithm that operates on the traffic stream, rather than on the queue. Preliminary results show that the Random Early Detection gateway, a newly developed gateway congestion avoidance algorithm, corrects this bias against bursty traffic. The roundtrip time bias (at least in TCP/IP networks) results from the TCP window increase algorithm, not from the gateway dropping policy, and we briefly discuss changes to the window increase algorithm that could eliminate this bias.
Compiling FAD, a database programming language
Authors: Patrick Valduriez, Scott Danforth, Brian Hart, Ted Briggs, Munir Cochinwala
Venue: Proceedings of the second international workshop on Database programming languages (1989)

FAD is a strongly typed, computationally complete database programming language designed for creating and manipulating shared complex objects within Bubba, a parallel database system developed at MCC. This paper describes the compiler that transforms a FAD program into a load module targeted for execution on Bubba. In addition to low level code generation, the major functions of the compiler are static type checking and inferencing, optimization with respect to Bubba resources, and parallelization. This leads to efficient, type secure execution on Bubba.
Fault-tolerant routing in MIN-based supercomputers
Authors: Suresh Chalasani, Anujan Varma, C. S. Raghavendra
Venue: Proceedings of the 1990 ACM/IEEE conference on Supercomputing (1990)

In this paper we study methods for routing data in supercomputers that use multistage interconnection networks (MINs), in the presence of faulty components in the network. These methods are applicable to existing multiprocessors like IBM GF11 and RP3. These methods are based on the concept of dynamic full-access(DFA) which refers to the ability of the network to route data from any processor in the system to any other processor in a finite number of passes through the network. We introduce a graph-model called DFA graph of a MIN and show how it can be used to determine the DFA capability of the MIN under a given set of network faults. When the faults in the network satisfy certain special properties, we present algorithms for routing any arbitrary permutation in a faulty Bene@@@@ network, and any Omega permutation in a faulty Omega network. These algorithms are simple and operate in a distributed fashion. These techniques allow a supercomputer to efficiently realize permutations of data needed in a parallel computing environment despite the presence of faults in the network.
Actor reflection without meta-objects
Authors: Tanaka Tomoyuki
Venue: ACM SIGPLAN OOPS Messenger (1991)

We consider how reflection should be introduced into an actor language, where reflection is a mechanism for allowing a program to have access to the data structures of its own processor. Rather than introducing meta-objects as in the previous work, we propose to introduce reflection through two kinds of special messages: reifying and reflecting messages. We show that the full range of reflective programming in an actor language is possible without introducing meta-objects, and argue that our approach provides a more uniform interface for actors than the meta-object approach. All the examples in this paper have been tested on our prototype actor system.
Properties of thinking and feeling transferred from human computer interaction to social interaction
Authors: Ethel H. Hanson
Venue: ACM SIGCHI Bulletin (1991)

This study provides empirical support for the two-part claim that (a) people acquire modes of thinking and feeling in their day-to-day interaction with computing systems and (b) under some conditions, they transfer these modes of thinking and feeling to their interactions with people. It does so within the context of occupational socialization of adults, acquiring training and expertise in programming languages.
The gist of GIUKU: graphical interactive intelligent utilities for knowledgeable users of data base systems
Authors: Michel Kuntz
Venue: ACM SIGMOD Record (1992)

Synoptic description of GIUKU: its rationale, its main functionalities, its novel features, a comparison to related work, and a discussion of its current status &mdash; a fully implemented prototype available for use.
Approximating the minimum degree spanning tree to within one from the optimal degree
Authors: Martin Fürer, Balaji Raghavachari
Venue: Proceedings of the third annual ACM-SIAM symposium on Discrete algorithms (1992)

We consider the problem of constructing a spanning tree for a graph G = (V,E) with n vertices whose maximal degree is the smallest among all spanning trees of G. This problem is easily shown to be NP-hard. We describe an iterative polynomial time approximation algorithm for this problem. This algorithm computes a spanning tree whose maximal degree is at most O(&Dgr; + log n), where &Dgr; is the degree of some optimal tree. The result is generalized to the case where only some vertices need to be connected (Steiner case) and to the case of directed graphs. It is then shown that our algorithm can be refined to produce a spanning tree of degree at most &Dgr; + 1. Unless P = NP, this is the best bound achievable in polynomial time.
A fault analysis method for synchronous sequential circuits
Authors: T. Y. Kuo, J. Y. Lee, J. F. Wang
Venue: Proceedings of the 27th ACM/IEEE Design Automation Conference (1991)

In this paper we extend the use of the fault analysis method dealing with combinational circuits[1] to synchronous sequential circuits. Using the iterative array model, extended forward propagation and backward implication are performed. based on the observed values at primary outputs, to deduce the actual values of each line to determine its fault status. Any stuck fault can be identified, even in a circuit without any initialization sequence. A fault which is covered is tested unconditionally; thus the results obtained would not be invalidated in the presence of untested or untestable lines. Examples will be given to demonstrate the ability of our method.
Mass market computer for software development
Authors: W. Morven Gentleman, Marceli Wein
Venue: ACM SIGSMALL/PC Notes (1991)

The mass market or appliance computer has become a plausible alternative to workstations for software development. While it is easy to use for software development, a different style of development emerges. By being truly personal, the mass market computer provides a focus for all the professional activities of a developer. The primary form of software used on such computers is shrink-wrapped software; this has profound implications on how the software is used and the make-or-buy trade-off takes on an entirely new meaning. This paper describes the advantages of mass market computers. As an example, the paper presents how an environment, consisting of a network of mass market computers, has influenced the development of a novel source management scheme.
Initializability Consideration in Sequential Machine Synthesis
Authors: Kwang-Ting Cheng, Vishwani D. Agrawal
Venue: IEEE Transactions on Computers (1992)

It is shown that a finite-state machine, whose state encoding is obtained only to reduce the amount of logic in the final implementation, may not be initializable by a logic simulator or a test generator even when the circuit is functionally initializable (i.e. has synchronizing sequences). A fault simulator or a sequential circuit test generator that assumes all memory elements initially to be in the unknown state will be totally ineffective for such a design. Proper consideration for initializability during state assignment and logic optimization can guarantee the success for gate-level analysis tools. The conditions for initializability of finite-state machines are derived, and an automatic state assignment algorithm for logic minimality and initializability is given. Experimental results show that, in most cases, this method does not require more hardware than the other methods that may produce an uninitializable design. A partial reset technique, recommended for machines without a synchronizing sequence, is also discussed.
Hardware speedups in long integer multiplication
Authors: M. Shand, P. Bertin, J. Vuillemin
Venue: ACM SIGARCH Computer Architecture News (1991)

We present various experiments in Hardware/Software design tradeoffs met in speeding up long integer multiplications. This work spans over a year, with more than 12 different hardware designs tested and measured.To implement these designs, we rely on our PAM (for Programmable Active Memory, see [BRV]) technology which provides us with a 50 millisecond turn-around time silicon foundry for implementing up to 50K gate logic designs fully equipped with fast local RAM and host bus interface.First, we demonstrate how a simple hardware 512 bits integer multiplier coupled with a low end workstation host yields performance on long arithmetic superior to that of the fastest computers for which we could obtain actual benchmark figures.Second, we specialize this hardware in order to speed-up one specific application of long integer arithmetic, namely Rivest-Shamir-Adleman public-key cryptography [RSA]. We demonstrate how a single host driving 3 differently configured PAM boards delivers RSA encryption and decryption faster than 200Kbits/sec for 512 bits keys. This beats the best currently working VLSI specially built for RSA by one order of magnitude.
Well &hellip; it isn't quite that simple
Authors: Robert M. Corless, David J. Jeffrey
Venue: ACM SIGSAM Bulletin (1992)

Present computer algebra systems base their interactive sessions on a very simple model of mathematical discourse. The user's input to the system is a line containing a mathematical expression (an operation, a formula, a set of equations, etc) and the system's response to the user is an output line which contains a mathematical expression similar to the input. There are many situations, however, in which this is too simple a model of mathematics. Algebra systems should be allowed to reply 'Well ... it isn't quite that simple'.
LogC: a language and environment for embedded rule based systems
Authors: Feng Yulin, Huang Tao, Li Jing
Venue: ACM SIGPLAN Notices (1992)

LogC incorporates the rule oriented programming to the procedure oriented programming in C. It is designed to support knowledge inference for intelligent problem solving. This paper outlines the design features and demonstrates some results about inference efficiency by comparison with other AI languages.
Practitioner problems in need of database research
Authors: Gomer Thomas
Venue: ACM SIGMOD Record (1991)

The bottlenecks between research and product development are well known. It typically takes a very long time for ideas coming out of research labs to make their way into products, and developers often face practical problems which do not seem to be addressed by currently available research results. The term &ldquo;technology transfer&rdquo; is often used to describe the process of overcoming these bottlenecks.
Selectors: going beyond user-interface widgets
Authors: Jeff Johnson
Venue: Proceedings of the SIGCHI conference on Human factors in computing systems (1992)

Most UI toolkits and UIMSs make use of widgets, e.g., buttons, text fields, sliders, menus. Designers construct user interfaces by choosing and laying out widgets, then connectimg them to application semantics. This approach has four problems. First, most widgets are too low-level; constructing interfaces from them takes too much work. Second, working with widgets focuses attention on appearance and layout issues, rather than on more important semantic design issues. Third, designers can easily make poor widget choices, yielding poor interfaces. Fourth, widgets do not mesh well with application semantics; they know nothing about the variables they control. We are developing an application construction environment in which designers and implementers work with semantic-based controls called Selectors rather than with widgets. Selectors are classified according to their interface semantics (e.g., mutually-exclusive choice), rather than their appearance. Each type of Selector can be presented in a variety of ways; this may be chosen semi-automatically. Selectors mesh well with application semantics: their values are application data-types and their views determine how to present valid values automatically.
The L.0 Language and Environment for Protocol Simulation and Prototyping
Authors: E. Jane Cameron, David M. Cohen, Timothy M. Guinther, William M. Keese,  Jr., Cynthia Norman, Hassan N. Srinidhi
Venue: IEEE Transactions on Computers (1991)

A description is given of L.0, an executable specification language designed for describing communications protocols and similar reactive systems. L.0 is synchronous and rule-based. The rules are either cause-effect rules or constraints. Rules can be activated and deactivated dynamically, and several can be fired simultaneously. L.0 has modern notions of encapsulation and data sharing. Indirection, quantification, and recursive definition of modules increase its expressiveness. L.0 has been used in several development projects to design, simulate, and prototype protocols. It seems to provide a paradigm that is precise and yet can be used by designers and engineers who are not specialists in specification languages.
Towards an interaction level for object-oriented geographic database systems
Authors: Eliseo Clementini, Paolino Di Felice
Venue: Proceedings of the 1992 ACM annual conference on Communications (1992)

Geographic database systems are large and complex systems characterized by a high degree of interactivity. Though the object-oriented approach is powerful enough for the representation of geographic information, the availability of a flexible and easy-to-use interaction level is essential for most users. In this paper, we focus on three major issues concerning any interaction level to be built on top of an object-oriented geographic database system, namely: spatial data modeling, user views, and browsing through spatial information. Despite what really is represented at the logical level, the spatial data model we refer to in this paper explicitly represents all kinds of spatial and non-spatial relationships of interest in the geographic context. This results in an effective conceptual tool for the definition of two different categories of views (namely, frame-based and map-based views). Both categories of views feature a high degree of flexibility; in fact, users are allowed to specialize the contents of a view according to their specific needs. A way of combining browsing and querying during the activity of exploring large spatial geographic databases through views is finally sketched in the paper.
Comparison-sorting and selecting in totally monotone matrices
Authors: Noga Alon, Yossi Azar
Venue: Proceedings of the third annual ACM-SIAM symposium on Discrete algorithms (1992)

An m x n matrix A is called totally monotone if for all i1 < i2 and j1 < j2, A[i1, j1] > A[i1, j2 implies A[i2, j1] > A[i2, j2]. We consider the complexity of comparison-based selection and sorting algorithms in such matrices. Although our selection algorithm counts only comparisons its advantage on all previous work is that it can also handle selection of elements of different (and arbitrary) ranks in different rows (or even selection of elements of several ranks in each row), in time which is slightly better than that of the best known algorithm for selecting elements of the same rank in each row. We also determine the decision tree complexity of sorting each row of a totally monotone matrix up to a factor of at most log n by proving a quadratic lower bound and by slightly improving the upper bound. No nontrivial lower bound was previously known for this problem. In particular for the case m = n we prove a tight &OHgr;(n2) lower bound. This bound holds for any decision-tree algorithm, and not only for a comparison-based algorithm. The lower bound is proved by an exact characterization of the bitonic totally monotone matrices, whereas our new algorithms depend on techniques from parallel comparison algorithms.
A depth-decreasing heuristic for combinational logic: or how to convert a ripple-carry adder into a carry-lookahead adder or anything in-between
Authors: John P. Fishburn
Venue: Proceedings of the 27th ACM/IEEE Design Automation Conference (1991)

This paper describes a heuristic for speeding up combinational logic by decreasing the logic depth, at the expense of a minimal increase in circuit size. The heuristic iteratively speeds up sections of the critical path by the use of Shannon factorization on the late input. This procedure is empirically found to be capable of reproducing or even beating several classic global optimizations: a chain of an associative operator is transformed into a tree, a ripple prefix circuit into a parallel prefix circuit, and a ripple-carry adder into a slightly smaller and faster circuit than the carry-lookahead adder.
Path feasibility, linear optimizers and the evaluate standard form
Authors: P. David Coward
Venue: ACM SIGPLAN Notices (1991)

Symbolic execution of a path through the source program can be used to assist in the generation of a test case to execute the path. One important step in this process is the assessment of the feasibility of the path. Numerical optimizers can be used for solving the set of constraints provided by the path condition (Boye75, Rama76). The construction of an optimization problem from a source program can be automated. The usual way to approach this is to translate the source program into an intermediate representation more suitable for extracting and symbolically executing paths (Asir79, Rama76).The creation of an intermediate form can be achieved in two ways. First, by direct translation from the source program. This requires a complex translator. Second, the source program can undergo several steps of translation into simpler or standard forms in the source language. The final version of the 'source' program is then translated into the intermediate form by a comparatively simple translator. This paper describes a series of translations which can be made to a COBOL source program. The EVALUATE construct provides a standard form for branching.
A study of preemptable vs. non-preemptable token reservation access protocols
Authors: W. Timothy Strayer
Venue: ACM SIGCOMM Computer Communication Review (1991)

LAN protocols based on token reservation, like those found in the IEEE 802.5 Token Ring and the SAE High Speed Ring Bus LAN specifications, service messages in nearly priority order. Token Reservation fails when higher priority messages enter the system too late to be included in the priority bidding scheme or after a lower priority message successfully captures the token. Although allowing preemption in the media access protocol could reduce or eliminate these failings, no preemptable protocol exists among the extant LAN protocols. We are interested in whether preemption service in LANs could improve service for high priority messages; since no LAN with preemption currently exists, we developed a preemption protocol and tested it in simulation. We compare this protocol with non-preemption protocols using conventional metrics (such as throughput and delay), as well as introducing a new metric, the priority inversion ratio, to quantify the effectiveness of the protocols for providing priority-ordered service. We show that non-preemptable token reservation protocols suffer from priority inversion. We also show that a preemption protocol indeed provides better service to high priority messages at the expense of lower priority messages, and that this improvement is measurable.
Designing a Kanban manufacturing system using the server network generator (SNG) CASE tool
Authors: A. Bouchentouf-Idriss, L. Zeidner
Venue: Proceedings of the international conference on APL '91 (1991)

The absence of CASE tools for software-development of distributed cooperative systems is the major roadblock to effective use of concurrent processing. This paper presents a manufacturing engineering application, a concurrent cooperative processing model of this application, and the Server Network Generator (SNG) CASE tool that was used to design and implement it as a distributed software system in APL2, using inter-user shared variables. The application is a Japanese manufacturing control strategy called the "Kanban System."
Third message understanding evaluation and conference (MUC-3): phase 1 status report
Authors: Beth M. Sundheim
Venue: Proceedings of the workshop on Speech and Natural Language (1991)

The Naval Ocean Systems Center is conducting the third in a series of evaluations of English text analysis systems. The premise on which the evaluations are based is that task-oriented tests enable straightforward comparisons among systems and provide useful quantitative data on the state of the art in text understanding. Furthermore, the data can be interpreted in light of information known about each system's text analysis techniques in order to yield qualitative insights into the relative validity of those techniques as applied to the general problem of information extraction. A dry-run phase of the third evaluation was completed in February, 1991, and the official testing will be done in May, 1991, concluding with the Third Message Understanding Conference (MUC-3). Twelve sites reported results for the dry-run test at a meeting held in February, 1991. All systems are being evaluated on the basis of performance on the information extraction task in a blind test at the end of each phase of the evaluation.
User models of the circuit design process
Authors: Lynne Colgan, Paul Rankin, Maddy Brouwer-Janse
Venue: ACM SIGCHI Bulletin (1990)

To aid in the design of both a CAD system and its user interface, studies of circuit designers using a prototyped system resulted in several user model diagrams depicting the analogue circuit design process. The relative merits of this approach and its affect on the system design are discussed.
The operational semantics of an active message system
Authors: Robert Palumbo, Hossein Saiedian, Mansour Zand
Venue: Proceedings of the 1992 ACM annual conference on Communications (1992)

The traditional computer-based message systems, messages are typically viewed as passive entities with no processing power. The users are thus responsible for explicitly creating, routing and processing each message instance. Messages, however, may be viewed as active objects which can do certain processing on their own. This paper explores the concept of &ldquo;messages as objects&rdquo; for office automation purposes.