ppxscal/embedding_network huggingface dataset:
Two-Dimensional Polynomial Phase Signals: Parameter Estimationand Bounds
Authors: Joseph M. Francos, Benjamin Friedlander
Venue: Multidimensional Systems and Signal Processing (1998)

This paper considers the problem of parametric modeling and estimation of nonhomogeneous two-dimensional (2-D) signals. In particular, we focus our study on the class of constant modulus polynomial-phase 2-D nonhomogeneous signals. We present two different phase models and develop computationally efficient estimation algorithms for the parameters of these models. Both algorithms are based on phase differencing operators. The basic properties of the operators are analyzed and used to develop the estimation algorithms. The Cramer-Rao lower bound on the accuracy of jointly estimating the model parameters is derived, for both models. To get further insight on the problem we also derive the asymptotic Cramer-Rao bounds. The performance of the algorithms in the presence of additive white Gaussian noise is illustrated by numerical examples, and compared with the corresponding exact and asymptotic Cramer-Rao bounds. The algorithms are shown to be robust in the presence of noise, and their performance close to the CRB, even at moderate signal to noise ratios.
RASSP virtual prototyping of DSP systems
Authors: C. Hein, J. Pridgen, W. Kline
Venue: Proceedings of the 34th annual Design Automation Conference (1997)

This paper describes a top-down hierarchical simulationprocess that dramatically accelerates the design-evolution of DSPsystems when compared with traditional physical prototypingmethods. A summary of the model abstraction hierarchy and purposes for the various types of models provides critical guidance in selecting appropriate abstractions to achieve accurate yet efficient simulations. The simulations enable rapid exploration ofmany more alternative software and hardware solutions thanwould be practical using conventional gate-level simulation technologies. The result is improved design adaptations and quality.
Distance-based indexing for high-dimensional metric spaces
Authors: Tolga Bozkaya, Meral Ozsoyoglu
Venue: Proceedings of the 1997 ACM SIGMOD international conference on Management of data (1997)

In many database applications, one of the common queries is to find approximate matches to a given query item from a collection of data items. For example, given an image database, one may want to retrieve all images that are similar to a given query image. Distance based index structures are proposed for applications where the data domain is high dimensional, or the distance function used to compute distances between data objects is non-Euclidean. In this paper, we introduce a distance based index structure called multi-vantage point (mvp) tree for similarity queries on high-dimensional metric spaces. The mvp-tree uses more than one vantage point to partition the space into spherical cuts at each level. It also utilizes the pre-computed (at construction time) distances between the data points and the vantage points. We have done experiments to compare mvp-trees with vp-trees which have a similar partitioning strategy, but use only one vantage point at each level, and do not make use of the pre-computed distances. Empirical studies show that mvp-tree outperforms the vp-tree 20% to 80% for varying query ranges and different distance distributions.
Parallel Algorithms for Adaptive Mesh Refinement
Authors: Mark T. Jones, Paul E. Plassmann
Venue: SIAM Journal on Scientific Computing (1997)

Computational methods based on the use of adaptively constructed nonuniform meshes reduce the amount of computation and storage necessary to perform many scientific calculations. The adaptive construction of such nonuniform meshes is an important part of these methods. In this paper, we present a parallel algorithm for adaptive mesh refinement that is suitable for implementation on distributed-memory parallel computers. Experimental results obtained on the Intel DELTA are presented to demonstrate that for scientific computations involving the finite element method, the algorithm exhibits scalable performance and has a small run time in comparison with other aspects of the scientific computations examined. It is also shown that the algorithm has a fast expected running time under the parallel random access machine (PRAM) computation model.
A Parallel Algorithm to Reconstruct Bounding Surfaces in 3D Images
Authors: Frederic H. Mabin, Catherine Mongenet
Venue: The Journal of Supercomputing (1998)

The growing size of 3D digital images causes sequential algorithms to be less and less usable on whole images and a parallelization of these algorithm is often required. We have developed an algorithm named Sewing Faces which synthesizes both geometrical and topological information on bounding surface of 6-connected3D objects. We call such combined information a skin. In this paper we present a parallelization of Sewing Faces. It is based on a splitting of 3D images into several sub-blocks. When all the sub-blocks are processed a gluing step consists of merging all the sub-skins to get the final skin. Moreover we propose a fine-grain approach where each sub-block is processed by several parallel processors.
Corpus-based stemming using cooccurrence of word variants
Authors: Jinxi Xu, W. Bruce Croft
Venue: ACM Transactions on Information Systems (TOIS) (1998)

Stemming is used in many information retrieval (IR) systems to reduce variant word forms to common roots. It is one of the simplest applications of natural-language processing to IR and is one of the most effective in terms of user acceptance and consistency, though small retrieval improvements. Current stemming techniques do not, however, reflect the language use in specific corpora, and this can lead to occasional serious retrieval failures. We propose a technique for using corpus-based word variant cooccurrence statistics to modify or create a stemmer. The experimental results generated using English newspaper and legal text and Spanish text demonstrate the viability of this technique and its advantages relative to conventional approaches that only employ morphological rules.
Computer architecture simulation using a register transfer language
Authors: Thomas Pittman, Lester Bartel
Venue: Proceedings of the 20th annual workshop on Microprogramming (1987)

ASIM (Architecture Simulator) is a hardware description language for describing the hardware of a digital electronic system. The components of an electronic system are described by three primitives: ALU, Selector, and Memory, which are sufficient to describe any piece of digital electronic equipment. ASIM is different from other hardware description languages in that it uses only these three high-level primitives and is not based upon an underlying programming language. To ease the translation of the specification to hardware, ASIM description primitives closely resemble their hardware counterparts, which leads to more compact descriptions than other languages. ASIM is implemented both in an interpreter and a compiler.
Local Adaptive Subspace Regression
Authors: Sethu Vijayakumar, Stefan Schaal
Venue: Neural Processing Letters (1998)

Incremental learning of sensorimotor transformations in high dimensional spaces is one of the basic prerequisites for the success of autonomous robot devices as well as biological movement systems. So far, due to sparsity of data in high dimensional spaces, learning in such settings required a significant amount of prior knowledge about the learning task, usually provided by a human expert. In this paper we suggest a partial revision of the view. Based on empirical studies, we observed that, despite being globally high dimensional and sparse, data distributions from physical movement systems are locally low dimensional and dense. Under this assumption, we derive a learning algorithm, Locally Adaptive Subspace Regression, that exploits this property by combining a dynamically growing local dimensionality reduction technique as a preprocessing step with a nonparametric learning technique, locally weighted regression, that also learns the region of validity of the regression. The usefulness of the algorithm and the validity of its assumptions are illustrated for a synthetic data set, and for data of the inverse dynamics of human arm movements and an actual 7 degree-of-freedom anthropomorphic robot arm.
Partitioned Tensor Products and Their Spectra
Authors: Donald E. Knuth
Venue: Journal of Algebraic Combinatorics: An International Journal (1997)

A pleasant family of graphs defined by Godsil and McKay is shown to have easily computed eigenvalues in many cases.
Executable Requirements and Specifications
Authors: Allan H. Anderson, Gary A. Shaw
Venue: Journal of VLSI Signal Processing Systems (1997)

Traditionally, the detailed form, function, cost and features desired for an electronic system are established in a set of requirements documents. Misinterpretation, omissions, and errors in these documents are often significant factors in slowing development of signal processing systems. A requirement which is written in a formally defined computer executable, rather than a natural, language provides an unambiguous description which can be tested for errors. The VHSIC hardware description language (VHDL) was used to write an executable requirement which described both required function and interface timing for a real-time signal processor. The executable requirement and a traditional written description were given to two developers who created processor prototypes. In addition to the prototypes, they produced executable specifications of their implementations in the form of a VHDL simulation. The use of VHDL was advantageous because it spanned all abstraction levels from requirements to synthesizable code for ASICs. However, VHDL is not a complete solution because it cannot be used to specify all categories of requirements. Based on the experience described in this paper, recommendations for efficient use of VHDL for these purposes and for further work in the area of executable requirements and specifications are presented.
The architecture of Montana: an open and extensible programming environment with an incremental C++ compiler
Authors: Michael Karasick
Venue: Proceedings of the 6th ACM SIGSOFT international symposium on Foundations of software engineering (1998)

Montana is an open, extensible integrated programming environment for C++ that supports incremental compilation and linking, a persistent code cache called a CodeStore, and a set of programming interfaces to the CodeStore for tool writers. CodeStore serves as a central source of information for compiling, browsing, and debugging. CodeStore contains information about both the static and dynamic structure of the compiled program. This information spans files, macros, declarations, function bodies, templates and their instantiations, program fragment dependencies, linker relocation information, and debugging information.Montana allows the compilation process to be extended and modified [11]. Montana has been used as the basis of a number of tools [1,7], and is also used as the infrastructure of a production compiler, IBM's Visual Age C++ 4.0 [8].
Disk placement for arbitrary-rate playback in an interactive video server
Authors: Taeck-Geun Kwon, Yanghee Choi, Sukho Lee
Venue: Multimedia Systems (1997)

Multimedia data, especially continuous media including video and audio objects, represent a rich and natural stimulus for humans, but require large amount of storage capacity and real-time processing. In this paper, we describe how to organize video data efficiently on multiple disks in order to support arbitrary-rate playback requested by different users independently. Our approach is to segment and decluster video objects and to place the segments in multiple disks using a restricted round-robin scheme, called <i>prime round-robin</i> (PRR). Its placement scheme provides uniform load balance of disks for arbitrary retrieval rate as well as normal playback, since it eliminates hot spots. Moreover, it does not require any additional disk bandwidth to support VCR-like operations such as fast-forward and rewind. We have studied the various effects of placement and retrieval schemes in a storage server by simulation. The results show that PRR offers even disk accesses, and the failure in reading segment by deadline occurs only at the beginning of new operations. In addition, the number of users admitted is not decreased, regardless of arbitrary-rate playback requests.
Potential benefits of delta encoding and data compression for HTTP
Authors: Jeffrey C. Mogul, Fred Douglis, Anja Feldmann, Balachander Krishnamurthy
Venue: ACM SIGCOMM Computer Communication Review (1997)

Caching in the World Wide Web currently follows a naive model, which assumes that resources are referenced many times between changes. The model also provides no way to update a cache entry if a resource does change, except by transferring the resource's entire new value. Several previous papers have proposed updating cache entries by transferring only the differences, or "delta," between the cached entry and the current value.In this paper, we make use of dynamic traces of the full contents of HTTP messages to quantify the potential benefits of delta-encoded responses. We show that delta encoding can provide remarkable improvements in response size and response delay for an important subset of HTTP content types. We also show the added benefit of data compression, and that the combination of delta encoding and data compression yields the best results.We propose specific extensions to the HTTP protocol for delta encoding and data compression. These extensions are compatible with existing implementations and specifications, yet allow efficient use of a variety of encoding techniques.
The design, implementation, and evaluation of a symmetric banded linear solver for distributed-memory parallel computers
Authors: Anshul Gupta, Fred G. Gustavson, Mahesh Joshi, Sivan Toledo
Venue: ACM Transactions on Mathematical Software (TOMS) (1998)

This article describes the design, implementation, and evaluation of a parallel algorithm for the Cholesky factorization of symmetric banded matrices. The algorithm is part of IBM's parallel engineering and scientific subroutine library version 1.2 and is compatible with ScaLAPACK's banded solver. Analysis, as well as experiments on an IBM SP2 distributed-memory parallel computer, shows that the algorithm efficiently factors banded matrices with wide bandwidth. For example, a 31-mode SP2 factors a large matrix more than 16 times faster than a single node would factor it using the best sequential algorithm, and more than 20 times faster than a single node would using LAPACK's DPBTRF. The algorithm uses novel ideas in the area of distributed dense-matrix computations that include the use of a dynamic schedule for a blocked systolic-like algorithm and the separation of the input and output layouts from the layout the algorithm uses internally. The algorithm alson uses known techniques such as blocking to improve its communication-to-computation ratio and its data-cache behavior.
Importance sampling for Markov chains: computing variance and determining optimal measures
Authors: Indira Kuruganti, Stephen G. Strickland
Venue: Proceedings of the 28th conference on Winter simulation (1996)

In this paper we describe several computational algorithms useful in studying importance sampling (IS) for Markov chains. Our algorithms compute optimal IS measures and evaluate the estimate variance for a given measure. As knowledge of the optimal IS measure implies knowledge of the quantity to be estimated, our algorithms produce this quantity as a by-product. Since effective IS measures must often closely approximate the optimal measure, the use of these algorithms for small problems may produce in sights that lead to effective measures for larger problems of actual interest. We consider two classes of problems: hitting times and fixed-horizon costs.
Artificial Keys for Botanical Identification using a MultilayerPerceptron Neural Network (MLP)
Authors: Jonthan Y. Clark, Kevin Warwick
Venue: Artificial Intelligence Review (1998)

In this paper, practical generation of identification keys for biological taxa using a multilayer perceptron neural network is described. Unlike conventional expert systems, this method does not require an expert for key generation, but is merely based on recordings of observed character states. Like a human taxonomist, its judgement is based on experience, and it is therefore capable of generalized identification of taxa. An initial study involving identification of three species of Iris with greater than 90% confidence is presented here. In addition, the horticulturally significant genus Lithops (Aizoaceae/Mesembryanthemaceae), popular with enthusiasts of succulent plants, is used as a more practical example, because of the difficulty of generation of a conventional key to species, and the existence of a relatively recent monograph. It is demonstrated that such an Artificial Neural Network Key (ANNKEY) can identify more than half (52.9%) of the species in this genus, after training with representative data, even though data for one character is completely missing.
Color Computer Vision and Artificial Neural Networksfor the Detection of Defects in Poultry Eggs
Authors: V. C. Patel, R. W. McClendon, J. W. Goodrum
Venue: Artificial Intelligence Review (1998)

A blood spot detection neural network was trained, tested, and evaluated entirely on eggs with blood spots and grade A eggs. The neural network could accurately distinguish between grade A eggs and blood spot eggs. However, when eggs with other defects were included in the sample, the accuracy of the neural network was reduced. The accuracy was also reduced when evaluating eggs from other poultry houses. To minimize these sensitivities, eggs with cracks and dirt stains were included in the training data as examples of eggs without blood spots. The training data also combined eggs from different sources. Similar inaccuracies were observed in neural networks for crack detection and dirt stain detection. New neural networks were developed for these defects using the method applied for the blood spot neural network development.The neural network model for blood spot detection had an average accuracy of 92.8%. The neural network model for dirt stained eggs had an average accuracy of 85.0%. The average accuracy of the crack detection neural network was 87.8%. These accuracy levels were sufficient to produce graded samples that would exceed the USDA requirements.
From a (G, k, 1) to a (Ck &oplus; G, k, 1) Difference Family
Authors: Marco Buratti
Venue: Designs, Codes and Cryptography (1997)

Given a subgroup N of an additive group G, a (G,N,k,1) difference family (DF) is a set D of k-subsets of G such that (d &minus; d&prime; | d, d&prime; &isin; D, d &ne; d&prime;, D &isin; D) = G &minus; N. Generalizing a construction by Genma, Jimbo, and Mishima [4], we give a new condition for realizing a (Ck &oplus; G, Ck &times; {0}, k, 1)-DF starting from a (G, {0}, k, 1)-DF. Among the consequences, new cyclic Steiner 2-designs are obtained.
Developing and Distributing Component-Level VHDL Models
Authors: J. Scott Calhoun, Vijay K. Madisetti, Robert B. Reese, Thomas Egolf
Venue: Journal of VLSI Signal Processing Systems (1997)

The development and distribution of component-level Vhsic Hardware Descriptive Language models is essential to the successful implementation of a virtual prototyping environment based on the RASSP paradigm. In this paper we will discuss component-level modeling as it pertains to the development and distribution of simulation models in support of advanced digital signal processor system design. The paper will be partitioned into two sections pertaining to the modeling of 1) complex commercial off-the-shelf (COTS) components, and 2) standard COTS components. In addition, the paper will discuss distribution mechanisms which can be leveraged in a virtual prototyping environment. The component-level modeling discussion is based on two RASSP Technology Base efforts underway at the Georgia Institute of Technology and Mississippi State University. These efforts exemplify the RASSP program goal of creating a VHDL model library of components for the design of application specific signal processors.
Low Power Digital Frequency Conversion Architectures
Authors: Patrick Schaumont, Serge Vernalde, Marc Engels, Ivo Bolsens
Venue: Journal of VLSI Signal Processing Systems (1998)

State-of-the-art data communication systems make extensive use of digital hardware. Besides baseband modulation functions, also the frequency tuning functions are now being shifted from analog to digital implementation. Integration, cost and ease of programming are the primary motivations for doing this. This paper presents an alternative to the traditional digital frequency conversion architectures. The proposed architecture achieves low power as well as high speed operation, and achieves this dual goal by reducing programmability. A multi-rate filtering approach is used, which is applicable for both upconversion and downconversion of quadrature modulated data.
A Formalization of the IEEE 1149.1-1990 DiagnosticMethodology as Applied to Multichip Modules
Authors: Ken Posse
Venue: Journal of Electronic Testing: Theory and Applications (1997)

Much has already been written concerning the IEEE 1149.1 Boundary-Scan standard and its application to the detection of manufacturing defects [1&ndash;3]. However, when circuits such as Multichip Modules (MCMs) which are difficult and expensive to repair are involved, much more is required of a diagnostic engine than the mere detection of a defect. The cost of the dice on a module make it imperative that the diagnostic procedures implemented by a tester be exact. It is not enough to just state that &ldquo;Node \langle {m}\rangle is shorted to node \langle{n}\rangle&rdquo;, or that &ldquo;Node \langle {p}\rangle is stuck at 1&rdquo;, as is frequently the case with printed-circuit board diagnostics. MCM diagnostics must examine the data returned from the test and, as far as is possible, state not only the symptom of the fault, but also its exact cause and location. This article presents a set of formalized diagnostic rules which will, whenever possible, determine the symptom, cause, and location of a manufacturing defect.
An algorithm for microcode compaction of VHDL behavioral descriptions
Authors: J. Bhasker
Venue: Proceedings of the 20th annual workshop on Microprogramming (1987)

We present an algorithm to transform a sequential (vertical microcode) VHDL (VHSIC Hardware Description Language) behavioral description of a digital system design into a parallel (horizontal microcode) VHDL description. Data dependency analysis is performed on the sequential code to identify the parallelism within the code. This parallel VHDL code is targeted for synthesis by the MIMOLA synthesis system.
Linear Discriminant Analysis for Two Classes via Removal of Classification Structure
Authors: Mayer Aladjem
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1997)

A new method for two-class linear discriminant analysis, called "removal of classification structure," is proposed. Its novelty lies in the transformation of the data along an identified discriminant direction into data without discriminant information and iteration to obtain the next discriminant direction. It is free to search for discriminant directions oblique to each other and ensures that the informative directions already found will not be chosen again at a later stage. The efficacy of the method is examined for two discriminant criteria. Studies with a wide spectrum of synthetic data sets and a real data set indicate that the discrimination quality of these criteria can be improved by the proposed method.