ppxscal/embedding_network huggingface dataset:
Stable Function Approximation in Dynamic Programming
Authors: Geoffrey J. Gordon
Venue:  (1995)

The success of reinforcement learning in practical problems depends on the ability to combine function approximation with temporal difference methods such as value iteration. Experiments in this area have produced mixed results; there have been both notable successes and notable disappointments. Theory has been scarce, mostly due to the difficulty of reasoning about function approximators that generalize beyond the observed data. We provide a proof of convergence for a wide class of temporal difference methods involving function approximators such as k-nearest-neighbor, and show experimentally that these methods can be useful. The proof is based on a view of function approximators as expansion or contraction mappings. In addition, we present a novel view of approximate value iteration: an approximate algorithm for one environment turns out to be an exact algorithm for a different environment.
Lossless Compression of Region Edge Maps
Authors: R S Tate
Venue:  (1992)

In this note, we describe a lossless compression technique that has been applied to bitmaps defining regions of images. The results show considerable improvement over previous methods. The basic technique is to use context-based statistical modeling fed into an arithmetic coder.
Another Look at Automatic Text Retrieval Systems
Authors: Gerard Salton
Venue:  (1985)

The characteristics of automatic text retrieval systems are briefly described, and the available experimental evidence comparing manual with automatic retrieval is reviewed. Several automatic text analysis and indexing models are then examined, and a basic automatic indexing process is proposed. There is no evidence that an intellectual content analysis performed by human subject experts produces better retrieval results than comparable automatic text processing systems.
Quasi-optimality of the SUPG method for the one-dimensional advection-diffusion problem.
Authors: Giancarlo Sangalli
Venue:  (2001)

In this paper we propose quasi-optimal error estimates, in various norms, for the Streamline-Upwind Petrov-Galerkin (SUPG) method applied to the linear one-dimensional advection-diffusion problem. We follow the classical argument due to Babuska and Brezzi, therefore the goal of this work is the proof of the inf-sup and of the continuity conditions for the bilinear stabilized variational form, with respect to suitable norms. These norms are suggested by our previous work, in which we analyze the continuous multi-dimensional advection-diffusion operator. We obtain these results by means of functional spaces interpolation.
Multithreaded Isosurface Rendering on SMPs Using Span-Space Buckets
Authors: Peter D. Sulatycke, Kanad Ghose
Venue: Proceedings of the 2002 International Conference on Parallel Processing (2002)

We present in-core and out-of-core parallel techniques for implementing isosurface rendering based on the notion of span-space buckets. Our in-core technique makes conservative use of the RAM and is amenable to parallelization. The out-of-core variant keeps the amount of data read in the search process to a minimum, visiting only the cells that intersect the isosurface. The out-of-core technique additionally minimizes disk I/O time through in-order seeking, interleaving data records on the disk and by overlapping computational and I/O threads. The overall isosurface rendering time achieved using our out-of-core span space buckets is comparable to that of well-optimized in-core techniques that have enough RAM at their disposal to avoid thrashing. When the RAM size is limited, our out-of-core span-space buckets maintains its performance level while in-core algorithms either start to thrash or mustsacrifice performance for a smaller memory footprint.
Sequential Circuits Applicable for Detecting Different Types of Faults
Authors: I. Levin, V. Sinelnikov, M. Karpovsky, S. Ostanin
Venue: Proceedings of the Proceedings of The Eighth IEEE International On-Line Testing Workshop (IOLTW'02) (2002)

This paper presents methods for designing totally self-checking Mealy Type synchronous sequential circuits (SSCs). We use implementations of the output and the next state functions that are monotonic in state variables. The monotony enables the SSc to react to permanent faults differently than it does to transient faults. If the fault is permanent, the SSC will produce a non-code output, which will be detected as error by the checker after a number of clock cycles. In the case of a transient fault, the SSC is able to survive and to return to normal operation after a number of clock cycles.A novel universal architecture of self-checking SSCs enabling to overcome the above contradiction is proposed. This architecture can be adopted both for reduction of the fault latency of a permanent fault and for increasing the SSC survivability with respect to a transient fault. A method for SSC synthesis for the proposed architecture is presented. This method is oriented to FPGA implementation.
A Taxonomy for Enhanced Reality Systems
Authors: Jerry Bowskill, Jason Morphett, John Downie
Venue: Proceedings of the 1st IEEE International Symposium on Wearable Computers (1997)

With virtual reality systems making heavy demands on many leading edge technologies, practical applications within real time environments are reliant on advances throughout science and engineering. Enhanced Reality (ER) describes an important set of systems in which technology is used to create and present information synthesized with the real world. The potential for computer 'annotated' reality enhancement is diverse and spans not only virtual reality but also machine vision, image processing techniques, auditory landscaping, as well as others. Network centered solutions utilizing wearable computing platforms are recognized by the authors as enabling future collaborative working and telecommunications environments.
On improving voice quality under dynamic encoding algorithms in ATM networks
Authors: I. Rubin, K. K. Chang
Venue: Proceedings of the IEEE Symposium on Computers and Communications (ISCC'95) (1995)

We consider a voice multiplexer which supports ATM packet voice traffic. This system model also applies to the multiplexing operation carried out at the output queue of each output queueing ATM switch. The voice multiplexer implements an encoding algorithm under which the voice quantization levels are dynamically adjusted according to the congestion status of the multiplexer. Using an embedded voice encoding scheme, a voice packet is encoded into lower and higher priority ATM cells. When high congestion conditions are observed, lower priority voice cells (which contain the least significant bits) are discarded. In previous studies, the voice quality under a dynamic encoding algorithm has been described by the long-term average voice encoding rate (AER/sub /spl infin//). Due to the strong correlation properties exhibited by the packet voice traffic, the voice degradation levels incurred under the employed dynamic voice encoding algorithms are not distributed uniformly among the voice sources. As a result, the encoded voice stream for a source can exhibit severe short-term voice quality degradation, while the long-term AER/sub /spl infin// level remains satisfactory. To correct this situation, we introduce in this paper a "probabilistic" component in the cell-discarding process. A voice degradation indicator (VDI) is introduced to measure the short-term voice quality degradation experienced by a voice stream. Through numerical examples, we identify and compare the system performance under the deterministic and probabilistic algorithms. Under the same AER/sub /spl infin// levels, a probabilistic algorithm is shown to yield better short-term voice quality behavior as well as to improve the mean cell waiting time performance.
Making Family Websites: Fun & Easy Ways to Share Memories
Authors: Jenni Bidner
Venue:  (2003)

:A family website can bring everyone together, and this comprehensive guide helps you create one that's as unique as your loved ones. See exactly how to get up and running in no time, and how to pick the right Internet provider. Learn the basics of taking great digital photos and digitizing slides, snapshots, and documents. Check out easy and inexpensive software to improve image quality. Learn how easy it is to use cool design elements, including backgrounds, buttons, thumbnail images, and animations. Take a crash course in adding links, uploading new information, and launching a site. Consider some inspiring ideas for content, such as an on-line recipe book, complete with photos, to save those favorite family dishes for posterity. Or use the site to plan a reunion, share a wedding album, or post the family tree. You'll understand exactly how the World Wide Web can lead you straight home, right to the heart of family.
Moving the shared memory closer to the processors DDM
Authors: Anders Landin, Seif Haridi
Venue:  (1990)

Multiprocessors with shared memory are considered more general and easier to program than message-passing machines. The scalability is, however, in favor of the latter. There are a number of proposals showing how the poor scalability of shared memory multiprocessors can be improved by the introduction of private caches attached to the processors. These caches are kept consistent with each other by cache-coherence protocols. In this paper we introduce a new class of architectures called Cache Only Memory Architectures (COMA). These architectures provide the programming paradigm of the shared-memory architectures, but are believed to be more scal- able. COMAs have no physically shared memory; instead, the caches attached to the processors containallthe memory in the system, and their size is therefore large. A datum is allowed to be in any or many of the caches, and will automat- ically be moved to where it is needed by a cache-coherence protocol, which also ensures that the last copy of a datum is never lost. The location of a datum in the machine is completely decoupled from its address. We also introduce one example of COMA: the Data Diffusion Machine (DDM). The DDM is based on a hierarchical network structure, with processor/memory pairs at its tips. Remote accesses generally cause only a limited amount of traffic over a limited part of the machine. The architecture is scalable in that there can be any number of levels in the hierarchy, and that the root bus of the hierarchy can be implemented by several buses, increasing the bandwidth.
Multicast Routing Protocol by Multicast Agent in Mobile Networks
Authors: Hee-Sook Shin, Young-Joo Suh, Dong-Hee Kwon
Venue: Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing (2000)

Providing multicast service to mobile hosts is difficult due to frequent changes of mobile host location and group membership. To overcome the difficulty, several multicast protocols for mobile hosts have been proposed. Although the protocols solve several problems inherent in multicast routing proposals for static hosts, they still have problems such as non-optimal delivery path, datagram duplication, etc. In this paper, we summarize these problems of multicast routing protocols and propose an efficient multicast protocol using a multicast agent in wireless mobile networks, where a mobile host receives a tunneled multicast datagram from a multicast agent located in a network close to it or directly from the multicast router in the current network. While receiving a tunneled multicast datagram from a remote multicast agent, the local multicast agent starts multicast joins process, which makes the multicast delivery route optimal. The proposed protocol reduces data delivery path length and decreases not only the amount of duplicate copies of multicast datagrams but also multicast traffic load We examined and compared the performance of the proposed protocol and existing protocols by simulation under various environments and we got an improved performance over the existing proposals.
Parallel Algorithms for the Tree Bisector Problem and Applications
Authors: Biing-Feng Wang, Shan-Chyun Ku, Keng-Hua Shi, Ting-Kai Hung, Pei-Sen Liu
Venue: Proceedings of the 1999 International Conference on Parallel Processing (1999)

An edge is a bisector of a simple path if it contains the middle point of the path. In this paper, efficient parallel algorithms are proposed on the EREW PRAM for the single-source and all-pairs tree bisector problems. Two O(log n) time single-source algorithms are proposed. One uses O(n) work and the other uses O(nlog n) work. The one using O(n) work is more efficient but only applicable to unweighted trees. One all-pairs parallel algorithm is proposed. It requires O(log n) time using O(n2) work.
Experiments in Building a Gibbs Database
Authors: Donna Bergmark
Venue:  (1986)

For some time now we have realized that one of the more valuable things to come out of the Gibbs project would be a centralized library of established coding techniques for programs in the physical sciences. These coding techniques are embodied as Gibbs chapters; a database of Gibbs chapters is certainly theoretically possible. The questions are what to put into it? How? What links should exist between chapters? One way to explore these questions is to experiment with a sample database. This paper describes such a sample Gibbs database, implemented on an IBM 3081 in SPIRES. The Gibbs database contains a number of chapters related to Parallel Processing. An associated database, Configurations, contains Gibbs programs. A Gibbs program is a set of related chapters. The SPIRES database system can handle tens of thousands of records in a fairly efficient manner, has a lot of functionality built-in, and supports user defined formats and procedures. As such, it makes a good test bed for deciding what features one wants in an experimental database. It also supports multiple access to all records in the database, so that everyone in the Gibbs project can try using the database and report their experiences. This experiment is in the domain of algorithms for parallel processing. The field of Parallel Processing is especially well suited for experimenting with Gibbs because many Fortran programs must be modified when any new parallel architectures become available for use. Many of these modifications are not especially complex, but nevertheless a burden to make. How you decompose your algorithm depends on knowing the low-level capabilities of the target hardware and its constraints. Such details are, at best, uninspiring to contemplate. A database would be helpful. This report describes the main features of a Gibbs database, and ends with a list of requirements for the production database.
Automatic Knowledge Acquisition from Subject Matter Experts
Authors: Mihai Boicu, Gheorghe Tecuci, Bogdan Stanescu, Dorin Marcu, Cristina Cascaval
Venue: Proceedings of the 13th IEEE International Conference on Tools with Artificial Intelligence (2001)

This paper presents current results in developing a practical approach, methodology and tool, for the development of knowledge bases and agents by subject matter experts, with limited assistance from knowledge engineers. This approach is based on mixed-initiative reasoning that integrates the complementary knowledge and reasoning styles of a subject matter expert and a learning agent, and on a division of responsibilities for those elements of knowledge engineering for which they have the most aptitude. The approach was evaluated at the US Army War College, demonstrating very good results and a high potential for overcoming the knowledge acquisition bottleneck.
Compiling language definitions: the ASF+SDF compiler
Authors: Mark Brand, Jan Heering, Paul Klint, Pieter A. Olivier
Venue:  (2000)

The ASF+SDF Meta-Environment is an interactive language development environment whose main application areas are definition of domain-specific languages, generation of program analysis and transformation tools, production of software renovation tools, and general specification and prototyping. It uses conditional rewrite rules to define the dynamic semantics and other tool-oriented aspects of languages, so the effectiveness of the generated tools is critically dependent on the quality of the rewrite rule implementation. The ASF+SDF rewrite rule compiler generates C code, thus taking advantage of C''s portability and the sophisticated optimization capabilities of current C compilers as well as avoiding potential abstract machine interface bottlenecks. It can handle large (10 000+ rule) language definitions and uses an efficient run-time storage scheme capable of handling large (1 000 000+ node) terms. Term storage uses maximal subterm sharing (hash-consing), which turns out to be more effective in the case of ASF+SDF than in Lisp or SML. Extensive benchmarking has shown the time and space performance of the generated code to be as good as or better than that of the best current rewrite rule and functional language compilers.
Exact complexity of exact-four-colorability
Authors: Jörg Rothe
Venue: Information Processing Letters (2003)

Let Mk be a given set of k integers. Define Exact-Mk-Colorability to be the problem of determining whether or not χ(G), the chromatic number of a given graph G, equals one of the k elements of the set Mk exactly. In 1987, Wagner [Theoret. Comput. Sci. 51 (1987) 53-80] proved that Exact-Mk-Colorability is BH2k(NP)-complete, where Mk = {6k + 1, 6k + 3,..., 8k - 1} and BH2k(NP) is the 2kth level of the Boolean hierarchy over NP. In particular, for k = 1, it is DP-complete to determine whether or not χ(G) = 7, where DP = BH2(NP). Wagner raised the question of how small the numbers in a k-element set Mk can be chosen such that Exact-Mk-Colorability still is BH2k(NP)-complete. In particular, for k=1, he asked if it is DP-complete to determine whether or not χ(G) = 4.In this note, we solve Wagner's question and prove the optimal result: For each k ≥ 1, Exact-Mk-Colorability is BH2k(NP)-complete for Mk = {3k + 1, 3k + 3 ..., 5k - 1}. In particular, for k = 1, we determine the precise threshold of the parameter t ∈ {4, 5, 6, 7} for which the problem Exact-{t}-Colorability jumps from NP to DP-completeness: It is DP-complete to determine whether or not χ(G) = 4, yet Exact-{3}-Colorability is in NP.
Parallel and distributed simulation: an overview
Authors: H. M. Soliman, A. S. Elmaghraby, M. A. El-Sharkawy
Venue: Proceedings of the IEEE Symposium on Computers and Communications (ISCC'95) (1995)

A review of the state of the art in parallel and distributed simulation (PADS) is given. Sample performance results of currently used PADS techniques are presented using a network of workstations. The results demonstrate the capabilities and limitations of these techniques, and verify the logic of the current directions in PADS research.
An Agent-Based Approach to Inference Prevention in Distributed Database Systems
Authors: James Tracy, LiWu Chang, Ira S. Moskowitz
Venue: Proceedings of the 14th IEEE International Conference on Tools with Artificial Intelligence (2002)

We propose an inference prevention agent as a tool that enables each of the databases in adistributed system to keep track of probabilistic dependencies with other databases and then use that information to help preserve the confidentiality of sensitive data. This is accomplished with minimal sacrifice of the performance and survivability gains that are associated with distributed database systems.
Self-Checking Multiple-Valued Circuit Based on Dual-Rail Current-Mode Differential Logic
Authors: Takahiro Hanyu, Tsukasa Ike, Michitaka Kameyama
Venue: Proceedings of the Twenty Ninth IEEE International Symposium on Multiple-Valued Logic (1999)

A multiple-valued current-mode (MVCM) circuit based on dual-rail differential logic has been proposed for high-speed arithmetic systems at a low supply voltage. This paper presents a new totally self-checking circuit based on dual-rail MVCM logic, where almost all the basic components except a differential-pair circuit have been already duplicated, which results in small hardware overhead compared with a non-self-checking circuit based on dual-rail MVCM logic. Moreover, the performance of the proposed self-checking circuit is superior to that of full duplication of the non-self-checking circuit based on dual-rail MVCM logic in terms of transistor counts, switching delay and dynamic power dissipation under a 0.5-µm standard CMOS technology
Statistical Quality Control: How To Detect Unreliable Software Components
Authors: H. A. Stieber
Venue: Proceedings of the Eighth International Symposium on Software Reliability Engineering (1997)

If "classical" testing-strategies are used (no usage-testing) the application of software reliability growth models may be difficult and reliability predictions can be misleading. Nevertheless statistical methods can be successfully applied to failure data. This paper presents an approach which allows the detection of unreliable software components and the comparison of the reliability of different software versions-even if testing is done in a classical manner. A simple to use graphical method-which is mainly based on the sequential test of Wald (1947)-is described. The methodology was successfully applied to a software system for tax consultants.
Deadlock-Free Routing in Irregular Networks Using Prefix Routing Algorithm
Authors: Wu Jie, Sheng Li
Venue:  (1999)

In this paper, we propose a deadlock-free routing in irregular networks using prefix routing. Prefix routing is a special type of routing with a compact routing table associated with each node (processor). Basically, each outgoing channel of a node is assigned a special label and an outgoing channel is selected if its label is a prefix of the label of the destination node. Node and channel labeling in an irregular network is done through constructing a spanning tree. The routing process follows a two-phase process of going up and then down along the spanning tree, with a possible cross channel (shortcut) between two branches of the tree between two phases. We show that the proposed routing scheme is deadlock- and livelock- free.
An alternative approach for analyzing finite buffer queues in discrete time
Authors: Attahiru Sule Alfa
Venue: Performance Evaluation (2003)

In this paper, we present a novel use of matrix-analytic method (MAM) for analyzing the GI/G/1/K system. The novelty is based on an unconventional arrangement of the state space and also a Markov-based representation of the arrival and service processes with at least one of them based on the elapsed time approach. This results in a matrix-product form solution, because the resulting Markov chain is level-dependent. We therefore end up with rate matrices which are level-dependent. The resulting matrices are explicitly determined. We show that stationary distributions can be determined explicitly. An illustrative example is presented. We discuss some special cases such as GI/Geo/1/K and Geo/G/1/K and show extensions to the GIX/G/1/K and the GI/Geo/c/K systems.