ppxscal/embedding_network huggingface dataset:
Optimal Selection of Secondary Indexes
Authors: Elena Barcucci, R. Pinzani, Renzo Sprugnoli
Venue: IEEE Transactions on Software Engineering (1990)

When planning a database, the problem of index selection is of particular interest. The authors examine a transaction model that includes queries, updates, insertions, and deletions, and they define a function that calculates the transaction's total cost when an index set is used. Their aim is to minimize the function cost in order to identify the optimal set. The algorithms proposed in other studies require an exponential time in the number of attributes in order to solve the problem. The authors propose a heuristic algorithm based on some properties of the cost function that produces an almost optimal set in polynomial time. In many cases, the cost function properties make it possible to prove that the solution obtained is the optimal one.
Process and dataflow control in distributed data-intensive systems
Authors: W. Alexander, G. Copeland
Venue: ACM SIGMOD Record (1988)

In dataflow architectures, each dataflow operation is typically executed on a single physical node. We are concerned with distributed data-intensive systems, in which each base (i.e., persistent) set of data has been declustered over many physical nodes to achieve load balancing. Because of large base set size, each operation is executed where the base set resides, and intermediate results are transferred between physical nodes. In such systems, each dataflow operation is typically executed on many physical nodes. Furthermore, because computations are data-dependent, we cannot know until run time which subset of the physical nodes containing a particular base set will be involved in a given dataflow operation. This uncertainty creates several problems. We examine the problems of efficient program loading, dataflow&mdash;operation activation and termination, control of data transfer among dataflow operations, and transaction commit and abort in a distributed data-intensive system. We show how these problems are interrelated, and we present a unified set of mechanisms for efficiently solving them. For some of the problems, we present several solutions and compare them quantitatively.
A conversation with Steve Jobs
Authors: Peter J. Denning, Karen A. Frenkel
Venue: Communications of the ACM (1989)

NeXT, Inc. President and CEO Steve Jobs (left), and VP of Sales and Marketing, Dan'l Lewin, discuss the goals of the new company, and the NeXT Computer System itself.
DASP: a general-purpose MIMD parallel computer using distributed associative processing
Authors: Y. K. Park, C. Walter, H. Yee, T. Roden, S. Berkovich
Venue: Proceedings of the 1989 ACM/IEEE conference on Supercomputing (1989)

This paper presents a general purpose MIMD (Multiple Instruction Stream Multiple Data Stream) loosely-coupled parallel computer called DASP (Distributed Associative Processor). The DASP organization partitions the communication and application functions. The communication functions are performed by custom-made communication handlers called Network Communication Modules, while application functions are performed by any general purpose processor suitable for the application. The communication subsystem of DASP takes advantage of the properties of loosely-coupled MIMD parallel computers: the very short inter-processor distances and the locality of task reference. By pipelining the time slices of the bus hierarchically with the CITO (Content Induced Transaction Overlap) protocol, DASP provides virtual full-connectivity to the application processors without physical full connections; thus, its architecture exhibits a very high degree of extensibility and modularity. Analytical and simulation results have validated the DASP approach. A prototype has been constructed and several algorithms have been successfully implemented on the prototype.
Approaches to multi-level sequential logic synthesis
Authors: S. Devadas
Venue: Proceedings of the 26th ACM/IEEE Design Automation Conference (1989)

In this paper, we present approaches to multi-level sequential logic synthesis &mdash; algorithms and techniques for the area and performance optimization of interconnected finite state machine descriptions. Interacting finite state machines are common in industrial chip designs. While optimization techniques for single finite state machines are relatively well developed, the problem of optimization across latch boundaries has received much less attention. Techniques to optimize pipelined combinational logic so as to improve area/throughout have been proposed. However, logic cannot be straightforwardly migrated across latch boundaries when the basic blocks are sequential rather than combinational circuits. We present new techniques for the exploitation of sequential don't cares in arbitrary, interconnected sequential machine structures. Exploiting these don't care sequences can result in significant improvements in area and performance. We address the problem of migrating logic across state machine boundaries so as to make particular machines less complex at the possible expense of making others more complex. This can be useful from both an area and performance point of view. We present new optimization algorithms that incrementally modify state machine structures across latch boundaries. We discuss the use of more global state machine decomposition and factorization algorithms for area optimization. Finally, we present experimental results using these algorithms on sequential circuits.
Implementation benefits of C++ language mechanisms
Authors: David Jordan
Venue: Communications of the ACM (1990)

C + + was designed by Bjarne Stroustrup at AT T Bell Laboratories in the early 1980s as an extension to the C language, providing data abstraction and object-oriented programming facilities. C + + provides a natural syntactic extension to C, incorporating the class construct from Simula. A design principle was to remain compatible and comparable with C in terms of syntax, performance and portability Another goal was to define an object-oriented language that significantly increased the amount of static type checking provided, with user-defined types (classes) and built-in types being part of a single unified type system obeying identical scope, allocation and naming rules. These aims have been achieved, providing some underlying reasons why C + + has become so prevalent in the industry. The approach has allowed a straightforward evolution from existing C-based applications to the new facilities offered by C + + , providing an easy transition for both software systems and programmers. The facilities described are based on Release 2.0 of the language, the version on which the ANSI and IS0 standardization of C + + is being based.
Efficient simulation of cache memories
Authors: S. Dwarkadas, J. R. Jump, J. B. Sinclair
Venue: Proceedings of the 21st conference on Winter simulation (1989)

Cache memories are used in computer systems to reduce average memory access times. Existing techniques for predicting cache performance are often unsatisfactory in terms of cost or performance. This paper presents a method for efficiently simulating the effects of a cache on the execution time of a program. We use an execution-driven simulation approach that requires no hardware support and provides a highly accurate dynamic address trace to a cache simulation model. Almost all of the overhead in this approach is in the cache simulation rather than the address trace generation. The cache simulator is used in conjunction with the Rice Parallel Processing Testbed to study the performance of concurrent programs executing on multiprocessor systems with caches. We have also developed an estimative execution-driven simulator that greatly reduces the simulation overhead by using parameters extracted from a detailed simulation of a program's execution on a processor with a cache, along with an analytical model of cache behavior. The predictions and overhead of the estimative technique are compared with those obtained from detailed cache simulations.
Selection of a neural network system for visual inspection
Authors: P. J. Stomski, A. S. Elmaghraby
Venue: ACM SIGSIM Simulation Digest (1989)

This paper provides a background to the field of neural networks with a particular focus on vision applications. It includes an extensive literature review and reports on preliminary work towards the implementation of a visual inspection application using neural network simulators.
Helping the rest of them: the unique consulting meeds of the Macintosh user
Authors: Doug Heacock
Venue: Proceedings of the 16th annual ACM SIGUCCS Conference on User Services (1988)

The Apple Macintosh burst onto the microcomputing scene in early 1984, amid much media hype, sporting the claim that it was to be &ldquo;the computer for the rest of us.&rdquo; The unique Macintosh user interface makes the Mac easy to learn and use, and has made it quite popular, particularly among those with fear of computers or little time to spend learning to use them. After a slow start due to hardware limitations and lack of software, the Macintosh has grown into an important presence in academic computing, with Mac labs appearing in colleges and universities everywhere in increasing numbers. In the summer of 1987 the Computer Center at the University of Kansas opened a Macintosh lab for students, faculty and staff. From the beginning the lab has been in almost constant demand, often with waiting lines day and night. Our consultants find that they are now faced with a new breed of users whose only computing experience is with the Macintosh. Many of the Mac users filling our labs are people with little or no background in computing, who understand little of the traditional computing jargon, and who may have difficulty explaining to a consultant exactly what went wrong (or understanding the consultant's answer). This growing group of users represents a special class of consulting needs, and we must be prepared to meet them. This paper will draw on our experience with the Macintosh and its users at the University of Kansas, and will discuss (1) the basis for this problem, (2) the specific nature of the problem, and (3) what consultants and others can do to help.
Generalized Measures of Fault Tolerance with Application to N-Cube Networks
Authors: A.-H. Esfahanian
Venue: IEEE Transactions on Computers (1989)

In developing deterministic measures of system-level fault tolerance for multiple-processor systems, it has generally been assumed that any subset of system components (processors or links) can potentially fail at the same time. In the present work, the author generalizes these measures by restricting the potentially faulty sets to some subsets of the system components. Using this model, he presents a fault-tolerance analysis for the n-cube networks that shows that such networks can tolerate up to 2n-3 processor failures and remain connected provided that for each processor p in the network, all the processors which are directly connected to p do not fail at the same time. He also shows that in this situation the diameter of the network may increase only by a constant value. The author presents an O((kn)/sup 2/) time algorithm for determining if the network is disconnected when a set of k faulty processors, k>or=2n-2, is given. The previously known algorithms for the same purpose require O(n*2/sup n-1/) computation steps.
Large-scale concurrent computing in artificial intelligence research
Authors: L. Gasser
Venue: Proceedings of the third conference on Hypercube concurrent computers and applications - Volume 2 (1989)

Research in AI is slowly maturing, and body of accepted techniques for reasoning and for representing knowledge in simple, circumscribed domains now exists. But with the maturity of AI has come a growing awareness of the severe limitations of current techniques for constructing more complex problem solving or interpretation systems. We currently have inadequate means to gather, represent, store, organize, access, and manipulate the huge collections of knowledge required for complex problem solving. Existing systems can't reconfigure themselves in changing situations, nor can they incrementally adjust to new knowledge or new techniques. Large scale problem solvers (e.g. factory automation systems) cannot in principle completely model the world in which they exist, and must face problems of inconsistency, asynchrony, control and geographic distribution, etc. &mdash; they will have to work in &ldquo;open systems.&rdquo; Many solutions under consideration rely on concurrent computation, using either very fine grained &ldquo;connectionist,&rdquo; &ldquo;neural computing&rdquo; or &ldquo;data parallel&rdquo; approaches, or using larger grain collections of &ldquo;objects,&rdquo; &ldquo;agents,&rdquo; or &ldquo;problem solving nodes&rdquo; &mdash; techniques collectively termed &ldquo;Distributed AI.&rdquo; In this paper we characterize the needs for concurrency and parallelism in AI, with special attention to building medium to large grain adaptive problem solvers in open systems. In these systems the overriding concern is organizing the problem solving system's behavior &mdash; the &ldquo;coordination problem.&rdquo; Conventional distributed computing and parallel algorithms approaches allow a programmer to solve the coordination problem, and provide language constructs and concurrency control mechanisms with which a program can enact his solution. In Distributed AI, we attempt to improve adaptability by designing problem solvers which can both solve the coordination problem and enact the solution themselves.
Report on the workshop on analytical models
Authors: K. Butler, J. Bennett, P. Polson, J. Karrat
Venue: ACM SIGCHI Bulletin (1989)

Analytical models are extremely useful and important tools for design engineering in many fields. They provide engineers with performance predictions for a specified design, and they also can assist in design improvements by identifying the sources of performance deficiencies.Currently analytical models are not commonly used for design engineering in HCI. However, university research has produced some promising results, and has led to exploratory development projects in several major corporations.
The RM-CELL vs. the earthquakes
Authors: B. de la Pena Casares
Venue: Issue 110 (October 1989) (1989)

This paper describes an attempt to forecast earthquakes using the RM-CELL [1]. The paper relates in an abreviated form how the research was developed and the unexpected final result: It seems that large earthquakes can be detected during its growing stage.
Design for manufacturability and yield
Authors: A. J. Strojwas
Venue: Proceedings of the 26th ACM/IEEE Design Automation Conference (1989)

This tutorial focuses on the design strategies for VLSI circuits that are aimed at achieving manufacturable, high-yielding chips. We review the current status of statistical design methodologies based upon statistically-valid modeling and process characterization approaches. Both parametric and functional yield maximization strategies are covered. This tutorial argues that by providing a better starting point for manufacturing, the profitability and competitiveness can be significantly improved.
A cluster-based approach to thesaurus construction
Authors: C. J. Crouch
Venue: Proceedings of the 11th annual international ACM SIGIR conference on Research and development in information retrieval (1988)

The importance of a thesaurus in the successful operation of an information retrieval system is well recognized. Yet techniques which support the automatic generation of thesauri remain largely undiscovered. This paper describes one approach to the automatic generation of global thesauri, based on the discrimination value model of Salton, Yang, and Yu and on an appropriate clustering algorithm. This method has been implemented and applied to two document collections. Preliminary results indicate that this method, which produces improvements in retrieval performance in excess of 10 and 15 percent in the test collections, is viable and worthy of continued investigation.
The organizational implementation of an electronic meeting system: an analysis of the innovation process
Authors: Joey F. George, Joseph S. Valacich, J. F. Nunamaker,  Jr.
Venue: Proceedings of the SIGCHI conference on Human factors in computing systems: Empowering people (1990)

Electronic Meeting Systems (EMS) are slowly moving out of university environments into work organizations. They constitute an innovative method of supporting group meetings. This paper reports on the innovation process in one organization that has recently adopted and implemented an EMS. The paper traces the innovation process through four stages: conception of an idea: proposal; decision to adopt; and implementation. Important factors from the innovation literature are considered as explanators of the innovation process involving EMS in this particular organization.
Scaling up: a research agenda for software engineering
Authors: CORPORATE Computer Science and Technology Board
Venue: Communications of the ACM (1990)

The following excerpts have been gleaned from a report by the Computer Science and Technology Board that summarizes the deliberations of a group of software engineers participating in a CSTB workshop that focused on setting research priorities.
A time-randomness tradeoff for oblivious routing
Authors: Danny Krizanc, David Peleg, Eli Upfal
Venue: Proceedings of the twentieth annual ACM symposium on Theory of computing (1988)

Three parameters characterize the performance of a probabilistic algorithm: T, the runtime of the algorithm; Q, the probability that the algorithm fails to complete the computation in the first T steps and R, the amount of randomness used by the algorithm, measured by the entropy of its random source. We present a tight tradeoff between these three parameters for the problem of oblivious packet routing on N-vertex bounded-degree networks. We prove a (1 - Q) log N/T - log Q - &Ogr;(1) lower bound for the entropy of a random source of any oblivious packet routing algorithm that routes an arbitrary permutation in T steps with probability 1 - Q. We show that this lower bound is almost optimal by proving the existence, for every e3 log N &le; T &le; N1/2, of an oblivious algorithm that terminates in T steps with probability 1 - Q and uses (1-Q+&ogr;(1))logN/T-logQ independent random bits. We complement this result with an explicit construction of a family of oblivious algorithms that use less than a factor of log N more random bits than the optimal algorithm achieving the same run-time.
Representing geometric structures in d dimensions: topology and order
Authors: E. Brisson
Venue: Proceedings of the fifth annual symposium on Computational geometry (1989)

We develop a representation for the topological structure of subdivided manifolds (with and without boundary) of dimension d &ge; 1 which allows straightforward access of the available order information. It is shown that there exists a large amount of ordering information in subdivided manifolds: given a (k-2)-cell in the boundary of a (k+1)-cell, 1 &le; k &le; d, all of the k- and (k-1)-cells 'between them' can be ordered 'around' the (k-2)-cell. This includes the usual orderings in 2- and 3-dimensional objects. We introduce the 'cell-tuple structure', a simple, uniform representation of the incidence and ordering information in a subdivided manifold. It includes the quad-edge data structure of Guibas and Stolfi [GS 85] and the facet-edge data structure of Dobkin and Laszlo [DL 87] as special cases in dimensions 2 and 3, respectively.
Renaming in an asynchronous environment
Authors: Hagit Attiya, Amotz Bar-Noy, Danny Dolev, David Peleg, Rüdiger Reischuk
Venue: Journal of the ACM (JACM) (1990)

This paper is concerned with the solvability of the problem of processor renaming in unreliable, completely asynchronous distributed systems. Fischer et al. prove in [8] that &ldquo;nontrivial consensus&rdquo; cannot be attained in such systems, even when only a single, benign processor failure is possible. In contrast, this paper shows that problems of processor renaming can be solved even in the presence of up to t < n/2 faulty processors, contradicting the widely held belief that no nontrivial problem can be solved in such a system. The problems deal with renaming processors so as to reduce the size of the initial name space. When only uniqueness of the new names is required, we present a lower bound of n + 1 on the size of the new name space, and a renaming algorithm that establishes an upper bound on n + t. If the new names are required also to preserve the original order, a tight bound of 2&prime;(n - t + 1) - 1 is obtained.
Time Scale Decomposition of a Class of Generalized Stochastic Petri Net Models
Authors: H. H. Ammar, S. M. Rezaul Islam
Venue: IEEE Transactions on Software Engineering (1989)

A time-scale decomposition (TSD) algorithm of a class of generalized stochastic Petri net (GSPN) models of systems comprising activities whose duration differ by orders of magnitude is presented. The GSPN model of a system can be decomposed into a hierarchical sequence of aggregated subnets, each of which is valid at a certain time scale. These smaller subnets are solved in isolation and their solutions are combined to get the solution of the whole system. A degradable multiprocessor system which would be intractable using conventional techniques, is analyzed using TSD. The complexity of the TSD algorithm can be orders of magnitude smaller without any significant loss in the accuracy of the result. In general, the error due to aggregation is proportional to the maximum degree of coupling between aggregates. An expression of the error due to aggregation is also given in terms of the ratio of fast and slow transitions in the GSPN model. The algorithm is easy to use and can be easily automated.
A fresh look at optimizing array bound checking
Authors: Rajiv Gupta
Venue: ACM SIGPLAN Notices (1990)

This paper describes techniques for optimizing range checks performed to detect array bound violations. In addition to the elimination of range checks, the optimizations discussed in this paper also reduce the overhead due to range checks that cannot be eliminated by compile-time analysis. The optimizations reduce the program execution time and the object code size through elimination of redundant checks, propagation of checks out of loops, and combination of multiple checks into a single check. A minimal control flow graph (MCFG) is constructed using which the minimal amount of data flow information required for range check optimizations is computed. The range check optimizations are performed using the MCFG rather the CFG for the entire program. This allows the global range check optimizations to be performed efficiently since the MCFG is significantly smaller than the CFG. Any array bound violation that is detected by a program with all range checks included, will also be detected by the program after range check optimization and vice versa. Even though the above optimizations may appear to be similar to traditional code optimizations, similar reduction in the number of range checks executed can not be achieved by a traditional code optimizer. Experimental results indicate that the number of range checks performed in executing a program is greatly reduced using the above techniques.