ppxscal/embedding_network huggingface dataset:
Implementation of Interlisp on the VAX
Authors: Raymond L. Bates, David Dyer, Johannes A. G. M. Koomen
Venue: Proceedings of the 1982 ACM symposium on LISP and functional programming (1982)

This paper presents some of the issues involved in implementing Interlisp [19] on a VAX computer [24] with the goal of producing a version that runs under UNIX[17], specifically Berkeley VM/UNIX. This implementation has the following goals: &bull; To be compatible with and functionally equivalent to Interlisp-10. &bull; To serve as a basis for future Interlisp implementations on other mainframe computers. This goal requires that the implementation to be portable. &bull; To support a large virtual address space. &bull; To achieve a reasonable speed. The implemention draws directly from three sources, Interlisp-10 [19], Interlisp-D [5], and Multilisp [12]. Interlisp-10, the progenitor of all Interlisps, runs on the PDP-10 under the TENEX [2] and TOPS-20 operating systems. Interlisp-D, developed at Xerox Palo Alto Research Center, runs on personal computers also developed at PARC. Multilisp, developed at the University of British Columbia, is a portable interpreter containing a kernel of Interlisp, written in Pascal [9] and running on the IBM Series/370 and the VAX. The Interlisp-VAX implementation relies heavily on these implementations. In turn, Interlisp-D and Multilisp were developed from The Interlisp Virtual Machine Specification [15] by J Moore (subsequently referred to as the VM specification), which discusses what is needed to implement an Interlisp by describing an Interlisp Virtual Machine from the implementors' point of view. Approximately six man-years of effort have been spent exclusively in developing Interlisp-VAX, plus the benefit of many years of development for the previous Interlisp implementations.
Integration of Advanced Reservation and Bandwidth Reconfiguration Based Admission Control in Wireless Networks with Multimedia Services
Authors: Jian Ye, Jiongkuan Hou, Symeon Papavassiliou
Venue: Proceedings of the 23rd International Conference on Distributed Computing Systems (2003)

In this paper we propose an integrated bandwidth management and call admission control scheme applicable in wireless networks that support multiple services with different QoS requirements. The proposed scheme is achieved via i) the integration of a position-assisted and mobility-based predictive advanced bandwidth reservation mechanism that facilitates the seamless operation of the handoff process and ii) a bandwidth reconfiguration based call admission control strategy that supports flexible QoS management. The comparison of the achievable performance of our proposed scheme with the corresponding results of conventional systems demonstrate that our integrated strategy can alleviate the problem of over-reservation, support seamless operation throughout the wireless network and increase significantly the system resource utilization.
The analysis of storage constraints by a queueing network model with blocking
Authors: M. Reiser, A. G. Konheim
Venue: Proceedings of the 1974 ACM SIGMETRICS conference on Measurement and evaluation (1974)

The finite capacity of storage has a significant effect on the performance of a contemporary computer system. Yet it is difficult to formulate this problem and analyze it by existing queueing network models. We present an analysis of an open queueing model with two servers in series in which the second server has finite storage capacity. This network is an exponential service system; the arrival of requests into the system is modeled by a Poisson process (of rate &lgr;) and service times in each stage are exponentially distributed (with rates &agr; and &bgr; respectively). Requests are served in each stage according to the order of their arrival. The principal characteristic of the service in this network is blocking; when M requests are queued or in service in the second stage, the server in the first stage is blocked and ceases to offer service. Service resumes in the first stage when the queue length in the second stage falls to M-1. Neuts [1] has studied two-stage blocking networks (without feedback) under more general statistical hypothesis than ours. Our goal is to provide an algorithmic solution which may be more accessible to engineers.
A real time error correcting data transmission system treated as a Markov process
Authors: Frank J. Kuhn
Venue: Proceedings of the 1966 21st national conference (1966)

When requirements for real time data transmission systems include error detection and block retransmittal capabilities, then the existence of some form of buffer storage unit between the uncontrolled data source and the transmitting terminal is implied. This paper is the result of an effort to determine an optimal storage capacity for a real time input transmission system to a time-shared digital computer upon the basis of known transmission link error statistics and transmission rates.
Operating system design with computer network communication protocols
Authors: Wilfried G. PROBST, Gregor V. BOCHMANN
Venue: Proceedings of the fifth symposium on Data communications (1977)

In view of the size and complexity of modern operating systems, this paper proposes their subdivision into a set of smaller functional modules and the implementation of a number of their functions on separate hardware processors. The information transfer requirements resulting from physically separated system components are examined and the adaptation of a standard end-to-end protocol is suggested for an efficient solution to the interprocess communication problems.
An algorithm for modeling saturating magnetic devices
Authors: George A. O'Sullivan
Venue: Proceedings of the 7th Design Automation Workshop (1970)

Nonlinear magnetic devices present complexities in circuit analysis that are not readily solved by conventional techniques. Two algorithms are developed that provide computer-aided techniques for the classical problems of saturation, hystersis and the multicircuit device. Hystersis, long recognized as a difficult analytical problem, is managed by dual numerical integration for each nonlinear magnetic device.
Compressing control ROM for VLSI microprogrammed microprocessors
Authors: Karl M. Guttag
Venue: Proceedings of the 13th annual workshop on Microprogramming (1980)

By taking advantage of information redundancy and MOS structures, control ROMs for microprogrammed microprocessors can be considerably reduced. The Compressed Control ROM (CCROM) method for reducing control ROMs is described in terms of a simple example that compares the fully horizontal (unencoded) approach, the normal partially encoded approach, and the CCROM approach. Due to using CCROM, the effective cost of control ROM is considerably reduced, and this in turn can have a significant effect on the design approach by making it more cost effective to implement control signals directly from the control ROM rather than from random logic decodes.
Estimating the truncation error with a modified runge-kutta method
Authors: Donald W. Wong
Venue: Proceedings of the 1956 11th ACM national meeting (1956)

The Runge-Kutta method of solving systems of differential equations does not contain a simple way for estimating the truncation error or for detecting arithmetic mistakes. Usually two solutions with different values of the integration step interval h are obtained, and agreement in the solutions to a specified number of decimal places gives an estimate of the accuracy. In this paper the Runge-Kutta third-order method is modified by the addition of an extra computation. This extra computation involving about 30% more computing, permits an estimate of the truncation error at each step of the numerical solution. A digital computer can be automatically programmed to modify the integration interval h to obtain a specified accuracy during the course of the computations. The optimum choice of h often makes up for the time needed to make the extra computation at each step.
Path delay analysis for hierarchical building block layout system
Authors: Eiji Tamura, Kimihiro Ogawa, Toshio Nakano
Venue: Proceedings of the 20th Design Automation Conference (1983)

This paper describes a path delay analysis system which employs an accurate signal delay calculation method for MOS LSIs, taking poly resistance into account. The system takes mask patterns generated by a hierarchical building block layout system as inputs, and verifies timing margins of a large scale random logic LSI in a module-wise bottom up fashion. Path delay analysis using a critical path trace algorithm and an enumerative path trace algorithm in combination is effective in locating critical timing regions in a chip and in analyzing critical paths in the regions in detail.
&ldquo;Progress towards an accessible computing information sharing data base&rdquo;
Authors: Lyle B. Smith
Venue: Proceedings of the 3rd annual ACM SIGUCCS conference on User services (1975)

It is believed that the sharing between Computing Centers can be facilitated by an accessible computing information about sharing data base. Ideas, manpower, problem solutions, instructional material, documentation plus software products and hardware cycles can all be shared. Efforts are underway at Stanford to create the accessible data base that will enlarge sharing opportunities for all participating centers. Accessibility of the data base is felt to be the key to its usefulness.
VLSI architectures for high speed recognition of context-free languages and finite-state languages
Authors: King-Hang Chu, King-Sun Fu
Venue: Proceedings of the 9th annual symposium on Computer Architecture (1982)

This paper presents two VLSI architectures for the recognition of context-free languages and finite-state languages. The architecture for context-free languages consists of n(n+1)/2 identical cells and it is capable of recognizing an input string of length n in 2n time units. The architecture for finite-state languages consists of n cells and it can recognize a string of length n in constant time. Since both architectures have characteristics such as modular layout, simple constrol and dataflow pattern, high degree of multiprocessing and/or pipelining, etc., they are very suitable for VLSI implementation.
Information retrieval in the office environment
Authors: M. T. Pezarro
Venue: Proceedings of the 1983 annual conference on Computers : Extending the human resource (1983)

The question of information retrieval in the office environment must be considered in two contexts: personal and organizational. In the personal context the issue is increasing individual effectiveness and productivity; in the organizational context it is one of increasing an organization's overall effectiveness and productivity, partially by improvements at the level of the individual but primarily by improvements to the systems and procedures through which individuals work together. The end user requirements of the two contexts are quite different, a fact which must be taken into account when designing information retrieval systems for the office environment.
Data transmission services and network developments in the United Kingdom
Authors: D. W.F. Medcraft
Venue: Proceedings of the sixth symposium on Data communications (1979)

This position statement reviews existing Datel services, current progress towards realisation of packet switched and circuit switched data networks, and plans for eventual evolution to an Integrated Services Digital Network.
Diagnosis of TCM failures in the IBM 3081 Processor complex
Authors: Nandakumar N. Tendolkar
Venue: Proceedings of the 20th Design Automation Conference (1983)

The concepts of automated diagnostics that were developed for and that are implemented in the IBM 3081 Processor complex are presented in this paper. Significant features of the 3081 diagnostics methodology are the capability to isolate intermittent as well as solid hardware failures and the automatic isolation of a failure to the failing field-replaceable unit (FRU) in a high percentage of the cases. The problem of isolating intermittent faults is solved by a new strategy of dynamic error detection and fault isolation by analysis of data captured at the detection of the error.
Architectural support for the efficient generation of code for horizontal architectures
Authors: B. R. Rau, C. D. Glaeser, E. M. Greenawalt
Venue: ACM SIGARCH Computer Architecture News (1982)

Horizontal architectures, such as the CDC Advanced Flexible Processor [I] and the FPS APi20-B [2}, consist of a number of resources that can operate in parallel, each of which is controlled by a field in the wide instruction word. Such architectures have been developed to perform high speed scientific computations at a modest cost: Figure 1 displays those characteristics of horizontal architectures that are germane to the issues discussed in this paper. The simultaneous requirements of high performance and low cost lead to an architecture consisting of multiple pipelined processing elements (PEs) such as adders and multipliers, a memory (which for scheduling purposes may be viewed as yet another PE with two operations: a READ and a WRITE), and an interconnect which ties them all together. The interconnect allows the result of one operation to be directly routed to another PE as one of the inputs for an operation that is to be performed there. The required memory bandwidth is reduced since temporary values need not be written to and read from the memory. The final aspect of horizontal processors that is of interest is that their program memories emit wide instructions which synchronously specify the actions of the multiple and possibly dissimilar PEs. The program memory is sequenced by a conventional sequencer that assumes sequential flow of control unless a branch is explicitly specified. As a consequence of the simplicity of such an architecture, it is inexpensive relative to the potential performance of the multiple pipelined PEs. However, if this potential performance is to be realized, the multiple resources of a horizontal processor must be scheduled effectively. The scheduling task for conventional horizontal processors is quite complex and the construction of highly optimizing compilers for them is a difficult and expensiw3 project. The polycyclic architecture [3- 6] is a horizontal architecture with architectural support for the scheduling task. The cause of the complexity involved in scheduling conventional horizontal processors and the manner in which the polycyclic architecture addresses this issue are outlined in this paper.
Identification of different functional properties of multiple valued switching functions
Authors: Peter T. Cheung
Venue: Proceedings of the sixth international symposium on Multiple-valued logic (1976)

A general cubical notation is introduced to describe any multiple valued switching functions with any don't care conditions. Different functional properties of multiple valued switching functions such as equivalency, redundancy, symmetry, monotone increasing and monotone decreasing are investigated. Computer-oriented algorithms are presented using the general cubical notation to identify different functional properties of multiple valued switching functions with the maximum don't care assignments calculated. All algorithms use the basic set of simple operations which are also used for other applications such as the minimization of multiple valued switching functions, and are easy to implement using existing computers.
Software lending library
Authors: Karen W. Allen
Venue: Proceedings of the 12th annual ACM SIGUCCS conference on User services (1984)

Cornell University has a rather unique approach in microcomputer user support. In the spring of 1983, we ordered several software packages for our office IBM personal computers. At the time we also purchased all the microcomputers for university departments. Because of this situation, we were in the public eye of campus microcomputer users. People would inquire about our software as they saw it in our office. How did we like it? Could they try it? Remember, software is usually purchased for a specific machine. How did we provide support to our campus users and remain legal? Since we were such a public area we thought that something like a lending library might be a feasible option. We drafted policies on how we would check out software packages. A deposit, either a check or a departmental account number, would be required. People could check out a package for a week at a time, and they would have to sign a form stating that they had no intention of copying either the software or the documentation. We then drafted a letter to the dozen or so companies whose software we had and asked their permission to let users try the software. Enclosed with each letter was a copy of the form users would sign indicating the restrictions and limitations of use. Much to our delight, most companies responded very favorably to our request. After this initial success, I decided to carry the library one step further. We supported Apple, IBM, and DEC microcomputers for the campus and subscribed to a number of computer magazines. I selected about 100 packages that had received good reviews from campus users and/or magazines. These companies were contacted and asked if they would participate in our library by supplying us with a package. If this was not possible, did they have a demonstration package, or could they give us some kind of a discount? The result is a three-page list of software housed in the Lending Library. The list is updated monthly (some packages arrive for a 30-60 day trial), because of new additions. Most companies are more than happy to participate and approve of our attempts to keep materials secure. Many of the software companies were unsure how to respond to this novel idea. Since the inception of the Lending Library, several universities and the Cornell Medical College in New York City have contacted us for guidance and advice on how &ldquo;to get started.&rdquo; It is certainly worth the time and effort to begin such a library and support the users in this way.
Introducing subprograms as the first control structure in an introductory course
Authors: Lawrence J. Mazlack
Venue: Proceedings of the fourteenth SIGCSE technical symposium on Computer science education (1983)

The usefulness of introducing subprograms (PROCEDUREs and FUNCTIONs) as the first program control structure in an introductory programming course is discussed. The motivation for an instructor to do this is to place an earlier and greater emphasis on top-down design and structured programming. Specific pedalogical examples are provided.
Software management (Panel Discussion)
Authors: Leon Presser
Venue: Proceedings of the 1975 annual conference (1975)

There should be little doubt (e.g., [1]) that since modern computer systems came into being the cost and risk of failure of software design and development efforts has been, in most cases, extremely high. In particular, the situation is critical in the case of large programming efforts, where cost overruns and failures are not uncommon. Albeit management has been aware of the problems for some time, it is now painfully cognizant of the need to improve software management techniques. This is not surprising, since as we witness the coming together of the foundations of computer science, we should expect its associated management to mature. In other words, as we develop a better understanding of the principles of computer science, we should improve on the manner in which we manage their applications. It is the objective of this session to bring the current state of software management into focus, and to illuminate possible avenues of progress. In an attempt to fulfill this goal we have collected a group of position papers that examine the situation from different viewpoints, and in such a manner that the aggregate of comments provide a panorama of the problems. The session commences with a series of observations, by Professor Presser, on the state of software management. This is followed by Mr. Baker who discusses the current application of modern ideas in the management of production programming. The next paper, by Mr. DiNardo, examines, in a provocative manner, the impact of the new technology in a commercial environment. The fourth paper, by Professor Lucas, provides a formal business perspective of the problems under discussion. Finally, Col. Thayer, summarizes and makes interesting observations on the evolution of software management in the United States Air Force. Sufficient references are provided by the aggregate of papers to allow the interested reader to pursue the topics in more detail.
Rapidly Extendable Natural Language
Authors: Bozena Henisz Thompson, Frederick B. Thompson
Venue: Proceedings of the 1978 annual conference (1978)

A major thrust of artificial intelligence research is how to build knowledge of the application domain into computer systems. We investigate how the user himself can introduce his own expert knowledge into his data base system through rapid language extension so that it may then respond intelligently to his curt queries and commands.Illustrations of rapid language extension using the REL System are presented and discussed.
Experiences moving COBOL onto a minicomputer
Authors: Steven S. Herrick
Venue: ACM SIGPLAN Notices (1976)

This paper presents some subjective experience and relative qualitative results concerning the transfer of a full High Level COBOL compiler designed for the IBM S/370 to a Low-Intermediate Level on a 32-bit minicomputer. The major impacts of language feature deletion upon compiler size and complexity, as well as the effects of specific compiler and object code support via micro-coding, are discussed.
Supercomputers: Challenges to designers and users
Authors: Myron Ginsberg
Venue: Proceedings of the ACM '82 conference (1982)

SESSION OVERVIEW: The objective of this panel is to present and discuss issues concerned with the development and use of present and future supercomputers for large-scale scientific and engineering problems. Presentations by each of four panelists will be followed by a question and answer session with audience participation. Below some brief background information is given on the subject matter along with a list of several topics that will be addressed. Also included is a bibliography to help the reader become acquainted with the many aspects of the session theme.
Sharing problems: Personal computers as interpersonal tools
Authors: Adele Goldberg
Venue: Proceedings of the 3rd ACM SIGSMALL symposium and the first SIGPC symposium on Small systems (1980)

This brief introduction sets the stage for the keynote address. It does not contain the complete text. History is recalled and a problem stated. Examples of attempts to solve this problem will be shared in the presentation.
Simulation in higher education planning: Walk before you run
Authors: Nancy S. Sampson
Venue: Proceedings of the 10th conference on Winter simulation - Volume 2 (1978)

A variety of simulation models exist for higher education planning applications. These models tend to be general and global in nature. The sophisticated models appear to provide quantities of detailed information in preformated, attractive reports. An introductory survey frequently influences decisions to adopt a sophisticated model, before an institution has really learned what modeling is, how to use it and how to adapt to it. Use of a trivial simulation model should not be overlooked as an aid in the planning process. Such a simulation can provide valid, understandable, useful, timely information for the planning process. It may also provide a basis for critical WHAT IF assessments. Furthermore, a trivial model can help an institution learn the how, when, where and why of planning simulation before trying to run, with a sophisticated, and perhaps unwieldy, model. Contrasting case studies of simulation applications will be used to illustrate uses, misuses and problems associated with trivial and sophisticated simulation models used in planning for higher education.