ppxscal/embedding_network huggingface dataset:
A graphical query language supporting recursion
Authors: Isabel F. Cruz, Alberto O. Mendelzon, Peter T. Wood
Venue: ACM SIGMOD Record (1987)

We define a language G for querying data represented as a labeled graph G. By considering G as a relation, this graphical query language can be viewed as a relational query language, and its expressive power can be compared to that of other relational query languages. We do not propose G as an alternative to general purpose relational query languages, but rather as a complementary language in which recursive queries are simple to formulate. The user is aided in this formulation by means of a graphical interface. The provision of regular expressions in G allows recursive queries more general than transitive closure to be posed, although the language is not as powerful as those based on function-free Horn clauses. However, we hope to be able to exploit well-known graph algorithms in evaluating recursive queries efficiently, a topic which has received widespread attention recently.
A recursive interpreter for the Icon programming language
Authors: J. O'Bagy, R. E. Griswold
Venue: Papers of the Symposium on Interpreters and interpretive techniques (1987)

The implementation of the Icon programming language is more interesting and difficult than the implementation of many other programming languages because an expression in Icon can generate a sequence of results. The implementation therefore must support control backtracking in expression evaluation. There also are several novel control structures related to generators. Because expression evaluation is limited lexically, a full coroutine mechanism is not needed and expression evaluation can be handled in a stack-like fashion.The implementation of Icon consists of a virtual machine with a stack-based architecture and an interpreter that executes the virtual machine instructions. There have been several different interpreters for Icon's virtual machine. This paper describes a new approach in which the interpreter is called recursively whenever the context for expression evaluation changes. This recursive interpreter has the advantage of being conceptually clear and flexible without sacrificing efficiency.
An object-oriented approach to data management: why design databases need it
Authors: S. Heiler, U. Dayal, J. Orenstein, S. Radke-Sproull
Venue: Proceedings of the 24th ACM/IEEE Design Automation Conference (1987)

An object-oriented approach to management of engineering design data requires object persistence, object-specific rules for concurrency control and recovery, views, complex objects and derived data, and specialized treatment of operations, constraints, relationships and type descriptions. We discuss object-orientation as more than an implementation paradigm, and show how an object-oriented approach simplifies both use and implementation of engineering design systems.
Polynomial time solutions of some problems of computational algebra
Authors: K Friedl, L Rónyai
Venue: Proceedings of the seventeenth annual ACM symposium on Theory of computing (1985)

The first structure theory in abstract algebra was that of finite dimensional Lie algebras (Cartan-Killing), followed by the structure theory of associative algebras (Wedderburn-Artin). These theories determine, in a non-constructive way, the basic building blocks of the respective algebras (the radical and the simple components of the factor by the radical). In view of the extensive computations done in such algebras, it seems important to design efficient algorithms to find these building blocks. We find polynomial time solutions to a substantial part of these problems. We restrict our attention to algebras over finite fields and over algebraic number fields. We succeed in determining the radical (the &ldquo;bad part&rdquo; of the algebra) in polynomial time, using (in the case of prime characteristic) some new algebraic results developed in this paper. For associative algebras we are able to determine the simple components as well. This latter result generalizes factorization of polynomials over the given field. Correspondingly, our algorithm over finite fields is Las Vegas. Some of the results generalize to fields given by oracles. Some fundamental problems remain open. An example: decide whether or not a given rational algebra is a noncommutative field.
How (not) to code a finite state machine
Authors: D. W. Jones
Venue: ACM SIGPLAN Notices (1988)

The standard advice for those coding a finite state machine is to use a while loop, a case statement, and a state variable. This is usually bad advice! The reasons for this are explored here, and better advice is formulated.
Of moles and men: the design of foot controls for workstations
Authors: G. Pearson, M. Weiser
Venue: ACM SIGCHI Bulletin (1986)

Workstations require use of the hands both for text entry and for cursor-positioning or menu-selection. The physical arrangement does not allow these two tasks to be done concurrently. To remove this restriction, various alternative input devices have been investigated. This work focuses on the class of foot-operated computer input devices, called moles here. Appropriate topologies for foot movement are identified, and several designs for realising them are discussed.
TOOLS: a unifying approach to object-oriented language interpretation
Authors: K. Koskimies, J. Paakki
Venue: Papers of the Symposium on Interpreters and interpretive techniques (1987)

The object-oriented paradigm is applied to the interpreting of programming languages. An intermediate representation of a program is created as a collection of objects representing various entities in the conceptual world of the source language. These objects cover both the static and the dynamic aspects of a program. As a major advantage of this approach, issues that are traditionally handled by very different techniques (like symbol table management and the generation and execution of intermediate code) can be treated in a unified manner. The specification language of an interpreter generator based on these principles is described.
A hardware switch level simulator for large MOS circuits
Authors: M. T. Smith
Venue: Proceedings of the 24th ACM/IEEE Design Automation Conference (1987)

The HSS is a Hardware Switch level Simulator that has been designed and built to be a useful and cost effective addition to a MOS circuit designers tool set. The HSS is based on the MOSSIM software simulator, but has been further developed to include hardware for simulating pass transistor circuits and for doing timing simulation. By using dynamic RAM for internal list storage, a single HSS processor can accommodate a circuit of up to 262,144 MOS devices. The HSS can be interfaced to a variety of host computers via a general purpose parallel interface, and in its current form offers a 25 times speed improvement compared to MOSSIM II running on a VAX 11-780. Timing mode offers similar speed advantages, with delay calculations that are sufficiently accurate for many simulation tasks.
The parallel complexity of exponentiating polynomials over finite fields
Authors: Faith E. Fich, Martin Tompa
Venue: Journal of the ACM (JACM) (1988)

Modular integer exponentiation (given a, e, and m, compute ae mod m) is a fundamental problem in algebraic complexity for which no efficient parallel algorithm is known. Two closely related problems are modular polynomial exponentiation (given a(x), e, and m(x), compute (a(x))e mod m(x)) and polynomial exponentiation (given a(x), e. and t, compute the coefficient of xt in (a(x))e). It is shown that these latter two problems are in NC2 when a(x) and m(x) are polynomials over a finite field whose characteristic is polynomial in the input size.
Roundtable: point accelerators vs. general purpose machines for ECAD
Venue: ACM SIGDA Newsletter (1988)

Parallel CAD algorithms and machines span the range from the academically interesting to the commercially interesting, with a broad middle ground. The architectures include point accelerators, general-purpose CAD accelerators, and general-purpose parallel machines. A researcher in a university will evaluate these tools employing a different set of criteria than a user or supplier. In academia, one has to get funds and do interesting research; in a company, building, selling, and making a profit are the objectives.
A window-based graphics frame store architecture
Authors: Richard J. Westmore
Venue: ACM Transactions on Graphics (TOG) (1988)

A proposal for a scalable frame store architecture for a hardware-based window graphics system is described. The architecture is based on a distributed linear array of common elements called microframe stores. Each window and viewport can be independently configured in size and color depth. Unlike the strip-based hardware window systems referenced, this system places no restrictions on the number of transitions that can be accommodated on each scanline. The approach described allows real-time window graphics to be achieved on a variety of full-color, high-resolution, high-refresh-rate, raster-scan displays with pixel rates of up to 400 MHz.
Principles of an icons-based language
Authors: C. Frasson, M. Er-radi
Venue: ACM SIGMOD Record (1986)

Improvements both in technology and in user-oriented software have shown the feasibility of new kinds of non-procedural languages. However, interaction between end-user and data should rely more and more on graphical languages and, particularly, on 'iconic&rdquo; languages. In the following we review and analyze the forces which are at the origin of changes in the user environment. We give the main specifications of an iconic interface and a command language based on icons. Examples are given in a medical environment.
A two-pass solution to the rendering equation: A synthesis of ray tracing and radiosity methods
Authors: John R. Wallace, Michael F. Cohen, Donald P. Greenberg
Venue: ACM SIGGRAPH Computer Graphics (1987)

View-independent and view-dependent image synthesis techniques, represented by radiosity and ray tracing, respectively, are discussed. View-dependent techniques are found to have advantages for calculating the specular component of illumination and view-independent techniques for the diffuse component. Based on these observations a methodology is presented for simulating global illumination within complex environments using a two-pass approach. The first pass is view-independent and is based on the hemi-cube radiosity algorithm, with extensions to include the effects of diffuse transmission, and specular to diffuse reflection and transmission. The second pass is view-dependent and is based on an alternative to distributed ray tracing in which a z-buffer algorithm is used to sample the intensities contributing to the specularly reflected or transmitted intensity.
The successful information center: what does it take?
Authors: Robert L Leitheiser, James C Wetherbe
Venue: Proceedings of the twenty-first annual conference on Computer personnel research (1985)

The growth of end-user computing is one of the most important trends in information systems today. Organizations are increasingly turning to information centers to facilitate and coordinate these activities. This paper reports the results of a field survey of information center managers. It attempts to identify major successes and problems that are faced by these managers. It also aims to define critical success factors for such centers. The paper concludes with recommendations on how firms can apply the results of the study to their own situations.
URPR&mdash;An extension of URCR for software pipelining
Authors: B. Su, S. Ding, J. Xia
Venue: ACM SIGMICRO Newsletter (1986)

The software pipeline technique is an effective approach to optimizing loops in array processor programs, but existing methods are of high complexity and the results may not be satisfactory. This paper introduces the URPR algorithm, an extension of the microcode loop compaction algorithm URCR. Firstly, unroll the loop(the number of unrolled loop bodies relies on the inter-body data dependency); secondly, pipeline the unrolled loop bodies one by one; and finally, a new optimized loop body is obtained after rerolling. Preliminary tests indicate that URPR produces favorable results with lower complexity.
Logic Networks with a Minimum Number of NOR(NAND) Gates for Parity Functions of n Variables
Authors: H. C. Lai, S. Muroga
Venue: IEEE Transactions on Computers (1987)

Design of logic networks, in single-rail input logic, with a minimum number of NOR gates for parity functions of an arbitrary number of variables is described. This is partly based on minimum networks for parity functions of a small number of variables which are designed by the integer programming logic design method. Although it is generally difficult to design minimum networks for functions of an arbitrarily large number of variables, we have previously designed minimum networks for adders of an arbitrary number of variables. The minimum networks for parity functions of an arbitrary number of variables discussed in this paper is another case. Many unique properties of minimum NOR networks for parity functions are shown. Minimum networks with NAND gates for parity functions can be easily obtained from those with NOR gates because of duality relationship between NAND and NOR.
Program Structure Charts for Applicative Languages
Authors: F. G. Pagan
Venue: IEEE Transactions on Software Engineering (1987)

A framework for a system of charts compatible with the use of applicative programming languages is proposed and illustrated. The charts are similar in spirit to the structured flowcharts that have sometimes been used with algorithmic languages. They are based on a method of representing the structure of nested expressions of arbitrary complexity. This method is adaptable to the incorporation of graphical devices for the depiction of local identifier bindings, conditional expressions, recursive function definitions, and the various functional combining forms employed in the FP-style of applicative programming.
Control predicates are better than dummy variables for reasoning about program control
Authors: Leslie Lamport
Venue: ACM Transactions on Programming Languages and Systems (TOPLAS) (1988)

When explicit control predicates rather than dummy variables are used, the Owicki-Gries method for proving safety properties of concurrent programs can be strengthened, making it easier to construct the required program annotations.
An input/output subsystem for the Hawk operating system kernel
Authors: David L. Harris
Venue: ACM SIGOPS Operating Systems Review (1988)

This paper describes the input/output subsystem that is provided with the Hawk operating system kernel and the SANDAC V computer. Hawk and the SANDAC V were designed for embedded hard real-time applications. The IOS is a hierarchically organized set of modules t h a t can be configured to match the requirements of a specific real-time application. It was designed to interact with and control a variety of peripheral devices, some of which do not match traditional models. The subsystem executes concurrently with the application tasks in either an asynchronous or synchronous fashion.
The ART of Adaptive Pattern Recognition by a Self-Organizing Neural Network
Authors: Gail A. Carpenter, Stephen Grossberg
Venue: Computer (1988)

The adaptive resonance theory (ART) suggests a solution to the stability-plasticity dilemma facing designers of learning systems, namely how to design a learning system that will remain plastic, or adaptive, in response to significant events and yet remain stable in response to irrelevant events. ART architectures are discussed that are neural networks that self-organize stable recognition codes in real time in response to arbitrary sequences of input patterns. Within such an ART architecture, the process of adaptive pattern recognition is a special case of the more general cognitive process of hypothesis discovery, testing, search, classification, and learning. This property opens up the possibility of applying ART systems to more general problems of adaptively processing large abstract information sources and databases. The main computational properties of these ART architectures are outlined and contrasted with those of alternative learning and recognition systems.
Simultaneous WRITES of parallel random access machines do not help to compute simple arithmetic functions
Authors: Rüdiger Reischuk
Venue: Journal of the ACM (JACM) (1987)

The ability of the strongest parallel random access machine model WRAM is investigated. In this model different processors may simultaneously try to write into the same cell of the common memory. It has been shown that a parallel RAM without this option (PRAM), even with arbitrarily many processors, can almost never achieve sublogarithmic time. On the contrary, every function with a small domain like binary values in case of Boolean functions can be computed by a WRAM in constant time. The machine makes fast table look-ups using its simultaneous write ability. The main result of this paper implies that in general this is the &ldquo;only way&rdquo; to perform such fast computations and that a domain of small size is necessary. Otherwise simultaneous writes do not give an advantage. Functions with large domains for which any change of one of the n arguments also changes the result are considered, and a logarithmic lower time bound for WRAMs is proved. This bound can be achieved by machines that do not perform simultaneous writes. A simple example of such a function is the sum of n natural numbers.
A uniform architecture for rule-based meta-reasoning and representation: a case study
Authors: A. S. Maida
Venue: Proceedings of the 1987 Fall Joint Computer Conference on Exploring technology: today and tomorrow (1987)

This Paper describes an elegant architecture for reasoning with meta representations. The architecture uses the same inference engine both for reasoning/representation and meta reasoning/representation. The resulting system is very good at reasoning about its representations as long as it does not have to directly modify its control structure. We have examined this architecture for application to the domain of belief reasoning. Such a system seems well matched to belief reasoning applications where the process of simply reasoning about another agent's beliefs would never directly change that other agent's beliefs. We have concluded that even in such a promising domain, a uniform architecture seems too costly in terms of various practical considerations including: clarity, speed, and parallelizability. Although, we consider this only one particular case study, it is hard to imagine an application area more well suited to the features that this architecture can offer. As such we would expect less encouraging results in other domains.
A foundation for programming environments
Authors: J H Reppy, E R Gansner
Venue: Proceedings of the second ACM SIGSOFT/SIGPLAN software engineering symposium on Practical software development environments (1987)

Recent work on generating tools and techniques have significantly eased the design and construction of programming environments (PEs). Concurrently, advances in workstation hardware have enhanced both the potential capabilities and performance of PEs. We argue that, to capitalize on these two developments, various deficiencies in traditional languages and operating systems must be avoided. To this end, we have developed Pegasus, a system to serve as a software foundation for the construction and execution of PEs. It consists of a concurrent functional programming language, the run-time support for this language, and a core library of standard tools and utilities. We present a discussion of Pegasus, its current state, and directions for future development.
A verified sliding window protocol with variable flow control
Authors: A U Shankar
Venue: ACM SIGCOMM Computer Communication Review (1986)

We present a verified sliding window protocol which uses modulo-N sequence numbers to achieve reliable flow-controlled data transfer between a source and a destination. Communication channels are assumed to lose, duplicate and reorder messages in transit. The destination's data needs are represented by a receive window whose size can vary with time. The destination entity uses acknowledgement messages to inform the source entity of the current receive window size and the sequence number of the data word next expected. The source entity responds by sending segments of data words that lie within the allowed window. Each data segment is accompanied by an identifying sequence number and the size of the data segment. The destination entity also uses selective acknowledgement and selective reject messages to inform the source entity of the reception or lack of reception, respectively, of out-of-sequence data segments. Thus, this protocol is a proper extension of the Arpanet's TCP. We have obtained the minimum value of N that ensures correct data transfer and flow control, in terms of the minimum message transmission time, the maximum message lifetime, and the maximum receive window size. The protocol imposes no constraints on the retransmissions of messages or on the data segment sizes; thus, any retransmission policy that optimizes the protocol's performance can be used.
Comments on Program Slicing
Authors: Hareton K. N. Leung, Hassan K. Reghbati
Venue: IEEE Transactions on Software Engineering (1987)

This correspondence points out some of the problems with Weiser's algorithm [5] for computing program slices. Corrections are made to Weiser's algorithm. It is shown how Weiser's algorithm can be amended to handle loops. Advantages of the Bergeretti and Carre's approach [1] are discussed.
An interactive test sequence generator
Authors: H Ural, R Short
Venue: ACM SIGCOMM Computer Communication Review (1986)

The interactive test sequence generator (ITSG) is a software tool which provides the capability of generating test sequences from logic specifications in an interactive manner. A logic specification is a collection of Horn clauses coded in Prolog describing the externally observable behaviour of a system. ITSG facilitates a controlled traversal of the execution paths described by a logic specification and is written in C_Prolog running under UNIX 4.2 on Vax 750. In this paper, first the form of logic specifications is described and an outline of a logic specification for a protocol entity (i.e., protocol specification) is presented. Then, ITSG is introduced and its functionality is explained. As well, the possible usage of ITSG in constructing conformance test suites for protocol implementation testing is discussed and a simple scenario for developing a conformance test suite is presented.
Software reuse based on a process programming system
Authors: Y. Matsumoto, Y. Ohfude
Venue: Proceedings of the 1987 Fall Joint Computer Conference on Exploring technology: today and tomorrow (1987)

In a unified life cycle model, which has been made to known by the author, a design process is divided into many unit processes interconnected in customized order. The design processes for a project is modelled by a set of objects acting concurrently, where the description of a unit workload is projected to a object. Each object describes process program which reflects designer activity implementing corresponding unit workload. By executing the objects, messages to guide designers to perform activities are generated. In the messages, identifications of candidate reusable modules are included. The existing process programs are also reusable modules.