ppxscal/embedding_network huggingface dataset:
Computer patent disclosures
Authors: Joseph P. Kates
Venue: Communications of the ACM (1964)

Suppose a potentially very valuable experimental multi-computer system is being designed by you and your group. You feel you have made at least a system invention. In your Company scientists and engineers are responsible for initiating invention disclosures.
Assignment and Procedure Call Proof Rules
Authors: David Gries, Gary Levin
Venue: ACM Transactions on Programming Languages and Systems (TOPLAS) (1980)

The multiple assignment statement is defined in full generality&mdash;including assignment to subscripted variables and record fields&mdash;using the &ldquo;axiomatic&rdquo; approach of Hoare. Proof rules are developed for calls of procedures using global variables, var parameters, result parameters, and value parameters, using the idea of multiple assignment to provide understanding. An attempt is made to clarify some issues that have arisen concerning the use of rules of inference to aid in generating &ldquo;verification conditions&rdquo; in mechanical verifiers and the use of logical variables to denote initial values of program variables.
Completions of Goldschmidt Amalgams of Type G4 in Dimension 3
Authors: Christopher Parker, Peter Rowley
Venue: Journal of Algebraic Combinatorics: An International Journal (2001)

The subgroups of GL3(i>k) which are completions of the Goldschmidt i>G4-amalgam are determined. We also draw attention to five related graphs which are remarkable in that they have large girth and few vertices.
Consecutive storage of relevant records with redundancy
Authors: Sakti P. Ghosh
Venue: Communications of the ACM (1975)

This paper studies the properties of a new class of file organizations (CRWR) where records relevant to every query are stored in consecutive storage locations but the organizations contain redundancy. Some theorems which provide tools for reducing redundancy in CRWR organizations have been also developed. Redundancies obtained by the application of these theorems are compared with that of query-inverted file organizations. Some CRWR organizations with minimum redundancy have also been developed for queries which specify sets of keys.
Reusability and adaptability of interactive resources in Web-based educational systems
Authors: Abdulmotaleb El Saddik, Stephan Fischer, Ralf Steinmetz
Venue: Journal on Educational Resources in Computing (JERIC) (2001)

The production of interactive multimedia content is in most cases an expensive task in terms of time and cost. Hence, optimizing production by exploiting the reusability of interactive multimedia elements is mandatory. Reusability can be triggered by a combination of resuable multimedia components and the appropriate use of metadata to control the components as well as their combination. In this article, we discuss the reusability aspects of interactive multimedia content in web-based learning systems. In contrast to existing approaches, we extend a component-based architecture to build interactive multimedia visualization units with the use of metadata for reusability and customizability. In the three-tier model, the lowest layer of the paradigm corresponds to the programmer (code reusability). The user interface of an educational visualization is located at the top layer where the interaction with the end-user (student) takes place. The educator is located between the top and the bottom layers. This medium layer allows adapting interactive multimedia content according to the needs of the user, applying a predefined set of metadata. The teacher can both adjust the level of explanation and the level of interactivity of an animation, and influence the presentation and the results of the algorithms being illustrated (program reusability). After a theoretical overview, we explain our architecture by giving an example of an application.
A hierarchy of conditions for consensus solvability
Authors: Achour Mostefaoui, Sergio Rajsbaum, Michel Raynal, Matthieu Roy
Venue: Proceedings of the twentieth annual ACM symposium on Principles of distributed computing (2001)

In a previous paper we introduced the condition-based approach, consisting of identifying sets of input vectors, called conditions, for which there exists an asynchronous protocol solving consensus despite the occurrence of up to f process crashes, and characterized this set of conditions, @@@@wkf. Here, we investigate @@@@wkf from the complexity perspective, and show that this class consists of a hierarchy of classes of conditions, @@@@[d]f, where d, 0 &lne; d &lne; f, is the degree of the condition, each one strictly contained in the previous one. The value f - d represents the &ldquo;difficulty&rdquo; of the class @@@@[d]f: we present a generic condition-based protocol that can be instantiated with any C &isin; @@@@[d]f, and solve consensus with (2n + 1) [log2([(f - d)/2] + 1)] shared memory read/write operations per process. For each d we present two natural conditions, C1[d]f and C2[d]f, that might be useful in practice, and we use them to show that the class containments stated above are strict. Various properties of the hierarchy are also derived. Mainly, it is shown that a class can be characterized in two equivalent but complementary ways: one is convenient for designing protocols while the other is for analyzing the class properties.
WebCom: A Web Based Volunteer Computer
Authors: John P. Morrison, James J. Kennedy, David A. Power
Venue: The Journal of Supercomputing (2001)

The World Wide Web has become the largest single possible source of processing power. By coupling CPU time donated by volunteers, researchers and industry have the ability to execute applications that traditionally were in the domain of the supercomputer users. This paper presents one such attempt at creating a system capable of exploiting this abundance of processing power. It is based on an inherently parallel model of computing. The concepts behind computational model are explained and the implementation details are illustrated. The paper presents results obtained from various tests of this implementation.
The equivalence of reducing transition languages and deterministic languages
Authors: Mario Schkolnick
Venue: Communications of the ACM (1974)

The class of reducing transition languages introduced by Eickel, Paul, Bauer, and Samelson was shown by Morris to be a proper superclass of the simple precedence languages. In this paper this result is extended, showing that, in fact, the first class is equivalent to the class of deterministic context free languages.
Kaleidoscope: using design patterns in CS1
Authors: Michael R. Wick
Venue: ACM SIGCSE Bulletin (2001)

Most computer science curricula include design patterns during the junior/senior software development sequence. We present a simplified application of two classic design patterns that is specifically targeted at students in their first programming course. We also include suggested pedagogy on how to develop the concepts necessary to implement and appreciate the application.
Some techniques for using pseudorandom numbers in computer simulation
Authors: T. Donnelly
Venue: Communications of the ACM (1969)

An alogorithm is described by which uniform pseudorandom integers may be used to construct binary &ldquo;numbers&rdquo; in which the probability that each bit in the word is a 1-bit and can assume any desired parameter value. Techniques for making use of such &ldquo;numbers&rdquo; in simulation programming are described.
Polynomial algorithms for partitioning problems on graphs with fixed clique-width (extended abstract)
Authors: Daniel Kobler, Udi Rotics
Venue: Proceedings of the twelfth annual ACM-SIAM symposium on Discrete algorithms (2001)

We consider three graph partitioning problems, both from the vertices and the edges point of view. These problems are dominating set, list-q-coloring with costs (fixed number of colors q) and coloring with non-fixed number of colors. They are all known to be NP-hard in general. We show that all these problems (except edge-coloring) can be solved in polynomial time on graphs with clique-width bounded by some constant k, if the k-expression of the input graph is also given. In particular, we present the first polynomial algorithms (on these classes) for chromatic number, edge-dominating set and list-q-coloring with costs (fixed number of colors q, both vertex and edge versions). Since these classes of graphs include classes like P4-sparse graphs, distance hereditary graphs and graphs with bounded treewidth, our algorithms also apply to these graphs.
A student's perspective of a capstone course
Authors: Matthew C. Davis
Venue: Proceedings of the fourteenth annual consortium on Small Colleges Southeastern conference (2000)

The portrait of team dynamics in a capstone course is an intriguing saga rarely witnessed in full by the course's instructor. This student's perspective into one such course attempts to provide insights into the composition of the group and its effects on the course's outcome.
A stopping criterion for the Newton-Raphson method in implicit multistep integration algorithms for nonlinear systems of ordinary differential equations
Authors: W. Liniger
Venue: Communications of the ACM (1971)

In the numerical solution of ordinary differential equations, certain implicit linear multistep formulas, i.e. formulas of type &sum;kj=0 &agr;jxn+j - h &sum;kj=0 &bgr;jxn+j = 0, (1) with &bgr;k> &ne; 0, have long been favored because they exhibit strong (fixed-h) stability. Lately, it has been observed [1-3] that some special methods of this type are unconditionally fixed-h stable with respect to the step size. This property is of great importance for the efficient solution of stiff [4] systems of differential equations, i.e. systems with widely separated time constants. Such special methods make it possible to integrate stiff systems using a step size which is large relative to the rate of change of the fast-varying components of the solution.
Bounds and Combinatorial Structure of (k,n)Multi-Receiver A-Codes
Authors: Satoshi Obana, Kaoru Kurosawa
Venue: Designs, Codes and Cryptography (2001)

In the model of (k,n) multi-receiver authentication codes ( A-codes), a transmitter broadcasts a message m to n receivers in such a way that not only an outside opponent but also any k-1 receivers cannot cheat any other receiver. In this paper, we derive lower bounds on the cheating probabilities and the sizes of keys of (k,n) multi-receiver A-codes. The scheme proposed by Desmedt, Frankel and Yung meets all our bounds with equalities. This means that our bounds are tight and their scheme is optimum. We further show a combinatorial structure of optimum (k,n) multi-receiver A-codes. A notion of TWOOAs is introduced. A TWOOA is a pair of orthogonal arrays which satisfy a certain condition. We then prove that an optimum (k,n) multi-receiver A-code is equivalent to a TWOOA.
On the reuse of symbolic simulation results for incremental equivalence verification of switch-level circuits
Authors: L. Ribas-Xirgo, J. Carrabina-Bordoll
Venue: Proceedings of the conference on Design, automation and test in Europe (1998)

Incremental methods are successfully applied to deal with successive verifications of slightly modified switch-level networks. That is, only those parts affected by the changes are symbolically traversed for verification. In this paper, we present an incremental technique for symbolic simulators which is inspired in both existing incremental techniques for non-symbolic simulators and a token-passing mechanisms in Petri nets.
IPP: a web-based interactive programming portfolio
Authors: John K. Estell
Venue: Proceedings of the thirty-second SIGCSE technical symposium on Computer Science Education (2001)

The portfolio is a well-established method for documenting student learning outcomes. This paper presents the development of a web-based interactive programming portfolio methodology at our institution. This methodology allows the reviewer to easily interact with the computer program under review through the use of Java applets. Both an evaluation form as well as detailed rubrics for the evaluation of the portfolio entry is accessible from the web page containing the portfolio entry. These resources allow reviewers to easily submit their feedback electronically to our students.
Using symbolic algebra in algorithmic level DSP synthesis
Authors: Armita Peymandoust, Giovanni De Micheli
Venue: Proceedings of the 38th annual Design Automation Conference (2001)

Current multimedia applications require the design of data-path intensive circuits. Unfortunately, current design tools and methods support design abstraction at a level that is inferior to the expectation of designers. Namely, most arithmetic-level optimizations are not supported and they are left to the designers' ingenuity. In this paper, we show how symbolic algebra can be used to construct an arithmetic-level decomposition algorithm. We also introduce our tool, SymSyn, that performs arithmetic library mapping and optimization of data-flow descriptions into data paths using arithmetic components.
An analysis of algorithms for the Dutch National Flag Problem
Authors: Colin L. McMaster
Venue: Communications of the ACM (1978)

Solutions to the Dutch National Flag Problem have been given by Dijkstra [1] and Meyer [3]. Dijkstra starts with a simple program and arrives at an improved program by refinement. Both of the algorithms given by Dijkstra are shown to have an expected number of swaps which is 2/3N + &thgr;(1) and that these values differ at most by 1/3 of a swap and asymptotically by 1/4 of a swap. The algorithm of Meyer is shown to have expected swap complexity 5/9 N.
A note on starting the Newton-Raphson method
Authors: W. A. Beyer
Venue: Communications of the ACM (1964)

Determination of a suitable initial estimate for a root of an equation &fnof;(x) = 0 by means of computing the roots of a sequence of related equations is described.
A Unified Framework for Optimizing Locality, Parallelism, and Communication in Out-of-Core Computations
Authors: Mahmut Kandemir, Alok Choudhary, J. Ramanujam, Meenakshi A. Kandaswamy
Venue: IEEE Transactions on Parallel and Distributed Systems (2000)

This paper presents a unified framework that optimizes out-of-core programs by exploiting locality and parallelism, and reducing communication overhead. For out-of-core problems where the data set sizes far exceed the size of the available in-core memory, it is particularly important to exploit the memory hierarchy by optimizing the I/O accesses. We present algorithms that consider both iteration space (loop) and data space (file layout) transformations in a unified framework. We show that the performance of an out-of-core loop nest containing references to out-of-core arrays can be improved by using a suitable combination of file layout choices and loop restructuring transformations. Our approach considers array references one-by-one and attempts to optimize each reference for parallelism and locality. When there are references for which parallelism optimizations do not work, communication is vectorized so that data transfer can be performed before the innermost loop. Results from hand-compiles on IBM SP-2 and Intel Paragon distributed-memory message-passing architectures show that this approach reduces the execution times and improves the overall speedups. In addition, we extend the base algorithm to work with file layout constraints and show how it is useful for optimizing programs that consist of multiple loop nests.
A multivariate Weierstrass iterative rootfinder
Authors: Olivier Ruatta
Venue: Proceedings of the 2001 international symposium on Symbolic and algebraic computation (2001)

We propose an algorithm to compute simultaneously all the solutions of an algebraic system (of n equations in n variables) that define a zero-dimentional variety. This new approach generalises the univariate Weierstrass's method. We study the arithmetic complexity of this method that has a quadratic convergence in a neighbourhood of the solutions. Hereafter, we describe a method based on the iteration function of the multivariate Weierstrass's method and on the continuation method for computing the roots of polynomial systems. Finally we describe some numerical experiments of those methods.
A note on the calculation of average working set size
Authors: D. R. Slutz, I. L. Traiger
Venue: Communications of the ACM (1974)

Finite-length reference string of arbitrary structure are considered, and an exact expression for average working set size in terms of &ldquo;corrected&rdquo; interreference interval statistics is derived. An example is discussed; upper and lower bounds are obtained; and the average working set size function is shown to be efficiently obtained for a set of page sizes, in a single pass of the reference string. This work follows the developments of a paper by Denning and Schwartz, who consider infinite-length reference strings which satisfy certain statistical properties and who derive an expression relating the asymptotic average working set size to the asymptotic missing page rate function under working set replacement.
BIST TPG for Combinational Cluster Interconnect Testing at Board Level
Authors: Chen-Huan Chiang, Sandeep K. Gupta
Venue: Journal of Electronic Testing: Theory and Applications (2000)

A novel built-in self-test (BIST) architecture and a test pattern generator (TPG) design methodology to program this architecture are presented for inter-IC interconnects among combinational non-boundary scan ICs (often called cluster-ICs) via IEEE 1149.1 boundary scan architecture (BSA). Due to the expense and complexity of BSA circuitry, cluster-ICs are still widely used in modern circuit boards. Since combinational logic and 3-state cluster nets exist within cluster interconnect, in order to test all detectable faults in inter-IC nets that include cluster-ICs, newly identified TPG requirements are used to guarantee fault coverage during the design of proposed BIST architecture. This architecture contains a two-level C-TPG that generates constrained pseudo-random patterns for boundary scan cells (BSCs) of cluster control cones, a D-TPG that generates patterns for BSCs of cluster data cones, and a look-up table which is programmed to select, for each BSC, a specific C-TPG or D-TPG stage whose content is shifted into that BSC. This test architecture provides a true BIST solution for cluster testing. The proposed methodology generates TPGs that (i) guarantee the avoidance of multi-driver conflicts when testing via BSA, (ii) guarantee the detection of all testable interconnect faults, (iii) have low area overheads, and (iv) have short test lengths.
A formal model of responsibilities in agent-based teams
Authors: J. Colby Johnson, Thomas R. Ioerger
Venue: Proceedings of the fifth international conference on Autonomous agents (2001)

In this short paper, we describe the foundations of responsibility in MAS and present a formalism of responsibility for use in future work.
An algorithm for solving a special class of tridiagonal systems of linear equations
Authors: Donald J. Rose
Venue: Communications of the ACM (1969)

An algorithm is presented for solving a system of linear equations Bu = k where B is tridiagonal and of a special form. This form arises when discretizing the equation - d/dx (p(x) du/dx) = k(x) (with appropriate boundary conditions) using central differences. It is shown that this algorithm is almost twice as fast as the Gaussian elimination method usually suggested for solving such systems. In addition, explicit formulas for the inverse and determinant of the matrix B are given.
Design and Analysis of Built-In Testers for CMOS Switched-Current Circuits
Authors: Cheng-Ping Wang, Chin-Long Wey
Venue: Analog Integrated Circuits and Signal Processing (2000)

This paper presents the design and analysis of a built-in tester circuit for MOS switched-current circuits used in low-voltage/low-power mixed-signal circuits/systems. The use of the tester can reduce the test length significantly. The developed tester is comprised of a current comparator, a voltage window comparator, and a digital latch. The current comparator is required to have high-accuracy, low-power consumption, simple structure with small chip area, and moderate speed. Results show that the developed current comparator circuit is developed with a small offset current, 0.1 nA, low power consumption, 20 &mu;W, and a layout area of 0.01 mm^2, where the circuit is simulated with the MOSIS SCN 2 &mu;m CMOS process parameters and 2 V supply voltage.
Linear Codes and Their Coordinate Ordering
Authors: Sylvia B. Encheva, Gérard D. Cohen
Venue: Designs, Codes and Cryptography (2000)

A necessary and sufficient condition for a q-ary code to satisfy the two-way chain condition (TCC) is found. A known construction of q-ary codes is shown to yield codes satisfying the TCC. Some q-ary codes of dimension k \leq 6 meeting the Griesmer bound are proved to satisfy the TCC.
Fast Lighting Independent Background Subtraction
Authors: Yuri Ivanov, Aaron Bobick, John Liu
Venue: International Journal of Computer Vision (2000)

This paper describes a simple method of fast background subtraction based upon disparity verification that is invariant to arbitrarily rapid run-time changes in illumination. Using two or more cameras, the method requires the off-line construction of disparity fields mapping the primary background images. At runtime, segmentation is performed by checking background image to each of the additional auxiliary color intensity values at corresponding pixels. If more than two cameras are available, more robust segmentation can be achieved and, in particular, the occlusion shadows can be generally eliminated as well. Because the method only assumes fixed background geometry, the technique allows for illumination variation at runtime. Since no disparity search is performed, the algorithm is easily implemented in real-time on conventional hardware.
Storage Capacity of the Exponential Correlation Associative Memory
Authors: Richard C. Wilson, Edwin R. Hancock
Venue: Neural Processing Letters (2001)

In this paper we analyze the pattern storage capacity of the exponential correlation associative memory (ECAM). This architecture was first studied by Chiueh and Goodman &lsqb;3&rsqb; who concluded that, under certain conditions on the input patterns, the memory has a storage capacity that was exponential in the length of the bit-patterns. A recent analysis by Pelillo and Hancock &lsqb;9&rsqb;, using the Kanerva picture of recall, concluded that the storage capacity was limited by 2N&minus;1/N2 patterns. Both of these analyses can be criticised on the basis that they overlook the role of initial bit-errors in the recall process and deal only with the capacity for perfect pattern recall. In other words, they fail to model the effect of presenting corrupted patterns to the memory. This can be expected to lead to a more pessimistic limit. Here we model the performance of the ECAM when presented with corrupted input patterns. Our model leads to an expression for the storage capacity of the ECAM both in terms of the length of the bit-patterns and the probability of bit-corruption in the original input patterns. These storage capacities agree closely with simulation. In addition, our results show that slightly superior performance can be obtained by selecting an optimal value of the exponential constant.