ppxscal/embedding_network huggingface dataset:
VTIcompose - a powerful graphical chip assembly tool
Authors: Stephen Trimberger
Venue: Proceedings of the 21st Design Automation Conference (1984)

VTIcompose is a graphical chip assembly tool. It is designed to ease the assembly of large-scale custom chips in a hierarchical manner, leaving the detailed cell design to other tools in the system. VTIcompose supports both manual and automatic placement and interconnection, with commands and data structures applicable to both exact placement and symbolic style layout. The wide range of commands allows VTIcompose to support a wide range of chip design styles.
VLSI based design principles for MIMD multiprocessor computers with distributed memory management
Authors: Lars Philipson
Venue: Proceedings of the 11th annual international symposium on Computer architecture (1984)

Design principles for MIMD multiprocessor computers with virtual memory based on a common, global and uniform logical address space, supporting parallel, procedural languages such as Ada (Ada is a registered trademark of the US Government, AJPO), are discussed. The major design issues are identified and suggested solutions given, the most important of which are distributed, associative address translation, and local mechanisms supporting efficient resource allocation policies to reduce over-all communication costs. Arguments are given for using shared memory and bus-based global communication. Some preliminary studies of bus-based intercommunication schemes, parallel language implementation, capacity simulation and VLSI implementation are reviewed, as well as a number of existing experimental and commercial multiprocessors. Finally an experimental system for evaluation of different mechanisms and policies in systems of the suggested type is outlined.
Teaching structured programming in FORTRAN with IFTRAN
Authors: William R. Bezanson
Venue: ACM SIGCSE Bulletin (1975)

The outline of an introductory FORTRAN programming course based on structured programming is presented. The language IFTRAN was used as a FORTRAN preprocessor, allowing regular FORTRAN statements plus more powerful conditional and looping statements. Program development was taught in the course by means of top-down stepwise refinement. Students were well motivated and developed a professional attitude towards programming.
Structured Systems Analysis and the Problem Statement Language (PSL)(8) as a combined methodology in the teaching of System Analysis and Design
Authors: R. J. Thomas, J. A. Kirkham
Venue: Proceedings of the ACM '81 conference (1981)

The techniques of Structured Systems Analysis are compared with the Problem Statement Language (PSL) and a method of teaching which involves the best features of both is proposed and discussed. The development work being carried out at Bradford in developing a version of PSL suitable for use in the teaching environment is described.
The logical design of the Oak Ridge digital computer
Authors: C. L. Perry
Venue: Proceedings of the 1952 ACM national meeting (Toronto) (1952)

The ORACLE (Oak Ridge Automatic Computer and Logical Engine) is a high speed general purpose automatically sequenced computer which is presently in the final stage of assembly and test. In 1950 Argonne National Laboratory, which was then building the AVIDAC agreed to build the ORACLE for Oak Ridge. Oak Ridge engineers and scientists have assisted Argonne in the design and construction of the computer. This computer project has also had the advantage of being able to use the experience gained by other groups particularly those at Los Alamos(1), University of Illinois (2), and the Institute for Advanced Studies(3). The ORACLE is a modification of the AVIDAC which in turn is a modification of the IAS (Institute for Advanced Studies) computer. Engineering modifications (4) were made to improve reliability and ease of maintenance and to increase the speed of operation of the computer. Modifications in the logical design were made to permit more efficient use of the fast memory by reducing the length of programs (by extending the number of automatic operations).
The L* data language
Authors: J. C. Gray, J. C. Tomlinson
Venue: Proceedings of the ACM annual conference (1973)

L* is a high-level language for defining and manipulating data structures and data bases. Its formalism derives from the concepts of sets and relations on sets. Unlike some recent proposals L* is a complete language in itself containing procedural facilities and does not therefore rely on being embedded in some host. Preliminary studies have shown it to be well suited to its field of application.
Representing rubik's cube in APL
Authors: Howard A. Peelle
Venue: Proceedings of the international conference on APL (1984)

Seven alternative representations of Rubik's Cube are presented and compared: a 3-by-3-by-3 array of 3-digit integers; a 6-by-3-by-3 array of literals; a 5-by-12 literal matrix; an ll-by-ll sparse literal matrix; a 54-element vector; a 4-dimension array; and a 3-by-3-by-3 nested array. APL functions are given for orientation moves and quarter-turns plus several useful tools for solving the cube.
Bounds on minimax edge length for complete binary trees
Authors: M. S. Paterson, W. L. Ruzzo, L. Snyder
Venue: Proceedings of the thirteenth annual ACM symposium on Theory of computing (1981)

Information is not transferred instantaneously; there is always a propagation delay before an output is available as an input to the next computational step. Propagation delay is a function of wire length, so we study the length of edges in planar graphs. We prove matching (to within a constant factor) upper and lower bounds on minimax edge length for four planar embedding problems for complete binary trees. (The results are summarized in Table 1.) Because trees are often subcircuits of larger circuits, these results imply general performance limits due to propagation delay. The results give important information for the popular technique of pipelining.
The architecture of CASSM: A cellular system for non-numeric processing
Authors: George P. Copeland,  Jr., G. J. Lipovski, Stanley Y.W. Su
Venue: Proceedings of the 1st annual symposium on Computer architecture (1973)

This paper presents the architecture of a context-addressed cellular system for non-numeric information processing, using an inexpensive, large-capacity circulating memory device. The system allows data to be represented in a structure very close to the form as the user perceives it (information structure) and allows the search operations of high level queries to be implemented directly. The information structures currently used in existing information systems are described. Then the architecture of the system as a whole is presented, as well as the implementation of these information structures as basic data types and hardware management of storage allocation and garbage collection. The paper intends to demonstrate that distributing intelligence throughout a rotating memory device can decrease the time required for search operations in large data bases. And that the search strategy and storage management functions can be efficiently carried out in hardware, greatly simplifying the software of information systems. Thus, data not only becomes faster but easier to access, verify, insert and delete.
The utilization of an Information Systems Simulator for line balancing
Authors: M. W. Shiveley, J. W. Simonds
Venue: Proceedings of the 7th conference on Winter simulation - Volume 2 (1974)

A simulation technique for line-balancing has been developed to utilize an Information Systems Simulator Developed at Lehigh University. A precedence diagram is constructed from the work elements of the line and translated into a partially ordered file. The file system enables the user to determine, store, and maintain pertinent information such as the ultimate followers of each task, the total number of immediately preceding tasks, tasks larger than the desired cycle time, and other information essential for decision-making. The algorithm can process an almost unlimited number of activities and requires less than 30,000 words of core storage. Where perfect balance is impossible, the balancing algorithm can obtain the &ldquo;best&rdquo; balance through the use of prescribed station flexibility.
Computing technology and the third world
Authors: A. Dewachi
Venue: Proceedings of the eleventh SIGCSE technical symposium on Computer science education (1980)

The advent of computing technology has made far more impact in the developed world than any other technology in the past. The effect of this technology on third world countries has, so far, not been different from the introduction of other types of technologies. This paper attempts to highlight the negative aspects of the present state of computing in these countries in the hope that lessons can be drawn which will improve and modify future developments and trends. Transferring the development pattern of the developed world would be unwise as this has proved inadequate in the industrialization process of third world countries. The paper also argues the role of international agencies and computer suppliers in the dissemination of information on computing technology and suggests a more pragmatic approach to the development of endogenous capacities through direct interaction between developed and less developed countries. Examples of development profiles are drawn from the Arab region and guidelines for future plans are proposed.
A medium level compiler generating microcode
Authors: Jed B. Marti, Robert R. Kessler
Venue: ACM SIGMICRO Newsletter (1979)

Described is a medium level language and compiler which generates microcode for the Burroughs 1800. The language significantly aids implementation of microcode interpreters for this machine.
Microcomputers are personal...
Authors: Carl T. Helmers,  Jr.
Venue: Proceedings of the 3rd ACM SIGSMALL symposium and the first SIGPC symposium on Small systems (1980)

The effects of microcomputers on our personal lives are pervasive. We wear microcomputers on our wrists as watches. We use dedicated microcomputers in appliances as diverse as microwave ovens, televisions, phone answering machines and sphygmomanometers. We buy ourselves and our children various microcomputer implemented games and educational toys. We actually use microcomputers explicitly in our personal computers: for personal data bases, word processors, tools of education, sources of recreation, communicators, and so on. The character of our technological civilization is changing significantly due to the abilities of these &ldquo;printed computers&rdquo; constructed on silicon chips.
Language concepts for distributed processing of large arrays
Authors: Piyush Mehrotra, Terrence W. Pratt
Venue: Proceedings of the first ACM SIGACT-SIGOPS symposium on Principles of distributed computing (1982)

A large array is an array whose storage is distributed among primary and secondary storage and whose processing may be distributed among several tasks in a distributed system. This paper presents a semantic model (set of language concepts) for representing large arrays in a distributed system in such a way that the performance realities inherent in the distributed storage and processing can be adequately represented. An implementation of the large array concept as an ADA package (abstract data type) is described, as well as a particular tailoring of the concept for the NASA Finite Element Machine. An example application program using the package is also described.
Variability assumptions and their effect on capital investment risk
Authors: F. J. Brewerton, William B. Allen
Venue: Proceedings of the 6th conference on Winter simulation (1973)

Conventional methods of analyzing risk in capital investment decisions fail to represent investment risk or variability in investment return because the calculation of rates of return using simple averages of the basic investment factors disguises the combined effect of external factor values on the rate of return. With Monte Carlo simulation, the sampling of investment factors according to their probability estimates allows the representation of factor variability in the rate of return calculations. The usual procedure of assuming normally distributed factor probability is a simplifying assumption that influences the representation of variability and risk. According to statistical theory, Monte Carlo simulations with non-normal variability assumptions will produce simulated rates of return that are normally distributed but with greater degrees of variability. The purpose of this paper is to examine the results of simulations which utilize non-normal factors and to compare these results with those obtained using normally distributed investment factors and mean value investment factors.
The microprocessor: Out of control ?
Authors: Ronald L. Krutz
Venue: Proceedings of the 1975 annual conference (1975)

The paper deals with the need for a microcontroller as opposed to a microprocessor in a large segment of applications. The trend toward upgrading the microprocessor via the traditional data processing routes; such as, the addition of DMA, Arithmetic Capability, and Direct Addressing of large amounts of memory, is diametrically opposed to the requirements of many control applications. A discussion of the capabilities of some of the popular microprocessors relative to control application is given. Also, some proposed architectures for one-chip microcontrollers are presented.
Functional specification of synchronized processes based on modal logic
Authors: Naoki Yonezaki, Takao Katayama
Venue: Proceedings of the 6th international conference on Software engineering (1982)

We present in this paper a pseudo functional language and a specification language both of which are designed to describe systems of synchronized processes with shared resources. The semantics of the pseudo functional language is defined by translating its statements to the set of formulas of intensional logic. The specification language contains formulas of the logic, hence its semantics can be treated by the model theory as usual. A proof method for the program written in the language is proposed. Time dependent aspects of processes are described in terms of intensional logic. Specification of parallel systems can be described in a well structured manner in our specification language, more precisely, they are described hierarchically according to the function decomposition of the system, and at each level of the hierarchy the configuration of processes and resources and time dependent properties are separately described. Resources are defined as an abstract data type with synchronization specification. We give an example of specification and a proof of a program written in the parallel pseudo functional programming language.
A complexity theory of grammar problems
Authors: H. B. Hunt,  III
Venue: Proceedings of the 3rd ACM SIGACT-SIGPLAN symposium on Principles on programming languages (1976)

The close relationship between programming language syntax, context-free grammars (abbreviated cfgs), parsing, and compiling is well-known and is extensively discussed in [1]. Unfortunately, many of the problems about programming languages, one might wish to solve, are equivalent to undecidable grammar problems. Two especially important such problems are (1) the emptiness of intersection problem, i.e. determining if the intersection of the languages generated by a pair of grammars is empty, and (2) the grammar class membership problem, i.e. determining for a fixed class of grammars r and a grammar G, if G is an element of T.
On the average behavior of set merging algorithms (Extended Abstract)
Authors: Andrew Chi-chih Yao
Venue: Proceedings of the eighth annual ACM symposium on Theory of computing (1976)

In this paper we study the expected running time of a variety of algorithms that perform set merging. The set merging problem (for example, see AHU [1]) is concerned with using suitable data structures to represent partition of a set S &equil; { 1,2, .... ,n} so that a sequence of instructions of the form &ldquo;x &Xgr; y&rdquo;, meaning &ldquo;Find the subset containing x; Find the subset containing y; Merge the two subsets if they are different.&rdquo; may be carried out efficiently. Several alternative data structures for solving this problem are known, and their worse-case complexity fairly well understood [3], [4], [5], [8]. In contrast, the average behavior of even the most basic of these schemes remains an open problem [6]. It is the purpose of the present paper to determine the average behavior for several of the set merging algorithms commonly known.
On the random oracle hypothesis
Authors: Stuart A. Kurtz
Venue: Proceedings of the fourteenth annual ACM symposium on Theory of computing (1982)

We give two counterexamples to the random oracle hypothesis as formalized by Bennett and Gill[2]. We then discuss the future of the random oracle hypothesis in light of these examples We believe that these examples will severely test any new candidate for a formal random oracle hypothesis.
Computation for conductance distributions of percolation lattice cells
Authors: Rabbe Fogelholm
Venue: Proceedings of the fourth ACM symposium on Symbolic and algebraic computation (1981)

For a network, built from links whose conductances are given by some discrete statistical distribution, including a finite zero-conductance probability, and where links are assumed independent, the distribution of conductances for the network as a whole is of interest in the study of percolation on lattices. This quantity is computed by different methods for a set of test networks. It is found that the computation is more efficiently done by manipulating the networks themselves in a suitable representation rather than by computing with symbolic expressions for their conductance. In particular, with ordinary computer algebra systems there were severe limitations due to expression growth in this study.
The design of a template structure for a generalized data structure definition facility
Authors: Billy G. Claybrook
Venue: Proceedings of the 2nd international conference on Software engineering (1976)

A template structure capable of defining the runtime configuration of general data structures, e.g. arrays (homogeneous and non-homogeneous), cells, stacks, queues, trees, and general lists (graphs), for a generalized data structure definition facility that has practical utility in applications where thousands of data structures can be in existence at any given time is described. An important aspect of this template structure organization is that like instances of a data structure allocated at runtime share a common template rather than each allocated instance of a data structure having its own individual template. The motivation for sharing templates is derived from the fact that large numbers of data structures can be active at runtime, and templates can occupy a considerable amount of storage (in some instances a template can occupy as much or more storage than the data structure elements themselves). The importance of template sharing in a paging system, and the capability of the template structure for facilitating the design and implementation of general operations such as insert and delete are discussed.
An approximate solution of a weighted scheduling problem with multiple constraints
Authors: Michael S. Skaff
Venue: Proceedings of the 1966 21st national conference (1966)

The general problem of scheduling n items in some optimal fashion has been of interest for many years. Several variations of this problem are frequently encountered in industry. A recent example, the scheduling of manned space experiments, requires a scheme for selection and scheduling of n experiments in a fixed mission time. Since the number of experiments performed on a given flight may be large, the total number of possible schedules could be enormous. Hence, the practicality of a direct approach, even using the fastest digital computers available, is questionable. In order to attack this problem a technique was developed which provides a solution &ldquo;optimal&rdquo; in the following sense: If points are assigned to each experiment, then the optimal solution is that schedule in which the total number of points is greatest. The technique schedules one experiment at a time, but not necessarily sequentially in mission time. Instead, it schedules experiments in those time slots which yield an immediate approximation to an optimal schedule. The problem of optimal scheduling of n items in this sense is well known. As far as we know, no unique computational algorithm exists for the problem. In fact, no general theory has been developed which is applicable to this problem. The technique presented here is offered as a feasible computer solution.
An analysis of the performance of the page fault frequency (PFF) replacement algorithm.
Authors: E. Sadeh
Venue: Proceedings of the fifth ACM symposium on Operating systems principles (1975)

Most of the replacement algorithms devised and implemented largely depend on program behavior, in other words, to optimally select the parameters of these algorithms program behavior or at least a probability model of it should be known. The page fault frequency (PFF) algorithm adapts to dynamic changes in program behavior during execution. Therefore its performance is expected to be less dependent on prior knowledge of the program behavior during execution. Therefore its performance is expected to be less dependent on prior knowledge of the program behavior and input data. The PFF algorithm uses the measured page fault frequency (by actually monitoring the inter-page fault interval) as the basic parameter for memory allocation decision process. In order to analyze the performance of the PFF algorithm, a mathematical model was developed. The resultant random process is the memory space allocation for a program as a function of the processor time (virtual time). This random process can be analyzed using the method of imbedded Markov chains. The parameter obtained from this analysis are the distributions of the memory allocation during processing interval and during page waiting intervals, the average page fault rate and the expected space time product accumulated by the program. The input parameters for the model were obtained from address traces of two programs. The results of the model were validated by simulation.
A study of responsive electronic vehicular instrumentation
Authors: Joseph S. Nadan
Venue: Proceedings of the 5th conference on Winter simulation (1971)

The advent of low-cost ultrareliable integrated circuits has made feasible the design of a responsive electronic vehicular instrumentation system that results in significant improvement in the surveillance of highway internal performance factors; e.g. detection and apprehension of violations, location and identification of stolen and/or wanted vehicles, location and identification of disabled vehicles, etc., while reducing the cost. The responsive electronic vehicular instrumentation system (REVIS), shown in Figure 1, consists of a roadside transmitter-receiver-decoder and a vehicular transponder. This system may first be introduced in an evolutionary manner by substituting the transponder for toll schedule cards on turnpikes; a more revolutionary approach yielding improved system performance would be the legislated requirement of compulsory installation of the transponder package in all vehicles manufactured for use in the United States. The roadside transmitter-receiver-decoder continually broadcasts a low power querry code in its narrow capture range that enables the vehicular transponder to respond with a unique identification code; i.e. to uniquely encode 100 million vehicles would require 27 bits, i.e. 227 &equil; 134, 217, 728 which is greater than 100 million. The decoder then sequentially adds 10 bits to encode detector identification number and time of encounter. This information is then processed to determine whether the vehicle has violated a predetermined set of rules; any required action being initiated by the system. The following examples illustrate the system operation.