ppxscal/embedding_network huggingface dataset:
Computation of the radical of polynomial ideals over fields of arbitrary characteristic
Authors: Elisabetta Fortuna, Patrizia Gianni, Barry Trager
Venue: Proceedings of the 2001 international symposium on Symbolic and algebraic computation (2001)

We study the problem of the computation of the radical of an ideal of polynomials with coefficients over fields of arbitrary characteristic. We show how to use Seidenberg's condition P to solve this problem in the case of positive characteristic.
Eliminating redundancies in sum-of-product array computations
Authors: Steven J. Deitz, Bradford L. Chamberlain, Lawrence Snyder
Venue: Proceedings of the 15th international conference on Supercomputing (2001)

Array programming languages such as Fortran 90, High Performance Fortran and ZPL are well-suited to scientific computing because they free the scientist from the responsibility of managing burdensome low-level details that complicate programming in languages like C and Fortran 77. However, these burdensome details are critical to performance, thus necessitating aggressive compilation techniques for their optimization. In this paper, we present a new compiler optimization called Array Subexpression Elimination (ASE) that lets a programmer take advantage of the expressibility afforded by array languages and achieve enviable portability and performance. We design a set of micro-benchmarks that model an important class of computations known as stencils and we report on our implementation of this optimization in the context of this micro-benchmark suite. Our results include a 125% improvement on one of these benchmarks and a 50% average speedup across the suite. Also we show a speedup of 32% improvement on the ZPL port of the NAS MG Parallel Benchmark and a 29% speedup over the hand-optimized Fortran version. Further, the compilation time is only negligibly affected.
Wireless architecture for access to remote services (WiARS) (poster session)
Authors: Amisha Thakkar, Bina Ramamurthy
Venue: Addendum to the 2000 proceedings of the conference on Object-oriented programming, systems, languages, and applications (Addendum) (2000)

Our research involves the creation of a plug and play environment where different devices and services can be made to function together effortlessly. Currently the connection of any entity to another entity, through a network, needs prior setup and configuration. We aim to design an architecture, which requires minimal setup processes or none, for easy access to remote services using the Wireless Application Protocol (WAP) and Jini.
Content-based video similarity model
Authors: Yi Wu, Yueting Zhuang, Yunhe Pan
Venue: Proceedings of the eighth ACM international conference on Multimedia (2000)

The most commonly used method for content-based video retrieval is query by example. But the definition of video similarity brings great obstacle to further research. This paper puts forward a new approach to solve the difficulty. Firstly, it advances centroid feature vector of shot in order to reduce the storage of video database. Secondly, considering all the factors existing in human vision perception, it introduces a new comparison algorithm based on multi-granularity of video structure, which has great flexibility. Thirdly, after getting the similar video set, we take a brand-new method of feedback to adjust weight based on video similarity model. In this way, retrieval result can be optimized greatly.
Implementing E-Transactions with Asynchronous Replication
Authors: Svend Frølund, Rachid Guerraoui
Venue: IEEE Transactions on Parallel and Distributed Systems (2001)

This paper describes a distributed algorithm that implements the abstraction of e-Transaction: a transaction that executes exactly-once despite failures. Our algorithm is based on an asynchronous replication scheme that generalizes well-known active-replication and primary-backup schemes. We devised the algorithm with a three-tier architecture in mind: the end-user interacts with front-end clients (e.g., browsers) that invoke middle-tier application servers (e.g., web servers) to access back-end databases. The algorithm preserves the three-tier nature of the architecture and introduces a very acceptable overhead with respect to unreliable solutions.
A generational mostly-concurrent garbage collector
Authors: Tony Printezis, David Detlefs
Venue: ACM SIGPLAN Notices (2001)

This paper reports our experiences with a mostly-concurrent incremental garbage collector, implemented in the context of a high performance virtual machine for the Java&trade; programming language. The garbage collector is based on the &ldquo;mostly parallel&rdquo; collection algorithm of Boehm et al. and can be used as the old generation of a generational memory system. It overloads efficient write-barrier code already generated to support generational garbage collection to also identify objects that were modified during concurrent marking. These objects must be rescanned to ensure that the concurrent marking phase marks all live objects. This algorithm minimises maximum garbage collection pause times, while having only a small impact on the average garbage collection pause time and overall execution time. We support our claims with experimental results, for both a synthetic benchmark and real programs.
A note on the formation of free list
Authors: William M. Waite, H. Schorr
Venue: Communications of the ACM (1964)

The concept of an available-space list was introduced by Newell and Shaw [1] in 1957, and has since been incorporated into a number of different systems [2-5]. The available-space list (or &ldquo;free list&rdquo;) is a list of all available memory locations. It should initially be as large as possible, and ideally it would contain every cell not used by the program. The subject of this note is the initial formation of a free list on the IBM 7090-7094, using the FORTRAN II monitor, version 2. The method presented originated while the authors were working on an implementation of the WISP [5] system for the 7090 in cooperation with Prof. M. V. Wilkes and his colleagues.
Asynchronous scheduling and allocation
Authors: A. Prihozhy
Venue: Proceedings of the conference on Design, automation and test in Europe (1998)

This paper presents an approach to generating asynchronous schedules of various concurrency levels and describes novel net-based scheduling and allocation optimization techniques for asynchronous high-level synthesis. The asynchronous schedules are optimized through using the sets of concurrent variable and statement pairs. Experimental results and a comparison of the net-based techniques with the best sequential scheduling and allocation techniques are presented.
Using quad trees for parallelizing conflict detection in a sequential simulation
Authors: Frederick Wieland, David Carnes, Gregory Schultz
Venue: Proceedings of the fifteenth workshop on Parallel and distributed simulation (2001)

This paper describes a parallel proximity detection algorithm and illustrates its application to the problem of conflict detection in an aviation simulation. The algorithm invokes a previously designed sequential function in parallel, using spatial information acquired during the traversal of a quad tree, to keep the separate invocations of the function as independent as possible. The method is generally applicable to any function (not just conflict detection) whose arguments are spatially organized. Empirical results show that a single-threaded version of the algorithm sped up the simulation by 57%, while a four-threaded parallel version extracted 30% of the remaining additional speedup. These results are even more noteworthy given that the architecture of the simulation remains intact: we only replace the invocation mechanism for one function.
A note on some compiling algorithms
Authors: James P. Anderson
Venue: Communications of the ACM (1964)

Two compiling generators for arithmetic expressions are discussed: one presently in use in an experimental compiler, and an improvement suggested by K. Speierman of Burroughs.
The quest for petascale computing
Authors: Jack J. Dongarra, David W. Walker
Venue: Computing in Science and Engineering (2001)

Although the challenges to achieving petascale computing within the next decade are daunting, several software and hardware technologies are emerging that could help us reach this goal. The authors review these technologies and consider new algorithms capable of exploiting a petascale computer's architecture.
Demonstrating the scalability of a molecular dynamics application on a Petaflop computer
Authors: George S. Almasi, Cǎlin Caşcaval, José G. Castaños, Monty Denneau, Wilm Donath, Maria Eleftheriou, Mark Giampapa, Howard Ho, Derek Lieber, José E. Moreira, Dennis Newns, Marc Snir, Henry S. Warren,  Jr.
Venue: Proceedings of the 15th international conference on Supercomputing (2001)

The IBM Blue Gene project has endeavored into the development of a cellular architecture computer with millions of concurrent threads of execution. One of the major challenges of this project is demonstrating that applications can successfully exploit this massive amount of parallelism. Starting from the sequential version of a well known molecular dynamics code, we developed a new application that exploits the multiple levels of parallelism in the Blue Gene cellular architecture. We perform both analytical and simulation studies of the behavior of this application when executed on a very large number of threads. As a result, we demonstrate that this class of applications can execute efficiently on a large cellular machine.
Bluetooth revealed: the insider's guide to an open specification for global wireless communication
Authors: Brent A. Miller, Chatschik Bisdikian
Venue:  (2001)

The authoritative guide to Bluetooth! From two contributors to the Bluetooth specification!For users, the new Bluetooth wireless standard will cut through the complexity of wireless communications, enabling devices to communicate seamlessly. Bluetooth Revealed offers the first insider's view of the Bluetooth standards: crucial information and insight professionals need to start implementing Bluetooth solutions -- now. Written by leaders of the Bluetooth community, it presents the entire specification in unprecedented depth: its goals, scope, structure, interrelationships, and applications. Coverage includes: Design challenges: 2.4 GHz spectrum characteristics, power consumption, global standardization, and other key issues Usage models: cordless computing, advanced headsets, file transfer/sync, dial-up networking, conferencing, hidden computing, and more The entire Bluetooth protocol stack: radio, baseband, and software layers; hardware and interfaces; and Link Manager and Logical Link Control and Adaptation Protocol (L2CAP) Bluetooth profiles: generic, telephony, networking, serial, and object exchangeBluetooth Revealed previews Bluetooth's future, including next-generation vertical and horizontal applications, and introduces today's resources for Bluetooth development, including silicon and developer's kits, as well as legacy product enablers. If you're intending to build, deploy, or market Bluetooth solutions, start right here.
Global reuse strategy based on use cases (poster session)
Authors: Michał Śmiałek
Venue: Addendum to the 2000 proceedings of the conference on Object-oriented programming, systems, languages, and applications (Addendum) (2000)

The paper introduces two concepts based on use cases: business patterns and automation patterns. It describes a connection between the business and automation patterns with classes. Finally, it presents an idea of a multi-level library that allows global reuse of software development models and code.
Analysis and Testing of Programs with Exception Handling Constructs
Authors: Saurabh Sinha, Mary Jean Harrold
Venue: IEEE Transactions on Software Engineering (2000)

Analysis techniques, such as control flow, data flow, and control dependence, are used for a variety of software engineering tasks, including structural and regression testing, dynamic execution profiling, static and dynamic slicing, and program understanding. To be applicable to programs in languages such as Java and C++, these analysis techniques must account for the effects of exception occurrences and exception handling constructs; failure to do so can cause the analysis techniques to compute incorrect results and, thus, limit the usefulness of the applications that use them. This paper discusses the effects of exception handling constructs on several analysis techniques. The paper presents techniques to construct representations for programs with explicit exception occurrences¿exceptions that are raised explicitly through throw statements¿and exception handling constructs. The paper presents algorithms that use these representations to perform the desired analyses. The paper also discusses several software engineering applications that use these analyses. Finally, the paper describes empirical results pertaining to the occurrence of exception handling constructs in Java programs and their effect on some analysis tasks.
How to Be a Successful High-Tech Consultant
Authors: Marty Larsen
Venue: Linux Journal (2001)

Number one requirement of the successful consultant: do what you love.
A two-list synchronization procedure for discrete event simulation
Authors: John H. Blackstone,  Jr., Gary L. Hogg, Don T. Phillips
Venue: Communications of the ACM (1981)

The traditional mechanism for maintaining a list of pending events in a discrete event simulation is the simple linked list. However, in large scale simulations this list often becomes cumbersome to maintain since the number of pending events may become quite large. As a result, the execution time required by the simple linked list is often a significant portion of total simulation time. Several papers have been published suggesting improved synchronization procedures. The most efficient procedures reported are the time-indexed procedure and the two-level procedure. Both methodologies are much more efficient than simple linked lists; however, neither has been adopted by a general purpose simulation language. Further, both procedures require external parameter definition, which is a major handicap to their adoption by a general purpose language. This paper introduces a new sychronization procedure, the two-list procedure, which is much faster than simple linked lists for large pending event files. This procedure was designed for implementation in Fortran, and properly implemented it is transparent to the user. Thus it is ideal for adoption by general purpose simulation languages.
Prototyping interactive information systems
Authors: R. E. A. Mason, T. T. Carey
Venue: Communications of the ACM (1983)

Applying prototype-oriented development processes to computerized application systems significantly improves the likelihood that useful systems will be developed and that the overall development cycle will be shortened. The prototype development methodology and development tool presented here have been widely applied to the development of interactive information systems in the commercial data processing setting. The effectiveness and relationship to other applications is discussed.
Heaps applied to event driven mechanisms
Authors: Gaston H. Gonnet
Venue: Communications of the ACM (1976)

I read with great interest F.P. Wyman's paper &ldquo;Improved Event-Scanning Mechanisms for Discrete Event Simulation&rdquo; [10] which, I found, makes a careful study of some techniques for event-list scanning.
Storing a sparse table
Authors: Robert Endre Tarjan, Andrew Chi-Chih Yao
Venue: Communications of the ACM (1979)

The problem of storing and searching large sparse tables is ubiquitous in computer science. The standard technique for storing such tables is hashing, but hashing has poor worst-case performance. We propose a good worst-case method for storing a static table of n entries, each an integer between 0 and N - 1. The method requires O(n) words of storage and allows O(logn N) access time. Although our method is a little complicated to use in practice, our analysis shows why a simpler algorithm used for compressing LR parsing tables works so well.
Inner Workings of WANPIPE
Authors: Nenad Corbic, David Mandelstam
Venue: Linux Journal (2001)

Corbic and Mandelstam discuss the structure and user interfaces to the WANPIPE drivers as they have evolved and currently exist.
Reducing the frequency gap between ASIC and custom designs: a custom perspective
Authors: Stephen E. Rich, Matthew J. Parker, Jim Schwartz
Venue: Proceedings of the 38th annual Design Automation Conference (2001)

This paper proposes that the ability to control the difference between the simulated and actual frequencies of a design is a key strategy to achieving high frequency in both ASIC and custom designs. We will examine this principle and the methodologies that can be deployed to manage this gap.
The distribution of a program in primary and fast buffer storage
Authors: Erol Gelenbe
Venue: Communications of the ACM (1973)

A virtual memory computer system with a fast buffer (cache) memory between primary memory and the central processing unit is considered. The optimal distribution of a program between the buffer and primary memory is studied using the program's lifetime function. Expressions for the distribution of a program which maximizes the useful fraction of the cost-time integral of primary and fast buffer storage are obtained for swapping and nonswapping buffer management policies.
On scalable and efficient distributed failure detectors
Authors: Indranil Gupta, Tushar D. Chandra, Germán S. Goldszmidt
Venue: Proceedings of the twentieth annual ACM symposium on Principles of distributed computing (2001)

Process groups in distributed applications and services rely on failure detectors to detect process failures completely, and as quickly, accurately, and scalably as possible, even in the face of unreliable message deliveries. In this paper, we look at quantifying the optimal scalability, in terms of network load, (in messages per second, with messages having a size limit) of distributed, complete failure detectors as a function of application-specified requirements. These requirements are 1) quick failure detection by some non-faulty process, and 2) accuracy of failure detection. We assume a crash-recovery (non-Byzantine) failure model, and a network model that is probabilistically unreliable (w.r.t. message deliveries and process failures). First, we characterize, under certain independence assumptions, the optimum worst-case network load imposed by any failure detector that achieves an application's requirements. We then discuss why traditional heart beating schemes are inherently unscalable according to the optimal load. We also present a randomized, distributed, failure detector algorithm that imposes an equal expected load per group member. This protocol satisfies the application defined constraints of completeness and accuracy, and speed of detection on an average. It imposes a network load that differs frown the optimal by a sub-optimality factor that is much lower than that for traditional distributed heartbeating schemes. Moreover, this sub-optimality factor does not vary with group size (for large groups).
Some criteria for time-sharing system performance
Authors: Saul Stimler
Venue: Communications of the ACM (1969)

Time-sharing systems, as defined in this article, are those multiaccess systems which permit a terminal user to utilize essentially the full resources of the system while sharing its time with other terminal users. It is each terminal user's ability to utilize the full resources of the system that makes quantitative evaluation of time-sharing systems particularly difficult. Six criteria are described which have been successfully used to perform first-level quantitative time-sharing system performance evaluation.
High-Speed CORDIC Based on an Overlapped Architecture and a Novel &sigma;-Prediction Method
Authors: Jae-Hyuck Kwak, Jae Hun Choi, Earl E. Swartzlander,  Jr.
Venue: Journal of VLSI Signal Processing Systems (2000)

This paper presents architectural and algorithmic approaches for achieving high-speed CORDIC processing in both of the two operating modes: vectoring and rotation. For vectoring mode CORDIC processing, a modified architecture is proposed, which aims at reduction of computation time by overlapping the stages for redundant addition and selection of rotation direction. In addition, a novel rotation direction prediction scheme for rotation mode CORDIC is presented. The method is based on approximation of the binary angle input to a number with the arctangent weights (tan^&minus;1 2^&minus;i). The implementation is designed to keep the fast timing characteristics of redundant arithmetic in the x/y path of the CORDIC processing. The characteristics are analyzed with respect to latency time and area, and compared with those obtained by conventional CORDIC implementations. The results show that the proposed techniques reduce not only the block latency but also the overall computation time. Thus, they achieve higher throughput in pipelining.
Object principles (poster session): back to basics
Authors: Jutta Eckstein, John Daniels
Venue: Addendum to the 2000 proceedings of the conference on Object-oriented programming, systems, languages, and applications (Addendum) (2000)

We present the results from an Educators' Symposium session: As OT becomes increasingly submerged beneath delivery technologies (like components), it's ever more important that educators are clear about the object principles that provide the benefits we claim. Will we be able to recognize the important principles in the diverse technologies?
The Birth of Cordic
Authors: Jack E. Volder
Venue: Journal of VLSI Signal Processing Systems (2000)

The very earliest history of the CORDIC computing technique&mdash;a highly efficient method to compute elementary functions&mdash;is presented. The CORDIC technique was born out of necessity, the incentive being the replacement of the analog navigation computer of the B-58 aircraft by a high accuracy, high-performance digital computer. The revolutionary development of the CORDIC technique is presented, along with details of the very first implementations: the CORDIC I prototype and the CORDIC II airborne digital navigation computer.
Interference detection among solids and surfaces
Authors: John W. Boyse
Venue: Communications of the ACM (1979)

In many industrial environments it is necessary to determine whether there is interference among components. There are many potential interference problems in products made up of assemblies of components and in product manufacturing and testing. Typically, drawings are used in an attempt to detect such unwanted interferences, but the two-dimensional, static drafting medium does not always show interferences among three-dimensional, moving parts. This paper presents a computer representation for solids and surfaces and algorithms which carry out interference checking among objects so represented. Objects are represented as polyhedra or as piecewise planar surfaces. Two types of interference checking are discussed: detection of intersections among objects in fixed positions and detection of collisions among objects moving along specified trajectories.
A macroscopic time and cost estimation model allowing task parallelism and hardware sharing of the codesign partitioning process
Authors: J. A. Maestro, D. Mozos, H. Mecha
Venue: Proceedings of the conference on Design, automation and test in Europe (1998)

This paper describes a method to estimate the implementation cost of the hardware part in a mixed hardware/software system, as well as the related performance. These estimations try to avoid the use of many implementation details in order to keep the complexity order of the process under control. The concepts of hardware sharing and parallelism are exploited to make a picture of the whole hardware cost associated to a given partition.