ppxscal/embedding_network huggingface dataset:
Edge-Region-Based Segmentation of Range Images
Authors: M. A. Wani, B. G. Batchelor
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1994)

In this correspondence, we present a new computationally efficient three-dimensional (3-D) object segmentation technique. The technique is based on the detection of edges in the image. The edges can be classified as belonging to one of the three categories: fold edges, semistep edges (defined here), and secondary edges. The 3-D image is sliced to create equidepth contours (EDCs). Three types of critical points are extracted from the EDCs. A subset of the edge pixels is extracted first using these critical points. The edges are grown from these pixels through the application of some masks proposed in this correspondence. The constraints of the masks can be adjusted depending on the noise present in the image. The total computational effort is small since the masks are applied only over a small neighborhood of critical points (edge regions). Furthermore, the algorithm can be implemented in parallel, as edge growing from different regions can be carried out independently of each other.
Distributed Fault-Tolerant Real-Time Systems: The Mars Approach
Authors: Hermann Kopetz, Andreas Damm, Christian Koza, Marco Mulazzani, Wolfgang Schwabl, Christoph Senft, Ralph Zainlinger
Venue: IEEE Micro (1989)

The authors describe the Maintainable Real-Time System, a fault-tolerant distributed system for process control, developed under the Mars project started in 1980 at the Technische Universitat Berlin. They explore the characteristics of distributed real-time systems and then present the Mars approach to real-time process control, its architectural design and implementation, and one of its applications. The authors focus on the maintainability of the Mars architecture, describe the Mars operating system, and discuss timing analysis. The control of a rolling mill that produces metal plates and bars is examined.
Spider: A High-Speed Network Interconnect
Authors: Mike Galles
Venue: IEEE Micro (1997)

The SGI SPIDER chip provides a high-speed, reliable switching network with a flexible interface and topology suitable for a variety of high-end applications. Six full-duplex ports and a nonblocking internal crossbar can sustain a data transfer rate of 4.8 Gbytes/sec, either between chips in a single chassis or between remote chassis over cables up to 5 meters long. Messages of arbitrary length travel over four independent virtual channels with 256 levels of priority, and are protected by CCITT-CRC with hardware retry. These features make the SGI SPIDER well suited to serve as an interprocessor communication fabric, a distributed graphics switch fabric, or a central switch for high-end networking applications.
Semantics, Consistency, and Query Processing of Empirical Deductive Databases
Authors: Raymond T. Ng
Venue: IEEE Transactions on Knowledge and Data Engineering (1997)

In recent years, there has been a growing interest in reasoning with uncertainty in logic programming and deductive databases. However, most frameworks proposed, thus far, are either nonprobabilistic in nature or based on subjective probabilities. In this paper, we address the problem of incorporating empirical probabilities¿that is, probabilities obtained from statistical findings¿in deductive databases. To this end, we develop a formal model-theoretic basis for such databases. We also present a sound and complete algorithm for checking the consistency of such databases. Moreover, we develop consistency-preserving ways to optimize the algorithm for practical usage. Finally, we show how query answering for empirical deductive databases can be carried out.
The Role of Artificial Intelligence in Understanding the Strategic Decision-Making Process
Authors: W. E. Spangler
Venue: IEEE Transactions on Knowledge and Data Engineering (1991)

A survey is given which focuses on research issues involving strategic planning and artificial intelligence (AI), including the nature of the formulation task, cognitive studies of strategic planners and computer-based support for strategic planning. The author reviews the research to date, and argues that, like traditional decision support systems (DSS) research, much of the potential for future research in this area lies in modeling the ill-structured, early stages of the strategic decision making process namely, the strategic intelligence analysis and the issue diagnosis. Therefore, he discusses a specific model-based approach to the study of these early stages. Research in artificial intelligence-including investigations into diagnosis and situation assessment, analogical reasoning, plan recognition, nonmonotonic reasoning and distributed intelligence, among others-can be used to build models of strategic decision making that help researchers in better understanding this traditionally unstructured activity.
Image Shrinking and Expanding on a Pyramid
Authors: J. F. Jenq, S. Sahni
Venue: IEEE Transactions on Parallel and Distributed Systems (1993)

Develops two algorithms to perform the q step shrinking and expanding of an N*N binary image on a pyramid computer with an N*N base. The time complexity of both algorithms is O( square root q). However, one uses O( square root q) space per processor, while the per-processor space requirement of the other is O(1).
Railcar Distribution at the French Railways
Authors: Pierre Levine, Jean-Charles Pomerol
Venue: IEEE Expert: Intelligent Systems and Their Applications (1990)

The allocation of freight cars is addressed. On the basis of the observation that the problem involves strategic knowledge much more than linear programming (in that distributors currently use reasoning to find solutions), an allocation system centered on an expert system that reproduces distributors' reasoning was developed. The system is described, and operations research and expert system approaches are compared. Organizational problems that operationally impeded the implementation of the system are discussed.
Enter the Dragon: China's Computer Industry
Authors: Kenneth L. Kraemer, Jason Dedrick
Venue: Computer (2002)

China transformed its economy by shifting from technological nationalism to a more pragmatic strategy of developing national capabilities in conjunction with multinational corporations. Consistent with this transformation, China has revamped its industrial and technology policies to become a major producer ofcomputer hardware and a major market for computing products. In 2000, mainland Chinese purchased more than seven million PCs, while computer hardwareproduction grew to $23 billion.China's policies clearly drew on the developmental approach of other Asia-Pacific countries that became leaders in the global computer industry through the strong support of government industrial and technology policies.China has likewise become a major force in the global PC industry, as both the most attractive growth market and as a large producer. It has done so through acombination of industry promotion and entrepreneurial energy. New challenges loom as China joins the World Trade Organization and faces more pressure to open its market to foreign competition.
Software's Invisible Users
Authors: James A. Whittaker
Venue: IEEE Software (2001)

Developers and testers are comfortable with the idea of receiving input from human users, checking it for validity, and producing output for human users. However, the human user is only part of the equation. Other, invisible software users also submit input and receive output but are less understood and sometimes forgotten altogether. But there is a price to pay for ignoring these invisible users. The first step in proper accounting of these users is to understand their nature and how they can cause software applications to fail.
The Challenges of Real-Time AI
Authors: David J. Musliner, James A. Hendler, Ashok K. Agrawala, Edmund H. Durfee, Jay K. Strosnider, C. j. Paul
Venue: Computer (1995)

The research agendas of artificial intelligence and real-time systems are converging as AI methods move toward domains that require real-time responses, and real-time systems move toward complex applications that require intelligent behavior. They meet at the crossroads in an exciting new subfield commonly called "real-time AI." This subfield is still being defined, and the precise goals for various real-time AI systems are in flux. Traditionally, AI systems have been developed without much attention to the resource limitations that motivate real-time systems researchers. However, as these AI systems move from the research labs into real-world applications, they also become subject to the time constraints of the environments in which they operate. Rigorous design techniques developed by real-time systems re-searchers must be used to guarantee that a system will meet domain deadlines, even in worst-case scenarios, particularly for mission-critical assignments. The authors would like to combine guaranteed performance methods with AI planning, problem-solving, and adaptation mechanisms to build a flexible, intelligent control system that can dynamically plan its own behaviors. They describe an organizing conceptual structure, identify research goals, and specify some necessary steps for reaching them. They illustrate possible approaches with important applications that require the best of both fields. A series of examples are provided from an intensive care domain where an intelligent real-time control system could provide constant monitoring of patient needs.
Byte Unidirectional Error Correcting and Detecting Codes
Authors: B. Bose, S. Al-Bassam
Venue: IEEE Transactions on Computers (1992)

Efficient byte unidirectional error correcting codes that are better than byte symmetric error correcting codes are presented. The encoding and decoding algorithms are discussed. A lower bound on the number of check bits for byte unidirectional error correcting codes is derived. It is then shown that these codes are close to optimal. Capability of these codes for asymmetric error correction is also described. Codes capable of detecting double byte unidirectional errors are also given.
Adding Data Abstraction to Fortran Software
Authors: Keith W. Miller, Larry J. Morell, Fred Stevens
Venue: IEEE Software (1988)

The Fortran Abstract Data (FAD) system was designed to facilitate the structured reuse of Fortran-callable software. FAD uses data abstraction to implement information hiding. It lets the implementer of a data type explicitly control how instances of that type are used, while itself utilizing Fortran's separate compilation and the vast collection of available Fortran libraries. The principle and methods of information hiding are discussed. The use of FAD, which is designed for situations where the user of an abstract data type is distinct from the implementer of the abstract data type, is described. Some related work is examined.
Application of Deterministic Logic BIST on Industrial Circuits
Authors: Gundolf Kiefer, Harald Vranken, Erik Jan Marinissen, Hans-Joachim Wunderlich
Venue: Journal of Electronic Testing: Theory and Applications (2001)

We present the application of a deterministic logic BIST scheme based on bit-flipping on state-of-the-art industrial circuits. Experimental results show that complete fault coverage can be achieved for industrial circuits up to 100 K gates with 10,000 test patterns, at a total area cost for BIST hardware of typically 5&ndash;15%. It is demonstrated that a trade-off is possible between test quality, test time, and silicon area. In contrast to BIST schemes based on test point insertion no modifications of the circuit under test are required, complete fault efficiency is guaranteed, and the impact on the design process is minimized.
Properties and Performance of Folded Hypercubes
Authors: A. El-Amawy, S. Latifi
Venue: IEEE Transactions on Parallel and Distributed Systems (1991)

A new hypercube-type structure, the folded hypercube (FHC), which is basically astandard hypercube with some extra links established between its nodes, is proposed andanalyzed. The hardware overhead is almost 1/n, n being the dimensionality of thehypercube, which is negligible for large n. For this new design, optimal routing algorithms are developed and proven to be remarkably more efficient than those of the conventional n-cube. For one-to-one communication, each node can reach any other node in the network in at most (n/2) hops (each hop corresponds to the traversal of a single link), as opposed to n hops in the standard hypercube. One-to-all communication (broadcasting) can also be performed in only (n/2) steps, yielding a 50% improvement in broadcasting time over that of the standard hypercube. All routing algorithms are simple and easy to implement. Correctness proofs for the algorithms are given. For the proposedarchitecture, communication parameters such as average distance, message trafficdensity, and communication time delay are derived. In addition, some fault tolerancecapabilities of this architecture are quantified and compared to those of the standardcube. It is shown that this structure offers substantial improvement over existinghypercube-type networks in terms of the above-mentioned network parameters.
Resources for Networks in Less-Industrialized Nations
Authors: Larry Press
Venue: Computer (1995)

The global computer-mediated communication network is growing rapidly, but it is concentrated in the affluent parts of industrialized nations. While this could widen the income gap between industrialized and less industrialized areas, it also presents an opportunity since low cost, appropriate technology networks can make significant additions to the communication infrastructure of less industrialized areas, and link them to the rest of the world. We describe the evolution and growth of one such network, Relcom in the ex-Soviet Union. This is followed by a discussion of pertinent resources: communication infrastructure, hardware, software, and people. Applications and sponsorship are also covered. Throughout, we note differences among nations and the effect of government policy on networks.
Design of Two-Dimensional Adaptive Digital Notch Filters
Authors: Takao Hinamoto, Noriyoshi Ikeda, Shotaro Nishimura, Akimitsu Doi
Venue: Multidimensional Systems and Signal Processing (2002)

In this paper, a method for realizing a two-dimensional (2-D) adaptive notch filter is proposed. The obtained 2-D structure contains a pair of one-dimensional (1-D) second-order IIR notch filters and a pair of 1-D first-order allpass filters. The method has been successfully applied for the removal of a sinusoidal interference superimposed on an image.
Multiple Scan Chain Design for Two-Pattern Testing
Authors: Ilia Polian, Bernd Becker
Venue: Journal of Electronic Testing: Theory and Applications (2003)

Non-standard fault models often require the application of two-pattern testing. A fully-automated approach for generating a multiple scan chain-based architecture is presented so that two-pattern test sets generated for the combinational core can be applied to the sequential circuit. Test time and area overhead constraints are considered.
Case study: interactive visualization for internet security
Authors: Soon Tee Teoh, Kwan Liu Ma, S. Felix Wu, Xiaoliang Zhao
Venue: Proceedings of the conference on Visualization '02 (2002)

Internet connectivity is defined by a set of routing protocols which let the routers that comprise the Internet backbone choose the best route for a packet to reach its destination. One way to improve the security and performance of Internet is to routinely examine the routing data. In this case study, we show how interactive visualization of Border Gateway Protocol (BGP) data helps characterize routing behavior, identify weaknesses in connectivity which could potentially cripple the Internet, as well as detect and explain actual anomalous events.
The Performance of Cache-Based Error Recovery in Multiprocessors
Authors: B. Janssens, W. K. Fuchs
Venue: IEEE Transactions on Parallel and Distributed Systems (1994)

Several variations of cache-based checkpointing for rollback error recovery from transient errors in shared-memory multiprocessors have been recently developed. By modifying the cache replacement policy, these techniques use the inherent redundancy in the memory hierarchy to periodically checkpoint the computation state. Three schemes, different in the manner in which they avoid rollback propagation, are evaluated in this paper. By simulation with address traces from parallel applications running on an Encore Multimax shared-memory multiprocessor, we evaluate the performance effect of integrating the recovery schemes in the cache coherence protocol. Our results indicate that the cache-based schemes can provide checkpointing capability with low performance overhead, but with uncontrollable high variability in the checkpoint interval.
A CMOS VCO Architecture Suitable for Sub-1 Volt High-Frequency (8.7&ndash;10 GHz) RF Applications
Authors: Ahmed H. Mostafa, Mourad N. El-Gamal
Venue: Analog Integrated Circuits and Signal Processing (2003)

This paper proposes an LC-based oscillator structure which enables operation from a supply voltage as low as 0.85 V, while being suitable for high-frequency RF applications. Two VCO prototypes were fabricated in a standard 0.18 &mu;m CMOS process. The 8.7 GHz VCO operates from a supply voltage of 0.85 V, consumes 6 mW, and exhibits &minus;100 dBc/Hz phase noise at 600 kHz offset. The 10 GHz prototype operates from a supply voltage of 1 V, consumes 9 mW, and has &minus;98 dBc/Hz phase noise at 600 kHz offset. A tuning range of 400&ndash;450 MHz is achieved without using varactors.
Learning by an Autonomous Robot at a Process Control Panel
Authors: P. F. Spelt, G. de Saussure, E. Lyness, F. G. Pin, C. R. Weisbin
Venue: IEEE Expert: Intelligent Systems and Their Applications (1989)

The authors describe initial work in autonomous learning, using HERMIES-IIB, their current robotic experimental testbed. The integrated system in HERMIES-IIB (the hostile environment robotic machine intelligence experiment, series IIB) is the latest in a series of autonomous, intelligent machines designed to perform in environments that humans cannot readily enter. They describe a system that learns the control panel's system dynamics and remembers the most efficient series of responses to shut down a control process in case of future encounters with similar (but not necessarily identical) situations. Ultimately, this system could infer a classification scheme for panel categories, enabling it to hypothesize about correct response sequences for panels not yet encountered. They discuss preliminary work on the system's inferencing section.
The Olympus Synthesis System
Authors: Giovanni De Micheli, David Ku, Frederic Mailhot, Thomas Truong
Venue: IEEE Design Test (1990)

A description is given of the Olympus synthesis system for digital design, a vertically integrated set of tools for multilevel synthesis, technology mapping, and simulation. The system includes behavioral, structural, and logic synthesis tools, and provides technology mapping and simulation. Since it is targeted for semicustom implementations, its output is in terms of gate netlists. Instead of supporting placement and routing tools, Olympus provides an interface to standard physical design tools. The system supports the synthesis of ASICs (application specific integrated circuits) from behavioral descriptions written in a hardware description language called HardwareC. Two internal models represent the hardware at different levels of abstraction and provide a way to pass design information among different tools. Olympus has been used to design three ASIC chips, and has been tested against benchmark circuits for high-level and logic synthesis.
On Functionals with Greyvalue-Controlled Smoothness Terms for Determining Optical Flow
Authors: C. Schnörr
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1993)

The modification by H.H. Nagel (1987) of the approach developed by B.K.P. Horn and B.G. Schunck (1981) for determining optical flow is generalized to the case where local motion information is given by more than one constraint equation. Applying this scheme to three constraint equations reported in the literature, as a special case, a generalization of Nagel's approach is obtained. An existence and uniqueness result of solutions under very general conditions that, in turn, ensures the applicability of standard techniques to compute an approximate solution is presented.
An Efficient Synchronization Scheme of Multimedia Streams in Wireless and Mobile Systems
Authors: Azzedine Boukerche, Sungbum Hong, Tom Jacob
Venue: IEEE Transactions on Parallel and Distributed Systems (2002)

Recent advances in mobile computing and distributed multimedia systems allow mobile hosts (clients) to access wireless multimedia systems anywhere and at anytime, but not without creating a new set of issues and trade-offs. To the best of our knowledge, there has been very little research dealing with the synchronization problem in wireless and mobile multimedia systems. In this paper, we propose an efficient distributed synchronization algorithm using Quasi-sink for wireless and mobile multimedia systems to ensure and facilitate mobile client access to multimedia objects. We discuss the algorithm and provide its proof of correctness. We also present a set of simulation experiments to evaluate the performance of our scheme using message complexity and buffer usage at each frame arrival time. Our results indicate that our scheme exhibits a significant low message complexity and no underflow and overflow within the bounded delivery time.
Reasoning about Textual Similarity in a Web-Based Information Access System
Authors: William W. Cohen
Venue: Autonomous Agents and Multi-Agent Systems (1999)

The degree to which information sources are pre-processed by Web-based information systems varies greatly. In search engines like Altavista, little pre-processing is done, while in &ldquo;knowledge integration&rdquo; systems, complex site-specific &ldquo;wrappers&rdquo; are used to integrate different information sources into a common database representation. In this paper we describe an intermediate point between these two models. In our system, information sources are converted into a highly structured collection of small fragments of text. Database-like queries to this structured collection of text fragments are approximated using a novel logic called WHIRL, which combines inference in the style of deductive databases with ranked retrieval methods from information retrieval (IR). WHIRL allows queries that integrate information from multiple Web sites, without requiring the extraction and normalization of object identifiers that can be used as keys; instead, operations that in conventional databases require equality tests on keys are approximated using IR similarity metrics for text. This leads to a reduction in the amount of human engineering required to field a knowledge integration system. Experimental evidence is given showing that many information sources can be easily modeled with WHIRL, and that inferences in the logic are both accurate and efficient.