ppxscal/embedding_network huggingface dataset:
Nonparametric methods for automatic classification of documents and transactions (abstract)
Authors: Amos O. Olagunju
Venue: Proceedings of the 1990 ACM annual conference on Cooperation (1990)

The question of how to classify documents is a central problem in document retrieval. The classification problem can be stated as follows. There exists a large document collection, each of which contains a set of terms. How should the documents be clustered to allow the selection of index terms so that the collection can be searched to the maximal collective benefit of the retrieval system customers? Traditionally, transaction functionalities are manually scheduled into deferred and immediate queues for processing without any special consideration given to the interwoven functionalities invoked by the different user groups. The question of how to classify transactions for the concurrency controller in a distributed system is a major problem in transaction scheduling. The problem here is, how should transaction functionalities be scheduled for processing to satisfy the requirements of the different user groups? That is, how should transaction functionalities be organized on disk to minimize disk access time, in the hope of fulfilling the requirements of individual user groups? This paper presents nonparametric algorithms and heuristic for automatic classification of documents according to the similarity in their keywords; the words likely to be useful as index terms for document set. The normal approximation to the binomial distribution was explored as an index for automatic classification of documents and transactions. A nonparametric measure of association consistent with the Cramer statistic was used in the examination of similarities among documents. A nonparametric analysis of variance procedure was developed for comparing the profiles of term frequencies between documents or transaction functionalities invoked between users. The usefulness of the heuristic in the automatic classification of user groups according to the transaction functionalities that they invoke in a distributed system is discussed.
Dynamic Parameter Encoding for Genetic Algorithms
Authors: Nicol N. Schraudolph, Richard K. Belew
Venue: Machine Learning (1992)

The common use of static binary place-value codes for real-valued parameters of the phenotype in Holland's genetic algorithm (GA) forces either the sacrifice of representational precision for efficiency of search or vice versa. Dynamic Parameter Encoding (DPE) is a mechanism that avoids this dilemma by using convergence statistics derived from the GA population to adaptively control the mapping from fixed-length binary genes to real values. DPE is shown to be empirically effective and amenable to analysis&semi; we explore the problem of premature convergence in GAs through two convergence models.
Design of Self-Checking Circuits Using DCVS Logic: A Case Study
Authors: N. Kanopoulos, Dimitris Pantzartzis, Fredrick R. Bartram
Venue: IEEE Transactions on Computers (1992)

A technique for designing self-checking circuits using differential cascode voltage switch (DCVS) logic is presented. This technique is used in a design case study and the results obtained through actual implementation and testing of a self-checking circuit are discussed. It is demonstrated that the self-checking capability of the circuit can be used to implement fault tolerance at low hardware-overhead costs.
Double coset enumeration
Authors: Stephen A. Linton
Venue: Journal of Symbolic Computation (1991)

Coset enumeration is the principal method for solving the word problem in finitely presented groups. The technique has a long history and was one of the first applications of electronic computers to pure mathematics. Present applications are limited by the space available to store the coset table in computer memory. Enumerating double cosets offers a substantial saving of space in suitable cases. An algorithm is described with some notes on implementation.
Encryption: a few cryptic remarks
Authors: Bill Neugent
Venue: ACM SIGSAC Review (1992)

As we place more trust in our computer systems, we must continue to find more ways to make our systems deserving of that trust. Encryption is one of those ways.
Evaluation of a fault tolerant distributed broadcast algorithm in hypercube multicomputers
Authors: Jace W. Krull, Jie Wu, Andres M. Molina
Venue: Proceedings of the 1992 ACM annual conference on Communications (1992)

This paper performs a detailed evaluation of a fault-tolerant distributed broadcasting algorithm for cube connected networks. The main areas of evaluation are the following: (1) Algorithm effectiveness in the presence of multiple faults, (2) Establishing the maximum number of link faults allowed, before the algorithm fails to guarantee 100% effectiveness. The evaluation was done to networks connected in 3-, 4-, 5-, and 6-cube configurations. The results of the simulation were analyzed to establish algorithm characteristics under multiple faults.
Fast approximation algorithms for fractional packing and covering problems
Authors: Serge A. Plotkin, David B. Shmoys, Éva Tardos
Venue: Proceedings of the 32nd annual symposium on Foundations of computer science (1991)

Fast algorithms that find approximate solutions for a general class of problems, which are called fractional packing and covering problems, are presented. The only previously known algorithms for solving these problems are based on general linear programming techniques. The techniques developed greatly outperform the general methods in many applications, and are extensions of a method previously applied to find approximate solutions to multicommodity flow problems. The algorithms are based on a Lagrangian relaxation technique, and an important result is a theoretical analysis of the running time of a Lagrangian relaxation based algorithm. Several applications of the algorithms are presented.
Algorithm 706: DCUTRI: an algorithm for adaptive cubature over a collection of triangles
Authors: Jarle Berntsen, Terje O. Espelid
Venue: ACM Transactions on Mathematical Software (TOMS) (1992)

An adaptive algorithm for computing an approximation to the integral of each element in a vector function f(x,y) over a two-dimensional region made up of triangles is presented. A FORTRAN implementation of the algorithm is included. The basic cubature rule used over each triangle is a 37-point symmetric rule of degree 13. Based on the same evaluation points the local error for each element in the approximation vector and for each triangle is computed using a sequence of null rule evaluations. A sophisticated error-estimation procedure tries, in a cautious manner, to decide whether we have asymptotic behavior locally for each function. Different actions are taken depending on that decision, and the procedure takes advantage of the basic rule's polynomial degree when computing the error estimate in the asymptotic case.
Load Balancing in a Hybrid ATPG Environment
Authors: Wilfried Daehn
Venue: IEEE Transactions on Computers (1991)

The problem of balancing the computational load between fault simulation and conventional ATPG (automatic test program generation) is treated. A rule for switching from probabilistic to deterministic test pattern computation is derived. The criterion is based on a model of monitoring of the simulation process and on an online estimation of the fault detection probabilities. Using these probabilities and the operation characteristics of the ATPG program, one can decide whether it is more efficient to continue fault simulation or to proceed with algorithmic test pattern computation. A prototype of the hybrid ATPG system was implemented on an Apollo DN3000. Compared to a conventional ATPG system, better coverage and shorter generation times were obtained.
Hand gesture coding based on experiments using a hand gesture interface device
Authors: Tomoichi Takahashi, Fumio Kishino
Venue: ACM SIGCHI Bulletin (1991)

It would be ideal for computer-human interaction if a computer could understand human gestures. Hand gestures are one means of interaction between computers and humans[1][2]. A hand gesture interface device, the VPL Data Glove TM, provides real-time information on a user's hand movement[3].
M-LISP: a representation-independent dialect of LISP with reduction semantics
Authors: Robert Muller
Venue: ACM Transactions on Programming Languages and Systems (TOPLAS) (1992)

In this paper we introduce M-LISP, a dialect of LISP designed with an eye toward reconciling LISP's metalinguistic power with the structural style of operational semantics advocated by Plotkin [28]. We begin by reviewing the original definition of LISP [20] in an attempt to clarify the source of its metalinguistic power. We find that it arises from a problematic clause in this definition. We then define the abstract syntax and operational semantics of M-LISP, essentially a hybrid of M-expression LISP and Scheme. Next, we tie the operational semantics to the corresponding equational logic. As usual, provable equality in the logic implies operational equality. Having established this framework we then extend M-LISP with the metalinguistic eval and reify operators (the latter is a nonstrict operator that converts its argument to its metalanguage representation). These operators encapsulate the matalinguistic representation conversions that occur globally in S-expression LISP. We show that the naive versions of these operators render LISP's equational logic inconsistent. On the positive side, we show that a naturally restricted form of the eval operator is confluent and therefore a conservative extension of M-LISP. Unfortunately, we must weaken the logic considerably to obtain a consistent theory of reification.
An Optimal Linked List Prefix Algorithm on a Local Memory Computer
Authors: Yijie Han
Venue: IEEE Transactions on Computers (1991)

The author presents a deterministic parallel algorithm for the linked list prefix problem. It computes linked list prefixs for an input list of n elements in time O(n/p+logn) on a local memory PRAM model using p processors and p shared memory cells.
An examination of operating systems laboratory techniques
Authors: James M. Withers, Mark B. Bilodeau
Venue: ACM SIGCSE Bulletin (1992)

Students majoring in computer science at the United States Military Academy (USMA) must take a course in operating systems. In this course the students complete a series of laboratory projects to learn the basic concepts of modern computer operating systems. During the last three semesters, our operating system laboratory scheme evolved (1) from having the students master a series of separate, unconnected projects (2) to modifying an existing operating system simulation (3) to finally having them completely build an operating system. This article will discuss each approach, its strengths and weaknesses and the rationale for changing to our current program.
Processor allocation and loop scheduling on multiprocessor computers
Authors: Nadia Tawbi, Paul Feautrier
Venue: Proceedings of the 6th international conference on Supercomputing (1992)

This paper is concerned with the automatic exploitation of the parallelism detected in a sequential program. The target machine is a shared memory multiprocessor. The main goal is minimizing the completion time of the program. To achieve this, one has first to distribute the code over the processors, then to schedule the parts of the code in order to minimize the execution time while preserving the semantics. This problem is NP-complete. Loop scheduling and processor allocation are the main problems. However we are also able to deal with so-called control parallelism. Allocation and scheduling are performed at compile time. For a given processor allocation, we use list scheduling algorithm to compute the elapsed time, which is then optimized by the Tabu heuristic. The estimation of each component execution time is based on knowledge of average execution time of the operators and built-in functions and on the estimation of iteration space size. Experimentations on the Encore-Multimax machine show that on a representative set of scientific programs, the efficiency we obtained is in almost all the cases greater than 80%, as soon as the problem size is large enough.
Wait-free synchronization
Authors: Maurice Herlihy
Venue: ACM Transactions on Programming Languages and Systems (TOPLAS) (1991)

A wait-free implementation of a concurrent data object is one that guarantees that any process can complete any operation in a finite number of steps, regardless of the execution speeds of the other processes. The problem of constructing a wait-free implementation of one data object from another lies at the heart of much recent work in concurrent algorithms, concurrent data structures, and multiprocessor architectures. First, we introduce a simple and general technique, based on reduction to a concensus protocol, for proving statements of the form, &ldquo;there is no wait-free implementation of X by Y.&rdquo; We derive a hierarchy of objects such that no object at one level has a wait-free implementation in terms of objects at lower levels. In particular, we show that atomic read/write registers, which have been the focus of much recent attention, are at the bottom of the hierarchy: thay cannot be used to construct wait-free implementations of many simple and familiar data types. Moreover, classical synchronization primitives such astest set and fetch add, while more powerful than read and write, are also computationally weak, as are the standard message-passing primitives. Second, nevertheless, we show that there do exist simple universal objects from which one can construct a wait-free implementation of any sequential object.
A glossary of temporal database concepts
Authors: C. S. Jensen, J. Clifford, S. K. Gadia, A. Segev, Richard Thomas Snodgrass
Venue: ACM SIGMOD Record (1992)

This glossary contains concepts specific to temporal databases that are well-defined, well understood, and widely used. In addition to defining and naming the concepts, the glossary also explains the decisions made. It lists competing alternatives and discusses the pros and cons of these. It also includes evaluation criteria for the naming of concepts. This paper is a structured presentation of the results of e-mail discussions initiated during the preparation of the first book on temporal databases, Temporal Databases: Theory, Design, and Implementation, published by Benjamin Cummings, to appear January 1993. Independently of the book, an initiative aimed at designing a consensus Temporal SQL is under way. The paper is a contribution towards establishing common terminology, an initial subtask of this initiative.
On word problems in horn theories
Authors: Emmanuel Kounalis, Michael Rusinowitch
Venue: Journal of Symbolic Computation (1991)

We interpret Horn clauses as conditional rewrite rules. Then we give sufficient conditions so that the word problem can be decided by conditional normalization in some Horn theories. We also show how to prove theorems in the initial models of Horn theories.
Test function specification in synthesis
Authors: Vishwani D. Agrawal, Kwang-Ting Chen
Venue: Proceedings of the 27th ACM/IEEE Design Automation Conference (1991)

We present a new synthesis for testability method in which a test function is incorporated into the state diagram of the finite state machine (FSM). The test function is specified as a FSM with the same number of state variables as the given object machine. The state graph of the test machine is so defined that each state is uniquely set and observed by an input sequence no longer than &lceil;logkn&rceil;, where n is the number of states and the integer k is a design parameter. The state transition graph of the test machine is superimposed on the state graph of the object function such that a minimal number of new transitions are added. State assignment, logic minimization and technology mapping are then carried out for the combined graph. By design, the embedded test machine is fully testable. Also, since the test machine can control all memory elements, the circuit is effectively tested by a combinational circuit test generator. Scan register is shown to be a special case in this methodology.
System and real performance evaluation of computer
Authors: S. M. Porotskiy, A. E. Fateev
Venue: ACM SIGMETRICS Performance Evaluation Review (1992)

The purpose of this paper is to review some methods for efficiency evaluation of universal computer systems. This paper is continued of [1] and concerns the measurements and analytical modeling for performance evaluation on system and real levels.
The BBN Spoken Language System
Authors: Sean Boisen, Yen-Lu Chow, Andrew Haus, Robert Ingria, Salim Roukas, David Stallard
Venue: Proceedings of the workshop on Speech and Natural Language (1989)

We describe HARC, a system for speech understanding that integrates speech recognition techniques with natural language processing. The integrated system uses statistical pattern recognition to build a lattice of potential words in the input speech. This word lattice is passed to a unification parser to derive all possible associated syntactic structures for these words. The resulting parse structures are passed to a multi-level semantics component for interpretation.
An N-dimensional data structure in support of electronic data interchange (EDI) translation
Authors: Georges Brigham, Edward Shaw
Venue: ACM SIGAPL APL Quote Quad (1991)

A method is described by which data in a database system are named using sets. The sets exist in an n-dimensional data space in which each axis represents a homogeneous set and all axes (sets) are orthogonal. Data are represented as mathematical functions of relationships between the sets. Data are named using an ordered combination of the names of the sets. An executable language is used to describe relationships between the sets and to query the database. This methodology lends itself quite conveniently to APL and currently forms the foundation for a robust commercial application performing electronic data interchange (EDI) translation.
Applying cognitive walkthroughs to more complex user interfaces: experiences, issues, and recommendations
Authors: Cathleen Wharton, Janice Bradford, Robin Jeffries, Marita Franzke
Venue: Proceedings of the SIGCHI conference on Human factors in computing systems (1992)

The Cognitive Walkthrough methodology was developed in an effort to bring cognitive theory closer to practice; to enhance the design and evaluation of use interfaces in industrial settings. For the first time, small teams of professional developers have used this method to critique three complex software systems. In this paper we report evidence about how the methodology worked for these evaluations. We focus on five core issues: (1) task selection, coverage, and evaluation, (2) the process of doing a Cognitive Walkthrough, (3) requisite knowlege for the evaluators, (4) group walkthroughs, and (5) the interpretation of results. Our findings show that many variables can affect the success of the technique; we believe that if the Cognitive Walkthrough is ultimately to be successful in industrial settings, the method must be refined and augmented in a variety of ways.
String Editing on a One-Way Linear Array of Finite-State Machines
Authors: Oscar H. Ibarra, Tao Jiang, Hui Wang
Venue: IEEE Transactions on Computers (1992)

The authors give an efficient parallel algorithm for the string edit problem. The model of computation is a one-way linear array of identical finite-state machines (nodes). The data movement in the array is one-way, from left to right. For inputs of length n, the array uses n nodes. The algorithm can produce the actual minimum-cost edit sequence in linear time. The previous parallel algorithm for this problem runs in O(n) time on a one-way two-dimensional array of finite-state machines using n/sup 2/ nodes. The best serial (RAM) algorithm for the problem takes O(n/sup 2//log n) time and space. Applications to other problems such as the longest common subsequence and approximate pattern matching are discussed.
Dynamically-Allocated Multi-Queue Buffers for VLSI Communication Switches
Authors: Yuval Tamir, Gregory L. Frazier
Venue: IEEE Transactions on Computers (1992)

Small n*n switches are key components of interconnection networks used in multiprocessors and multicomputers. The architecture of these n*n switches, particularly their internal buffers, is critical for achieving high-throughput low-latency communication with cost-effective implementations. Several buffer structures are discussed and compared in terms of implementation complexity, inter-switch handshaking requirements, and their ability to deal with variations in traffic patterns and message lengths. A design for buffers that provide non-FIFO message handling and efficient storage allocation for variable size packets using linked lists managed by a simple on-chip controller is presented. The new buffer design is evaluated by comparing it to several alternative designs in the context of a multistage interconnection network. The modeling and simulation show that the new buffer outperforms alternative buffers and can thus be used to improve the performance of a wide variety of systems currently using less efficient buffers.
Designing for reuse: a case study
Authors: David M. Wade
Venue: ACM SIGAda Ada Letters (1992)

After considerable analysis of the many problems associated with software reuse, and a critical review of the benefits to be gained, the Federal Aviation Administration (FAA) Advanced Automation System (AAS) decided to proceed with a strong, unified reuse effort across the project. In June 1989 a Reuse Working Group (RWG) was formed. This group defined project wide reuse procedures and oversaw their compliance. Initial feedback from the effort has been encouraging, but there are many obstacles yet to overcome. This paper provides some insight into the AAS reuse process by following the progress of a key reusable software component. It also highlights the side benefits the project garnered as the component's design solidified. The component being examined is the Airspace Volumes Subsystem, which defines an abstraction of an Airspace Volume and provides operations which control interactions between Airspace Volumes and other airspace objects, such as aircraft.
SOPRANO: an efficient automatic test pattern generator for stuck-open faults in CMOS combinational circuits
Authors: Hyung Ki Lee, Dong Sam Ha
Venue: Proceedings of the 27th ACM/IEEE Design Automation Conference (1991)

In this paper, we describe a highly efficient automatic test pattern generator for stuck-open (SOP) faults, called SOPRANO, in CMOS combinational circuits. The key idea of SOPRANO is to convert a CMOS circuit into an equivalent gate level circuit and SOP faults into the equivalent stuck-at faults. Then SOPRANO derives test patterns for SOP faults using a gate level test pattern generator. Several techniques to reduce the test set size are introduced in SOPRANO. Experimental results performed on eight benchmark circuits show that SOPRANO achieves high SOP fault coverage and short processing time.
A parallel compilation technique based on grammar partitioning
Authors: Sanjay Khanna, Arif Ghafoor, Amrit Goel
Venue: Proceedings of the 1990 ACM annual conference on Cooperation (1990)

A new data partitioning scheme for parallel compilation is presented. The scheme is based on partitioning the grammar, which in turn effectively decomposes the language specification into multiple subsets. The scheme requires definition and development of specialized subcompilers. A simple and practical method is suggested for the implementation of such subcompilers using Parser Generators. The proposed scheme is illustrated through an example, using the grammar of Pascal language. A comparison with other methods such as functional decomposition, reveals that the proposed methodology has a larger potential speed-up factor.