ppxscal/embedding_network huggingface dataset:
Genetic Algorithms for the Travelling Salesman Problem: A Review of Representations and Operators
Authors: P. Larrañaga, C. M. H. Kuijpers, R. H. Murga, I. Inza, S. Dizdarevic
Venue: Artificial Intelligence Review (1999)

This paper is the result of a literature study carried out by the authors. It is a review of the different attempts made to solve the Travelling Salesman Problem with Genetic Algorithms. We present crossover and mutation operators, developed to tackle the Travelling Salesman Problem with Genetic Algorithms with different representations such as: binary representation, path representation, adjacency representation, ordinal representation and matrix representation. Likewise, we show the experimental results obtained with different standard examples using combination of crossover and mutation operators in relation with path representation.
A Necessary and Sufficient Condition for Deadlock-Free Adaptive Routing in Wormhole Networks
Authors: José Duato
Venue: IEEE Transactions on Parallel and Distributed Systems (1995)

Deadlock avoidance is a key issue in wormhole networks. A first approach [8] consists of removing the cyclic dependencies between channels. Many deterministic and adaptive routing algorithms have been proposed based on that approach. Although the absence of cyclic dependencies is a necessary and sufficient condition for deadlock-free deterministic routing, it is only a sufficient condition for deadlock-free adaptive routing. A more powerful approach [11] only requires the absence of cyclic dependencies on a connected channel subset. The remaining channels can be used in almost any way. In this paper, we show that the previously mentioned approach is also a sufficient condition. Moreover, we propose a necessary and sufficient condition for deadlock-free adaptive routing. This condition is the key for the design of fully adaptive routing algorithms with minimum restrictions. An example shows the application of the new theory.
Virtual Heritage: What Next?
Authors: Robert Stone, Takeo Ojika
Venue: IEEE MultiMedia (2000)

This article takes a look at what's ahead in virtual heritage, including an increased interest in the use of virtual reality to record and recreate examples of industrial archaeology.
Highly Reliable Testing of ULSI Memories with On-Chip Voltage-Down Converters
Authors: Masaki Tsukude, Kazutami Arimoto, Hideto Hidaka, Yasuhiro Konishi, Masanori Hayashikoshi, Katsuhiro Suma, Kazuyasu Fujishima
Venue: IEEE Design Test (1993)

Two testing techniques for ultra-large-scale integrated (ULSI) memories containing on-chip voltage downconverters (VDCs) are described. The first in an on-chip VDC tuning technique that adjusts internal V/sub CC/ to compensate for the monitored characteristics of the process parameters during repair analysis testing. The second is an operating-voltage margin test, performed at various internal V/sub CC/ levels during the water sort test (WT) and the final shipping test (FT).
Wireless Data Networks: Reaching the Extra Mile
Authors: Hasan S. Alkhatib, Chase Bailey, Mario Gerla, James McCrae
Venue: Computer (1997)

As evolving technologies make wireless computing more attractive, the availability of bandwidth will become more and more of an issue. While spectrum is getting less expensive, it is also getting more crowded, particularly at times of peak use. As spectrum becomes more limited, users will be increasingly driven to use higher frequencies with higher device costs. Quality of service will also become a key consideration for wireless. Many of the telemetry and control applications that will consume an increasing percentage of bandwidth require real-time data services. The best solution to the spectrum saturation and bandwidth availability problem is to adopt technologies that make the most efficient use of existing spectrum through frequency reuse schemes, optimized signaling mechanisms, and scalable network architectures. But if wireless networks are to be a truly viable technology they'll need to be ubiquitous, robust, scalable, secure, and open. To achieve these goals quickly, we'll need to accelerate the development and implementation of a number of key technologies, including spread spectrum multihopping.
Robust 3-D-3-D Pose Estimation
Authors: X. Zhuang, Y. Huang
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1994)

The correspondence focuses on the robust 3-D-3-D pose estimation, especially, multiple pose estimation. The robust 3-D-3-D multiple pose estimation problem is formulated as a series of general regressions which involve a successively size-decreasing data set, with each regression relating to one particular pose of interest. Since the first few regressions may carry a severely contaminated Gaussian error noise model, the MF-estimator (Zhuang et al., 1992) is used to solve each regression for each pose of interest. Extensive computer experiments with both real imagery and simulated data are conducted and results are promising. Three distinctive features of the MF-estimator are theoretically discussed and experimentally demonstrated: It is highly robust in the sense that it is not much affected by a possible large portion of outliers or incorrect matches as long as the minimum number of inliers necessary to give a unique solution are provided; It is made virtually independent of initial guesses; It is computationally reasonable and admits an efficient parallel implementation.
Performance Evaluation of the Time-Stamp Ordering Algorithm in a Distributed Database
Authors: S. Varma
Venue: IEEE Transactions on Parallel and Distributed Systems (1993)

Time-stamp ordering is one of the consistency preserving algorithms that is used indistributed databases. F. Baccelli (1987) has introduced a queueing model thatincorporates the fork-join and resequencing synchronization constraints to analyze thealgorithm's performance. The power of interpolation approximation technique is illustrated by obtaining extremely good approximations for this rather complex model. The heavy traffic approximations are obtained by showing that this model has the same diffusion limit as a system of parallel fork-join queues. The light traffic limits are obtained by applying the light traffic theory developed by M.I. Reiman and B. Simon (1989). The heavy traffic limits are computed for general arrival and service distributions, but the light traffic limits are restricted to Markovian systems.
Fault-Tolerant Wormhole Routing Algorithms for Mesh Networks
Authors: Suresh Chalasani, Rajendra V. Boppana
Venue: IEEE Transactions on Computers (1995)

We present simple methods to enhance the current minimal wormhole routing algorithms developed for high-radix, low-dimensional mesh networks for fault-tolerant routing. We consider arbitrarily-located faulty blocks and assume only local knowledge of faults. Messages are routed minimally when not blocked by faults and this constraint is relaxed to route around faults. The key concept we use is a fault ring consisting of fault-free nodes and links can be formed around each fault region. Our fault-tolerant techniques use these fault rings to route messages around fault regions. We show that, using just one extra virtual channel per physical channel, the well-known e-cube algorithm can be used to provide deadlock-free routing in networks with nonoverlapping fault rings; there is no restriction on the number of faults. For the more complex faults with overlapping fault rings, four virtual channels are used. We also prove that at most four additional virtual channels are sufficient to make fully-adaptive algorithms tolerant to multiple faulty blocks in n-dimensional meshes. All these algorithms are deadlock- and livelock-free. Further, we present simulation results for the e-cube and a fully-adaptive algorithm fortified with our fault-tolerant routing techniques and show that good performance may be obtained with as many as 10% links faulty.
Centaurus: an infrastructure for service management in ubiquitous computing environments
Authors: Lalana Kagal, Vladimir Korolev, Sasikanth Avancha, Anupam Joshi, Tim Finin, Yelena Yesha
Venue: Wireless Networks (2002)

In the near future, we will see dramatic changes in computing and networking hardware. A large number of devices (e.g., phones, PDAs, even small household appliances) will become computationally enabled. Micro/nano sensors will be widely embedded in most engineered artifacts, from the clothes we wear to the roads we drive on. All of these devices will be (wirelessly) networked using Bluetooth, IEEE 802.15 or IEEE 802.11 for short range connectivity creating pervasive environments. In this age where a large number of wirelessly networked appliances and devices are becoming commonplace, there is a necessity for providing a standard interface to them that is easily accessible by any user. This paper outlines the design of Centaurus, an infrastructure for presenting services to heterogeneous mobile clients in a physical space via some short range wireless links. The infrastructure is communication medium independent; we have implemented the system over Bluetooth, CDPD and Infrared, three well-known wireless technologies. All the components in our model use a language based on Extensible Markup Language (XML) for communication, giving the system a uniform and easily adaptable interface. Centaurus defines a uniform infrastructure for heterogeneous services, both hardware and software, to be made available to diverse mobile users within a confined space.
Linear Time Euclidean Distance Algorithms
Authors: Heinz Breu, Joseph Gil, David Kirkpatrick, Michael Werman
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1995)

Two linear time (and hence asymptotically optimal) algorithms for computing the Euclidean distance transform of a two-dimensional binary image are presented. The algorithms are based on the construction and regular sampling of the Voronoi diagram whose sites consist of the unit (feature) pixels in the image. The first algorithm, which is of primarily theoretical interest, constructs the complete Voronoi diagram. The second, more practical, algorithm constructs the Voronoi diagram where it intersects the horizontal lines passing through the image pixel centers. Extensions to higher dimensional images and to other distance functions are also discussed.
Merit Functions for Complementarity and Related Problems: A Survey
Authors: Andreas Fischer, Houyuan Jiang
Venue: Computational Optimization and Applications (2000)

Merit functions have become important tools for solving various mathematical problems arising from engineering sciences and economic systems. In this paper, we are surveying basic principles and properties of merit functions and some of their applications. As a particular case we will consider the nonlinear complementarity problem (NCP) and present a collection of different merit functions. We will also introduce and study a class of smooth merit functions for the NCP.
Guest Editors' Introduction: Stressing the Fundamentals
Authors: Robert C. Aitken, Donald L. Wheater
Venue: IEEE Design Test (2002)

The theme of this year's International Test Conference, "stressing the fundamentals," has two aspects. First, over the past 40 years, the test community has developed several fundamental concepts, including fault models, automatic test-pattern generation (ATPG), and DFT. In addition, fundamental techniques such as functional test, scan, burn-in, and I_DDQ test are key to modern test technology. Emphasizing these techniques is important as circuits become denser, faster,and more dificult to test. These same trends, though, also lead to a second type of stress: Advances in circuit technology are pushing these fundamental approaches toward their limits. The articles in this special ITC section explore this idea of stressing the fundamentals from various angles.
The RAPPID Project: Symbiosis between Industrial Requirements and MAS Research
Authors: H. V. D. Parunak, J. Sauter, M. Fleischer, A. Ward
Venue: Autonomous Agents and Multi-Agent Systems (1999)

The RAPPID project (Responsible Agents for Product-Process Integrated Design) is developing agent-based software tools and methods that use market place dynamics among members of a distributed design team to coordinate set-based design of discrete manufactured products. This report describes the interplay of industrial requirements and Multi-Agent System (MAS) research in the design, implementation, and testing of RAPPID. Like any industrial project, RAPPID begins with the requirements of the problem domain, and draws selectively from research results to meet those requirements. However, the flow of information is not unidirectional. In the process of addressing its requirements, RAPPID developed some new concepts that hold promise for broader application to distributed constraint optimization. RAPPID is work in process, not a completed product, and this report includes an assessment of what needs to be done in addition to what has been accomplished.
Reducing Test Time in the High-Volume Production of Analog Circuits using Efficient Test-Vector Generation and Interpolation Techniques
Authors: Mustapha Slamani, Karim Arabi
Venue: Journal of Electronic Testing: Theory and Applications (2001)

Test cost is one of the main factors determining the profit margin of a device in production. Current test strategies require hundreds of measurements to determine the specifications of a parameter. In this paper, we present an automatic test-vector generation technique that is based on transfer function manipulation and requires only one circuit simulation. The proposed method consists of generating the first set of vectors by applying a derivation technique to the golden transfer function of the circuit under test (CUT). An interpolation technique allows a new transfer function to be constructed based on the first set of test vectors. The difference between the reconstructed transfer function and the golden transfer function is used to select the second set of test vectors. These new test vectors are selected to achieve the best possible fit. Our technique reduces the test vector size to values that at present can be achieved only by using powerful and time-consuming fault simulation tools. As an example, we apply the method to state variable and Chebyshev filters. We also compute the fault coverage in order to demonstrate the effectiveness of this new technique.
A Software Platform for Testing Intrusion Detection Systems
Authors: Nicholas Puketza, Mandy Chung, Ronald A. Olsson, Biswanath Mukherjee
Venue: IEEE Software (1997)

As the use of intrusion detection systems increases, so too does the need for tools and methodologies for testing and evaluating them. The authors have developed a software platform that simulates intrusions and tests the effectiveness of intrusion detection systems. Their platform lets you create scripts that simulate both typical and suspicious activity, and has a record-and-replay feature that helps you create scripts quickly and easily. The platform supports the authors' testing methodology, which they outline here; both the platform and the testing methodology can be used to test and compare several different intrusion detection systems.
Fault Tolerance in a Class of Sorting Networks
Authors: Jianli Sun, E. Cerny, J. Gecsei
Venue: IEEE Transactions on Computers (1994)

The early study of fault tolerance in efficient sorting networks only achieved single-fault tolerance. By eliminating critical comparators, L. Rudolph (1985) presented a 1-fault tolerant design of the balanced sorting network (BSN) at the cost of one redundant stage of N/2 comparators and two permuters external to the network. In this paper, we show, however, that 1-fault tolerance of BSN can be achieved without introducing redundancy and external permuters. Furthermore, we provide solutions to the open question of how to achieve multiple-fault tolerance in BSN. We analyze the problem from a higher-level by introducing a new concept of critical stages, and find that all stages in previous designs are critical. A 2-fault tolerant design of BSN is then discovered after eliminating its critical stages. The new design has a similar network architecture (i.e., a multistage network with the output recirculated back to the input) and the same hardware cost as Rudolph's, but it has many distinguished features. The performance analysis shows that the new designs achieve much higher probabilities of correct sorting in the presence of faulty comparators than the previous reported designs.
Shared cache architectures for decision support systems
Authors: Michel Dubois, Jaeheon Jeong, Ashwini Nanda
Venue: Performance Evaluation (2002)

In this paper we evaluate two shared-cache architectures for small-scale multiprocessors. We vary shared cache sizes from 8MB to 1GB, under various block sizes, cache organizations and sizes, and strategies for IO transactions. We use 12 bus trace samples obtained during the execution of a 100GB TPC-H on an eight-way multiprocessor.To deal with the cold-start misses at the beginning of each sample, we identify the sure misses which are known to be misses in the full trace. The difference between the total number of misses and the number of sure misses is the zone of uncertainly, which may be hits or misses in the full trace. It turns out that the zone of uncertainty is small enough in most cases that useful conclusions can be drawn.Our conclusions are that a single-cluster configuration with a shared cache--even a very small one--can be very effective for TPC-H. We also show that the coherence traffic between shared caches in a multiple cluster system is very high in the context of TPC-H.
Representing Design Dependencies in an Issue-Based Style
Authors: Mitchell D. Lubars
Venue: IEEE Software (1991)

A system that superimposes the issue-based and truth-maintenance approaches to provide a merged capability for recording design rationale is presented. The system presents the user with issue-based structures that can be annotated with informal information, and it provides an automated inferencing capability on those structures through an underlying truth-maintenance and expert system. The underlying truth-maintenance system lets the user carry out what-if analyses by choosing different resolutions to design issues, and it graphically shows the propagation of belief status among the components of an issue-based system's style of display. A browser implementation of the merged issue-based and truth-maintenance dependency structures is described. The system is implemented on a locally developed Common Lisp graphical environment and includes a powerful and customizable generic browser.
Merging Data Converters and DSPs for Mixed-Signal Processors
Authors: Henry Davis, Robert Fine, Denis Regimbal
Venue: IEEE Micro (1990)

The use of sigma-delta conversion to produce high resolution without using analog components such as the precise resistors in an A/D (analog/digital) or a D/A (digital/analog) converter is reported. The use of sigma-delta technology solved the problem arising from the noise levels injected into the silicon substrate during digital switching (which limited the integration of both analog and digital circuitry on one VLSI chip) and allowed the implementation of the ADSP-21MSP50, the first mixed-signal processor. The basic elements of the converter are described, and its advantages and drawbacks as well as the implications for expanded DSP applications are examined. Included in the discussion are sampling and quantization noise, modulator design, frequency-domain analysis of the modulator, the use of digital filtering to minimize shaped-quantization noise, and the higher level of integration possible with this approach.
On Perfect Codes: Rank and Kernel
Authors: Kevin T. Phelps, Mercè Villanueva
Venue: Designs, Codes and Cryptography (2002)

We establish upper and lower bounds on the rank and the dimension of the kernel of perfect binary codes. We also establish some results on the structure of perfect codes.
Beyond Spreadsheets: Tools for Building Decision Support Systems
Authors: Hemant K. Bhargava, Suresh Sridhar, Craig Herrick
Venue: Computer (1999)

Decision support systems (DSSs) are software products that help users apply analytical and scientific methods to decision making. They work by using models and algorithms from disciplines such as decision analysis, mathematical programming and optimization, stochastic modeling, simulation, and logic modeling. DSS products can execute, interpret, visualize, and interactively analyze these models over multiple scenarios. In recent years, the growing popularity of online analytical processing, data warehousing and supply chain management has led to an increased interest in the development of decision support systems. When well implemented and used wisely, DSSs can significantly improve the quality of an organization's decision making. However, building a DSS requires significant expertise in decision analysis, programming, and user interface design. A DSS can also need to connect in real time with other enterprise applications, further complicating the task. For these reasons, the broad use of DSSs-- compared with, say, database-management systems-- has not occurred. What's missing is sophisticated tool support for developing DSSs. One current solution is a DSS generator, a kit or environment for developing an application-specific DSS. DSS generators are crucial to the success of DSSs in practice. In this article, the authors describe the state of the art in DSS generator software, specifically in the realm of decision analysis methods. They briefly describe the features of 11 commercially available DSS generators that specialize in decision analysis.
FDDI-M: A Scheme to Double FDDI's Ability of Supporting Synchronous Traffic
Authors: Kang G. Shin, Qin Zheng
Venue: IEEE Transactions on Parallel and Distributed Systems (1995)

Synchronous messages are usually generated periodically and each of them is required to be transmitted before the generation of the next message. Due to the inherent deficiency in its medium access control (MAC) protocol, an FDDI token ring can use at most one half of its ring bandwidth to transmit such synchronous traffic. This deficiency greatly reduces the FDDI¿s capability of supporting multimedia applications like real-time voice/video transmissions. In this paper, we show how a few simple modifications to the FDDI¿s MAC protocol can remove this deficiency and double a ring¿s ability of supporting synchronous traffic. The modified protocol, called FDDI-M, can also achieve a higher throughput for asynchronous traffic than the standard FDDI and the FDDI-II, thus making it useful even for those networks without heavy synchronous traffic.
Generalising the simultaneous computation of the DFTs of two real sequences using a single N-point DFT
Authors: Vitor Silva, Femando Perdigao
Venue: Signal Processing (2002)

A general approach to the problem of simultaneous computation of the discrete Fourier transform (DFT) of two sequences of length N, which may be real, imaginary, conjugated symmetric or conjugated anti-symmetric, using a single N-point DFT of a complex sequence is presented. The framework developed is applied to the simultaneous computation of two DFTs, one DFT and one inverse DFT (IDFT) or two IDFTs for real N-point sequences.