ppxscal/embedding_network huggingface dataset:
The national software works access to distributed files and tools
Authors: Dennis P. Geller
Venue: Proceedings of the 1977 annual conference (1977)

George was fortunate in his new job. After a few days of familiarizing him- self with the project and with his new colleagues, he was given complete responsibility for the detailed design and implementation of a major part of the system. When he finished his design effort, he was anxious to get back to doing a little programming. One of the things George enjoyed most about his work was the way he got to use so many different skills, and to move to a new task when the current one was beginning to become a little bit too routine. So he sat down to code with enthusiasm. He kept at this for a while, but eventually he found his mind starting to wander, and his error rate creeping up. It must, he thought, be time to start running some of these programs and checking them out. I'll get back to the others later.
Gate matrix layout of random control logic in a 32-bit CMOS CPU chip adaptable to evolving logic design
Authors: S. M. Kang, R. H. Krambeck, H. F. S. Law
Venue: Proceedings of the 19th Design Automation Conference (1982)

Previously the gate matrix technique was used to lay out the RALU section of a CMOS 32-bit CPU chip. It took 1.2 Engineer-Years to complete the layout of the RALU that contained more than 20,000 transistors with multiple-bus structure. The average packing density was 840 &mgr;m2 per transistor in 2.5 &mgr;m design rules. Recently we have applied the gate matrix technique to lay out the highly complex "random control logic" of the CPU. With a well-structured layout strategy, the gate matrix layout provided (1) adaptability to evolving logic design with short turnaround times, (2) compatibility with computer aids in layout verification, (3) high packing density competitive with hand layout, and (4) compatibility with a team approach to layout. It took 6.5 Engineer-Years to complete the error-free layout of over 7,000 transistors although the logic design was continuously evolving during the layout period. More than half of the layout efforts were due to logic changes. The average packing density in the final layout of the random control logic was about 1,500 &mgr;m2 per transistor with 2.5 &mgr;m design rules.
Spider, a chip planner for ISL technology
Authors: P. Rao, R. Ramnarayan, G. Zimmermann
Venue: Proceedings of the 21st Design Automation Conference (1984)

Chip planning refers to organizing the layout of a chip and determining the feasibility of integration of a design without performing a detailed layout. This paper describes a chip planning tool called SPIDER (Spatial Planning and Interactive Development Environment for Research), for planning the layout of custom VLSI chips specific to ISL (Integrated Schottky Logic) technology. The tool provides estimates for function block areas, interconnection wiring space and a floorplan. Novel features of the chip planner are described. These include, the idea of a sizing model and algorithms for dimension allocation.
Experiments using interactive color raster graphics for CAD
Authors: Abe Shliferstein
Venue: Proceedings of the 19th Design Automation Conference (1982)

Color raster graphics is being incorporated into CAD systems for printed circuit board (PCB) design. An interactive prototype CAD system developed as an experimental base is described, along with color graphics research using this prototype. Areas investigated included the generation and display of complex PCB's, the display of depth information using &ldquo;2 1/2 dimensional&rdquo; techniques, performance measurements on color raster systems, possibilities for new on-line design audit techniques, color graphics primitives, hardware and software architectures, and human factors considerations.
A tutorial on the regenerative approach and discrete-event simulations
Authors: Michael A. Crane, Austin J. Lemoine
Venue: Proceedings of the 76 Bicentennial conference on Winter simulation (1976)

The purpose of this paper is to provide an introduction to the regenerative method for simulation analysis. The simulations we are concerned with here are simulations of stochastic systems, i.e., systems with random elements. The regenerative approach leads to a statistical methodology for analyzing the output of those simulations which have the property of &ldquo;starting afresh probabilistically&rdquo; from time to time. The class of such simulations is very large and very important, including simulations of a broad variety of queues and queueing networks, inventory systems, inspection, maintenance, and repair operations, and numerous other situations.
Undergraduate research in computer sciences: FODESAR: FORTRAN dependent storage allocation and relocation package
Authors: C. R. Baugh
Venue: Proceedings of the 1965 20th national conference (1965)

IN FORTRAN PROGRAMMING of extensive storage problems the programmer has to devise elaborate schemes to make use of available space. The programmer also has to define the extent of the storage before execution, even when the sizes of the various data blocks are unknown. These requirements place severe restrictions on the efficient use of the size of the storage&mdash;the inability to re-use no longer needed space and the inability to specify storage no larger than needed. FODESAR has been devised using FORTRAN to provide the programmer with a dynamic storage allocation and relocation scheme which would allow for varying programmer's needs during execution. The FODESAR package has been developed in such a way that it can handle any type of problem which can be reduced to a list process problem. It has the capability of linking data blocks together to form complex list structures. However, the main impetus for the original package was matrix operation with dynamic storage allocation and relocation, and as a result extensive work has been completed in this area. One should keep in mind that FODESAR is a general storage scheme even though throughout the description matrix examples and terminology are used; also since FODESAR is written in FORTRAN, it is adaptable to most machines and can easily be extended by adding further routines. At present, FODESAR is under development. For this reason many of the procedures outlined below may undergo substantial revisions during implementation.
CLASS - Composite Language Approach for System Simulation (A Tutorial)
Authors: Harold G. Hixson
Venue: Proceedings of the 5th conference on Winter simulation (1971)

There are several possible approaches to providing both discrete event and continuous system simulation capability in the same modeling context. One approach is to develop a new language which has this capability. Another, which is addressed in this tutorial, is the use of compatible languages in combination. One possibility4 involves the use of SIMSCRIPT II as the basic language. Another possibility is the use of the General Purpose Simulation System (GPSS) and its &ldquo;HELP&rdquo; language FORTRAN. This tutorial explains the basic capabilities required for discrete event modeling, those needed for continuous system simulation, and the considerations involved in achieving a &ldquo;hybrid&rdquo; language capability. It also includes application examples, concentrating on an application requiring additional language facilities for modeling process control computer systems.
Integrating the personal computer into the university computing center environment: &ldquo;A marriage of necessity!&rdquo;
Authors: Michael A. Bauer, J. Michael Bennett, Albert Lee
Venue: Proceedings of the 11th annual ACM SIGUCCS conference on User services (1983)

In this paper an approach to the integration of personal computers with a university computing center is outlined. The approach involves the development of application-oriented software local to the personal computer effectively transforming it into a software workstation. This permits users to take advantage of the features and resources of both the personal computer and the main-frame. To facilitate the development of such software the paper outlines an approach to the design of workstations. An experiment involving the development of a simple editing workstation based upon this method is described and discussed.
Low level complexity for combinatorial games
Authors: Akeo Adachi, Shigeki Iwata, Takumi Kasai
Venue: Proceedings of the thirteenth annual ACM symposium on Theory of computing (1981)

There have been numerous attempts to discuss the time complexity of problems and classify them into hierarchical classes such as P, NP, PSPACE, EXP, etc. A great number of familiar problems have been reported which are complete in NP (nondeterministic polynomial time). Even and Tarjan considered generalized Hex and showed that the problem to determine who wins the game if each player plays perfectly is complete in polynomial space. Shaefer derived some two-person game from NP complete problems which are complete in polynomial space. A rough discussion such as to determine whether or not a given problem belongs to NP is independent of the machine model and the way of defining the size of problems, since any of the commonly used machine models can be simulated by any other with a polynomial loss in running time and by no matter what criteria the size is defined, they differ from each other by polynomial order. However, in precise discussion, for example, in the discussion whether the computation of a problem requires O(n k) time or O(nk+l) time, the complexity heavily depends on machine models and the definition of size of problems. From these points, we introduce somewhat stronger notion of the reducibility.
A family of new algorithms for soft filling
Authors: Kenneth P. Fishkin, Brian A. Barsky
Venue: ACM SIGGRAPH Computer Graphics (1984)

Soft filling algorithms change the color of an anti-aliased region, maintaining the anti-aliasing of the region. The two published algorithms for soft filling work only if the foreground region is anti-aliased against a black background. This paper presents three new algorithms. The first fills against a region consisting of any two distinct colors, and is faster than the published algorithms on a pixel-by-pixel basis for an RGB frame buffer; the second fills against a region composed of three distinct colors; and the third fills against a region composed of four distinct colors. As the power of the algorithms increases, so do the number of assumptions they make, and the computational cost.
The heap/substitution concept - an implementation of functional operations on data structures for a reduction machine
Authors: F. Hommes
Venue: Proceedings of the 9th annual symposium on Computer Architecture (1982)

At first the concept of reduction by direct substitution is described. The syntax of a subset of Berkling's reduction language is given and then its semantics is defined by a set of substitution rules. An example - a program operating on a data structure - will demonstrate two aspects: firstly, it shows how reduction using substitution works, and secondly, it points out the n2-problem, i.e. the time taken to run the program is proportional to n2, where n is the number of items in the data structure. We discuss the problem and then give a solution, which we call the heap/substitution concept. The solution is an extension of the substitution concept and we get it by adding a restricted use of an environment. All advantages of reduction by substitution remain in effect but the time taken to evaluate programs operating on large data structures is now proportional to n. It is also shown that the heap/substitution concept can be used to implement an efficient implementation of recursive function calls.
Instructional uses of the olin experimental classroom
Authors: V. K. Kumar, James L. Rogers
Venue: ACM SIGCUE Outlook (1976)

The Olin Experimental Classroom at Case Western Reserve University provides a laboratory-like environment in which instructors can assess the results of trying out different teaching methods, techniques, etc. From a hasty look at three of the essential hardware components of this facility as shown in Figure 1 - keyset response units for each student, a process-control computer which scans the response units, and a display for the instructor - one could easily conclude that the Olin Experimental Classroom is simply another &ldquo;student response system&rdquo; or &ldquo;wired classroom&rdquo;. In fact, the differences between the traditional student response systems and the Olin Experimental Classroom begin with the very purposes for which these facilities are intended, and the differences extend to every aspect of t h e i r respective operation.
A ternary J - K memory
Authors: M AH Abdul-Karim
Venue: Proceedings of the eighth international symposium on Multiple-valued logic (1978)

A description of a ternay J - K type flip - flop is presented. The output is in the form of three valued level 2, 1, 0. The circuit may be set to any logic level as well as retain the present, past and former past information in accordance to a defined J - K input logic level. This type of triflops have been selected in order to have flexible to ternary memory with simple excitation equations.
Third generation compiler design
Authors: Marvin V. Zelkowitz
Venue: Proceedings of the 1975 annual conference (1975)

Compilers, besides testing for errors in a particular implementation of an algorithm, can be implemented to analyze program structure. This information can be fed back to the programmer in order to improve the structure, reliability and efficiency of the resulting program. This paper surveys several techniques that are currently implementable in a compiler, describes several new techniques that can be applied to programs, and briefly describes one such implementation of many of these ideas.
Simulation study of a series of synchronized intersections
Authors: P. Le Bourgeois
Venue: Proceedings of the second conference on Applications of simulations (1968)

Traffic control at isolated intersections or as part of a more complex system is designed to ensure optimum traffic flow for all road users at each intersection, whether considered separately or as part of a network Increasing use is being made of the simulation method, to study complex planifications for individual transport. In view of the number and characteristics of the parameters, which must be taken into consideration; it is often more successful than conventional empirical or analytical methods. This article introduces a study of green waves, using simulation and its application. The model has to be simple, and economical. The programming language used is GPSS III, the computer an IBM 7040/40 belonging to the &ldquo;Centre de calcul &eacute;lectronique de l'Ecole Polytechnique de l'Universit&eacute; de Lausanne&rdquo;.
CSP II&mdash;a universal computer architecture simulation system for performance evaluation
Authors: Harold Y. Iwata, Melvin M. Cutler
Venue: Proceedings of the 3rd symposium on Simulation of computer systems (1975)

CSP II is a system through which computers can be quickly and flexibly simulated at the functional level, combining the accuracy of a detailed simulation with the simplicity of a high-level simulation. The simulation experiences which motivated the authors' design of CSP II are described, as are the objectives that CSP II was designed to achieve. Strongest of the latter are the capabilities to vary the workload, instruction set, architecture, and timing without recoding the simulation program. Since simulation languages and systems typically offer complete timing flexibility and some flexibility in specifying architecture and workload, emphasis is placed on how CSP II's table-driven approach achieves this total flexibility without significant inefficiency. The array of statistics-gathering mechanisms built into CSP II is described, from a detailed scoreboard of processor state changes to lumped parameters describing computer performance within a simulation run. The great emphasis placed on workload specification capability by the CSP II design is discussed, concluding with the description of the routines written to support workload specification, measurement, and generation. The advantages of the CSP II approach to workload specification are noted, including the ability to generate a workload synthetically. The use of a single workload specification to compare two or more computers, possibly with different instruction sets, is described-a unique capability of the CSP II system.
A multiprogramming operating system for a minicomputer
Authors: Terry E. Weymouth, James T. Perry
Venue: ACM SIGCSE Bulletin (1977)

Described in this paper is a small, modular operating system which was written for an Interdata-70 machine. The total operating system is memory resident and occupies 5K bytes. The primary motivation in redesigning the operating system was to structure it so that students and general system users could easily expand or modify the basic services of the supervising system. Towards this end, the following system principles are embodied in the design: (1) clearly defined separation of system functions, (2) separate object modules for each system routine, and (3) simple system design. Although specifics of implementation are discussed, general design concepts are covered which should aid the reader in any similar attempt (either by example or counter example).
The architecture and system method of DDM1: A recursively structured Data Driven Machine
Authors: A. L. Davis
Venue: Proceedings of the 5th annual symposium on Computer architecture (1978)

An architecture for a highly modular, recursively structured class of machines is presented. DDM1 is an instance of such a machine structure, and is capable of executing machine language programs which are data driven nets. These nets may represent arbitrary amounts of concurrency as well as arbitrary amounts of pipelining. DDM1 is a fully distributed multiprocessing system composed of completely asynchronous modules. The architecture allows for limitless physical extensibility without necessitating special programming or special hardware to support individual machines of widely varying sizes. DDM1 is capable of automatically and dynamically allocating concurrent tasks to the available physical resources. The essential characteristics of the highly parallel, pipelined machine language are also described along with its method for execution on DDM1.
Indexing visual representations through the complexity map
Authors: B. Dubuc, S. W. Zucker
Venue: Proceedings of the Fifth International Conference on Computer Vision (1995)

In differential geometry curves are characterized as mappings from an interval to the plane. In topology curves are characterized as a Hausdorff space with certain countability properties. Neither of these definitions captures the role that curves play in vision, however, in which curves can denote simple objects (such as a straight line), or complicated objects (such as a jumble of string). The difference between these situations is in part a measure of their complexity, and in part a measure of their dimensionality. Note that the map defining such curves is unknown, as is the proper way to represent them. We propose a formal complexity theory of curves appropriate for computational vision in general, and for problems like separating straight lines from jumbles in particular. The theory is applied to the problem of perceptual grouping.
Multilayer printed wiring&mdash;computer aided design
Authors: M. Freeman, G. Ginsberg, M. Resnick, E. Whitley
Venue: Proceedings of the 4th Design Automation Conference (1967)

Integrated circuits, as compared to discrete components, have greatly increased the amount of circuitry that can be mounted on a printed wiring card. Also, board assemblies can be mounted close together, 0.4 inch and less, by taking advantage of low profile flat packs. These packaging efficiencies result in high component densities and significantly smaller equipment, with unfortunately decreased wiring areas. In addition, more sophisticated and complicated performance is obtained by high operating speeds and carefully controlled interconnection wiring. Crosstalk, capacitance to ground, line impedance, signal and voltage isolation, etc., must be accurately controlled within predetermined limits.
Some issues in protocol implementation testing
Authors: E. Cerny
Venue: ACM SIGCOMM Computer Communication Review (1984)

Communication between various makes of communication equipment and across international boundaries is becoming easier due to the continuing development of international standards on communication protocols, such as those defined by ISO for Open Systems Interworking (OSI). Although the agreement to use standard protocols by the various parties involved is the first necessary step towards OSI, it is not sufficient without assuring that the protocols be correctly implemented in the communication equipment. The assessment of the adherence of a communication protocol implementation to its specification relies on testing as its main tool. The development of the tests and their application (the architecture of the test system) have properties and constraints which make them different from those currently created for testing hardware and software systems. In the remainder of the presentation, these constraints and problems as related to the successful development of a protocol test system will be reviewed. They will be separated into those aspects which pertain more to the form of the test support system (the system architecture), and to those which influence the selection of effective test interaction sequences. This division is slightly arbitrary, for some of the issues have effect on both of the above components of the test system.
Parallelism in algebraic computation and parallel algorithms for symbolic linear systems
Authors: Tateaki Sasaki, Yasumasa Kanada
Venue: Proceedings of the fourth ACM symposium on Symbolic and algebraic computation (1981)

Parallel execution of algebraic computation is discussed in the first half of this paper. It is argued that, although a high efficiency is obtained by parallel execution of divide-and-conquer algorithms, the ratio of the throughput to the number of processors is still small. Parallel processing will be most successful for the modular algorithms and many algorithms in linear algebra. In the second half of this paper, parallel algorithms for symbolic determinants and linear equations are proposed. The algorithms manifest a very high efficiency in a simple parallel processing scheme. These algorithms are well usable in also the serial processing scheme.
A graphical technique for describing recursion
Authors: Glenn A. Jackson
Venue: Proceedings of the sixth SIGCSE technical symposium on Computer science education (1976)

One concept in computer science that is very difficult for the beginner to grasp, and equally difficult for the instructor to present in a straight-forward understandable manner, is the concept of recursion. Since this is a fundamental concept through which the amount of computer code required for some algorithms can be drastically reduced, an instructor must discuss this area early in a student's career, even though he runs the risk of confusing a few students for a lecture or two. This paper presents a method of describing recursive procedure calls that utilizes a form of self-generating state diagram. This approach enables the student to visually keep track of where program control is located at each moment during execution.
Page size selection for a real time computer
Authors: Kenneth J. Thurber, Peter C. Patton
Venue: Proceedings of the 1975 annual conference (1975)

This paper discusses an application of Denning's working set model to a design problem that arose in the development of an avionics computer. The working set model was used to aid the choice of optimum page size based on actual operating program trace data: from the E-2B aircraft. Extrapolating the E-2B workload until it &ldquo;saturated&rdquo; the new design on a working set idealization of the new architecture led to a preferred size for program pages on backing store.