ppxscal/embedding_network huggingface dataset:
Use of a decision support system to evaluate candidates applying for programmer/analyst positions
Authors: Hae-Ching Chang, Raymond McLeod,  Jr.
Venue: ACM SIGCPR Computer Personnel (1991)

This article describes a research project that is scheduled for completion during the latter part of 1991. The purpose of the research is to develop a decision support system (DSS) that can aid novice interviewers in their evaluation of candidates applying for programmer/analyst positions. As of this writing, the DSS has been developed, and only the validation remains.
Parallel circuit simulation using hierarchical relaxation
Authors: G. G. Hung, Y. C. Wen, K. Gallivan, R. Saleh
Venue: Proceedings of the 27th ACM/IEEE Design Automation Conference (1991)

This paper describes a class of parallel algorithms for circuit simulation based on hierarchical relaxation that has been implemented on the Cedar multiprocessor. The Cedar machine is a reconfigurable, general-purpose supercomputer that was designed and implemented at the University of Illinois. A hierarchical circuit simulation scheme was developed to exploit the hierarchical organization of Cedar. The new algorithm and a number of key issues, such as multilevel circuit partitioning, data partitioning, cluster algorithm selection, and cluster algorithm implementation are described in this paper. Performance results on a variety of different configurations of Cedar are also presented that illustrate the benefits of the hierarchical approach over the non-hierarchical approach.
Three-Dimensional Structured Networks for Matrix Equation Solving
Authors: Li-Xin Wang, Jerry M. Mendel
Venue: IEEE Transactions on Computers (1991)

Two three-dimensional structured networks are developed for solving linear equations and the Lyapunov equation. The basic idea of the structured network approaches is to first represent a given equation-solving problem by a 3-D structured network so that if the network matches a desired pattern array, the weights of the linear neurons give the solution to the problem: then, train the 3-D structured network to match the desired pattern array using some training algorithms; and finally, obtain the solution to the specific problem from the converged weights of the network. The training algorithms for the two 3-D structured networks are proved to converge exponentially fast to the correct solutions. Simulations were performed to show the detailed convergence behaviors of the 3-D structured networks.
Empirical study of motivation in a entry level programming course
Authors: Salvatore Mamone
Venue: ACM SIGPLAN Notices (1992)

This paper will address the issue of motivation in an entry level programming course. Does the reason a student takes a course dictate the grade he can hope to achieve? Will a student who needs to take a course perform better than a student who wants to take a course? This paper will attempt to answer these questions using the results gained over three years of teaching a program language course at two New York universities and cover seven semesters and 126 students.
Some results on stochastic language modeling
Authors: Renato De Mori, Roland Kuhn
Venue: Proceedings of the workshop on Speech and Natural Language (1991)

The paper will discuss three issues. The first is the derivation of precise probability scores for partial hypotheses containing islands, in the context of a Stochastic-Context-Free-Grammar (SCFG) for Language Modeling (LM). The second issue is the possibility of adding a cache component to a LM. This component alters the expected probability of words to reflect the speaker's patterns of word use. Finally, the idiosyncratic properties of dialogue are being studied; this work will indicate how knowledge about the discourse state can be incorporated into the LM and into the semantic component.
Factory Concepts and Practices in Software Development
Authors: Michael A. Cusumano
Venue: IEEE Annals of the History of Computing (1991)

This paper reviews the introduction of factory concepts and practices, based on tools and methods from the evolving field of software engineering, at major software producers, in particular those that explicitly adopted the factory label to describe their software facilities or approach to software development: Hitachi, Toshiba, NEC, and Fujitsu in Japan, as well as System Development Corporation in the United States. The other United States firm discussed in detail is International Business Machines, which, without adopting the factory label, introduced numerous measures to organize and control software development, especially basic software. The paper emphasizes that the difficulty of the technology, shortages of skilled engineers, and large-scale projects have encouraged producers to become more systematic or factory-like in managing a series of projects, even though some characteristics of the technology and the industry have made software seem difficult to control and more suitable to a loosely structured project-centered or craft approach to development.
Shared binary decision diagram with attributed edges for efficient Boolean function manipulation
Authors: Shin-ichi Minato, Nagisa Ishiura, Shuzo Yajima
Venue: Proceedings of the 27th ACM/IEEE Design Automation Conference (1991)

The efficiency of Boolean function manipulation depends on the form of representation of Boolean functions. Binary Decision Diagrams (BDD's) are graph representations proposed by Akers and Bryant. BDD's have some properties which can be used to enable efficient Boolean function manipulation. In this paper, we describe a technique of more efficient Boolean function manipulation that uses Shared Binary Decision Diagrams (SBDD's) with attributed edges. Our implements include an ordering algorithm of input variables and a method of handling don't care. We show experimental results produced by the implementation of the Boolean function manipulator.
Requirements and design of DesignVision and object-oriented graphical interface to an intelligent software design assistant
Authors: Raymonde Guindon
Venue: Proceedings of the SIGCHI conference on Human factors in computing systems (1992)

Key findings from empirical studies&mdash;early design is opportunistic; critical role of pictures in design conception; impact of various cognitive limitations&mdash;have very effectively determined requirements and design for a set of tools to support early design. Key design features of the tools include respectively: (1) The (simultaneous) display of any software modules at arbitrary levels of abstraction and from any subsystems. The unrestricted, smooth navigation between these software modules. (2) Multiple design notations&mdash;pictorial and symbolic&mdash; cross-referenced, editable, and maintained consistent across all views. Integrated views of control flow, data flow, and functional decomposition. (3) Automatic layout at arbitrary levels of nesting. Visual display of execution paths in the solution. Automatic completeness and consistency check. Automatic visual indication and listing of modules with constraint violations.
Informal and Formal Requirements Specification Languages: Bridging the Gap
Authors: M. D. Fraser, K. Kumar, V. K. Vaishnavi
Venue: IEEE Transactions on Software Engineering (1991)

The differences between informal and formal requirements specification languages are noted, and the issue of bridging the gap between them is discussed. Using structured analysis (SA) and the Vienna development method (VDM) as surrogates for informal and formal languages, respectively, two approaches are presented for integrating the two. The first approach uses the SA model of a system to guide the analyst's understanding of the system and the development of the VDM specifications. The second approach proposes a rule-based method for generating VDM specifications from a set of corresponding SA specifications. The two approaches are illustrated through a simplified payroll system case. The issues that emerge from the use of the two approaches are reported.
An elementary processor architecture with simultaneous instruction issuing from multiple threads
Authors: Hiroaki Hirata, Kozo Kimura, Satoshi Nagamine, Yoshiyuki Mochizuki, Akio Nishimura, Yoshimori Nakase, Teiji Nishizawa
Venue: ACM SIGARCH Computer Architecture News (1992)

In this paper, we propose a multithreaded processor architecture which improves machine throughput. In our processor architecture, instructions from different threads (not a single thread) are issued simultaneously to multiple functional units, and these instructions can begin execution unless there are functional unit conflicts. This parallel execution scheme greatly improves the utilization of the functional unit. Simulation results show that by executing two and four threads in parallel on a nine-functional-unit processor, a 2.02 and a 3.72 times speed-up, respectively, can be achieved over a conventional RISC processor. Our architecture is also applicable to the efficient execution of a single loop. In order to control functional unit conflicts between loop iterations, we have developed a new static code scheduling technique. Another loop execution scheme, by using the multiple control flow mechanism of our architecture, makes it possible to parallelize loops which are difficult to parallelize in vector or VLIW machines.
Generating Connected Textured Fractal Patterns Using Markov Random Fields
Authors: Levent Onural
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1991)

An algorithm that yields textured and connected binary fractals is presented. The texture is imposed by modelling the fractal as a Markov random field (MRF) at every resolution level. The model size and the parameters specify the texture. The generation starts at a coarser level and continues at finer levels. Connectivity, which is a global property, is maintained by restricting the flow of the sample generating Markov chain within a limited subset of all possible outcomes of the Markov random field. The texture is controlled by the parameters of the MRF model being used. Sample patterns are shown.
An empirical investigation of menu design in language-based editors
Authors: Mark A. Toleman, Jim Welsh, Alan J. Chapman
Venue: Proceedings of the fifth ACM SIGSOFT symposium on Software development environments (1992)

In program visualization some form of graphics is used to represent some aspect of a program. However, graphics are necessarily expensive with respect to &ldquo;screen real estate&rdquo;. Alternatives, therefore, may be required for presentation of certain concepts fundamental to the programmer's model of a program. For example, one graphical representation of a program, written in a block-structured language like Pascal or Modula-2, is the structure chart model of the hierarchical structure of the blocks or modules making up the program. This graphic may be the most appropriate but it may not be conveniently implemented as a menu and a means of &ldquo;directly&rdquo; selecting blocks of program code to view or edit. Such graphics are used extensively, for example, in the Garden environment developed at Brown University. An alternative is a text-based list of block names indented to summarize the program's structure. UQ1, a language-based editor developed at the University of Queensland, implements the concept in this manner. Both types of menu structure were examined and compared for efficiency in a direct manipulation style of interaction. In general, there was no significant difference (P > 0.05) in time taken by subjects to select items from either style of menu.
On testing the "pseudo-randomness" of a hypergraph
Authors: Julie Haviland, Andrew Thomason
Venue: Discrete Mathematics (1992)

By Haviland and Thomason (1989) a definition for a pseudo-random hypergraph was proposed, and the resemblance between these pseudo-random hypergraphs and random hypergraphs was explored. Moreover, a sufficient condition was given for a hypergraph to be pseudo-random according to this definition. Here we show that a weaker condition suffices, and give a short proof. We also report a number of examples which show that the resemblance of pseudo-random hypergraphs to random hypergraphs is much less marked than the analogous comparison in the case of graphs. The examples are easily verified by means of the theorem presented here.
Some notes on software design: reply to a reaction
Authors: Robert McLaughlin
Venue: ACM SIGSOFT Software Engineering Notes (1992)

Mr. van Reeken wrote a note on my note. It is nice to know that some reads what you write. I think his comments force me to be a little more specific. I agree with some of what he says, but must mark my disagreement with other things he says.
Helping the user by helping the developer: the role of guidelines in a multimedia context
Authors: Maria G. Wedlow, Christina Haas, Dan Boyarski, Paul G. Crumley
Venue: ACM SIGCHI Bulletin (1991)

Andrew, a computer system designed for use on campuses and in businesses around the country, was developed by the Information Technology Center (a joint endeavor between Carnegie Mellon University and IBM Corporation). The Andrew Toolkit provides tools for building applications within the system using multimedia insets, software packages which have been designed for the display and modification of various types of information. Insets which currently exist in Andrew include text, raster, table, animation, hyperlink, and calendar; other insets employing sound and video are under development.
The metrobridge: a backbone network distributed switch
Authors: K. Zielinski, M. Chopping, D. Milway, A. Hopper, B. Robertson
Venue: ACM SIGCOMM Computer Communication Review (1991)

This paper describes the Metrobridge project - a distributed switch for connecting PC cards via a high-speed ATM-style backbone network. Initially the system architecture is outlined, then certain aspects are examined in more detail. Topics discussed include learning and routing algorithms, access/routing control, management functions, and applications.
The FSM network model for behavioral synthesis of control-dominated machines
Authors: Wayne Wolf
Venue: Proceedings of the 27th ACM/IEEE Design Automation Conference (1991)

Since many ASICs are dominated by control functions, control-dominated architectures form an important domain for behavioral synthesis. We propose modeling control-dominated architectures during behavioral synthesis as networks of communicating FSMs&mdash;the model more directly reflects behavior and allows more accurate cost estimation, especially for control, than do traditional data-directed representations for control-dominated machines. We show how to implement a number of important compiler optimizations on the FSM network model.
Integrating logic and object-oriented programming
Authors: Shaun-inn Wu
Venue: ACM SIGPLAN OOPS Messenger (1991)

Method representation in most object-oriented programing languages is too procedural and less declarative and expressive. Logic programming with declarative semantics can contribute a lot to the expressiveness of representing methods. Therefore, it is very desirable to combine logic programming and object-oriented programming to get the advantages of both. LogiC++ that integrates logic and object-oriented programming is designed primarily based on C++. However, methods in a LogiC++ program can be represented by Prolog Horn clauses. In this paper, we describe a compiler that takes a LogiC++ program as input and produces an equivalent C++ program as the output. The C++ program can then be compiled by a C++ compiler.
ADL: a dynamic object-oriented modeling language
Authors: Douglas E. Buska, Mark L. Wilkins
Venue: ACM SIGPLAN OOPS Messenger (1991)

A couple of years ago when the term "object-oriented" was less popular, we found that we needed a language that had some of the object-oriented capabilities of C++, KEETM(b), and Smalltalk. The languages that were available at that time ran only on special purpose hardware and were not practical for our development because of lack of capabilities. The language we developed had to support a combination of the features in the above languages without giving up the standard 3GL features of flow control, arrays, and string manipulation. From these requirements, a programming language called ADL was born. The acronym ADL stands for "Algorithm Description Language" because ADL's original application was for development of models comprised of cost and transportation algorithms. As ADL was enhanced, it became apparent that ADL could be used for modeling general physical systems by representing the systems with "classes", and "instances".
Turtle walk through functional language
Authors: Putnik Zoran, Budimac Zoran Ivanovic Mirjana
Venue: ACM SIGPLAN Notices (1991)

In this paper implementation and usage of a turtle graphics in (pure) functional programming language - LispKit Lisp is described. With all basic graphics functions available, implementation of a turtle graphics is enabled. Since turtle graphics is second most common way of using graphics, this implementation is a significant improvement of LispKit Lisp abilities. All necessary functions of a turtle graphics are implemented in LispKit Lisp, and they simply should be appended to any program which uses them.
Automatic operator configuration in the synthesis of pipelined architectures
Authors: Kristen N. McNall, Albert E. Casavant
Venue: Proceedings of the 27th ACM/IEEE Design Automation Conference (1991)

We present an algorithm for automating the choice of operator configurations while synthesizing a pipelined design. The chosen configuration set must meet the design constraints of the pipeline (number of stages and stage time) while minimizing the total cost(s) (e.g. area, power) of the design. The configuration algorithm is first used with heuristics to make initial operator choices for insertion of stage latches; then optimally to choose configurations within each stage. Some advantages to this new algorithm are that it will allow the designer to specify both the number of stages as well as the latency of each stage, and that it will take arbitrary timing functions.
Performance evaluation of mesh-connected wormhole-routed networks for interprocessor communication in multicomputers
Authors: Suresh Chittor, Richard Enbody
Venue: Proceedings of the 1990 ACM/IEEE conference on Supercomputing (1990)

Wormhole routing is becoming a popular switching technique in the design of interprocessor communication networks. In this paper, we describe a set of experiments conducted on wormhole-routed Symult 2010 systems to measure the performance of their interprocessor communication networks. We then analyze the results to predict the performance of similar systems. We first show that long path lengths in this mesh have a negligible effect on communication time. Next, we show that the contention for network channels can scale up with the system size, and that the effect is observable in current machines. We also show that resources within a node itself can become a bottleneck. Given current architectural trends, we conclude that contention for network resources, and not path length, will become the primary concern in ensuring fast communication in future multicomputers.
Discriminator varieties and symbolic computation
Authors: Stanley Burris
Venue: Journal of Symbolic Computation (1992)

We look at two aspects of discriminator varieties which could be of considerable interest in symbolic computation:1.discriminator varieties are unitary (i.e., there is always a most general unifier of two unifiable terms), and 2.every mathematical problem can be routinely cast in the form^@?p"1 ~ q"1, ..., p"k ~ q"k implies the equation x ~ y. Item (l) offers possibilities for implementations in computational logic, and (2) shows that Birkhoff's five rules of inference for equational logic are all one needs to prove theorems in mathematics.
About the DALibrary: its design and development
Authors: Katherine Preas, Bryan Preas
Venue: ACM SIGDA Newsletter (1992)

The DALibrary is a collection of the most important design automation (DA) literature written over 27 years, and is available on eight CD-ROMs. The retrieval software runs on IBM PC compatibles, Apple Macintoshes and Sun SPARCstations. In addition to the archival value (much of this material is now out of print) the equivalent of 37,298 pages of journal articles, conference proceedings and newsletters is conveniently available to those working in the DA field. Previously very few people had access to all of this literature. Its availability should reduce the repetition of past work for those submitting papers to conferences or journals, by aiding in the review of previous work, and making it easier to find and cite related publications.
Quality tree extensions and partial instantiation for Ada objects
Authors: Henry Basson, Jean Claude Derniame
Venue: Proceedings of the eighth annual Washington Ada symposium summer SIGAda meeting on Ada: software: foundation for competitveness (1991)

This paper presents first the state of the art of quality tree as largely applied as well as the knowledge on software quality intended to be represented by the tree. We show then how the present tree meets partially the needs of an exhaustive representation of quality and some aspects such as inter-influences among quality factors or criteria are not represented. Afterwards, we propose extensions such as to meet the needs of more detailed quality representation and to ensure more precise quality assessment. Finally, the extended tree is partially instantiated for Ada sources.
The French Society of Computer Scientists: AFCET
Authors: Colette Hoffsaes
Venue: IEEE Annals of the History of Computing (1990)

The French Learned Society for Computer Scientists, AFCET (Association Française pour la Cybernétique Economique et Technique) originated in 1968 with the merger of four associations for automatic control, operational research, information processing, and instrumentation and control, all of which were considered to be components of the term "cybernetics." The novelty of this process explains how difficult it was for computer science to be recognized in the manner that computer scientists desired, both in AFCET and in the university. Discussion regarding cybernetics, which has continued in the background within AFCET, has emerged again today to respond to questions posed by artificial intelligence in its most advanced developments.