ppxscal/embedding_network huggingface dataset:
Children's interests and concerns when using the international children's digital library: a four-country case study
Authors: Allison Druin, Ann Weeks, Sheri Massey, Benjamin B. Bederson
Venue: Proceedings of the 7th ACM/IEEE-CS joint conference on Digital libraries (2007)

This paper presents a case study of 12 children who used the International Children's Digital Library (ICDL) over four years and live in one of four countries: Germany, Honduras, New Zealand, and the United States. By conducting interviews, along with collecting drawings and book reviews, this study describes these children's interests in books, libraries, technology and the world around them. Findings from this study include: these young people increased the variety of books they read online; still valued their physical libraries as spaces for social interaction and reading; showed increased reading motivation; and showed interest in exploring different cultures.
A Copositive Programming Approach to Graph Partitioning
Authors: Janez Povh, Franz Rendl
Venue: SIAM Journal on Optimization (2007)

We consider 3-partitioning the vertices of a graph into sets $S_1$, $S_2$, and $S_3$ of specified cardinalities, such that the total weight of all edges joining $S_1$ and $S_2$ is minimized. This problem is closely related to several NP-hard problems like determining the bandwidth or finding a vertex separator in a graph. We show that this problem can be formulated as a linear program over the cone of completely positive matrices, leading in a natural way to semidefinite relaxations of the problem. We show in particular that the spectral relaxation introduced by Helmberg &etal; (1995) can equivalently be formulated as a semidefinite program. Finally we propose a tightened version of this semidefinite program and show on some small instances that this new bound is a significant improvement over the spectral bound.
Evaluation of blind signal separation method using directivity pattern under reverberant conditions
Authors: S. Kurita
Venue: Proceedings of the Acoustics, Speech, and Signal Processing, 2000. on IEEE International Conference - Volume 05 (2000)

This paper describes a new blind signal separation method using the directivity patterns of a microphone array. In this method, to deal with the arriving lags among each microphone, the inverses of the mixing matrices are calculated in the frequency domain so that the separated signals are mutually independent. Since the calculations are carried out in each frequency independently, the following problems arise: (1) permutation of each sound source, (2) arbitrariness of each source gain. In this paper, we propose a new solution that directivity patterns are explicitly used to estimate each sound source direction. As the results of signal separation experiments, it is shown that the proposed method improves the SNR of degraded speech by about 16 dB under non-reverberant condition. Also, the proposed method improves the SNR by 8.7 dB when the reverberation time is 184 ms, and by 5.1 dB when the reverberation time is 322 ms.
The Complexity of Reasoning with Global Constraints
Authors: Christian Bessiere, Emmanuel Hebrard, Brahim Hnich, Toby Walsh
Venue: Constraints (2007)

Constraint propagation is one of the techniques central to the success of constraint programming. To reduce search, fast algorithms associated with each constraint prune the domains of variables. With global (or non-binary) constraints, the cost of such propagation may be much greater than the quadratic cost for binary constraints. We therefore study the computational complexity of reasoning with global constraints. We first characterise a number of important questions related to constraint propagation. We show that such questions are intractable in general, and identify dependencies between the tractability and intractability of the different questions. We then demonstrate how the tools of computational complexity can be used in the design and analysis of specific global constraints. In particular, we illustrate how computational complexity can be used to determine when a lesser level of local consistency should be enforced, when constraints can be safely generalized, when decomposing constraints will reduce the amount of pruning, and when combining constraints is tractable.
A revisitation of kernel synchronization schemes
Authors: Christopher Small, Stephen Manley
Venue: Proceedings of the annual conference on USENIX Annual Technical Conference (1997)

In an operating system kernel, critical sections of code must be protected from interruption. This is traditionally accomplished by masking the set of interrupts whose handlers interfere with the correct operation of the critical section. Because it can be expensive to communicate with an off-chip interrupt controller, more complex optimistic techniques for masking interrupts have been proposed. In this paper we present measurements of the behavior of the NetBSD 1.2 kernel, and use the measurements to explore the space of kernel synchronization schemes. We show that (a) most critical sections are very short, (b) very few are ever interrupted, (c) using the traditional synchronization technique, the synchronization cost is often higher than the time spent in the body of the critical section, and (d) under heavy load NetBSD 1.2 can spend 9% to 12% of its time in synchronization primitives. The simplest scheme we examined, disabling all interrupts while in a critical section or interrupt handler, can lead to loss of data under heavy load. A more complex optimistic scheme functions correctly under the heavy workloads we tested and has very low overhead (at most 0.3%). Based on our measurements, we present a new model that offers the simplicity of the traditional scheme with the performance of the optimistic schemes. Given the relative CPU, memory, and device performance of today's hardware, the newer techniques we examined have a much lower synchronization cost than the traditional technique. Under heavy load, such as that incurred by a web server, a system using these newer techniques will have noticeably better performance.
Banked microarchitectures for complexity-effective superscalar microprocessors
Authors: Krste Asanovic
Venue:  (2006)

High performance superscalar microarchitectures exploit instruction-level parallelism (ILP) to improve processor performance by executing instructions out of program order and by speculating on branch instructions. Monolithic centralized structures with global communications, including issue windows and register files, are used to buffer in-flight instructions and to maintain machine state. These structures scale poorly to greater issue widths and deeper pipelines, as they must support simultaneous global accesses from all active instructions. The lack of scalability is exacerbated in future technologies, which have increasing global interconnect delay and a much greater emphasis on reducing both switching and leakage power. However, these fully orthogonal structures are over-engineered for typical use. Banked microarchitectures that consist of multiple interleaved banks of fewer ported cells can significantly reduce power, area, and latency of these structures. Although banked structures exhibit a minor performance penalty, significant reductions in delay and power can potentially be used to increase clock rate and lead to more complexity-effective designs. There are two main contributions in this thesis. First, a speculative control scheme is proposed to simplify the complicated control logic that is involved in managing a less-ported banked register file for high-frequency superscalar processors. Second, the RingScalar architecture, a complexity-effective out-of-order superscalar microarchitecture, based on a ring topology of banked structures, is introduced and evaluated. (Copies available exclusively from MIT Libraries, Rm. 14-0551, Cambridge, MA 02139-4307. Ph. 617-253-5668; Fax 617-253-1690.)
Solutions Drawn from Australian Case Studies in Mobile Commerce
Authors: Jonathan O'Donnell
Venue: Proceedings of the International Conference on the Management of Mobile Business (2007)

Drawing on 16 case studies of Australian organizations, across seven industry sectors, we explore the issues involved in implementing mobile commerce and describe some of the solutions adopted by organizations. Faced with a number of technical, legal and organizational issues, the organizations developed a range of innovative solutions including: ensuring that there is a clear organizational cost-saving in addition to any benefit to customers; conducting trials to understand the complexities of the law; building on existing experience; finding a niche market; providing extensive training and support; and reviewing existing business procedures.
Efficient Asynchronous Protocol Converters for Two-Phase Delay-Insensitive Global Communication
Authors: Amitava Mitra, William F. McLaughlin, Steven M. Nowick
Venue: Proceedings of the 13th IEEE International Symposium on Asynchronous Circuits and Systems (2007)

As system-level interconnect incurs increasing penalties in latency, round-trip cycle time and power, and as timing-variability becomes an increasing design challenge, there is renewed interest in using two-phase delay-insensitive protocols for global system-level communication. However, in practice, when designing asynchronous systems, it is extremely inefficient to build local computation nodes with two-phase logic, hence four-phase computation blocks are typically used. This paper proposes a new architecture, and circuit- level implementations, for a family of asynchronous protocol converters, which efficiently convert between two- and four-phase protocols, thus facilitating system design with robust global two-phase protocols and local four-phase protocols. The main focus is on a level-encoded dual-rail (LEDR) two-phase protocol for global communication, and a four-phase return-to-zero (RZ) protocol for asynchronous computation blocks. However, with small modifications, the converters are extended to handle other common four-phase protocols, such as 1- of-4 and single-rail bundled data. The converters are highly robust, with almost entirely quasi delayinsensitive implementations, yet exhibit high performance and modest area overhead. Initial post-layout simulations in a 0.18 micron TSMC process are provided, both assuming a small computation block (8x8 combinational multiplier) as well as an empty computation block (FIFO stage).
FPGA Prototyping Strategy for a H.264/AVC Video Decoder
Authors: Vagner S. Rosa, Wagston T. Staehler, Arnaldo Azevedo, Bruno Zatt, Roger E. Porto, Luciano V. Agostini, Sergio Bampi, Altamiro A. Susin
Venue: Proceedings of the 18th IEEE/IFIP International Workshop on Rapid System Prototyping (2007)

This paper presents the prototyping strategy used to validate the designed modules of a main profile H.264/AVC video decoder designed to achieve 1080p HDTV resolution, implemented in a FPGA. All modules designed were completely described in VHDL and further validated through simulations. The post place-and-route synthesis results indicate that the designed architectures are able to target real time when processing HDTV 1080p frames (1080x1920). The architectures were prototyped using a Digilent XUP V2P board, containing a Virtex-II Pro XC2VP30 Xilinx FPGA. The prototyping strategy used an embedded Power PC and associated logic and buffering to control the modules under prototyping. A host computer, running the reference software, was used to generate the input stimuli and to compare the results, through a RS-232 serial interface.
Computerized adaptive test item response times for correct and incorrect pretest and operational items: testing fairness and test-taking strategies
Authors: Barbara S. Plake
Venue:  (2007)

This study examined the amount of time spent on pretest and operational items that are answered correctly and incorrectly by different ability examinees when taking a computerized adaptive test (CAT). Consistent with other research, the results indicate that higher ability examinees spend more time than lower ability examinees on all items, regardless of whether the items are tailored to their ability level (operational items) or not (pretest items). It was expected, based on the literature, that examinees would spend more time on test questions they answered incorrectly than correctly. This was the case for most of the items, but not the ones near the end of the CAT, suggesting that examinees may not have sufficient time or motivation to devote to these items. Seven testing fairness issues related to a CAT were addressed along with recommendations. Five test-taking strategies derived from the results were provided to help ensure testing fairness. The presence of pretesting was found either to benefit or hinder examinees depending on their ability levels due to disproportionate amounts of time and effort used by these examinees with different ability levels on these items. Generally, examinees with lower ability levels have more time remaining after they finish the test than do examinees with higher ability levels. A design feature for a CAT that uses a time management wizard, time reminder, and pacing guidance to help examines to move through a test was proposed for future development. Finally, several recommendations to ensure testing fairness were provided for the future examiners&rsquo; manual.
A general class of Bernstein-like bases
Authors: E. Mainar, J. M. Peña
Venue: Computers Mathematics with Applications (2007)

This paper presents a unified approach to deal with spaces containing simultaneously algebraic and trigonometric or hyperbolic polynomials. Bases with optimal shape preserving and stability properties are constructed. Evaluation and subdivision algorithms for them are provided. Bases for the corresponding and mixed spline spaces are also constructed. Some nice properties of these bases and the generated curves are shown.
Knowledge Networking for Development: Building Bridges across the Digital Divide
Authors: Sajda Qureshi, Peter Keen, Mehruz Kamal
Venue: Proceedings of the 40th Annual Hawaii International Conference on System Sciences (2007)

As the dependencies between developed and developing countries increase with the globalization of the world economy, the need to access and use dispersed knowledge and skills are at a premium. As the costs of skill sets increase in the developed world, organizations are turning to the developing world to cater for their knowledge resources. The sharing and use of diverse and disparate knowledge has become a key engine for development. This paper investigates how knowledge networking can enable the digital divide to be overcome. Following a phenomenological analysis of knowledge activation through information and communication technologies, this paper provides insight into the development processes that are driven by knowledge networking. The contribution of this paper is in the discovery of the ways knowledge networking can be used to bridge the digital divide.
Mutual authentication with smart cards
Authors: Bastiaan Bakker
Venue: Proceedings of the USENIX Workshop on Smartcard Technology on USENIX Workshop on Smartcard Technology (1999)

The World Wide Web has become the de facto interface for consumer oriented electronic commerce. So far the interaction between consumers and merchants is mostly limited to providing information about products and credit card based payments for mail orders. This is largely due to the lack of security currently available for commercial transactions. At the moment the only security mechanism present in most browsers is the Secure Socket Layer (SSL) which is limited to authentication and encryption of the HTTP session. It does not aim to secure transactions. This report describes the design of a new three party authentication and key distribution protocol to serve as a foundation for WWW based transactions. Instead of having a radically new design it is derived from KryptoKnight protocol family developed at IBM. An important design consideration has been that it can be implemented with existing smart card technology. Specifically the Dutch Chipper and ChipKnip cards have been examined for their applicability. The result is an ABK(t) type protocol that runs with any card that supports either the ISO7816 internal authenticate command or the En726 read stamped or protected read instructions. Secondly a prototype has been implemented in Java that can run in either the Java Development Kit or the Netscape or HotJava browser. Though Java was not designed for implementing hardware drivers it has proven perfectly suitable for communication with smart cards. Also it has effectively demonstrated its cross platform capabilities over multiple operating systems: except for a small native library to talk to the RS232 port the same code runs on Win32, Linux and the NCD network computer.
Proposal of Medical KDD Support User Interface Utilizing Rule Interestingness Measures
Authors: Miho Ohsaki, Hidenao Abe, Shusaku Tsumoto, Hideto Yokoi, Takahira Yamaguchi
Venue: Proceedings of the Sixth IEEE International Conference on Data Mining - Workshops (2006)

This paper discusses the utilization of rule interestingness measures in medical KDD. We selected various interestingness measures and conducted experiments using clinical datasets to examine how they can estimate real human interest. The results indicate that some of them have a stable, reasonable estimation performance and the combinational use of interestingness measures will contribute to medical KDD. We then developed a prototype of medical KDD support user interface based on the experimental outcomes. We conducted a case study in which a medical expert tried to discover medical knowledge with the prototype. Some interesting rules were actually obtained and that indicates the potential of the user interface.
Elementary cost functions for blind separation of non-stationary source signals
Authors: M. Joho
Venue: Proceedings of the Acoustics, Speech, and Signal Processing, 2001. on IEEE International Conference - Volume 05 (2001)

Blind source separation (BSS) is a problem found in many applications related to acoustics or communications. This paper addresses the blind source separation problem for the case where the source signals are non-stationary and the sensors are noisy. To this end, we propose several useful elementary cost functions which can be combined to an overall cost function. The elementary cost functions might have different objectives, such as uncorrelated output signals or power normalization of the output signals. Additionally, the corresponding gradients with respect to the adjustable parameters are given. We discuss the design of an overall cost function and also give a simulation example.
Using magpie for request extraction and workload modelling
Authors: Paul Barham, Austin Donnelly, Rebecca Isaacs, Richard Mortier
Venue: Proceedings of the 6th conference on Symposium on Opearting Systems Design & Implementation - Volume 6 (2004)

Tools to understand complex system behaviour are essential for many performance analysis and debugging tasks, yet there are many open research problems in their development. Magpie is a toolchain for automatically extracting a system's workload under realistic operating conditions. Using low-overhead instrumentation, we monitor the system to record fine-grained events generated by kernel, middleware and application components. The Magpie request extraction tool uses an application-specific event schema to correlate these events, and hence precisely capture the control flow and resource consumption of each and every request. By removing scheduling artefacts, whilst preserving causal dependencies, we obtain canonical request descriptions from which we can construct concise workload models suitable for performance prediction and change detection. In this paper we describe and evaluate the capability of Magpie to accurately extract requests and construct representative models of system behaviour.
Statistical Classification and Visualization of MALDI-Imaging Data
Authors: Marc Gerhard, Soren-Oliver Deininger, Frank-Michael Schleif
Venue: Proceedings of the Twentieth IEEE International Symposium on Computer-Based Medical Systems (2007)

Proteomic profiling based on mass spectrometry (ms) is an important tool for studies at the protein and peptide level. Thereby, the identification of relevant masses for a specific kind of disease, discriminating classification models as well as a reliable visualization is complicated. For the analysis of tissue sections the new technique of MALDI-Imaging has been introduced, which results in new data analysis challenges. Here we present a method for the analysis and visualization of MALDI Imaging spectra applied on a clinical cancer data set.
Software behavior oriented parallelization
Authors: Chen Ding, Xipeng Shen, Kirk Kelsey, Chris Tice, Ruke Huang, Chengliang Zhang
Venue: ACM SIGPLAN Notices (2007)

Many sequential applications are difficult to parallelize because of unpredictable control flow, indirect data access, and input-dependent parallelism. These difficulties led us to build a software system for behavior oriented parallelization (BOP), which allows a program to be parallelized based on partial information about program behavior, for example, a user reading just part of the source code, or a profiling tool examining merely one or few executions. The basis of BOP is programmable software speculation, where a user or an analysis tool marks possibly parallel regions in the code, and the run-time system executes these regions speculatively. It is imperative to protect the entire address space during speculation. The main goal of the paper is to demonstrate that the general protection can be made cost effective by three novel techniques: programmable speculation, critical-path minimization, and value-based correctness checking. On a recently acquired multi-core, multi-processor PC, the BOP system reduced the end-to-end execution time by integer factors for a Lisp interpreter, a data compressor, a language parser, and a scientific library, with no change to the underlying hardware or operating system.
An Overlay Simulator for Interdependent Critical Information Infrastructures
Authors: Sandrine Duflos, Alpha A. Diallo, Gwendal Le Grand
Venue: Proceedings of the 2nd International Conference on Dependability of Computer Systems (2007)

Modeling and simulation of heterogeneous interconnected critical infrastructures and of their (inter)dependencies is essential to get a clear understanding of their behavior. Current solutions are generally dedicated to one sector and do not provide means for information exchange with other simulators. This paper tries to fill this gap by introducing a simulation environment overlaying existing simulators. The simulation environment we propose reuses existing simulators within various sectors (instead of defining a completely new environment) and coordinates the execution of simulators with timing constraints so as to represent the interconnected system in a simple and efficient way. We present the architecture of the simulation environment and the results obtained with a first version of its implementation. The results exhibit dependencies between the electrical and the GPRS networks.