ppxscal/embedding_network huggingface dataset:
On Optimal Design of Treasury Bonds
Authors: Rosella Giacometti
Venue: Computational Economics (1999)

In this paper we develop a methodology for the study and the optimal design of the Italian medium, long-term Treasury securities. The aim is the determination of the optimal characteristics (coupon, maturity, etc.) of their future issues. Interest rate risk is examined in a way consistent with the issuer&lsquo;s perspective. When it is impossible to apply some form of duration matching to manage the net asset and the liability portfolio, the minimisation of the cost of the debt and the stability of the debt service payments could be considered as the objectives of the debt issuer. A new model is proposed for the optimal issue of interest rate sensitive securities. The model is formulated as a bilevel optimisation problem in which the issuer minimises his loss function and the investor maximises the expected utility of his portfolio.
Locality-preserving load-balancing mechanisms for synchronous simulations on shared-memory multiprocessors
Authors: Voon-Yee Vee, Wen-Jing Hsu
Venue: Proceedings of the fourteenth workshop on Parallel and distributed simulation (2000)

Many synchronous algorithms have been proposed for parralel and discrete simulations. However, the actual performance of these algorithms have been far from ideal, especially when event granularity is small. Barring the case of low parallelism in the given simulation models, one of the main reasons of low speedups is in the uneven load distribution among processors. We present several new locality-preserving load balancing mechanisms for synchronous simulations on shared-memory multiprocessors. We show both theoretically and empirically that some of these mechanisms incur very low overhead. The results confirm that one of the new mechanisms is indeed more efficient and scalable than common existing approaches.
Fault-Containment in Cache Memories for TMR Redundant Processor Systems
Authors: Chung-Ho Chen, Arun K. Somani
Venue: IEEE Transactions on Computers (1999)

Cache data errors read by a processor may cause CPU control flow error and force the system to enter a CPU-cache reintegration process in redundant processor systems. The reintegration process degrades the system performance and reliability. To reduce the occurrences of such an event, we propose a real-time error recovery scheme that provides effective fault-containment for data errors in cache memories. The scheme is based on cache data broadcasting of a dirty line after modification. It effectively exploits the redundancy of a fault-tolerant system using hardware voting. The scheme recovers from erroneous cache data written by a processor with full coverage. This error recovery feature remedies the insufficiency of error-correcting codes that are unable to prevent such an error. In addition, more than 60 percent of cache lines are fully covered for recovery due to errors originated from the cache itself, including unrecoverable ECC errors. The protocol can also be used to speedup the CPU-cache reintegration process for a temporarily failed processor. The performance overhead of the protocol is to broadcast only 2-3 percent of the total memory references.
Re-engineering structures from Web documents
Authors: Chuang-Hue Moh, Ee-Peng Lim, Wee-Keong Ng
Venue: Proceedings of the fifth ACM conference on Digital libraries (2000)

To realize a wide range of applications (including digital libraries) on the Web, a more structured way of accessing the Web is required and such requirement can be facilitated by the use of XML standard. In this paper, we propose a general framework for reverse engineering (or re-engineering) the underlying structures i.e.,the DTD from a collection of similarly structured XML documents when they share some common but unknown DTDs. The essential data structures and algorithms for the DTD generation have been delveloped and experiments on real Web collections have been conducted to demonstrate their feasibilty. In addition, we also proposed a method ofimposing a constraint on the repetitiveness on the element in a DTD rule to further simplify the generated DTD without compromising their correctness.
The scent of a site: a system for analyzing and predicting information scent, usage, and usability of a Web site
Authors: Ed H. Chi, Peter Pirolli, James Pitkow
Venue: Proceedings of the SIGCHI conference on Human factors in computing systems (2000)

Designers and researchers of users' interactions with the World Wide Web need tools that permit the rapid exploration of hypotheses about complex interactions of user goals, user behaviors, and Web site designs. We present an architecture and system for the analysis and prediction of user behavior and Web site usability. The system integrates research on human information foraging theory, a reference model of information visualization and Web data-mining techniques. The system also incorporates new methods of Web site visualization (Dome Tree, Usage Based Layouts), a new predictive modeling technique for Web site use (Web User Flow by Information Scent, WUFIS), and new Web usability metrics.
Resource view theory analysis of SAP as a source of competitive advantage for firms
Authors: Rex Eugene Pereira
Venue: ACM SIGMIS Database (1999)

This paper uses resource view theory to determine the means by which SAP technology could provide a sustainable competitive advantage to firms which have successfully implemented the SAP system. Resource view theory suggests that resources which are durable, not easily replicable, and imperfectly mobile can be effectively leveraged by the firm in order to achieve a sustainable competitive advantage over its competitors.The analysis which is presented in this paper suggests that the effective implementation of the SAP system by a firm requires not only an acquisition of a high level of technical expertise, but a change in organizational culture from one which rewards individual brilliance to one which encourages project teams. This will create an environment in which the success of any individual in his job is critically dependent on the skills possessed by the other team members. This will render the human component of the SAP resource imperfectly mobile and increase the capability of the firm to leverage this resource in order to achieve a sustainable competitive advantage.A second prescription which emerges from the analysis is that it is preferable to modify the business processes of the organization to fit the capabilities provided by the SAP system, rather than modify the SAP system to fit the reengineered business processes of the organization.
Who is interested in algorithms and why?: lessons from the Stony Brook algorithms repository
Authors: Steven S. Skiena
Venue: ACM SIGACT News (1999)

We present "market research" for the field of combinatorial algorithms and algorithm engineering, attempting to determine which algorithmic problems are most in demand in applications. We analyze 1,503,135 WWW hits recorded on the Stony Brook Algorithms Repository (http://www.cs.sunysb.edu/~algorith), to determine the relative level of interest among 75 algorithmic problems and the extent to which publicly available algorithm implementations satisfy this demand.
Contour Matching Using Epipolar Geometry
Authors: Joon Hee Han, Jong Seung Park
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (2000)

Matching features computed in images is an important process in multiview image analysis. When the motion between two images is large, the matching problem becomes very difficult. In this paper, we propose a contour matching algorithm based on geometric constraints. With the assumption that the contours are obtained from images taken from a moving camera with static scenes, we apply the epipolar constraint between two sets of contours and compute the corresponding points on the contours. From the initial epipolar constraints obtained from corner point matching, candidate contours are selected according to the epipolar geometry, contour end point constraints, and contour distance measures. In order to reduce the possibility of false matches, the number of match points on a contour is also used as a selection measure. The initial epipolar constraint is refined from the matched sets of contours. The algorithm can be applied to a pair or two pairs of images. All of the processes are fully automatic and successfully implemented and tested with various real images.
New Lower Bounds for Convex Hull Problems in Odd Dimensions
Authors: Jeff Erickson
Venue: SIAM Journal on Computing (1999)

We show that in the worst case, $\Omega(n^{\ceil{d/2}-1} + n\log n)$ sidedness queries are required to determine whether the convex hull of n points in $\Real^d$ is simplicial or to determine the number of convex hull facets. This lower bound matches known upper bounds in any odd dimension. Our result follows from a straightforward adversary argument. A key step in the proof is the construction of a quasi-simplicial n-vertex polytope with $\Omega(n^{\ceil{d/2}-1})$ degenerate facets. While it has been known for several years that d-dimensional convex hulls can have $\Omega(n^{\floor{d/2}})$ facets, the previously best lower bound for these problems is only $\Omega(n\log n)$. Using similar techniques, we also obtain simple and correct proofs of Erickson and Seidel's lower bounds for detecting affine degeneracies in arbitrary dimensions and circular degeneracies in the plane. As a related result, we show that detecting simplicial convex hulls in $\Real^d$ is $\ceil{d/2}$\SUM-hard in the sense of Gajentaan and Overmars.
Should we leverage natural-language knowledge? An analysis of user errors in a natural-language-style programming language
Authors: Amy Bruckman, Elizabeth Edwards
Venue: Proceedings of the SIGCHI conference on Human factors in computing systems: the CHI is the limit (1999)

Should programming languages use natural-language-like syntax? Under what circumstances? What sorts of errors do novice programmers make? Does using a natural- language-like programming language lead to user errors? In this study, we read the entire online interactions of sixteen children who issued a total of 35,047 commands on MOOSE Crossing, an educational MUD for children, We counted and categorized the errors made. A total d 2,970 errors were observed. We define natural-language errors as those errors in which the user failed to distinguish between English and code, issuing an incorrect command that was more English-like than the correct one. A total of 314 natural-language errors were observed. In most of those errors, the child was able to correct the problem either easily (41.1% of the time) or with some effort (20.7%). Natural-language errors were divided into five categories. In order from most to least frequent, they are: syntax errors, guessing a command name by supplying an arbitrary English word, literal interpretation of metaphor, assuming the system is keeping more state information than is actually the case, and errors of operator precedence and combination. We believe that these error rates are within acceptable limits, and conclude that leveraging users natural-language knowledge is for many applications an effective strategy for designing end-user-programming languages.
Determination of msd(Ln)
Authors: M. Van De Vel
Venue: Journal of Algebraic Combinatorics: An International Journal (1999)

The median stabilization degree (msd, for short) of a median algebra measures the largest possible number of steps needed to generate a subalgebra with an arbitrary set of generators. With computer assistance, we found that msd of the lattice &lcub;&minus; 1, 0, 1 &rcub;4 equals 2. This value is of critical importance to determine msd of &lcub;&minus; 1, 0, 1&rcub;n for all n &ge; 5 and to determine msd of the free median algebra &lambda;(r) for almost all r &ge; 5.
Low Power Down-Conversion RF Mixers Based on the Gilbert Cell Approach
Authors: A. Vauhkonen, K. J. Grahn
Venue: Analog Integrated Circuits and Signal Processing (1999)

Three down-conversion mixers for low-voltage, balanced 900 MHz wireless applications are introduced. The mixers are implemented in a 0.8 &mu;m BiCMOS process and based on the four transistor BJT switching quad widely used in Gilbert cells. The mixers are designed to operate at a supply voltage of 1.5 V and without external components. The implemented mixers have a few decibels of conversion loss, a third-order input intercept point of a few dBm and a single sideband noise figure of about 15 dB. It is demonstrated that modest mixer operation performance is achieved with a DC power consumption of only 1 mW. Also planar inductors on silicon and bond-wire inductors are shown to be valuable to achieve a return loss of about 9 dB for input and output ports of a mixer. The measurement results for the mixers as well as the lumped element models for the used planar inductor and for the bondwire are presented.
Measuring usability: are effectiveness, efficiency, and satisfaction really correlated?
Authors: Erik Frøkjær, Morten Hertzum, Kasper Hornbæk
Venue: Proceedings of the SIGCHI conference on Human factors in computing systems (2000)

Usability comprises the aspects effectiveness, efficiency, and satisfaction. The correlations between these aspects are not well understood for complex tasks. We present data from an experiment where 87 subjects solved 20 information retrieval tasks concerning programming problems. The correlation between efficiency, as indicated by task completion time, and effectiveness, as indicated by quality of solution, was negligible. Generally, the correlations among the usability aspects depend in a complex way on the application domain, the user's experience, and the use context. Going through three years of CHI Proceedings, we find that 11 out of 19 experimental studies involving complex tasks account for only one or two aspects of usability. When these studies make claims concerning overall usability, they rely on risky assumptions about correlations between usability aspects. Unless domain specific studies suggest otherwise, effectiveness, efficiency, and satisfaction should be considered independent aspect of usability and all be included in usability testing.
Domain Deformation Mapping: Application to Variational Mesh Generation
Authors: Valmor F. de Almeida
Venue: SIAM Journal on Scientific Computing (1999)

The purposes of this article are, first, to expose the mathematical similarities between variational mesh generation and hyperelasticity theory and, second, to show how elements and tools of hyperelasticity theory can be employed for analysis and practical construction of domain deformation mappings utilized in variational mesh generation.
A Current-Mode Logic for Low-Voltage, High-Speed Mixed-Mode VLSI Circuits
Authors: İ. ENS Ungan, Murat Aşkar
Venue: Analog Integrated Circuits and Signal Processing (1999)

A wired-AND current-mode logic (WCML) circuit is designed for high performance mixed analog and digital system designs on a common silicon substrate, using standard CMOS process. Current is used for digital information carrier in order to be able to reduce supply voltage, power consumption, digital switching noise and to increase operating frequency. The WCML circuit uses current-steering technique. It is composed of a simple current mirror with a current injector. Wired-AND connections cause the logic circuit to operate as a NAND logic gate which provides to implement any boolean function. High-speed is achieved by varying the injection current level even at low-voltage supply (<1.5 V) with low-power consumption.
Edge-Connectivity Augmentation Preserving Simplicity
Venue: SIAM Journal on Discrete Mathematics (1998)

Given a simple graph G=(V,E), our goal is to find a smallest set F of new edges such that G=(V,E\cup F) is k-edge-connected and simple. Recently this problem was shown to be NP-complete. In this paper we prove that if OPT_P^k$ is high enough---depending on k only---then OPT _S^k= OPT_P^k$ holds, where OPT_S^k$ (OPT_P^k$) is the size of an optimal solution of the augmentation problem with (without) the simplicity-preserving requirement, respectively. Furthermore, OPT_S^k- OPT _P^k\leq g(k) holds for a certain (quadratic) function of k. Based on these facts an algorithm is given which computes an optimal solution in time O(n4) for any fixed k. Some of these results are extended to the case of nonuniform demands as well.
Linear Algebra Methods in a Mixed Approximation of Magnetostatic Problems
Authors: I. Perugia, V. Simoncini, M. Arioli
Venue: SIAM Journal on Scientific Computing (1999)

In the solution of magnetostatic problems the use of a mixed formulation based on both the magnetic and magnetic displacement fields is particularly appropriate as it allows us to impose the physical conditions exactly and to maintain the continuity properties of the two fields, together with an efficient treatment of boundary conditions. The discretization by means of a proper finite element method yields a strongly structured algebraic linear system. This paper is concerned with the solution of this large, very sparse indefinite linear system. In particular, we present the implementation of some known direct and preconditioned iterative methods and discuss their performance on two-dimensional (2-D) and three-dimensional (3-D) specific models. We show that the 2-D system can be efficiently handled by appropriate variants of these schemes, while preliminary tests on the 3-D system give some insight in the understanding of the analysis that needs to be done.
The University in the inner city
Authors: Roger Boyle, Ann Roberts
Venue: ACM SIGCSE Bulletin (1999)

The traditional university often has a world class reputation for teaching and research. Equally often it is centrally sited in established cities through which the winds of economic change have blown viciously, leaving ivory towers surrounded by neighbourhoods of underprivileged communities. Within these communities, junior and high schools do their best to battle against under-motivation and lack of expectation in the literal shadow of elaborately resourced institutions populated by secure and highly educated staff, teaching students from more affluent backgrounds who look forward on graduation to similar levels of security in employment.For modest investment, we demonstrate that it is possible to bridge the gap between these two communities. An exercise which commenced as a tightly funded service to a small number of inner-city schools has grown to serve a larger number. Of more interest, it has demonstrated the potential to be of direct benefit to a range of students of the university in a way that could not otherwise be provided.
Tuning Compiler Optimizations for Simultaneous Multithreading
Authors: Jack L. Lo, Susan J. Eggers, Henry M. Levy, Sujay S. Parekh, Dean M. Tullsen
Venue: International Journal of Parallel Programming (1999)

Simultaneous Multithreading (SMT) is a processor architectural technique that promises to significantly improve the utilization and performance of modern wide-issue superscalar processors. An SM T processor is capable of issuing multiple instructions from multiple threads to a processor's functional units each cycle. Unlike shared-memory multiprocessors, SMT provides and benefits from fine-grained sharing of processor and memory system resources; unlike current uniprocessors, SMT exposes and benefits from inter-thread instruction-level parallelism when hiding long-latency operations. Compiler optimizations are often driven by specific assumptions about the underlying architecture and implementation of the target machine, particularly for parallel processors. For example, when targeting shared-memory multiprocessors, parallel programs are compiled to minimize sharing, in order to decrease high-cost inter-processor communication. Therefore, optimizations that are appropriate for these conventional machines may be inappropriate for SMT, which can benefit from finegrained resource sharing within the processor. This paper reexamines several compiler optimizations in the context of simultaneous multithreading. We revisit three optimizations in this light: loop-iteration scheduling, software speculative execution, and loop tiling. Our results show that all three optimizations should be applied differently in the context of SMT architectures: threads should be parallelized with a cyclic, rather than a blocked algorithm; non-loop programs should not be software speculated, and compilers no longer need to be concerned about precisely sizing tiles to match cache sizes. By following these new guidelines, compilers can generate code that improves the performance of programs executing on SMT machines.
Specification and verification of fault-tolerance, timing, and scheduling
Authors: Zhiming Liu, Mathai Joseph
Venue: ACM Transactions on Programming Languages and Systems (TOPLAS) (1999)

Fault-tolerance and timing have often been considered to be implementation issues of a program, quite distinct from the functional safety and liveness properties. Recent work has shown how these non-functional and functional properties can be verified in a similar way. However, the more practical question of determining whether a real-time program will meet its deadlines, i.e., showing that there is a feasible schedule, is usually done using scheduling theory, quite separately from the verification of other properties of the program. This makes it hard to use the results of scheduling analysis in the design, or redesign, of fault-tolerant and real-time programs. This article shows how fault-tolerance, timing, and schedulability can be specified and verified using a single notation and model. This allows a unified view to be taken of the functional and nonfunctional properties of programs and a simple transformational method to be usedto combine these properties. It also permits results from scheduling theory to be interpreted and used within a formal proof framework. The notation and model are illustrated using a simple example.
Secure Concurrency Control in Firm Real-Time Database Systems
Authors: Binto George, Jayant R. Haritsa
Venue: Distributed and Parallel Databases (2000)

Many real-time database applications arise in electronic financial services, safety-critical installations and military systems where enforcing security is crucial to the success of the enterprise. For real-time database systems supporting applications with firm deadlines, we investigate here the performance implications, in terms of killed transactions, of guaranteeing multilevel secrecy. In particular, we focus on the concurrency control (CC) aspects of this issue.Our main contributions are the following: First, we identify which among the previously proposed real-time CC protocols are capable of providing covert-channel-free security. Second, using a detailed simulation model, we profile the real-time performance of a representative set of these secure CC protocols for a variety of security-classified workloads and system configurations. Our experiments show that a prioritized optimistic CC protocol, OPT-WAIT, provides the best overall performance. Third, we propose and evaluate a novel &ldquo;dual-CC&rdquo; approach that allows the real-time database system to simultaneously use different CC mechanisms for guaranteeing security and for improving real-time performance. By appropriately choosing these different mechanisms, concurrency control protocols that provide even better performance than OPT-WAIT are designed. Finally, we propose and evaluate GUARD, an adaptive admission-control policy designed to provide fairness with respect to the distribution of killed transactions across security levels. Our experiments show that GUARD efficiently provides close to ideal fairness for real-time applications that can tolerate covert channel bandwidths of upto one bit per second.