ppxscal/embedding_network huggingface dataset:
A Strategy for Mixed-Signal Yield Improvement
Authors: Jim Bordelon, Ben Tranchina, Vipin Madangarli, Mark Craig
Venue: IEEE Design Test (2002)

Mixed-signal systems offer advantages over multichip systems but are more difficult and complex. A comprehensive design-testing plan could increase the viability of SoCs.
Fault-Secure Parity Prediction Booth Multipliers
Authors: Michael Nicolaidis, Ricardo O. Duarte
Venue: IEEE Design Test (1999)

Parity-prediction arithmetic operator schemes are compatible with data paths and memory systems checked by parity codes. The drawback of these schemes is that they may not be fault secure for single faults, since they propagate to multiple output errors undetectable by the parity code. In a recent work we proposed a theory for achieving fault-secure design for parity-prediction multipliers and dividers. We did not consider the case of Booth multipliers using operand recoding. Since Booth multipliers are among the most popular, in this article we derive the parity-prediction logic for Booth multipliers and propose a fault-secure implementation for this scheme. Due to the particular structure of these multipliers, parity prediction is not as straightforward as in multipliers with non-recoded operands. Also, fault-secure design requires a specific solution to cope with even-cell fan-out signals.
Compiling Java Just in Time
Authors: Timothy Cramer, Richard Friedman, Terrence Miller, David Seberger, Robert Wilson, Mario Wolczko
Venue: IEEE Micro (1997)

Early implementations of the Java(TM) programming language relied on byte code interpretation, leading to poor performance compared to compiled programs. More recent implementations have used just-in-time (JIT) compilation techniques to address some of these performance challenges. This article describes JIT compilation in general and specifically the techniques used in the Sun Java JIT compilers. We conclude by outlining some future directions for Java implementations.
Combining Multiple Knowledge Bases
Authors: C. Baral, S. Kraus, J. Minker
Venue: IEEE Transactions on Knowledge and Data Engineering (1991)

Combining knowledge present in multiple knowledge base systems into a single knowledge base is discussed. A knowledge based system can be considered an extension of a deductive database in that it permits function symbols as part of the theory. Alternative knowledge bases that deal with the same subject matter are considered. The authors define the concept of combining knowledge present in a set of knowledge bases and present algorithms to maximally combine them so that the combination is consistent with respect to the integrity constraints associated with the knowledge bases. For this, the authors define the concept of maximality and prove that the algorithms presented combine the knowledge bases to generate a maximal theory. The authors also discuss the relationships between combining multiple knowledge bases and the view update problem.
Laptops in the classroom
Authors: Andrea Beth Campbell, Roy P. Pargas
Venue: Proceedings of the 34th SIGCSE technical symposium on Computer science education (2003)

This paper focuses on a rapidly growing population on many college and university campuses today: students equipped with laptop computers capable of wireless connection to the Internet. More and more departments are requiring that students enrolling in certain courses bring laptop computers to class. The course instructor is sometimes overwhelmed by the prospect, asking "How should I change my lesson plan in order to integrate the laptop in my daily lecture?" This paper first describes the effort to bring the laptop to campus at a number of colleges and universities around the country. It then offers concrete suggestions based on the experiences of several professors who either have taught, or are now teaching, laptop-required courses. The paper concludes with a summary and a look toward the future.
An Extended Petri Net Model for Normal Logic Programs
Authors: Teruhiro Shimura, Jorge Lobo, Tadao Murata
Venue: IEEE Transactions on Knowledge and Data Engineering (1995)

This paper presents an application of the concepts of siphons (deadlocks) and inhibitor arcs in Petri net theory to logic programs with negations. More specifically, an extended Petri net is used to model function-free normal logic programs. In this model, because of the presence of inhibitor arcs, the arbitrary applications of firing rule may cause a contradictory situation. We suggest two directions to avoid contradictions: greedy and secure applications of firing rule. We choose the secure application in this paper and show that this is a direct translation of the well-founded semantics in the net model. Furthermore, we show that the greatest unfounded set corresponds to the greatest siphon in Petri net theory when we delete the transitions disabled by the secure application of firing rule, and that the property of siphon simplifies the computation of well-founded semantics for logic programs. We also propose the reduced-Petri-net method by which we can reduce an extended Petri net to a Petri net without inhibitor arcs and compute the well-founded model by iterative applications of this transformation using conventional application of firing rule.
Computational Arrays with Flexible Redundancy
Authors: J. Ramirez, R. Melhem
Venue: IEEE Transactions on Computers (1994)

Different multiple redundancy schemes for fault detection and correction in computational arrays are proposed and analyzed. The basic idea is to embed a logical array of nodes onto a processor/switch array such that d processors, 1/spl les/d/spl les/4, are dedicated to the computation associated with each node. The input to a node is directed to the d processors constituting that node, and the output of the node is computed by taking a majority vote among the outputs of the d processors. The proposed processor/switch array (PSVA) is versatile in the sense that it may be configured as a nonredundant system or as a system which supports double, triple or quadruple redundancy. It also allows for spares to be distributed in the PSVA in a way that permits spare sharing among nodes, thus enhancing the overall system reliability. In addition to choosing the required degree of redundancy, the flexibility of the PSVA architecture allows for the embedding of redundant arrays onto defective PSVA's and for run-time reconfiguration to avoid faulty processors and switches. Different embedding and reconfiguration algorithms are presented and analyzed using Markov chain techniques, using probability arguments, and via simulation.
AFAN: Tool for Optimizing Fuzzy Controllers
Authors: R. González, A. Torralba, L. g. Franquelo
Venue: IEEE Micro (1997)

This paper presents a tool for hardware synthesis of neural and fuzzy systems. The proposed tool, called AFAN, pays special attention to the architecture of the controller. AFAN deals with different kinds of hardware parallelism and with the interconnection between the internal blocks. A set of fully worked examples are provided in order to show the solutions provided by AFAN with different specifications.
Gossiping in a Distributed Network
Authors: A. Bagchi, S. L. Hakimi, E. F. Schmeichel
Venue: IEEE Transactions on Computers (1993)

Consider a network in which each unit initially knows only its own identity and the identity of its immediate neighbors. Suppose each unit has a message intended for all other units. The authors give a distributed algorithm to accomplish this in point-to-point networks which is optimal in the number of transmissions it requires. They also show that this algorithm accomplishes this efficiently for broadcast (radio) networks, although the problem of finding a solution with the least number of transmissions, in broadcast networks, is shown to be NP-hard.
Temperature effect of magneto-photoluminescence in InGaAs/InAlAs quantum wells: application of band theory to nonparabolic conduction subband
Authors: N. Kotera, E. D. Jones, T. Sakai, T. Kawano, K. Shibata, Y. Mishima
Venue: Microelectronic Engineering (2002)

Interband magneto-photoluminescence (MPL) spectra in n-type InGaAs/InAlAs quantum wells (QWs) lattice-matched to InP were measured between 1.4 and 275 K. From a fan chart of MPL peak energy vs. magnetic field, assignment of Landau levels (LLs) associated with conduction subband (CS) was made consistently. Two series of LL peak energies with different Landau quantum number was subtracted to cancel the effects of complex valence subband states and bandgap renormalization, etc. The energy difference of two CS LL peak series in the MPL fan chart, between Landau quantum number 0 and 1, did not agree with the measured cyclotron resonance (CR) energy or the related theoretical CS LL energy difference. The difference was 6-10 meV at 1.4 K near 10 T. Temperature dependence of the difference of CS LL peak energies was studied and the difference tended to diminish at 175-275 K. The behavior suggested that the quantity was the difference of magneto-exciton binding energy and that the exciton states were merged into LLs at higher temperature. A band parameter, Ep, in nonparabolic band theory was discussed.
Adaptive Unanimous Voting (UV) Scheme for Distributed Self-Diagnosis
Authors: Hee Yong Youn, Jae Young Lee, Adit D. Singh
Venue: IEEE Transactions on Computers (1995)

Distributed self-diagnosis approach proposed for multiprocessor systems is also effective for integrated circuit wafers containing a number of identical circuits. Here the testing of each node is based on the majority voting on the test results from itself and neighboring nodes. In this paper, we identify that the unanimous voting (UV) approach always outperforms the individual voting (UV) approach, irrespective of the number of voting cells and fault rate. Based on the UV approach, the optimal number of tests is obtained. We also introduce an adaptive voting scheme by which the test overhead of the traditional voting schemes can be significantly reduced.
A Long-Term View of Short-Range Wireless
Authors: David G. Leeper
Venue: Computer (2001)

Economic forces and physical laws are driving the growth of a new wireless infrastructure that will become as ubiquitous as lighting and power infrastructures are today. Many expect that the next-generation cellular systems built upon this foundation will bring fast, nearly ubiquitous, wireless data connections to users. At the heart of this new infrastructure lies short-range wireless, a complementary class of emerging technologies meant primarily for indoor use over very short distances. SRW links will offer peak speeds of tens or even hundreds of megabits per second-- at very low cost and with very low power--to many closely spaced users. In its base set of applications, SRW technologies will provide cableless connections among the portable devices people wear and carry daily, including cell phones, headsets, PDAs, laptop computers, digital cameras, audio and video players, and health monitoring devices. Given that SRW links will be unlicensed, and that owners of individual premises rather than government authorities will grant installation permissions, SRW business models may differ radically from those of traditional telecom carriers. Some carriers may see SRW as a threat and actively oppose it, while others may see it as a powerful complement to their current technologies.
Multiprocessor SoC Platforms: A Component-Based Design Approach
Authors: Wander O.Cesário, Damien Lyonnard, Gabriela Nicolescu, Yanick Paviot, Sungjoo Yoo, Ahmed A.Jerraya, Lovic Gauthier, Mario Diaz-Nava
Venue: IEEE Design Test (2002)

A high-level, component-based methodology and design environment for multiprocessor SoC architectures reduces design time without significant efficiency loss in the final circuit. This design environment provides tools for automatic wrapper generation that synthesize hardware interfaces, device drivers, and operating systems implementing high-level interconnect APIs.
Simulation of inclusion trail patterns within rotating synkinematic porphyroblasts
Authors: Susanta Kumar Samanta, Nibir Mandal, Chandan Chakraborty, Koushik Majumder
Venue: Computers Geosciences (2002)

The paper presents two-dimensional numerical simulations of inclusion trail patterns of spherical and non-spherical synkinematic porphyroblasts rotating and growing over a pre-existing, passive foliation during a single progressive deformation taking into account the effects of heterogeneous strain field around the rigid porphyroblast. The analysis is based on the velocity functions around a rigid object hosted in a Newtonian viscous medium. Using Visual Basic software, the trail patterns have been simulated in a PC assuming that the porphyroblast grows by increments of constant radius, over a pre-existing foliation, which simultaneously gets distorted due to heterogeneous strain field around the porphyroblast and included within the porphyroblast. The numerical simulations show that the trail patterns in spherical porphyroblasts are controlled by two factors: (1) the initial orientation of the foliation marker relative to the shear direction (θ) and (2) the ratio of pure shear and simple shear rates in the bulk deformation (Sr). Complex trail structures form when θ < 0° and Sr≤0.75. The ratio of growth rates along axial directions of non-spherical porphyroblasts is an additional factor that controls the trail patterns.
Profile likelihood in directed graphical models from BUGS output
Authors: Malene Højbjerre
Venue: Statistics and Computing (2003)

We present a method for using posterior samples produced by the computer program BUGS (Bayesian inference Using Gibbs Sampling) to obtain approximate profile likelihood functions of parameters or functions of parameters in directed graphical models with incomplete data. The method can also be used to approximate integrated likelihood functions. It is easily implemented and it performs a good approximation. The profile likelihood represents an aspect of the parameter uncertainty which does not depend on the specification of prior distributions, and it can be used as a worthwhile supplement to BUGS that enable us to do both Bayesian and likelihood based analyses in directed graphical models.
A Processor-Time-Minimal Systolic Array for Transitive Closure
Authors: C. J. Scheiman, P. R. Cappello
Venue: IEEE Transactions on Parallel and Distributed Systems (1992)

Using a directed acyclic graph (DAG) model of algorithms, the authors focus on processor-time-minimal multiprocessor schedules: time-minimal multiprocessor schedules that use as few processors as possible. The Kung, Lo, and Lewis (KLL) algorithm for computing the transitive closure of a relation over a set of n elements requires at least 5n-4 parallel steps. As originally reported, their systolic array comprises n/sup 2/ processing elements. It is shown that any time-minimal multiprocessor schedule of the KLL algorithm's dag needs at least n/sup 2//3 processing elements. Then a processor-time-minimal systolic array realizing the KLL dag is constructed. Its processing elements are organized as a cylindrically connected 2-D mesh, when n=0 mod 3. When n not=0 mod 3, the 2-D mesh is connected as a torus.
Role of quantization effects in the operation of ultrasmall MOSFETs and SOI device structures
Authors: Dragica Vasileska, Richard Akis, Irena Knezevic, Srdan N. Milici&#x0107;, Shaikh S. Ahmed, David K. Ferry
Venue: Microelectronic Engineering (2002)

The continued scaling of devices towards the ultimate limit of 50-nm MOSFET by the year 2007 necessitates the use of higher substrate doping densities in both conventional devices and in the alternative device technologies. The higher substrate doping density, on the other hand, gives rise to pronounced space quantization effects that must be taken into account when modeling these novel device structures. One way to include space quantization is via solution of the Schrödinger equation coupled to conventional drift-diffusion, hydrodynamic or Monte Carlo particle-based simulators. An alternative way is to use the recently proposed effective potential approach. In this work, we apply the effective potential approach when modeling a conventional 50-nm MOSFET device and an SOI device structure. For the SOI device we also utilize the Landauer's approach to calculate the current and estimate the device threshold voltage increase due to the lateral quantization.
Modeling Edges at Subpixel Accuracy Using the Local Energy Approach
Authors: M. Kisworo, S. Venkatesh, G. West
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1994)

In this paper we describe a new technique for ID and 2D edge feature extraction to subpixel accuracy using edge models and the local energy approach. A candidate edge is modeled as one of a number of parametric edge models, and the fit is refined by a least-squared error fitting technique.
CFI leads development of design data standard
Authors: J. Wilson
Venue: IEEE Design Test (1997)

[When a copy of CFI's The Initiative arrived, I was surprised. I'd just read an article implying that the CAD Framework Initiative no longer existed. After a little research, it became clear that the group was not only alive, but also had several projects of interest to Design & Test readers. For a closer look, I talked with Mitch Heins, CFI's marketing director, and Don Cottrell, vice president, technology.¿Ed.] The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
A Workstation Approach to IC Process and Device Design
Authors: Duane S. Boning, Dimitri A. Antoniadis
Venue: IEEE Design Test (1988)

IC designers are turning more and more to CAD tools to develop complex designs and to automate time-consuming tasks. Although there are a variety of integrated tools for many types of VLSI design, very few integrated systems have been built to address process and device design. Recognizing this need, researchers at MIT set out to define the requirements of a process and device design environment, implement a subset of these functions, and integrate the tools into a user-friendly design environment. As part of their work on creating a user-friendly environment, they developed the MASTIF workstation to provide graphic, window-oriented user interaction to process and device designers.
A Maximum Variance Cluster Algorithm
Authors: Cor J. Veenman, Marcel J. T. Reinders, Eric Backer
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (2002)

We present a partitional cluster algorithm that minimizes the sum-of-squared-error criterion while imposing a hard constraint on the cluster variance. Conceptually, hypothesized clusters act in parallel and cooperate with their neighboring clusters in order to minimize the criterion and to satisfy the variance constraint. In order to enable the demarcation of the cluster neighborhood without crucial parameters, we introduce the notion of foreign cluster samples. Finally, we demonstrate a new method for cluster tendency assessment based on varying the variance constraint parameter
All-To-All Communication with Minimum Start-Up Costs in 2D/3D Tori and Meshes
Authors: Young-Joo Suh, Sudhakar Yalamanchili
Venue: IEEE Transactions on Parallel and Distributed Systems (1998)

All-to-all communication patterns occur in many important parallel algorithms. This paper presents new algorithms for all-to-all communication patterns (all-to-all broadcast and all-to-all personalized exchange) for wormhole switched 2D/3D torus- and mesh-connected multiprocessors. The algorithms use message combining to minimize message start-ups at the expense of larger message sizes. The unique feature of these algorithms is that they are the first algorithms that we know of that operate in a bottom-up fashion rather than a recursive, top-down manner. For a 2d× 2d torus or mesh, the algorithms for all-to-all personalized exchange have time complexity of O(23d). An important property of the algorithms is the O(d) time due to message start-ups, compared with O(2d) for current algorithms [15], [18]. This is particularly important for modern parallel architectures where the start-up cost of message transmissions still dominates, except for very large block sizes. Finally, the 2D algorithms for all-to-all personalized exchange are extended to O(24d) algorithms in a 2d× 2d× 2d 3D torus or mesh. These algorithms also retain the important property of O(d) time due to message start-ups.
A Plea for Lean Software
Authors: Niklaus Wirth
Venue: Computer (1995)

Memory requirements of today's workstations typically jump substantially--from several to many megabytes--whenever there's a new software release. When demand surpasses capacity, it's time to buy add-on memory. When the system has no more extensibility, it's time to buy a new, more powerful workstation. Do increased performance and functionality keep pace with the increased demand for resources? Mostly the answer is no. The author contends that software's girth has surpassed its functionality, largely because hardware advances make this possible. He maintains that the way to streamline software lies in disciplined methodologies and a return to the essentials. He explores the reasons behind software's increasing heft and relates the history of Project Oberon as an example of how software should be built. Oberon's primary goal was to show that software can be developed with a fraction of the memory capacity and processor power usually required without sacrificing flexibility, functionality, or user convenience. The Oberon system has been in use since 1989, serving purposes that include document preparation, software development, and computer-aided design of electronic circuits, among many others. The system includes storage management, a file system, a window display manager, a network with servers, a compiler, and text, graphics, and document editors.
Structural and Probabilistic Knowledge for Abductive Reasoning
Authors: R. Bhatnagar, L. N. Kanal
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1993)

Different ways of representing probabilistic relationships among the attributes of a domain ar examined, and it is shown that the nature of domain relationships used in a representation affects the types of reasoning objectives that can be achieved. Two well-known formalisms for representing the probabilistic among attributes of a domain. These are the dependence tree formalism presented by C.K. Chow and C.N. Liu (1968) and the Bayesian networks methodology presented by J. Pearl (1986). An example is used to illustrate the nature of the relationships and the difference in the types of reasoning performed by these two representations. An abductive type of reasoning objective that requires use of the known qualitative relationships of the domain is demonstrated. A suitable way to represent such qualitative relationships along with the probabilistic knowledge is given, and how an explanation for a set of observed events may be constituted is discussed. An algorithm for learning the qualitative relationships from empirical data using an algorithm based on the minimization of conditional entropy is presented.