ppxscal/embedding_network huggingface dataset:
Interfacing Parallel Applications and Parallel Databases
Authors: Vibby Gottemukkala, Anant Jhingran, Sriram Padmanabhan
Venue: Proceedings of the Thirteenth International Conference on Data Engineering (1997)

The use of parallel database systems to deliver high performance has become quite common. Although queries submitted to these database systems are executed in parallel, the interaction between applications and current parallel database systems is serial. As the complexity of the applications and the amount of data they access increases, the need to parallelize applications also increases. In this parallel application environment, a serial interface to the database could become the bottleneck in the performance of the application. Hence, parallel database systems should support interfaces that allow the applications to interact with the database system in parallel. We present a taxonomy of such parallel interfaces, namely the Single Coordinator, Multiple Coordinator, Hybrid Parallel, and Pure Parallel interfaces. Furthermore, we discuss how each of these interfaces can be realized and in the process introduce new constructs that enable the implementation of the interfaces. We also qualitatively evaluate each of the interfaces with respect to their restrictiveness and performance impact.
Failure and Fault Analysis for Software Debugging
Authors: Richard A. DeMillo, Hsin Pan, Eugene H. Spafford
Venue: Proceedings of the 21st International Computer Software and Applications Conference (1997)

Most studies of software failures and faults have done little more than classifying failures and faults collected from long-term projects. In this paper, we propose a model to analyze failures and faults for debugging purpose. In the model, we define "failure modes" and "failure types" to identify the existence of program failures and the nature of the program failures, respectively. The goal of this research is to achieve a systematic process model to localize faults in debugging. We first examine properties of the proposed model from theoretical point of view, then use the "trityp" program as a simple example to illustrate the possible usage of the model for debugging. Further study on the failure mode, a pilot experiment of applying the proposed model, and the way to employ heuristics according to different situations for fault localization are areas of future work.
Performance Analysis of a Graph Model for Channel Assignment in a Cellular Network
Authors: Hakki C. Cankaya, David W. Matula, Mihaela Iridon
Venue: 23rd International Computer Software and Applications Conference (1999)

This paper describes a graphical user interface propelled by a simulation engine for performance analysis of a channel assignment model for high volume cellular networks. It also discusses some experimental results.
An On-Line Handwritten Note Recognition Method Using Shape Metamorphosis
Authors: Ioannis Pavlidis, Rahul Singh, Nikolaos Papanikolopoulos
Venue: Proceedings of the 4th International Conference on Document Analysis and Recognition (1997)

We propose a novel user-dependent method for the recognition of on-line handwritten notes. The method employs as a dissimilarity measure the ``degree of morphing'' between an input curve and a template curve. A physics-based approach substantiates the ``degree of morphing'' as a deformation energy and casts the problem as an energy minimization problem. The method operates upon key segmentation points that are provided by an appropriate segmentation algorithm. The segmentation objective is not to locate letters, but instead to locate corners and some key low curvature points (an easier task). This is part of the method's strategy to see the word as a generic on-line curve. Due to this strategy, the proposed method can handle collectively both, cursive words and hand-drawn line figures, the two key ingredients of handwritten notes. Most importantly, the proposed system achieves high recognition rates without ever resorting to statistical models.
Software measurement in the U.S. Army
Authors: Don Scott Lucero
Venue: Proceedings of the 21st International Computer Software and Applications Conference (1997)

Many means for organizing software measures have been developed over the years. The Army has found that the larger the organization, the higher in the hierarchy the requirement for software measurement needs to be stated. The reason for this stems from the growing diversity of developers in larger organizations. Small organizations that have a well defined process for developing software, or a common set of software development tools, can require that specific data elements be collected, or specific measurements be taken. If larger organizations attempting to impose such specific requirements on developers are likely to meet some resistance, a tight policy does not allow for variation in development processes and development tools. With software development centers building air defense systems in Huntsville, Alabama; command and control systems in Monmouth, New Jersey; logistics systems in Petersburg, Virginia; personnel systems in Fairfax, Virginia; communications systems in Sierra Vista, Arizona; aviation systems in St. Louis, Missouri, armor systems in Picatinny, New Jersey and Detroit Michigan, and engineering systems at various locations throughout the US, the Army must have a policy for software measurement that puts in place flexible reporting requirements, yet provides training and support tailored to the needs of specific programs.
Automatic Partitioning of Data and Computations on Scalable Shared Memory Multiprocessors
Authors: Sudarsan Tandri, Tarek S. Abdelrahman
Venue: Proceedings of the international Conference on Parallel Processing (1997)

This paper describes an algorithm for deriving data and computation partitions on scalable shared memory multiprocessors. The algorithm establishes affinity relationships between where computations are performed and where data is located based on array accesses in the program. The algorithm then uses these affinity relationships to determine both static and dynamic partitions for arrays and parallel loops. Experimental results from a prototype implementation of the algorithm demonstrate that it is computationally efficient and that it improves the parallel performance of standard benchmarks. The results also show the necessity of taking shared memory effects (memory contention, cache locality, false-sharing and synchronization) into account---partitions derived to minimize only interprocessor communications do not necessarily result in the best performance.
The Computational Complexity of High-Dimensional Correlation Search
Authors: Chris Jermaine
Venue: Proceedings of the 2001 IEEE International Conference on Data Mining (2001)

There is a growing awareness that the popular support metric (often used to guide search in market-basket analysis) is not appropriate for use in every association mining application. Support measures only the frequency of co-occurrence of a set of events when determining which pat-terns to report back to the user. It incorporates no rigorous statistical notion of surprise or interest, and many of the patterns deemed interesting by the support metric are uninteresting to the user.However, a positive aspect of support is that search using support is very efficient. The question we address in this paper is: can we retain this efficiency if we move beyond support, and to other, more rigorous metrics? We consider the computational implications of incorporating simple expectation into the data mining task. It turns out that many variations on the problem which incorporate more rigorous tests of dependence (or independence) result in NP-hard problem definitions.
Knowledge, Professionalism and Free Movement of Labor (Visions of the Software Engineering Future)
Authors: J. Barrie Thompson
Venue: 24th International Computer Software and Applications Conference (2000)

Software Engineers bear heavy responsibilities for the software system that the world relies on increasingly. To address these responsibilities effectively and efficiently there must be a professional and educational infrastructure to support the Software Engineering discipline. In addition, the 21st century will see greater moves to globalization and thus Software Engineers should be part of an international labor force that should not suffer unnatural constraints or restrictive practices. Recent developments that should assist in this change are examined and discussed. The efforts that have, or are being undertaken to define a Body of Knowledge for the discipline are reported and aspects relevant to Professional Certification, Licensing, and Professional Practice are considered. Work is also reported that has been undertaken under the auspices of the International Federation for Information Processing (IFIP) that is relevant to the harmonization of professional qualifications and which could lead support to the concept of a global Software Engineering workforce. Finally, a critical evaluation of these developments is given along with suggestions for further improvements.
TRIZ for Software Process Improvement
Authors: Tim Stanbrook
Venue: Proceedings of the 26th International Computer Software and Applications Conference on Prolonging Software Life: Development and Redevelopment (2002)

TRIZ (Theory of Inventive Problem Solving) is a widely used problem solving method, most readily applicable to physical domains. To complement ongoing software process improvement activities, TRIZ and an associated software tool TechOptimizer were used to model the software development process, to assess whether this could provide new approaches on process development. The study concludes that the method and functions provided by the TechOptimizer tool do show promise in the area of SPI with immediate returns identifying process improvement priorities and scope for new approaches to process design. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
Multiscale Moment-Based Painterly Rendering
Authors: Diego Nehab, Luiz Velho
Venue: Proceedings of the 15th Brazilian Symposium on Computer Graphics and Image Processing (2002)

In this paper we present a new method for painterly rendering of images. Our method extends the image-moment stroke placement algorithm in two ways: we employ a multiscale scheme for computing strokes and we provide a parametrized mechanism for controlling stroke distribution. In addition, we present a specialized image abstraction for the algorithm.
A Robust Adaptive Metric for Deadline Assignment in Heterogeneous Distributed Real-Time Systems
Authors: Jan Jonsson
Venue: Proceedings of the 13th International Symposium on Parallel Processing and the 10th Symposium on Parallel and Distributed Processing (1999)

In a real-time system, tasks are constrained by global end-to-end (E-t-E) deadlines. In order to cater for high task schedulability, these deadlines must be distributed over component tasks in an intelligent way. In this paper, we present an improved version of the slicing technique and extend it to heterogeneous distributed hard real-time systems. The salient feature of the new technique is that it utilizes adaptive metrics for assigning local task deadlines.Using experimental results we show that the new technique exhibits superior performance with respect to the success ratio of a heuristic scheduling algorithm. For smaller systems, the new adaptive metric outperforms a previously-proposed adaptive metric by 300%, and existing non-adaptive metrics by more than an order of magnitude. In addition, the new technique is shown to be extremely robust for various system configurations.
Implementation and performance assessment of multilevel data structures
Authors: I-Ling Yen, K. Karun
Venue: Proceedings of the 21st International Computer Software and Applications Conference (1997)

The authors discuss the implementation and performance assessment of a multilevel data structure system prototype. They compare the multilevel data structure approach with corresponding fault-intolerant implementations to assess the overhead imposed for incorporating fault tolerance. The simulation shows promising results in using multilevel data structures.
Design issues for distributed shared-memory systems
Authors: Daniel Lenoski
Venue: Proceedings of the 1996 International Conference on Computer Design, VLSI in Computers and Processors (1996)

Distributed Shared-Memory (DSM) machines combine the ease-of-programming benefits of today's bus-based SMP systems with the scalability of MPP/Cluster message-passing systems. As with these earlier systems, the most important trade-offs in the design of DSM systems involve cost and performance. Creating a DSM system that achieves better cost-performance than both SMP or cluster-based systems requires the careful trade-off of a number of design parameters.
Using Functional Information and Strategy Switching in Sequential ATPG
Authors: Jaehong Park, M. Ray Mercer
Venue: Proceedings of the 1996 International Conference on Computer Design, VLSI in Computers and Processors (1996)

Automatic Test Pattern Generation (ATPG) requires justification of logic values on internal lines of circuits. For sequential circuits, the justification backtraces to primary inputs or flip-flops. Primary input values may be specified arbitrarily. In contrast, the required logic values at flip-flops must be justified backward through multiple time frames, and this often produces logic conflicts which cause backtracks. In this paper, we employ functional analysis of the sequential circuit so as to minimize the number of logic value assignments to flip-flops. We also present strategy switching between two efficient state justification methods. Mutually complementary properties of the two state justification methods turn out to be very effective. These refinements significantly improve ATPG performance for sequential circuits.
Optimal Selection of Supply Voltages and Level Conversions During Data Path Scheduling Under Resource Constraints
Authors: Mark C. Johnson, Kaushik Roy
Venue: Proceedings of the 1996 International Conference on Computer Design, VLSI in Computers and Processors (1996)

In this paper we will consider how to select an optimal set of supply voltages and account for level conversion costs when optimizing the schedule of a resource dominated data path for minimum energy dissipation. An integer linear program (ILP) is presented for minimum energy schedules under latency, supply voltage, and resource constraints. The supply voltage assignment for each resource is modeled as fixed for all time. Schedules were generated for a variety of data path structures, resource and latency constraints. Resource constraints tended to limit the use of reduced supply voltages. With latency constraints loosened to 1.5x minimum latency, unlimited resources, and two power supplies, energy savings ranged from 53% to 70% compared to 5V operation. When resource constraints were applied, savings dropped to a range of 46% to 58%. Loosened latency constraints resulted in increased use of lower supply voltages. With resource constraints unchanged and latency constraints of 2x minimum latency, energy savings increased to a range of 64% to 76%. In no case did three supplies decrease energy by more than 5% compared to two supplies.
Solving the traveling salesman problem with a distributed branch-and-bound algorithm on a 1024 processor network
Authors: Stefan Tschöke, Reinhard Lüling, Burkhard Monien
Venue: Proceedings of the 9th International Symposium on Parallel Processing (1995)

This paper is the first to present a parallelization of a highly efficient best-first branch-and-bound algorithm to solve large symmetric traveling salesman problems on a massively parallel computer containing 1024 processors. The underlying sequential branch-and-bound algorithm is based on 1-tree relaxation. The parallelization of the branch-and-bound algorithm is fully distributed. Every processor performs the same sequential algorithm but on a different part of the solution tree. To distribute subproblems among the processors we use a new direct-neighbor dynamic load-balancing strategy. The general principle can be applied to all other branch-and-bound algorithms leading to an "automatic" parallelization. At present we can efficiently solve traveling salesman problems up to a size of 318 cities on networks of up to 1024 transputers. On hard problems we achieve an almost linear speed-up.
A Memory Controller for Improved Performance of Streamed Computations on Symmetric Multiprocessors
Authors: Sally A. McKee, William A. Wulf
Venue: Proceedings of the 10th International Parallel Processing Symposium (1996)

The growing disparity between processor and memory speeds has caused memory bandwidth to become the performance bottleneck for many applications. In particular, this performance gap severely impacts stream-orientated computations such as (de)compression, encryption, and scientific vector processing. This paper describes the development of an intelligent memory interface that can exploit compiler-provided information on streamed memory access patterns to improve memory bandwidth. Simulation results show that such shared-memory multiprocessor systems can deliver nearly the full attainable bandwidth with relatively modest hardware costs.
Mercury Computer Systems, Inc.: Planned Direct Transfers: A Programming Model for Real-Time Applications
Authors: Gerard Vichniac, Barry Isenstein, Craig Lund, Arlan Pool
Venue: Proceedings of the 10th International Parallel Processing Symposium (1996)

Mercury Computer Systems, Inc. This paper presents the "Planned Direct Transfer" programming model, developed by Mercury Computer Systems to meet the requirements of embedded high-performance computing applications. In this model, data transfers are "Planned" before they occur, resulting in low software overhead execution; they are also "Direct"--they do not require intermediate data copying. This paper locates the Planned Direct Transfer (PDT) model in the landscape of the standard approaches of Shared Memory and Message Passing.
Enhancing Software DSM for Compiler-Parallelized Applications
Authors: Peter J. Keleher, Chau-Wen Tseng
Venue: Proceedings of the 11th International Symposium on Parallel Processing (1997)

Current parallelizing compilers for message-passing machines only support a limited class of data-parallel applications. One method for eliminating this restriction is to combine powerful shared-memory parallelizing compilers with software distributed-shared-memory (DSM) systems. We demonstrate such a system by combining the SUIF parallelizing compiler and the CVM software DSM. Innovations of the system include compiler-directed techniques that: 1) combine synchronization and parallelism information communication on parallel task invocation, 2) employ customized routines for evaluating reduction operations, and 3) select a hybrid update protocol that pre-sends data by flushing updates at barriers.For applications with sufficient granularity of parallelism, these optimizations yield very good eight processor speedups on an IBM SP-2 and DEC Alpha cluster, usually matching or exceeding the speedup of equivalent HPF and message-passing versions of each program. Flushing updates, in particular, eliminates almost all nonlocal memory misses and improves performance by 13% on average.
Software Metrics and Human Factors for WIBIS (WWW Internet Based Information Systems
Authors: Motoei Azuma
Venue: Proceedings of the 1st IEEE International Conference on Cognitive Informatics (2002)

World wide web and Internet Based Information Systems (WIBIS) have been widely used, because of popularization of high performance personal computers, Internet and related communication services supported by such information technologies as Hyper-media andGraphical User Interface.WIBIS should be able to adapt itself to (1) changes in environment and (2) changes in information needs. In order to satisfy these requirements, the WIBIS should integrate software development systems and supporting systems, including both human parts and computer parts.In this paper, a three-layer system architecture for WIBIS, which integrates development support system, development system and operation system, is proposed. Then software metrics and human factors issues are discussed for each layer. Human factors issues are alsoexplained using the human cognitive information process model.
DSIAS: A Software Architectural Style for Distributed Software Integration Systems
Authors: Zeng-Wei Hong, Jim-Min Lin, De-Sheng Chen, Hewijin Christine Jiau
Venue: Proceedings of the 25th International Computer Software and Applications Conference on Invigorating Software Development (2001)

In this paper, we proposed a Distributed Software Integration Architectural Style (DSIAS) to provide a blueprint and reference document that would be useful to software system designers when integrating commercial off-the-shelf (COTS) products under distributed and Internet environment. DSIAS provides a framework indicating the structure topology to put lots of originally unrelated COTS products together into a COTS based system (CBS). We then successfully applied DSIAS to the design of an example, a Distributed Graphical Parking Lot Management System (DGPLMS).
Implementation of Scalable Blocking Locks Using an Adaptive Thread Scheduler
Authors: Bodhisattwa Mukherjee, Karsten Schwan
Venue: Proceedings of the 10th International Parallel Processing Symposium (1996)

Blocking locks are commonly used in parallel programs to improve application performance and system throughput. However, most implementations of such locks suffer from two major problems -- latency and scalability. In this paper, we propose an implementation of blocking locks using scheduler adaptation which exploits the interaction between thread schedulers and locks. By experimentation using well-known multiprocessor applications on a KSR2 multiprocessor, we demonstrate how such an implementation considerably reduces the latency and improves the scalability of blocking locks.
Modeling Documents for Structure Recognition Using Generalized N-Grams
Authors: Rolf Brugger, Abdelwahab Zramdini, Rolf Ingold
Venue: Proceedings of the 4th International Conference on Document Analysis and Recognition (1997)

In this paper we present and discuss a novel approach to modeling logical structures of documents, based on a statistical representation of patterns in a document class. An efficient and error tolerant recognition heuristics adapted to the model is proposed. The statistical approach permits easily automated and incremental learning of the model. The approach has been partially evaluated on a prototype. A discussion of the results achieved by the prototype is finally made.
Media Information Processing in Documents -Generation of Manuals of Mechanical Parts Assembling
Authors: Tadahiro Kitahashi, Muneki Ohya, Koh Kakusho, Noboru Babaguchi
Venue: Proceedings of the 4th International Conference on Document Analysis and Recognition (1997)

The authors view a document as a multi modal media in the sense that it presents information by using figures and/or images as well as text. By showing examples of media conversion and media integration, the authors discuss the essential processing techniques of media information, especially document media information. First, media conversion is briefly addressed by an example of converting a graph diagram in a document to either an alternative graph diagram or a table. The main topic is the generation of a manual of a mechanical parts assembling as an example of media integration in a document. Thereby, necessary input information is presented for generating the manual.