ppxscal/embedding_network huggingface dataset:
A polynomial-time algorithm for the topological type of a real algebraic curve
Authors: Dennis S. Arnon, Scott McCallum
Venue: Journal of Symbolic Computation (1988)

It was proved over a century ago that an algebraic curve C in the real projective plane, of degree n, has at most (n-1)(n-2)2+1 connected components. If C is nonslngular, then each of its commponents is a topological circle. A circle in the projectlve plane either separates it into a disk (the interior of the circle) and a Mobius band (the circle's exterior), or does not separate it. In the former case, the circle is an oval. If C is nonsingular, then all its components are ovals if n is even, and all except one are ovals if n is odd. An oval is included in another if it lies in the other's interior. The topological type of (a nonsingular) C is completely determined by (1) the parity of n, (2) how many ovals it has, and (3) the partial ordering of its ovals by inclusion. We present an algorithm which, given a homogeneous polinomial f(x,y,z) of degree n with integer coefficients, checks whether tlte curve defined hy f = 0 is nonsingular and if so, computes its topological type. The algorithm's maximum computing time is O(n^2^7L(d)^3), where d is the sum of the absolute values of the integer coofficients of f, and L(d) is the length of d.
Optimum Broadcasting and Personalized Communication in Hypercubes
Authors: S. Lennart Johnsson, Ching-Tien Ho
Venue: IEEE Transactions on Computers (1989)

Four different communication problems are addressed in Boolean n-cube configured multiprocessors: (1) one-to-all broadcasting: distribution of common data from a single source to all other nodes; (2) one-to-all personalized communication: a single node sending unique data to all other nodes; (3) all-to-all broadcasting: distribution of common data from each node to all other nodes; and (4) all-to-all personalized communication: each node sending a unique piece of information to every other node. Three communication graphs (spanning trees) for the Boolean n-cube are proposed for the routing, and scheduling disciplines provably optimum within a small constant factor are proposed. With appropriate scheduling and concurrent communication on all ports of every processor, routings based on these two communication graphs offer a speedup of up to n/2, and O( square root n) over the routings based on the spanning binomial tree for cases (2)-(4) respectively. All three spanning trees offer optimal communication times for cases (2)-(4) and concurrent communication on all ports of every processor. Timing models and complexity analysis are verified by experiments on a Boolean-cube-configured multiprocessor.
On geometric matching
Authors: O. Marcotte, S. Suri
Venue: Proceedings of the fifth annual symposium on Computational geometry (1989)

An &Ogr;(n3/2&radic;&agr;(n)) time algorithm is presented for finding a minimum-weight matching of a set of 2n points lying on the boundary of a convex polygon, where &agr;(n) is the functional inverse of the Ackerman's function. Generalizing this result, we obtain an &Ogr;(n3/2 logn&radic;&agr;(n)) time algorithm for the minimum-weight matching of points lying on the boundary of a simple nonconvex polygon, where we require that the line segments joining the matched pairs be contained within the polygon. We also consider the maximum-weight matching problem, and obtain algorithms of complexities &Ogr;(n) and &Ogr;(n log n) for the convex and the nonconvex case, respectively. By contrast, finding a weighted matching of an arbitrary set of points takes &Ogr;(n5/2 log4 n) time [Vaidya 1987].
Integration issue in knowledge acquisition systems
Authors: K. Morik
Venue: Issue 108 (April 1989) (1989)

Ever since knowledge acquisition systems have been applied to real world problems, the issue of integration has become important (Gaines 88). Most often, the following types of integration are considered: bull; Systems are to be integrated: the knowledge acquisition system is more closely linked with an expert system shell (Eshelman et al. 87), or a database system is linked to the knowledge acquisition system in order to read data of a domain. bull; Various sources of knowledge are to be integrated: text files, data files, statistics, rules and facts all contain knowledge about a domain and should be handled by the same system (Gaines 88). bull; The represented knowledge of various experts is to be integrated either into one consistent domain model or into a model which shows the conflicting views of the domain (Shaw 88). bull; Diverse knowledge sources with their respective representations are to be integrated, e.g. a taxonomy of domain concepts, possible values of attributes, well-formedness conditions of facts and rules. bull; Diverse tasks of knowledge acquisition are to be integrated: declaring epistemic primitives, defining concepts, adding facts and rules, deducing new facts from rules, dealing with inconsistencies, changing the terminology, changing facts and rules, grouping facts or rules together, presenting possible operations, showing views of the represented domain model, indicating consequences of an operation to the user. A particular topic of task integration is the integration of machine learning into a knowledge acquisition system.In this paper, we want to discuss only the last two integration problems and present the solutions we implemented in the BLIP system, currently under development at the Technical University of Berlin1. First, we give a short overview of knowledge acquisition tasks and indicate which tasks some prototype systems can handle. As we will see, the integration of machine learning into knowledge acquisition is still not yet well achieved. Second, we discuss the integration of tasks. In particular, the integration of machine learning into knowledge acquisition is discussed in some detail. The architecture of BLIP illustrates the paradigm of cooperative balanced modeling of both system and user. Third, we investigate the integration of knowledge sources. The integrity between diverse knowledge sources, the propagation of consequences of the operation to all relevant knowledge sources, and the interpretability of a component's results by other components are the 3 issues there. In BLIP, the knowledge needed for the learning task is also integrated into the domain knowledge. This gives BLIP the power of closed-loop learning (Michalski 87). Fourth, we describe the integration of BLIP's learning into knowledge revision in more detail.
Multi-stack optimization for data-path chip (microprocessor) layout
Authors: W. K. Luk, A. A. Dean
Venue: Proceedings of the 26th ACM/IEEE Design Automation Conference (1989)

As data-path chips such as microprocessors and RISC chips become more complex, multiple stacks of data-path macros are required to implement the entire data-path. The physical decomposition of a chip into a single data-path stack, and control logic of random logic as in the past is not always feasible. This paper describes a special multi-stack structure, optimization techniques and algorithms to partition, place and wire the data-path macros in the form of the multi-stack structure, taking into account the connectivity of the entire chip logic (data-path, control logic, chip drivers, on-chip memory). The overall objective is: (1) to fit the circuits within the chip, (2) to ensure data-path wireability, including stack to random logic wireability, and (3) to minimize wire lengths for wireability and timing. A tool for automatic multi-stack optimization has been implemented and applied successfully to layout some high density data-path chips.
An empirical comparison of pie vs. linear menus
Authors: J. Callahan, D. Hopkins, M. Weiser, B. Shneiderman
Venue: Proceedings of the SIGCHI conference on Human factors in computing systems (1988)

Menus are largely formatted in a linear fashion listing items from the top to bottom of the screen or window. Pull down menus are a common example of this format. Bitmapped computer displays, however, allow greater freedom in the placement, font, and general presentation of menus. A pie menu is a format where the items are placed along the circumference of a circle at equal radial distances from the center. Pie menus gain over traditional linear menus by reducing target seek time, lowering error rates by fixing the distance factor and increasing the target size in Fitts's Law, minimizing the drift distance after target selection, and are, in general, subjectively equivalent to the linear style.
Template style considerations for sea-of-gates layout generation
Authors: G. D. Adams, C. H. Séquin
Venue: Proceedings of the 26th ACM/IEEE Design Automation Conference (1989)

SoGOLaR (Sea-of-Gates Optimized Layout and Routing) is a program that generates functional cells for static CMOS circuits in the Sea-of-Gates layout style. Our generator is flexible and general enough to produce efficient layout for a wide variety of Sea-of-Gates template geometries. SoGOLaR has been used to make quantitative comparisons of several different templates with respect to area utilization and cell routability. We present the results of our comparative study and draw some conclusions for the selection of a basic Sea-of-Gates template geometry.
Performing geometric transformations by program transformation
Authors: Robin A. Nicholl, Tina M. Nicholl
Venue: ACM Transactions on Graphics (TOG) (1990)

Problems in geometry often possess symmetry properties that may be exploited in order to develop solutions. Algorithms based on these symmetry properties will frequently use geometric transformations to transform one case into another (symmetric) case. One advantage of this approach is that the algorithm avoids enumeration of cases and thus is shorter and generally easier to read. One disadvantage is that some additional execution time is required to perform these transformations. We describe how simple program equivalences may be used as program transformations to eliminate this additional execution time from programs that use geometric transformations. This approach has been used to develop an efficient implementation of a new algorithm for the two-dimensional line-clipping problem.
Register windows vs. register allocation
Authors: D. W. Wall
Venue: Proceedings of the ACM SIGPLAN 1988 conference on Programming Language design and Implementation (1988)

A large register set can be exploited by keeping variables and constants in registers instead of in memory. Hardware register windows and compile-time or link-time global register allocation are ways to do this. A measure of the effectiveness of any of these register management schemes is how thoroughly they remove loads and stores. This measure must also count extra loads and stores executed because of window overflow or conflicts between procedures. By combining profiling, instrumentation, and in-line simulation, we measured the effectiveness of several register management schemes. These included compile-time and link-time schemes for allocating registers, and register window schemes using fixed-size or variable-sized windows. Link-time allocation based on profile information was the clear winner in some cases and did about as well as windows in the rest. Even link-time allocation based on an estimated profile was about as good as windows. Variable-sized windows sometimes did better than fixed-sized windows, but the difference was usually small. Register windows require extra logic in the data path, which may slow the machine cycle slightly, and often use more chip real estate for additional registers. Proponents of windows suppose that they trade these drawbacks for a reduction in the number of memory references they must make. Our results show that this tradeoff should be made the other way. Keep the hardware simple, because a link-time register allocator can nearly duplicate the improvement in memory reference frequency. Then the cycle time can be as small as possible, resulting in faster programs overall.
Optimal Partitioning of Random Programs Across Two Processors
Authors: David M. Nicol
Venue: IEEE Transactions on Software Engineering (1989)

B. Indurkhya et al. (1986) concluded that the optimal partitioning of a homogeneous random program over a homogeneous distributed system either assigns all modules to a single processor or distributes the modules as evenly as possible among all processors. Their analysis rests heavily on the approximation that equates the expected maximum of a set of independent random variables with the set's maximum expectation. The author strengthens this result by providing an approximation-free proof of this result for two processors under general conditions on the module execution time distribution. It is found that additional rigor leads to a different characterization of the optimality points. The author also shows that under a rigorous analysis one is led to different conclusions in the general P-processor case than those reached using B. Indurkhya et al.'s approximation.
A memory controller executing segment operations in time 0(1)
Authors: H. Seebauer
Venue: ACM SIGARCH Computer Architecture News (1989)

A memory controller unit is presented for segmentation of page structured memories. It is intended for the BARDE dataflow processor. Suitably programmed controllers used in parallel can handle arbitrary memory sizes. Segment allocation, release, and access (i.e. translation of a segment relative page addresses into a physical page address) are carried out in at most one add cycle. The allocation method described avoids storage fragmentation and garbage collection by numbering allocated and free pages. A memory controller consists of one page controller for each memory page. The translation from virtual into physical addresses is done by associative search amoag all page controllers.
Design of Parity Testable Combinational Circuits
Authors: B. B. Bhattacharya, S. C. Seth
Venue: IEEE Transactions on Computers (1989)

The parity testability of a single output is related to its partition in terms of maximal supergates, and a scheme is proposed for making an untestable circuit parity testable by augmenting its maximal supergates. Only a small amount of extra logic and a single external test-mode pin are required to complete the design. The test procedure is simple, and the hardware overhead is low.
ACE: a hierarchical graphical interface for architectual synthesis
Authors: O. A. Buset, M. J. Elmasry
Venue: Proceedings of the 26th ACM/IEEE Design Automation Conference (1989)

Existing interfaces for high-level synthesis dictate that the synthesis process be iterative rather than interactive. This paper presents an interface tool for architectural synthesis that introduces real-time interaction to high-level synthesis interfaces. ACE makes innovations in the dynamic display of synthesizer transformations and introduces new concepts in input algorithm specification.
Virtual memory and backing storage management in multiprocessor operating systems using object-oriented design techniques
Authors: V. F. Russo, R. H. Campbell
Venue: Conference proceedings on Object-oriented programming systems, languages and applications (1989)

The Choices operating system architecture [3, 4, 15] uses class hierarchies and object-oriented programming to facilitate the construction of customized operating systems for shared memory and networked multiprocessors. The software is being used in the Tapestry Parallel Computing Laboratory at the University of Illinois to study the performance of algorithms, mechanisms, and policies for parallel systems. This paper describes the architectural design and class hierarchy of the Choices memory and secondary storage management system. The mechanisms and policies of a virtual memory system implement a memory hierarchy that exploits the trade-offs between response times and storage capacities. In Choices, the notion of a memory hierarchy is represented by layers in which abstract classes define interfaces between and internal to the layers. Concrete subclasses implement new algorithms or data structures or specializations of existing ones. This paper describes the motivation for an object-oriented, class-hierarchical approach to virtual memory system design, and describes the overall architecture of such an approach, as it has been applied to the Choices system. Special attention is paid to the advantages in both design and implementation that have resulted from using object-oriented techniques.
TuringTool: A User Interface to Aid in the Software Maintenance Task
Authors: James R. Cordy, Nicholas L. Eliot, Michael G. Robertson
Venue: IEEE Transactions on Software Engineering (1990)

TuringTool is a source program viewing and editing system specifically designed to support the software maintenance task. TuringTool bases all of its views of the program on a single comprehensive viewing paradigm borrowed from program development environments: source text elision. It is shown how this paradigm can be used to represent several kinds of views appropriate to the maintenance of large source programs, including structural views and nonstructural views appropriate to the maintenance task and how it can be extended to allow dynamic creation of complex programmer-specified views using simple set theoretic operators to combine the effects of several views into one. The system exploits the highly structured nature of the Turing programming language to allow seamless viewing of programs consisting of many separately compiled source modules as one uniform source.
The workshop system: a practical knowledge-based software environment
Authors: Geoffrey M. Clemm
Venue: Proceedings of the third ACM SIGSOFT/SIGPLAN software engineering symposium on Practical software development environments (1989)

The Workshop System is a programming environment designed to support teams of programmers working concurrently on large software projects. An essential feature of the Workshop System is the storage of all information from the software project as fine grained objects in a shared database. In order to allow effective usage of this potentially overwhelming amount of information, the Workshop System provides a rule-based language called SE-KRL for specifying both the software objects and the software process for a given domain. SE-KRL programs can then be written to automate mechanical aspects of the software development process as well as to guide the essential creative activity of a software engineer.
Reliability Analysis of Large Software Systems: Defect Data Modeling
Authors: Ytzhak Levendel
Venue: IEEE Transactions on Software Engineering (1990)

The author analyzes and models the software development process, and presents field experience for large distributed systems. Defect removal is shown to be the bottleneck in achieving the appropriate quality level before system deployment in the field. The time to defect detection, the defect repair time and a factor reflecting the introduction of new defects due to imperfect defect repair are some of the constants in the laws governing defect removal. Test coverage is a measure of defect removal effectiveness. A birth-death mathematical model based on these constants is developed and used to model field failure report data. The birth-death model is contrasted with a more classical decreasing exponential model. Both models indicate that defect removal is not a cost-effective way to achieve quality. As a result of the long latency of software defects in a system, defect prevention is suggested to be a far more practical solution to quality than defect removal.
Usable OCR: what are the minimum performance requirements?
Authors: William H. Cushman, Purnendu S. Ojha, Cathleen M. Daniels
Venue: Proceedings of the SIGCHI conference on Human factors in computing systems: Empowering people (1990)

Forty-two subjects used a microcomputer and word processing software to type and proofread a 450-word document and then to correct errors in a number of other documents (of the same length) that had been created by OCR simulation [i.e., the documents looked like those typically obtained when using an optical character recognition (OCR) device for text entry]. The &ldquo;OCR documents&rdquo; contained both recognition errors (substitution errors, insertion errors, and deletion errors) and unrecognized characters. The percentage of characters requiring correction was varied from document to document. Text entry by OCR was found to be faster than manual entry (i.e., typing) if the OCR device can correctly recognize at least 94% of the individual alphanumeric characters. However, 98% correct recognition and computer-assisted proofreading were required in order to consistently obtain finished documents that had no more residual errors than typed documents.
Vamp: the Aldus application framework
Authors: P. J. Ferrel, R. F. Meyer
Venue: Conference proceedings on Object-oriented programming systems, languages and applications (1989)

This paper describes an application framework, called Vamp, which supports Interactive Compound Documents and applications as collections of Interactive Objects. Aldus developed Vamp as a practical experiment in solving several software engineering and project management problems including software reusability, portability, and management of large program teams. Vamp is written in C ++ to run on the Macintosh and Microsoft Windows. This paper discusses the decisions that led to the architecture of Vamp and what Aldus stands to gain by its use.
The word problem for Smullyan's lark combinator is decidable
Authors: Rick Statman
Venue: Journal of Symbolic Computation (1989)

We show that the problem of deciding whether two applicative combinations of Smullyan's L combinator are equal is solvable.
Supporting an object-oriented programming methodology using PS-algol
Authors: Paul Philbrow, David Harper, Malcolm Atkinson
Venue: Proceedings of the second international workshop on Database programming languages (1989)

We describe a database programming system which supports an object-oriented programming methodology in the persistent programming language PS-algol. The methodology incorporates most of the familiar object-oriented concepts including: object identity; classification and specialization; inheritance and data encapsulation. In describing the implementation, we emphasize the particular features of PS-algol we exploit, namely orthogonal persistence, functions being first-class values, the extensible union type, and the callable compiler. The resultant software partnered with PS-algol can be viewed as an embryonic object-oriented database programming system, and comparisons with other such systems are drawn.
Incremental computation of planar maps
Authors: M. Gangnet, J.-C. Hervé, T. Pudet, J.-M. van Thong
Venue: ACM SIGGRAPH Computer Graphics (1989)

A planar map is a figure formed by a set of intersecting lines and curves. Such an object captures both the geometrical and the topological information implicitly defined by the data. In the context of 2D drawing it provides a new interaction paradigm, map sketching, for editing graphic shapes.To build a planar map, one must compute curve intersections and deduce from them the map they define. The computed topology must be consistent with the underlying geometry. Robustness of geometric computations is a key issue in this process. We present a robust solution to B eacute;zier curve intersection that uses exact forward differencing and bounded rational arithmetic. Then, we describe data structure and algorithms to support incremental insertion of B eacute;zier curves in a planar map. A prototype illustration tool using this method is also discussed.