ppxscal/embedding_network huggingface dataset:
The WHIPS prototype for data warehouse creation and maintenance
Authors: Wilburt J. Labio, Yue Zhuge, Janet L. Wiener, Himanshu Gupta, Héctor García-Molina, Jennifer Widom
Venue: Proceedings of the 1997 ACM SIGMOD international conference on Management of data (1997)

A data warehouse is a repository of integrated information from distributed, autonomous, and possibly heterogeneous, sources. In effect, the warehouse stores one or more materialized views of the source data. The data is then readily available to user applications for querying and analysis. Figure 1 shows the basic architecture of a warehouse: data is collected from each source, integrated with data from other sources, and stored at the warehouse. Users then access the data directly from the warehouse. As suggested by Figure 1, there are two major components in a warehouse system: the integration component, responsible for collecting and maintaining the materialized views, and the query and analysis component, responsible for fulfilling the information needs of specific end users. Note that the two components are not independent. For example, which views the integration component materializes depends on the expected needs of end users. Most current commercial warehousing systems (e.g., Redbrick, Sybase, Arbor) focus on the query and analysis component, providing specialized index structures at the warehouse and extensive querying facilities for the end user. In the WHIPS (WareHousing Information Project at Stanford) project, on the other hand, we focus on the integration component. In particular, we have developed an architecture and implemented a prototype for identifying data changes at heterogeneous sources, transforming them and summarizing them in accordance to warehouse specifications, and incrementally integrating them into the warehouse. We propose to demonstrate our prototype at SIGMOD, illustrating the main features of our architecture. Our architecture is modular and we designed it specifically to fulfill several important and interrelated goals: data sources and warehouse views can be added and removed dynamically; it is scalable by adding more internal modules; changes at the sources are detected automatically; the warehouse may be updated continuously as the sources change, without requiring &ldquo;down time;&rdquo; and the warehouse is always kept consistent with the source data by the integration algorithms. More details on these goals and how we achieve them are provided in [WGL+96].
CALOS: first results from an experiment in computer-aided learning for operating systems
Authors: Murray W. Goldberg
Venue: ACM SIGCSE Bulletin (1997)

This paper describes the outcome of an experiment in Computer-Aided Learning (CAL) for Operating Systems using the World-Wide Web (WWW). The purpose of the experiment is to evaluate WWW-based course delivery both in terms of academic performance and in terms of student acceptance. A complete WWW-based offering of an existing third-year university course in Computer Science was produced. Students enrolled in the course were divided into three groups: 1) those taking the course using only the WWW-based resource (no lectures), 2) those taking the course by attending lectures (no access to the WWW-based resource), and 3) those with access to both lectures and the WWW-based resource.Academic results were evaluated and qualitative student impressions were solicited. In general the WWW-only method of course delivery was an equal success compared to the lecture-only delivery, both in terms of academic results and in terms of student acceptance. On average, students in the combined lecture and WWW-based delivery performed better academically than students in the other groups.
Infrastructure issues related to theory of computing research
Authors: Faith Fich
Venue: ACM SIGACT News (1997)

This paper discusses a number of issues related to the support of research in Theory of Computing, including funding, evaluation of research, communication, interaction with other research areas, education, and employment. It is directed primarily to researchers in Theory of Computing and is meant to complement the Infrastructure Section of the committee report "Strategic Directions for Research in Theory of Computing".Theory of Computing is a field of Computer Science that uses mathematical techniques to understand the nature of computation and to design and analyze algorithms for important and fundamental problems. It provides important new ways of thinking about computation and lasting insights that are applicable to a wide variety of systems.There are a range of different research activities that occur within this field, including developing models (and ways to quantify the efficiency of algorithms in those models), determining the relationships among different models, designing new (provably correct) algorithms, analyzing the efficiency of various algorithms, proving lower bounds and impossibility, and explaining experimental results. Some researchers are better at posing interesting questions or opening up new directions for research; others are better at answering questions and developing new techniques to do so.In this paper, I wish to discuss a number of issues related to the support of research in Theory of Computing, including funding, evaluation of research, communication, interaction with other research areas, education, and employment. It is directed primarily to researchers in Theory of Computing and is meant to complement the Infrastructure Section of the committee report "Strategic Directions for Research in Theory of Computing", which is directed primarily to people outside our community. I will examine some things our community has done well, some recent innovations, and some suggestions to enhance our research environment. Finally, I will address the relationship of Theory of Computing with experimental computing and algorithmic engineering.
Separating Exponentially Ambiguous Finite Automata from Polynomially Ambiguous Finite Automata
Authors: Hing Leung
Venue: SIAM Journal on Computing (1998)

We resolve an open problem raised by Ravikumar and Ibarra [SIAM J. Comput., 18 (1989), pp. 1263--1282] on the succinctness of representations relating to the types of ambiguity of finite automata. We show that there exists a family of nondeterministic finite automata {An} over a two-letter alphabet such that, for any positive integer n, An is exponentially ambiguous and has n states, whereas the smallest equivalent deterministic finite automaton has 2n states, and any smallest equivalent polynomially ambiguous finite automaton has 2n -1 states.
What is Java binary compatibility?
Authors: Sophia Drossopoulou, David Wragg, Susan Eisenbach
Venue: ACM SIGPLAN Notices (1998)

Separate compilation allows the decomposition of programs into units that may be compiled separately, and linked into an executable. Traditionally, separate compilation was equivalent to the compilation of all units together, and modification and re-compilation of one unit required re-compilation of all importing units.Java suggests a more flexible framework, in which the linker checks the integrity of the binaries to be combined. Certain source code modifications, such as addition of methods to classes, are defined as binary compatible. The language description guarantees that binaries of types (i.e. classes or interfaces) modified in binary compatible ways may be re-compiled and linked with the binaries of types that imported and were compiled using the earlier versions of the modified types.However, this is not always the case: some of the changes considered by Java as binary compatible do not guarantee successful linking and execution. In this paper we study the concepts around binary compatibility. We suggest a formalization of the requirement of safe linking and execution without re-compilation, investigate alternatives, demonstrate several of its properties, and propose a more restricted definition of binary compatible changes. Finally, we prove for a substantial subset of Java, that this restricted definition guarantees error-free linking and execution.
Wavelet-based image indexing techniques with partial sketch retrieval capability
Authors: James Ze Wang, Gio Wiederhold, Oscar Firschein, Sha Xin Wei
Venue: Proceedings of the IEEE international forum on Research and technology advances in digital libraries (1997)

This paper describes WBIIS (Wavelet-Based Image Indexing and Searching), a new image indexing and retrieval algorithm with partial sketch image searching capability for large image databases. The algorithm characterizes the color variations over the spatial extent of the image in a manner that provides semantically-meaningful image comparisons. The indexing algorithm applies a Daubechies' wavelet transform for each of the three opponent color components. The wavelet coefficients in the lowest few frequency bands, and their variances, are stored as feature vectors. To speed up retrieval, a two-step procedure is used that first does a crude selection based on the variances, and then refines the search by performing a feature vector match between the selected images and the query. For better accuracy in searching, two level multiresolution matching may also be used. Masks are used for partial-sketch queries. This technique performs much better in capturing coherence of image, object granularity, local color/texture, and bias avoidance than traditional color layout algorithms. When tested on a database of more than 10,000 general-purpose images, WBIIS is much faster and more accurate than traditional algorithms.
Task Allocation Algorithms for Maximizing Reliability of Distributed Computing Systems
Authors: S. Kartik, C. Siva Ram Murthy
Venue: IEEE Transactions on Computers (1997)

In this paper, we consider the problem of finding an optimal and suboptimal task allocation (i.e., to which processor should each module of a task or program be assigned) in distributed computing systems with the goal of maximizing the system reliability (i.e., the probability that the system can run the entire task successfully). The problem of finding an optimal task allocation is known to be NP-hard in the strong sense. Here we present an algorithm for this problem, which uses the idea of branch and bound with underestimates for reducing the computations in finding an optimal task allocation. The algorithm reorders the list of modules to allow a subset of modules that do not communicate with one another to be assigned last, for further reduction in the computations of optimal task allocation for maximizing reliability. We also present a heuristic algorithm which obtains suboptimal task allocations in a reasonable amount of computational time. We study the performance of the algorithms over a wide range of parameters such as the number of modules, the number of processors, the ratio of average execution cost to average communication cost, and the connectivity of modules. We demonstrate the effectiveness of our algorithms by comparing with recent competing task allocation algorithms for maximizing reliability available in the literature.
Distributed algorithms in Java
Authors: Mordechai Ben-Ari
Venue: Proceedings of the 2nd conference on Integrating technology into computer science education (1997)

We show how Java can be used to develop portable implementations of distributed algorithms for class demonstrations and laboratory exploration. The programs can be used in two modes: (a) TCP/IP communications over a net, or (b) applet-to-applet communications on a single HTML page. The latter mode is important during program development and can also be used if your lab malfunctions or for homework assignments. Programs were written for four distributed algorithms: Byzantine generals, Ricart-Agrawala mutual exclusion, Dijkstra-Scholten termination and Chandy-Lamport snapshots.
A testbed for information retrieval research: the Utah retrieval system architecture
Authors: Lee A. Hollaar
Venue: Proceedings of the 8th annual international ACM SIGIR conference on Research and development in information retrieval (1985)

The Utah Retrieval System Architecture provides an excellent testbed for the development and testing of new algorithms or techniques for information retrieval. URSA&trade; is a message-based structure capable of running on a variety of system configurations, ranging from a single mainframe processor to a system distributed across a number of dissimilar processors. It can readily support a variety of specialized backend processors, such as high-speed search engines.The architecture divides the components of a text retrieval system into two classes: servers and clients. A triple of servers (index, search, and document access) for each database provide the capabilities normally associated with a retrieval system. Possible clients for these servers include a window-based user interface, whose query language can be easily modified, a connection to a mainframe host processor, or Al-based query modification programs that wish to use the database.Any module in the system can be replaced by a new module using a different algorithm as long as the new module complies with the message formats for that function. In fact, with some care this module switch can occur while the system is running, without affecting the users. A monitor program collects statistics on all system messages, giving information regarding query complexity, processing time for each module, queueing times, and bandwidths between every module.This paper discusses the background of URSA and its structure, with particular emphasis on the features that make it a good testbed for information retrieval techniques.
Logic synthesis for large pass transistor circuits
Authors: Premal Buch, Amit Narayan, A. Richard Newton, A. Sangiovanni-Vincentelli
Venue: Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design (1997)

Pass transistor logic (PTL) can be a promising alternative to static CMOS for deep sub-micron design. In this work, we motivate the need for CAD algorithms for PTL circuit design and propose decomposed BDDs as a suitable logic level representation for synthesis of PTL networks. Decomposed BDDs can represent large, arbitrary functions as a multi-stage circuit and can exploit the natural, efficient mapping of a BDD to PTL. A comprehensive synthesis flow based on decomposed BDDs is outlined for PTL design. We show that the proposed approach allows us to make logic-level optimizations similar to the traditional multi- level network based synthesis flow for static CMOS, and also makes possible optimizations with a direct impact on area, delay and power of the final circuit implementation which do not have any equivalent in the traditional approach. We also present a set of heuristical algorithms to synthesize PTL circuits optimized for area, delay and power which are key to the proposed synthesis flow. Experimental results on ISCAS benchmark circuits show that our technique yields PTL circuits with substantial improvements over static CMOS designs. In addition, to the best of our knowledge this is the first time PTL circuits have been synthesized for the entire ISCAS benchmark set.
Generation and Evaluation of Indexes for Chemistry Articles
Authors: Julia Hodges, Shiyun Yie, Sonal Kulkarni, Ray Reighart
Venue: Journal of Intelligent Information Systems (1997)

This paper describes AIMS (Assisted Indexing at Mississippi State), a system that aids human document analysts in the assignment of indexes to physical chemistry journal articles. There are two major components of AIMS&mdash;a natural language processing (NLP) component and an index generation (IG) component. The focus of this article is the IG. We describe the techniques and structures used by the IG in the selection of appropriate indexes for a given article. We also describe the results of evaluations of the system in terms of recall, precision, and overgeneration. We provide a description of a graphical user interface that we have developed for AIMS. Finally, we discuss future work.
Derivation of formal representations from process-based specification and implementation models
Authors: Steven Vercauteren, Diederik Verkest, Gjalt de Jong, Bill Lin
Venue: Proceedings of the 10th international symposium on System synthesis (1997)

In this paper we present a method that allows to observe and control the emulation of communicating systems consisting of hardware and software parts. The approach provides the ability to set breakpoints in either technology without breaking the protocol or loosing data. Systems may contain several software and hardware processes. Each process runs in a separate debugger while the presented approach provides the necessary synchronization between the processes that precludes loss of data at the communication interfaces due to breakpoints. Therefore it allows to continue the operation after a breakpoint which is essential for interactive debugging.
Pragmatic quality metrics for evolutionary software development models
Authors: Walker Royce
Venue: Proceedings of the conference on TRI-ADA '90 (1990)

Due to the large number of product, project and people parameters which impact large custom software development efforts, measurement of software product quality is a complex undertaking. Furthermore, the absolute perspective from which quality is measured (customer satisfaction) is intangible. While we probably can't say what the absolute quality of a software product is, we can determine the relative quality, the adequacy of this quality with respect to pragmatic considerations, and identify good and bad trends during development. While no two software engineers will ever agree on an optimum definition of software quality, they will agree that the most important perspective of software quality is its ease of change. We can call this flexibility, adaptability or some other vague term, but the critical characteristic of software is that it is soft. The easier the product is to modify, the easier it is to achieve any other software quality perspective. This paper presents objective quality metrics derived from consistent lifecycle perspectives of rework which, when used in concert with an evolutionary development approach, can provide useful insight to produce better quality per unit cost/schedule or to achieve adequate quality more efficiently. Software rework experience with over 1500 software change orders on the Command Center Processing and Display System - Replacement (CCPDS-R) project was used both to formulate the metrics definitions and to demonstrate their usefulness. These metrics can be applied uniformly from multiple perspectives (project, subsystem, build, CSCI) to achieve objective comparability. They are automated, consistent, and easy to use. Along with subjective interpretation to account for the lifecycle context, objective insight into product quality can be achieved early where correction or improvement can be instigated more efficiently.
A SIMD computer for multigrid methods
Authors: I. Martín, F. Tirado
Venue: ACM SIGARCH Computer Architecture News (1997)

This paper describes briefly a project for building a highly parallel computer for simulating physical phenomena described by partial differential equations. The special-purpose computer implements multigrid algorithms for solving partial differential equations. We show that the multigrid machine is a good alternative to commercial microprocessor-based parallel computers for running grid-based applications
Shape Ambiguities in Structure From Motion
Authors: Richard Szeliski, Sing Bing Kang
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1997)

This paper examines the fundamental ambiguities and uncertainties inherent in recovering structure from motion. By examining the eigenvectors associated with null or small eigenvalues of the Hessian matrix, we can quantify the exact nature of these ambiguities and predict how they affect the accuracy of the reconstructed shape. Our results for orthographic cameras show that the bas-relief ambiguity is significant even with many images, unless a large amount of rotation is present. Similar results for perspective cameras suggest that three or more frames and a large amount of rotation are required for metrically accurate reconstruction.
Adaptive page replacement based on memory reference behavior
Authors: Gideon Glass, Pei Cao
Venue: Proceedings of the 1997 ACM SIGMETRICS international conference on Measurement and modeling of computer systems (1997)

As disk performance continues to lag behind that of memory systems and processors, virtual memory management becomes increasingly important for overall system performance. In this paper we study the page reference behavior of a collection of memory-intensive applications, and propose a new virtual memory page replacement algorithm, SEQ. SEQ detects long sequences of page faults and applies most-recently-used replacement to those sequences. Simulations show that for a large class of applications, SEQ performs close to the optimal replacement algorithm, and significantly better than Least-Recently-Used (LRU). In addition, SEQ performs similarly to LRU for applications that do not exhibit sequential faulting.
Global harmony: coupled noise analysis for full-chip RC interconnect networks
Authors: K. L. Shepard, V. Narayanan, P. C. Elmendorf, Gutuan Zheng
Venue: Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design (1997)

Noise is becoming one of the most important metrics in the design of VLSI systems, certainly of comparable importance to area, timing, and power. In this paper, we describe Global Harmony, a methodology for the analysis of coupling noise in the global interconnect of large VLSI chips, being developed for the design of high-performance microprocessors. The architecture of Global Harmony involves a careful combination of static noise analysis, static timing analysis, and reduced-order modelling techniques. We describe a reduced-order modelling approach that allows for passive multiport reduction of RC netlists as impedance macromodels while preserving the symmetry and sparsity of the state matrices for efficient storage. We describe how the macromodels are practically employed to perform coupling analysis and how timing constraints can be used to limit pessimism in the analysis.
Crowds: anonymity for Web transactions
Authors: Michael K. Reiter, Aviel D. Rubin
Venue: ACM Transactions on Information and System Security (TISSEC) (1998)

In this paper we introduce a system called Crowds for protecting users' anonymity on the world-wide-web. Crowds, named for the notion of &ldquo;blending into a crowd,&rdquo; operates by grouping users into a large and geographically diverse group (crowd) that collectively issues requests on behalf of its members. Web servers are unable to learn the true source of a request because it is equally likely to have originated from any member of the crowd, and even collaborating crowd members cannot distinguish the originator of a request from a member who is merely forwarding the request on behalf of another. We describe the design, implementation, security, performance, and scalability of our system. Our security analysis introduces degrees of anonymity as an important tool for describing and proving anonymity properties.
The use of Petri nets for modeling pipelined processors
Authors: Rami R. Razouk
Venue: Proceedings of the 25th ACM/IEEE Design Automation Conference (1988)

This paper discusses the use of Petri Nets for modeling and analyzing pipelined processors. Petri Nets are particularly well-suited to modeling the synchronization, buffering, resource contention and delicate timing so common in pipelined processors. Tools for simulating, animating and analyzing the behavior of the models are described. The usefulness of the tools and the analysis methods they support in evaluating the performance and analyzing the detailed timing of pipelined microprocessors is illustrated through an example.