ppxscal/embedding_network huggingface dataset:
Satellite orbit error due to geopotential model error using perturbation theory: applications to ROCSAT-2 and COSMIC missions
Authors: Cheinway Hwang, Lih-Shinn Hwang
Venue: Computers Geosciences (2002)

A program in FORTRAN 77 is designed to compute satellite orbit error due to geopotential model error. The program is self-contained and is based on an approximate analytical orbital theory that describes the radial, along-track and cross-track positional perturbations of a satellite in a near-circular orbit. Use of the approximate formula reduced programming effort in computing eccentricity functions and the transformation coefficients from Keplerian perturbations to radial, along-track and cross-track perturbations. With this program, the RMS orbit errors due to the EGM96 model error are estimated to be 0.56m for ROCSAT-2, 64.09m for COSMIC at a 400-km altitude, and 1.69 m for COSMIC at a 800-km altitude, respectively. The EGM96 model will yield an orbital accuracy consistent with the ground resolution of ROCSAT-2's optical camera, but will not yield the required sub-meter level orbital accuracy for COSMIC in the operational phase, which is for retrieving meteorological data.
Dealing with Obsolete Parts
Authors: Ronald C. Stogdill
Venue: IEEE Design Test (1999)

The objective of the Electronic Parts Obsolescence Initiative (EPOI) is to insure Air Force mission readiness and increase the fielded life of weapons systems at an affordable cost by developing a systematic approach to managing obsolescence. EPOI is developing management & re-engineering tools for defense systems affected by parts obsolescence and reliability models for commercially manufactured electronics utilized in defense systems. This initiative currently consists of eight programs covering three key areas of work: 1) Parts Obsolescence Management and Re-engineering Tools, 2) The Application of Commercially Manufactured Electronics (ACME), and 3) Pilot Demonstration Programs. The initiative's main technology foci are mixed signal electronics, Application Specific Integrated Circuits (ASIC), Physics of Failure validation with commercial field return data, and standardized information exchange.
Image Representation Using Block Pattern Models and Its Image Processing Applications
Authors: Y. Wang, S. K. Mitra
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1993)

An image representation scheme using a set of block pattern models (BPMs) consisting of three categories (constant, oriented, and irregular) is introduced. Algorithms for model classification, model parameter estimation, and image reconstruction from model parameters are presented, and these provide the necessary vehicles for applying the proposed representation scheme to various image processing tasks. The applications of the proposed models in image coding, image zooming, and image smoothing are described. Satisfactory coded images have been obtained at bit rates between 0.5 approximately 0.6 b.p.p. (bits per pixel) with a high-rate realization and between 0.3 approximately 0.5 b.p.p. with a low-rate realization. The high-rate realization has a simple structure suitable for real-time implementation. The methods for image zooming and smoothing are similar, where both adapt the processing for each pixel according to the model of its neighborhood. By using directional filters in oriented regions, edges and lines are rendered sharper in a smoother manner than with conventional linear filtering approaches, which leads to significant improvement in perceived image quality.
An ASIC Methodology for Mixed Analog-Digital Simulation
Authors: Michael Rumsey, John Sackett
Venue: IEEE Micro (1990)

A practical approach to high-speed, mixed, analog-digital simulation is described. The system, known as the Analog Modeling Package (AMP), comprises a range of models, Laplace transform algorithms, and supporting programs. AMP not only supports the analog modeling process, but also enables analog models to be simulated on any digital simulator that supports a C or Pascal model interface. Each of these key elements is detailed. The strengths of AMP are speed and a systematic method. User benefits include running the resulting models on existing workstations through the novel analog model linker.
Rule-Driven VLSI Fuzzy Processor
Authors: Giuseppe Ascia, Vincenzo Catania, Marco Russo, Lorenzo Vita
Venue: IEEE Micro (1996)

In this article the authors propose the design of an architecture for a general-purpose fuzzy processor whose main features are: pre-processing of inferences to reduce the number of rules to be processed and increase the processing speed; pipeling of the various inference execution stage; parallel computation of the degree of activation of the antecedents of a single rule; mixed technology design, as the Kernel of the processor is entirely made up of fuzzy-gates based on a discrete-analog approach.
Opportunity Cost Algorithms for Reduction of I/O and Interprocess Communication Overhead in a Computing Cluster
Authors: Arie Keren, Amnon Barak
Venue: IEEE Transactions on Parallel and Distributed Systems (2003)

Computing Clusters (CC) consisting of several connected machines, could provide a high-performance, multiuser, time-sharing environment for executing parallel and sequential jobs. In order to achieve good performance in such an environment, it is necessary to assign processes to machines in a manner that ensures efficient allocation of resources among the jobs. This paper presents opportunity cost algorithms for online assignment of jobs to machines in a CC. These algorithms are designed to improve the overall CPU utilization of the cluster and to reduces the I/O and the Interprocess Communication (IPC) overhead. Our approach is based on known theoretical results on competitive algorithms. The main contribution of the paper is how to adapt this theory into working algorithms that can assign jobs to machines in a manner that guarantees near-optimal utilization of the CPU resource for jobs that perform I/O and IPC operations. The developed algorithms are easy to implement. We tested the algorithms by means of simulations and executions in a real system and show that they outperform existing methods for process allocation that are based on ad hoc heuristics.
Position control of carbon nanotube using patterned electrode and electric field
Authors: Fujio Wakaya, Takayoshi Nagai, Kenji Gamo
Venue: Microelectronic Engineering (2002)

A suspension which consists of multiwall carbon nanotubes and isopropyl alcohol was dropped onto a substrate which has patterned electrodes thereon. The nanotubes were collected on the anode when the applied voltage is large (1 V > V > 10 V). When V= 0.7 V, the nanotubes are collected around the end of the anode tips where the electric field should be strongest. This means that the position of nanotubes which are dropped on a substrate with a solvent can be controlled using a local electric field generated by patterned electrodes.
Toward Zero-Effort Personal Document Management
Authors: Jonathan J. Hull, Peter E. Hart
Venue: Computer (2001)

Effective document management in the Information Age must require nearly zero effort, be economically reasonable, offer efficient retrieval methods, and satisfy users' concerns about security and privacy.During the past three years, the California Research Center has evaluated a radically simple approach to personal document management called Save everything!To achieve zero-effort document capture, the authors modified conventional printers, digital copiers, and fax machines to automatically save representations of every document processed. Their approach exploits users' familiarity with their personal document collection to retrieve documents without using filenames, paths, or keywords. The authors report a case study that demonstrates how Save everything! has proven to be an effective and cost-efficient tool for integrating document capture into daily work practices.
A model for efficient and accurate interaction with elastic objects in haptic virtual environments
Authors: Dan C. Popescu, Michael Compton
Venue: Proceedings of the 1st international conference on Computer graphics and interactive techniques in Australasia and South East Asia (2003)

This paper describes a method of modelling real-time interactions with elastic 3D objects represented by finite element models, which is particularly suitable for haptic virtual environments. The assumption we make is that the area of interaction of the external forces on the object is small. Our method provides a physically based solution and only requires the precomputation of the inverse of the stiffness matrix. It can be naturally coupled with a technique of local multiresolution collision detection, in order to increase geometrical accuracy while maintaining a low cost computation.Our model shows that under reasonable constraints, it is possible to meet the generally hard to reconcile requirements of having both a real-time and physically accurate simulation in a haptic virtual environment.
Efficient Self-Recovering ASIC Design
Authors: Samuel N. Hamilton, Alex Orailoglu
Venue: IEEE Design Test (1998)

The authors present a framework for tailoring fault tolerant approaches for both permanent and transient faults to the specific needs of an application. In particular, they address methodologies for encoding fault isolation properties in calculation duplication to allow permanent fault identification, an efficient approach to post-identification reconfiguration using graceful degradation instead of spares, and an error recovery technique which actually recovers from previously detected errors in parallel with future calculations, thus achieving zero-error latency. In conjunction, these techniques provide an efficient alternative to traditional triplication and rollback schemes, and allow significant tailoring of area/resiliency trade-offs for individual designs.
Codesign of Communication Protocols
Authors: Alan S. Wenban, John W. O'Leary, Geoffrey M. Brown
Venue: Computer (1993)

A codesign process using Promela, a concurrent programming language, is under development. A description is given of Promela, the software compiler, and the hardware compiler. As an example, the method is applied to a simple communication system using the alternating bit protocol.
An Environment for Painless MIMD System Development
Authors: Leonard A. Lopez, Karim A. Valimohamed, Linda G. Schub
Venue: IEEE Software (1992)

An environment that lets system applications be expressed as virtual machines, through which architecture-independent multiple-instruction, multiple-data stream (MIMD) programs are written, is described. The virtual machine hides the hardware configuration from the programmer so that the MIMD programming environment always appears the same, regardless of the actual hardware. The data-definition and procedural high-level languages used in the environment and the generation of object code in the environment are discussed. The runtime configuration of the system and an implemented prototype of the system are described.
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Venue: International Conference on Computer Aided Design (2001)

On behalf of the ICCAD 2001 Executive and Technical Program committees, I would like to welcome you to the International Conference on Computer-Aided Design which will take place November 4 - 8 at the San Jose DoubleTree Hotel.The main part of the ICCAD program consists of 30 technical paper sessions. The 92 papers which will be presented in these sessions were selected from 301 paper submissions. The technical paper sessions are complemented by 5 embedded tutorials, each giving an overview on the most recent developments in an emerging or hot topic presented by leading experts in the field. This time, the embedded tutorials cover embedded software & systems, platform based design, RF and analog synthesis, power design issues, and EDA problems of MEMS design. A panel on Wednesday afternoon titled "Automatic Hierarchical Design: Fantasy or Reality?" will discuss the highly controversial matter of hierarchical versus flat design.A core task of forward looking EDA research is the observation of long term trends in design technologies to timely identify upcoming challenges and opportunities for EDA tools and methodologies. As a novel approach to increase the awareness of the EDA community for such trends, ICCAD 2001 has invited key experts to introduce and discuss materials, circuits, architectures, and design issues of nanotechnologies. The keynote, "Nanotechnology and the Information Age" by Thomas Theis, Director of Physical Sciences at IBM Research, will be followed by a panel: "Will Nanotechnology Change the Way We Design and Verify Systems?" on Monday evening, bringing together experts from different areas of this exciting research field.This technical program has been organized by the Program Chair, Larry Pileggi, and by the Vice Program Chair, Andreas Kuehlmann, with the support of the Program and the Executive Committees.Thursday, November 8, brings a new set of the very successful series of ICCAD full-day tutorials. They were organized by our tutorial chair, Hidetoshi Onodera, and will cover the topics 1) Low-Power Embedded Software: What, Why, and How? 2) Optimization Strategies for Physical Synthesis and Timing Closure 3) Signal Integrity (new edition of the best selling tutorial of ICCAD 2000) 4) Boolean Satisfiability.I hope you will enjoy the conference and experience some of the enthusiasm and excitement which spurs our research community to accept the ever increasing challenges of EDA in the deep submicron design age.
On the Reliability of AI Planning Software in Real-Time Applications
Authors: Ing-Ray Chen, Farokh B. Bastani, Ta-Wei Tsao
Venue: IEEE Transactions on Knowledge and Data Engineering (1995)

We define the reliability of a real-time system incorporating AI planning programs as the probability that, for each problem-solving request issued from the environment, the embedded system can successfully plan and execute a response within a specified real-time deadline. A methodology is developed for evaluating the reliability of such systems taking into consideration the fact that, other than program bugs, the intrinsic characteristics of AI planning programs may also cause the embedded system to fail even after all software bugs are removed from the program. The utility of the methodology is demonstrated by applying it to the reliability evaluation of two AI planning algorithms embedded in a real-time multicriteria route-finding system.
Engineering an Education for the Future
Authors: Edward A. Lee, David G. Messerschmitt
Venue: Computer (1998)

Faced with rapid and unremitting change in the disciplines of electrical and computer engineering (ECE), some educators argue that they should deliberately not respond aggressively. Rather, educators should focus on fundamentals that will serve the students well for an entire career. Although the authors agree, they go on to explain that this approach largely begs the question of what those fundamentals are. Of course it is desirable to impart all feasible fundamentals, but that seems impossible given the expanding breadth of knowledge required in the ECE field. Thus the question this article addresses is: What are the fundamental skills and knowledge that are important for a future career in ECE? What should be the educational priorities? The authors believe that the center of gravity of most undergraduate curricula today is too far on the side of attempting to train the small cadre of technical experts, a hopeless task within a four- or five-year program. Because of the hopelessness of the task, too much content is crammed into the program, thinking it makes it better (and somehow less hope- less). This shuts out other fundamental knowledge that the authors believe will be extremely valuable to design careers. Students have been seriously short-changed by not understanding the big picture.The authors advocate an alternative vision in which the undergraduate program focuses on a limited and carefully chosen set of core ideas, supplemented by real-world examples and importantly by student self-exploration and learning. Such an undergraduate program also emphasizes breadth, an exposure to a range of technical issues, as well as mathematics, science, humanities, and social sciences. After the undergraduate experience, the students divide themselves into several groups. One group chooses to leave with an undergraduate degree, perhaps returning to school later to obtain a master's degree in engineering or business, or perhaps emphasizing a career in design management, marketing, or sales. A second group stays for a master's degree, leaving with the skills to be long-term design professionals. The third group stays for a doctorate, and becomes the cadre of technical experts who are pre-pared to tackle the difficult technical challenges and carry forward the core technologies.
CASE: Analysis and Design Tools
Authors: Paul W. Oman
Venue: IEEE Software (1990)

Computer-aided software engineering (CASE) tools are defined, and ten CASE tools are briefly overviewed. Individual presentations on the various tools follow. The focus is on structured analysis, design, and programming. Two of the tools (Cradle and JSP Workbench) are implementations of the Yourdon and Jackson methods for structured analysis, structured design, and programming; three tools (Time Bench, Card Tools, and Prosa) are for real-time systems development; four (Excelerator, Adagen, Smart System, and Software Through Pictures) are general-purpose front-end CASE tools and one (Virtual Software Factory) is a CASE tool for building CASE tools.
Using Paths to Measure, Explain, and Enhance Program Behavior
Authors: Thomas Ball, James R. Larus
Venue: Computer (2000)

What happens when a computer program runs? The answer can be frustratingly elusive, as anyone who has debugged or tuned a program knows. As it runs, a program overwrites its previous state, which might have provided a clue as to how the program got to the point at which it computed the wrong answer or otherwise failed. This all-too-common experience is symptomatic of a more general problem: the difficulty of accurately and efficiently capturing and analyzing the sequence of events that occur when a program executes. Program paths offer an insight into a program's dynamic behavior that is difficult to achieve any other way. Unlike simpler measures such as program profiles, which aggregate information to reduce the cost of collecting or storing data, paths capture some of the usually invisible dynamic sequencing of statements. This work exploits the insight that program statements do not execute in isolation, but are typically correlated with the behavior of previously executed code.
On Mapping Systolic Algorithms onto the Hypercube
Authors: O. H. Ibarra, S. M. Sohn
Venue: IEEE Transactions on Parallel and Distributed Systems (1990)

Consideration is given to the problem of mapping systolic array algorithms into efficient algorithms for a fixed-size hypercube architecture. The authors describe in detail several optimal implementations of algorithms given for one-way one- and two-dimensional systolic arrays. Since interprocessor communication is many times slower than local computation in parallel computers built to date, the problem of efficient communication is specifically addressed for these mappings. In order to validate the technique experimentally, five systolic algorithms were mapped in various ways onto a 64-node NCUBE/7 MIMD hypercube machine. The algorithms are for the following problems: the shuffle scheduling problem, finite impulse response filtering, linear context-free language recognition, matrix multiplication, and computing the Boolean transitive closure. Experimental evidence indicates that good performance is obtained for the mappings.
Analog DFT Using an Undersampling Technique
Authors: Ralph Mason, Shing Ma
Venue: IEEE Design Test (1999)

This article presents a novel approach to analog DFT, based on wide-band undersampling techniques similar to those used in sampling oscilloscopes and mixed signal IC testers. What is unique is that multiple samplers are constructed on-chip, where the signals being tested can be mixed down to a lower frequency before being brought off-chip. Using this approach the frequency response limitations of the off-chip driver can be avoided and access to multiple internal nodes can be provided with only a few external pins. Other advantages include small silicon overhead, low power consumption, and potential for automated analog DFT. We illustrated the utility of the procedure by measuring the frequency response, slew rate, and transient response characteristics for an on-chip unity gain CMOS operation amplifier.
Mining Multiple-Level Association Rules in Large Databases
Authors: Jiawei Han, Yongjian Fu
Venue: IEEE Transactions on Knowledge and Data Engineering (1999)

A top-down progressive deepening method is developed for efficient mining of multiple-level association rules from large transaction databases based on the Apriori principle. A group of variant algorithms is proposed based on the ways of sharing intermediate results, with the relative performance tested and analyzed. The enforcement of different interestingness measurements to find more interesting rules, and the relaxation of rule conditions for finding ¿level-crossing¿ association rules, are also investigated in the paper. Our study shows that efficient algorithms can be developed from large databases for the discovery of interesting and strong multiple-level association rules.
Self-assembly patterning of epitaxial CoSi2 wires
Authors: P. Kluth, Q. T. Zhao, S. Winnerl, S. Mantl
Venue: Microelectronic Engineering (2002)

We have investigated a self-assembly process for patterning epitaxial CoSi2 nanowires using local oxidation of silicides (LOCOSI). This involves single-crystalline, epitaxial CoSi2 grown on Si(100) by molecular beam allotaxy (MBA). A mask consisting of 20 nm SiO2 and 400 nm Si3N4, deposited by plasma enhanced chemical vapor deposition (PECVD) and patterned with conventional optical lithography, induces a stress field near its edges into the underlying CoSi2 /Si heterostructure. A rapid thermal oxidation step leads to the separation of the CoSi2 layer in this region due to the concomitant anisotropic diffusion of the cobalt atoms in the stress field. Etching back the oxide underneath the nitride shifts the stress field underneath the mask leading to the formation of homogeneous silicide wires along the mask during a second oxidation step. Using this new approach, continuous wires with a minimum width of approximately 80 nm were observed.
Redefining Clustering for High-Dimensional Applications
Authors: C. C. Aggarwal, P. S. Yu
Venue: IEEE Transactions on Knowledge and Data Engineering (2002)

Clustering problems are well-known in the database literature for their use in numerous applications, such as customer segmentation, classification, and trend analysis. High-dimensional data has always been a challenge for clustering algorithms because of the inherent sparsity of the points. Recent research results indicate that, in high-dimensional data, even the concept of proximity or clustering may not be meaningful. We introduce a very general concept of projected clustering which is able to construct clusters in arbitrarily aligned subspaces of lower dimensionality. The subspaces are specific to the clusters themselves. This definition is substantially more general and realistic than the currently available techniques which limit the method to only projections from the original set of attributes. The generalized projected clustering technique may also be viewed as a way of trying to redefine clustering for high-dimensional applications by searching for hidden subspaces with clusters which are created by interattribute correlations. We provide a new concept of using extended cluster feature vectors in order to make the algorithm scalable for very large databases. The running time and space requirements of the algorithm are adjustable and are likely to trade-off with better accuracy.