ppxscal/embedding_network huggingface dataset:
Arithmetic for Ultra-High-Speed Tomography
Authors: E. E. ,  Jr. Swartzlander
Venue: IEEE Transactions on Computers (1980)

The first of a new generation of high performance X-ray computed tomographic (CT) machines, the Dynamic Spatial Reconstructor, imposes a requirement for digital signal processing rates which are 3-4 orders of magnitude greater than the capability of current X-ray computed tomography processors. To solve the large-scale computational problems for this and similar CT units which are currently under development, three candidate arithmetic implementations of ultra-high-speed convolutional filtering and weighted linear summation algorithms have been developed and compared. Since both convolution and weighted summation are performed via the inner product operation, which is the basis for most digital signal processing algorithms, the results are widely applicable. The three arithmetic approaches are a two's complement modular array, a merged arithmetic module, and a sign/logarithm convolver. A figure of merit, which relates processing speed to complexity, is used to compare the three arithmetic approaches. It is demonstrated that processing rates in the billions of multiply-add operations per second may be realized with special-purpose processors of moderate complexity.
Timing-aware cell layout de-compaction for yield optimization by critical area minimization
Authors: Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada
Venue: IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2007)

This paper proposes a yield optimization method for standard cells under timing constraints. Yield-aware logic synthesis and physical optimization require yield enhanced standard cells and the proposed method automatically creates yield enhanced cell layouts by decompacting the original cell layout using linear programming. We develop a novel accurate linear delay model which approximates the difference from the original delay and use this model to formulate the timing constraints into linear programming. Experimental results show that the proposed method can pick up the yield variants of a cell layout from the tradeoff curve of cell delay versus critical area and is used to create the yield enhanced cell library which is essential to realize yield-aware VLSI design flows.
Flow-Through-Queue based Power Management for Gigabit Ethernet Controller
Authors: Hwisung Jung, Andy Hwang, Massoud Pedram
Venue: Proceedings of the 2007 Asia and South Pacific Design Automation Conference (2007)

This paper presents a novel architectural mechanism and a power management structure for the design of an energy-efficient Gigabit Ethernet controller. Key characteristics of such a controller are low-latency and high-bandwidth required to meet the pressing demands of extremely high frame and control data, which in turn cause difficulties in managing power dissipation. We propose a flow-through-queue (FTQ) based power management method, which allows some of the tasks involved in processing the frame data to be offloaded. This in turn enables utilization of multiple clock rates and multiple voltages for different cores inside the Ethernet controller. A modeling approach based on semi-Markov decision process (SMDP) and queuing models is employed, which allow one to apply mathematical programming formulations for energy optimization under performance constraints. The proposed Gigabit Ethernet controller is designed with a 130nm CMOS technology that includes both high and low threshold voltages. Experimental results show that the proposed power optimization method can achieve system-wide energy savings under tighter performance constraints.
Computers as Ethical Artifacts
Authors: Nathan Ensmenger
Venue: IEEE Annals of the History of Computing (2007)

Historians of computing have many ways in which they can effectively engage with the popular interest in the social dimensions of computing without compromising the scholarly integrity of our work. There are two simple ways in which historians can fruitfully and responsibly engage with social and ethical questions.
Non-intrusive quality evaluation of VoIP using genetic programming
Authors: Adil Raja, R. Muhammad Atif Azad, Colin Flanagan, Dorel Picovici, Conor Ryan
Venue: Proceedings of the 1st international conference on Bio inspired models of network, information and computing systems (2006)

Packet loss is bursty in nature and it affects the quality of VoIP adversely. In this article a novel approach based on Genetic Programming (GP) has been presented that maps the effect of bursty packet loss on listeners' perception of speech quality. The ITU-T P.862 (PESQ) algorithm is used as a reference model in this research. A simplistic non-linear model for effective VoIP quality estimation has been proposed. The performance of the model shows a high correlation with the PESQ algorithm. In the light of current and related research it has also been shown that PESQ does not model the effect of bursty packet loss on speech quality. However, as a good approximation to PESQ the proposed model is suitable for reliable, real-time and continuous evaluation of VoIP calls. It is also claimed that it is conveniently deployable on a wide variety of hardware platforms.
The IEEE Softwae Engineering Stanldards Process
Authors: Fletcher Buckley
Venue: IEEE Micro (1984)

This review of ongoing standards development highlights the interaction between the IEEE standards-making process and the norms of professional practice in software engineering.
Semantics Retrieval by Fuzzy Spatial Context of Image Objects
Authors: Hui Liu, Jun Ma, Jing-sheng Lei, Ling Song
Venue: Proceedings of the Fourth International Conference on Fuzzy Systems and Knowledge Discovery - Volume 04 (2007)

Modeling spatial context (e.g., autocorrelation) is a key challenge in classification and retrieval problems in image processing. In order to cope with the ambiguity of spatial relative position concepts, a new definition of the relative position between two objects in a fuzzy set framework is proposed according to traditional Markov Random Field (MRF). This definition is based on a fuzzy pattern-matching approach, and consists of comparing an object to a fuzzy set representing the degree of position satisfaction to a reference object. Fuzzy Attributed Relational Graphs (FARGs) are used in this framework to evaluate the similarity between two images. Finally, we compare the image retrieval performance in several standard measures with MRF and FGM.
Integrated Site Security for Grid; an initiative to cover security beyond the Grid
Authors: Bruno Hoeft, Ursula Epting
Venue: Proceedings of the 2007 IFIP International Conference on Network and Parallel Computing Workshops (2007)

While many fields relevant to Grid security are already covered by existing working groups, their remit rarely goes beyond the scope of the Grid infrastructure itself. However, security issues pertaining to the internal setup of compute centres have at least as much impact on Grid security. Thus, the EU ISSeG project (Integrated Site Security for Grids) will briefly presented. To complement groups such as Operational Security Coordination Team and Joint Security Policy Group, the purpose of ISSeG is to provide a holistic approach to security for Grid computer centres, from strategic considerations to an implementation plan and its practical deployment. The generalised methodology of Integrated Site Security based on the knowledge gained during its implementation at several sites as well as through security audits will be discussed. Furthermore, the web-based ISSeG training material will be introduced. This aims to offer ISS recommendations and implementation guidance to other Grid installations in order to help avoid common pitfalls.
A Novel Anti-Collision Algorithm with Optimal Frame Size for RFID System
Authors: Inwhee Joe, Juno Lee
Venue: Proceedings of the 5th ACIS International Conference on Software Engineering Research, Management & Applications (2007)

In this paper, we propose a novel anti-collision algorithm for Generation 2 RFID system to estimate the number of tags and to use the optimal frame size. Depending on the number of tags, there exists the optimal frame size in the sense that the system efficiency is maximized. The number of tags can be estimated from the collision ratio in terms of collided slots per frame. In addition, we compare our proposed algorithm with other existing schemes by simulation. The proposed scheme is easy to implement, and the simulation results show that its performance improves significantly compared to other schemes in terms of the identification time and the number of consumed slots.
Risk Evaluation for Host System Based on Theory of Evidence
Authors: Li Chun-yan, Guo Yi-zun
Venue: Proceedings of the Eighth ACIS International Conference on Software Engineering, Artificial Intelligence, Networking, and Parallel/Distributed Computing - Volume 01 (2007)

Bring forwards a new approach to evaluate the secure level for a host system. Kernel files of OS is frangible against intruders and virus, we can log suspicious events that access the kernel, and the threaten level of each event can be defined. By mining and analyzing the data in log, using the theory of evidence, we can calculate the risk level for the whole host system. On the base of the evaluation result, the administrator can decide to enhance or lower the host defense level.
Interconnect lifetime prediction for reliability-aware systems
Authors: Zhijian Lu, Wei Huang, Mircea R. Stan, Kevin Skadron, John Lach
Venue: IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2007)

Thermal effects are becoming a limiting factor in high-performance circuit design due to the strong temperature dependence of leakage power, circuit performance, IC package cost, and reliability. While many interconnect reliability models assume a constant temperature, this paper analyzes the effects of temporal and spatial thermal gradients on interconnect lifetime in terms of electromigration, and presents a physics-based dynamic reliability model which returns reliability equivalent temperature and current density that can be used in traditional reliability analysis tools. The model is verified with numerical simulations and reveals that blindly using the maximum temperature leads to too pessimistic lifetime estimation. Therefore, the proposed model not only increases the accuracy of reliability estimates, but also enables designers to reclaim design margin in reliability-aware design. In addition, the model is useful for improving the performance of temperature-aware runtime management by modeling system lifetime as a resource to be consumed at a stress-dependent rate.
PISA: P2P Wi-Fi Internet Sharing Architecture
Authors: Tobias Heer, Shaohui Li, Klaus Wehrle
Venue: Proceedings of the Seventh IEEE International Conference on Peer-to-Peer Computing (2007)

The demand for cheap broadband Internet for nomadic users has created a market for Internet sharing. Wi- Fi communities which allow their users to share their wired Internet connections have emerged and become increasingly popular. Organizations like FON promise to provide free wireless Internet access in many places. However, user authentication is the Achilles heel of these systems. A user that allows other community members to use its access point must expect to be held responsible for other users' actions. Moreover, these Wi-Fi sharing systems are often insecure which allows eavesdroppers to gather sensitive information on the wireless link. This work provides efficient, scalable, and secure access control for large Wi-Fi sharing systems. The Host Identity Protocol (HIP) is used as a building block for a solution which supports strong user authentication as well as mobility support for nomadic users. In our presentation, we show the feasibility and effectiveness of this approach by demonstrating the PISA authentication protocol in action.
The Honeywell Experimental Distributed Processor - an Overview
Authors: E. D. Jensen
Venue: Computer (1978)

The Honeywell Experimental Distributed Processor (HXDP) is a vehicle for research in the science and engineering of processor interconnection, executive control, and user software for a certain class of multiple-processor computers which we call "distributed computer" systems. Such systems are very unconventional in that they accomplish total system-wide executive control in the absence of any centralized procedure, data, or hardware. The primary benefits sought by this research are improvements over more conventional architectures (such as multiprocessors and computer networks) in extensibility, integrity, and performance. A fundamental thesis of the HXDP project is that the benefits and cost-effectiveness of distributed computer systems depend on the judicious use of hardware to control software costs.
Linear feature extraction by integrating pairwise and global discriminatory information via sequential forward floating selection and kernel QR factorization with column pivoting
Authors: Chin-Chun Chang, Tzung-Ying Lin
Venue: Pattern Recognition (2008)

Linear discriminant analysis (LDA) is often used to produce an effective linear feature extractor for classification. However, some approaches of LDA, such as Fisher's linear discriminant, are not robust to outlier classes. In this paper, a novel approach is proposed to robustly produce an effective linear feature extractor by integrating the discriminatory information from the global and pairwise approaches of LDA. The discriminatory information is integrated either by the sequential forward floating selection algorithm with a criterion function based on the Chernoff bound or by ranking the discriminatory information using the kernel QR factorization with column pivoting according to the indication of an applicability index for these two methods. The proposed approach was compared to various methods of LDA. The experimental results have shown the robustness of the proposed approach and proved the feasibility of the proposed approach.
Interconnection Networks for SIMD Machines
Authors: H. J. Siegel
Venue: Computer (1979)

Many SIMD interconnection networks have been proposed. To put the different approaches into perspective, this analysis compares a number of single- and multistage networks.
Nonlinear Intrinsic Dimensionality Computations
Authors: Chiu Kuan Chen
Venue: IEEE Transactions on Computers (1974)

In pattern recognition, the raw data and dimensionality of the measurement space is usually very large. Therefore, some form of dimensionality reduction has been commonly considered as a practical preprocessing method for feature selection. Based on a method that increases the variance while maintaining local structure, a technique is developed to determine intrinsic dimensionality. A cost function is introduced to guide the maintenance of the rank order and therefore local structure. Two criteria of using the cost function to increase the variance have been introduced. Several methods of defining the local regions are suggested. A program is implemented and tested to find the intrinsic dimensionality of a variety of experimental data.
A Hybrid Genetic Algorithm with Critical Primary Inputs Sharing and Minor Primary Inputs Bits Climbing for Circuit Maximum Power Estimation
Authors: Zhixin Tian, Yongpan Liu, Huazhong Yang, Hui Wang
Venue: Proceedings of the Third International Conference on Natural Computation - Volume 04 (2007)

With continuously shrinking of ICs device feature sizes, input pattern dependent maximum power in a clock cycle (CMP) for digital circuit has become a challenging issue in power network verification and optimization. In this paper, a novel hybrid genetic algorithm (HGA) that takes advantages of critical primary inputs sharing and minor primary inputs bits climbing is proposed for CMP estimation. Critical and minor primary inputs are defined based on their possible contribution to CMP, which is defined as the fitness value for the input vector pair. Compared with simple genetic algorithm, our method achieves up to 25.7% improvement on CMP estimation for ISCAS85 benchmark circuits with a faster convergence speed and less than 6% computation overhead in average.
Time Bounds on Space Computations
Authors: M. L. Dertouzos
Venue: IEEE Transactions on Computers (1973)

A physicomathematical basis is used to establish bounds TD(n) on the time needed to compute n-argument functions by spatially distributed primitive devices or composite systems D. The axioms used concern the speed, packing density, and noise threshold of the energy with which any computing device detects or alters the physical representation of information. The principal result is that
Applying an analysis of acted vocal emotions to improve the simulation of synthetic speech
Authors: Iain R. Murray, John L. Arnott
Venue: Computer Speech and Language (2008)

All speech produced by humans includes information about the speaker, including conveying the emotional state of the speaker. It is thus desirable to include vocal affect in any synthetic speech where improving the naturalness of the speech produced is important. However, the speech factors which convey affect are poorly understood, and their implementation in synthetic speech systems is not yet commonplace. A prototype system for the production of emotional synthetic speech using a commercial formant synthesiser was developed based on vocal emotion descriptions given in the literature. This paper describes work to improve and augment this system, based on a detailed investigation of emotive material spoken by two actors (one amateur, one professional). The results of this analysis are summarised, and were used to enhance the existing emotion rules used in the speech synthesis system. The enhanced system was evaluated by naive listeners in a perception experiment, and the simulated emotions were found to be more realistic than in the original version of the system.
An incremental learning framework for estimating signal controllability in unit-level verification
Authors: Charles H.-P. Wen, Li-C. Wang, Jayanta Bhadra
Venue: Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design (2007)

Unit-level verification is a critical step to the success of full-chip functional verification for microprocessor designs. In the unit-level verification, a unit is first embedded in a complex software that emulates the behavior of surrounding units, and then a sequence of stimuli is applied to measure the functional coverage. In order to generate such a sequence, designers need to comprehend the relationship between boundaries at the unit under verification and at the inputs to the emulation software. However, figuring out this relationship can be very difficult. Therefore, this paper proposes an incremental learning framework that incorporates an ordered-binary-decision-forest(OBDF) algorithm, to automate estimating the controllability of unit-level signals and to provide full-chip level information for designers to govern these signals. Mathematical analysis shows that the proposed OBDF algorithm has lower model complexity and lower error variance than the previous algorithms. Meanwhile, a commercial microprocessor core is also applied to demonstrate that controllability of input signals on the load/store unit in the microprocessor core can be estimated automatically and information about how to govern these signals can also be extracted successfully.
Authors Reply2
Authors: G. Hannington
Venue: IEEE Transactions on Computers (1978)

McCrea, Maxwell, and Baker have commented upon the absence of any residue registers in our machine. It must be pointed out that the system under discussion was developed in 1974 to provide "test-bed" facilities for further experimental work. In fact, we have since applied residue retention techniques to the system to obtain greater precision. However, it is timely for McCrea et al. to draw attention to their more recently published work.
Balancing performance and data freshness in web database servers
Authors: Alexandros Labrinidis, Nick Roussopoulos
Venue: Proceedings of the 29th international conference on Very large data bases - Volume 29 (2003)

Personalization, advertising, and the sheer volume of online data generate a staggering amount of dynamic web content. In addition to web caching, View Materialization has been shown to accelerate the generation of dynamic web content. View materialization is an attractive solution as it decouples the serving of access requests from the handling of updates. In the context of the Web, selecting which views to materialize must be decided online and needs to consider both performance and data freshness, which we refer to as the Online View Selection problem. In this paper, we define data freshness metrics, provide an adaptive algorithm for the online view selection problem, and present experimental results.
Speech-driven embodied entrainment character system with hand motion input in mobile environment
Authors: Kouzi Osaki, Tomio Watanabe, Michiya Yamamoto
Venue: Proceedings of the 9th international conference on Multimodal interfaces (2007)

InterActor is a speech-input-driven CG-embodied interaction character that can generate communicative movements and actions for entrained interactions. InterPuppet, on the other hand, is an embodied interaction character that is driven by both speech input-similar to InterActor-and hand motion input, like a puppet. Therefore, humans can use InterPuppet to effectively communicate by using deliberate body movements and natural communicative movements and actions. In this paper, an advanced InterPuppet system that uses a cellular-phone-type device is developed, which can be used in a mobile environment. The effectiveness of the system is demonstrated by performing a sensory evaluation experiment in an actual remote communication scenario.
An Efficient ID-Based Restrictive Partially Blind Signature Scheme
Authors: Xiaoming Hu, Shangteng Huang
Venue: Proceedings of the Eighth ACIS International Conference on Software Engineering, Artificial Intelligence, Networking, and Parallel/Distributed Computing - Volume 03 (2007)

Many restrictive partially blind signatures have been proposed till now. But all existing restrictive partially blind signature schemes were constructed under certificate-based public key systems. Recently, Chen et al. proposed the first ID-based restrictive partially blind signature from bilinear pairings. However, the computational cost of their scheme is high. In this paper, we propose a new ID-based restrictive partially blind signature scheme. We analyze its efficiency and security. We claim that our scheme is simpler and more efficient than Chen et al.'s scheme. It also is provably secure in the random oracle model.
Overlay Bandwidth Management: Scheduling and Active Queue Management of Overlay Flows
Authors: Kalman Graffi, Konstantin Pussep, Sebastian Kaune, Aleksandra Kovacevic, Nicolas Liebau, Ralf Steinmetz
Venue: Proceedings of the 32nd IEEE Conference on Local Computer Networks (2007)

Peer-to-peer and mobile networks gained significant attention of both research community and industry. Applying the peer-to-peer paradigm in mobile networks lead to several problems regarding the bandwidth demand of peer-to-peer networks. Time-critical messages are delayed and delivered unacceptably slow. In addition to this, scarce bandwidth is wasted on messages of less priority. Therefore, the focus of this paper is on bandwidth management issues at the overlay layer and how they can be solved. We present HiPNOS.KOM, a priority based scheduling and active queue management system. It guarantees better QoS for higher prioritized messages in upper network layers of peerto- peer systems. Evaluation using the peer-to-peer simulator PeerfactSim.KOM shows that HiPNOS.KOM brings significant improvement in Kademlia in comparison to FIFO and Drop-Tail, strategies that are used nowadays on each peer. User initiated lookups have in Kademlia 24% smaller operation duration when using HiPNOS.KOM.