ppxscal/embedding_network huggingface dataset:
N-port memory mapping for LUT-based FPGAs
Authors: Zuo Wang, Feng Shi, Qi Zuo, Weixing Ji, Mengxiao Liu
Venue: Proceeding of the ACM/SIGDA international symposium on Field programmable gate arrays (2009)

As current FPGAs grow in logic capacity, they are widely used to implement entire systems. In some specific applications, such as our embedded multi-core processor TriBA[1],user memory models are not limited to single-port or dual-port. Thus, we need a cost-effective way to realize N-port memory on FPGA since most commercial products do not provide N-port physical arrays. In this paper, we propose a hierarchical N-port memory architecture for LUT-based FPGAs. The principle of this architecture is to create a two-level memory hierarchy formed by different resources. We map the memory resources inside LUTs as 1-port memory banks, and interleave these banks to create N-port L1 memory. We also interleave physical dual-port arrays to build N-port L2 memory. We also provide the data transfer between L1 and L2 memories and assume that such data transfer is managed by software control just like the strategy used by SPM. Compared to L1 memory, L2 memory has the advantage in cost and also has several disadvantages, such as longer access time and higher conflict probability. If most accesses are served by its L1 memory portion, hierarchical memory architecture will achieve both goals in cost and access time. We implement this architecture on Xilinx Virtex-II chips to measure its cost and also use the memory trace collected from multi-core simulator to measure its average access time. The product of cost and average access time shows that, hierarchical memory architecture is a cost-effective way to realize N-port memory on FPGA.
EnsembleMatrix: interactive visualization to support machine learning with multiple classifiers
Authors: Justin Talbot, Bongshin Lee, Ashish Kapoor, Desney S. Tan
Venue: Proceedings of the 27th international conference on Human factors in computing systems (2009)

Machine learning is an increasingly used computational tool within human-computer interaction research. While most researchers currently utilize an iterative approach to refining classifier models and performance, we propose that ensemble classification techniques may be a viable and even preferable alternative. In ensemble learning, algorithms combine multiple classifiers to build one that is superior to its components. In this paper, we present EnsembleMatrix, an interactive visualization system that presents a graphical view of confusion matrices to help users understand relative merits of various classifiers. EnsembleMatrix allows users to directly interact with the visualizations in order to explore and build combination models. We evaluate the efficacy of the system and the approach in a user study. Results show that users are able to quickly combine multiple classifiers operating on multiple feature sets to produce an ensemble classifier with accuracy that approaches best-reported performance classifying images in the CalTech-101 dataset.
An evaluation of the TRIPS computer system
Authors: Mark Gebhart, Bertrand A. Maher, Katherine E. Coons, Jeff Diamond, Paul Gratz, Mario Marino, Nitya Ranganathan, Behnam Robatmili, Aaron Smith, James Burrill, Stephen W. Keckler, Doug Burger, Kathryn S. McKinley
Venue: ACM SIGPLAN Notices (2009)

The TRIPS system employs a new instruction set architecture (ISA) called Explicit Data Graph Execution (EDGE) that renegotiates the boundary between hardware and software to expose and exploit concurrency. EDGE ISAs use a block-atomic execution model in which blocks are composed of dataflow instructions. The goal of the TRIPS design is to mine concurrency for high performance while tolerating emerging technology scaling challenges, such as increasing wire delays and power consumption. This paper evaluates how well TRIPS meets this goal through a detailed ISA and performance analysis. We compare performance, using cycles counts, to commercial processors. On SPEC CPU2000, the Intel Core 2 outperforms compiled TRIPS code in most cases, although TRIPS matches a Pentium 4. On simple benchmarks, compiled TRIPS code outperforms the Core 2 by 10% and hand-optimized TRIPS code outperforms it by factor of 3. Compared to conventional ISAs, the block-atomic model provides a larger instruction window, increases concurrency at a cost of more instructions executed, and replaces register and memory accesses with more efficient direct instruction-to-instruction communication. Our analysis suggests ISA, microarchitecture, and compiler enhancements for addressing weaknesses in TRIPS and indicates that EDGE architectures have the potential to exploit greater concurrency in future technologies.
Constructing intelligent living-space controlling system with blue-tooth and speech-recognition microprocessor
Authors: Chun-Liang Hsu
Venue: Expert Systems with Applications: An International Journal (2009)

This study is a creative and initial work focused on designing an intelligent living-space with automatic control system to control all home-appliances in the living-space. First of all, the system was constructed with two parts; one is remote-control mechanism with blue-tooth (BT) module mounting on both master controller module (remote-controller) and slave receiver module (on every home appliance), the other is to design the remote-controller with speech-recognition and function of self-learning human voice so that people could directly give command to control appliances Therefore, the technique of BT communication and speech-recognition microprocessor became the most important in this study. After implementing the finished projects, the whole system was proved to be great successful and the final result of this research has achieved both National patent authorized by Patent Bureau of Taiwan Economy Ministry, and The First Prize of National Award of Practical Projects Design authorized by Taiwan Education Ministry.
Emotion recognition using brain activity
Authors: Robert Horlings Dragos Datcu Leon J. M. Rothkrantz
Venue: Proceedings of the 9th International Conference on Computer Systems and Technologies and Workshop for PhD Students in Computing (2008)

Our project focused on recognizing emotion from human brain activity, measured by EEG signals. We have proposed a system to analyze EEG signals and classify them into 5 classes on two emotional dimensions, valence and arousal. This system was designed using prior knowledge from other research, and is meant to assess the quality of emotion recognition using EEG signals in practice. In order to perform this assessment, we have gathered a dataset with EEG signals. This was done by measuring EEG signals from people that were emotionally stimulated by pictures. This method enabled us to teach our system the relationship between the characteristics of the brain activity and the emotion. We found that the EEG signals contained enough information to separate five different classes on both the valence and arousal dimension. However, using a 3-fold cross validation method for training and testing, we reached classification rates of 32% for recognizing the valence dimension from EEG signals and 37% for the arousal dimension. Much better classification rates were achieved when using only the extreme values on both dimensions, the rates were 71% and 81%.
A More Compact Representation of XTR Cryptosystem
Authors: Masaaki Shirase, Dong-Guk Han, Yasushi Hibino, Howon Kim, Tsuyoshi Takagi
Venue: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences (2008)

XTR is one of the most efficient public-key cryptosystems that allow us to compress the communication bandwidth of their ciphertext. The compact representation can be achieved by deploying a subgroup Fq2 of extension field Fq6, so that the compression ratio of XTR cryptosystem is 1/3. On the other hand, Dijk et al. proposed an efficient public-key cryptosystem using a torus over Fq30 whose compression ratio is 4/15. It is an open problem to construct an efficient public-key cryptosystem whose compression ratio is smaller than 4/15. In this paper we propose a new variant of XTR cryptosystem over finite fields with characteristic three whose compression ratio is 1/6. The key observation is that there exists a trace map from Fq6 to Fq in the case of characteristic three. Moreover, the cost of compression and decompression algorithm requires only about 1% overhead compared with the original XTR cryptosystem. Therefore, the proposed variant of XTR cryptosystem is one of the fastest public-key cryptosystems with the smallest compression ratio.
View-Rules and Representations: A Framework for Dynamic Control of Multimedia in Virtual Environments
Authors: Allen Ginsberg
Venue: Proceedings of the IEEE International Conference on Multimedia Computing and Systems - Volume 2 (1999)

Folding multimedia capabilities into virtual environments is a key driver of future applications. But providing flexible and user-customizable solutions is problematic. In this paper we describe a framework, called AlphaOmega that enables designer/user definition and control of the representational aspects of objects used in applications. Powerful changes in an application?s interface and behavior can be achieved by such means. We show the relevance of this work to multimedia by giving concrete examples using a distance learning virtual environment called PERSYST.
Vibrapass: secure authentication based on shared lies
Authors: Alexander De Luca, Emanuel von Zezschwitz, Heinrich Hußmann
Venue: Proceedings of the 27th international conference on Human factors in computing systems (2009)

Authentication in public spaces is a risky task. Frauds on cash machines (ATMs) are not uncommon nowadays. The biggest group of attacks is observation attacks, which focus on recording the input done by the users. In this work, we present VibraPass, a system created to be resilient against observation attacks using tactile feedback provided by the users' own mobile devices. In this way, secret information is shared between the terminal and the users to add an over-head of 'lies' to the input which makes it hard for attackers to steal the real PIN or password. We present an evaluation, which shows that VibraPass has the potential to replace current authentication systems due to increased security combined with reasonable input speed and error rates.
Approximability and Parameterized Complexity of Minmax Values
Authors: Kristoffer Arnsfelt Hansen, Thomas Dueholm Hansen, Peter Bro Miltersen, Troels Bjerre Sørensen
Venue: Proceedings of the 4th International Workshop on Internet and Network Economics (2008)

We consider approximating the minmax value of a multi-player game in strategic form. Tightening recent bounds by Borgs et al., we observe that approximating the value with a precision of &epsilon;logn digits (for any constant &epsilon;>&thinsp;0) is NP-hard, where n is the size of the game. On the other hand, approximating the value with a precision of c loglogn digits (for any constant c&thinsp;&ge;&thinsp;1) can be done in quasi-polynomial time. We consider the parameterized complexity of the problem, with the parameter being the number of pure strategies k of the player for which the minmax value is computed. We show that if there are three players, k&thinsp;=&thinsp;2 and there are only two possible rational payoffs, the minmax value is a rational number and can be computed exactly in linear time. In the general case, we show that the value can be approximated with any polynomial number of digits of accuracy in time n O(k). On the other hand, we show that minmax value approximation is W[1]-hard and hence not likely to be fixed parameter tractable. Concretely, we show that if k-Clique requires time n &Omega;(k) then so does minmax value computation.
A simple and efficient approximation of a Bézier piece by its cutdown polygon
Authors: Ren-Jiang Zhang, Weiyin Ma
Venue: Computer Aided Geometric Design (2009)

A new concept named the cutdown polygon is introduced for a Bezier piece approximation. The cutdown polygon is constructed by directly connecting some selected control points of the Bezier piece. Based on the proposed approximation, we obtained two explicit quantitative bounds. Apart from the degree of the polynomial, the two bounds depend only on the maximal absolute second differences or the sum of absolute second differences of the sequence of control points, respectively. Compared with control polygon approximation, the key advantage of using the cutdown polygon is that the edge number can be dramatically reduced to about one half of that using control polygon approximation or less while maintaining the same estimate bound.
Lower and upper bounds for a capacitated plant location problem with multicommodity flow
Authors: Jinfeng Li, Feng Chu, Christian Prins
Venue: Computers and Operations Research (2009)

In this paper, we introduce a capacitated plant location problem with multicommodity flow. Given a set of potential plant sites and a set of capacitated arcs linking plants, transshipment points and customers, the aim is to determine where to locate plants and how to move flows from open plants to customers through a set of transshipment points. This model extends the classical capacitated plant location problem by introducing a multicommodity flow problem in the distribution issue. The combination of the location problem and the flow distribution problem is reasonable and realistic since both of them belong to strategic planning horizons. We propose a Lagrangean-based method, including a Lagrangean relaxation, a Lagrangean heuristic and a subgradient optimization, to provide lower and upper bounds of the model. Then, we employ a Tabu search to further improve upper bounds provided by the Lagrangean procedure. The computational results demonstrate that our solution method is effective since gaps between the upper and lower bound are on average around 2%.
Introduction to Neural Networks for Java, 2nd Edition, 2nd edition
Authors: Jeff Heaton
Venue:  (2008)

Introduction to Neural Networks with Java, Second Edition, introduces the Java programmer to the world of Neural Networks and Artificial Intelligence. Neural network architectures, such as the feedforward, Hopfield, and self-organizing map architectures are discussed. Training techniques, such as backpropagation, genetic algorithms and simulated annealing are also introduced. Practical examples are given for each neural network. Examples include the traveling salesman problem, handwriting recognition, financial prediction, game strategy, mathematical functions, and Internet bots. All Java source code is available online for easy downloading.
A reconfigurable ASIP for convolutional and turbo decoding in an SDR environment
Authors: Timo Vogt, Norbert Wehn
Venue: IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2008)

Future mobile and wireless communication networks require flexible modem architectures to support seamless services between different network standards. Hence, a common hardware platform that can support multiple protocols implemented or controlled by software, generally referred to as software defined radio (SDR), is essential. This paper presents a family of dynamically reconfigurable application-specific instruction-set processors (ASIPs) for channel coding in wireless communication systems. As a weakly programmable intellectual property (IP) core, it can implement trellis-based channel decoding in a SDR environment. It features binary convolutional decoding, and turbo decoding for binary as well as duobinary turbo codes for all current and upcoming standards. The ASIP consists of a specialized pipeline with 15 stages and a dedicated communication and memory infrastructure. Logic synthesis revealed a maximum clock frequency of 400 MHz and an area of 0.11 mm2 for the processor's logic using a low power 65-nm technology. Memories require another 0.31 mm2. Simulation results for Viterbi and turbo decoding demonstrate maximum throughput of 196 and 34 Mb/s, respectively. The ASIP hence outperforms state-of-the-art decoder architectures targeting software defined radio by at least a factor of three while consuming only 60 % or less of the logic area.
Proceedings of the 3rd International Conference on Ubiquitous Information Management and Communication
Venue: Conference On Ubiquitous Information Management And Communication (2009)

It may be said that modern information technology rests on three technology pillars: semiconductor technology, communications technology, and information processing software technology. During the past two decades there have been tremendous advances in all three pillars and their unrelenting convergence that have brought us significantly closer to the realization of the long-envisioned dream of an information society in which anyone can access the cumulative knowledge of the mankind inexpensively from anywhere at any time, namely that of a ubiquitous information age. The aim of the Second International Conference on Ubiquitous Information Management and Communication (ICUIMC-2009) is to provide a forum for the exchange of ideas and information, for cultivating opportunities for collaborative research, and for fostering friendship among researchers in key technology hotbeds in the Asia Pacific region engaged in various facets of information management and communications technologies appropriate for ubiquitous computing and application environments. The technical program of ICUIMC-2009 includes 106 papers: 10 invited papers, 68 refereed regular papers (27 from Korea and 41 from outside of Korea), and 28 refereed short papers (18 from Korea and 10 from outside of Korea). The acceptance rate for regular papers was 30%. The number of countries represented in the technical program is 7.
Performance of multimedia presentation with branches by synchronized multimedia integration language
Authors: Yordan Shterev
Venue: Proceedings of the 9th International Conference on Computer Systems and Technologies and Workshop for PhD Students in Computing (2008)

This paper introduces a synchronization rule, which has been applied on multimedia presentation with tree-type branches and with reverting to the main presentation and has been used in time structures of Synchronized Multimedia Integrated Language. The synchronization rules for language presentation with branches have been inferred and the synchronization time line has been presented.
A Case Study on Government Procurement Processes Identifying
Authors: Ranzhe Jing, Jianwei Yu
Venue: Proceedings of the 2009 Second International Workshop on Knowledge Discovery and Data Mining (2009)

Government procurement is becoming a kind of important economic activity now, government procurement includes the procurement activities such as procurement mode and procurement process, it is a complex system engineering which includes commerce activity and administration activity. With the increase of government procurement operation, the management of government procurement will become very onerous. In order to achieve the targets of government procurement, government procurement is considered as one of the significant economic activities that can reflect the function of government processes reengineering synthetically, then how-to identify processes in anfractuous government procurement processes is a chief precondition of implementing government procurement processes reengineering, this paper puts forward the methods of activities identifying and processes identifying to analyze the relationships among processes, it uses a case study methodology grounded in system engineering theory to analyze an application in government procurement processes.
Towards Partial Order Reduction for Model Checking Temporal Epistemic Logic
Authors: Alessio Lomuscio, Wojciech Penczek, Hongyang Qu
Venue: Model Checking and Artificial Intelligence: 5th International Workshop, MoChArt 2008, Patras, Greece, July 21, 2008. Revised Selected and Invited Papers (2009)

We introduce basic partial order reduction techniques in a temporal-epistemic setting. We analyse the semantics of interpreted systems with respect to the notions of trace-equivalence for the epistemic linear time logic LTLK¿ X .
Tangible interaction with real and virtual products: designing a shopping assistant for rural communities
Authors: Michael Schmitz, Homeira Quraischy
Venue: Proceedings of the 3rd International Conference on Tangible and Embedded Interaction (2009)

This work describes the design and development process of an interactive ordering system for rural corner stores, extending the limited assortment of a small store with virtual items on touch-sensitive displays embedded into shelves. The interface blends tangible interaction of both real products in a shelf and virtual products iconically represented on nearby screens. The tangible interaction component is complemented by a natural language interface, supporting comparison and inspection of multiple products of the real and virtual world.
Parallelization spectroscopy: analysis of thread-level parallelism in hpc programs
Authors: Arun Kejariwal, Calin Casçaval
Venue: ACM SIGPLAN Notices (2009)

In this paper, we present a method - parallelization spectroscopy - for analyzing the thread-level parallelism available in production High Performance Computing (HPC) codes.We survey a number of techniques that are commonly used for parallelization and classify all the loops in the case study presented using a sensitivity metric: how likely is a particular technique is successful in parallelizing the loop.
Experiences of an electronic mail vendor
Authors: Jeffrey B. Holden
Venue: Proceedings of the May 19-22, 1980, national computer conference (1980)

Computer Message Systems (CMS) are a relatively new phenomenon (5--6 years) and are the result of work done in the Time Sharing Services industry, computer networks, and Advanced Research Projects Agency R&D activities. Computer Message Systems use the computer as an integral component of human communication.
An Automatic and Robust Method for Microarray Image Analysis and the Related Information Retrieval for Microarray Databases
Authors: Wei-Bang Chen, Chengcui Zhang, Wen-Lin Liu
Venue: Proceedings of the 2007 IEEE 23rd International Conference on Data Engineering Workshop (2007)

DNA microarray is an increasingly important technique that allows biologists to monitor expression levels of thousands of genes in parallel. This technique is widely used in biological research for studying genomic aberrations in cancer and other genetic diseases, and therefore, it has great potential for clinical diagnostics in the future. However, there are still several critical problems with this technology. In this study, we focus on two important issues. The first issue is related to automatic gridding and spot segmentation for microarray images. It has been reported that the quality of spot segmentation significantly influences data precision in the subsequent data analysis. However, nowadays microarray image analysis software still requires users' fine tuning to obtain acceptable results. Another important issue is how to automatically collect related information regarding all genes on the microarray slide for subsequent data analysis and data mining. To relieve researchers from manually correcting image processing results and manually collecting the related information for genes, in this paper, we proposed an automatic and robust method for microarray image analysis and the related information retrieval module which is integrated with the proposed database schema for microarray image data.
On the Gray Image of Cyclic Codes over Finite Chain Rings
Authors: Jianfa Qian, Wenping Ma, Xinmei Wang
Venue: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences (2008)

We introduce (1-γ)-cyclic code and cyclic codes over the finite chain ring R. We prove that the Gray image of a linear (1-γ)-cyclic code over R of length n is a distance invariant quasi-cyclic code over Fpk. We also prove that if (n,p) = 1, then every code over Fpk which is the Gray image of a cyclic code over R of length n is equivalent to a quasi-cyclic code.