ppxscal/embedding_network huggingface dataset:
A Secure Group Agreement (SGA) Protocol for Peer-to-Peer Applications
Authors: Amy Beth Corman, Peter Schachte, Vanessa Teague
Venue: Proceedings of the 21st International Conference on Advanced Information Networking and Applications Workshops - Volume 01 (2007)

The lack of a trusted central authority poses a unique security challenge to peer-to-peer networks. It must be assumed that some fraction of all peers in a network are corrupt and may collude to try to derive an advantage. Nonetheless, in some circumstances it is necessary to select a subset of the peer-to-peer network in such a way that all members of the selected group can be confident that most group members are honest. We propose a secure protocol for the selection of a subset of peers from the network without a trusted authority. Our protocol ensures, with any desired probability, that the percentage of corrupt members in the subset is no greater than a selected limit (up to the total percentage of corrupt peers). We then discuss the use of this protocol in the context of a peer-to-peer game.
Change detection in sequences of images by multifractal analysis
Authors: C. Canus
Venue: Proceedings of the Acoustics, Speech, and Signal Processing, 1996. on Conference Proceedings., 1996 IEEE International Conference - Volume 04 (1996)

We propose a multifractal approach to the problem of change detection in image sequences, such as registrated remotely sensed images of the same scene or sequences of medical images. We show that the multifractal analysis of images-based on a modelisation of the two-dimensional signal as measure-can be of great help if we want to detect changes without any a priori knowledge of the objects to be extracted. We first present a simple change detection method based on the classical multifractal analysis of images w.r.t. the Lebesgue measure. We then describe an improved method based on the analysis of images w.r.t. a reference measure, which in this case is the first image of the sequence. We finally show some results on real data.
Error bounds of EEG/MEG for a stationary dipole source with a realistic head model
Authors: C. H. Muravchik
Venue: Proceedings of the Acoustics, Speech, and Signal Processing, 2000. on IEEE International Conference - Volume 06 (2000)

We derive Cramer-Rao bounds (CRBs) on the errors of estimating the parameters (location and moment) of a current dipole source using data from electro-encephalography (EEG), magneto-encephalography (MEG), or the combined EEG/MEG modality. We use a realistic head model based on knowledge of surfaces separating tissues of different conductivities, obtained from magnetic resonance (MR) or computer tomography (CT) imaging systems. The electric potentials and magnetic field components at the respective sensors are functions of the source parameters through integral equations. These potentials and field are computed using the boundary or the finite element method (BEM or FEM), with a weighted residuals technique. We present a unified framework for the measurements computed by these methods that enables the derivation of the bounds. The resulting bounds may be used, for instance, to choose the best configuration of the sensors for a given patient and region of expected source location. Numerical results are used to demonstrate an application for shelving expected accuracies in estimating the source parameters as a function of its position in the brain, based on real EEG/MEG system and MR or CT images. The results include contours of equal precision in the estimation and surfaces showing the size of the 90% confidence volume for a dipole on a sphere inside the brain.
Managing product line asset bases
Authors: John D. Mcgregor
Venue:  (2006)

Product lines are predicated on collecting assets common to the desired product portfolio, commonly known as the asset base. For many product lines, the size of asset base has become large enough to create a variety of difficulties. The problem of size is particularly notable for implementation assets. Recent case studies suggest that asset base size also creates difficulties in deriving products from the product line assets, thus increasing the cost of producing a product from the product line assets. The techniques for managing large product line asset bases are unaddressed in the literature. This research presents new techniques that take advantage of asset base characteristics, unavailable in more general collections, to both reduce the number of assets and to organize the asset base that go beyond what is possible with other software collections. The result is an asset base that is more efficient to use. Research related to improving the organization of the asset base was performed by taking the component assets of a research SPL and arranging them based on three different organizational criteria---according to the structure of the architecture, important abstractions found during domain analysis (Key Domain Abstractions), and product features. The three resulting organizations were then studied using four evaluation criteria---natural division of assets into groups (assets fit into the groups provided by the organization), easy to map assets to organization criteria (mapping between the selection of a particular product variant and the assets needed to produce it), reasonably sized groups, and similarly sized groups. The effectiveness of the different organizations was then compared and recommendations concerning asset base organization provided. The literature indicates that large product lines are likely to contain multiple assets that provide the same functionality, but that differ in the program context that they support. The presence of the duplicative assets creates a number of problems including organization difficulties. In a Software Product Line (SPL) these differences in program context are the result of requirements expressed at the product's variation points. This limits the difference in program context to three characteristics---cardinality, optionality and feature interactions. The limited differences in program context make it practical to attempt to provide a modular solution which permits the desired variation to be assembled as needed. The research explored a number of different implementation mechanisms to provide these modular variation points. The result is a recommendation on how to implement SPL variation points provided in the form of a pattern language.
Identification of Overlapping Functional Modules in Protein Interaction Networks: Information Flow-based Approach
Authors: Young-Rae Cho, Woochang Hwang, Aidong Zhang
Venue: Proceedings of the Sixth IEEE International Conference on Data Mining - Workshops (2006)

Recent computational analyses of protein interaction networks have attempted to understand cellular organizations, processes and functions. Various topology-based clustering methods have been applied to the protein interaction networks. However, they have been in difficulties due to unreliable interaction data and the specific features of the networks such as small-world and scale-free properties. In this paper, we present an information flow-based approach for analyzing the weighted protein interaction networks, which are integrated with other biological knowledge. Our approach is designed to identify overlapping functional modules. The algorithm selects a small number of informative proteins based on the weighted connectivity, and simulates the information flow through the network from each informative protein. Our experimental results show that the modules generated by our algorithm correspond to real functional associations of proteins. Furthermore, we demonstrate that our approach outperforms other previous methods in terms of accuracy.
The developmental approach to multimedia speech learning
Authors: Juyang Weng
Venue: Proceedings of the Acoustics, Speech, and Signal Processing, 1999. on 1999 IEEE International Conference - Volume 06 (1999)

This paper introduces the developmental approach to speech learning, motivated by human cognitive development from infancy to adulthood. Central in the developmental approach is what is called the developmental algorithm. We introduce AA-learning as a basic learning mode for our developmental algorithm. The developmental algorithm enables the system to learn new tasks without a need of reprogramming. Some experimental results for automated animal-like learning (AA-learning) using our developmental algorithm are presented.
On Walrasian Price of CPU Time
Authors: Xiaotie Deng, Li-Sha Huang, Minming Li
Venue: Algorithmica (2007)

We study a Walrasian equilibrium model to determine the price of CPU time. The customers have jobs that require a given length of CPU slot allocation with their valuations dependent on the assigned time slots. The owner of the CPU processing time receives compensation for time slots sold to the customers, subject to the condition that the slots sold to a customer are those that the customer most desires, given the price structure for the time slots. We establish conditions for jobs to have Walrasian equilibrium, and obtain complexity results to determine the Walrasian equilibrium. In particular, the issues of excessive supply of CPU time and price dynamics are discussed under our model.
'That's my PDA!' The Role of Personalization for Handhelds in the Classroom
Authors: Louise Mifsud, Anders I. Morch
Venue: Proceedings of the Fifth IEEE International Conference on Pervasive Computing and Communications Workshops (2007)

In this paper we describe primary school students' use and personalization of handheld devices (PDAs). The paper reports on a case study in a dlh and 7Ih grade classroom in Norway. The findings revealed that personalization is an important component in many educational activities and that it can lead to more motivated use. This included customizing the user interface and the organization of folders. We draw on Vygotskian socio-cullural approach to analyze our findings.
Time and scale evolutionary EVD and detection
Authors: N. Erdol
Venue: Proceedings of the Acoustics, Speech, and Signal Processing, 2001. on IEEE International Conference - Volume 05 (2001)

Optimal detection of a known signal in nonstationary noise requires tracking the eigenvalue decomposition (EVD) of the noise data over time. To take advantage of information in the long-term, as well as short-term, correlation lags we turn to EVD over wavelet subspaces. We develop a multirate EVD updating method over multiresolution subspaces and find maximum detectability nodes on wavelet binary full-tree structures. We use theoretical analysis to justify the effectiveness of a hyperspectrum for noise based on time and scale evolutionary EVDs. We also show results obtained with simulated 1/f noise and noise collected by hydrophones of an underwater sonar communication system. Initial results are encouraging as they clearly indicate many subspaces, where detectability is significantly higher than in the original space prior to wavelet decomposition.
Local learning projections
Authors: Mingrui Wu, Kai Yu, Shipeng Yu, Bernhard Schölkopf
Venue: Proceedings of the 24th international conference on Machine learning (2007)

This paper presents a Local Learning Projection (LLP) approach for linear dimensionality reduction. We first point out that the well known Principal Component Analysis (PCA) essentially seeks the projection that has the minimal global estimation error. Then we propose a dimensionality reduction algorithm that leads to the projection with the minimal local estimation error, and elucidate its advantages for classification tasks. We also indicate that LLP keeps the local information in the sense that the projection value of each point can be well estimated based on its neighbors and their projection values. Experimental results are provided to validate the effectiveness of the proposed algorithm.
Modelling memory functions with recurrent neural networks consisting of input compensation units: I. Static situations
Authors: Simone K&#x00fc;hn, Wolf-J&#x00fc;rgen Beyn, Holk Cruse
Venue: Biological Cybernetics (2007)

Humans are able to form internal representations of the information they process&#x2014;a capability which enables them to perform many different memory tasks. Therefore, the neural system has to learn somehow to represent aspects of the environmental situation; this process is assumed to be based on synaptic changes. The situations to be represented are various as for example different types of static patterns but also dynamic scenes. How are neural networks consisting of mutually connected neurons capable of performing such tasks? Here we propose a new neuronal structure for artificial neurons. This structure allows one to disentangle the dynamics of the recurrent connectivity from the dynamics induced by synaptic changes due to the learning processes. The error signal is computed locally within the individual neuron. Thus, online learning is possible without any additional structures. Recurrent neural networks equipped with these computational units cope with different memory tasks. Examples illustrate how information is extracted from environmental situations comprising fixed patterns to produce sustained activity and to deal with simple algebraic relations.
A High Resolution Flash Time-to-Digital Converter Taking Into Account Process Variability
Authors: Nikolaos Minas, David Kinniment, Keith Heron, Gordon Russell
Venue: Proceedings of the 13th IEEE International Symposium on Asynchronous Circuits and Systems (2007)

Timing issues are a major concern in the design of high performance synchronous, asynchronous circuits and GALS. Investigations into the causes of many timing problems cannot be satisfactorily undertaken using external equipment due to its remoteness from the source of the potential problem; this necessitates the development of on-chip time measurement circuitry. Current techniques have the capability of resolving timing differences down to 5ps [1], however further improvement is impeded by process variations. This paper describes a flash Time to Digital Converter (TDC) suitable for on-chip implementation. The theory to overcome the effects of process variations, potentially permitting the time resolution down to one picosecond is described. Proof of concept is demonstrated by implementing the techniques in an FPGA, improving on the current resolution of FPGA implementation of a TDC.
Time-Space Tradeoffs for Counting NP Solutions Modulo Integers
Authors: Ryan Williams
Venue: Proceedings of the Twenty-Second Annual IEEE Conference on Computational Complexity (2007)

We prove the first time-space tradeoffs for counting the number of solutions to an NP problem modulo small integers, and also improve upon the known time-space tradeoffs for SAT. Let m be a positive integer, and define MOD_m- SAT to be the problem of determining if a given Boolean formula has exactly km satisfying assignments, for some integer k. We prove that for all primes p, except for possibly one of them, MOD_p-SAT is not solvable in nc time and n^o(1) space on RAMs, for c \geqslant 1 satisfying c^3 - c^2 - 2c + 1 \le 0 (c \le 1.801 suffices). That is, there is at most one prime p that does not satisfy the lower bound. Note that such a lower bound does not follow from the SAT time-space tradeoffs, as we do not know of an efficient deterministic reduction from SAT to MOD_p-SAT. The result is non-constructive, in that it does not provide an explicit prime for which the lower bound holds. However, we can prove that the same limitation holds for SAT and MOD_6-SAT, as well as MOD_m-SAT for any composite m that is not a prime power. Our main tool is a general method for rapidly simulating deterministic RAM computations with restricted space, by counting the number of solutions to NP predicates modulo primes. The simulation converts an ordinary RAM into a "canonical one" that runs in roughly the same amount of time and space, yet its configuration sequences have nice properties suitable for counting.
Exploring Symmetric Cryptography for Secure Network Reprogramming
Authors: Donnie H. Kim, Rajeev Gandhi, Priya Narasimhan
Venue: Proceedings of the 27th International Conference on Distributed Computing Systems Workshops (2007)

Recent secure code-update protocols for sensor networks have been based on asymmetric-cryptographic primitives such as digital signatures. Our approach, Castor, explores the feasibility of securing an existing code-update protocol, Deluge, using symmetric-cryptographic mechanisms that are more suited to the resource constraints of sensor nodes. Castor involves a synergistic combination of a oneway hash-chain, a one-way key-chain, and a sequence of message authentication codes (MACs) with delayed key-disclosure to enable sensor nodes to verify the update's authenticity. We guarantee that no correct node will ever install or forward a compromised part of an update, while addressing the performance issues related to delayed key-disclosure.
A new linear co-channel interference mitigation algorithm
Authors: S. Heidari
Venue: Proceedings of the Acoustics, Speech, and Signal Processing, 1996. on Conference Proceedings., 1996 IEEE International Conference - Volume 03 (1996)

The problem of co-channel interference is encountered when, along with the signal of interest (SOI), one or more interfering signal(s) are present in a common receiver. This paper is primarily concerned with the development of a new linear co-channel interference mitigation algorithm which estimates the SOI and the interfering signal from their superposition in the presence of additive noise. The methods are inspired by the reconstruction of the interference from the null space of the SOI. Once the null space of the SOI is determined, the interfering signal is reconstructed via a set of linear operations. The presented methodologies demonstrate low complexity while maintaining a superior performance.
Bowing virtual strings
Authors: J. Guerard
Venue: Proceedings of the Acoustics, Speech, and Signal Processing, 1996. on Conference Proceedings., 1996 IEEE International Conference - Volume 03 (1996)

A virtual string has been designed with the association of a sensor, a real-time algorithm and a mechanical actuator. The force exerted by a real bow on a small surface is measured, the velocity that a real string would exhibit under this excitation is computed by a fast DSP-board and the corresponding motion is generated by the actuator at the bowed surface. Corrections are needed for taking into account the characteristics of these various elements. They are achieved by means of IIR filters designed with LMS optimizations. One finally observes the classical Helmholtz motion of the bowed string, although some stability problems may still to be overcome.
Validating families of latency insensitive protocols
Authors: S. Suhaib, D. Mathaikutty, S. Shukla, D. Berner
Venue: Proceedings of the High-Level Design Validation and Test Workshop, 2005. on Tenth IEEE International (2005)

With increasing clock frequencies, the signal delay on some interconnects in an system on chip (SoC) often exceeds the clock period, which necessitates latency insensitive protocols (LIPs). Correctness of a system composed of synchronous blocks communicating via LIPs is established by showing latency equivalence between a completely synchronous composition of the blocks, and the LIP based composition. Every time an LIP is conceived, they need to be debugged and then proven correct. Mathematical theorems to establish correctness, though elegant, are error prone, and tedious to create for every new variant of LIPs. In this work, we present validation frameworks for families of LIPs, both for dynamic validation, useful for early debug cycles, and formal verification for formal proof of correctness. This can be a useful framework in the hands of designers trying to create new LIPs or to optimize existing ones for design convergence.
A Streaming-Based Solution for Remote Visualization of 3D Graphics on Mobile Devices
Authors: Fabrizio Lamberti
Venue: IEEE Transactions on Visualization and Computer Graphics (2007)

Mobile devices such as Personal Digital Assistants, Tablet PCs, and cellular phones have greatly enhanced user capability to connect to remote resources. Although a large set of applications are now available bridging the gap between desktop and mobile devices, visualization of complex 3D models is still a task hard to accomplish without specialized hardware. This paper proposes a system where a cluster of PCs, equipped with accelerated graphics cards managed by the Chromium software, is able to handle remote visualization sessions based on MPEG video streaming involving complex 3D models. The proposed framework allows mobile devices such as smart phones, Personal Digital Assistants (PDAs), and Tablet PCs to visualize objects consisting of millions of textured polygons and voxels at a frame rate of 30 fps or more depending on hardware resources at the server side and on multimedia capabilities at the client side. The server is able to concurrently manage multiple clients computing a video stream for each one; resolution and quality of each stream is tailored according to screen resolution and bandwidth of the client. The paper investigates in depth issues related to latency time, bit rate and quality of the generated stream, screen resolutions, as well as frames per second displayed.
Lossless Condensers, Unbalanced Expanders, And Extractors
Authors: Amnon Ta-Shma, Christopher Umans&#x2020;, David Zuckerman&#x2021;
Venue: Combinatorica (2007)

Trevisan showed that many pseudorandom generator constructions give rise to constructions of explicit extractors. We show how to use such constructions to obtain explicit lossless condensers. A lossless condenser is a probabilistic map using only O(logn) additional random bits that maps n bits strings to poly(logK) bit strings, such that any source with support size K is mapped almost injectively to the smaller domain. Our construction remains the best lossless condenser to date. By composing our condenser with previous extractors, we obtain new, improved extractors. For small enough min-entropies our extractors can output all of the randomness with only O(logn) bits. We also obtain a new disperser that works for every entropy loss, uses an O(logn) bit seed, and has only O(logn) entropy loss. This is the best disperser construction to date, and yields other applications. Finally, our lossless condenser can be viewed as an unbalanced bipartite graph with strong expansion properties.
A Low-Cost Pipelineed Multi-Lingual E-Dictionary Using a Pipelined CTAM
Authors: Swapan K. Ray, Sabyasachi Dutta, Abhik Kumar Saha
Venue: Proceedings of the International Conference on Computing: Theory and Applications (2007)

A pipelined Multi-Lingual Electronic Dictionary (PMLeD) has been designed and implemented. Architecturally, it is a pipeline of four memory stages of which the first one is itself a pipelined version of a Content-to-Address-Memory (CTAM) while the other three are traditional Address-to-Content Memories (ATCM), namely, RAMs. The PMLeD is potentially capable of providing millions of word-by-word translations per second between an arbitrarily large number of languages but requires a highly expensive fully parallel design of the Pipelined CTAM (PCTAM) stages for achieving this high throughput rate. The present design, which has been implemented and tested in the laboratory, has studied a cost-performance trade-off by designing each stage in the PCTAM with a byte-serial approach and implementing it employing a low-cost 8-bit microcontroller. The design has achieved a hefty reduction in cost and complexity at a considerable sacrifice in the throughput rate and marks a novel, simple and low-cost practical design approach to a pipelined associative memory.