ppxscal/embedding_network huggingface dataset:
A role administration system in role-based authorization infrastructures: design and implementation
Authors: Dongwan Shin, Gail-Joon Ahn, Sangrae Cho, Seunghun Jin
Venue: Proceedings of the 2003 ACM symposium on Applied computing (2003)

In this paper we describe a system whose purpose is to help establish a valid set of roles and role hierarchies with assigned users and associated permissions. We have designed and implemented the system, called RA system, which enables role administrators to build and configure various components of a role-based access control (RBAC) model, thereby making it possible to lay a foundation for role-based authorization infrastructures. Three methodological constituents for our purpose are introduced, together with the design and implementation issues. The system has a role-centric view for easily managing constrained roles as well as assigned users and permissions. An LDAP-accessible directory service was used for a role database. We show that the system can be seamlessly integrated with an existing privilege-based authorization infrastructure. We finally discuss our plans for future development of the system.
Implementing Exception Handling Policies for Workflow Management System
Authors: Jinmiao Li, Yun Mai, Greg Butler
Venue: Proceedings of the Tenth Asia-Pacific Software Engineering Conference Software Engineering Conference (2003)

Exceptions are deviations from the normal executionof the program.They occur frequently in programs.Inmodern programming languages exceptions are separatedfrom the normal execution using try-catch blocks andwhenever an exception is raised then the catch blockseither recover from the exception in some way, or logthe exception and abort.A workflow can be characterizedas a long-running process.Exceptions occur in workflowsbut it is more expensive to abort the workflow asmuch work may be lost.Many proposals for describingworkflows have been made.Some address exception handling,but few of these cleanly separate the description ofthe normal workflow from exceptions, and non presentclear implementation details.Our approach to modelingand handling exceptions relies on continuations, listenersas exception handlers, and on policies, or strategies,for continuation.This model leads to a very flexible designbehind the implementation in this paper.Our workhas been validated in a small prototype written in Java,though our approach and design are independent of theprogramming language.
Wavelet-Based Multiresolution Analysis of Irregular Surface Meshes
Authors: Sébastien Valette, Rémy Prost
Venue: IEEE Transactions on Visualization and Computer Graphics (2004)

Abstract--This paper extends Lounsbery's multiresolution analysis wavelet-based theory for triangular 3D meshes, which can only be applied to regularly subdivided meshes and thus involves a remeshing of the existing 3D data. Based on a new irregular subdivision scheme, the proposed algorithm can be applied directly to irregular meshes, which can be very interesting when one wants to keep the connectivity and geometry of the processed mesh completely unchanged. This is very convenient in CAD (Computer-Assisted Design), when the mesh has attributes such as texture and color information, or when the 3D mesh is used for simulations, and where a different connectivity could lead to simulation errors. The algorithm faces an inverse problem for which a solution is proposed. For each level of resolution, the simplification is processed in order to keep the mesh as regular as possible. In addition, a geometric criterion is used to keep the geometry of the approximations as close as possible to the original mesh. Several examples on various reference meshes are shown to prove the efficiency of our proposal.
A case for test-code generation in model-driven systems
Authors: Matthew J. Rutherford, Alexander L. Wolf
Venue: Proceedings of the 2nd international conference on Generative programming and component engineering (2003)

A primary goal of generative programming and model-driven development is to raise the level of abstraction at which designers and developers interact with the software systems they are building. During initial development, the benefits of abstraction are clear. However, during testing and maintenance, increased distance from the implementation can be a disadvantage. We view test cases and test harnesses as an essential bridge between the high-level specifications and the implementation. As such, the generation of test cases for fully generated components and test harnesses for partially generated components is of fundamental importance to model-driven systems. In this paper we present our experience with test-case and test-harness generation for a family of model-driven, component-based distributed systems. We describe our development tool, MODEST, and motivate our decision to invest the extra effort needed to generate test code. We present our approach to test-case and test-harness generation and describe the benefits to developers and maintainers of generated systems. Furthermore, we quantify the relative cost of generating test code versus application code and find that the artifact templates for producing test code are simpler than those used for application code. Given the described benefits to developers and maintainers and the relatively low cost of test-code development, we argue that test-code generation should be a fundamental feature of model-driven development efforts.
The interface between phrasal and functional constraints
Authors: John T. Maxwell, Ronald M. Kaplan
Venue: Computational Linguistics (1993)

Many modern grammatical formalisms divide the task of linguistic specification into a context=free component of phrasal constraints and a separate component of attribute-value or functional constraints. Conventional methods for recognizing the strings of a language also divide into two parts so that they can exploit the different computational properties of these components. This paper focuses on the interface between these components as a source of computational complexity distinct from the complexity internal to each. We first analyze the common hybrid strategy in which a polynomial context-free parser is modified to interleave functional constraint solving with context-free constituent analysis. This strategy depends on the property of monotonicity in order to prune unnecessary computation. We describe a number of other properties that can be exploited for computational advantage, and we analyze some alternative interface strategies based on them. We present the results of preliminary experiments that generally support our intuitive analyses. A surprising outcome is that under certain circumstances an algorithm that does no pruning in the interface may perform significantly better than one that does.
New publications
Venue: ACM SIGCAS Computers and Society (1975)

With this issue we inaugurate a new section of Computers & Society devoted to identifying new publications, especially unpublished papers, dealing with the affect of computing on individuals and society. Rob Kling, an editor of Computers & Society has agreed to take responsibility for this section of the newsletter. Please forward abstracts of similar reports to Rob, at the masthead address. Be sure to include price and ordering information for readers. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
An Overview of the Runtime Verification Tool Java PathExplorer
Authors: Klaus Havelund, Grigore Roşu
Venue: Formal Methods in System Design (2004)

We present an overview of the Java PathExplorer runtime verification tool, in short referred to as JPAX. JPAX can monitor the execution of a Java program and check that it conforms with a set of user provided properties formulated in temporal logic. JPAX can in addition analyze the program for concurrency errors such as deadlocks and data races. The concurrency analysis requires no user provided specification. The tool facilitates automated instrumentation of a program's bytecode, which when executed will emit an event stream, the execution trace, to an observer. The observer dispatches the incoming event stream to a set of observer processes, each performing a specialized analysis, such as the temporal logic verification, the deadlock analysis and the data race analysis. Temporal logic specifications can be formulated by the user in the Maude rewriting logic, where Maude is a high-speed rewriting system for equational logic, but here extended with executable temporal logic. The Maude rewriting engine is then activated as an event driven monitoring process. Alternatively, temporal specifications can be translated into automata or algorithms that can efficiently check the event stream. JPAX can be used during program testing to gain increased information about program executions, and can potentially furthermore be applied during operation to survey safety critical systems.
Identical tasks and counter variables in an integer programming-based approach to verification
Authors: James C. Corbett
Venue: Proceedings of the 7th international workshop on Software specification and design (1993)

Analysis of concurrent systems is plagued by the state explosion problem. The constrained expression analysis technique uses necessary conditions, in the form of linear inequalities, to verify certain properties of concurrent systems without enumerating the system's states. While effective against the state explosion due to interleaving, the technique fails to yield a tractable analysis if the size of the components themselves grow exponentially due to the use of variables in the components. As a partial solution to this problem, we present a technique for representing certain program variables as integer programming variables. We also present a synergistic technique for efficiently representing many identical components in the context of an integer programming analysis.
Long time step molecular dynamics using targeted Langevin stabilization
Authors: Qun Ma, Jesús A. Izaguirre
Venue: Proceedings of the 2003 ACM symposium on Applied computing (2003)

We introduce the B-spline Mollified Impulse (MOLLY) and the Targeted MOLLY (TM) for molecular dynamics (MD). TM uses targeted Langevin coupling to stabilize B-spline MOLLY. Results show that with a proper choice of parameters, the radial distribution function can be correctly recovered and the self-diffusion co-efficient can be correctly estimated from MD simulations of flexible waters using TM with outer time step of 16 fs, and a six-fold speedup is obtained. The basis of comparison is leapfrog with time step of 1 fs The overhead associated with mollification is low. Extention to handle larger molecules is discussed.
Resource management portal for laboratories using real devices on the Internet
Authors: Stefan Zimmerli, Marc-Alain Steinemann, Torsten Braun
Venue: ACM SIGCOMM Computer Communication Review (2003)

Internet-based distance learning is slowly gaining new territories and substituting current teaching methodologies. However, distance learning not only consists of transferring documents to web pages, but also of developing new concepts, methods, and implementation architectures. This article presents concepts and implementation issues for an example remote hands-on networking laboratory. The described course gives access to real network hardware via the Internet. In particular, authentication, authorization, scheduling, and error recovery issues had to be solved.
Modelling an enterprise for re-engineering: a case study
Authors: Matthew O. Adigun, Diligent P. Biyela
Venue: Proceedings of the 2003 annual research conference of the South African institute of computer scientists and information technologists on Enablement through technology (2003)

An enterprise engineering strategy called EEF(Enterprise Engineering Framework) has been crafted to be the foundation step for Component-Based Development, CBD. The goal of the research is to formulate a BPR-driven approach to enterprise architecture construction and to show how enterprise architectural artefacts could form the basis for enterprise component development. The framework defines three stakeholders, whose contributions are vital, namely management, enterprise modeller and information system developer. The University of Zululand example is used as a simplified illustration of the framework.. Management develops the vision as well as the strategy for achieving the vision. The modeller translates the vision and strategy into an implementable and testable model of the enterprise. The information system developer matches the resulting business architecture to appropriate web or information systems services. In conclusion, the research fits into the modern trend towards goal-driven enterprise component identification and specification.
Optimizing processor architectures for power-efficiency
Authors: John Sokha Seng
Venue:  (2003)

Microprocessor clock frequencies have increased to meet the rising performance demands of applications. This increase in clock frequencies has led to a corresponding increase in the power consumption of high performance microprocessors. Increasing power consumption poses challenges in processor cooling and obtaining long battery life in mobile systems. Because of these problems it is now important to consider power-efficiency at all levels of microprocessor design, including the level of the processor architecture. The optimizations we discuss are architecture-level optimizations which address power challenges in microprocessors while maintaining a high level of performance. The specific contributions include: architecture-level power optimizations for simultaneous multithreading processors, optimizations which use dynamic critical path information to reduce the necessity of high power structures for performance, a study into the limits of architecture-level power optimizations on modern architectures, and a study of the effect of compiler optimizations on processor power consumption.
Response Time Analysis for Tasks Scheduled under EDF within Fixed Priorities
Authors: M. González Harbour, J. C. Palencia
Venue: Proceedings of the 24th IEEE International Real-Time Systems Symposium (2003)

Hierarchical schedulers are getting increased attention inmany research projects because they bring in flexibility,they can take advantage of the best features of differentscheduling policies, and allow the composability of applicationsdeveloped under different scheduling strategies. Mostcommercial real-time operating systems have an underlyingfixed priority scheduler, and for this reason it is necessaryto be able to analyze hierarchically-scheduled applicationsin which the underlying scheduler is of that kind. In this paperwe extend the classic response time analysis techniquesto analyze applications which can have a mixture of tasksscheduled either with fixed priorities, or with an earliestdeadline first (EDF) scheduler running on top of an underlyingfixed priority scheduler. We show that the complexityof this analysis is similar to that of existing response timeanalysis for EDF tasks.
Special Issue: Life-Cycle Design
Authors: William J. Marx, John Kunz, Biren Prasad
Venue: Artificial Intelligence for Engineering Design, Analysis and Manufacturing (2000)

In recent years, the area of Product Design focusing on the Product's Life Cycle, from conception through disposal, has been an increasing area of research, in academia and industry. It provides a challenging, yet relatively unexplored, area of research for scientists and engineers from multiple disciplines. It is also an area of great interest to industry, with the refocusing of business models from increasing product performance to increasing corporate profitability while reducing expenditures. This paradigm shift has spawned multiple areas of research in Life-Cycle Design, as evidenced by the diversity in the topics of the papers submitted for this special issue of AI EDAM. We have collected five papers that present different areas of Life-Cycle Design; each provides a unique perspective on Life Cycle Design within the broad domain of Artificial Intelligence.
Improving the Performance of Multi-Class SVMs in Face Recognition with Nearest Neighbor Rule
Authors: Chang-Hun Lee, Sung-Wook Park, Weide Chang, Jong-Wook Park
Venue: Proceedings of the 15th IEEE International Conference on Tools with Artificial Intelligence (2003)

The classification time required by conventional multiclass SVMs greatly increases as the number of pattern classes increases. This is due to the fact that the needed set of binary class SVMs gets quite large. In this paper, we propose a method to reduce the number of classes by using nearest neighbor rule (NNR) in the principle component analysis and linear discriminant analysis (PCA+LDA) feature subspace. The proposed method reduces the number of face classes by selecting a few classes closest to the test data projected in the PCA+LDA feature subspace. Results of experiment show that our proposed method has a lower error rate than nearest neighbor classification (NNC) method. Though our error rate is comparable to the conventional multi-class SVMs, the classification process of our method is much faster.
Test data compression and test time reduction using an embedded microprocessor
Authors: Sungbae Hwang, Jacob A. Abraham
Venue: IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2003)

Systems-on-a-chip (SOCs) with many complex intellectual property cores require a large volume of data for manufacturing test. The computing power of the embedded processor in a SOC can be used to test the cores within the chip boundary, reducing the test time and memory requirements. This paper discusses techniques that use the computing power of the embedded processor in a more sophisticated way. The processor can generate and reuse random numbers to construct test patterns and selectively apply only those patterns that contribute to the fault coverage, significantly reducing the pattern generation time, the total number of test applications and, hence, the test time. It can also apply deterministic test patterns that have been compressed using the characteristics of the random patterns as well as those of the deterministic patterns themselves, which leads to high compression of test data. We compare three fast run-length coding schemes which are easily implemented and effective for test-data compression. We also demonstrate the effectiveness of the proposed approach by applying it to some benchmark circuits and by comparing it with other available techniques.
Formal method for self-timed design
Authors: M. A. Kishinevsky, A. Y. Kondratyev, A. R. Taubin
Venue: Proceedings of the conference on European design automation (1991)

Formal method of self-timed circuit design, based on compact event model - change diagrams (CD), is suggested. This model (CD) seems to be very attractive because of convenient tools for describing the semantics of concurrency which allows to enhance the specification from distributive class of processes to semimodular ones. The necessary and sufficient conditions of CD correctness and polynomial algorithms of their analysis are introduced. The formal synthesis procedure consider as the set of equivalent transformations of initial specification (inserting to it the additional signals) that exclude some incorrectnesses (contradiction, abnormality and so on). The boolean equations of implementing self-timed circuit can be easily obtained from the corrected description.
The Minimum Size of Saturated Hypergraphs
Authors: Oleg Pikhurko
Venue: Combinatorics, Probability and Computing (1999)

Let &Fscr; be a family of forbidden k-hypergraphs (k-uniform set systems). An &Fscr;-saturated hypergraph is a maximal k-uniform set system not containing any member of &Fscr;. As the main result we prove that, for any finite family &Fscr;, the minimum number of edges of an &Fscr;-saturated hypergraph is O(nk&minus;1). In particular, this implies a conjecture of Tuza. Some other related results are presented.
Security mechanisms for multimedia networking
Authors: Wu-Chi Feng, Dong Xuan
Venue:  (2003)

With the increased use of multimedia in daily communications, it is necessary to develop efficient and secure transmission mechanisms that are specifically tailored for multimedia. Real-time characteristics and high bandwidth requirements of multimedia data requires efficient and scalable mechanisms. For success of commercial multimedia distribution, security mechanisms will be a major factor. Most of the research on multimedia security have focused on watermarking related issues. Security issues related to streaming is not researched in detail and requires further progress. This dissertation contains my research on security mechanisms for multimedia networking. I have investigated several issues including passive attacks on video streams, secure layered lossless video coding, end-to-end security for proxy-based video distribution and security mechanisms for wireless video distribution. Most the above issues were not researched by the multimedia community and this thesis forms a first step for secure, scalable multimedia networking. Data transmitted using streaming algorithms depend on available network bandwidth and characteristics of the movie being streamed. Reliance on movie characteristics will reveal information even if the movie is encrypted. Experimental results show that movies can be identified using network traces. To address this problem, I have developed a framework based on MPEG that prevents passive attacks on encrypted movie streams. Many applications including scientific visualization require lossless video streaming. To facilitate this I have developed a dual-layer framework, an MPEG layer and lossless differences, that provides lossless view of video and reduces bandwidth requirement and security overhead for many settings. Proxy-based approaches are used for many multimedia applications. I have investigated end-to-end security in proxy based systems with operations for frame dropping, transcoding. My analysis shows that frame dropping can easily be supported using end-to-end security but transcoding is much harder and can be supported in limited form for authentication. Finally, I have focused on wireless video transmission. For handheld devices with limited capabilities, security mechanisms should be light-weight and introduce minimal overhead. My research on wireless video transmission has shown that encryption overhead can be reduced by using layering and error-preserving encryption.
Combining multiple classifiers based on third-order dependency for handwritten numeral recognition
Authors: Hee-Joong Kang
Venue: Pattern Recognition Letters (2003)

Storing and estimating high order probability distribution of classifiers and class labels is exponentially complex and unmanageable, so we rely on an approximation scheme using the dependency. As an extension of the second-order dependency approach, the probability distribution is optimally approximated by the third-order dependency and then multiple classifiers are combined by such third-order dependency approximation.