ppxscal/embedding_network huggingface dataset:
Baseball, Optimization, and the World Wide Web
Authors: Ilan Adler, Alan L. Erera, Dorit S. Hochbaum, Eli V. Olinick
Venue: Interfaces (2002)

The competition for baseball play-off spots -- the fabled pennant race -- is one of the most closely watched American sports traditions. While play-off race statistics, such as games back and magic number, are informative, they are overly conservative and do not account for the remaining schedule of games. Using optimization techniques, one can model schedule effects explicitly and determine precisely when a team has secured a play-off spot or has been eliminated from contention. The RIOT Baseball Play-off Races Web site developed at the University of California, Berkeley, provides automatic updates of new, optimization-based play-off race statistics each day of the major league baseball season. In developing the site, we found that wecould determine the first-place elimination status of all teams in a division using a single linear-programming formulation, since a minimum win threshold for teams finishing in first place applies to all teams in a division. We identified a similar (but weaker) result for the problem of play-off elimination with wildcard teams.
A music notation construction engine for optical music recognition
Authors: David Bainbridge, Tim Bell
Venue: Software&mdash;Practice Experience (2003)

Optical music recognition (OMR) systems are used to convert music scanned from paper into a format suitable for playing or editing on a computer. These systems generally have two phases: recognizing the graphical symbols (such as note-heads and lines) and determining the musical meaning and relationshipsof the symbols (such as the pitch and rhythm of the notes). In this paper we explore the second phase and give a two-step approach that admits an economical representation of the parsing rules for the system. The approach is flexible and allows the system to be extended to new notations with little effort--the current system can parse common music notation, Sacred Harp notation and plainsong. It is based on a string grammar and a customizable graph that specifies relationships between musical objects. We observe that this graph can be related to printing as well as recognizing music notation, bringing the opportunity for cross-fertilization between the two areas of research.
Varieties of Social Influence: the Role of Utility and Norms in the Success of a New Communication Medium
Authors: Robert E. Kraut, Ronald E. Rice, Colleen Cool, Robert S. Fish
Venue: Organization Science (1998)

This natural experiment investigates the introduction and use of a pair of competing video telephone systems in a company overa period of 18 months. Both quantitative, time-series analyses and in-depth interviews demonstrate that employees adoptedand used the video systems for both utility and normative reasons. Consistent with utility explanations, people in the most communication-intensive jobs were the most likely to use video telephony. Consistent with social influence explanations, peopleused a particular system more when more people in general were using it and when more people in their work group wereusing it. There were two conceptually distinct, but empirically entangled, types of social influence. First, use by other people changed the objective benefits and costs associated with using the systems, and thus their utility. Second, use by others changed the normative environment surrounding the new technology. Both utility and normative influen ces were stronger in one's primary work group. Implementers, users, and researchers should consider both utility and normative factors influencing both the success and failure of new organizational communication systems.
Comparison of AESA and LAESA search algorithms using string and tree-edit-distances
Authors: Juan Ramón Rico-Juan, Luisa Micó
Venue: Pattern Recognition Letters (2003)

Although the success rate of handwritten character recognition using a nearest neighbour technique together with edit distance is satisfactory, the exhaustive search is expensive. Some fast methods as AESA and LAESA have been proposed to find nearest neighbours in metric spaces. The average number of distances computed by these algorithms is very low and does not depend on the number of prototypes in the training set. In this paper, we compare the behaviour of these algorithms when string and tree-edit-distances are used.
Book Reviews
Authors: Benjamin Lev, Ulysses J. Brown, Wade D. Cook, Margaret M. Wiecek, Hans W. Ittmann, Mark J. Kaiser
Venue: Interfaces (2001)

The range of books reviewed is wide, covering theory and applications in operations research, statistics, management science, econometrics, mathematics, computers, and information systems (no software is reviewed). In addition, we include books in other fields that emphasize technical applications. Publishers who wish to have their books reviewed should send them to Professor Benjamin Lev. We list the books received; not all books received can be reviewed because space and time are limited. Those who would like to review books are urged to send me their names, addresses, and specific areas of expertise. We commission all reviews and do not accept unsolicited book reviews. Readers are encouraged to suggest books that might be reviewed or to ask publishers to send me copies of such books.
Analysis of combined voice/data/video operation in cable and DSL access networks: graceful degradation under overload
Authors: Gagan L. Choudhury
Venue: Performance Evaluation (2003)

We develop exact models to analyze the performance of several types and grades of data, voice and video sessions over a cable or DSL-based access network. Each session is characterized by a minimum guaranteed data-rate and a maximum allowed data-rate. Sessions would normally transmit at the maximum rate but under congestion some or all sessions would see graceful rate degradation. For each class the blocking probability, the average data-rate attained by a session, the probability that the attained data-rate exceeds a certain target value, and the data-rate that is exceeded a certain target percent of the time are computed. In addition, a system-wide probability of data-rate degradation is also computed. A bufferless model with product-form structure and insensitivity to session holding time distribution except through mean (heavy-tailed distributions are allowed), and a buffered model with standard Markov chain structure are developed. The models are also generalized to allow data-rate degradation of real-time streaming traffic (e.g., switch from G.711 to G.728 encoding or turn on silence suppression) whenever the total bandwidth usage exceeds a certain threshold. Whenever a model is sensitive to session holding time distribution, that sensitivity is studied through simulations. Several numerical examples are given to illustrate the use of the models in providing quality of service mechanisms over the "last mile" of access.
An energy-conscious algorithm for memory port allocation
Authors: Preeti Ranjan Panda, Lakshmikantam Chitturi
Venue: Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design (2002)

Multiport memories are extensively used in modern system designs because of the performance advantages they offer. The increased memory access throughput could lead to significantly faster schedules in behavioral synthesis. However, they also have an associated area and energy penalty. We describe a technique for mapping data accesses to multiport memories during behavioral synthesis that results in significantly better energy characteristics than an unoptimized multiport design. The technique consists of an initial colouring of the array access nodes in the data flow graph based on spatial locality, followed by attempts to consecutively access memory locations with the same colour on the same port. Our experiments on several applications indicate a significant reduction in address bus switching activity, leading to an overall energy reduction over an unoptimized design, while still maintaining a performance advantage over a single-port solution.
Some multi-set inclusions associated with shuffle convolutions and multiple zeta values
Authors: Douglas Bowman, David M. Bradley, Ji Hoon Ryoo
Venue: European Journal of Combinatorics (2003)

We outline a new technique for proving certain shuffle convolution formulæ. As an application, we give a new combinatorial proof of the formula ζ({3, 1}n) = 2π4n/(4n + 2)| for multiple zeta values. We also state the combinatorial equivalent of an analogous result for ζ({5,1}n).
Speech Dimensionality Analysis on Hypercubical Self-Organizing Maps
Authors: Panu Somervuo
Venue: Neural Processing Letters (2003)

The problem of finding the intrinsic dimension of speech is addressed in this paper. Astructured vector quantization lattice, Self-Organizing Map (SOM), is used as a projection space for the data. The goal is to find a hypercubical SOM lattice where the sequences of projected speech feature vectors form continuous trajectories. The effect of varying the dimension of the lattice is investigated using feature vector sequences computed from the TIMIT database.
Solitary waves of a coupled Korteweg-de Vries system
Authors: Roger Grimshaw, Gerard Iooss
Venue: Mathematics and Computers in Simulation (2003)

In the long-wave, weakly nonlinear limit a generic model for the interaction of two waves with nearly coincident linear phase speeds is a pair of coupled Korteweg-de Vries equations. Here we consider the simplest case when the coupling occurs only through linear non-dispersive terms, and for this case delineate the various families of solitary waves that can be expected. Generically, we demonstrate that there will be three families: (a) pure solitary waves which decay to zero at infinity exponentially fast; (b) generalized solitary waves which may tend to small-amplitude oscillations at infinity; and (c) envelope solitary waves which at infinity consist of decaying oscillations. We use a combination of asymptotic methods and the rigorous results obtained from a normal form approach to determine these solitary wave families.
Low Power Synthesis Methodology with Data Format Optimization Applied on a DWT
Authors: N. Julien, S. Gailhard, E. Martin
Venue: Journal of VLSI Signal Processing Systems (2003)

In modern VLSI circuits, power consumption has become a design criteria as well as speed and silicon area or gate count. To guide the designer implementing complex applications with real time constraint on dedicated circuits, we present a High Level Synthesis methodology that provides a Register Transfer Level description of an ASIC, from a behavioral description of an algorithm&semi; this complete methodology uses basic techniques such as selection, assignment or scheduling specified for power optimization, associated with a new approach based on data format optimization. Actually, instead of the usual 32-bit floating-point format, it is power efficient to use a fixed-point format provided overflow and computation noise problems are solved. The application of our method on an usual DSP example (the DWT) shows a power reduction of more than 60%.
Birth-death processes and associated polynomials
Authors: Erik A. van Doorn
Venue: Journal of Computational and Applied Mathematics (2003)

We consider birth-death processes on the nonnegative integers and the corresponding sequences of orthogonal polynomials called birth-death polynomials. The sequence of associated polynomials linked with a sequence of birth-death polynomials and its orthogonalizing measure can be used in the analysis of the underlying birth-death process in several ways. We briefly review the known applications of associated polynomials, which concern transition and first-entrance time probabilities, and establish some new results in this vein. In particular, our findings indicate how the prevalence of recurrence or α-recurrence in a birth-death process can be recognized from certain properties of the orthogonalizing measure for the associated polynomials.
Effective instruction scheduling techniques for an interleaved cache clustered VLIW processor
Authors: Enric Gibert, Jesús Sánchez, Antonio González
Venue: Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture (2002)

Clustering is a common technique to overcome the wire delay problem incurred by the evolution of technology. Fully-distributed architectures, where the register file, the functional units and the data cache are partitioned, are particularly effective to deal with these constraints and besides they are very scalable. In this paper effective instruction scheduling techniques for a clustered VLIW processor with a word-interleaved cache are proposed. Such scheduling techniques rely on: (i) loop unrolling and variable alignment to increase the percentage of local accesses, (ii) a latency assignment process to schedule memory operations with an appropriate latency and (iii) different heuristics to assign instructions to clusters. In particular, the number of local accesses is increased by more than 25% if these techniques are used and the ratio of stall time over compute time is small.Next, the main source of remote accesses and stall time is investigated. Stall time is mainly due to remote hits, and Attraction Buffers are used to increase local accesses and reduce stall time. Stall time is reduced by 29% and 34% depending on the scheduling heuristic. IPC results for a word-interleaved cache clustered VLIW processor are similar to those of the multiVLIW (a cache-coherent clustered processor with a more complex hardware design), and are 10% and 5% better (depending on the scheduling heuristic) than the lPC for a clustered processor with a unified cache.
On-line tuning of a fuzzy-logic power system stabilizer
Authors: N. Hossein-Zadeh, A. Kalam
Venue: Iranian Journal of Science and Technology (2002)

A scheme for on-line tuning of a fuzzy-logic power system stabilizer (FPSS) is presented. Firstly, a FPSS is developed using speed deviation and accelerating power as the controller input variables. The inference mechanism of the fuzzy-logic controller is represented by a decision table, constructed of linguistic IF-THEN rules. The linguistic rules are available from experts and the design procedure is based on these rules. It is assumed that an exact model of the plant is not available and it is difficult to extract the exact parameters of the power plant. Thus, the design procedure can not be based on an exact model. This is an advantage of fuzzy logic that makes the design of a controller possible without knowing the exact model of the plant. Secondly, two scaling parameters are introduced to tune the FPSS. These scaling parameters are the outputs of another fuzzy-logic system, which gets the operating conditions of the power system as inputs. This mechanism oF tuning the FPSS makes the FPSS adaptive to changes in the operating conditions. Therefore, the degradation of the system response, under a wide range of operating conditions, is less compared to the system response with a fixed-parameter FPSS and a conventional (linear) power system stabilizer (CPSS). The tuned stabilizer has been tested by performing nonlinear simulations using a synchronous machine-infinite bus model. The responses are compared with a fixed-parameters FPSS and a CPSS. It is shown that the tuned FPSS is superior to both of them.
Modeling Fault Coverage of Random Test Patterns
Authors: Hailong Cui, Sharad C. Seth, Shashank K. Mehta
Venue: Journal of Electronic Testing: Theory and Applications (2003)

We present a new probabilistic fault coverage model that is accurate, simple, predictive, and easily integrated with the normal design flow of built-in self-test circuits. The parameters of the model are determined by fitting the fault simulation data obtained on an initial segment of the random test. A cost-based analysis finds the point at which to stop fault simulation, determine the parameters, and estimate fault coverage for longer test lengths. Experimental results on benchmark circuits demonstrate the effectiveness of this approach in making accurate predictions at a low computational cost. As compared to the cost of fault-simulating all the test vectors, the savings in computational time for larger circuits ranged from four to fourteen times. We also present an analysis of the mean and the variance of the fault coverage achieved by a random test of a given length. This analysis and simulation results demonstrate that while the mean coverage is determined by the distribution of the detectabilities of individual faults, the dual distribution of fault coverage of individual test vectors determines the variance.
Combining word problems through rewriting in categories with products
Authors: Camillo Fiorentini, Silvio Ghilardi
Venue: Theoretical Computer Science (2003)

We give an algorithm solving combined word problems (over non-necessarily disjoint signatures) based on rewriting of equivalence classes of terms. The canonical rewriting system we introduce consists of few transparent rules and is obtained by applying Knuth-Bendix completion procedure to presentations of pushouts among categories with products. It applies to pairs of theories which are both constructible over their common reduct (on which we do not make any special assumption).
Isometric pointer interfaces for wearable 3D visualization
Authors: David M. Krum, Rob Melby, William Ribarsky, Larry Hodges
Venue: CHI '03 extended abstracts on Human factors in computing systems (2003)

3D visualizations will soon be important wearable computer applications. However, 3D interaction can be problematic, especially in a wearable computing environment. We evaluated four 3D interaction methods using isometric joysticks common to wearable computing. Subjective and objective results favor a two-handed, aircraft-like interface mapping.
Annotated syntax graphs
Authors: Samuel Hsieh
Venue: Journal of Computing Sciences in Colleges (2002)

Annotated syntax graphs are presented as a pedagogical tool in teaching compiler construction and as a design tool for developing semantic actions in writing a compiler. The tool is compared with attribute grammars. Using annotated syntax graphs generally leads to rather lucid semantic actions. Certain difficulties that exist when using attribute grammars can be avoided when annotated syntax graphs are used instead.
Abraham Charnes and W. W. Cooper (et al.): A Brief History of a Long Collaboration in Developing Industrial Uses of Linear Programming
Authors: W. W. Cooper
Venue: Operations Research (2002)

This paper describes a research strategy and its results, which guided a 40+ year collaboration between Abraham Charnes and William W. Cooper, which was initiated in a research center established at the (then) new Graduate School of Industrial Administration at Carnegie Institute of Technology (now Carnegie Mellon University). Initiated in collaboration with Bob Mellon of Gulf Oil Company, this strategy involved on-site collaborations with company personnel in more than 100 different companies and government agencies. An appendix to this paper describes the efforts of another team working from the same research center. This team, consisting of Charles Holt, Franco Modigliani, John Muth, and Herbert A. Simon, used a different research strategy with an accompanying application that also had important impacts on operations research/management science and other disciplines.
A compactness result for periodic multivortices in the electroweak theory
Authors: D. Bartolucci
Venue: Nonlinear Analysis: Theory, Methods Applications (2003)

We derive a priori uniform bounds for solutions of an elliptic system of Liouville-type equations, first analyzed by J. Spruck and Y. Yang (Comm. Math. Phys. 144 (1992) 1), yielding periodic multivortices in the classical electroweak theory of Glashow-Salam-Weinberg. Our proof is based on a concentration-quantization result, in the same spirit of Brezis-Merle (Comm. Partial Differential Equations 16 (8,9) (1991) 1223) and Li-Shafrir (Indiana Univ. Math. J. 43 (4) . (1994) 1255), for mean field equations on Riemannian compact 2-manifolds.
Performance evaluation of network processor architectures: combining simulation with analytical estimation
Authors: Samarjit Chakraborty, Simon Künzli, Lothar Thiele, Andreas Herkersdorf, Patricia Sagmeister
Venue: Computer Networks: The International Journal of Computer and Telecommunications Networking (2003)

The designs of most systems-on-a-chip (SoC) architectures rely on simulation as a means for performance estimation. Such designs usually start with a parameterizable template architecture, and the design space exploration is restricted to identifying the suitable parameters for all the architectural components. However, in the case of heterogeneous SoC architectures such as network processors the design space exploration also involves a combinatorial aspect--which architectural components are to be chosen, how should they be interconnected, task mapping decisions--thereby increasing the design space. Moreover, in the case of network processor architectures there is also an associated uncertainty in terms of the application scenario and the traffic it will be required to process. As a result, simulation is no longer a feasible option for evaluating such architectures in any automated or semi-antomated design space exploration process due to the high simulation times involved. To address this problem, in this paper we hypothesize that the design space exploration for network processors should be separated into multiple stages, each having a different level of abstraction. Further, it would be appropriate to use analytical evaluation frameworks during the initial stages and resort to simulation techniques only when a relatively small set of potential architectures is identified. None of the known performance evaluation methods for network processors have been positioned from this perspective.We show that there are already suitable analytical models for network processor performance evaluation which may be used to support our hypothesis. To this end, we choose a reference system-level model of a network processor architecture and compare its performance evaluation results derived using a known analytical model [Thiele et al., Design space exploration of network processor architectures, in: Proc. 1st Workshop on Network Processors, Cambridge, MA, February 2002; Thiele et al., A framework for evaluating design tradeoffs in packet processing architectures, in: Proc. 39th Design Automation Conference (DAC), New Orleans, USA, ACM Press, 2002] with the results derived by detailed simulation. Based on this comparison, we propose a scheme for the design space exploration of network processor architectures where both analytical performance evaluation techniques and simulation techniques have unique roles to play.
Live programming as a lecture technique
Authors: John Paxton
Venue: Journal of Computing Sciences in Colleges (2002)

The Computer Science Department at Montana State University offered a 2 credit Java seminar each Spring Semester from 1997 through 2001. Our students were taught Ada and C++ at the time so the purpose of the seminar was to provide a fairly sophisticated introduction to the Java programming language. In the seminar, students worked on a semester long project that culminated in a networked version of a two person game that could be played on the World Wide Web. Starting in Fall Semester, 2001, the Java seminar was no longer necessary because our department decided to use Java as its introductory programming language instead of Ada.I had the privilege of teaching the seminar during each of its five offerings. By the fifth and final offering in Spring Semester, 2001, the seminar incorporated many unique elements including a live programming lecture technique, no required textbook and a semester long project. In this paper, I will evaluate each of these features using student surveys that I constructed. Special attention will be paid to the live programming aspect of the course.