ppxscal/embedding_network huggingface dataset:
Reverse Compilation of Digital Signal Processor Assembler Source to ANSI-C
Authors: Adrian Johnstone, Elizabeth Scott, Tim Womack
Venue: Proceedings of the IEEE International Conference on Software Maintenance (1999)

Digital Signal Processors (DSPs) are special purpose microprocessors optimised for embedded applications that require high arithmetic rates. These devices are often difficult to compile for: compared to modern general purpose processors DSPs often have very small address spaces. In addition they contain unusual hardware features and they require correct scheduling of operands against pipeline registers to extract the highest levels of available performance. As a result, high level language compilers for these devices generate poor quality code, and are rarely used in practice.Recently, new generation processors have been launched that are very hard to program by hand in assembler because of the complexity of their internal pipelines and arithmetic structures. DSP users are therefore having to migrate to using high level language compilers since this is the only practical development environment. However, there exist large quantities of legacy code written in assembler which represent a significant investment to the user who would like to be able to deploy core algorithms on the new processors without having to re-code from scratch. This paper presents a working report on the development and use of a tool to automatically reverse-compile assembler source for the ADSP-21xx family of DSPs to ANSI-C. We include a discussion of the architectural features of the ADSP-21xx processors and the ways in which they assist the translation process. We also identify a series of translation challenges which, in the limit, can only be handled with manual intervention and give some statistics for the frequency with which these pathological cases appear in real applications.
Submit! a web-based system for automatic program critiquing
Authors: Yusuf Pisan, Debbie Richards, Anthony Sloane, Helena Koncek, Simon Mitchell
Venue: Proceedings of the fifth Australasian conference on Computing education - Volume 20 (2003)

This paper presents the Submit! project which aims to enhance teaching and learning in computing by developing automated web-based tools that assist in providing critical feedback to students about the computer programs they write. By developing sophisticated computer-based tools that will improve our monitoring of student progress and maintenance of consistent standards we aim to provide structured assessment with a level of detail and consistency that would be difficult or impossible to provide manually. By allowing students to use the critiquing tools before final submission of an assignment we offer formative assessment that supports self-directed learning. Submit! has been integrated into many computing units at Macquarie University. Usability evaluations show that Submit! is generally effective while needing improvement in certain areas. Two studies involved a review of the system in terms of its intuitiveness, look, feel and flow. A preliminary study of the impact of Submit! on student results shows that students who make use of the system to get feedback on assignment submissions do better than those who don't.
Performance of Fault Tolerant Networks of Workstations
Authors: John Morris
Venue: Proceedings of the 1999 International Symposium on Parallel Architectures, Algorithms and Networks (1999)

Functional or dataflow models of computation enable a program's run-time system to determine which portions of a computation must be repeated when faults occur. Straight-forward modifications to the run-time system of Cilk 2.0 - a threaded extension of C - enable a Network of Workstations parallel processing system to tolerate fail-stop faults of the individual processors or the network.It is shown in this work that the overheads needed to provide this fault tolerance are mainly CPU cycles and memory, with very little additional network load being generated in the absence of faults.This makes it feasible to run long computations successfully on the typical networks of workstations found in large organisations where ownership, control and distribution of the individual processors may be widely distributed.
Generating biomorphs with an aesthetic immune system
Authors: Dennis L. Chao, Stephanie Forrest
Venue: Proceedings of the eighth international conference on Artificial life (2002)

We describe an interactive search algorithm inspired by the immune system. The algorithm learns what parts of the search space are not useful to help a user explore large parameter spaces efficiently. The algorithm is capable of finding consensus solutions for parties with different selection criteria. A simple implementation of the algorithm applied to selecting Biomorphs (Dawkins 1986) is presented.
Maintaining Traceability During Object-Oriented Software Evolution: A Case Study
Authors: G. Antoniol, G. Canfora, A. de Lucia
Venue: Proceedings of the IEEE International Conference on Software Maintenance (1999)

This paper presents an approach to build and visualize traceability links and properties of a set of OO software releases. The process recovers an "as is" design from C++ software releases, compares recovered designs at the class interface level, and helps the user to deal with inconsistencies by pointing out regions of code where differences are concentrated. The comparison process exploits edit distance and a maximum match algorithm and has been experimented with 9 releases of a library of foundation classes. Results as well as consideration related to presentation is-sues are reported in the paper.
Group Communication Protocol for Realtime Applications
Authors: Takayuki Tachikawa, Hiroaki Higaki, Makoto Takizawa
Venue: Proceedings of the The 18th International Conference on Distributed Computing Systems (1998)

In distributed applications, a group of multiple processes cooperate by exchanging messages. It is critical to support the group of application processes with enough quality of service (QoS) including the ordered delivery of messages. The delay time and the message loss ratio are significant QoS parameters. In Internet applications, the delay time and the loss ratio are significantly different in different communication channels. We define a novel causality named Delta*-causality among the messages to hold in the world-wide environment. We discuss how to transmit messages to the destination processes and how to resolve message loss and delay supporting the Delta*-causality given the requirements of delay time and message loss ratio.
Extensions to an Object Oriented Programming Language for Programming Fine-grain Multicomputers
Authors: K. R Leino
Venue:  (1992)

In this note, we extend an object-oriented language to support programming fine-grain multicomputers. The new constructs have a simple semantics and provide a nice way to write distributed programs. The semantics of the constructs are independent of how a program is distributed. We also show a set of simple conditions under which even the outcome of a program is independent of how its control and data are distributed.
PhotoShop Elements 2 Solutions: The Art of Digital Photography, 1 edition
Authors: Mikkel Aaland
Venue:  (2002)

:Take Your Digital Images to the Next Level Adobe's original version of Photoshop Elements quickly became a huge software hit, bringing the power of Photoshop to anyone with a computer. The first version of this book became an instant classic, too, using inspiring images and real-world examples to show readers how to get the most out of the program. With Photoshop Elements 2 Solutions, noted photographer, web producer, and author Mikkel Aaland has thoroughly updated his best-seller to include all the smart new features in the latest version of the program. Whether creating digital images is a hobby or part of your livelihood, this book is an invaluable guide for turning your ordinary images into extraordinary images. Inside, Aaland shows you the ins and outs of both Photoshop Elements 2 and the original Photoshop Elements including: Getting Photoshop Elements up and running Sharpening out-of-focus pictures Touching up faces and fixing red-eye Making standout product shots Enhancing outdoor and real-estate shots Fusing photos into amazing panoramics Combining images into realistic-looking composites Optimizing photos for the web and e-mail transmission Creating PDF slide shows and professional-looking picture packages And more... Featured on the CD The enclosed CD comes with more than 100 practice images from the book, plus utilities to make your work easier, tryout versions of fun and useful plug-ins, and a demo of Sybex's Photoshop 6 Learning Studio software. About the Author Mikkel Aaland is a photographer, web producer, and writer. He is the author of seven books, including Digital Photography, Photoshop for the Web, and Still Images in Multimedia, and he has contributed text and photography to numerous periodicals including Wired, Newsweek, and Publish. Aaland has served as a non-paid advisor to Adobe's Photoshop Elements product development group.
Type inference for COBOL systems
Authors: Arie Deursen, Leon M.F. Moonen
Venue:  (1998)

Types are a good starting point for various software reengineering tasks. Unfortunately, programs requiring reengineering most desperately are written in languages without an adequate type system (such as COBOL). To solve this problem, we propose a method of automated type inference for these languages. The main ingredients are that if variables are compared using some relational operator their types must be the same; likewise if an expression is assigned to a variable, the type of the expression must be a subtype of that of the variable. We present the formal type system and inference rules for this approach, show their effect on various real life COBOL fragments, describe the implementation of our ideas in a prototype type inference tool for COBOL, and discuss a number of applications.
Register Allocation in Assembly Language
Authors: Robert A. Wagner
Venue:  (1970)

This paper describes a scheme for using the facilities of a macro assembler to aid in allocating program variables to local-memory registers. The scheme allows the programmer to write the entire program before making any register-allocation decisions. The scheme requires that the programmer make explicit his assumptions about register ordering and usage, thus improving documentation. Key Words and phrases: register allocation, register assignment, symbolic register names, macro assembler, variable allocation, scalar variable equivalence, graph coloring.
ReEnact: using thread-level speculation mechanisms to debug data races in multithreaded codes
Authors: Milos Prvulovic, Josep Torrellas
Venue: ACM SIGARCH Computer Architecture News (2003)

While removing software bugs consumes vast amounts of human time, hardware support for debugging in modern computers remains rudimentary. Fortunately, we show that mechanisms for Thread-Level Speculation (TLS) can be reused to boost debugging productivity. Most notably, TLS's rollback capabilities can be extended to support rolling back recent buggy execution and repeating it as many times as necessary until the bug is fully characterized. These incremental re-executions are deterministic even in multithreaded codes. Importantly, this operation can be done automatically on the fly, and is compatible with production runs.As a specific implementation of a TLS-based debugging framework, we introduce ReEnact. ReEnact targets a particularly hairy class of bugs: data races in multithreaded programs. ReEnact extends the communication monitoring mechanisms in TLS to also detect data races. It extends TLS's rollback capabilities to be able to roll back and deterministically re-execute the code with races to obtain the race signature. Finally, the signature is compared to a library of race patterns and, if a match occurs, the execution may be repaired. Overall, ReEnact successfully detects, characterizes, and often repairs races automatically on the fly. Moreover, it is fully compatible with always-on use in production runs: the slowdown of race-free execution with ReEnact is on average only 5.8%.
MCAD developing and Implementing Web Applications with Visual Basic: .NET and Microsoft Visual Studio .NET Exam Cram 2 (Exam Cram 70-305)
Authors: Hausman, Ed Tittel
Venue:  (2003)

:This certification exam measures the ability to develop and implement Web-based applications with Web forms, ASP.NET, and the Microsoft .NET Framework. This exam counts as an core credit toward the new MCAD (Microsoft Certified Application Developer) certification as well as a core credit toward the existing MCSD .NET certification. Readers preparing for this exam find the best-selling Exam Cram 2 series to be the smartest, most efficient way to become certified. Under the direction of Series Editor Ed Tittel, the leading authority on certification and the founder of The Exam Cram Method™ series, this book focuses exactly on what readers need to get certified now - featuring test-taking strategies, time-saving study tips, and a special Cram Sheet that includes tips, acronyms, and memory joggers that are not available anywhere else. After review by a panel of experts, Exam Cram 2 has received the distinction of Cramsession Approved Study Material. The accompanying CD-ROM features PrepLogic Practice Tests!
POLYGAMMOIDS
Authors: W W Bein, Peter Brucker, Matthias Stallmann
Venue:  (1987)

We introduce a class of polymatroids that are true generalizations of gammoids. It is shown that the concept of these polygammoids is equivalent with the concept of netflow representability. Other polymatroids that derive from networks are also generalized by polygammoids. We describe algorithmic consequences of netflow representability of polygammoids both for combinatorial optimization problems and the Lawler-Martel model of polymatroidal flows.
Improving the Scalability of Fault-Tolerant Database Clusters
Authors: R. Jiménez-Peris, M. Patiño-Martínez, B. Kemme, G. Alonso
Venue: Proceedings of the 22 nd International Conference on Distributed Computing Systems (ICDCS'02) (2002)

Replication has become a central element in modern information systems playing a dual role: increase availability and enhance scalability. Unfortunately, most existing protocols increase availability at the cost of scalability. This paper presents architecture, implementation and performance of a middleware based replication tool that provides both availability and better scalability than existing systems. Main characteristics are the usage of specialized broadcastprimitives and efficient data propagation.
Programming .NET Security
Authors: Adam Freeman, Allen Jones
Venue:  (2003)

With the spread of web-enabled desktop clients and web-server based applications, developers can no longer afford to treat security as an afterthought. It's one topic, in fact, that .NET forces you to address, since Microsoft has placed security-related features at the core of the .NET Framework. Yet, because a developer's carelessness or lack of experience can still allow a program to be used in an unintended way, Programming .NET Security shows you how the various tools will help you write secure applications.
Parallel Evolutionary Graph Synthesis on a PC Cluster and Its Application to Multiple-Valued Circuit Synthesis
Authors: Masanori Natsui, Takafumi Aoki, Tatsuo Higuchi
Venue: Proceedings of the 32nd International Symposium on Multiple-Valued Logic (2002)

This paper presents an efficient graph-based evolutionary optimization technique called Evolutionary Graph Generation (EGG) and its extension to a parallel version.The parallel EGG system presented in this paper is based on a coarse-grained model of parallel processing and is implemented on a 16-node Linux PC cluster.The potential capability of parallel EGG system is demonstrated through the synthesis of a radix-4 Signed-Digit (SD) full adder circuit.
Adlets Migration and Handling in a Distributed Object Environment
Authors: Hossam I. Gharib, Ping-Wen Chen, Yasuro Kawata, Shi-Kuo Chang
Venue: Proceedings of the Third IEEE International Symposium on Object-Oriented Real-Time Distributed Computing (2000)

Large distributed systems may contain millions of objects that have to be managed. This makes it impossible to specify management policies for individual objects. Instead it is necessary to specify policy for groups of objects.This paper describes a framework for the construction of the ADlets Distributed Migration Mechanism (ADDMM), which is used by the Adlet System for the management of adlets. The Adlet System [1,2] is a new approach for multimedia information retrieval and fusion based on the concept of active documents advertising, whereby an adlet (the metadata of a document) travels in the network to seek out documents of interest to the parent document, and at the same time advertises its parent document to other interested adlets.ADDMM provides the Adlet System with the facility of managing migrating adlets. ADDMM supports location-independent transparency and minimal interface by utilizing the ADDNS naming system [3] that provides a mechanism for transparent naming and locating adlets, which in turn supports ADDMM transparency at the adlet access level. With the ADDMM migration mechanism, various adlet migration protocols can be constructed and deployed. A visual diagram is introduced to specify such protocols for adlets migration, which can also be employed to specify distributed object management policies.
Behavior to structure: using Verilog and in-circuit emulation to teach how an algorithm becomes hardware
Authors: M. G. Arnold, T. A. Bailey, J. R. Cowles, J. J. Cupal, F. N. Engineer
Venue: Proceedings of the 4th IEEE International Verilog HDL Conference (1995)

We present three stages of Verilog simulation (pure behavioral, mixed behavioral/structural, and pure structural), and a final stage of in-circuit emulation for translating an algorithm into hardware. Each successive stage in the translation can be derived by minor editing of the previous stage. The pure behavioral stage uses a single Verilog process to model an algorithmic state machine (ASM) using statements such as while and non-blocking assignment. The mixed stage keeps the algorithm in a readable form using statements such as while, but replaces the non-blocking assignment with a structural "architecture" that manipulates data. The third stage replaces statements such as while with a simulation of a conventional structural controller that generates the next state. The final stage involves synthesizing actual hardware for the controller, and interfacing it to the Verilog simulation of the architecture using an MS-DOS device driver that works in cooperation with a special module in VeriWell/PC.
The tree identify protocol of IEEE 1394 in $\mu$CRL
Authors: Carron Shankland, Mark B. Zwaag
Venue:  (1998)

We specify the tree identify protocol of the IEEE 1394 high performance serial multimedia bus at three different levels of detail using $\mu$CRL. We use the cones and foci verification technique of Groote and Springintveld to show that the descriptions are equivalent under branching bisimulation, thereby demonstrating that the protocol behaves as expected.
Evaluation of Three Input Mechanisms for Wearable Computers
Authors: Bruce Thomas, Susan Tyerman, Karen Grimmer
Venue: Proceedings of the 1st IEEE International Symposium on Wearable Computers (1997)

This paper reports on an experiment investigating the functionality and usability of novel input devices on a wearable computer, for text entry tasks. Over a three week period, twelve subjects used three different input devices to create and save short textual messages. The virtual keyboard, forearm keyboard, and Kordic keypad input devices were assessed as to their efficiency and usability for simple text entry tasks. Results collected included the textual data created by the subjects, the duration of activities, the survey data and observations made by supervisors. The results indicated that the forearm keyboard is the best performer for accurate and efficient text entry while other devices may benefit from more work on designing specialist GUIs for the wearable computer.
An Architecture of Distributed Frame Hierarchy for Knowledge Sharing and Reuse in Computer Networks
Authors: Dmitri Soshnikov
Venue: Proceedings of the 2002 IEEE International Conference on Artificial Intelligence Systems (ICAIS'02) (2002)

An architecture for building distributed intelligent systems is considered, based on production-frame knowledge representation with distributed frame hierarchy, in which knowledge fragments located on different network nodes can be used cooperatively in the process of distributed or local inference. Frame knowledge representation can also serve as a common denominator when integrating knowledgebase with imperative components or relational data, because objects and component interfaces as well as relational tables can be transparently represented by frames or frame classes.
GOAL: a load-balanced adaptive routing algorithm for torus networks
Authors: Arjun Singh, William J. Dally, Amit K. Gupta, Brian Towles
Venue: ACM SIGARCH Computer Architecture News (2003)

We introduce a load-balanced adaptive routing algorithm for torus networks, GOAL - Globally Oblivious Adaptive Locally - that provides high throughput on adversarial traffic patterns, matching or exceeding fully randomized routing and exceeding the worst-case performance of Chaos [2], RLB [14], and minimal routing [8] by more than 40%. GOAL also preserves locality to provide up to 4.6&times; the throughput of fully randomized routing [19] on local traffic. GOAL achieves global load balance by randomly choosing the direction to route in each dimension. Local load balance is then achieved by routing in the selected directions adaptively. We compare the throughput, latency, stability and hot-spot performance of GOAL to six previously published routing algorithms on six specific traffic patterns and 1,000 randomly generated permutations.
General Methods for the Analysis of the Maximum Size of Data Structures
Authors: Claire M. Kenyon-Mathieu, Jeffrey S Vitter
Venue:  (1989)

We develop two new probabilistic methods that allow us, for several different dynamic processes, to analyze the maximum data-structure size encountered during a sequence of insertions and deletions, such as in data structures like priority queues, dictionaries, linear lists, and symbol tables, and in sweepline structures for geometry and VLSI applications. The notion of the ``maximum'''' is basic to issues of resource preallocation. We apply our methods to several models of insertion and deletion, including combinatorial models of file histories (which include the data structures mentioned above) and probabilistic models. Included in our study is a non-Markovian process (algorithm) for processing sweepline information in an efficient way, called ``hashing with lazy deletion'''' (HwLD). We derive expressions for the expected maximum data-structure size that are asymptotically exact, that is, correct up to lower-order terms; in several cases of interest the expected value of the maximum size is asymptotically equal to the maximum expected size. This solves several open problems, including longstanding fundamental questions in queueing theory. Both of our approaches are robust and rely on novel applications of techniques from the analysis of algorithms. At a high level, our first method isolates the primary contribution to the maximum and bounds the lesser effects. In our second technique we relate the continuous-time probabilistic model to its discrete analogue --- the maximum slot occupancy in hashing.