ppxscal/embedding_network huggingface dataset:
Cryptanalysis of the Matsumoto and Imai Public Key Schemeof Eurocrypt&lsquo;98
Authors: Jacques Patarin
Venue: Designs, Codes and Cryptography (2000)

In 1 Matsumoto and Imai developed a new public key scheme, called C^*, for enciphering or signing. (This scheme is completely different from and should not be mistaken with another scheme of Matsumoto and Imai developed in 1983 in 7 and broken in 1984 in 8). No attacks have been published as yet for this scheme. However, in this paper, we will see that&mdash;for almost all keys&mdash;almost every cleartext can be found from its ciphertext after only approximately m^{2} n^{4} \log n computations, where m is the degree of the chosen field K and mn is the number of bits of text. Moreover, for absolutely all keys that give a practical size for the messages, it will be possible to find almost all cleartexts from the corresponding ciphertexts after a feasible computation. Thus the algorithm of 1 is insecure.
On-line analysis of the TCP acknowledgment delay problem
Authors: Daniel R. Dooly, Sally A. Goldman, Stephen D. Scott
Venue: Journal of the ACM (JACM) (2001)

We study an on-line problem that is motivated by the networking problem of dynamically adjusting of acknowledgments in the Transmission Control Protocol (TCP). We provide a theoretical model for this problem in which the goal is to send acks at a time that minimize a linear combination of the cost for the number of acknowledgments sent and the cost for the additional latency introduced by delaying acknowledgments. To study the usefulness of applying packet arrival time prediction to this problem, we assume there is an oracle that provides the algorithm with the times of the next L arrivals, for some L &ge; 0. We give two different objective functions for measuring the cost of a solution, each with its own measure of latency cost. For each objective function we first give an O(n2)-time dynamic programming algorithm for optimally solving the off-line problem. Then we describe an on-line algorithm that greedily acknowledges exactly when the cost for an acknowledgment is less than the latency cost incurred by not acknowledging. We show that for this algorithm there is a sequence of n packet arrivals for which it is &OHgr; (***)-competitive for the first objective function, 2-competitive for the second function for L = 0, and 1-competitivefor the second function for L = 1. Next we present a second on-line algorithm which is a slight modification of the first, and we prove that it is 2-competitive for both objective functions for all L. We also give lower bounds on the competitive ratio for any deterministic on-line algorithm. These results show that for each objective function, at least one of our algorithms is optimal. Finally, we give some initial empirical results using arrival sequences from real network traffic where we compare the two methods used in TCP for acknowledgment delay with our two on-line algorithms. In all cases we examine performance with L = 0 and L = 1.
On simulating networks of parallel processes in which simultaneous events may occur
Authors: David L. Parnas
Venue: Communications of the ACM (1969)

The following resolutions were passed at the ASA X3.4 Common Programming Languages Subcommittee during the thirty-third meeting held February 20, 1964 at CEIR, Beverly Hills, California.
The Ravenscar profile for high-integrity Java programs?
Authors: Brian Dobbing
Venue: ACM SIGAda Ada Letters (2001)

The Ravenscar Profile was a major output of the 8th International Real-Time Ada Workshop. The profile defines a subset of the Ada95 tasking constructs that matches the requirements of Safety Critical, High Integrity and Hard Real-Time systems by eliminating constructs with high overhead or non-deterministic behavior (semantically or temporally) whilst retaining those elements that form the basic building blocks for constructing analyzable real-time systems.The recent explosion in interest and use of the Java trade; platform for embedded devices has exposed basic flaws in the semantics of its real-time constructs, and this has led to initiatives to extend the language to address these weaknesses. Key personnel involved in the definition of the Real-Time Annex for Ada95 and the Ravenscar Profile also influenced the design of the real-time extensions to Java trade;, and so it is not surprising that these extensions follow closely the experiences learned from Ada.This paper describes the proposed set of extensions to Java trade; to support real-time and high integrity systems, drawing parallels with the Ravenscar Profile definition. It suggests the possibility of co-existence and interoperability of Ravenscar-compliant Ada and RT-Java partitions within a high integrity or safety critical system.
On an improved algorithm for decentralized extrema finding in circular configurations of processors
Authors: Randolph Franklin
Venue: Communications of the ACM (1982)

This note presents a more efficient algorithm for finding the largest element in a circular list of processors when messages can be passed in either direction. It passes 2N*floor(lg N) + 3N messages in the worst case, compared to Chang and Roberts' N(N + 1)/2 and Hirschberg and Sinclair's 8N + 8*ceiling(N lg N) messages. The technique is a selective elimination of possible processes, which then merely relay future messages between the remaining contenders.
Adding networks
Authors: Panagiota Fatourou, Maurice Herlihy
Venue: Proceedings of the twentieth annual ACM symposium on Principles of distributed computing (2001)

An adding network is a distributed data structure that supports a concurrent, lock-free, low-contention implementation of a fetch add counter. We give a lower bound showing that adding networks have inherently high latency. We prove that our lower bound is tight.
Signature simulation and certain cryptographic codes
Authors: Carl Hammer
Venue: Communications of the ACM (1971)

Three cyphers allegedly authored by Thomas Jefferson Beale in 1822 have been the subject of intensive study for over 100 years. Generations of cryptanalysts have expended untold man-years, thus far without success, attempting to decode them; vast armies of fortune hunters and treasure seekers have devoted Herculean labors to digging up the rolling hills of Virginia trying to locate the promised bonanza. The history of pertinent activities would fill volumes, yet serious students of cryptography have always had nagging doubts about the cyphers' authenticity. It has been alleged that the &ldquo;known solution&rdquo; to Cypher Number Two: 115, 73, 24, 818, 37, 52, 49, &hellip; (&ldquo;I have deposited in the County of Bedford about four miles from Buford's in an excavation or vault&hellip;&rdquo;) with the aid of an unsanitized version of the Declaration of Independence was merely a superb, imaginative, and grandiose hoax perpetrated ages ago for whatever reasons. Modern computer technology could obviously perform signature analyses on the Beale cyphers and could also, in fact, simulate the process of encoding itself so as to yield new clues and deeper insights into their construction. For the benefit of the uninitiated, the encoding method used in the second cypher employs a specified document whose words are simply numbered consecutively, and first letters of these words are sought out at random to match the letters of the cleartext or message. The sequence of numbers corresponding to these matches is then written down as the final code. While primitive, the process has the advantage of relative security until the source document becomes known; at that moment the cypher can be decoded even by second graders. The work now completed with the help of our UNIVAC 1108 includes numerous analytical studies of the Beale cyphers and various types of simulations. For example, we have turned the entire process of simulated encoding by various schemes over to the machine and analyzed the signatures of these synthetic codes; we have also encoded various messages by hand, using different texts and a variety of methods to obtain their signatures. These simulations provide convincing evidence that the signatures are both process and data dependent; they indicate also very strongly that Mr. Beale's cyphers are for real and that it is merely a matter of time before someone finds the correct source document and locates the right vault in the Commonwealth of Virginia.
ROR: Rejection of Outliers by Rotations
Authors: Amit Adam, Ehud Rivlin, Ilan Shimshoni
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (2001)

We address the problem of rejecting false matches of points between two perspective views. The two views are taken from two arbitrary, unknown positions and orientations. Even the best algorithms for image matching make some mistakes and output some false matches. We present an algorithm for identification of the false matches between the views. The algorithm exploits the possibility of rotating one of the images to achieve some common behavior of the correct matches. Those matches that deviate from this common behavior turn out to be false matches. Our algorithm does not, in any way, use the image characteristics of the matched features. In particular, it avoids problems that cause the false matches in the first place. The algorithm works even in cases where the percentage of false matches is as high as 85 percent. The algorithm may be run as a postprocessing step on output from any point matching algorithm. Use of the algorithm may significantly improve the ratio of correct matches to incorrect matches. For robust estimation algorithms which are later employed, this is a very desirable quality since it reduces significantly their computational cost. We present the algorithm, identify the conditions under which it works, and present results of testing it on both synthetic and real images. The code for the algorithm is available through the World Wide Web.
A Deductive Approach to Program Synthesis
Authors: Zohar Manna, Richard Waldinger
Venue: ACM Transactions on Programming Languages and Systems (TOPLAS) (1980)

Program synthesis is the systematic derivation of a program from a given specification. A deductive approach to program synthesis is presented for the construction of recursive programs. This approach regards program synthesis as a theorem-proving task and relies on a theorem-proving method that combines the features of transformation rules, unification, and mathematical induction within a single framework.
Reporting of standard cell placement results
Authors: Patrick H. Madden
Venue: Proceedings of the 2001 international symposium on Physical design (2001)

VLSI fabrication technology has advanced rapidly, bringing with it a strong demand for faster and better design automation tools. Accurate reporting of results for placement approaches is crucial to the development of improved automation tools; unfortunately, publicly available placement benchmarks are outdated, and there are wide variations in their interpretation.At best, poor benchmarks and differences in interpretation result in misunderstandings of the effectiveness of some approaches. At worst, they can motivate research in areas of very little promise, while other areas which have true potential are ignored. In this paper, we describe current standard cell placement benchmarks and illustrate common differences in their interpretation, in the hope that a clear understanding of these issues will allow research to be directed and evaluated more efficiently.
Network performance modeling for PVM clusters
Authors: Mark J. Clement, Michael R. Steed, Phyllis E. Crandall
Venue: Proceedings of the 1996 ACM/IEEE conference on Supercomputing (CDROM) (1996)

The advantages of workstation clusters as a parallel computing platform include a superior price-performance ratio, availability, scalability, and ease of incremental growth. However, the performance of traditional LAN technologies such as Ethernet and FDDI rings are insufficient for many parallel applications. This paper describes APACHE (Automated Pvm Application CHaracterization Environment), an automated analysis system that uses an application-independent model for predicting the impact of ATM on the execution time of iterative parallel applications. APACHE has been used to predict the performance of several core applications that form the basis for many real scientific and engineering problems. We present a comparison of the performance predicted by APACHE with observed execution times to demonstrate the accuracy of our model. Finally, we present a method for a simple cost-benefit analysis that can be used to determine whether an investment in ATM equipment is justified for a particular workstation cluster environment.
A flat, timing-driven design system for a high-performance CMOS processor chipset
Authors: J. Koehl, U. Baur, T. Ludwig, B. Kick, T. Pflueger
Venue: Proceedings of the conference on Design, automation and test in Europe (1998)

We describe the methodology used for the design of the CMOS processor chipset used in the IBM S/390 Parallel Enterprise Server - Generation 3. The majority of the logic is implemented by standard cell elements placed and routed flat, using timing-driven techniques. The result is a globally optimized solution without artificial floorplan boundaries. We will show that the density in terms of transistors per mm2 is comparable to the most advanced custom designs and that the impact of interconnect delay on the cycle time is very small. Compared to custom design, this approach offers excellent turn-around-time and considerably reduces overall effort.
XIRQL: a query language for information retrieval in XML documents
Authors: Norbert Fuhr, Kai Großjohann
Venue: Proceedings of the 24th annual international ACM SIGIR conference on Research and development in information retrieval (2001)

Based on the document-centric view of XML, we present the query language XIRQL. Current proposals for XML query languages lack most IR-related features, which are weighting and ranking, relevance-oriented search, datatypes with vague predicates, and semantic relativism. XIRQL integrates these features by using ideas from logic-based probabilistic IR models, in combination with concepts from the database area. For processing XIRQL queries, a path algebra is presented, that also serves as a starting point for query optimization.
A unified algorithm for load-balancing adaptive scientific simulations
Authors: Kirk Schloegel, George Karypis, Vipin Kumar
Venue: Proceedings of the 2000 ACM/IEEE conference on Supercomputing (CDROM) (2000)

Adaptive scientific simulations require that periodic repartitioning occur dynamically throughout the course of the computation. The repartitionings should be computed so as to minimize both the inter-processor communications incurred during the iterative mesh-based computation and the data redistribution costs required to balance the load. Recently developed schemes for computing repartitionings provide the user with only a limited control of the tradeoffs among these objectives. This paper describes a new Unified Repartitioning Algorithm that can tradeoff one objective for the other dependent upon a user-defined parameter describing the relative costs of these objectives. We show that the Unified Repartitioning Algorithm is able to reduce the precise overheads associated with repartitioning as well as or better than other repartitioning schemes for a variety of problems, regardless of the relative costs of performing inter-processor communication and data redistribution. Our experimental results show that this scheme is extremely fast and scalable to large problems.
OS and compiler considerations in the design of the IA-64 architecture
Authors: Rumi Zahir, Jonathan Ross, Dale Morris, Drew Hess
Venue: ACM SIGPLAN Notices (2000)

Increasing demands for processor performance have outstripped the pace of process and frequency improvements, pushing designers to find ways of increasing the amount of work that can be processed in parallel. Traditional RISC architectures use hardware approaches to obtain more instruction-level parallelism, with the compiler and the operating system (OS) having only indirect visibility into the mechanisms used.The IA-64 architecture [14] was specifically designed to enable systems which create and exploit high levels of instruction-level parallelism by explicitly encoding a program's parallelism in the instruction set [25]. This paper provides a qualitative summary of the IA-64 architecture features that support control and data speculation, and register stacking. The paper focusses on the functional synergy between these architectural elements (rather than their individual performance merits), and emphasizes how they were designed for cooperation between processor hardware, compilers and the OS.
High-level binding with low-level linkers
Authors: Richard G. Hamlet
Venue: Communications of the ACM (1976)

An easy to implement scheme is described by which a compiler can enforce agreement between complex data types in separately compiled modules. The scheme is designed to work with any existing link editor or linking loader, no matter how deficient. Obscure runtime errors caused by inconsistent usages are forestalled by static errors detected at linking time.
ILP-based Instruction Scheduling for IA-64
Authors: Daniel Kästner, Sebastian Winkel
Venue: ACM SIGPLAN Notices (2001)

The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply/accumulate units and SIMD operations for 3D graphics operations. In this paper we present an ILP formulation for the problem of instruction scheduling for IA-64. In order to obtain a feasible schedule it is necessary to model the data dependences, resource constraints as well as additional encoding restrictions&mdash;the bundling mechanism. These different aspects represent subproblems that are closely coupled which gives the motivation for a modeling based on integer linear programming. The presented approach is divided in to two phases which allows us to compute mostly optimal solutions with acceptable computation time.
Core semantics of multithreaded Java
Authors: Jeremy Manson, William Pugh
Venue: Proceedings of the 2001 joint ACM-ISCOPE conference on Java Grande (2001)

Java has integrated multithreading to a far greater extent than most programming languages. It is also one of the only languages that specifies and requires safety guarantees for improperly synchronized programs. It turns out that understanding these issues is far more subtle and difficult than was previously thought. The existing specification makes guarantees that prohibit standard and proposed compiler optimizations; it also omits guarantees that are necessary for safe execution of much existing code. Some guarantees that are made (e.g., type safety) raise tricky implementation issues when running unsynchronized code on SMPs with weak memory models. This paper reviews those issues. It proposes a new core semantics for Java that allows for aggressive compiler optimization and addresses the safety and multithreading issues. Due to space constraints, certain side issues are addressed only in the full version of the semantics [8].
Visibility aspects of programmed dynamic data structures
Authors: Nazim H. Madhavji
Venue: Communications of the ACM (1984)

Unlike static structures, dynamic Pascal-like data structures often suffer visibility problems due to the unrestricted use of the general pointer mechanism. By classifying these structures and identifying the different kinds of pointers, a methodology is proposed for achieving improved visibility.
Clustering by Scale-Space Filtering
Authors: Yee Leung, Jiang-She Zhang, Zong-Ben Xu
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (2000)

In pattern recognition and image processing, the major application areas of cluster analysis, human eyes seem to possess a singular aptitude to group objects and find important structures in an efficient and effective way. Thus, a clustering algorithm simulating a visual system may solve some basic problems in these areas of research. From this point of view, we propose a new approach to data clustering by modeling the blurring effect of lateral retinal interconnections based on scale space theory. In this approach, a data set is considered as an image with each light point located at a datum position. As we blur this image, smaller light blobs merge into larger ones until the whole image becomes one light blob at a low enough level of resolution. By identifying each blob with a cluster, the blurring process generates a family of clusterings along the hierarchy. The advantages of the proposed approach are: 1) The derived algorithms are computationally stable and insensitive to initialization and they are totally free from solving difficult global optimization problems. 2) It facilitates the construction of new checks on cluster validity and provides the final clustering a significant degree of robustness to noise in data and change in scale. 3) It is more robust in cases where hyperellipsoidal partitions may not be assumed. 4) It is suitable for the task of preserving the structure and integrity of the outliers in the clustering process. 5) The clustering is highly consistent with that perceived by human eyes. 6) The new approach provides a unified framework for scale-related clustering algorithms recently derived from many different fields such as estimation theory, recurrent signal processing on self-organization feature maps, information theory and statistical mechanics, and radial basis function neural networks.
Dissolve transition detection algorithm using spatio-temporal distribution of MPEG macro-block types (poster session)
Authors: Sung-Bae Jun, Kyoungro Yoon, Hee-Youn Lee
Venue: Proceedings of the eighth ACM international conference on Multimedia (2000)

Almost every shot change detection algorithm detects abrupt transition (hard cut) without difficulty, but gradual transitions such as fades, dissolves, wipes are left as hard-to-detect problems. Dissolve effect, among the various gradual transition effects, is one of the most frequently used shot transition methods with special semantic meaning such as scene transition. Information of the shot change type can also be the basis for the shot clustering algorithms. In this paper, we present a fast and effective dissolve-transition detection algorithm based on the spatio-temporal distribution of the macro block pipes in MPEG-compressed video. In the proposed algorithm, the ratio of forward macro blocks in the B-type frames and the spatial distribution of forward/backward macro blocks are utilized for detecting dissolve transition. After finding such sequence of frames, we apply 2 heuristic rules: (1) The global color distributions of the frames at which dissolve starts and terminates are very different, and (2) The duration of dissolve transition is typically more than 0.3 second.
Anomalies with variable partition paging algorithms
Authors: M. A. Franklin, G. Scott Graham, R. K. Gupta
Venue: Communications of the ACM (1978)

Five types of anomalous behaviour which may occur in paged virtual memory operating systems are defined. One type of anomaly, for example, concerns the fact that, with certain reference strings and paging algorithms, an increase in mean memory allocation may result in an increase in fault rate. Two paging algorithms, the page fault frequency and working set algorithms, are examined in terms of their anomaly potential, and reference string examples of various anomalies are presented. Two paging algorithm properties, the inclusion property and the generalized inclusion property, are discussed and the anomaly implications of these properties presented.