ppxscal/embedding_network huggingface dataset:
An Overview of the Real-Time CORBA Specification
Authors: Douglas C. Schmidt, Fred Kuhns
Venue: Computer (2000)

A growing class of real-time systems require end-to-end support for various quality-of-service (QoS) aspects, including bandwidth, latency, jitter, and dependability. Applications include command and control, manufacturing process control, videoconferencing, large-scale distributed interactive simulation, and test-beam data acquisition. These systems require support for stringent QoS requirements. To meet this challenge, developers are turning to distributed object computing middleware, such as the Common Object Request Broker Architecture, an Object Management Group (OMG) industry standard. In complex real-time systems, DOC middleware resides between applications and the underlying operating systems, protocol stacks, and hardware. CORBA helps decrease the cycle time and effort required to develop high-quality systems by composing applications using reusable software component services rather than building them entirely from scratch. The Real-Time CORBA specification includes features to manage CPU, network, and memory resources. This article describes the key Real-Time CORBA features that the authors feel are the most relevant to researchers and developers of distributed real-time and embedded systems.
Right order spectral gap estimates for generating sets of Z4
Authors: Matthias Löwe, Christian Meise
Venue: Random Structures Algorithms (2002)

Using coupling arguments, a distance method and Zeifman's method we give sharp estimates on the spectral gap for a special case of the class of Markov chains on generating n-tuples of Abelian groups. In our case the group is Z4.
M M's: Building Binary Software Components for Supporting Mobile-Agent Enabled Applications
Authors: Paulo Marques, Luis Silva, João Gabriel Silva
Venue: Autonomous Agents and Multi-Agent Systems (2002)

Mobile Agents provide a new promising paradigm for developing distributed applications. Nevertheless, although the basic concept has been around for some years and many agent platforms are available both from the industry and research community, there are currently few examples where the technology has been deployed in the real world. One important reason for this is that using the current available agent frameworks it is quite difficult to develop applications without having to center them completely on the agents and on the agent infrastructure. In this paper, we present the M M project, taking place at the University of Coimbra. In this project, we are developing an extensive component-based framework that enables ordinary applications to use mobile agents in a flexible and easy way. By using this approach, applications can be developed using current object-oriented approaches and become able of sending and receiving agents by the simple drag-and-drop of mobility components. The framework was implemented using the JavaBeans component model and provides integration with ActiveX, which allows applications to be written in a wide variety of programming languages. By using this framework, the development of applications that can make use of mobile regents is greatly simplified, which can contribute to a wider spreading of the mobile agent technology.
Behavioral modeling of analog circuits by wavelet collocation method
Authors: Xin Li, Xuan Zeng, Dian Zhou, Xieting Ling
Venue: Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design (2001)

In this paper, we develop a wavelet collocation method with nonlinear companding for behavioral modeling of analog circuits. To construct the behavioral models, the circuit is first partitioned into building blocks and the input-output function of each block is then approximated by wavelets. As the blocks are mathematically represented by sets of simple wavelet basis functions, the computation cost for the behavioral simulation is significantly reduced. The proposed method presents several merits compared with those conventional techniques. First, the algorithm for expanding input-output functions by wavelets is a general-purpose approach, which can be applied in automatically modeling of different analog circuit blocks with different structures. Second, both the small signal effect and the large signal effect are modeled in a unified formulation, which eases the process of modeling and simulation. Third, a nonlinear companding method is developed to control the modeling error distribution. To demonstrate the promising features of the proposed method, a 4th order switched-current filter is employed to build the behavioral model.
Polymorphic Processor Arrays
Authors: M. Maresca
Venue: IEEE Transactions on Parallel and Distributed Systems (1993)

Polymorphic processor arrays (PPAs), two-dimensional mesh-connected arrays ofprocessors in which each processor is equipped with a switch able to interconnect itsfour NEWS ports, are discussed. The main features of PPA are that it models a realisticclass of parallel computers, it supports the definition of high level programming models, it supports virtual parallelism, and it supports low complexity algorithms in a number ofapplication fields. Both the PPA computation model and the PPA programming model are presented. It is shown that the PPA computation model is realistic by relating it to thedesign of the polymorphic torus (PT) chip. It is also shown that the PPA programmingmodel is scalable by demonstrating that any algorithm having O(p) complexity on a virtual PPA of size square root m* square root m, has O(k p) complexity on a PPA of size square root n* square root n, with m k n and k integers. Some application algorithms in the area of numerical analysis and graph processing are presented.
Potential Cases, Methodologies, and Strategies of Synthesis of Solutions in Distributed Expert Systems
Authors: Minjie Zhang, Chengqi Zhang
Venue: IEEE Transactions on Knowledge and Data Engineering (1999)

In this paper, firstly, potential synthesis cases in distributed expert systems (DESs) and types of DESs are identified. Based on these results, necessary conditions of synthesis strategies in different synthesis cases are recognized. Secondly, two methodologies for designing synthesis strategies in distributed expert systems are investigated. They are analysis methods and inductive methods. Thirdly, two methodologies are discussed based on the points of performance, complexity, and requirements.
Acceptable Legal Standards for Software
Authors: Doris L. Carver
Venue: IEEE Software (1988)

The author discusses the legal issues that are involved in software protection. She discusses legal actions open to users who get a system that does not perform as expected and have exhausted all remedies that do not involve litigation. She examines how the law treats software, covering liability limitations and court actions regarding fraud or misrepresentation as well as injury and damage caused by software. The author discusses the inadequacy of current laws and offers recommendations for remedying the situation.
Learning from Bugs
Authors: Juichirou Kajihara, Goro Amamiya, Tetsuo Saya
Venue: IEEE Software (1993)

The SWQC program, a software quality-control program implemented at NEC that instills quality and teaches responsibility on the individual, group, and organizational levels, is reviewed. The critical elements of the program, the top-down and grass roots organizational models used in software quality control, and the twelve grass-roots quality-control activities used in SWQC are discussed, as are the most important implementation issues faced in applying SWQC: training, applying quality control to many kinds of software, and expanding the program to other areas within the company.
Robust and Nonrobust Path Delay Fault Simulation by Parallel Processing of Patterns
Authors: F. Fink, K. Fuchs, M. H. Schulz
Venue: IEEE Transactions on Computers (1992)

An accelerated fault simulation approach for path delay faults is presented. The distinct features of the proposed fault simulation method consist in the application of parallel processing of patterns at all stages of the calculation procedure, its versatility to account for both robust and nonrobust decision of path delay faults, and its capability of efficiently maintaining large numbers of path faults to be simulated.
Seamster: inconspicuous low-distortion texture seam layout
Authors: Alla Sheffer, John C. Hart
Venue: Proceedings of the conference on Visualization '02 (2002)

Surface texturing aids the visualization of polygonal meshes by providing additional surface orientation cues and feature annotations. Such texturing is usually implemented via texture mapping, which is easier and more effective when the distortion of the mapping from the surface to the texture map is kept small.We have previously shown that distortion occurs when areas of high surface curvature are flattened into the texture map. By cutting the surface in these areas one can reduce texture map distortion at the expense of additional seam artifacts.This paper describes a faster technique for guiding a texture map seam through high distortion regions, while restricting the seam to regions of low visibility. This results in distortion reducing seams that are less visually distracting and take less time to compute. We have also observed that visibility considerations improve the speed of a recent method that adds cuts to reduce a surface genus.
Can You Trust Software Capability Evaluations?
Authors: Emilie O'Connell, Hossein Saiedian
Venue: Computer (2000)

In the early 1980s, the US Department of Defense suffered many monetary, schedule, and performance costs because it misjudged the ability of its contractors to develop software. Recognizing that this was less a reflection on the organizations themselves than on the general immaturity of the soft-ware industry, the DoD helped create the Software Engineering Institute with the aim of studying ways to help the software industry grow responsibly. In 1987, the SEI established the software capability evaluation (SCE) as a formal way to determine an organization's software process maturity framework and generally measure its software development competence. SCEs are widely used to determine an organization's Capability Maturity Model rating, but their results can be misleading. The authors reveal how certain practices distort results and waste time and money, through intentional contractor vagueness and detail, inappropriate sample projects, and staff coaching. They go on to suggest ways to improve the process.
Cintia: A Neuro-Fuzzy Real-Time Controller for Low-Power Embedded Systems
Authors: Marcello Chiaberge, Leonardo M. Reyneri
Venue: IEEE Micro (1995)

The work has been partially supported by the Italian National Project, CNR 93.05234.ST74, Sistemi Elettronici Avanzati - Reti Neurali and the Inter-University Cooperation "Integrated Neural System for Robotic Applications" between Italy and Spain and it has been awarded with the ES2 Best Chip Award at MICRONEURO '94. This paper describes, a Neuro-Fuzzy real-time controller based on Pulse Stream computation techniques and designed for applications in low power embedded systems. The proposed system mixes two different approaches, namely Neuro-Fuzzy Controllers and Finite State Automata. The former are implemented by means of a custom neural chip, while the latter are implemented as sequential code on a traditional microcontroller. The proposed system is used to demonstrate the advantages of mixing the two approaches and the feasibility of embedded Neuro- Fuzzy control systems. A low power, single chip version is also under design.
A Logic for Characterizing Multiple Bounded Agents
Authors: John Grant, Sarit Kraus, Donald Perlis
Venue: Autonomous Agents and Multi-Agent Systems (2000)

We describe a meta-logic for characterizing the evolving internal reasoning of various families of agents. We view the reasoning of agents as ongoing processes rather than as fixed sets of conclusions. Our approach utilizes a strongly sorted calculus, distinguishing the application language, time, and various syntactic sorts. We have established soundness and completeness results corresponding to various families of agents. This allows for useful and intuitively natural characterizations of such agents' reasoning abilities. We discuss and contrast consistency issues as in the work of Montague and Thomason. We also show how to represent the concept of focus of attention in this framework.
Replica Management for Fault-Tolerant Systems
Authors: Adel Cherif, Takuya Katayama
Venue: IEEE Micro (1998)

Many replica management approaches have been developed in the literature ncluding the state machine approach and the primary/back-up approach. In these approaches, applications are replicated on different processing elements, each instance of the replicated application is called a replica. Replicas cooperate to provide fault tolerance. In this article, we introduce a new replica management approach for implementing embedded fault tolerant systems based on the functional programming paradigm. The proposed approach, called active parallel replication, takes advantages of the redundancy existing in the system and on the properties of the functional programming paradigm, such as referential transparency, not only to provide fault tolerance but also to improve system performance and to reduce the computation costs of replica management and synchronization.
Data Transfer for HIPERLAN
Authors: Philippe Jacquet, Pascale Minet, Paul Mühlethaler, Nicolas Rivierre
Venue: Wireless Personal Communications: An International Journal (1997)

HIPERLAN offers a high speed (23.5 Mbit/s) radio LAN and therefore HIPERLAN is likely to support various kinds of traffic requirements. A Data Transfer function is in charge of handling various traffics which can result in simultaneous services. HIPERLAN nodes are not necessarily within direct radio range; and in some cases packets are forwarded by intermediate stations from the source node to the destination node. Since HIPERLAN is more than a single hop network, the support of specific traffics like Time Bounded traffics require a dedicated architecture which can not be centralized. This paper describes the architecture of the Data Transfer in HIPERLAN which allows the support of various traffics. This approach is not based on a connection oriented protocol nor on a centralized architecture but on a connection-less mode where users provide quality of services parameters to indicate its requirements. HIPERLAN architecture for data transfer is based on a mix of two main mechanisms: hierarchically independent priority levels and an earliest dead line first algorithm. This paper describes and explains the architecture choices made in HIPERLAN. Results of simulation and analytical models are given.
Comments on "a fuzzy backpropagation algorithm"
Authors: Gareth Jones, Philippe De Wilde
Venue: Fuzzy Sets and Systems (2002)

We comment on the learning properties of the fuzzy backpropagation algorithm introduced in Stoeva and Nikov (Fuzzy Sets and Systems 112 (2000) 27).
How to Solve the Management Crisis?
Authors: Robert L. Martin, Carl K. Chang
Venue: IEEE Software (1994)

Discusses how the software crisis can be addressed with a new reuse-intensive process. The disciplined use of fundamental techniques is a steadier, surer way to improvement. The authors discuss how we need a revolution in software management, but that it must be done with vision.
Scalable Color Image Indexing and Retrieval Using Vector Wavelets
Authors: Elif Albuz, Erturk Kocalar, Ashfaq A. Khokhar
Venue: IEEE Transactions on Knowledge and Data Engineering (2001)

This paper presents a scalable content-based image indexing and retrieval system based on vector wavelet coefficients of color images. Highly decorrelated wavelet coefficient planes are used to acquire a search efficient feature space. The feature space is subsequently indexed using properties of all the images in the database. Therefore, the feature key of an image not only corresponds to the content of the image itself but also to how much the image is different from the other images being stored in the database. The search time linearly depends on the number of images similar to the query image and is independent of the database size. We show that, in a database of 5,000 images, query search takes less than 30 msec on a 266 MHz Pentium II processor, compared to several seconds of retrieval time in the earlier systems proposed in the literature.
How to Design Practical Test Cases
Authors: Tsuneo Yamaura
Venue: IEEE Software (1998)

Published articles seldom discuss real-world software testing in detail. Yamaura reveals strategic and tactical secrets that his company, Hitachi Software Engineering, has institutionalized. He offers some data for actual testing activities, describes how to achieve similar high-quality standards, and points out the importance of designing and documenting test cases.
A layout-aware synthesis methodology for RF circuits
Authors: P. Vancorenland, G. Van der Plas, M. Steyaert, G. Gielen, W. Sansen
Venue: Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design (2001)

In this paper a layout-aware RF synthesis methodology is presented. The methodology combines the power of a differential evolution algorithm with cost function response modeling and integrated layout generation to synthesize RF Circuits efficiently, taking into account all layout parasitics during the circuit optimization. The proposed approach has successfully been applied to the design of a high-performance downconverter mixer circuit, proving the effectiveness of the implemented design methodology.
A Stochastic Nonlinear Regression Estimator Using Wavelets
Authors: Zuohong Pan, Xiaodi Wang
Venue: Computational Economics (1998)

A new wavelet-based estimator is introduced which combines the state-space model with the wavelet transform in an effort to explore the stock market inefficiency. The new estimator possesses some superior qualities that are illustrated through its actual performance in forecasting the S P 500.
A Rule-Based Design-for-Testability Rule Checker
Authors: Mehrdad Bidjan-Irani
Venue: IEEE Design Test (1991)

An automatic design-for-testability (DFT) rule checker that can be used during early design stages at the register-transfer level is described. The system uses expert-system technology to check the correspondence of a rule set to a register-transfer level description of the design. In addition, it runs quickly and interactively, supports hierarchical design by checking subcircuits and groups of subcircuits, and provides concrete references about possible rule violations in the circuit and advice on how to eliminate them. The system accepts arbitrary DFT rule sets as input and analyzes highly integrated circuits hierarchically. Its output provides the location of rule violations or, if there are no violations, DFT descriptions of the circuit and the analysis protocol.
Business-to-Business E-Commerce Frameworks
Authors: Simon S. Y. Shim, Vishnu S. Pendyala, Meera Sundaram, Jerry Z. Gao
Venue: Computer (2000)

Electronic commerce lets people purchase goods and exchange information on business transactions online. Although the Internet's role as a business channel is a fairly recent phenomenon, its impact, financial and otherwise, has been substantially greater than that of other business channels in existence for several decades. The authors believe that e-commerce gives companies improved efficiency and reliability of business processes through transaction automation. There are two major types of e-commerce: business to consumer (B2C), in which consumers purchase products and services from businesses, and business to business (B2B), in which businesses buy and sell among themselves. B2B transactions are a growing segment of the e-commerce market. This article analyzes and compares popular B2B frameworks that attempt to address such issues as interoperability and security between enterprises transacting business over the Internet.
A proof of a conjecture of minus domination in graphs
Authors: Chunxiang Wang, Jingzhong Mao
Venue: Discrete Mathematics (2002)

Let γ-(G) be the minus domination number of a graph G. It has been conjectured in Discrete Math. 199 (1999) 35 that γ-(G) ≥ 4((1 + n)1/2 - 1) - n for all bipartite graph of order n. In this paper we prove this conjecture.
The Architecture of the Sure System 2000 Communications Processor
Authors: Akira Kabemoto, Hiroshi Yoshida
Venue: IEEE Micro (1991)

Sure System 2000, a fault-tolerant computer that couples multiprocessors to offer low-priced, high-performance systems that deal effectively with faults and failures, is presented. The architecture is based on the local redundancy technique, ensuring that no hardware or software fault can cause a system crash. Software errors can be fixed, and hardware can be replaced, upgraded, or added dynamically. Existing fault-tolerant computers are briefly reviewed, and the logic hardware system configuration of the Sure System 2000 is described. The multiprocessor and I/O architecture are examined. The SXO Sure System 2000 expandable operating system is described.
Verification of non-functional properties of a composable architecture with Petri nets
Authors: Jan Richling, Louchka Popova-Zeugmann, Matthias Werner
Venue: Fundamenta Informaticae (2002)

In this paper, we introduce our concept of composability and present the MSS architecture as an example for a composable architecture. MSS claims to be composable with respect to timing properties. We discuss, how to model and prove properties in such an architecture with time-extended Petrinets. As a result, the first step of a proof of composability is presented as well as a new kind of Petrinet, which is more suitable for modeling architectures like MSS.
The development and operation of edinburgh parallel computing centre's summer scholarship programme
Authors: G. V. Wilson, N. B. MacDonald, C. Thornborrow, C. M. Brough
Venue: Proceedings of the 1994 ACM/IEEE conference on Supercomputing (1994)

Between 1987 and 1994, more than 100 students in a broad range of disciplines worked as summer scholars at Edinburgh Parallel Computing Centre. Many of these students have since taken their parallel computing skills into graduate work and industry, and over a quarter of EPCC's technical staff are alumni of the Programme. This report describes the evolution and present operation of the Summer Scholarship Programme, and its costs and benefits.
The Document Spectrum for Page Layout Analysis
Authors: L. O'Gorman
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1993)

Page layout analysis is a document processing technique used to determine the format of a page. This paper describes the document spectrum (or docstrum), which is a method for structural page layout analysis based on bottom-up, nearest-neighbor clustering of page components. The method yields an accurate measure of skew, within-line, and between-line spacings and locates text lines and text blocks. It is advantageous over many other methods in three main ways: independence from skew angle, independence from different text spacings, and the ability to process local regions of different text orientations within the same image. Results of the method shown for several different page formats and for randomly oriented subpages on the same image illustrate the versatility of the method. We also discuss the differences, advantages, and disadvantages of the docstrum with respect to other lay-out methods.
Efficient Partitioning of Sequences
Authors: Fredrik Manne, Bjørn Olstad
Venue: IEEE Transactions on Computers (1995)

We consider the problem of partitioning a sequence of n real numbers into p intervals such that the cost of the most expensive interval, measured with a cost function f is minimized. This problem is of importance for the scheduling of jobs both in parallel and pipelined environments. We develop a straightforward and practical dynamic programming algorithm that solves this problem in time O(p(n¿p)), which is an improvement of a factor of log p compared to the previous best algorithm. A number of variants of the problem are also considered.