ppxscal/embedding_network huggingface dataset:
Half-price architecture
Authors: Ilhyun Kim, Mikko H. Lipasti
Venue: Proceedings of the 30th annual international symposium on Computer architecture (2003)

Current-generation microprocessors are designed to process instructions with one and two source operands at equal cost. Handling two source operands requires multiple ports for each instruction in structures--such as the register file and wakeup logic--which are often in the processor's critical timing paths. We argue that these structures are overdesigned since only a small fraction of instructions require two source operands to be processed simultaneously. In this paper, we propose the half-price architecture that judiciously removes this overdesign by restricting the processor's capability to handle two source operands in certain timing-critical cases. Two techniques are proposed and evaluated: one for the wakeup logic is sequential wakeup, which decouples half of the tag matching logic from the wakeup bus to reduce the load capacitance of the bus. The other technique for the register file is sequential register access, which halves the register read ports by sequentially accessing two values using a single port when needed. We show that a pipeline that optimizes scheduling and register access for a single operand achieves nearly the same performance as an ideal base machine that fully handles two operands, with 2.2% (worst case 4.8%) IPC degradation.
Overlapping Domain Decomposition Method forNonselfadjoint Elliptic Problems Discretized by Crouzeix-Raviart Elements
Authors: Jin Gu, Zian Hu
Venue:  (1995)

Based on the discrete maximum principle established in this paper, we show the geometric convergence of the parallel Schwarz alternating method for numerically solving second order nonselfadjoint elliptic problems discretized by Crouzeix-Raviart nonconforming finite elements. The relation between its convergence factor and the subdomain division is also given.
Scalabilty of a Load Balancing Algorithm, and Its Implementation On an Intel Paragon
Authors: Azzedine Boukerche, Sajal K. Das
Venue: Proceedings of the 1999 International Symposium on Parallel Architectures, Algorithms and Networks (1999)

This paper describes an efficient implementation of a load balancing algorithm based upon a process migration mechanism, and the notion of CPU-queue length which indicates the workload at each processor. The main objective is to reduce the message overhead in conservative simulation.The algorithm were tested on four simulation workload models to study the scalability of our algorithm on an Intel Paragon multicomputer architecture using 64 processors. A significant decrease in run time and the message overhead associated with the conservative simulation was obtained with the use of the proposed dynamic load balancing algorithm as compared to the use of a static partitioning algorithm.
A Fair Congestion Control Scheme for LAN Interconnection via ATM
Authors: Ming-Hsing Chiu, Mostafa Bassiouni
Venue: Proceedings of the 1997 International Symposium on Parallel Architectures, Algorithms and Networks (1997)

When LANs are interconnected via an ATM backbone, traffic mismatch between the source LANs and the destination LAN can cause congestion at the destination Interworking Unit (DIWU). In this paper, we present an end-to-end credit-based feedback congestion control scheme that operates on the LAN side of the LAN/ATM interface. The scheme ensures that there is no packet loss at DIWU due to buffer overflow. It provides fair allocation to the source traffic demand in a max-min fashion and achieves maximum throughput possible at all level of loading conditions. The results of simulation conducted on various traffic patterns clearly demonstrate that the optimal buffer sizing at DIWU achieves minimum delay and maximum throughput at the same time.
Efficient dynamic-programming updates in partially observable Markov decision processes
Authors: Michael L. Littman, Anthony R. Cassandra, Leslie P Kaelbling
Venue:  (1995)

We examine the problem of performing exact dynamic-programming updates in partially observable Markov decision processes (POMDPs) from a computational complexity viewpoint. Dynamic-programming updates are a crucial operation in a wide range of POMDP solution methods and we find that it is intractable to perform these updates on piecewise-linear convex value functions for general POMDPs. We offer a new algorithm, called the witness algorithm, which can compute updated value functions efficiently on a restricted class of POMDPs in which the number of linear facets is not too great. We compare the witness algorithm to existing algorithms analytically and empirically and find that it is the fastest algorithm over a wide range of POMDP sizes.
Design and Evaluation of a Distributed Cache Architecture with Prediction
Authors: Thomas Alexander, Gershon Kedem
Venue:  (1994)

We propose a secondary cache architecture that combines a predictive fetch strategy with a distributed cache to build a high performance memory system. The cache is partitioned into smaller units and distributed evenly in the main memory space. The architecture offers high bandwidth between the cache and the DRAM memory. A hardware prediction scheme is used to prefetch data into the cache and hide the high DRAM latency. The prediction scheme does not rely on any predetermined data access patterns and is completely transparent to the user. Simulation of our architecture on a set of benchmark programs showed a 40\%-90\% improvement in the effective memory access time when compared to traditional caching.
Low-Cost Checkpointing with Mutable Checkpoints in Mobile Computing Systems
Authors: Guohong Cao, Mukesh Singhal
Venue: Proceedings of the The 18th International Conference on Distributed Computing Systems (1998)

Mobile computing raises many new issues, such as lack of stable storage, low bandwidth of wireless channel, high mobility, and limited battery life. These new issues make traditional checkpointing algorithms unsuitable. In this paper, we introduce the concept of ``mutable checkpoint'', which is neither a tentative checkpoint nor a permanent checkpoint. Mutable checkpoints can be saved any where; e.g., the memory or local disk of $MH$s. In this way, taking a mutable checkpoint avoids the overhead of transferring large amount of data to the stable storage in $MSS$ over the wireless network. Based on mutable checkpoints, our non-blocking algorithm avoids avalanche effect, minimizes the number of synchronization messages, and forces only a minimum number of processes to take their checkpoints on the stable storage.
Sorting Large Files on a Backend Multiprocessor
Authors: Micah Beck, Dina Bitton, W. K Wilkinson
Venue:  (1986)

A fundamental measure of processing power in a database management system is the performance of the sort utility it provides. When sorting a large data file on a serial computer, performance is limited by factors involving processor speed, memory capacity and I/O bandwidth. In this paper, we investigate the feasibility and efficiency of a parallel sort-merge algorithm through implementation on the JASMIN prototype, a backend multiprocessor built around a fast packet bus. We describe the design and implementation of a parallel sort utility that may become a building block for query processing in a database system that runs on JASMIN. We present and analyze the results of measurements corresponding to a range of file sizes and processor configurations. Our results show that using current, off-the-shelf technology coupled with a streamlined distributed operating system, three and five microprocessor configurations provide a very cost-effective sort of large files. The three processor configuration sorts a 100 megabyte file in one hour, which compares well with commercial sort packages available on high-performance mainframes. In additional experiments, we investigate a model to tune our sort software, and scale our results to higher processor and network capabilities.
Flexible Network Layer in Dynamic Networking Architecture
Authors: Takuo Suganuma, Tetsuo Kinoshita, Norio Shiratori
Venue: Proceedings of the Seventh International Conference on Parallel and Distributed Systems: Workshops (2000)

In this paper, we propose architecture of the global communication networks with dynamic functions based on the concept of Flexible Network. The dynamic function enhances the capability of communication networks to deal with various changes detected in both human users and networked environment. In our architecture, a new functional layer called Flexible Network Layer is introduced between the application layer and the IP-network layer of the global communication networks. To elaborate the functions of the Flexible Network Layer, we demonstrate an agent-based model of Flexible Network Layer for a multimedia communication application and discuss the properties of the proposed architecture.
A Pipelined TDM Optical Bus with Improved Performance
Authors: S. Q. Zheng, Yueming Li
Venue: Proceedings of the 1997 International Symposium on Parallel Architectures, Algorithms and Networks (1997)

We propose a pipelined asynchronous time division multiplexing optical bus. Such a bus can use one of the two hardwared priority schemes, the linear priority scheme and the round-robin priority scheme. Our simulation results show that the performance of the proposed bus is significantly better than the performances of known pipelined synchronous time division multiplexing optical buses. The possibilities of using our buses to construct multichannel switches and multidimensional processor arrays are also discussed.
Ternary Decision Diagrams: Survey
Authors: Tsutomu Sasao
Venue: Proceedings of the 27th International Symposium on Multiple-Valued Logic (1997)

This paper surveys seven types of TDDs: General_TDD, SOP_TDD, ESOP_TDD, AND_TDD, prime_TDD, EXOR_TDD, and Kleene_TDD. We give new definitions for SOP_TDDs and ESOP_TDDs and introduce unifying terminology. After showing some theorems on complexities, we compare the sizes of these TDDs using benchmark functions. Finally, we review important works on TDDs.
The future of programming languages: evidence to support a midwest university information systems curriculum
Authors: James Wenger
Venue: Journal of Systems and Software (2003)

The university curriculum for an Information Systems program has become a challenge for colleges and universities. This paper determined the status of programming languages used by business and industry for application development in a regional area located in the Midwest. The paper reflected the percentage of what languages were being used, the increase, decrease, or nonusage of languages, ranked the current and future use of languages, and identified business and industry recommendations for curriculum content in a university program.
An Innovative Routing Protocol Evaluation Tool
Authors: James Holt, Wuxu Peng
Venue: Proceedings of the 6th International Conference on Computer Communications and Networks (1997)

We describe a software tool MCS (multicast simulation) that we developed to evaluate routing protocols. MCS is based on several innovative ideas and provides a very user-friendly, flexible, and dynamically configurable GUI. We present results of applying MCS to the PIM (Protocol Independent Multicast) routing protocol.
Building an Adaptable, Fault Tolerant, and Highly Manageable Web Server on Clusters of Non-Dedicated Workstations
Authors: Chu-Sing Yang, Mon-Yen Luo
Venue: Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing (2000)

Clustered server architecture is increasingly being viewed as a successful and cost-effective approach to building a high-performance Web server. Existing server-clustering schemes have typically concentrated on the following issues: scalability, high availability, and user transparency. In this paper, we argue that the design goals of the Web server cluster should include adaptability, fault tolerance, and high manageability. In the presence of the Internet's highly unpredictable workload, the server system should be self-adapting to changing circumstances. We address this problem by building a Web server on a cluster of non-dedicated workstations. Such a server can easily recruit non-dedicated nodes dynamically in response to load bursts. Based on such a scheme, we designed and implemented an innovative approach that enables an ongoing request to be smoothly migrated to another node either in response to a node failure or overload. We also designed and implemented a management system that enables the Web site manager to manage and maintain the distributed server as a single large system.
WSDFU: program transformation system based on generalized partial computation
Authors: Yoshihiko Futamura, Zenjiro Konishi, Robert Glück
Venue: The essence of computation: complexity, analysis, transformation (2002)

Generalized Partial Computation (GPC) is a program transformation method utilizing partial information about input data and auxiliary functions as well as the logical structure of a source program. GPC uses both an inference engine such as a theorem prover and a classical partial evaluator to optimize programs. Therefore, GPC is more powerful than classical partial evaluators but harder to implement and control. We have implemented an experimental GPC system called WSDFU (Waseda Simplify-Distribute-Fold-Unfold). This paper demonstrates the power of the program transformation system as well as its theorem prover and discusses some future works.
Resolution Strategies for Focusing a Reason Maintenance System
Authors: Rachid Yacoub, Michel Dumas, Gilles Arnaud
Venue: Proceedings of the 8th International Conference on Tools with Artificial Intelligence (1996)

The ATMS, as defined by de Kleer and used in a problem solver, loses its efficiency due to the exponential complexity of its algorithm. Improvement works are proposed : a) computing only labels of interesting data b) computing only some environments characterized by a focus. We propose to control a problem solver coupling a deduction system and a Reason Maintenance System (RMS) based on the resolution principle. In this paper, new classes of clauses and new resolution strategies will be defined integrating these improvements and reducing the work done by the RMS.
Generating pairs for the sporadic group Ru
Authors: M. R. Darafsheh, A. R. Ashrafi
Venue: The Korean Journal of Computational Applied Mathematics (2003)

A finite group G is called (l,m,n)-generated, if it is a quotient group of the triangle group T(l,m,n) = (x,y, z|xl = ym = zn = xyz = 1). In [19], the question of finding all triples (l,m,n) such that non-abelian finite simple groups are (l,m,n)-generated was posed. In this paper we partially answer this question for the sporadic group Ru. In fact, we prove that if p,q and r are prime divisors of |Ru|, where p < q r and (p,q) ≠ (2, 3), then Ru is (p,q,r)-generated.
Efficient Distributed Shared State for Heterogeneous Machine Architectures
Authors: Chunqiang Tang, DeQing Chen, Sandhya Dwarkadas, Michael L. Scott
Venue: Proceedings of the 23rd International Conference on Distributed Computing Systems (2003)

InterWeave is a distributed middleware system that supportsthe sharing of strongly typed, pointer-rich data structuresacross heterogeneous platforms. As a complementto RPC-based systems such as CORBA, .NET, and JavaRMI, InterWeave allows processes to access shared datausing ordinary reads and writes. Experience indicatesthat InterWeave-style sharing facilitates the rapid developmentof distributed applications, and enhances performancethrough transparent caching of state.In this paper, we focus on the aspects of InterWeavespecifically designed to accommodate heterogeneous machinearchitectures. Beyond the traditional challenges ofmessage-passing in heterogeneous systems, InterWeave (1)identifies and tracks data changes in the face of relaxed coherencemodels, (2) employs a wire format that capturesnot only data but also diffs in a machine and language-independentform, and (3) swizzles pointers to maintainlong-lived (cross-call) address transparency. To supportthese operations, InterWeave maintains an extensive set ofmetadata structures, and employs a variety of performanceoptimizations. Experimental results show that InterWeaveachieves performance comparable to that of RPC parameterpassing when transmitting previously uncached data.When updating data that have already been cached, Inter-Weave'suse of platform-independent diffs allows it to significantlyoutperform the straightforward use of RPC.
The linear delta-matroid parity problem
Authors: James F. Geelen, Satoru Iwata, Kazuo Murota
Venue: Journal of Combinatorial Theory Series B (2003)

This paper addresses a generalization of the matroid parity problem to delta-matroids. We give a minimax relation, as well as an efficient algorithm, for linearly represented delta-matroids. These are natural extensions of the minimax theorem of Lovász and the augmenting path algorithm of Gabow and Stallmann for the linear matroid parity problem.
Size-Time Complexity of Boolean Networks for Prefix Computations
Authors: Gianfranco Bilardi, Franco P. Preparata
Venue:  (1987)

The prefix problem consists of computing all the products $x_{0}x_{1}\ldots x_{j} (j=0,\ldots,N-1)$, given a sequence $X = (x_{0},x_{1},\ldots,x_{N-1})$ of elements in a semigroup. In this paper we completely characterize the size-time complexity of computing prefixes with boolean networks, which are synchronized interconnections of boolean gates and one-bit storage devices. This complexity crucially depends upon a property of the underlying semigroup, which we call cycle-freedom (no cycle of length greater than one in the Cayley graph of the semigroup). Denoting by $S$ and $T$ size and computation time, respectively, we have $S = \Theta((N/T) \log(N/T))$, for non-cycle-free semigroups, and $S = \Theta((N/T)$, for cycle-free semigroups. In both cases, $T \in [\Omega(\logN),O(N)]$.
Checkers for RF Matching Networks on an Automatic Test Board
Authors: Giuseppe Di Gregorio, Maria Grazia La Rosa, Biagio Russo
Venue: Proceedings of the Proceedings of The Eighth IEEE International On-Line Testing Workshop (IOLTW'02) (2002)

This paper shows a method to check the RF matching network, used in a RF Test Board for an Automatic Test Environment.This method is able to measure the performances and the drift of the network with no variation of the circuit used to test the Device under test. The RF test board performance isunder control during the testing phase improving the test reliability and the maintenance's cycle time.
Coupling experimental design: digital simulation of junctions for the development of complex tolerance chains
Authors: B. Anselmetti, H. Mejbri, K. Mawussi
Venue: Computers in Industry (2003)

This paper presents a new functional tolerancing method developed for analyzing tri-dimensional variations of mechanical assemblies. The behavior of a junction is simulated with Microsoft EXCEL to quantify the influence of geometrical variations of a given part on a functional requirement. The solver determines the critical situation of the mechanism with respect to the contact constraints and the location and orientation tolerances. The result of this stage is introduced into an experimental design so as to define a relationship between the variation of the functional requirement and the geometric tolerances specified for the surfaces of the parts. The complete inequality ensuring tolerance synthesis is obtained by adding the defects of all junctions forming the vector loop.
Photoshop 7 Killer Tips
Authors: Scott Kelby, Felix Nelson
Venue:  (2002)

:Speed Kills! When it comes to Photoshop, time is money, and this hot new Killer Tips book (from the creative forces behind Photoshop User magazine, Scott Kelby and Felix Nelson) is all about speed, speed, and more speed! It's about efficiency, productivity, and best of all, the fun (and bragging rights) that comes with knowing all the inside tips. Speed Freak! Wouldn't it be cool if there was a Photoshop book, where the whole book, cover-to-cover, was nothing but those cool little sidebar tips on the inside of every great Photoshop book? If you love those little sidebar tips just as much as we do, if you love Photoshop as much as we do, if you want to be an outrageously fast Photoshop speed freak, then this book is for you. Fast and Furious! There are no special effects, no flaming type, no glows, no buttons, no bevels, etc. -- it's packed cover-to-cover with nothing but tips. It's designed to teach you those hidden productivity tips, inside shortcuts, and little-known tricks that the pros use every day to get twice the work done in half the time. The whole book is designed for one reason -- to help you smoke the competition.
Handwritten Numeral String Recognition Using Neural Network Classifier Trained with Negative Data
Authors: Ho-Yon Kim, Kil-Taek Lim, Yun-Seok Nam
Venue: Proceedings of the Eighth International Workshop on Frontiers in Handwriting Recognition (IWFHR'02) (2002)

In this paper, we investigate the behavior of neural network classifiers with the negative data, and develop an off-line handwritten numeral string recognition system based on the neural network classifier that uses negative data when estimating parameters. For numeral stringrecognition, it is attempted to generate all plausible segmentation candidates by character segmentation, which is followed by recognizing the segmentation candidates and finding an optimal segmentation path. In the preliminary experiments for numeral string recognition, the recognition rate of the classifier trained with both positive data and negative data is much higher than the recognition rate of the classifier trained with only positive data. This is because the classifier trained with negative data produces low matching scores for non-characters,which enables the numeral string recognizer to exclude non-characters from the segmentationalternatives, so it helps the numeral string recognizer to find correct character segmentation paths.
A Triangular Processor Array for Computing the Singular Value Decomposition
Authors: Franklin T. Luk
Venue:  (1984)

A triangular processor array for computing a singular value decomposition (SVD) of an $m \times n (m \geq n)$ matrix is proposed. A Jacobi-type algorithm is used to first triangularize the given matrix and then diagonalize the resultant triangular form. The requirements are $O(m)$ time and $1/4 n^{2} + O(n)$ processors.
Extracting Geometric Models of Muscles from the Visible Human Data
Venue: Proceedings of the International Conference on Information Visualisation (2000)

Muscle simulation should be an important component of human modeling, but to date there have been few attempts to demonstrate muscle structures in an anatomically-correct way. This paper proposes a feature-based approach to muscle modeling, which attempts to provide models for human musculature based on the real anatomical structures. These models provide a good visual description and form a sound basis for further developments towards medically accurate simulation of human bodies. To allow for the wide variety of muscle shapes encountered in the body, the geometric models are based on muscle features identified from radiological data. These results are realistic models with correct anatomical structures.
Electronic Process Limited Yield
Authors: Gary W. Maier, Shawn Smith
Venue: Proceedings of the 1st International Symposium on Quality of Electronic Design (2000)

Today's industry is expanding the high performance microprocessor market into the consumer market place. This market requires very low cost, high reliability, stricter SPQL levels, and very high yields. A New Diagnostic Methodology is required to meet these new demands.This paper address's a broad scope of issues from Product Design and Manufacturing Test, to Diagnostic and Data Analysis Tools. It describes a beta test case currently in operation on IBM's latest PowerPC products in their copper and SOI technologies.