ppxscal/embedding_network huggingface dataset:
ExpertClerk: A Conversational Case-Based Reasoning Tool forDeveloping Salesclerk Agents in E-Commerce Webshops
Authors: Hideo Shimazu
Venue: Artificial Intelligence Review (2002)

Conversational Case-based Reasoning (CCBR) has been used successfully to improve knowledge management in corporate activities as a problem solver. In our past research, we developed CCBR systems in customer support domains where CCBR systems played the role of customer support agents. Based on these experiences, we have applied the same CCBR technologies to design the user-interface of e-commerce websites. ExpertClerk was designed as a tool for developing dialogue-based front-end systems for product databases. We first analyzed conversation models of human salesclerks interacting with customers. The goal of a salesclerk is to effectively match a customer's buying points and a product's selling points. To achieve this, the salesclerk alternates between asking questions, proposing sample products, and observing the customer's responses. ExpertClerk imitates a human salesclerk. It consolidates the human shopper's requests by narrowing down a list of many products through a process of asking effective questions using entropy (navigation-by-asking) and showing contrasting samples with an explanation of their selling points (navigation-by-proposing). This request elaboration cycle is repeated until the shopper finds an appropriate product. In this article, we present the system architecture, algorithms as well as empirical evaluations.
Use of a capacitance voltage technique to study copper drift diffusion in (porous) inorganic low-k materials
Authors: F. Lanckmans, K. Maex
Venue: Microelectronic Engineering (2002)

Cu+ drift diffusion in two inorganic low-k materials is evaluated. The diffusion is investigated by measuring shifts in the flatband voltage of capacitance/voltage measurements on Cu gate capacitors after bias temperature stressing. The Cu+ drift rate in SiOxCy (2.7 ≤k≤3.1) is considerably lower than in PECVD oxide. This electrical method is not suited for a porous silicon resin (k ≈ 2.0) because of the occurrence of instabilities in the metal/dielectric. A modification of the measurement technique is required. The modification consists of measuring the Cu+ ions, which have been diffused through the porous dielectric in an underlying thermal oxide layer. The Cu+ drift mobility in the porous dielectric as measured by this method appears to be lower than in thermal oxide.
Hybrid representations for audiophonic signal encoding
Authors: L. Daudet, B. Torrésani
Venue: Signal Processing (2002)

In this paper, we discuss a new approach for signal models in the context of audio signal encoding. The method is based upon hybrid models featuring simultaneously transient, tonal and stochastic components in the signal. Contrary to several existing approaches, our method does not rely on any prior segmentation of the signal. The three components are estimated and encoded using a strategy very much in the spirit of transform coding. While the details of the method described here are tailored to audio signals, the general strategy should also apply to other types of signals exhibiting significantly different features, for example images.
Collaborative Computing: The Next Millennium
Venue: Computer (1999)

Nunamaker has spent nearly two decades working in the field of collaboration technology. His articles on group support systems and collaborative computing have appeared in many publications, including Computer, the Journal of Management Information Systems, and the Communications of the ACM. In this Computer interview, Nunamaker addresses the advent of ubiquitous connectivity that signals a drastic change in the nature of globalized business environments. He sees the side-effects of race, gender, and ethnicity disappearing as anonymity dissolves any predispositions, letting people express themselves without the natural inhibiting influences commonly associated with face-to-face meetings. Nunamaker predicts a 90 percent increase in productivity due to this revolution. He also feels that collaborative computing promises to become one the the next century's core applications.
Finite Buffer Analysis of Multistage Interconnection Networks
Authors: Jianxun Ding, L. N. Bhuyan
Venue: IEEE Transactions on Computers (1994)

Proposes an analysis technique for a class of Multistage Interconnection Networks (MIN's) that have finite buffers at their switch inputs and operate in a synchronous packet-switched mode. The authors examine the issue of clock period in design and analysis of synchronous MIN's and propose a model based on small clock periods. Then they analyze their "small cycle" design and compare the results with those obtained from the standard "big cycle" model that is currently used. The significant performance improvement of their model is shown based on various clock width, data width, and buffer length.
Efficient parallel global garbage collection on massively parallel computers
Authors: Tomio Kamada, Satoshi Matsuoka, Akinori Yonezawa
Venue: Proceedings of the 1994 ACM/IEEE conference on Supercomputing (1994)

On distributed-memory high-performance MPPs where processors are interconnected by an asynchronous network, efficient Garbage Collection (GC) becomes difficult due to inter-node references and references within pending, unprocessed messages. Our parallel global GC algorithm (1) takes advantage of reference locality, (2) efficiently traverses references over nodes, (3) admits minimum pause time of ongoing computations, and (4) has been shown to scale up to 1024 node MPPs. The algorithm employs a global weight counting scheme to substantially reduce message traffic. The two methods for confirming the arrival of pending messages are used: one counts numbers of messages and the other uses network 'bulldozing.'Performance evaluation in actual implementations on a multicomputer with 32-1024 nodes, Fujitsu AP1000, reveals various favorable properties of the algorithm.
Enabling Italian E-Government through a Cooperative Architecture
Authors: Massimo Mecella, Carlo Batini
Venue: Computer (2001)

In 1993, the Italian government created the Authority for Information Technology in the Public Administration to promote innovation by defining the criteria for implementing and managing the Italian Public Administration's information systems. Its Unitary Network provides interconnection services to individual public administrations (PAs). A more ambitious objective is implementing a "secure intranet" that connects all Italian PAs. Developing an evolutionary architecture to integrate large heterogeneous systems poses another challenge. Although these systems support vertical applications, exporting their services requires reengineering their technological services and administrative processes. The goal is to establish an architecture that coordinates information exchange among government information systems while maintaining each organization's autonomy. The authors emphasize the importance of cooperation among administrations to develop an iterative, cyclic process considering the constraints imposed by organizational differences in size, culture, and management rules.
Boundary Procedures for Summation-by-Parts Operators
Authors: Ken Mattsson
Venue: Journal of Scientific Computing (2003)

Four different methods of imposing boundary conditions for the linear advection-diffusion equation and a linear hyperbolic system are considered. The methods are analyzed using the energy method and the Laplace transform technique. Numerical calculations are done, considering in particular the case when the initial data and boundary data are inconsistent.
PMR: point to mesh rendering, a feature-based approach
Authors: Tamal K. Dey, James Hudson
Venue: Proceedings of the conference on Visualization '02 (2002)

Within the field of computer graphics and visualization, it is often necessary to visualize polygonal models with large number of polygons. Display quality is mandatory, but it is also desirable to have the ability to rapidly update the display in order to facilitate interactive use. Point based rendering methods have been shown effective for this task. Building on this paradigm we introduce the PMR system which uses a hierarchy both in points and triangles for rendering. This hierarchy is fundamentally different from the ones used in existing methods. It is based on the feature geometry in the object space rather than its projection in the screen space. This provides certain advantages over the existing methods.
Diffusion and electrical activity of copper in Si1-x-yGexCyalloys
Authors: A. Hattab, M. O. Aboelfotoh, G. Tremblay, F. Meyer, J. Kolodzey, H. J. Osten, C. Dubois
Venue: Microelectronic Engineering (2002)

We investigate copper diffusion in Si-rich Si1-x-yGexCy (x<20%) and Ge-rich (x=93%) Si1-xGex layers. The profiles of the different constituents (Si, Ge, Cu, C, B) were determined using secondary ion mass spectroscopy (SIMS). Carrier profiles were studied by electrical characterizations of Schottky diodes. The structures were prepared by copper deposition on SiGeC alloys at room temperature. The increase of the Ge-content from 0% to 93% results in a decrease of the Cu diffusion depth determined by SIMS. C-incorporation also leads to a reduction of Cu-diffusion. The effect of boron seems to be more important, and Cu-diffusion is well retarded in p-type samples. The electrical activity of Cu in IV-IV alloys depends on the Ge-content. For Si-fich p-type SiGe alloy, we observed a passivation of the boron acceptors attributed to the formation of Cu-B pairs, which also explains the reduction of Cu diffusion. For p-type Ge-rich samples, the acceptor concentration can reach very high values (larger than the boron concentration), and becomes temperature dependent. These results show that boron passivation is no longer the most important effect of Cu diffusion. We suggest that the presence of Cu in Ge-rich alloys produces an acceptor-like trap.
Visiting user services personnel
Authors: Geraldine MacDonald, Patricia Box
Venue: Proceedings of the 7th annual ACM SIGUCCS conference on User services (1979)

The advantages and disadvantages of professional development opportunities, such as sabbaticals and leaves of absence for university computer center personnel, have been evaluated by others. This paper reports on experiences at the Stanford Center for Information Processing (SCIP) where professionals have been hired for one year as visiting staff members in User Services while on leave from permanent positions at other university computer centers.
AutoWF: a secure web workflow system using autonomous objects
Authors: Ehud Gudes, Aharon Tubman
Venue: Data Knowledge Engineering (2002)

Workflow management systems (WFMS) automate business processes where information flows between individuals. WFMS have two major implications for security: First, since the description of a workflow process explicitly states when which function is to be performed by whom, security specifications may be derived from such descriptions and translated into static role-based specifications. Second, since the WFMS is to be operated on the Web using web agents, dynamic and individual security rules must be enforced. AutoWF includes both types of security policies. AutoWF is implemented on top of a powerful software foundation--autonomous objects. Both general workflow management tasks and specific functional tasks are implemented as autonomous objects distributed over the Internet.This paper surveys some of the concepts on which the system is based, it then concentrates on the design and architectural issues of the AutoWF system, and finally we present some implementation examples.
Sunder: a programmable hardware prefetch architecture for numerical loops
Authors: Tzi-cker Chiueh
Venue: Proceedings of the 1994 ACM/IEEE conference on Supercomputing (1994)

Beyond data caching, data prefetching is by far the most effective way to address the memory access bottleneck associated with high-performance processors. This is particularly true for scientific programs whose working sets cannot be easily fit into the on-chip data cache. This paper proposes a new data prefetching architecture called Sunder, which combines the flexibility and accurateness of software prefetching and the transparency and low-overhead of hardware prefetching. The heart of the design is a dedicated Prefetch Engine that is programmable at run time by the software. An important design decision is to keep the Prefetch Engine completely isolated from the normal instruction execution pipeline except a loop counter to keep the two synchronized at the boundaries of loop iterations. A detailed simulation study on the Sunder architecture shows that compared to the cache-only architecture, Sunder achieves an average relative performance advantage over cache-only architectures ranging from 28% to 46%, with smaller cache block sizes leading to greater performance improvement.
Machine Vision Technology for the Forest Products Industry
Authors: Richard W. Conners, D. Earl Kline, Philip A. Araman, Thomas H. Drayer
Venue: Computer (1997)

From forest to finished product, wood moves through a series of stages that are little changed from sawmill practices of a hundred years ago. Many of the subjective decisions workers make along the way directly affect the quality and yield of the wood products. Wood grows more valuable and labor more expensive every day. At the same time, technology now exists to provide more complete information to decision makers. This article describes a machine vision prototype for wood products manufacturing. The prototype uses color cameras, laser and X-ray scanners, and three key image-processing algorithms. The full-scale prototype meets all industrial requirements except that it does not provide a full range of speeds. Its application shows the usefulness of machine vision technology in the forest products industry.
Comments on 'A Systematic (16, 8) Code for Correcting Double Errors and Detecting Triple-Adjacent Errors'
Authors: Rajendra S. Katti
Venue: IEEE Transactions on Computers (1995)

In this paper we first present a systematic (16, 8) code that can correct double errors and detect all triple-adjacent errors. The restriction of detecting triple-adjacent errors in 8-bit bytes has been removed. We also present a systematic (16, 8) code that can correct all 16 single errors, correct 113 of the 120 double errors, detect seven double errors, correct seven of 14 triple adjacent errors, detect seven triple adjacent errors, and correct all quadruple adjacent errors.
Optimal Processor Assignment for a Class of Pipelined Computations
Authors: A. N. Choudhary, B. Narahari, D. M. Nicol, R. Simha
Venue: IEEE Transactions on Parallel and Distributed Systems (1994)

The availability of large-scale multitasked parallel architectures introduces the followingprocessor assignment problem. We are given a long sequence of data sets, each of whichis to undergo processing by a collection of tasks whose intertask data dependencies forma series-parallel partial order. Each individual task is potentially parallelizable, with aknown experimentally determined execution signature. Recognizing that data sets can bepipelined through the task structure, the problem is to find a "good" assignment ofprocessors to tasks. Two objectives interest us: minimal response time per data set,given a throughput requirement, and maximal throughput, given a response timerequirement. Our approach is to decompose a series-parallel task system into its essential"serial" and "parallel" components; our problem admits the independent solution andrecomposition of each such component. We provide algorithms for the series analysis, and use an algorithm due to Krishnamurti and Ma for the parallel analysis. For a p processor system and a series-parallel precedence graph with n constituent tasks, we give a O(np/sup 2/) algorithm that finds the optimal assignment (over a broad class ofassignments) for the response time optimization problem; we find the assignmentoptimizing the constrained throughput in O(np/sup 2/ log p) time. These techniques areapplied to a task system in computer vision.
Blobworld: Image Segmentation Using Expectation-Maximization and Its Application to Image Querying
Authors: Chad Carson, Serge Belongie, Hayit Greenspan, Jitendra Malik
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (2002)

Retrieving images from large and varied collections using image content as a key is a challenging and important problem. We present a new image representation that provides a transformation from the raw pixel data to a small set of image regions that are coherent in color and texture. This "Blobworld" representation is created by clustering pixels in a joint color-texture-position feature space. The segmentation algorithm is fully automatic and has been run on a collection of 10,000 natural images. We describe a system that uses the Blobworld representation to retrieve images from this collection. An important aspect of the system is that the user is allowed to view the internal representation of the submitted image and the query results. Similar systems do not offer the user this view into the workings of the system; consequently, query results from these systems can be inexplicable, despite the availability of knobs for adjusting the similarity metrics. By finding image regions that roughly correspond to objects, we allow querying at the level of objects rather than global image properties. We present results indicating that querying for images using Blobworld produces higher precision than does querying using color and texture histograms of the entire image in cases where the image contains distinctive objects.
Protected Object References in Heterogeneous Distributed Systems
Authors: K. Geihs, R. Heite, U. H. Hollberg
Venue: IEEE Transactions on Computers (1993)

In object-oriented distributed processing systems, all interactions between objects occur solely through their defined external interfaces. The authors argue that object reference parameters should be supported in such systems for reasons of programming style and productivity. It is not sufficient to pass the name of an object as a string. The system must be aware of reference parameters and provide means to control and protect the delegation of access. The authors' emphasis is on motivating the need for protected object references and on showing that their efficient implementation is feasible in diverse environments. The design is guided by the principle of minimal trust. Two prototype implementations of object reference support systems are presented. One is an example in which, right from the start, object references are integrated into the design of a kernel for a network operating system for heterogeneous distributed environments. The other prototype shows how object references can be added to a popular remote procedure call package in an upwardly compatible way.
Designing the MPC105 PCI Bridge/Memory Controller
Authors: Karl Wang, Chris Bryant, Mike Carlson, Mike Elmer, Adrian Harris, Michael Garcia, C. S. Hui, C. K. Leung, Brian Reynolds, Raymond Tang, Laura Weber, Jim Wenzel, Glen Wilson, Mike Becker
Venue: IEEE Micro (1995)

The design of a single chip PowerPC Reference Platform Specification compliant bridge between a PowerPC microprocessor and the PCI bus is described. The MPC105 PCI Bridge/Memory Controller allows system designers to rapidly design systems using peripherals already designed for PCI and the other standard interfaces available in the personal computer hardware environment. The MPC105 also integrates a secondary cache controller and a high performance memory controller which supports DRAM or SDRAM and ROM or Flash ROM. This article highlights the design features and discusses the architecture, performance, package technology, power management, and physical implementation.
A Complete Strategy for Testing an On-Chip Multiprocessor Architecture
Authors: Chouki Aktouf
Venue: IEEE Design Test (2002)

By dividing testing into three phases-router, RAM block, and processors-this strategy ensures an efficient tradeoff of test quality and cost.
Roundtable Introduction
Authors: Janet Wilson
Venue: Computer (1998)

Chip architects from Sun, Cyrix, Motorola, Mips, Intel, and Digital see challenges rather than walls in micro-processor design. They share their in-sights in this virtual roundtable. IntroductionIn "Increasing Work, Pushing the Clock," Mark Tremblay discusses the conflicting goals of improving how much work a processor does per cycle and at the same time shortening the cycle time.In "Reining in Complexity," Greg Grohoski says we need to reduce the processor complexity to spend less time debugging that complexity. In "Specialization: A Way of Life," Brad Burgess thinks tightly interwoven designs will better support focused applications. In "Challenges, Not Roadblocks," Earl Killian is confident the industry will solve foreseeable problems. He sees "big data" problems as key design drivers. In "Maintaining a Leading Position," Robert Colwell sees a convergence of factors that make validation a big concern. He foresees future computers as communication enhancement devices. In "Managing Problems at High Speed," Paul I. Rubinfeld names five issues as important to processor design and discusses some challenges specific to high-speed processor design.Despite the competitiveness of their field, these six architects shared several insights of interest to those not intimately connected with processor design. This virtual roundtable concludes by highlighting a technology trend we should hear more about in 1998. In "Introduction to Predication," Wen-mei Hwu explains the technique that is a major change embodied in Intel's next-generation, 64-bit architecture.
Recursive Estimation of Motion, Structure, and Focal Length
Authors: Ali Azarbayejani, Alex P. Pentland
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1995)

We present a formulation for recursive recovery of motion, pointwise structure, and focal length from feature correspondences tracked through an image sequence. In addition to adding focal length to the state vector, several representational improvements are made over earlier structure from motion formulations, yielding a stable and accurate estimation framework which applies uniformly to both true perspective and orthographic projection. Results on synthetic and real imagery illustrate the performance of the estimator.
Design and Analysis of Even-Sized Binary Shuffle-Exchange Networks for Multiprocessors
Authors: K. Padmanabhan
Venue: IEEE Transactions on Parallel and Distributed Systems (1991)

The architecture and performance of binary shuffle-exchange networks of any size are investigated. It is established that a network with a shuffle-exchange stages whose number equals the least integer (or=log/sub 2/N) or a single recirculating stage can provide the connectivity between N inputs and N outputs using a distributed tag-based control algorithm. Control tags depend on both source and destination when N is not a power of two and can be computed in a simple manner. Several structural and dynamic properties of the network are established, contrasting the behavior of the power-of-two and composite sized systems. The performance of the network in a stochastic environment is investigated analytically. It is shown that the shuffle-exchange networks behave in much the same way with respect to traffic and buffer capacity regardless of whether the system size is a power of two or not.