ppxscal/embedding_network huggingface dataset:
A CPU scheduling simulation from structured programming to object-oriented design
Authors: L. S. Tang
Venue: Proceedings of the twenty-third SIGCSE technical symposium on Computer science education (1992)

Object-oriented programming has become increasingly popular in the past few years. This paper presents a cpu scheduling simulation project that we feel can convince students of the benefits of object-oriented design and spur their interest. We will first describe the project and discuss its solutions in three levels of abstraction: structure programming using Pascal, object-based programming using Ada, and object-oriented programming using C++. We will present our experiences in this assignment and explain why the object-oriented design is the best approach. This paper is intended to serve as a case study in an object-oriented language course or a programming languages course.
Spline cryptosystem
Authors: C. Y. Ho, Qiwo Xuan, Fengi Hwu
Venue: ACM SIGSAC Review (1992)

The Spline Cryptosystem has succeeded two major achievements: First, the system is based on real arithmetic which is generally considered unapplicable to cryptography because the information is lost through round-off errors. Secondly, our prospective cryptosystem-Spline Cryptosystem, without providing the common session key, the solution of recovering messages from corresponding cryptogram is mathematically undeterminate, which may withstand any attack. Moreover, the cryptosystem can be implemented on any current personal computer, and both enciphering and deciphering processes can be achieved in little amount of time in comparison with the RSA's approach. Eventually, machine hardware will catch up with practice, such that all of the current computationally insurmountable problems will be resolved in some time in the future.
A methodology for hardware verification based on logic simulation
Authors: Randal E. Bryant
Venue: Journal of the ACM (JACM) (1991)

A logic simulator can prove the correctness of a digital circuit if it can be shown that only circuits fulfilling the system specification will produce a particular response to a sequence of simulation commands.This style of verification has advantages over the other proof methods in being readily automated and requiring less attention on the part of the user to the low-level details of the design. It has advantages over other approaches to simulation in providing more reliable results, often at a comparable cost. This paper presents the theoretical foundations of several related approaches to circuit verification based on logic simulation. These approaches exploit the three-valued modeling capability found in most logic simulators, where the third-value X indicates a signal with unknown digital value. Although the circuit verification problem is NP-hard as measured in the size of the circuit description, several techniques can reduce the simulation complexity to a manageable level for many practical circuits.
Concurrent reusable abstract data types
Authors: Jeffrey R. Carter
Venue: ACM SIGAda Ada Letters (1991)

A commonly used form of concurrent abstract data types always leads to erroneous execution. A corrected version of this form, suggested in the article which pointed out this problem, is not considered to be acceptable software engineering practice by the author. An acceptable correct form is presented.
Computing Cumulative Measures of Stiff Markov Chains Using Aggregation
Authors: A. Bobbio, K. Trivedi
Venue: IEEE Transactions on Computers (1990)

An aggregation method for computing transient cumulative measures of large, stiff Markov models is presented. The method is based on classifying the states of the original problem into slow, fast-transient, and fast-current states. The authors aggregate fast-transient states and fast-recurrent states so that an approximate value to the desired cumulative measure can be obtained by solving a nonstiff set of linear differential equations defined over a reduced subset of slow states only. Several examples are included to illustrate how stiffness arises naturally in actual queuing and reliability models, and to show that cumulative measures provide a better characterization of the time-dependent system behavior.
Adjustable block size coherent caches
Authors: Czarek Dubnicki, Thomas J. LeBlanc
Venue: Proceedings of the 19th annual international symposium on Computer architecture (1992)

Several studies have shown that the performance of coherent caches depends on the relationship between the granularity of sharing and locality exhibited by the program and the cache block size. Large cache blocks exploit processor and spatial locality, but may cause unnecessary cache invalidations due to false sharing. Small cache blocks can reduce the number of cache invalidations, but increase the nuber of bus or network transactions required to load data into the cache. In this paper we describe a cache organization that dynamically adjusts the cache block size according to recently observed reference behavior. Cache blocks are split across cache lines when false sharing occurs, ad merged back into a single cache line to explit spatial locality. To evaluate this cache organization, we simulate a scalable multiprocessor with coherent caches, using a suite of memory reference traces to model program behavior. We show that for evry fixed block size, some program suffers a 33% increase in the average waiting time per reference, and a factor of 2 increase in the average number of words transferred per reference, when compared against the performance of an adjustable block size cache. In the few cases where adjusting the block size does not provide superior performance, it comes within 7% of the best fixed block size alternative. We conclude that an adjustable block size cache offers significantly better performance than every fixed block size cache, especially when there is variability in the granularity of sharing exhibited by applications.
Comparing object-oriented and data flow models&mdash;a case study
Authors: Ken Abernethy, John C. Kelly
Venue: Proceedings of the 1992 ACM annual conference on Communications (1992)

Object-oriented analysis is the newest component of a proposed object-oriented software life cycle methodology. In this paper, we make comparisons between the standard data flow diagram (DFD) models and the newly introduced object models within the context of an existing moderately complex (approx. 65,000 lines) software project. In particular, we compare the complexities of competing models for the project domain using some simple metrics.
Continuous speech recognition using segmental neural nets
Authors: S. Austin, J. Makhoul, R. Schwartz, G. Zavaliagkos
Venue: Proceedings of the workshop on Speech and Natural Language (1991)

We present the concept of a "Segmental Neural Net" (SNN) for phonetic modeling in continuous speech recognition. The SNN takes as input all the frames of a phonetic segment and gives as output an estimate of the probability of each of the phonemes, given the input segment. By taking into account all the frames of a phonetic segment simultaneously, the SNN overcomes the well-known conditional-independence limitation of hidden Markov models (HMM). However, the problem of automatic segmentation with neural nets is a formidable computing task compared to HMMs. Therefore, to take advantage of the training and decoding speed of HMMs, we have developed a novel hybrid SNN/HMM system that combines the advantages of both types of approaches. In this hybrid system, use is made of the N-best paradigm to generate likely phonetic segmentations, which are then scored by the SNN. The HMM and SNN scores are then combined to optimize performance. In this manner, the recognition accuracy is guaranteed to be no worse than the HMM system alone.
SCinet '91: Supercomputing '91s gigabit network
Authors: Alex Nussbaum
Venue: ACM SIGUCCS Newsletter (1992)

Albuquerque, NM: In a spirit of cooperation unparalleled in the computing business, technicians, company CEOs, scientists, and engineers worked together to create SCinet '91, a gigabit network designed specifically for SUPERCOMPUTING '91, the fourth conference on high-performance computing, held November 18-22 in Albuquerque. In addition to hundreds of person-hours in the past few weeks and several months of planning, donations of cable and equipment came from Cray Research, IBM, Digital Equipment, USWest Communications, Network Systems, Ultra Network Technologies, SynOptics Communications, Broadband Communications Products, Interop, Aquila Group, and Siecor to develop this unique example of the cooperation and networking envisioned in the National Research and Education Network (NREN). NREN is part of the President's High Performance Computing and Communication initiative, a bill that just passed in the House of Representatives and is currently in the Senate. The keynote address at the conference was given by D. Allan Bromley, Science Advisor to the President, who expressed strong hope that the bill would pass.
Semantically Extended Dataflow Diagrams: A Formal Specification Tool
Authors: Robert B. France
Venue: IEEE Transactions on Software Engineering (1992)

A method for associating a dataflow diagram (DFD) with a formal specification is described. The intention is to enhance the use of the DFD as a formal specification tool, thus gaining a tool that can be used to document application functionality in an understandable manner and, at the same time, be capable of producing a formal specification that can be used to rigorously investigate the semantic properties of the application. It is shown how the formal specifications characterizing semantic models ofDFDs can be used to investigate desired application properties of verify semantic decompositions of data transforms.
CAKE: an implemented hybrid knowledge representation and limited reasoning system
Authors: Charles Rich
Venue: ACM SIGART Bulletin (1991)

The particular combination of facilities implemented in CAKE is motivated by the need to support research in automatic programing, rather than any specific set of research questions in knowledge representation and reasoning. Nevertheless, we believe CAKE epitomizes two central challenges in the current state of the art in knowledge representation and reasoning: How do we develop a principled approach to hybrid systems, and how do we learn to live with limited reasoning capabilities?
An integrated architecture for planning and learning
Authors: Charles E. Martin, R. James Firby
Venue: ACM SIGART Bulletin (1991)

We are developing an integrated system for planning and learning. The type of learning we are interested in is advice-taking, or learning by being told. Our model of planning is based on the Reactive Action Packages (RAPs) of Firby (1989). Our model of learning is based on the Direct Memory Access Parser (DMAP) of Martin (1990).
Rapid porting of the Parlance natural language interface
Authors: Madeleine Bates
Venue: Proceedings of the workshop on Speech and Natural Language (1989)

Developing knowledge bases for AI systems takes too long and costs too much. Even a "portable" system may be expensive to use because its installation takes a long time or requires the labor of scarce, highly-trained people. BBN has recently created a tool for acquisition which dramatically reduces the time and cost of installing a natural language system.During 1988, BBN used its Learner trade; tool to configure the Parlance trade; database interface to two different versions of a large Navy database. The configuration process was performed primarily with development versions of the Learner, which is a software tool for creating the knowledge bases, vocabulary, and mappings to the database that enable the Parlance interface to understand questions addressed to a particular database. The Learner reduced the time required to create Parlance configurations from months to weeks, and demonstrated that the Learner works effectively on databases with many hundreds of fields.
Techniques for unit-delay compiled simulation
Authors: Peter M. Maurer, Zhicheng Wang
Venue: Proceedings of the 27th ACM/IEEE Design Automation Conference (1991)

The PC-set method and the parallel technique are two methods for performing compiled unit-delay simulation. The PC-set method analyzes the network, determines the set of potential change times for each net, and generates gate simulations for each potential change. The parallel technique, which is based on the concept of parallel fault simulation, is faster and generates less code than the PC-method, but is less flexible. Benchmark comparisons with interpreted event-driven simulation show a factor of four improvement for the PC-set method and a factor of ten improvement for the parallel technique.
A fast planar partition algorithm, I
Authors: Ketan Mulmuley
Venue: Journal of Symbolic Computation (1990)

In this paper we give a fast randomized algorithm for finding a partition of the plane induced by a given set of line segments. The planar partition problem is interesting because it has important practical implications, especially in computer graphics, which indeed served as an inspiration for our investigation. Our algorithm is ideally suited for a practical use because: (i) it is extremely simple and robust, and (ii) despite this simplicity (or rather because of it) the algorithm is optimal; its expected running time is O(m+n log n), where n is the number of input segments and m is the number of points of intersection. The storage requirement is O(m + n). Though the algorithm itself is simple, the global evolution of the underlying partition is non-trivial, which makes the analysis of the algorithm theoretically interesting in its own right.
Computer graphics in Computing Curriculum 1991
Authors: Steve Cunningham
Venue: ACM SIGGRAPH Computer Graphics (1991)

Computer graphics has not been treated as an important subject in computer science curriculum recommendations throughout the history of the ACM curriculum recommendations. A new report from the current ACM/IEEE-CS Joint Curriculum Task Force, entitled "Computing Curricula 1991" [6], is intended to provide curriculum recommendations for baccalaureate programs in areas of computing encompassed by ACM and IEEE-CS, replacing such recommendations as Curriculum 78 [2] and the 1983 IEEE-CS model program [4]. How does computer graphics fare in this report, and what are the implications of the report for computer graphics developments in computing curricula?Overall, computer graphics comes out fairly well in these recommendations. The report specifically recommends both computer graphics and human-cemputer interaction topics in the core curriculum. This partially reflects the Ohlson recommendations from SIGGRAPH's Education Committee [5] and is vastly better than Curriculum 78, which ignored computer graphics almost entirely. However, as we shall see, the core content of computer graphics and human-computer interaction is quite weak, and the Task Force seems to have had some question about how they should be worked into core courses. Advanced courses in both computer graphics and human-computer interaction are also explicitly suggested in the report. A description of a very standard elective computer graphics course is included in the report. The report concludes with summaries of some sample curricula, and the elective computer graphics course is listed in most of them. However, none of these include the human-computer interaction elective.
An Optimal Algorithm for Detecting Weak Visibility of a Polygon
Authors: J.-R. Sack, S. Suri
Venue: IEEE Transactions on Computers (1990)

Notation and a theorem are presented which, using a result of B. Chazelle and L.J. Guibas (1985), enable the authors to design an O(n log n) algorithm for reporting all visibility edges of a given n-vertex polygon. Improving on this bound to O(n) is presently focused upon. This problem is solved for polygons with at least one given visibility edge. It is assumed that both endpoints of this edge are convex vertices. Subsequently, it is shown how to drop this restriction. The general case of detecting weak edge visibility of an arbitrary simple polygon is dealt with.
Address Tracing for Parallel Machines
Authors: Craig B. Stunkel, Bob Janssens, W. Kent Fuchs
Venue: Computer (1991)

Recently implemented parallel system address-tracing methods based on several metrics are surveyed. The issues specific to collection of traces for both shared and distributed memory parallel computers are highlighted. Five general categories of address-trace collection methods are examined: hardware-captured, interrupt-based, simulation-based, altered microcode-based, and instrumented program-based traces. The problems unique to shared memory and distributed memory multiprocessors are examined separately.
Heuristic Technique for Processor and Link Assignment in Multicomputers
Authors: S. Wayne Bollinger, Scott F. Midkiff
Venue: IEEE Transactions on Computers (1991)

A graph-based solution to the mapping problem using the simulated annealing optimization heuristic is developed. An automated two-phase mapping strategy is formulated: process annealing assigns parallel processes to processing nodes, and connection annealing schedules traffic connections on network data links so that interprocess communication conflicts are minimized. To evaluate the quality of generated mappings. cost functions suitable for simulated annealing that accurately quantify communications overhead are derived. Communication efficiency is formulated to measure the quality of assignments when the optimal mapping is unknown. The mapping scheme is implemented using the hypercube as a host architecture, and results for several image graphs are presented.
Direct Recovery of Three-Dimensional Scene Geometry From Binocular Stereo Disparity
Authors: Richard P. Wildes
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1991)

An analysis of disparity is presented. It makes explicit the geometric relations between a stereo disparity field and a differentially project scene. These results show how it is possible to recover three-dimensional surface geometry through first-order (i.e., distance and orientation of a surface relative to an observer) and binocular viewing parameters in a direct fashion from stereo disparity. As applications of the analysis, algorithms have been developed for recovering three-dimensional surface orientation and discontinuities from stereo disparity. The results of applying these algorithms to natural image binocular stereo disparity information are presented.
SQL/SE: a query language extension for databases supporting schema evolution
Authors: John F. Roddick
Venue: ACM SIGMOD Record (1992)

The incorporation of a knowledge of time within database systems allows for temporally related information to be modelled more naturally and consistently. Adding this support to the metadatabase further enhances its semantic capability and allows elaborate interrogation of data. This paper presents SQL/SE, an SQL extension capable of handling schema evolution in relational database systems.
Copying and Swapping: Influences on the Design of Reusable Software Components
Authors: Douglas E. Harms, Bruce W. Weide
Venue: IEEE Transactions on Software Engineering (1991)

The authors argue that a simple alternative to copying as a data movement primitive-swapping (exchanging) the values of two variables-has potentially significant advantages in the context of the design of generic reusable software components. Specifically, the authors claim that generic module designs based on a swapping style are superior to designs based on copying, both in terms of execution-time efficiency and with respect to the likelihood of correctness of client programs and module implementations. Furthermore, designs based on swapping are more reusable than traditional designs. Specific arguments and examples to support these positions are presented.
Load sharing in limited access distributed systems
Authors: Venkatesh Harinarayan, Leonard Kleinrock
Venue: ACM SIGMETRICS Performance Evaluation Review (1991)

In this paper we examine dynamic load sharing in limited access distributed systems. In this class of distributed systems all servers are not accessible to all sources, and there exist many different accessibility topologies. We focus our attention on the ring topology and provide an analytic model to derive the approximate mean waiting time (our metric of performance). We then consider other limited access topologies and find that rather different interconnection patterns give similar performance measurements. We conjecture that the number of servers accessible to a source is the parameter with the greatest performance impact, in a limited access topology with load sharing. We also introduce another variable called diversity that is indicative of the degree of load sharing and speculate that performance is reasonably insensitive to diversity so long as it is non-zero. Using these conjectures we show how a reasonable estimate of the mean waiting time can be analytically derived in many limited access topologies.
Finding a line transversal of axial objects in three dimensions
Authors: Nina Amenta
Venue: Proceedings of the third annual ACM-SIAM symposium on Discrete algorithms (1992)

An axial object in E3 is a box or rectangle, all of whose edges are parallel to the coordinate axes. A line transveral of a set of axial objects is a line that intersects every object. We present an algorithm which finds a line transversal, if one exists, in expected linear time. In the process, we generalize a randomized linear programming algorithm, and prove that the set of line transversals of axial objects has a constant number of connected components.
Optimal Distance Networks of Low Degree for Parallel Computers
Authors: Ramón Beivide, Enrique Herrada, José L. Balcázar, Agustin Arruabarrena
Venue: IEEE Transactions on Computers (1991)

The authors introduce and study a family of interconnection schemes, the Midimew networks, based on circulant graphs of degree 4. A family of such circulants is determined and shown to be optimal with respect to two distance parameters simultaneously, namely maximum distance and average distance, among all circulants of degree 4.. These graphs are regular, point-symmetric, and maximally connected, and one such optimal graph exists for any given number of nodes. The proposed interconnection schemes consist of mesh-connected networks with wrap-around links, and are isomorphic to the optimal distance circulants previously considered. Ways to construct one such network for any number of nodes are shown, their good properties to build interconnection schemes for multicomputers are examined, and some interesting particular cases are discussed. The problem of routing is also addressed, and a basic algorithm is provided which is adequate for implementing the routing policy required to convey messages, traversing shortest paths between nodes.
Lisp view: using Common Lisp and CLOS to hide a C toolkit
Authors: Hans Muller
Venue: ACM SIGPLAN Lisp Pointers (1990)

This paper is a review of the Lisp View project. The paper focuses on our experiences in two areas: interfacing Common Lisp with a large complicated C library, and using the Common Lisp Object System[2] (CLOS) to implement the Lisp View application programmer's interface (API). We've also included a short survey of similar Common Lisp packages.
The use of scenarios in design
Authors: Bonnie A. Nardi
Venue: ACM SIGCHI Bulletin (1992)

A scenario is a description of a set of users, a work context, and a set of tasks that users perform or want to perform. A scenario sketches future technologies that will help users do the things they want to do. A scenario blends a carefully researched description of some set of real ongoing activities with an imaginative futuristic look at how technology could support those activities better.