ppxscal/embedding_network huggingface dataset:
The CAD-system REGENT
Authors: G. Enderle, E. G. Schlechtendahl
Venue: Proceedings of the 12th Design Automation Conference (1975)

The REGENT-system for the support of computer aided design is being developed at the Institut f&uuml;r Reaktorentwicklung of the Kernforschungszentrum (Nuclear Research Center) Karlsruhe, Germany, from 1973 through 1975. The development aims primarily at providing a socalled &ldquo;system nucleus&rdquo; in the sense of ICES[1,2]. The design concept, though being based upon ICES, shows major improvements in particular in the following respects: -a more powerful base language was chosen (PL/1 instead of FORTRAN) -interactive use has been considered right from the beginning -the base language PL/1 is part of all problem oriented languages within the REGENT system. Since summer 1974 the development of the REGENT nucleus and of one of its first subsystems(GIPSY) for processing graphical information is integrated in the &ldquo;CAD-project&rdquo;, which coordinates all government supported CAD-activities in Germany.
A retargetable compiler for a high-level microprogramming language
Authors: Peter Marwedel
Venue: ACM SIGMICRO Newsletter (1984)

A compiler for the generation of microcode for a high-level microprogramming language is presented. The compiler is target machine independent. The input to the compiler consists of a hardware description, a high-level microprogram and a set of program transformation rules. The compiler is able to take advantage of optimization techniques which are used by microprogrammers because many of these can be represented by program transformation rules.
A mental health project programmed and designed with the aid of interactive computer graphics
Authors: Kaiman Lee, Robert Correira, Owen F. Hackett,  Jr.
Venue: Proceedings of the 9th Design Automation Workshop (1972)

The society has long regarded the architects as creators of ornate, artistic buildings and nothing more. However, many architects were, and still are the history's greatest artists. Nevertheless, many architects nowadays are still using nineteenth century methods to solve twentieth century problems. If they are to overcome this stigma and take the right place as a major influence in the shaping of man's destiny, architects must become divorced from the traditional, intuitive approaches to problem solving, and learn to utilize all the design tools at their disposal. The specific goal of this project is the computer aided programming and design of a Residential Living Unit and Diagnostic and Treatment Center to serve mentally retarded persons in the New Bedford, Massachusetts area.
Silicon compilation-a hierarchical use of PLAs
Authors: Ron Ayres
Venue: Proceedings of the 16th Design Automation Conference (1979)

This paper proposes a way to compile a silicon layout directly from synchronous logic specification. The motivation for introducing compilation into the silicon world comes from its extreme success in the software world. As we see silicon area increasing and circuit complexity increasing, we might feel much in common with the early day programmers who faced increasing memory availability along with increasing program complexity. Software and hardware revolve around the same basic concern: The software designer lays out a one dimensional array of memory whereas the integrated circuit designer lays out a two dimensional area of silicon. In each case, various constraints must be satisfied in order to obtain a working product. In addition, both efforts involve lots of modification.
PACE - a microprogram evaluation system
Authors: Robert E. Skibbe
Venue: ACM SIGMICRO Newsletter (1982)

This paper describes PACE (Product Assurance Code Evaluation) System, a tool for evaluating microprograms. PACE incorporates both static analysis and dynamic analysis capabilities and it provides features that enable systematic and comprehensive evaluations of large-scale microcoded systems. The PACE static analysis capability performs a control flow analysis of the code being evaluated, reports various anomalous program constructs, and generates a program flow graph that is subsequently employed by PACE's dynamic analysis procedures. The PACE dynamic analysis capability uses encoded execution trace data to produce microcode test-coverage reports and formatted code-execution traces. The dynamic analysis capability provides quantitative code execution coverage data that enables an assessment of testing thoroughness and is useful in the identification of effective regression test cases.
Separating tape bounded auxiliary pushdown automata classes
Authors: I. H. Sudborough
Venue: Proceedings of the ninth annual ACM symposium on Theory of computing (1977)

Previous results in the literature which describe separation theorems for time bounded complexity classes serve also to separate classes defined by tape bounded auxiliary pushdown automata. Results described here refine these basic relationships between classes defined by tape bounded AuxPDA. It is shown that, for auxiliary PDA fully constructable functions S0 and S1 satisfying S1 (n+1) &egr; o,(S0 (n)), S0 tape bounded AuxPDA are more powerful than S1 tape bounded AuxPDA. Further results refine the resulting separation by the number of worktape symbols and the number of worktape heads. Results are also described for separating classes defined by tape bounded AuxPDA with one pushdown store symbol, i.e. auxiliary counter automata (AuxCA). Refinements of the known equivalence of nondeterministic L(n)-tape bounded AuxPDA and deterministic L(n)-tape bounded AuxPDA are also described. One corollary is that every two-way nondeterministic PDA can be simulated by a two-way deterministic PDA with four input tape heads and that every context-free language can be recognized by a deterministic two-way PDA with three heads. Another corollary of these results shows that there are languages over a single letter alphabet which are recognized by (k+1)-head two-way PDA but cannot be recognized by any k-head two-way PDA. It is shown also that AuxPDA and AuxCA can fully construct very slow growing functions so that even small amounts of worktape space (e.g. that bounded by log*n) increase their computational power.
The UNIX time-sharing system
Authors: Dennis M. Ritchie, Ken Thompson
Venue: ACM SIGOPS Operating Systems Review (1973)

UNIX is a general-purpose, multi-user, interactive operating system for the Digital Equipment Corporation PDP-1 1/40 and 11/45 computers. It offers a number of features seldom found even in larger operating systems, including 1. A hierarchical file system incorporating demountable volumes, 2. Compatible file, device, and inter-process I/O, 3. The ability to initiate asynchronous processes, 4. System command language selectable on a per-user basis, 5. Over 100 subsystems including a dozen languages. This paper discusses the usage and implementation of the file system and of the user command interface.
Architecture of SOAR: Smalltalk on a RISC
Authors: David Ungar, Ricki Blau, Peter Foley, Dain Samples, David Patterson
Venue: ACM SIGARCH Computer Architecture News (1984)

Smalltalk on a RISC (SOAR) is a simple, Von Neumann computer that is designed to execute the Smalltalk-80 system much faster than existing VLSI microcomputers. The Smalltalk-80 system is a highly productive programming environment but poses tough challenges for implementors: dynamic data typing, a high level instruction set, frequent and expensive procedure calls, and object-oriented storage management. SOAR compiles programs to a low level, efficient instruction set. Parallel tag checks permit high performance for the simple common cases and cause traps to software routines for the complex cases. Parallel register initialization and multiple on-chip register windows speed procedure calls. Sophisticated software techniques relieve the hardware of the burden of managing objects. We have initial evaluations of the effectiveness of the SOAR architecture by compiling and simulating benchmarks, and will prove SOAR's feasibility by fabricating a 35,000-transistor SOAR chip. These early results suggest that a Reduced Instruction Set Computer can provide high performance in an exploratory programming environment.
Network computing for computer science departments
Authors: Norman R. Nielsen
Venue: Proceedings of the first SIGCSE technical symposium on Education in computer science (1970)

Computer science departments require a richness of computer support that is virtually unique among other academic disciplines. Not only is good computer service a necessity, but a variety of languages and modes of operation on a modern system are also required. In many cases these computing needs can be met through the use of a large computer system located on the campus. However, oftentimes neither a new (or a small) department nor its host institution can afford to support such a large scale system. Thus, a choice arises between the use of a limited local capacity and a richer but remote capacity. As the computing hub of the Regional Computing Network for schools in the San Francisco Bay Area for the past two years, Stanford has had an opportunity to observe and evaluate the impact of network computing in this regard. It is the purpose of this paper to report upon some of these observations for the benefit of those who may become involved with a network decision, either as a supplier or as a user of network service.
Real time information processing I: Direct Data Supervisor
Authors: F. R. Palm
Venue: Proceedings of the 1962 ACM national conference on Digest of technical papers (1962)

AT THE IBM SPACE GUIDANCE CENTER, a Simulation Laboratory is connected to an IBM 7090 DPS via a direct data connection. In addition to its Simulation Laboratory functions, the 7090 is used by the Analysis and Computation Center to solve engineering problems, to compile and checkout system computer programs, and to process other various types of programs. The Simulation Laboratory contains an analog computer, a Digital Differential Analyzer (DDA), a Real-Time Control Unit (RTCU), a Data Controller (DACON), and several other special pieces of equipment. In general, the programs which utilize both the Simulation Laboratory and the 7090 DPS operate in real-time. These programs, in general, make one pass each time a signal (Direct Data interrupt) is received, and many of these real-time problems do not need all the available 7090 computing time during a run.
Effects of buffered memory requests in multiprocessor systems
Authors: Fayé A. Briggs
Venue: ACM SIGSIM Simulation Digest (1979)

A simulation model is developed and used to study the effect of buffering of memory requests on the performance of multiprocessor systems. A multiprocessor system is generalized as a parallel-pipelined processor of order (s,p), which consists of p parallel processors each of which is a pipelined processor with s degrees of multiprogramming, there can be up to s*p memory requests in each instruction cycle. The memory, which consists of N(&equil;2n) identical memory modules, is organized such that there are l(&equil;2i) lines and m(&equil;2n&minus;i) identical memory modules, where each module is characterized by the address cycle (address hold time) and memory cycle of a and c time units respectively. Too large an l is undesirable in a multiprocessor system because of the cost of the processor-memory interconnection network. Hence, we will show how effective buffering can be used to reduce the system cost while effectively maintaining a high level of performance.
Simulation of Garland, Texas, vehicular traffic using current and computed optimal traffic settings
Authors: Frank P. Testa, Mark Handelman
Venue: Proceedings of the 6th conference on Winter simulation (1973)

This paper presents results of a study utilizing computer simulation of vehicular traffic in the downtown area of Garland, Texas. A general discrete digital simulation model, the Vehicle Traffic Simulator (VETRAS), developed by IBM Corporation, was used for the simulation. Using data supplied by the City of Garland, traffic patterns for three peak periods of daily operation&mdash;A.M., Noon, P.M.&mdash;were simulated. Two simulations were run for each period. In the first, intersections were controlled with signal settings currently in use in Garland. In the second, intersections were controlled by signal settings derived via a pattern optimization algorithm. A minimum interference technique was used to compute coordinated signal settings and offsets to maximize arterial and network performance. The results show that arterial and network performance improves in each of the peak periods using the computed signal settings. Further, there is a direct relationship between volume and relative improvement. Estimated cost benefits for these improvements are also presented.
A patent problem for abstract programming languages; machine-independent computations
Authors: R. G. Hamlet
Venue: Proceedings of the fourth annual ACM symposium on Theory of computing (1972)

A programming language may be viewed as an acceptable numbering of the partial recursive functions, with &ldquo;semantics&rdquo; the mapping from programs onto the functions computed [1]. (In this view, syntax receives little attention, although it is best to consider it as a characteristic function of a recursive set of indices instead of allowing all natural numbers. Such a view is natural for the usual arithmetizations, and eliminates some possible confusions, for example in interpreting the recursion theorem for pairs of numberings.) The virtue of functional semantics is that the semantic range is a machine-independent class. The abstract view in which details of the semantic mapping are ignored, in which the function assigned to a program is &ldquo;the one it computes,&rdquo; with the enumeration and s-m-n theorems assumed to compensate for the lost detail, has found only a restricted application to programning-language problems. Computational complexity, in the successful abstraction by Blum [2], is an attempt to provide more semantic structure without introducing a tenacious machine-dependence. The Blum measures are not themselves suitable as a semantic range. Two programs may have the same measure function, yet compute wildly different functions in widly different ways; other programs, intuitively very similar, may have wildly different measure functions [3]. A composite semantics of a function computed and a measure function is much like the approach suggested here: using formal computation functions as the semantic range.
Theoretical performance analysis of sliding window link level flow control for a local area network
Authors: E. Arthurs, G. L. Chesson, B. W. Stuck
Venue: Proceedings of the eighth symposium on Data communications (1983)

A transmitter sends packets over a local area network to a receiver. The receiver has a finite amount of storage capacity for buffering messages. A sliding window protocol is employed to insure all packets are delivered without error in order of arrival. Mean throughput rate and packet delay statistics are studied as a function of model parameters. Simulation data are presented.
Simulation of an aircraft container system
Authors: David M. Grant
Venue: Proceedings of the third conference on Applications of simulation (1969)

This paper describes a simulation, written in GPSS/360 which models a system of container deployment for Boeing 747 aircraft. The simulation uses as input a flight schedule together with deadload demand distributions between city-pairs in the system and models the operating system of both aircraft and containers in some detail. The output from the program is the number of containers required at a station to satisfy a specified standard of service. The immediate purpose of the model is to help in minimising the stockholding of containers at individual stations and to suggest possible improvements in the system itself.
The conticomputer system a commodities database
Authors: Daniel Martin
Venue: Proceedings of the first SIGMINI symposium on Small systems (1978)

A computer system used to support the technical research department of Conti Commodity is described. The system is installed on a Data General Eclipse S/200 computer and has been in operation since June, 1976. It is centered around a 12MB database of commodity prices and includes plotter and communication software.
A logic interpreter to handle time and negation in logic data bases
Authors: José Carlos Ferreira Maia Neves
Venue: Proceedings of the 1984 annual conference of the ACM on The fifth generation challenge (1984)

There is as yet no general agreement as to the best solution to the operation of time and negation in data bases. This paper presents an approach to handle these problems in a logic data base system. A simple logic interpreter is introduced that allows for effective reasoning based on the manipulation of a sequence of snapshots. These ideas have been realized in an extension to the query language Query-By-Example, which has been implemented in the logic programming language Prolog.
Accurate and Explicit Differentiation of Wireless and Congestion Losses
Authors: Vijay Arya, Thierry Turletti
Venue: Proceedings of the 23rd International Conference on Distributed Computing Systems (2003)

In recent years mobile computing has experienced an explosive growth, mainly due to the integration of wireless networks with the wired Internet. To deploy bandwidth-greedy multimedia applications on such heterogeneous environments, efficient congestion control algorithms are required. When congestion control protocols such as TFRC are used to transmit multimedia flows, they need to differentiate between congestion losses and wireless losses to behave correctly and efficiently. Currently proposed end-to-end loss differentiation mechanisms can not reliably predict the differences between congestion and wireless losses. In this paper, we explore explicit loss differentiation. We have designed a simple window framework to explicitly and accurately differentiate these losses. By deploying agents at the boundaries of wireless links, we show that we can efficiently implement our window-based scheme with low overhead. We also point out current limitations of our scheme.
B-spline surfaces for ship hull design
Authors: David F. Rogers, Steven G. Satterfield
Venue: ACM SIGGRAPH Computer Graphics (1980)

The use of true sculptured surface descriptions for design applications has been proposed by numerous authors. The actual implementation and use of interactive sculptured surface description techniques for design and production has been limited. The use of such techniques for ship hull design has been even more limited. The present paper describes a preliminary implementation of such a system for the design of ship hulls and for the production of towing tank models using numerical control techniques. The present implementation is based on a Cartesian product B-spline surface description. Implementation is on an Evans and Sutherland Picture System supported by a PDP-11/45 minicomputer. The B-spline surface is manipulated by its associated polygonal net. Both surface and net are three-dimensional. Techniques both good and bad for 3-D picking of a polygon point when the net, its associated surface, and the 3-D picking cue independently exist and can be independently manipulated in three space are presented and discussed. The shape of a B-spline surface of fixed order is controlled by the location of the polygon net points, the number of multiple points at a particular net point, and the knot vector. Frequently multiple points imply multiple knot vectors. Practical techniques for controlling and shaping the surface with and without this assumption are discussed and the results illustrated. Experience attained by interactively fitting a single fourth order B-spline surface patch to the forebody half of an actual ship hull described by three dimensional digitized points is discussed and the results illustrated.
Connection principles for multipath, packet switching networks
Authors: Chi-Yuan Chin, Kai Hwang
Venue: Proceedings of the 11th annual international symposium on Computer architecture (1984)

Packet switched Multistage Interconnection Networks (MINs) have been mostly proposed to use unique connection path between any source and destination. We propose to add a few extra stages in an MIN to create multiple paths between any source and destination. Connection principles of Multipath MINs (MMINs) for packet switching are presented in this paper. Performance of such network is analyzed for possible use in multiprocessor systems and dataflow computers. For an MMIN with n nodes, the number of required stages is confined in the range [log2n+1, 2log2n-1]. Each stage consists of n/2 buffered 2-by-2 switching cells. In practice, one or two extra stages is sufficient beyond log2n stages required in a unique-path MIN. The delays of MMINs are shown much shorter than that of using unique-path MINs for packet switching. The improvement lies in significantly reduced packet wait delays in buffers, especially under heavy traffic conditions. The tradeoffs between reduced network delays and increased hardware cost are studied. Optimal design criteria and procedures are provided for developing MMINs with a fixed network size and stages.
An efficient channel router
Authors: Takeshi Yoshimura
Venue: Proceedings of the 21st Design Automation Conference (1984)

In the LSI chip layout design, channel routing is one of the key problems. The problem is to route a specified net list between two rows of terminals across a two layer channel. This paper presents a new routing algorithm, which is an improved version of the classical &ldquo;left edge algorithm&rdquo;. The new algorithm uses a row by row approach, calculating an optimum net assignment to each row. The algorithm was implemented for examples in previously published papers. Experimental results show that the new algorithm produces optimum solutions in most cases.
APL Econometric Planning Language (EPLAN)
Authors: F. Schober, K. Spielberg
Venue: Proceedings of the eighth international conference on APL (1976)

The APL Econometric Planning Language (EPLAN) is an IBM Installed User Program providing features to assist the construction and application of econometric models in an interactive environment. Its design takes into account the nature of the econometric modeling process, which ideally requires a man-machine dialogue. Main objectives have been: User-oriented terminology (model language), functional capabilities, generality and fast response. The elements of the model language observe a hierarchical structure. The atomic items are the economic variables, i.e. time series or cross-sectional data, and constants. Subsequent stages comprise operations on economic variables, equations and models. This logical structure is maintained by the use of suited APL data structures. The functional capabilities include several techniques of single equation parameter estimation, the solution of non-linear models and routines for data transformation, documentation and file handling. Generality is ensured by defining EPLAN open and transparent. The various programs are considered building-stones for the user's specific application. He can optionally mix EPLAN programs with programs of his own or from the APL Public Library. Fast response is automatically given by the excellent time-sharing characteristics of the APL host system. The paper describes the design of EPLAN, with emphasis also on its relation to APL, and applications in the fields of economics and business planning.
De Morgan Algebras - completeness and recursion
Authors: Louis H. Kauffman
Venue: Proceedings of the eighth international symposium on Multiple-valued logic (1978)

An elementary proof is given of a completeness theorem for De Morgan Algebras. The proof involves a construction that associates to a De Morgan algebra B, a new De Morgan algebra &Bcirc;. The construction of &Bcirc; bears a close analogy to the construction of the complex numbers from the real numbers. Similarly, De Morgan algebras may be constructed from Boolean algebras. Relationships with recursion and periodic sequences are discussed.