ppxscal/embedding_network huggingface dataset:
Synchronizing Large VLSI Processor Arrays
Authors: Allan L. Fisher, H. T. Kung
Venue: IEEE Transactions on Computers (1985)

Highly parallel VLSI computing structures consist of many processing elements operating simultaneously. In order for such processing elements to communicate among themselves, some provision must be made for synchronization of data transfer. The simplest means of synchronization is the use of a global clock. Unfortunately, large clocked systems can be difficult to implement because of the inevitable problem of clock skews and delays, which can be especially acute in VLSI systems as feature sizes shrink. For the near term, good engineering and technology improvements can be expected to maintain the feasibility of clocking in such systems; however, clock distribution problems crop up in any technology as systems grow. An alternative means of enforcing necessary synchronization is the use of self-timed asynchronous schemes, at the cost of increased design complexity and hardware cost. Realizing that different circumstances call for different synchronization methods, this paper provides a spectrum of synchronization models; based on the assumptions made for each model, theoretical lower bounds on clock skew are derived, and appropriate or best possible synchronization schemes for large processor arrays are proposed.
Burst Unidirectional Error-Detecting Codes
Authors: B. Bose
Venue: IEEE Transactions on Computers (1986)

Systematic codes capable of detecting burst unidrectional errors of length up to 2r-1using r check bits where r = 3 are presented. Moreover, b-adjacent unidirectional error-detecting codes using [log2(b + 1)] check bits are also described. These codes are shown to be optimal or near optimal. The encoding/decoding and the totally self- checking checker design methods for these
Software development of real-time systems
Authors: Hassan Gomaa
Venue: Communications of the ACM (1986)

Concentrating on those aspects of software development peculiar to real-time systems, this collection of development methods and tools emphasizes incremental development; the testing of tusk interfaces during integration testing, as well as unit and partial integration testing on the development system; and the development of automated tools to assist in the testing process.
Optimal design and use of retry in fault-tolerant computer systems
Authors: Yann-Heng Lee, Kang G. Shin
Venue: Journal of the ACM (JACM) (1988)

In this paper, a new method is presented for (i) determining an optimal retry policy and (ii) using retry for fault characterization, which is defined as classification of the fault type and determination of fault durations. First, an optimal retry policy is derived for a given fault characteristic, which determines the maximum allowable retry durations so as to minimize the total task completion time. Then, the combined fault characterization and retry decision, in which the characteristic of a fault is estimated simultaneously with the determination of the optimal retry policy, are carried out. Two solution approaches are developed: one is based on point estimation and the other on Bayes sequential decision analysis. Numerical examples are presented in which all the durations associated with faults (i.e., active, benign, and interfailure durations) have monotone hazard rate functions (e.g., exponential Weibull and gamma distributions). These are standard distributions commonly used for modeling and analyses of faults.
Simple, efficient, asynchronous parallel algorithms for maximization
Authors: Albert G. Greenberg, Boris D. Lubachevsky, Andrew M. Odlyzko
Venue: ACM Transactions on Programming Languages and Systems (TOPLAS) (1988)

The problem of computing the maximum of n inputs on an asynchronous parallel computer is considered. In general, the inputs may arrive staggered in time, the number of processors available to the maximization algorithm may vary during its execution, and the number of inputs, n, may be initially unknown. Two simple, efficient algorithms to compute the maximum are presented. Each algorithm may be invoked asynchronously, as new inputs and processors arrive. Performance measures that account for the response times of the invocations are introduced, and the algorithms are analyzed under these measures.
Towards a theory of software protection and simulation by oblivious RAMs
Authors: O. Goldreich
Venue: Proceedings of the nineteenth annual ACM symposium on Theory of computing (1987)

Software protection is one of the most important issues concerning computer practice. There exist many heuristics and ad-hoc methods for protection, but the problem as a whole has not received the theoretical treatment it deserves. In this paper, we make the first steps towards a theoretic treatment of software protection: First, we distill and formulate the key problem of learning about a program from its execution. Second, assuming the existence of one-way permutations, we present an efficient way of executing programs such that it is infeasible to learn anything about the program by monitoring its executions. How can one efficiently execute programs without allowing an adversary, monitoring the execution, to learn anything about the program? Traditional cryptographic techniques can be applied to keep the contents of the memory unknown throughout the execution, but are not applicable to the problem of hiding the access pattern. The problem of hiding the access pattern efficiently corresponds to efficient simulation of Random Access Machines (RAM) on an oblivious RAM. We define an oblivious RAM to be a (probabilistic) RAM for which (the distribution of) the memory access pattern is independent of the input. We present an (on-line) simulation of t steps of an arbitrary RAM with m memory cells, by less than t&middot;m&egr; steps of an oblivious RAM with 2m memory cells, where &egr;>0 is an arbitrary constant.
Managing geometric complexity with enhanced procedural models
Authors: Phil Amburn, Eric Grant, Turner Whitted
Venue: ACM SIGGRAPH Computer Graphics (1986)

We illustrate two enhancements to procedural geometric models which allow autonomous procedures to jointly satisfy mutual constraints. One of the techniques adds communications paths between procedures which may affect one another. Conflicts are resolved by modifying communicating procedures as they execute.The second technique is a generalization of widely used subdivision procedures. The termination test of typical subdivision methods is replaced with a "transition" test. The subdivision procedure is augmented with a "script" in the form of a state transition table which controls the procedures' response to external events as well as to the normal termination conditions.In the examples we show how effective these techniques are building complex geometric models with very sparse input.
Formalisms
Authors: J. C. P. Woodcock
Venue: ACM SIGSOFT Software Engineering Notes (1988)

At a previous workshop in this series at Orlando, there was a session on Theory; at this workshop there was a session on Formalisms. The difference is not just one of terminology: in the intervening three years many things have changed. Perhaps the key difference is that we now have much more experience in applying the results of the theoretical research in this area. We are now seeing formalisms being used on large projects, not just as part of a research activity, but also as part of the production of real products such as a silicon implementation of the IEEE floating point number system (INMOS), or the development of a large transaction processing system (IBM). Various formalisms---such as VDM, Z, CSP, Larch, and LOTOS---are reaching maturity and are emerging as today's standard tools for specification and design. These notations are formal in the sense that they are firmly based on logic and mathematics.
Integrated processing produces robust understanding
Authors: Mallory Selfridge
Venue: Computational Linguistics (1986)

Natural language interfaces to computers must deal with wide variation in real-world input. This paper proposes that, in order to handle real-world input robustly, a natural language interface should be constructed in accord with principles of integrated processing: processing syntax and semantics at the same time, processing syntax and semantics using the same mechanisms, and processing language and memory using the same mechanisms. This paper describes an experimental natural language interface constructed according to these principles which displays the desired robustness. The success of this interface suggests that future real-world interfaces could achieve robustness by performing integrated processing.
Improved techniques for processing queries in full-text systems
Authors: Y. Choueka, A. Fraenkel, S. Klein, E. Segal
Venue: Proceedings of the 10th annual international ACM SIGIR conference on Research and development in information retrieval (1987)

In static full-text retrieval systems, which accommodate metrical as well as Boolean operators, the traditional approach to query processing uses a &ldquo;concordance&rdquo;, from which large sets of coordinates are retrieved and then merged and/or collated. Alternatively, in a system with l documents, the concordance can be replaced by a set of bit-maps of fixed length l, which are constructed for every different word of the database and serve as occurrence maps. We propose to combine the concordance and bit-map approaches, and show how this can speed up the processing of queries: fast ANDing and ORing of the maps in a preprocessing stage, lead to large I/O savings in collating coordinates of keywords needed to satisfy the metrical and Boolean constraints. Moreover, the bit-maps give partial information on the distribution of the coordinates of the keywords, which can be used when queries must be processed by stages, due to their complexity and the sizes of the involved sets of coordinates. The new techniques are partially implemented at the Responsa Retrieval Project.
Maintaining Configurations of Evolving Software Systems
Authors: K. Narayanaswamy, W. Scacchi
Venue: IEEE Transactions on Software Engineering (1987)

Software configuration management ( SCM) is an emerging discipline. An important aspect of realizing SCM is the task of maintaining the configurations of evolving software systems. In this paper, we provide an approach to resolving some of the conceptual and technical problems in maintaining configurations of evolving software systems. The approach provides a formal basis for existing notions of system architecture. The formal properties of this view of configurations provide the underpinnings for a rigorous notion of system integrity, and mechanisms to control the evolution of configurations. This approach is embodied in a language, NuMIL, to describe software system configurations, and a prototype environment to maintain software system configurations. We believe that the approach and the prototype environment offer a firm base to maintain software system configurations and, therefore, to implement SCM.
Character generation under grid constraints
Authors: Roger D. Hersch
Venue: Proceedings of the 14th annual conference on Computer graphics and interactive techniques (1987)

An original and fast filling algorithm based on vertical scan line sweep and contour tracking of a presorted shape description allows filling of character shapes with real subpixel resolution. Identical parts of a character lying at a different phase in respect to the grid will have a dissimilar discrete look. Grid constraints are applied in order to force given parts of a character (stems, serifs) to attain identical phasing. So that several contraints may be applied, degrees of freedom are provided in the form of stretchable null-segments inserted at particular locations in the character outline description. Grid constraints are also applied to avoid discrete arcs with an isolated pixel or a long horizontal or vertical run. The type of constraints applied to parts of a character consists only of horizontal or vertical subpixel translations. The resulting character description therefore remains nearly identical to the original description. The processing time used to apply grid constraints is negligible, compared with the time needed for character scan-conversion and filling. Hence, this method is very well adapted for direct character generation on non-impact printers. It is also suitable for character rasterization in typographic computer-aided design systems.
Survival: a tale of a senior project
Authors: Elaine Anderson
Venue: ACM SIGCSE Bulletin (1987)

In 1984 the Computer Information Systems Department at Humboldt State University implemented a B.S. degree program in Computer Information Systems. Prior to that year the program had been offered under the auspices of a Business Administration degree as a concentration. In the evolvement of the program since 1984. The faculty of the department determined that a senior project course would form an appropriate capstone course for all CIS majors. The course and its incorporation into the degree program will occur in 1987/88. It so happened that Bailes and Sayers' paper [1] and the opportunity to apply their guidance occurred at the beginning of the spring semester. The story of our experiment with the course using a variation of the "contract" suggested by Bailes and Sayer, as written by the three students involved, follows.One semester, three graduating seniors found themselves with class schedule conflicts that prevented their taking a particular required course. When it became obvious that they could not schedule the conflicting class, the chair of their department assigned to them a senior project. The guidelines for the project were adapted from ones outlined in the SIGCSE Bulletin Vol. 18 No. 4, December 1986. The students could do whatever they wanted for a project so lon g as the department chair approved, and they fulfilled the objectives. Here is what these graduating seniors did.
Using other languages to supplement APL
Authors: Donald W. Soule
Venue: Proceedings of the international conference on APL: APL in transition (1987)

This paper documents the struggles and successes of one of the development efforts of our company over the past 4 years -- supplementing APL application development with integrated C and Assembly modules on the PC. It deals with an area we have used multiple languages in -- integrating an Assembly and C screen handler into our APL application development.
STEM: an IC design environment based on the Smalltalk model-view-controller construct
Authors: E. F. Girczyc, T. Ly
Venue: Proceedings of the 24th ACM/IEEE Design Automation Conference (1987)

STEM (SmallTalk Environment of Module design) is an IC design environment written in Smalltalk aimed at integrating design automation tools with manual design. STEM is based on the Smalltalk model-view-controller concept. Each cell in the database is represented by a single Smalltalk class. This serves as the &ldquo;model&rdquo; and encapsulates all (permanent) information about the cell. Different design representations of the single model are achieved by calculating views which are strictly temporary. All views of an object are linked to the model. This allows views to be updated whenever a change in the model's state is detected, and prevents permanent aliases of data. Design changes are entered using a Smalltalk controller attached to the model.
Constructive real interpretation of numerical programs
Authors: H. J. Boehm
Venue: Papers of the Symposium on Interpreters and interpretive techniques (1987)

We explore the feasibility of providing exact real arithmetic for use in conventional numerical programs. We have built a prototype interpreter which replaces floating point operations with operations on constructive real numbers in the execution of conventional Fortran programs. Such a facility makes it unnecessary to concern oneself with issues of numerical stability in the solution of small problems. It also provides a useful tool for the development of larger numerical programs.We discuss the computability and algorithmic issues involved in the design of the interpreter, as well as some preliminary experiences and performance measurements.
Functional verification of MOS circuits
Authors: D. Weise
Venue: Proceedings of the 24th ACM/IEEE Design Automation Conference (1987)

This report describes the ideas behind Silica Pithecus, a program which verifies synchronous digital MOS VLSI circuits. Silica Pithecus accepts the schematic of an MOS VLSI circuit, declarations of the logical relationships between the inputs signals (e.g., which inputs are mutually exclusive), and a specification of the intended digital behavior of the circuit. If the circuit fails to meet its specification Silica Pithecus returns to the designer the precise reason it fails to do so. Unlike previous verification systems, Silica Pithecus employs a realistic electrical model. It also automatically generates the constraints on the inputs of a circuit which ensure the circuit will exhibit its intended digital behavior. These constraints are necessary for hierarchical verification. Silica Pithecus operates hierarchically, interactively, and incrementally.
Constrained expressions: toward broad applicability of analysis methods for distributed software systems
Authors: Laura K. Dillon, George S. Avrunin, Jack C. Wileden
Venue: ACM Transactions on Programming Languages and Systems (TOPLAS) (1988)

It is extremely difficult to characterize the possible behaviors of a distributed software system through informal reasoning. Developers of distributed systems require tools that support formal reasoning about properties of the behaviors of their systems. These tools should be applicable to designs and other preimplementation descriptions of a system, as well as to completed programs. Furthermore, they should not limit a developer's choice of development languages. In this paper we present a basis for broadly applicable analysis methods for distributed software systems. The constrained expression formalism can be used with a wide variety of distributed system development notations to give a uniform closed-form representation of a system's behavior. A collection of formal analysis techniques can then be applied with this representation to establish properties of the system. Examples of these formal analysis techniques appear elsewhere. Here we illustrate the broad applicability of the constrained expression formalism by showing how constrained expression representations are obtained from descriptions of systems in three different notations: SDYMOL, CSP, and Petri nets. Features of these three notations span most of the significant alternatives for describing distributed software systems. Our examples thus offer persuasive evidence for the broad applicability of the constrained expression approach.
A calculus for assignments in higher-order languages
Authors: Mattias Felleisen, D. P. Friedman
Venue: Proceedings of the 14th ACM SIGACT-SIGPLAN symposium on Principles of programming languages (1987)

Imperative assignments are abstractions of recurring programming patterns in purely functional programming languages. When added to higher-order functional languages, they provide a higher-level of modularity and security but invalidate the simple substitution semantics. We show that, given an operational interpretation of a denotational semantics for such a language, it is possible to design a two-level extension of the &lgr;u-calculus. This calculus provides a location-free rewriting semantics of the language and offers new possibilities for reasoning with assignments. The upper level of the calculus factors out all the steps in a reduction sequence which must be in a linear order; the lower level allows a partial ordering of reduction steps.
Abstract data types with shared operations
Authors: Kasper Osterbye
Venue: ACM SIGPLAN Notices (1988)

It is argued that the concept of abstract datatypes can be extended in a way that allows for operations to be shared between two (or more datatypes), and that this will often give a better and more natural way of structuring programs. Shared operations can access the representation of more than one abstract datatype.
Frequency-time controlled (FTC) networks for high speed communication
Authors: I Chlamtac, A Ganz
Venue: ACM SIGCOMM Computer Communication Review (1986)

The development of &ldquo;very high speed&rdquo; networks is being motivated by emerging applications and is therefore attracting increasing attention. As demonstrated in the past, in conventional high speed systems the high ratio between the end-to-end propagation delay and the message transmission time severely restricts the system performance. Thus the increase in channel bandwidth may be accompanied by only a marginal increase in actual system capacity. In this paper we propose a network architecture which eliminates this problem by introducing a combined Frequency - Time Division based control of the high speed channel. We consider the implementation characteristics of the resulting multichannel system and show that the design of protocols in these systems is subject to unique channel control penalties. Specifically, we show that in addition to the relatively high cost of channel sensing, the allocation of channel on a demand assignment basis is hindered in the multichannel configuration by the time penalty involved in locating an idle channel and by practical limitations of multichannel node interface design. We therefore introduce a new class of &ldquo;allocation&rdquo; protocols in which the channel access is obtained without the aforementioned penalties. The allocation protocols build on message source and destination oriented transmission rights allocation, taking into account the implementation aspects of multichannel networks. We show that the class of &ldquo;multichannel allocation&rdquo; protocols covers the whole range of random access to fixed channel access control policies and introduce an analytic approach for a uniform analytic treatment. The analysis demonstrates the potential for a significant improvement in the system capacity and the average message delay, when compared to a conventional single (undivided) channel system.
LCS&mdash;a leaf cell synthesizer employing formal deduction techniques
Authors: P. A. Subrahmanyam
Venue: Proceedings of the 24th ACM/IEEE Design Automation Conference (1987)

This paper discusses the use of formal reasoning techniques to aid in the automated structural design of leaf cells, in the more global context of VLSI circuit design. The technique supports an encapsulation of the technology-dependent aspects of a design by using appropriate formal models, and guarantees the consistency of the designs produced with respect to the functional specification and the technology model employed. The approach is illustrated by its use in the design of some leaf cells in CMOS. The role of the techniques when used in an interactive mode and in the verification of existing designs is also discussed.
A formal treatment of missing imprecise information
Authors: J. Morrissey, C. J. Van Rijsbergen
Venue: Proceedings of the 10th annual international ACM SIGIR conference on Research and development in information retrieval (1987)

Missing, non-applicable and imprecise values arise frequently in Office Information Systems. There is a need to treat them in a consistent and useful manner. This paper proposes a method and gives the precise semantics of the retrieval operations in a system where imprecision is allowed. It also suggests a way to handle the uncertainty introduced by imprecise data values.
Logarithmic indices for multiprocessor evaluation
Authors: Daniel Tabak
Venue: ACM SIGARCH Computer Architecture News (1988)

A method of logarithmic indices for a partial evaluation of potential performance capability of multiprocessors is proposed. The method is independent of the nature of the programs run or any available software capabilities. Consideration parameters can be flexibly added or eliminated as well as relatively weighted. The method is applied to three commercial multiprocessors as an example.