ppxscal/embedding_network huggingface dataset:
Improving the Performance of Regular Networks with Source Routing
Authors: J. Flich, P. López, M. P. Malumbres, J. Duato
Venue: Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing (2000)

Networks of workstations (NOWs) are becoming increasingly popular as a cost-effective alternative to parallel computers. In these machines, the network connects processors using irregular topologies, providing the wiring flexibility, scalability, and incremental expansion capability required in this environment. In addition, when performance is the primary concern, these network products are being used to build large commodity clusters with regular topologies [10]. In previous papers [3, 4], we have proposed the in-transit buffer mechanism to improve network performance, applying it to NOWs with irregular topology and source routing. This mechanism allows the use of minimal paths among all hosts, breaking cyclic dependencies between channels by storing and later re-injecting packets at some intermediate hosts. In this paper, we apply the in-transit buffer mechanism to regular networks with source routing in order to improve their performance. In addition, two path selection policies are evaluated. The first one will always choose the same minimal path from source to destination, whereas the second one will choose from different alternative minimal paths in a round-robin fashion. The evaluation results show that the overall network throughput can be doubled for large networks.
Combining Neural Networks, Fuzzy Sets, and Evidence Theory Based Approaches for Analyzing Color Images
Authors: Antanas Verikas, Kerstin Malmqvist, Marija Bacauskiene
Venue: Proceedings of the IEEE-INNS-ENNS International Joint Conference on Neural Networks (IJCNN'00)-Volume 2 - Volume 2 (2000)

This paper presents an approach to determining colors of specks in an image taken from a pulp sample. The task is solved through color classification by an artificial neural network. The network is trained using possibilistic target values. The problem of post-processing of a pixelwise-classified image is addressed from the point of view of the Dempster-Shafer theory of evidence. Each neighbor of a pixel being analyzed is considered as an item of evidence supporting particular hypotheses regarding the class label of that pixel. The experiments performed have shown that the color classification results correspond well with the human perception of colors of the specks.
Recovering High-Level Views of Object-Oriented Applications from Static and Dynamic Information
Authors: Tamar Richner, Stéphane Ducasse
Venue: Proceedings of the IEEE International Conference on Software Maintenance (1999)

Recovering architectural documentation from code is crucial to maintaining and reengineering software systems. Reverse engineering and program understanding approaches are often limited by the fact that (1) they propose a fixed set of predefined views and (2) they consider either purely static or purely dynamic views of the application. In this paper we present an environment supporting the generation of tailorable views of object-oriented systems from both static and dynamic information. Our approach is based on the combination of user-defined queries which allow an engineer to create high-level abstractions and to produce views using these abstractions.
Fundemental Web Design & Development Skills, 1 edition
Authors: Crystal Waters, Chris Ullman
Venue:  (2002)

:Ever wanted to change direction in life and start a new career path? Just finished university or college and need a new challenge?If you're considering a career in web development, this up-to-date book will provide you with all the core professional skills you need. As well as covering the web languages of HTML, CSS, and JavaScript, you'll be introduced to various aspects of design, such as navigation through a site, page layout, and the use of images.You'll also find a discussion of the topics that concern current web professionals: the use of web standards, usability issues, making the site accessible to those with disabilities - and how to combine these with great-looking sites!In a tutorial style all the way, the book ends by showing you how to upload and manage your site once it has been created, and where to go from here to progress with your career choice.The book comes with a CD full of sample code from the book, and PC and Mac trial versions of the latest visual design tools: Macromedia Dreamweaver MX, Macromedia Fireworks MX, and Macromedia Flash MX.
Testability Insertion in Behavioral Descriptions
Authors: Frank F. Hsu, Elizabeth M. Rudnick, Janak H. Patel
Venue: Proceedings of the 9th international symposium on System synthesis (1996)

A new synthesis-for-testability approach is proposed that uses control points at branch conditions to improve testability. Hard-to-control loops are identified through analysis of the control-data flow graph, and control points are added at the exit conditions of these loops. Test statements are also inserted if necessary to allow hard-to-control variables to be directly controllable from existing primary inputs. Implementation of the proposed techniques using the HLSynth92 and HLSynth95 benchmark circuits results in significant improvements in fault coverage and reductions in test set size and test generation time. Furthermore, the impact on area and performance is minimal, and the ability to do at-speed testing is not affected.
Application Development using Compositional Performance Analysis
Authors: Adam Rifkin
Venue:  (1999)

A parallel programming archetype [Cha94, CMMM95] is an abstraction that captures the common features of a class of problems with a similar computational structure and combines them with a parallelization strategy to produce a pattern of dataflow and communication. Such abstractions are useful in application development, both as a conceptual framework and as a basis for tools and techniques. The efficiency of a parallel program can depend a great deal on how its data and tasks are decomposed and distributed. This thesis describes a simple performance evaluation methodology that includes an analytic model for predicting the performance of parallel and distributed computations developed for multicomputer machines and networked personal computers. This analytic model can be supplemented by a simulation infrastructure for application writers to use when developing parallel programs using archetypes. These performance evaluation tools were developed with the following restricted goal in mind: We require accuracy of the analytic model and simulation infrastructure only to the extent that they suggest directions for the programmer to make the appropriate optimizations. This restricted goal sacrifices some accuracy, but makes the tools simpler and easier to use. A programmer can use these tools to design programs with decomposition and distribution specialized to a given machine configuration. By instantiating a few architecture-based parameters, the model can be employed in the performance analysis of data-parallel applications, guiding process generation, communication, and mapping decisions. The model is language-independent and machine-independent; it can be applied to help programmers make decisions about performance-affecting parameters as programs are ported across architectures and languages. Furthermore, the model incorporates both platform-specific and application-specific aspects, and it allows programmers to experiment with tradeoffs better than either strictly simulation-based or purely theoretical models. In addition, the model was designed to be simple. In summary, this thesis outlines a simple method for benchmarking a parallel communication library and for using the results to model the performance of applications developed with that communication library. We use compositional performance analysis - decomposing a parallel program into its modular parts and analyzing their respective performances - to gain perspective on the performance of the whole program. This model is useful for predicting parallel program execution times for different types of program archetypes (e.g., mesh and mesh-spectral), using communication libraries built with different message-passing schemes (e.g., Fortran M and Fortran with MPI) running on different architectures (e.g., IBM SP2 and a network of Pentium personal computers).
A Mechanism to Provide Interoperability Between ORBs with Relocation Transparency
Authors: Nuccio M. S. Zuquello, Edmundo R. M. Madeira
Venue: Proceedings of the 3rd International Symposium on Autonomous Decentralized Systems (1997)

Ability of heterogeneous systems cooperate is a real necessity that has been growing, due to the increasing development of the distributed processing technology. This necessity is driving the development of more suitable solutions. CORBA (Common Object Request Broker Architecture) specification presents an architecture which allows interoperability among heterogeneous distributed environment applications. However, because of the great flexibility offered in implementation decisions, many problems to extend interoperability between two ORBs developed by different technologies arise. This paper discusses these problems and their solutions and presents a set of operations to support a bridging mechanism extending access and location transparencies, considered fundamental for a distributed environment, to work beyond an ORB scope. A scheme to provide relocation transparency, extended to support interoperability, is also proposed. Finally, an implementation of these mechanisms over an ORB's prototype, developed at Unicamp, and ORBeline is described.
Low-Cost Flexible Software Fault Tolerance for Distributed Computing
Authors: Ann T. Tai, Kam S. Tso, William H. Sanders, Leon Alkalai, Savio N. Chau
Venue: Proceedings of the 12th International Symposium on Software Reliability Engineering (2001)

In this paper, we revisit the problem of software fault tolerance in distributed systems.In particular, we propose an extension of a message-driven confidence-driven (MDCD) protocol we have developed for error containment and recovery in a particular type of distributed embedded system. More specifically, we augment the original MDCD protocol by introducing the method of "fine-grained confidence adjustment," which enables us to remove the architectural restrictions. The dynamic nature of the MDCD approach gives it a number of desirable characteristics.First, this approach does not impose any restrictions on interactions among application software components or require costly message-exchange based process coordination/synchronization.Second, the algorithms allow redundancies to be applied only to low-confidence or critical interacting software components in a distributed system, permitting fexible realization of software fault tolerance.Finally, the dynamic error containment and recovery mechanisms are transparent to the application and ready to be implemented by generic middleware.
Implementation of MAP: A system for mobile assistant programming
Authors: S. Perret, A. Duda
Venue: Proceedings of the 1996 International Conference on Parallel and Distributed Systems (1996)

We have define a network programming model called Mobile Assistant Programming (MAP) for development and execution of communication applications in large scale networks of heterogeneous computers. MAP assistants are high-level interpreted programs that can move between nodes, create clones and report results. Their execution is asynchronous and persistent to take into account client disconnections and node failures. This paper presents the implementation of the MAP model using the World-Wide Web framework and the Scheme programming language. Our measures and the first experience with MAP applications show that significant performance improvement can be achieved by moving computation closer to data: both the elapsed time and network traffic are reduced.
An Estelle-Based Probabilistic Partial Timed Protocol Verification System
Authors: Chung-Ming Huang, Jenq-Muh Hsu
Venue: Proceedings of the Seventh International Conference on Parallel and Distributed Systems (2000)

Complete verification of communication protocols is usually very hard to achieve due to the combinatorial state space explosion problem. Probability-based partial verification provides an alternative solution to solve this problem. In this paper, we adopt a Timed Communicating State Machine (TCSM), which belongs to the Extended Communicating Finite State Machine (ECFSM) model, to formally specify protocols that incorporate timed properties as part of their specifications. Based on the TCSM model, we propose a probabilistic timed verification scheme that is based on the occurrence rates of communicating entities' transitions and occurrence probabilities of channel entities' transitions. Using our probabilistic partial timed protocol verification scheme, an Estelle-based Probabilistic Partial Timed Protocol verification system, which is called PTPVS, is developed on SUN SPARC workstations. In this way, protocol designers can use PTPVS to design and partially verify Estelle-based protocol specifications with time proper-ties.
Parallel Approaches for Discovering Functional Dependencies from Data for Information System Design Recovery
Authors: Wie Ming Lim, John Harrison
Venue: Proceedings of the 1997 International Symposium on Parallel Architectures, Algorithms and Networks (1997)

The extraction of functional dependencies is a fundamental activity in the database design recovery process. Existing algorithms for this task are computationally expensive and appear to be impractical if applied to large legacy database instances, e.g., their performance deteriorates when number of attributes or/and instances is large. This paper presents strategies for parallelising the functional dependencies discovery process. We propose three parallel discovery models which are based on horizontal, vertical, and matrix database table slicing techniques. We exploit both program parallelism and data parallelism in our implementations. The results are discovery approaches that are more applicable to large real world databases.
Multilevel data summarization from information systems: a "rule + exception" approach
Authors: Jue Wang, Min Zhao, Kai Zhao, Suqing Han
Venue: AI Communications (2003)

In this paper we present a theoretical framework on Multilevel Data Summarization (MDS) - a process to summarize an information system into rule sets with different concise degrees (granularity) and corresponding exception sets, which is viewed as the rule-plus-exception model in cognitive science.In order to construct the theoretical framework of MDS, we propose the cognitive positive region and cognitive boundary region to substitute for the positive region and boundary region in rough set theory. Unlike current approaches, the structure of boundary region is paid more attention than positive region in this framework.Since exceptions are sometimes more important than rules for applications, we introduce a method to identify exceptions from a given information system, which concerns closely with the distribution of core attributes in the discernibility matrix.
Using the Open Library Architecture (OLA) Open Source API in Heterogeneous Design Flows
Authors: Daniel Moritz
Venue: Proceedings of the 3rd International Symposium on Quality Electronic Design (2002)

Design and timing closure are critical issues in today's design flows. Industry common library formats like .lib, CLF and TLF do not provide a means to embed arbitrary delay information and complex interconnect algorithms. Designers and silicon providers are at the mercy of these restrictions. Algorithms are applied to characterization data and proprietary interconnect analysis modules to minimize the error when mapping in to these formats. The result is numerous error creep in to the tools that employ these formats. Often times these inaccuracies force unnecessary design iterations, technology guard banding, and finger pointing between the tool and library providers. With interconnect delay dominating path timing it is more critical than ever to move past the text based library formats and to an API based solution that provides a way to embed interconnect analysis in the technology models. The Open Library Architecture addresses these issues by implementing an open C API. This API allows the library vendor to implement arbitrary data structures and algorithms. The same OLA module is employed consistently throughout the design flow that eliminates loops to do inaccurate library mapping algorithms. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
Combinatorial Geometry
Authors: Janos Pach, K P Agarwal
Venue:  (1991)

\indent This beautiful discipline emerged from number theory after the fruitful observation made by Minkowski (1896) that many important results in diophantine approximation (and in some other central fields of number theory) can be established by easy geometric arguments.
The Affect of Cache to Speedup Models
Authors: Chen Lan
Venue: Proceedings of the 1996 International Symposium on Parallel Architectures, Algorithms and Networks (1996)

Speedup is usually used to reflect the effect of parallel processing systems. But the existed speedup models do not consider about the affect of cache, so the affect of cache to several speedup models is analysed in this paper.
DVDT: Design for Voltage Drop Test Using Onchip-Voltage Scan Path
Authors: Makoto Ikeda, Hideyuki Aoki, Kunihiro Asada
Venue: Proceedings of the 1st International Symposium on Quality of Electronic Design (2000)

This paper proposes a new design method for voltage drop testing using on-chip-voltage scan path. Using on-chip voltage monitors with a scan path data transfer architecture, this on-chip-voltage scan path can measure voltage-drop on real chip at real time with a limited number of I/O pins.Preliminary results are presented based on measurement results using a test chip, which demonstrates that this technique can effectively monitor voltage bounce in power supply lines. A quality of power supply lines can be effectively enhanced when this technique is applied to a real chip.
On the multiplexing effects of the ATM traffic
Authors: L. Cheng, H. D. Hughes
Venue: Proceedings of the IEEE Symposium on Computers and Communications (ISCC'95) (1995)

Traffic measurements taken from real data are highly desirable for validating traffic models, designing congestion control and flow control algorithms, implementing communication protocols, and developing switch architectures. This paper investigates the traffic characteristics of several applications in an ATM network with the goal of studying bursty traffic behavior and realizing the multiplexing effects of variable bit rate (VBR) traffic. Specifically, three types of traffic (ftp, voice, and video) are obtained from an ATM testbed. These applications are reported to be important applications that tend to dominate the wide-area networks. The multiplexing effects of FTP traffic are studied to identify empirical bandwidth requirements. The characteristics of the multiplexing effects can be applied to develop an efficient call admission algorithm based on the measured data. These experimental results designed to investigate traffic characteristics provide insights to bursty traffic behavior and performance requirements of practical real-time loads.
Multiple-Valued-Digit Number Representations in Arithmetic Circuit Algorithms
Authors: Naofumi Takagi
Venue: Proceedings of the 32nd International Symposium on Multiple-Valued Logic (2002)

Multiple-valued-digit number representations, i.e., positional weightednumber representations with a digit set consisting of more than two values,are often used in arithmetic circuit algorithms for high-speed and/orarea efficient computation. These algorithms may be implementedby a multiple-valued logic more efficiently than by the binary logic.This article shows how these number representations are used in arithmeticcircuit algorithms.
Java the UML Way: Integrating Object-Oriented Design and Programming
Authors: Else Lervik, Vegard B. Havdal, Tisip
Venue:  (2002)

:This is a fast-paced textbook which teaches how to program in Java using UML as the modeling tool.Objects are presented early on, and traditional topics of control structures and arrays are cast into an object-oriented context. The use of available classes is stressed, and classes for user communication (JOptionPanel), sound, images, graphics, sorting and searching are covered in the first part of the book. Applets and applications illustrate the use of language features.The second part of the book covers intermediate-to-advanced topics, e.g. understanding graphical user interfaces (GUI) by means of the Swing libraries, thread programming, algorithms and data sutrctures (the Collection classes), distributed systems (sockets and RMI), database interfacing (JDBC) and web-programming (servlets/JSP).You will learn:How to "translate" a UML class diagram into Java source code.How to construct first classes even before writing the simplest if-statement.How to use standard SDK 2 classes and the SDK online API documentation.How to write programs according to Sun's code conventions.How to separate GUI and application code and why it is important.How to get started on GUI programming with Swing, particuarly how to master the useful, but difficut JTable anf GridBagLayout classes.How to produce larger programs such as distributed systems with callback and database programs based on three-layer architecture. How to make JSP Web pages with personalized content for end users and with database communication.About TSIP:TSIP is a Research Foundation working with ICT and Open and Distance Learning. Activities include:offering 50 ICT distance courses via the Internet in co-operation with Sor-Trondelag University Collegedeveloping and managing Internet-based servicesdeveloping client-server database solutionspublishing textbooks on C++ and Java Programming: the Internet: Operating Systems and LAN Management.
A framework for World Wide Web client-authentication protocols
Authors: Cem Paya
Venue:  (1998)

Existing client-authentication protocols deployed on the World Wide Web today are based on conventional distributed systems and fail to address the problems specific to the application domain. Some of the protocols restrict the mobility of the client by equating user identity to a machine or network address, others depend on sound password management strategies, and yet others compromise the privacy of the user by transmitting personal information for authentication. We introduce a new framework for client-authentication by separating two goals that current protocols achieve simultaneously: 1. Maintain persistent sense of identity across different sessions. 2. Prove facts about the user to the site. These problems are independent, in the sense that any protocol for solving the first problem can be combined with any protocol for solving the second. Separation of the two purposes opens up the possibility of designing systems which balance two conflicting goals, authentication and anonymity. We propose a solution to the first problem, based on the Digital Signature Standard. The implications of this framework from the point of view of user privacy are examined. The paper is concluded with suggestions for integrating the proposed scheme into the existing WWW architecture. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player