ppxscal/embedding_network huggingface dataset:
Generating Functional Design Verification Tests
Authors: Susana Stoica
Venue: IEEE Design Test (1999)

With the growing complexity and interaction of vehicle functionalities, a reliable functional test methodology has become a major concern. In 1995, recognizing the need to develop a quality functional test process, Ford Motor Company started a concentrated effort to define for itself and its suppliers an effective test strategy for functionality verification. The Robust Test Method (RTM) presented in this article is an important component. Ford successfully applied the strategy in an extremely cost-conscious environment that demands high quality and fast test turnaround time. The introduction of robust test methods into the test process translated into a quantum jump in the test quality, allowing the detection of previously undetected faults. When this type of testing was applied to subsystem-level design verification yielded more errors detected than the module and system tests combined, while reducing the test turnaround time by 30%.
Performance Modeling and Prediction of Nondedicated Network Computing
Authors: Linguo Gong, Xian-He Sun, Edward F. Watson
Venue: IEEE Transactions on Computers (2002)

The low cost and wide availability of networks of workstations have made them an attractive solution for high performance computing. However, while a network of workstations may be readily available, these workstations may be privately owned and the owners may not want others to interrupt their priority in using the computer. Assuming machine owners have a preemptive priority, in this paper, we study the parallel processing capacity of a privately owned network of workstations. A mathematical model is developed to predict performance for nondedicated network computing. It also considers systems with heterogeneous machine utilization and heterogeneous service distribution. This model separates the influence of machine utilization, sequential job service rate, and parallel task allocation on the parallel completion time. It is simple and valuable for guiding task scheduling in a nondedicated environment.
Database Migration: A New Architecture for Transaction Processing in Broadband Networks
Authors: Takahiro Hara, Kaname Harumoto, Masahiko Tsukamoto, Shojiro Nishio
Venue: IEEE Transactions on Knowledge and Data Engineering (1998)

Due to recent developments in network technologies, broader channel bandwidth is becoming prevalent in worldwide networks. As one of the new technologies making good use of such broadband channels, dynamic relocation of databases through networks, which we call database migration, will soon be used in practice as a powerful and basic database operation. We propose two transaction processing methods to take advantage of database migration in broadband networks. These methods choose the most efficient transaction processing method between the conventional method, based on the two-phase commit protocol, and our method, using database migration. We also propose a concurrency control mechanism and a recovery mechanism for our proposed methods. Simulation results are presented comparing the performance of our proposed methods and the conventional transaction processing method based on the two-phase commit protocol. The results demonstrate that the effective use of database migration produces better performance than the conventional method.
Supplementary schemes to spectral subtraction for speech enhancement
Authors: Hwai-Tsu Hu, Fang-Jang Kuo, Hsin-Jen Wang
Venue: Speech Communication (2002)

Three supplementary schemes, namely spectral smoothing, formant intensification and comb filtering, are proposed to enhance noisy speech that was dealt with a classic spectral subtraction method. Performance improvements are mainly achieved by exploring cepstral properties and comb filtering, and they are evaluated using both objective and subjective measures based on 12 noise-corrupted speech files. Noise types considered in this study consist of white Gaussian and car noise with signal-to-noise ratio (SNR) set to 5 and 10 dB, respectively. Although experimental results indicate certain inconsistency between objective and subjective measures, it can still be concluded that spectral smoothing and comb filtering contribute to the melioration of speech quality for speech corrupted by additive white Gaussian noise. On the other hand, advantages due to formant intensification can only be recognized whenever music noise is suppressed and the original speech formant characteristics are preserved. The employment of all proposed schemes together generally leads to a notable improvement in perceived quality.
Automatic Multilevel Thresholding for Image Segmentation by the Growing Time Adaptive Self-Organizing Map
Authors: Hamed Shah-Hosseini, Reza Safabakhsh
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (2002)

In this paper, a Growing TASOM (Time Adaptive Self-Organizing Map) network called "GTASOM" along with a peak finding process is proposed for automatic multilevel thresholding. The proposed GTASOM is tested for image segmentation. Experimental results demonstrate that the GTASOM is a reliable and accurate tool for image segmentation and its results outperform other thresholding methods.
DS/SS Code acquisition with joint detection of multiple correct cells using locally optimum test statistics in Rayleigh fading channels
Authors: Seokho Yoon, Iickho Song, Sun Yong Kim, So Ryoung Park
Venue: Signal Processing (2002)

A new PN code acquisition scheme is proposed based on the joint detection of correct cells (H1 cells) at which the code phase offset between the locally generated and received PN codes is within a desired small offset. Most of the acquisition schemes which have been proposed assume that there exists one and only one H1 cell over the uncertainty region. However, in practical systems, there exist multiple H1 cells. In this paper, using the locally optimum test statistic, the joint decision rule of two H1 cells is derived for nonselective Rayleigh fading channels. Then, with the proposed acquisition scheme based on the joint decision rule, a closed-form expression of the mean acquisition time is obtained with the state diagram, and the probabilities of detection, missing, and false alarm are derived. The mean acquisition time performance of the proposed acquisition scheme is compared with that of a conventional acquisition scheme in which only an H1 cell is used for detection at each step. The numerical results show that the proposed scheme not only has better performance but also is more robust to to the residual code phase offset variation than the conventional scheme.
Self-Organizing Transient Chaotic Neural Network for Cellular Channel Assignment
Authors: Yifeng Zhang, Zhenya He, Chengjian Wei
Venue: Neural Processing Letters (2002)

This paper presents a self-organizing transient chaotic neural network to solve the channel assignment problem, one of NP-complete problems. The proposed neural network consists of two parts. The first part is the self-organizing evolution stage, which based on the mutual inhibition mechanisms of bristle differentiation and the problem's heuristic information. The second part is the transient chaotic neural network executing stage. A significant property of the TCNN model is that the chaotic neurodynamics is temporarily generated for searching and self-organizing in order to escape the local minima. In the proposed neural network, the first part is used to improve the quality of the obtained solutions. The simulating results have shown that the self-organizing transient chaotic neural network improves greatly performance through solving the well-known benchmark problems, especially for the Sivarajan's and Kunz's benchmark problems, while the performance is comparable with existing algorithms.
Survey of Fuzzy Logic Applications in Brain-Related Researches
Authors: Omer Faruk Bay, Ali Bülent Usakli
Venue: Journal of Medical Systems (2003)

The aim of this study was to survey fuzzy logic (FL) applications in brain researches. In general, these applications are related to pattern recognition for localization in brain structures or tumor detection, image segmentation, and simulations. In recent years, neural networks and FL are gaining popularity. FL is based on the observation of people. The enormous amount of information representation by the brain suggests that FL principles can be useful, especially for complex brain functions. Causal models based on functional neuroanatomy can be then implemented in computer simulations to reflect the dynamical intersection of brain structures. FL is considered as an appropriate tool for modelling and control. FL has been applied in different ways to brain researches. This paper surveys the utilization of FL in brain researches.
Flux Maximizing Geometric Flows
Authors: Alexander Vasilevskiy, Kaleem Siddiqi
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (2002)

Several geometric active contour models have been proposed for segmentation in computer vision and image analysis. The essential idea is to evolve a curve (in 2D) or a surface (in 3D) under constraints from image forces so that it clings to features of interest in an intensity image. Recent variations on this theme take into account properties of enclosed regions and allow for multiple curves or surfaces to be simultaneously represented. However, it is still unclear how to apply these techniques to images of narrow elongated structures, such as blood vessels, where intensity contrast may be low and reliable region statistics cannot be computed. To address this problem, we derive the gradient flows which maximize the rate of increase of flux of an appropriate vector field through a curve (in 2D) or a surface (in 3D). The key idea is to exploit the direction of the vector field along with its magnitude. The calculations lead to a simple and elegant interpretation which is essentially parameter free and has the same form in both dimensions. We illustrate its advantages with several level-set-based segmentations of 2D and 3D angiography images of blood vessels.
Parallelism in Object-Oriented Languages: A Survey
Authors: Barbara B. Wyatt, Krishna Kavi, Steve Hufnagel
Venue: IEEE Software (1992)

Fourteen concurrent object-oriented languages are compared in terms of how they deal with communication, synchronization, process management, inheritance, and implementation trade-offs. The ways in which they divide responsibility between the programmer, the compiler, and the operating system are also investigated. It is found that current object-oriented languages that have concurrency features are often compromised in important areas, including inheritance capability, efficiency, ease of use, and degree of parallel activity. Frequently, this is because the concurrency features were added after the language was designed. The languages discussed are Actors, Abd/1, Abd/R, Argus, COOL, Concurrent Smalltalk, Eiffel, Emerald, ES-Kit C++, Hybrid, Nexus, Parmacs, POOL-T, and Presto.
Design and evaluation of a DAMQ multiprocessor network with self-compacting buffers
Authors: J. Park, B. W. O'Krafka, S. Vassiliadis, J. Delgado-Frias
Venue: Proceedings of the 1994 ACM/IEEE conference on Supercomputing (1994)

This paper describes a new approach to implement Dynamically Allocated Multi-Queue (DAMQ) switching elements using a technique called "self-compacting buffers". This technique is efficient in that the amount of hardware required to manage the buffers is relatively small; it offers high performance since it is an implementation of a DAMQ. The first part of this paper describes the self-compacting buffer architecture in detail, and compares it against a competing DAMQ switch design. The second part presents extensive simulation results comparing the performance of a self-compacting buffer switch against an ideal switch including several examples of k-ary n-cubes and delta networks. In addition, simulation results show how the performance of an entire network can be quickly and accurately approximated by simulating just a single switching element.
The Web and Social Networks
Authors: Ravi Kumar, Prabhakar Raghavan, Sridhar Rajagopalan, Andrew Tomkins
Venue: Computer (2002)

The sheer volume of Web data, together with its low signal-to-noise ratio, make it difficult for text-based search engines to locate high-quality pages. Analyzing the links between Web sites has dramatically improved the Web search experience and spawned research into the Web's link structure. This research includes graph-theoretic studies of connectivity, which have shown the Web to have strong similarities with social networks.Self-similarity is pervasive in social networks. While researchers have observed Web self-similarity in other contexts, finding a fractal structure in a graph-theoretic setting adds further evidence to the Web's small-world social nature. Thus, researchers seek to explain and exploit the human behavior implicit in the Web's evolving structure.How can we combine the power of Web networks with networks resulting from other human activity? Accomplishing this goal represents knowledge management's key challenge and opportunity.
Hierarchical Compilation of Macro Dataflow Graphs for Multiprocessors with Local Memory
Authors: G. N. Srinivasa Prasanna, A. Agrawal, B. R. Musicus
Venue: IEEE Transactions on Parallel and Distributed Systems (1994)

This paper presents a hierarchical approach for compiling macro dataflow graphs formultiprocessors with local memory. Macro dataflow graphs comprise several nodes (ormacro operations) that must be executed subject to prespecified precedence constraints.Programs consisting of multiple nested loops, where the precedence constraints betweenthe loops are known, can be viewed as macro dataflow graphs. The hierarchicalcompilation approach comprises a processor allocation phase followed by a partitioningphase. In the processor allocation phase, using estimated speedup functions for themacro nodes, computationally efficient techniques establish the sequencing andparallelism of macro operations for close-to-optimal run-times. The second phasepartitions the computations in each macro node to maximize communication locality forthe level of parallelism determined by the processor allocation phase. The same approachcan also be used for programs consisting of multiple loop nests, when each of the nestedloops can be characterized by a speedup function. These ideas have been implemented ina prototype structure-driven compiler, SDC, for expressions of matrix operations. Thepaper presents the performance of the compiler for several matrix expressions on asimulator of the Alewife multiprocessor.
Automated data dependency size estimation with a partially fixed execution ordering
Authors: Per Gunnar Kjeldsberg, Francky Catthoor, Einar J. Aas
Venue: Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design (2000)

For data dominated applications, the system level design trajectory should first focus on finding a good data transfer and storage solution. Since no realization details are available at this level, estimates are needed to guide the designer. This paper presents an algorithm for automated estimation of strict upper and lower bounds on the individual data dependency sizes in high level application code given a partially fixed execution ordering. Previous work has either not taken execution ordering into account at all, resulting in large overestimates, or required a fully specified ordering which is usually not available at this high level. The usefulness of the methodology is illustrated on representative application demonstrators.
Why Software Reliability Predictions Fail
Authors: Filippo Lanubile
Venue: IEEE Software (1996)

Software reliability reflects a customer's view of the products we build and test, as it is usually measured in terms of failures experienced during regular system use. But our testing strategy is often based on early product measures, since we cannot measure failures until the software is placed in the field. This issue, Filippo Lanubile shows us that such measurement is not effective at predicting the likely reliability of the delivered software.¿Shari Lawrence Pfleeger
KBMS: A Knowledge-Based System for Modeling Software System Specifications
Authors: K. Zeroual, P. -N. Robillard
Venue: IEEE Transactions on Knowledge and Data Engineering (1992)

Recent research results in software engineering have shown that the process of formalizing and automating software specification activity is moving towards knowledge-based specification systems. A modeling approach and a knowledge-based system that assist in the requirement acquisition, development, and maintenance of such software system specifications are presented.
Guarded recursive datatype constructors
Authors: Hongwei Xi, Chiyan Chen, Gang Chen
Venue: ACM SIGPLAN Notices (2003)

We introduce a notion of guarded recursive (g.r.) datatype constructors, generalizing the notion of recursive datatypes in functional programming languages such as ML and Haskell. We address both theoretical and practical issues resulted from this generalization. On one hand, we design a type system to formalize the notion of g.r. datatype constructors and then prove the soundness of the type system. On the other hand, we present some significant applications (e.g., implementing objects, implementing staged computation, etc.) of g.r. datatype constructors, arguing that g.r. datatype constructors can have far-reaching consequences in programming. The main contribution of the paper lies in the recognition and then the formalization of a programming notion that is of both theoretical interest and practical use.
Correctness Criteria for Multilevel Secure Transactions
Authors: Kenneth P. Smith, Barbara T. Blaustein, Sushil Jajodia, LouAnna Notargiacomo
Venue: IEEE Transactions on Knowledge and Data Engineering (1996)

The benefits of distributed systems and shared database resources are widely recognized, but they often cannot be exploited by users who must protect their data by using label-based access controls. In particular, users of label-based data need to read and write data at different security levels within a single database transaction, which is not currently possible without violating multilevel security constraints. This paper presents a formal model of multilevel transactions which provide this capability. We define four ACIS (atomicity, consistency, isolation, and security) correctness properties of multilevel transactions. While atomicity, consistency and isolation are mutually achievable in standard single-site and distributed transactions, we show that the security requirements of multilevel transactions conflict with some of these goals. This forces trade-offs to be made among the ACIS correctness properties, and we define appropriate partial correctness properties. Due to such trade-offs, an important problem is to design multilevel transaction execution protocols which achieve the greatest possible degree of correctness. These protocols must provide a variety of approaches to making trade-offs according to the differing priorities of various users. We present three transaction execution protocols which achieve a high degree of correctness. These protocols exemplify the correctness trade-offs proven in the paper, and offer realistic implementation options.
New Frontiers: Self-Assembly and Nanoelectronics
Authors: Victor V. Zhirnov, Daniel J. C. Herr
Venue: Computer (2001)

In a quest for semiconductor materials and processes, researchers focus on self-assembly, drawing from chemistry, biology, material science, and electrical engineering. In nature, self-organization and self-assembly are holistic processes. The tools and methods for synthesizing living matter represent the union of several disciplines (from mathematics and information theory; physics, chemistry, and biology; to philosophy and endogenetics). Engineers aim to apply living processes to improve the quality of life. The authors consider opportunities for and barriers to realizing practical applications of self-assembly from the perspectives of information theory, synergetics, and selected areas of physical and life sciences.When an electronic device's features are large, the process is metabolic-like and economically controlled. As the features shrink to nanometers, manufacturers pay a high price for the morphological information required to maintain system fidelity. This article shows how today's researchers can apply self-assembly principles to fabricate simple, uniform arrays of small quantum dots. The authors inspire readers to look to the future when we can use self-assembly to fabricate nanoelectronic device architectures.
Leveraging Your CMM Efforts for IEEE/EIA 12207
Authors: JoAn Ferguson, Sarah Sheard
Venue: IEEE Software (1998)

Many companies use the Capability Maturity Model for Software to improve the processes used by their development teams. The processes put into place to ascend this maturity ladder will serve them well as they become compliant with the new IEEE/EIA 12207 standard. This article addresses the relationship between this new standard and the CMM for Software.
Multiprocessor Synchronization for Concurrent Loops
Authors: Michael Wolfe
Venue: IEEE Software (1988)

Execution of concurrent loops on multiprocessor computers often requires synchronizing the processors. Synchronization schemes are surveyed that are suitable for automatic problem decomposition. The model of a shared-memory multiprocessor is used, as is the concurrent-loop paradigm, which is to compile a loop so each processor is assigned a different loop iteration. The discussion covers data dependence, removing synchronization points, random synchronization, pipelining, barrier synchronization, and critical sections.
Certifying Off-the-Shelf Software Components
Authors: Jeffrey M. Voas
Venue: Computer (1998)

Off-the-shelf components could save the software industry considerable time and money. However, the industry first needs a set of black-box processes to certify the suitability of COTS components.
The Differential CORDIC Algorithm: Constant Scale Factor Redundant Implementation without Correcting Iterations
Authors: Herbert Dawid, Heinrich Meyr
Venue: IEEE Transactions on Computers (1996)

The CORDIC algorithm is a well-known iterative method for the efficient computation of vector rotations, and trigonometric and hyperbolic functions. Basically, CORDIC performs a vector rotation which is not a perfect rotation, since the vector is also scaled by a constant factor. This scaling has to be compensated for following the CORDIC iteration.Since CORDIC implementations using conventional number systems are relatively slow, current research has focused on solutions employing redundant number systems which make a much faster implementation possible. The problem with these methods is that either the scale factor becomes variable, making additional operations necessary to compensate for the scaling, or additional iterations are necessary compared to the original algorithm.In contrast we developed transformations of the usual CORDIC algorithm which result in a constant scale factor redundant implementation without additional operations. The resulting "Differential CORDIC Algorithm" (DCORDIC) makes use of on-line (most significant digit first redundant) computation. We derive parallel architectures for the radix-2 redundant number systems and present some implementation results based on logic synthesis of VHDL descriptions produced by a DCORDIC VHDL generator. We finally prove that, due to the lack of additional operations, DCORDIC compares favorably with the previously known redundant methods in terms of latency and computational complexity.