ppxscal/embedding_network huggingface dataset:
Variable Step Size Technique for Adaptive Blind Decorrelation
Authors: Shifeng Ou, Xiaohui Zhao, Ying Gao
Venue: Proceedings of the Eighth ACIS International Conference on Software Engineering, Artificial Intelligence, Networking, and Parallel/Distributed Computing - Volume 03 (2007)

Blind decorrelation is a related task to blind source separation (BSS) which is applicable to numerous problems. A critical challenge in adaptive blind decorrelation (ABD) is the choice of step size to achieve fast initial convergence speed and low steady state error in time-varying systems. Unfortunately, unlike some supervised training, the error factor of ABD is inaccessible in practice, and so the relation between step size and error factor can not be utilized to adjust the step size. In this paper, we first present an algorithm to restructure the error factor by adopting an auxiliary decorrelation system with some restriction, and then based on a nonlinear updating rule of step-size in the light of the error factor descending in an exponential form, we propose a novel variable step size algorithm for ABD. Simulation results indicate the good performance of our proposed method.
Computer programming for facilities treating developmentally disabled children
Authors: Ronald H. Nelson
Venue: ACM SIGCAS Computers and Society (1977)

In the mental health institution, the staff are generally divided into two areas: the administrators and the clinicals. "The administrative-programmatic objective is the make a general class of services available to a specific individual or group of individuals" (Hurder & Hurder, ND). Therefore, each group is interested in different kinds of data for different purposes.
A greedy randomized adaptive search procedure applied to the clustering problem as an initialization process using K-Means as a local search procedure
Authors: J. R. Cano, O. Cordón, F. Herrera, L. Sánchez
Venue: Journal of Intelligent Fuzzy Systems: Applications in Engineering and Technology (2002)

We present a new approach for Cluster Analysis based on a Greedy Randomized Adaptive Search Procedure (GRASP), with the objective of overcoming the convergence to a local solution. It uses a probabilistic greedy Kaufman initialization to get initial solutions and K-Means as a local search algorithm. The approach is a new initialization one for K-Means. Hence, we compare it with some typical initialization methods: Random, Forgy, Macqueen and Kaufman. Our empirical results suggest that the hybrid GRASP - K-Means with probabilistic greedy Kaufman initialization performs better than the other methods with improved results. The new approach obtains high quality solutions for eight benchmark problems.
Cache-efficient numerical algorithms using graphics hardware
Authors: Naga K. Govindaraju, Dinesh Manocha
Venue: Parallel Computing (2007)

We present cache-efficient algorithms for scientific computations using graphics processing units (GPUs). Our approach is based on mapping the nested loops in the numerical algorithms to the texture mapping hardware and efficiently utilizing GPU caches. This mapping exploits the inherent parallelism, pipelining and high memory bandwidth on GPUs. We further improve the performance of numerical algorithms by accounting for the same relative memory address accesses performed at data elements in nested loops. Based on the similarity of memory accesses performed at the data elements in the input array, we decompose the input arrays into sub-arrays with similar memory access patterns and execute on the sub-arrays for faster execution. Our approach achieves high memory performance on GPUs by tiling the computation and thereby improving the cache-efficiency. Overall, our formulation for GPU-based algorithms extends the current graphics runtime APIs without exposing the underlying hardware complexity to the programmer. This makes it possible to achieve portability and higher performance across different GPUs. We use this approach to improve the performance of GPU-based sorting, fast Fourier transform and dense matrix multiplication algorithms. We also compare our results with prior GPU-based and CPU-based implementations on high-end processors. In practice, we observe 2-10x improvement in performance.
BilVideo video database management system
Authors: Özgür Ulusoy, Uğur Güdükbay, Mehmet Emin Dönderler, Ediz Saykol, Cemil Alper
Venue: Proceedings of the Thirtieth international conference on Very large data bases - Volume 30 (2004)

A prototype video database management system, which we call BilVideo, is presented. BilVideo provides an integrated support for queries on spatio-temporal, semantic and low-level features (color, shape, and texture) on video data. BilVideo does not target a specific application, and thus, it can be used to support any application with video data. An example application, news archives search system, is presented with some sample queries.
Technical Section: View-projection animation for 3D occlusion management
Authors: Niklas Elmqvist, Philippas Tsigas
Venue: Computers and Graphics (2007)

Inter-object occlusion is inherent to 3D environments and is one of the challenges of using 3D instead of 2D computer graphics for visualization. Based on an analysis of this effect, we present an interaction technique for view-projection animation that reduces inter-object occlusion in 3D environments without modifying the geometrical properties of the objects themselves. The technique allows for smooth on-demand animation between parallel and perspective projection modes as well as online manipulation of view parameters, enabling the user to quickly and easily adapt the view to reduce occlusion. A user study indicates that the technique provides many of the occlusion reduction benefits of traditional camera movement, but without the need to actually change the viewpoint. We have also implemented a prototype of the technique in the Blender 3D modeler.
Test Generation for Transistor Shorts using Stuck-at Fault Simulator and Test Generator
Authors: Yoshinobu Higami, Kewal K. Saluja, Hiroshi Takahashi, Shin-ya Kobayashi, Yuzo Takamatsu
Venue: Proceedings of the 16th Asian Test Symposium (2007)

Test generation methods for transistor shorts using logic test environment are proposed. The fault models used are strong shorts and weak shorts, introduced in our earlier work. Our methodology consists of fault simulation, test generation and test compaction using gate-level tools to detect transistor faults but without resorting to use of transistor-level tools.
Worrisome Rich-Get-Richer? Not the True Story!
Authors: Mingda Wu, Qiancheng Jiang, Yan Zhang
Venue: Proceedings of the 7th IEEE International Conference on Computer and Information Technology (2007)

Search engines have become efficient assistants for peo- ple to access information on the Web. Some researchers ar- gue that the prevalence of search engines is setting a tough journey for new pages to become popular even if they are of high quality. However, the evolution of popularity on the Web is not a closed feedback process, and the flexibility of query mechanism of search engines provides a free in- terface for users to search whatever they are interested in. We show that the diversity and drift of users' interests ac- tually alleviate the rich-get-richer phenomenon which the popularity-based ranking strategy of search engines tends to make worrisome. The results of our experiments on the query log of a real search engine also confirm our point of view.
Design of Multimedia Conference Control System based on SIP
Authors: Jianyun Ni, Jing Luo
Venue: Proceedings of the Eighth ACIS International Conference on Software Engineering, Artificial Intelligence, Networking, and Parallel/Distributed Computing - Volume 03 (2007)

As various multimedia communication services are increasingly required by Internet users, several signaling protocols have been proposed for the efficient control of multimedia communication services. However, the model and architecture of multimedia conferencing are several. In this article, we first introduce some SIP multimedia conferencing architectures, their advantages, disadvantages and performance. According to a centralized multimedia conferencing model, we construct feasible system architecture, which can support middle scale multimedia conference. After that we analysis the key technologies in centralized SIP multimedia conference, like media server design and audio mixing. Then, we presented a designed of multimedia conference system based on SIP. The SIP-based control mechanism for achieving the scalability has been designed in detail. At the end of this paper, the system's performance is evaluated and discussed.
Parallel evolution of game evaluation functions in ada
Authors: Tyler B. Hallmark, Eugene K. Ressler
Venue: Proceedings of the 2007 ACM international conference on SIGAda annual international conference (2007)

This is an Ada experience report, where we conclude that Ada tasking and distributed processing facilities make it a good research tool for experimentation with algorithms that might eventually need multiple processors. We implemented a genetic algorithm in Ada to create effective computer players for Connect4. Key to our success was employing Ada tasking and ALRM Annex E Distributed computing to harness a symmetric multiproces-sor and a distributed machine with very few code changes. Easy extension of an original single-task code to multi-tasking and distributed variants-even though extension was not planned in advance-was essential to timely completion. Using either the parallel or distributed implementation, about 150 processor hours were sufficient to evolve players that neither the GNU "Four-in-a-Row" Expert player nor the author could defeat. This algorithm relies on human expertise to restrict the genetic search space. Work is in progress on a new algorithm with near-zero encoded knowledge, which will run on 220 distributed nodes within the same distributed computing framework.
Exception Handling and Software Fault Tolerance
Authors: F. Cristian
Venue: IEEE Transactions on Computers (1982)

Some basic concepts underlying the issue of fault-tolerant software design are investigated. Relying on these concepts, a unified point of view on programmed exception handling and default exception handling based on automatic backward recovery is constructed. The cause-effect relationship between software design faults and failure occurrences is explored and a class of faults for which default exception handling can provide effective fault tolerance is characterized. It is also shown that there exists a second class of design faults which cannot be tolerated by using default exception handling. The role that software verification methods can play in avoiding the production of such faults is discussed.
A 1Tb/s 3W Inductive-Coupling Transceiver Chip
Authors: N. Miura, T. Kuroda
Venue: Proceedings of the 2007 Asia and South Pacific Design Automation Conference (2007)

A 1Tb/s 3W inter-chip transceiver transmits clock and data by inductive coupling at a clock rate of 1GHz and data rate of 1Gb/s per channel. 1024 data transceivers are arranged with a pitch of 30 mum in a layout area of 1mm2. The total layout area including 16 clock transceivers is 2mm2 in 0.18 mum CMOS and the chip thickness is reduced to 10 mum. Simple yet accurate model of inductive coupling is utilized for transceiver design. Bi-phase modulation (BPM) is employed for the data link to improve noise immunity, reducing power in the transceiver. 4-phase time division multiplexing (TDM) reduces crosstalk and channel pitch. The BER is lower than 10-13 with 150ps timing margin.
A double-threshold image binarization method based on edge detector
Authors: Qiang Chen, Quan-sen Sun, Pheng Ann Heng, De-shen Xia
Venue: Pattern Recognition (2008)

This paper presents a new double-threshold image binarization method based on the edge and intensity information. We first find seeds near the image edges and present an edge connection method to close the image edges. Then, we use closed image edges to partition the binarized image that is generated using a high threshold, and obtain a primary binarization result by filling the partitioned high-threshold binary image with the seeds. Finally, the final binarization result is obtained by remedying the primary binarization result with the low-threshold binary image. Compared with the classical binarization methods and the similar binarization methods, our method is effective on the binarization of images with low contrast, noise and non-uniform illumination.
Existence of Nonoscillatory Solution for Second Order Nonlinear Neutral Delay Differential Equation
Authors: Jinzhu Zhang, Zhen Jin, Huimin Zhang
Venue: Proceedings of the Eighth ACIS International Conference on Software Engineering, Artificial Intelligence, Networking, and Parallel/Distributed Computing - Volume 02 (2007)

This paper has considered the existence of nonoscillatory solutions for second-order nonlinear neutral delay differential equation with positive and negative coefficients. Some sufficient conditions for existence of nonoscillatory solutions are obtained.
A Fuzzy Immune PSD Control Approach to Pneumatic Clutch of Heavy Trucks
Authors: Hongbin Li, Lu Chen
Venue: Proceedings of the Fourth International Conference on Fuzzy Systems and Knowledge Discovery - Volume 02 (2007)

In order to adapt to the future development trend of automotive electrical control systems, a novel electrical control pneumatic clutch manipulating system is presented in this paper. The nonlinear characteristic of this system is analyzed and obtained theoretically. With the purpose of dealing with its nonlinear control problem, a new fuzzy immune PSD(Proportional, Summation, Derivative) control algorithm is proposed, which combines the fuzzy immune PID(Proportional, Integral, differential) control algorithm and the adaptive PSD control law. A real truck control system, with the application of this new control algorithm, is constructed and tested. Experimental results testify that this system with the fuzzy immune PSD control algorithm can bring a good control performance to heavy trucks.
Sequential Decision-Making Device for Information-Processing Applications
Authors: J. E. Gaffney
Venue: IEEE Transactions on Computers (1968)

Abstract This paper describes the concept of a hardware sequential decision-making device consisting principally of an array or network of nodes which can support a plurality of connections among the nodes on a simultaneous basis. The connection "chains" the nodes together. The application of the device to a dynamic computer memory allocation system is described in the paper. In this use, each "node" would correspond to a word or a group of words in a storage device, the access to which is controlled by a control unit employing the node network. Thus, only one node needs to be selected to either load a record into the controlled memory unit, or to read the record from it.
Research on Estimating Whole Life Railway Projects According to CS, BPNN & the Plethora of Historic Data
Authors: Xiaochen Duan, Xiaoping Zhang, Jianlong Zhang
Venue: Proceedings of the Third International Conference on Natural Computation - Volume 05 (2007)

The inaccuracy of cost estimation in feasibility study and design stage is one of main reasons that make investment of railway construction projects out of control in China. In those two stages cost estimations are affected by many uncertain factors, and the relationship among them is nonlinear and traditional model is hard to solve them. This paper applies Cost-Significant (CS) theorem to simplify the cost estimation, and sets up the forecasting methods for Cost-significant Items (CSIs) of Whole Life Costing (WLC). Then the Back-propagation Neural Network (BPNN) model is made up according to BP Back-propagation algorithm to "distill" CSIs and cost-significant factor (csf) from the data and information of performed projects, which provides a practical solution for those problems according to the nonlinear theory. The basic theories of BPNN, CS and WLC are introduced and their applications are illustrated with an example in this paper. From the example, we can see that the relative errors are small enough for accuracy demand of cost estimations after simulation, and test result shows that the model based on CSIs, WLC and BPNN theorems is accurate and successful.
A Fully-Automated Electron Beam Test System for VLSI Circuits
Authors: Norio Kuji, Teruo Tamama, Takao Yano
Venue: IEEE Design Test (1985)

A fully automated, stroboscopic electrobeam test system that analyzes the behavior of logic VLSI circuits, this system consistsof a stroboscopic electron-beam tester combined with an LSI CAD system. LSI circuit design data, read from the CAD system,provides a designed map. The host computer performs interconnection pattern recognition by superimposing this map onto anobserved stroboscopic SEM image. Then, once the circuit nodes for voltage waveform measurements are automatically determinedon the superimposed map. Next, the electron beam is positioned on the actual circuit-under-test wires. These automatic processesresult in measured waveforms, which are displayed on the host computer terminal. This system has been applied to a 2.3K-gatelogic LSI circuits, and has been successful in locating the critical path. This system, coupled with the recently developedfault diagnostic electron-beam tester, Finder, constitutes a unified electron-beam test system.
A multimedia access control language for virtual and ambient intelligence environments
Authors: Bechara Al Bouna, Richard Chbeir, Stefania Marrara
Venue: Proceedings of the 2007 ACM workshop on Secure web services (2007)

Access control models are becoming increasingly important in several application domains especially in distributed environments like those addressed by Web Services. Established approaches such as DAC [16] , MAC [16] RBAC [11, 12, 22] and others [6, 5, 15, 1] suggest representing users in different ways (labels, roles, credentials, etc.) in order to facilitate the association of authorization and access control policies. In intelligent and virtual ambient applications, users exist in a controlled environment equipped with multimedia sensors such as cameras and microphones, and use their terminals in several application environments. In this paper, we study the problem of integrating multimedia objects into access control models and particularly role-based ones. Here, we describe a Multimedia Access Control Language (M 2ACL) in which users and roles are described by using sets of mul- timedia objects,greatly increasing the flexibility of access control policies and their applicability to virtual and ambient intelligence (AmI environments.We address potential risks related to the use of multimedia objects by defining the concept of filter functions used to aggregate a set of values into a relevant one.Finally,we present a set of functional specification and the experiments conducted to validate the proposed approach.
Abstraction and Variation
Authors: Diomidis Spinellis
Venue: IEEE Software (2007)

Copy-pasting code is a source of bugs. By employing in our programs abstraction mechanisms such as functions, classes, types, decision tables, domain-specific languages, and databases, we can abstract common elements into parameterized reusable functionality. However, abstraction has its cost. Its early gains are large, but eventually the benefits turn negative and the code becomes less comprehensible and maintainable. Deciding when abstracting is appropriate is what makes programming an art.
Efficient Parallel Algorithm for Optimal Three-Sequences Alignment
Authors: Chun Yuan Lin, Chen Tai Huang, Yeh-Ching Chung, Chuan Yi Tang
Venue: Proceedings of the 2007 International Conference on Parallel Processing (2007)

Sequence alignment is a fundamental problem in the computational biology. Many alignment methods have been proposed in the literature, such as pair-wise sequence alignment (2SA), syntenic alignment, multiple sequence alignment (MSA) and constraint multiple sequence alignment, etc. Three-sequence alignment (3SA) problem has been proposed and discussed in the computational biology and proved that the alignment results from 3SA are better than those from 2SA under some conditions. However, 3SA problem is less discussed over the past decade due to the computer capability. 3SA problem now is worthy to discuss due to the powerful computer and more and more genome and protein sequences. In this paper, an efficient parallel algorithm (P3SA) is proposed to solve 3SA problem. The P3SA method requires O(n2/p) space complexity and O(n3/p) time complexity. The experimental results show that P3SA algorithm is applicable and achieves a satisfied speed-up.
ELLAM for resolving the kinematics of two-dimensional resistive magnetohydrodynamic flows
Authors: Jiangguo Liu, Simon Tavener, Hongsen Chen
Venue: Journal of Computational Physics (2007)

We combine the finite element method with the Eulerian-Lagrangian Localized Adjoint Method (ELLAM) to solve the convection-diffusion equations that describe the kinematics of magnetohydrodynamic flows, i.e., the advection and diffusion of a magnetic field. Simulations of three two-dimensional test problems are presented and in each case we analyze the energy of the magnetic field as it evolves towards its equilibrium state. Our numerical results highlight the accuracy and efficiency of the ELLAM approach for convection-dominated problems.
Formal verification of SystemC by automatic hardware/software partitioning
Authors: D. Kroening
Venue: Proceedings of the 2nd ACM/IEEE International Conference on Formal Methods and Models for Co-Design (2005)

Variants of general-purpose programming languages, like SystemC, are increasingly used to specify system designs that have both hardware and software parts. The system-level languages allow a flexible partitioning in the design of the hardware and software. Moreover, many properties depend on the combination of hardware and software and cannot be verified on either part alone. Existing tools either apply non-formal approaches or handle only the low-level parts of the language. This papers presents a new technique that handles both hardware and software parts of a system description. This is done by automatically partitioning the uniform system description into synchronous (hardware) and asynchronous (software) parts. This technique has been implemented and applied to system level descriptions of several industrial examples. The hardware/software partitioning improves the performance of the verification compared to the monolithic approach.