ppxscal/embedding_network huggingface dataset:
The physical mapping problem for parallel architectures
Authors: Lenwood S. Heath, Arnold L. Rosenberg, Bruce T. Smith
Venue: Journal of the ACM (JACM) (1988)

The problem of realizing an idealized parallel architecture on a (possibly fault-laden) physical architecture is studied. Our formulation performs the mapping in the light of the algorithm that one wants to implement on the idealized architecture. A version of the mapping algorithm suggested by the DIOGENES methodology for designing fault-tolerant VLSI processor arrays is settled definitely. Two quality metrics for mappings are considered, the first embodying an idealized notion of average delay, which relates to power consumption, and the second being the length of the longest run of wire. For the average-delay measure, four algorithms that optimally assign the m vertices of the embedded graph to the n fault-free processors that have been fabricated are presented. The most general algorithm makes no assumptions about the structure of the array or the physical format of the processors; it runs in time O(m &middot; (n - m)2). The other algorithms assume that the processors are laid out in such a way that interprocessor distances obey the triangle equality; they run in times ranging from time O(max{m, n - m} &middot; log min {m, n - m}) for certain array structures, including linear arrays, to time O(max{m, n - m}) for a narrow class of array structures, including pyramid arrays. For the max-wire-run cost measure, it is shown that the problem of finding cost-optimal vertex-to-processor assignments is NP-complete. However, an algorithm is presented that yields, in time O(m &middot; (n - m)2), vertex-to-processor assignments that are within a factor of 3 of optimal (they are optimal when the input graph-embedding is outplanar). This algorithm can easily be converted to one that yields, in time O(m &middot; (n - m)3), vertex-to-processor assignments that are within a factor of 2 of optimal. Finally, an algorithm that yields optimal assignments when the interprocessor distances obey the triangle equality is presented; this algorithm operates in time O(m &middot; (n - m) &middot; log(m &middot; (n - m)) &middot; log M), where M is the largest interprocessor distance.
Fujitsu automatic drawing input systems for the process industry
Authors: E. Takahashi
Venue: Proceedings of the 1987 Fall Joint Computer Conference on Exploring technology: today and tomorrow (1987)

As the use of CAD (Computer Aided Design) has been expanding recently, tasks to input designs and drawings into CAD systems have rapidly increased. Improvement of the man-machine interface is thus, required. Specifically, there has been increasing demand for a CAD system that can read a handwritten drawing, correctly interpret it, and be able to manipulate it. In response to such demand, we have developed an automatic drawing input system for P I (Piping and Instrument) diagrams that are used in the oil and petrochemical industry. This paper describes the devices we developed increasing the details of processing for vectorization and character and symbol recognition processing.
A fast shaded-polygon renderer
Authors: Roger W. Swanson, Larry J. Thayer
Venue: ACM SIGGRAPH Computer Graphics (1986)

Image rendering is the performance bottleneck in many computer-graphics systems today because of its computation-intensive nature. Described here is a one-chip VLSI implementation of a shaded-polygon renderer which provides an affordable solution to the bottleneck. The chip takes advantage of a unique extension to Bresenham's vector drawing algorithm [1] to interpolate four axes (for Red, Green, Blue and Z) across a polygon, in addition to the X and Y values. Its inherent accuracy and ease of high-speed hardware implementation distinguish this new algorithm from interpolation with incrementing fractions (DDA).This chip was designed as part of a workstation primarily for mechanical engineering CAD applications. The pipelining and internal bandwidth possible on the chip allows rendering speeds of over twelve-thousand, 1000-pixel, shaded polygons per second, suitable for interactive manipulation of solids. Described in this paper is the derivation of the new algorithm and its implementation in a pipelined, polygon-rendering chip.
OTM: Applying objects to tasks
Authors: John Hogg, Steven Weiser
Venue: Conference proceedings on Object-oriented programming systems, languages and applications (1987)

OTM is a concurrent object language presently being implemented at the University of Toronto. It provides a novel, simple and powerful way of structuring tasks or collections of operations. This paper describes the concurrency control features of OTM, which include external termination of tasks. An example demonstrates how the language can be used to cleanly and concisely control cooperating objects.
TRIP: an automated technology mapping system
Authors: S. Suzuki, T. Bitoh, M. Kakimoto, K. Takahashi, T. Sugimoto
Venue: Proceedings of the 24th ACM/IEEE Design Automation Conference (1987)

A technology mapping system, used for computer design in NEC, is presented. The features of this system are technology conversion and logical/physical optimization, based on a rule base, partitioning support, conversion verification and special layout consideration. This system is practically used for many applications for technology mapping, including redesigning an existing total unit into a new unit, based on up-to-date LSI technology. The resulting effect is quick inputting of integrated circuit technology progress into practical computer design area.
Concepts of the text editor Lara
Authors: J. Gutknecht
Venue: Communications of the ACM (1985)

Lara, a text editor developed for the Lilith workstation, exemplifies the principles underlying modern text-editor design: a high degree of interactivity, an internal data structure that mirrors currently displayed text, and extensive use of bitmap controlled displays and facilities.
Composing B&eacute;zier simplexes
Authors: Tony D. DeRose
Venue: ACM Transactions on Graphics (TOG) (1988)

This paper describes two algorithms for solving the following general problem: Given two polynomial maps f: Rn &map; RN and S RN &map; Rd in B&eacute;zier simplex form, find the composition map &Stilde; = S &deg; f in B&eacute;zier simplex form (typically, n &le; N &le; d &le; 3). One algorithm is more appropriate for machine implementation, while the other provides somewhat more geometric intuition. The composition algorithms can be applied to the following problems: evaluation, subdivision, and polynomial reparameterization of B&eacute;zier simplexes; joining B&eacute;zier curves with geometric continuity of arbitrary order; and the determination of the control nets of B&eacute;zier curves and triangular B&eacute;zier surface patches after they have undergone free-form deformations.
Roundtable: logic synthesis in design
Authors: Charles Radke
Venue: ACM SIGDA Newsletter (1988)

No doubt about it, logic synthesis has arrived, or so concludes our panel in this frank discussion of the strengths and weaknesses of actual systems. The roundtable begins with a brief look at the motivation for logic synthesis, continues with commentary on synthesizing control logic versus data flow logic, and then examines current systems and why they succeed.
Cache coherence protocols: evaluation using a multiprocessor simulation model
Authors: James Archibald, Jean-Loup Baer
Venue: ACM Transactions on Computer Systems (TOCS) (1986)

Using simulation, we examine the efficiency of several distributed, hardware-based solutions to the cache coherence problem in shared-bus multiprocessors. For each of the approaches, the associated protocol is outlined. The simulation model is described, and results from that model are presented. The magnitude of the potential performance difference between the various approaches indicates that the choice of coherence solution is very important in the design of an efficient shared-bus multiprocessor, since it may limit the number of processors in the system.
Performance evaluation of a temporal database management system
Authors: Ilsoo Ahn, Richard Snodgrass
Venue: ACM SIGMOD Record (1986)

A prototype of a temporal database management system was built by extending Ingres. It supports the temporal query language TQuel, a superset of Quel, handling four types of database static, rollback, historical and temporal. A benchmark set of queries was run to study the performance of the prototype on the four types of databases. We analyze the results of the benchmark, and identify major factors that have the greatest impact on the performance of the system. We also discuss several mechanisms to address the performance bottlenecks we encountered.
PowerMath: a system for the Macintosh
Authors: J. H. Davenport, C. E. Roth
Venue: Proceedings of the fifth ACM symposium on Symbolic and algebraic computation (1986)

PowerMath is a symbolic algebra system for the MacIntosh computer. This paper outlines the design decisions that were made during its development, and explains how the novel MacIntosh environment helped and hindered the development of the system. While the interior of PowerMath is fairly conventional, the user interface has many novel features. It is these that make PowerMath not just another micro-computer algebra system.
Systematic Unidirectional Error-Detecting Codes
Authors: Bella Bose, Der J. Lin
Venue: IEEE Transactions on Computers (1985)

The theory and design of systematic t-unidirectional error-detecting codes are developed. Optimal systematic codes capable of detecting 2, 3, and 6 unidirectional errors using 2, 3, and 4 check bits, respectively, are given. For r =5 where r is the number of check bits, the systematic codes described here can detect up to 5· 2r-4 + r -4 unidirectional errors. Encoding/ decoding methods for these codes are also investigated.
Illustrated description of an interactive knowledge based indexing system
Authors: S. Humphrey
Venue: Proceedings of the 10th annual international ACM SIGIR conference on Research and development in information retrieval (1987)

This report discusses the Indexing Aid Project for conducting research in interactive knowledge-based indexing of the medical literature. After providing an overview and background, we describe and illustrate the Indexing Aid System using an extended example, highlighting the knowledge-based capabilities of the system, namely, inheritance and internal retrieval, enforcement of restrictions, and other functions implemented by procedural attachments, which are characteristic of frame-based knowledge representation languages. A feature which generates reports for evaluating the system is also shown. The paper concludes with discussion of the research plan. The project is part of the Automated Classification and Retrieval Program at the Lister Hill National Center for Biomedical Communications, the research and development arm of the National Library of Medicine.
Is Ada an object oriented programming language?
Authors: H Touati
Venue: ACM SIGPLAN Notices (1987)

This article presents an argument and a counter-argument on Ada being an object oriented programming language, in the style of a famous classic author. This work was done as part of the final examination for an advanced Programming Language Design course taught by Professor Larry Rowe at UC Berkeley in Fall 1986.
Simplification of algebraic expression by multiterm rewriting rules
Authors: Tateaki Sasaki
Venue: Proceedings of the fifth ACM symposium on Symbolic and algebraic computation (1986)

In simplifying an algebraic expression, human often applies multiterm rewriting rules cleverly. This paper describes a simple multiterm rewriting algorithm which simulates human simplification naively. The algorithm is simple but seems to be quite useful for many applications.
The role and position of graphics in computer science education
Authors: Mark R. Ohlson
Venue: Proceedings of the seventeenth SIGCSE technical symposium on Computer science education (1986)

The SIGGRAPH Education Committee has been considering recommendations for inclusion of graphics in various curricula for higher education. Several issues of computer graphics in computer science or computer science/engineering curricula are identified here. In particular the course content and support facilities necessary and the status of graphics courses within programs are discussed. A basic premise is stated that Curriculum '78[1] and other guidelines[2, 3, 4, 5, 6] for educational programs are flawed in their lack of computer graphics content. The reasons for this are not immediately apparent, but might in part be attributed to the lower profile of graphics during the time of their initial development. Since that time the significant technical advancements and standardization of terms and concepts have not been incorporated as changes in recommended curricula designs.
Via minimization for gridless layouts
Authors: N. J. Naclerie, S. Masuda, K. Nakajima
Venue: Proceedings of the 24th ACM/IEEE Design Automation Conference (1987)

This paper describes a graph theoretic algorithm which, given a particular layout, finds a layer assignment that requires the minimum number of vias. The time complexity of the algorithm is &Ogr;(n3) where n is the number of routing segments in the given layout. Unlike previous algorithms, this algorithm does not require the layout to be grid based and places no constraints on the location of vias or the number of wires that may be joined at a single junction. The algorithm yields globally optimum results when the maximum junction degree is limited to three and has been fully implemented.
An object-oriented framework for interactive data graphics
Authors: Robert L. Young
Venue: ACM SIGPLAN Notices (1987)

Ida is an object-oriented framework for interactive data graphics. It can be used for independent data examination or integrated into application user interfaces. Ida's model of graphics is composed of five basic elements: Presentations, Assemblies, Data Sources, Data Displays, and Scales. Presentations and assemblies address display layout. A sharp distinction is maintained between drawing and the management of already drawn images. Data sources are responsible for drawing while data displays are image managers. Data displays are complex structures consisting of multiple layers that may be larger than the visible regions they underlie. Scales represent coordinate transformations. An object-oriented architecture proves valuable in supporting taxonomic hierarchies with inheritance, part-whole structures for composition, message passing implementation of graphic operations and late attribute binding.
Disaggregations in databases
Authors: Serge Abiteboul
Venue: Journal of the ACM (JACM) (1985)

An algebraic foundation of database schema design is presented. A new database operator, namely, disaggregation, is introduced. Beginning with &ldquo;free&rdquo; families, repeated applications of disaggregation and three other operators (matching function, Cartesian product, and selection) yield families of increasingly elaborate structure. In particular, families defined by one join dependency and several &ldquo;embedded&rdquo; functional dependencies can be obtained in this manner.
Multiattribute hashing using Gray codes
Authors: Christos Faloutsos
Venue: ACM SIGMOD Record (1986)

Multiattribute hashing and its variations have been proposed for partial match and range queries in the past. The main idea is that each record yields a bitstring @@@@ (&ldquo;record signature&rdquo;), according to the values of its attributes. The binary value (@@@@)2 of this string decides the bucket that the record is stored. In this paper we propose to use Gray codes instead of binary codes, in order to map record signatures to buckets. In Gray codes, successive codewords differ in the value of exactly one bit position, thus, successive buckets hold records with similar record signatures. The proposed method achieves better clustering of similar records and avoids some of the (expensive) random disk accesses, replacing them with sequential ones. We develop a mathematical model, derive formulas giving the average performance of both methods and show that the proposed method achieves 0% - 50% relative savings over the binary codes. We also discuss how Gray codes could be applied to some retrieval methods designed for range queries, such as the grid file [Nievergelt84a] and the approach based on the so-called z-ordering [Orenstein84a].
Software evolution: forging a paradigm
Authors: R. T. Yeh, T. A. Welch
Venue: Proceedings of the 1987 Fall Joint Computer Conference on Exploring technology: today and tomorrow (1987)

Traditionally there have been two alternative strategies for software development: phased refinement or evolutionary enhancement. In phased refinement, all system functionality is specified in the first step of development, and subsequent implementation phases add proscribed design details. This is the standard for formalized methodologies, such as the waterfall model underlying Dod standards. The evolution model, conversely, assumes that system functionality cannot be specified correctly initially, and it provides for incremental build-up of functionality. The phased refinement approach is criticized for its high cost of maintenance, for poor motivation of system developers doing abstract tasks in early phases of development, and for complication of system integration. The evolutionary approach is criticized for producing poorly structured software, which can lead to problems in error handling, project management, and errors from modifications. This paper describes an evolution approach which seeks to avoid there pitfalls.
Polynomial-time algorithm for the orbit problem
Authors: R. Kannan, R. J. Lipton
Venue: Journal of the ACM (JACM) (1986)

The accessibility problem for linear sequential machines [12] is the problem of deciding whether there is an input x such that on x the machine starting in a given state q1 goes to a given state q2. Harrison shows that this problem is reducible to the following simply stated linear algebra problem, which we call the "orbit problem": Given (n, A, x, y), where n is a natural number and A, x, and y are nxn, nx1, and nx1 matrices of rationals, respectively, decide whether there is a natural number I such that Aix=y. He conjectured that the orbit problem is decidable. No progress was made on the conjecture for ten years until Shank [22] showed that if n is fixed at 2, then the problem is decidable. This paper shows that the orbit problem for general n is decidable and indeed decidable in polynomial time. The orbit problem arises in several contexts; two of these, linear recurrences and the discrete logarithm problem for polynomials, are discussed, and we apply our algorithm for the orbit problem in these contexts.
The art and science of visualizing data
Authors: Karen A. Frenkel
Venue: Communications of the ACM (1988)

"I manipulate the laser," the artist said, having exploited laboratory equipment. "This is a parallel pipeline systolic SIMD engine we call the 'Jell-O Engine,'" the animator/straight man announced, but not until he had decimated the practice of ray tracing. And officials from supercomputer centers declared the visualization of scientific data would define a new field, a revolutionary way of doing science.
Recovery management in QuickSilver
Authors: R. Haskin, Y. Malachi, W. Sawdon, G. Chan
Venue: Proceedings of the eleventh ACM Symposium on Operating systems principles (1987)

One price of extensibility and distribution, as implemented in QuickSilver, is a more complicated set of failure modes, and the consequent necessity of dealing with them. In traditional operating systems, services (e.g., file, display) are intrinsic pieces of the kernel. Process state is maintained in kernel tables, and the kernel contains explicit cleanup code (e.g., to close files, reclaim memory, and get rid of process images after hardware or software failures). QuickSilver, however, is structured according to the client-server model, and as in many systems of its type, system services are implemented by user-level processes that maintain a substantial amount of client process state. Examples of this state are the open files, screen windows, address space, etc., belonging to a process. Failure resilience in such an environment requires that clients and servers be aware of problems involving each other. Examples of the way one would like the system to behave include having files closed and windows removed from the screen when a client terminates, and having clients see bad return codes (rather than hanging) when a file server crashes. This motivates a number of design goals:Properly written programs (especially servers) should be resilient to external process and machine failures, and should be able to recover all resources associated with failed entities.Server processes should contain their own recovery code. The kernel should not make any distinction between system service processes and normal application processes. To avoid the proliferation of ad-hoc recovery mechanisms, there should be a uniform system-wide architecture for recovery management.A client may invoke several independent servers to perform a set of logically related activitites (a unit of work) that must execute atomically in the presence of failures, that is, either all the related activities should occur or none of them should. The recovery mechanism should support this.In QuickSilver, recovery is based on the database notion of atomic transactions, which are made available as a system service to be used by other, higher-level servers. This allows meeting all the above design goals. Software portability is important in the QuickSilver environment, dictating that transaction-based recovery be accessible to conventional programming languages rather than a special-purpose one such as Argus [Liskov84]. To accommodate servers with diverse recovery demands, the low-level primitives of commit coordination and log recovery are exposed directly rather than building recovery on top of a stable-storage mechanism such as in CPR [Attanasio87] or recoverable objects such as those in Camelot [Spector87] or Clouds [Allchin McKendry83].
Moving a polygon around the corner in a corridor
Authors: S Maddila, C K Yap
Venue: Proceedings of the second annual symposium on Computational geometry (1986)

We consider the problem of moving an n vertex simple polygon around a corner in a right-angular corridor. We give an &Ogr;(n log n) algorithm for a convex polygon which constructs a motion of the polygon when one exists; otherwise it reports that none exists. In the case of non-convex polygons, we have an &Ogr;(n2) time algorithm.
The equivalence problem for real-time DPDAs
Authors: Michio Oyamaguchi
Venue: Journal of the ACM (JACM) (1987)

The equivalence problem for deterministic real-time pushdown automata is shown to be decidable. This result is obtained by showing that Valiant's parallel stacking technique using a replacement function introduced in this paper succeeds for deterministic real-time pushdown automata. Equivalence is also decidable for two deterministic pushdown automata, one of which is real-time.