ppxscal/embedding_network huggingface dataset:
Orienting rewrite rules with the Knuth--Bendix order
Authors: Konstantin Korovin, Andrei Voronkov
Venue: Information and Computation (2003)

We consider two decision problems related to the Knuth-Bendix order (KBO). The first problem is orientability: given a system of rewrite rules R, does there exist an instance of KBO which orients every ground instance of every rewrite rule in R. The second problem is whether a given instance of KBO orients every ground instance of a given rewrite rule. This problem can also be reformulated as the problem of solving a single ordering constraint for the KBO. We prove that both problems can be solved in the time polynomial in the size of the input. The polynomial-time algorithm for orientability builds upon an algorithm for solving systems of homogeneous linear inequalities over integers. We show that the orientability problem is P-complete. The polynomial-time algorithm for solving a single ordering constraint does not need to solve systems of linear inequalities and can be run in time O(n2). Also we show that if a system is orientable using a real-valued instance of KBO, then it is also orientable using an integer-valued instance of KBO. Therefore, all our results hold both for the integer-valued and the real-valued KBO.
Ciw Internetworking Professional Study Guide, 1 edition
Authors: Patrick T. Lane, Rod Hauser
Venue:  (2002)

:Here's the book you need to prepare for Exam 1D0-460, CIW Internetworking Professional. This Study Guide provides: In-depth coverage of official exam objectives Practical information on internetworking technologies Hundreds of challenging review questions, in the book and on the CD Leading-edge exam preparation software, including a testing engine and electronic flashcards Authoritative coverage of all exam topics, including: Defining the Internet infrastructure and key internetworking protocols Understanding routing processes Working with application layer protocolsHTTP, FTP, SMTP, and SNMP Analyzing BOOTP and the DHCP servers and clients Using exterior protocols and gateways Working with network troubleshooting tools Comparing and contrasting IPv4 and IPv6 Featured on the CD The enclosed CD is packed with vital preparation tools and materials, beginning with the Sybex EdgeTest testing engine for the exam. Loaded with hundreds of practice questions, it lets you test yourself chapter by chapter or according to objective areas. You'll also find electronic flashcards for PCs and Palm handhelds, along with two bonus exams that will help you prepare for the test. Also included is a complete electronic version of the book. About the Authors Patrick T. Lane is the Director of Courseware for ProsoftTraining. He assisted in the creation of the CIW program and the i-Accelerate program for Intel, Novell and Microsoft professionals. Rod Hauser is a Certified Information Systems Security Professional and Linux Certified Administrator with more than ten years ofexperience administering computer systems and networks.
Virtual simple architecture (VISA): exceeding the complexity limit in safe real-time systems
Authors: Aravindh Anantaraman, Kiran Seth, Kaustubh Patil, Eric Rotenberg, Frank Mueller
Venue: Proceedings of the 30th annual international symposium on Computer architecture (2003)

Meeting deadlines is a key requirement in safe realtime systems. Worst-case execution times (WCET) of tasks are needed for safe planning. Contemporary worst-case timing analysis tools can safely and tightly bound execution time on in-order single-issue pipelines with caches and static branch prediction. However, this simple pipeline appears to be a complexity limit, due to the need for analyzability. This excludes a whole class of high-performance processors from many embedded systems.We reconcile the complexity/safety trade-off by decoupling worst-case timing analysis from the processor implementation, through a virtual simple architecture (VISA). A VISA is the timing specification of a hypothetical simple pipeline and is the basis for worst-case timing analysis. However, the underlying microarchitecture can be arbitrarily complex. A task is divided into multiple sub-tasks which provide a means to gauge progress on the complex pipeline. Each sub-task is assigned an interim deadline, or checkpoint, based on the latest allowable completion time of the sub-task on the hypothetical simple pipeline. If no checkpoints are missed, then the complex pipeline is as timely as the safe pipeline. If a checkpoint is missed, the pipeline switches to a simple mode of operation that directly implements the VISA so that execution time of unfinished sub-tasks is safely bounded. The significance of our approach is that we circumvent worst-case timing analysis of the complex pipeline, by dynamically confirming its behavior is bounded by worst-case timing analysis of a simpler proxy pipeline.The benefit of using a high-performance processor is that tasks finish much sooner than they would have on an explicitly-safe processor. The new slack in the schedule can be exploited for higher throughput or lower power. With the VISA approach, an arbitrarily complex SMT processor can safely run non-real-time tasks at the same time as a real-time task. Alternatively, frequency/voltage can be safely lowered to take up slack. We explore the latter application and show a VISA-compliant complex pipeline consumes 43--61% less power than an explicitly-safe pipeline.
On the distributed fault diagnosis of computer networks
Authors: S. Chutani, H. J. Nussbaumer
Venue: Proceedings of the IEEE Symposium on Computers and Communications (ISCC'95) (1995)

We propose a general technique for the fault diagnosis of communication networks that is inspired by the theory of system-level diagnosis. This technique relies on the paradigm of comparison testing. A set of tasks, possibly implicit, is executed by the nodes in a network. The resulting agreements and disagreements in their results are used to diagnose all the faulty nodes and links with a high probability. The diagnosis algorithm proposed is applicable in a centralized as well as a distributed system. The accuracy of the diagnosis is controlled by the number of rounds of tasks performed.
On the numerical solution of (lambda^2 A + lambda B + C) x = b and application to structural dynamics
Authors: V. Simoncini, F. Perotti
Venue:  (2000)

In this paper we address the numerical solution of a large linear system depending quadratically on a parameter that varies in a wide range. We analyze a solution method, whose computational cost grows only sublinearly with the number of parameters, that relies on the use of an indefinite inner product. Several implementation aspects are treated in detail. The problem arises in various application areas: we shall report on our experience with cases in structural dynamics. TEL:: +39 0382 548218 EMAIL:: val@dragon.ian.pv.cnr.it
Object Identity As A Query Language Primitive
Authors: Serge Abiteboul, Paris Kanellakis
Venue:  (1989)

We demonstrate the power of object identities (oid''s) as a database query language primitive. We develop an object-based data model whose structural part generalizes most of the known complex-object data models: cyclicity is allowed in both its schemas and its instances. Our main contribution is the operational part of the data model, the query language IQL, which uses oid''s for three critical purposes: (1) to represent data structures with sharing and cycles, (2) to manipulate sets and (3) to express any computable database query. IQL can be statically type checked, can be evaluated bottom-up and naturally generalizes most popular rule-based languages. The model can also be extended to incorporate type inheritance, without changes to IQL. Finally, we investigate an analogous value-based data model whose structural part is founded on regular infinite trees and whose operational part is IQL.
Q-Tree: A New Iterative Improvement Approach for Buffered Interconnect Optimization
Authors: Andrew B. Kahng, Bao Liu
Venue: Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI'03) (2003)

The "chicken-egg" dilemma between VLSI interconnecttiming optimization and delay calculation suggests an iterative approach. We separate interconnect timing transformation as Hanan grafting and non-Hanan sliding, andreveal generally negligible contribution of non-Hanan sliding. We propose a greedy iterative interconnect timing optimization algorithm called Q-Tree. Our experimental resultsshow that Q-Tree starting with Steiner minimumtree topologies achieves better timing performance than C-Tree [1],PER-Steiner [5] and BA-Tree [14] algorithms. Also, executing Q-Tree starting with BA-Tree or P-Tree [13] topologies can achieve better timing performance, especially, withshorter wires and fewer buffers. In general, Q-Tree canbe applied to any interconnect tree for further timing performance improvement, with practical instance sizes andeasily-extended functionality -e.g., with buffer station androuting obstacle avoidance consideration.
Set-valued functions and regularity
Authors: N. Takagi, Y. Nakamura, K. Nakashima
Venue: Proceedings of the 27th International Symposium on Multiple-Valued Logic (1997)

In this paper, we focus on regularity and set-valued functions. The regularity was first introduced by S.C. Kleene (1952) into the propositional connectives of a ternary logic. Then, M. Mukaidono (1986) expanded the regularity of Kleene into n-variable ternary functions, and a ternary function which is regular is called a regular ternary logic function. Some studies expanded regular ternary logic functions into /spl tau/-valued functions, and studied properties of them. In this paper, we propose another extension of the concepts of the regularity in the sense of Kleene and Mukaidono. That is, we introduce regularity into r-valued set-valued functions. Further, we give properties of the set-valued functions with the regularity.
On the Design of Network Routers for Multimedia Applications
Authors: Juan M. Orduña, José Duato
Venue: Proceedings of the 1998 International Conference on Parallel Processing Workshops (1998)

Parallel computing systems based on high-performanceinterconnection networks are being used nowadays for onlinemultimedia applications. The potential market of suchapplications seems to be large enough to justify a specificarchitecture oriented to support them. Wave switching isa hybrid switching technique for high performance routerswhich combines wormhole switching and circuit switchingin the same router architecture. In this paper, we proposethe use of wave switching in parallel computing systemsfor applications like distributed multimedia systems ormulticomputer-based databases. These applications generatean intensive, bursty traffic together with a small percentageof control message traffic. For this kind of traffic,wave switching can considerably improve the throughput ofa parallel computing system. Performance evaluation resultsshow a drastic reduction in latency and an improvementin throughput with regard to networks with the same channelwidth using wormhole switching.
Dynamically Reconfigurable Embedded Software - Does It Make Sense?
Authors: David B. Stewart, G. Arora
Venue: Proceedings of the 2nd IEEE International Conference on Engineering of Complex Computer Systems (1996)

A dynamically reconfigurable real-time software (DRRTS) paradigm can be used effectively in the design of embedded systems to provide many major advantages over conventional software development techniques. The benefits include rapid development which reduces development time and cost, ability to easily upgrade and maintain embedded software, and both analytic and practical tools for automated analysis and systematic fine tuning of the embedded system. Our current research is founded upon the Chimera Methodology, which demonstrated the feasibility of using dynamically reconfigurable software to control robots. However, there are still many design challenges in order to use it in an embedded system, which has less flexibility, severe limits on memory and CPU bandwidth, and more rigid timing constraints and reliability specifications. We have several ongoing projects which address some of the issues, in a strive towards the overall objective of creating a software infrastructure for developing dynamically reconfigurable embedded software.
Reliability Evaluation for Integrated Circuit with Defective Interconnect under Electromigration
Authors: Xiangdong Xuan, Adit D. Singh, Abhijit Chatterjee
Venue: Proceedings of the 4th International Symposium on Quality Electronic Design (2003)

In electromigration degradation process the existingphysical defects on interconnect play a critical role bysignificantly accelerating the EM damage underincreased current density and elevated temperature. Inthis work the simulation models were upgraded in the ICreliability simulator ARET to incorporate the effect ofinterconnect physical defects in expected lifetimeprediction. Then based on the statistical approach, aprobability model was developed to evaluate the system-levelcircuit reliability with defective interconnect underEM degradation. The probability model has beensuccessfully implemented in ARET tool to simulate andevaluate both interconnect and circuit level reliabilities.
Study of double Hopf bifurcation and chaos for an oscillator with time delayed feedback
Authors: P. Yu, Y. Yuan, J. Xu
Venue: Communications in Nonlinear Science and Numerical Simulation (2002)

This paper is concerned with the effect of time delayed feedbacks in a nonlinear oscillator with external forcing. The particular attention is focused on the case that the corresponding linear system has two pairs of purely imaginary eigenvalues at a critical point, giving rise to double Hopf bifurcations. An analytical approach is used to find the explicit expressions for the critical values of the system parameters at which nonresonant or resonant Hopf bifurcations may occur. A fourth-order Ronge-Kutta numerical integration scheme is employed to obtain the dynamical solutions in the vicinity of the critical point. Both the cases with and without the external forcing are studied. It has been found that the system exhibits very rich complex dynamics, including periodic, quasi-periodic and chaotic motions. Moreover, a sensitivity analysis is carried out to show that chaotic motions are very sensitive to the time delay. This suggests that the time delay can be used: (1) to control bifurcations and chaos; and (2) to anticontrol (or generate) bifurcations and chaos.
Surviving Unemployment in the High-Tech Downturn
Authors: Stephen Blanchette Jr.
Venue: Computer (2003)

If your career has progressed relatively undisturbed until now, you probably haven't thought much about being unemployed. However, being prepared for unemployment could be as important as any other career management activity. The author offers tips that can be helpful for those who are newly unemployed--or are proactively considering the possibility. Although falling victim to downsizing or company failure will still be traumatic, knowing what to expect can help to prepare for treating the situation as an adventure, not a catastrophe.
An Implementation of Prepaid Service in CDMA PCS System
Authors: S. Dokko, J. Jeon, Y. Kim
Venue: Proceedings of the 7th IEEE International Conference on Networks (1999)

Even though the number of wireless mobile subscribers is remarkably increasing, service providers lost billions of dollars each year unnecessarily to fraud, bad debt and billing expenses. An effective way to protect profits is to require prepayment for services. This paper describes a prepaid call control scheme which is implemented in CDMA PCS system. In order to accomplish the seamless integration, we have tried to minimize the interference with the existing system. The system configuration for prepaid service and the functions performed by the system components are presented. Then the call scenarios are explained in detail and some considerations for implementation are mentioned. Finally, the brief evaluation and the remaining problems are discussed as a conclusion.
Notational Definition and Top-Down Refinement for Interactive Proof Development Systems
Authors: Timothy G. Griffin
Venue:  (1988)

This thesis is concerned with issues related to the design and implementation of systems that support interactive proof development. The goal is to provide logic-independent frameworks that can be used in the design and implementation of component parts for such systems. In particular, this thesis will focus on two frameworks: a language-independent account of notational definition and a logic-independent account of a structure-oriented approach to the interactive construction of goal-directed proofs. These particular concerns were inspired and motivated by the Nuprl proof development system. However, the results presented in this thesis are meant to be applicable to a wide class of logics. The formal account of notational definition begins with the presentation of a simply typed $\lambda$-calculus together with a method of representing expressions in a given language $\cal L$ as $\lambda$-expressions. The $\lambda$-calculus has a very simple abbreviative mechanism that allows a new constant, introduced by means of a $\delta$-equation, to represent a closed expression. A new construct, called a $\Delta$-equation, is introduced. It provides a higher-level means of introducing new notations that is close to the conventional style of definition. A $\Delta$-equation is given meaning by a translation into a simple $\delta$-equation. The implementation of mechanisms that support notational definitions in interactive proof development systems as well as applications to Nuprl are discussed. The second part of the thesis presents a logic-independent framework for top-down proof development called abstract refinement. Rather than presenting, as is done for Nuprl, refinement and refinement rules as primitive notions that are extended by grafting on tactics, tactics are instead viewed as the basic notion from which refinement trees arise as tree-structured representations of the iterated composition of tactics. This is accomplished with the definition of a new construct called a tactic tree that extends the LCF tactics framework in a natural way. Several examples of proof development using tactic trees are presented. One example demonstrates that the refinement rules and the extraction mechanism of Nuprl can be modeled in this framework.
Applying Testability to Reliability Estimation
Authors: Mark C. K. Yang, W. Eric Wong, Alberto Pasquini
Venue: Proceedings of the The Ninth International Symposium on Software Reliability Engineering (1998)

The purpose of this report is to implement the idea of using testability to estimate software reliability. The basic steps involve estimating testability, evaluating how well software was written, and assessing the effectiveness of testing. Results from these steps along with operational profiles are used to estimate software reliability. This paper describes an application of this method to evaluate the reliability of a real software system of about 6000 lines of executable code and discusses the results of such an estimation. The results are also compared with those obtained by using two reliability growth models.
Pseudorandom functions in TC0 and cryptographic limitations to proving lower bounds
Authors: Matthias Krause, Stefan Lucks
Venue: Computational Complexity (2002)

This paper investigates which complexity classes inside NC can contain pseudorandom function generators (PRFGs). Under the Decisional Diffie-Hellman assumption (a common cryptographic assumption) TC40 contains PRFGs. No lower complexity classes with this property are currently known. On the other hand, we use effective lower bound arguments to show that some complexity classes cannot contain PRFGs. This provides evidence for the following conjecture: Any effective lower bound argument for a complexity class can be turned into an efficient distinguishing algorithm which proves that this class cannot contain PRFGs.
BaLinda: a simple parallel programming model with active objects
Authors: C. K. Yuen, M. D. Feng
Venue: Proceedings of the 1997 International Symposium on Parallel Architectures, Algorithms and Networks (1997)

This paper presents the BaLinda model, based on last in/first out threads that interact via a shared tuplespace, and discusses the idea of using function based objects as the basic unit of parallel execution, and the hierarchical structure to partition tuplespaces. It is argued that the two-level parallel execution, both within and between objects, are well suited to scalable parallel platforms with shared memory nodes connected by high speed networks.
Information Visualization in Aid of Construction Project Cash Flow Management
Authors: Farzad Khosrowshahi
Venue: Proceedings of the International Conference on Information Visualisation (2000)

Any negotiation involves consideration of several variables, which act independently, and collectively to determine the configuration of alternative outcomes. The numerical analysis of alternative options can be a tedious and lengthy exercise, thus inhibiting the negotiator from making informed decisions and indeed achieving the optimum benefit. Construction Project financial management is an example where all related variables are up for negotiation between the main parities: the client, contractor and sub-contractors.This paper builds on the works previously introduced at IV conferences where the potential of the visual approach to the analysis of growth patterns was illustrated and the respective mathematical expressions were introduced. The current paper collates these works into a conclusive visual method for instantaneous analysis of several variables that are influential in configuring construction project finance, thus preparing the contractor for informed negotiation with other parties.
Buffer Management as Inventory Control
Authors: Ozalp Babaoglu
Venue:  (1984)

We consider computer subsystems that use buffering as a mechanism to enhance communication performance between two or more components exhibiting a short-term speed mismatch. Often, a fixed size buffer is inserted in such a communication path since it can improve performance by dampening speed variations. We formalize this buffer management problem within the framework of inventory control theory. We show that among all admissible policies for controlling such communications, the structure of the optimal one is analogous to the reorder point/order up to level policy that arises in the single commodity, continuous review, inventory control problem. This confirms the appropriateness of the intuitive and often-used high water mark/low water mark policy for buffer management. Given this policy structure, we derive expressions for the optimal parameter values. We discuss extensions of these results whereby policy parameters are dynamically estimated based on current observations of the communication characteristics. An algorithm to generate the optimal ordering decisions (and resulting costs) when communication patterns are known a priori is developed as a useful benchmark for evaluating the goodness of on-line policies.
Dreamweaver 4,Fireworks 4 Y Flash 5: Tres Libros En Uno
Authors: Adrian Sibar, German Barraza
Venue:  (2002)

:This computer reference presents three of the most popular Macromedia applications-Dreamweaver 4, Fireworks 4, and Flash 5. It provides information about every tool and the new technology available for creating more sophisticated Web sites. It is written for the user who is familiar with HTML.Author Biography: Adri&aacute;n Sibar is a graphic designer and an animation artist. Germ&aacute;n Barraza is a Web designer.