ppxscal/embedding_network huggingface dataset:
Techniques for obtaining high performance in Java programs
Authors: Iffat H. Kazi, Howard H. Chen, Berdenia Stanley, David J. Lilja
Venue: ACM Computing Surveys (CSUR) (2000)

This survey describes research directions in techniques to improve the performance of programs written in the Java programming language. The standard technique for Java execution is interpretation, which provides for extensive portability of programs. A Java interpreter dynamically executes Java bytecodes, which comprise the instruction set of the Java Virtual Machine (JVM). Execution time performance of Java programs can be improved through compilation, possibly at the expense of portability. Various types of Java compilers have been proposed, including Just-In-Time (JIT) compilers that compile bytecode into native processor instructions on the fly; direct compilers that directly translate the Java source code into the target processor's native language; and bytecode-to-source translators that generate either native code or an intermediate language, such as C, from the bytecodes. Additional techniques, including bytecode optimization, dynamic compilation, and executing Java programs in parallel, attempt to improve Java run-time performance while maintaining Java's portability. Another alternative for executing Java programs is a Java processor that implements the JVM directly in hardware. In this survey, we discuss the basis features, and the advantages and disadvantages, of the various Java execution techniques. We also discuss the various Java benchmarks that are being used by the Java community for performance evaluation of the different techniques. Finally, we conclude with a comparison of the performance of the alternative Java execution techniques based on reported results.
Inhabited television: broadcasting interaction from within collaborative virtual environments
Venue: ACM Transactions on Computer-Human Interaction (TOCHI) (2000)

Inhabited television combines collaborative virtual environments (CVEs) with broadcast television so that on-line audiences can participate in television shows within shared virtual worlds. We describe a series of experiments with inhabited television, beginning with the NOWninety6 poetry performance, The Mirror, and Heaven Hell&mdash;Live. These early experiments raised fundamental questions for inhabited television concerning the extent to which it is possible to establish fast-paced social interaction within a CVE, and to which it is possible to produce a coherent and engaging broadcast of this action. We then present a fourth more recent experiment, Out of This World, that directly addressed these questions. We describe how the formulation of inhabited television design principles, combined with the use of dedicated production software for scripting and directing a show and for controlling virtual cameras, enabled us to create a fast-moving and more coherent experience.
Efficient and flexible value sampling
Authors: M. Burrows, U. Erlingsson, S.-T. A. Leung, M. T. Vandevoorde, C. A. Waldspurger, K. Walker, W. E. Weihl
Venue: ACM SIGPLAN Notices (2000)

This paper presents novel sampling-based techniques for collecting statistical profiles of register contents, data values, and other information associated with instructions, such as memory latencies. Values of interest are sampled in response to periodic interrupts. The resulting value profiles can be analyzed by programmers and optimizers to improve the performance of production uniprocessor and multiprocessor systems.Our value sampling system extends the DCPI continuous profiling infrastructure, and inherits many of its desirable properties: our value profiler has low overhead (approximately 10% slowdown); it profiles all the code in the system, including the operating system kernel; and it operates transparently, without requiring any modifications to the profiled code.
Using visualization tools to teach compiler design
Authors: Steven R. Vegdahl
Venue: Journal of Computing Sciences in Colleges (2001)

A project-based compiler course presents several challenges to the student-implementor. In addition to the &ldquo;book learning about&rdquo; various compiler topics, a student must assimilate a large amount of information about the compiler's implementation. Furthermore he or she must be able understand each source-program construct at a number of different representation levels. Finally, the student must apply that knowledge during implementation and debugging of a compiler. This paper describes a pair of packages that employ Java's graphical capabilities so that a program may be visualized at various stages of the compilation process. We argue that these tools are effective in helping students understand the transformation process from source program to machine code. We summarize our experience in using these tools in the context of a project-based compiler course. We also discuss other features of Java that make it well-suited for a student compiler project.
Proving the Correctness of the Standardized Algorithm for ABR Conformance
Authors: Jean-François Monin
Venue: Formal Methods in System Design (2000)

Conformance control for ATM cells is based on a real-time reactive algorithm which delivers a value depending on inputs from the network. This value must always fit with a well defined theoretical value. We present here the correctness proof of the algorithm standardized for the ATM transfer capability called ABR. The proof turned out to produce a key argument during the standardization process of ABR.
Convergence of Delayed Dynamical Systems
Authors: Tianping Chen
Venue: Neural Processing Letters (1999)

In this paper, we point out that the conditions given in [1] are sufficient but unnecessary for the global asymptotically stable equilibrium of a class of delay differential equations. Instead, we prove that under weaker conditions, it is still global asymptotically stable.
Multi-Frame Estimation of Planar Motion
Authors: Lihi Zelnik-Manor, Michal Irani
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (2000)

Traditional plane alignment techniques are typically performed between pairs of frames. In this paper, we present a method for extending existing two-frame planar motion estimation techniques into a simultaneous multi-frame estimation, by exploiting multi-frame subspace constraints of planar surfaces. The paper has three main contributions: 1) we show that when the camera calibration does not change, the collection of all parametric image motions of a planar surface in the scene across multiple frames is embedded in a low dimensional linear subspace; 2) we show that the relative image motion of multiple planar surfaces across multiple frames is embedded in a yet lower dimensional linear subspace, even with varying camera calibration; and 3) we show how these multi-frame constraints can be incorporated into simultaneous multi-frame estimation of planar motion, without explicitly recovering any 3D information, or camera calibration. The resulting multi-frame estimation process is more constrained than the individual two-frame estimations, leading to more accurate alignment, even when applied to small image regions.
A Fault Tolerant Technique for FPGAs
Authors: John M. Emmert, Dinesh K. Bhatia
Venue: Journal of Electronic Testing: Theory and Applications (2000)

In this paper we present a fault tolerant (FT) technique for field programmable gate arrays (FPGAs) that is based on incrementally reconfiguring circuits and applications that have been previously placed and routed. Our technique targets both logic faults and interconnect faults, and our algorithms can be applied to either static or run-time reconfigurable FPGAs. The algorithm for reconfiguring designs in the presence of logic faults uses a matching technique. The matching technique requires no preplaced, spare logic resources and is capable of handling groups of faults. Experimental results indicate there is little or no impact on circuit performance for low numbers of reconfigured logic blocks. For interconnect faults, we present a rip-up and reroute strategy. Our strategy is based on reading back the FPGA configuration memory, so no netlist is required for rerouting around faulty resources. Experimental results indicate high incremental routability for low numbers of interconnect faults. We also lay the foundation for applying our approach to yield enhancement.
Towards understanding the predictability of stock markets from the perspective of computational complexity
Authors: James Aspnes, David F. Fischer, Michael J. Fischer Ming-Yang Kao, Alok Kumar
Venue: Proceedings of the twelfth annual ACM-SIAM symposium on Discrete algorithms (2001)

This paper initiates a study into the century-old issue of market predictability from the perspective of computational complexity. We develop a simple agent-based model for a stock market where the agents are traders equipped with simple trading strategies, and their trades together determine the stock prices. Computer simulations show that a basic case of this model is already capable of generating price graphs which are visually similar to the recent price movements of high tech stocks. In the general model, we prove that if there are a large number of traders but they employ a relatively small number of strategies, then there is a polynomial-time algorithm for predicting future price movements with high accuracy. On the other hand, if the number of strategies is large, market prediction becomes complete in two new computational complexity classes CPP and BCPP, where PNP[&Ogr;(log n)] e BCPP e CPP = PP. These computational completeness results open up a novel possibility that the price graph of a actual stock could be sufficiently deterministic for various prediction goals but appear random to all polynomial-time prediction algorithms.
A practical methodology for early buffer and wire resource allocation
Authors: Charles J. Alpert, Jiang Hu, Sachin S. Sapatnekar, Paul Villarrubia
Venue: Proceedings of the 38th annual Design Automation Conference (2001)

The dominating contribution of interconnect to system per-formance has made it critical to plan for buffer and wiring resources in the layout. Both buffers and wires must be con-sidered, since wire routes determine buffer requirements and buffer locations constrain wire routes. In contrast to recent buffer block planning approaches, our design methodology distributes buffer sites throughout the layout. A tile graph is used to abstract the buffer planning problem while also addressing wire planning. We present a four-stage heuristic called RABID for resource allocation and experimentally verify its effectiveness.
A Small-Sample Correction for Testing for Joint Serial Correlation with Artificial Regressions
Authors: David A. Belsley
Venue: Computational Economics (2000)

Prior research (Belsley, 1997) has established that the common tests for single orders of serial correlation (e.g., Durbin&ndash;Watson, artificial regression) are badly distorted and result in grossly misleading tests in small samples. A corrected t-statistic has been derived that removes these difficulties, but it cannot be applied to joint tests. This research provides the needed generalizations. First it shows, to no surprise, that the same distortions plague the F-statistic typically used for testing joint orders of serial correlation with artificial regressions. And second it derives a corrected F-statistic that provides acceptable tests for arbitrarily stipulated joint orders of serial correlation. The test procedure is detailed and exemplar code provided.
Bridging Faults in Pipelined Circuits
Authors: M. Favalli, C. Metra
Venue: Journal of Electronic Testing: Theory and Applications (2000)

This paper analyzes the detectability of resistive bridging faults in CMOS (micro)-pipelined circuits. Logic and electrical level detection conditions are provided for functional and Iddq testing techniques. The kind of operations and the sensitivity to dynamic fault effects of pipelined circuits make such conditions more complex than in the combinational case. In particular, it is shown that the kind of used latches has a relevant impact on fault coverage, and should be carefully accounted in test generation and fault simulation. Finally, guidelines are drawn for the extension of combinational test generation and fault simulation algorithms to the considered case.
Xor-trees for efficient anonymous multicast and reception
Authors: Shlomi Dolev, Rafail Ostrobsky
Venue: ACM Transactions on Information and System Security (TISSEC) (2000)

We examine the problem of efficient anonymous multicast and reception in general communication networks. We present algorithms that achieve anonymous communication, are protected against traffic analysis, and require O(1) amortized communication complexity on each link and low computational comlexity. The algorithms support sender anonymity, receiver(s) anonymity, or sender-receiver anonymity.
Textual Data Mining to Support Science and Technology Management
Authors: Paul Losiewicz, Douglas W. Oard, Ronald N. Kostoff
Venue: Journal of Intelligent Information Systems (2000)

This paper surveys applications of data mining techniques to large text collections, and illustrates how those techniques can be used to support the management of science and technology research. Specific issues that arise repeatedly in the conduct of research management are described, and a textual data mining architecture that extends a classic paradigm for knowledge discovery in databases is introduced. That architecture integrates information retrieval from text collections, information extraction to obtain data from individual texts, data warehousing for the extracted data, data mining to discover useful patterns in the data, and visualization of the resulting patterns. At the core of this architecture is a broad view of data mining&mdash;the process of discovering patterns in large collections of data&mdash;and that step is described in some detail. The final section of the paper illustrates how these ideas can be applied in practice, drawing upon examples from the recently completed first phase of the textual data mining program at the Office of Naval Research. The paper concludes by identifying some research directions that offer significant potential for improving the utility of textual data mining for research management applications.
SETI@HOME&mdash;massively distributed computing for SETI
Authors: Dan Werthimer, Jeff Cobb, Matt Lebofsky, David Anderson, Eric Korpela
Venue: Computing in Science and Engineering (2001)

Since radio's earliest days, people have considered the possibility of detecting signals from an extraterrestrial civilization-and since the advent of radio astronomy, the tools to perform such a search have existed. Starting in the late 1950s, researchers have been performing progressively more sensitive searches, but each search has been limited by the technologies available at the time. As radio frequency technologies have become more efficient and computers have become faster, the searches have grown larger and more sensitive. The SETI@home project, managed by a group of researchers at the Space Sciences Laboratory of the University of California, Berkeley, is the first attempt to use large-scale distributed computing to perform a sensitive search for radio signals from extraterrestrial civilizations.
Parallel implementation of an efficient microcode compaction algorithm
Authors: S. Upendra Rao, G. P. Shattacharjee, A. K. Majumdar
Venue: ACM SIGMICRO Newsletter (1986)

A derivation of parallel implementation of an efficient microcode compaction algorithm has been described. The serial algorithm is decomposed into four schedules of computations. Parallelism within a schedule and between the schedules is examined. The time complexity of the parallel implementation is of O(n2) when O(n3 processors are available. This initial attempt may motivate further investigations in designing efficient parallel algorithms for microcode compaction.
Online point location in planar arrangements and its applications
Authors: Sariel Har-Peled, Micha Sharir
Venue: Proceedings of the twelfth annual ACM-SIAM symposium on Discrete algorithms (2001)

Recently, Har-Peled [17] presented a new randomized technique for online construction of the zone of a curve in a planar arrangement of arcs. In this paper: we present several applications of this technique, which yield improved solutions to a variety of problems. These applications include: (i) an efficient mechanism for performing online point location queries in an arrangement of arcs; (ii) an efficient algorithm for computing an approximation to the minimum-weight Steiner-tree of a set of points, where the weight is the number of intersections between the tree edges and a given collection of arcs; (iii) a subquadratic algorithm for cutting a set of pseudo-parabolas into pseudo-segments; (iv) an algorithm for cutting a set of line segments (`rods') in 3-space so as to eliminate all cycles in the vertical depth order; and (v) a near-optimal algorithm for reporting all bichromatic intersections between a set R of red arcs and a set B of blue arcs, where the unions of the arcs in each set are both connected.
Dynamic QoS allocation for multimedia ad hoc wireless networks
Authors: Hsiao-Kuang Wu, Pei-Hung Chuang
Venue: Mobile Networks and Applications (2001)

In this paper, we propose an approach to support QoS for multimedia applications in ad hoc wireless network. An ad hoc network is a collection of mobile stations forming a temporary network without the aid of any centralized coordinator and is different from cellular networks which require fixed base stations interconnected by a wired backbone. It is useful for some special situations, such as battlefield communications and disaster recovery. The approach we provide uses CSMA/CA medium access protocol and additional reservation and control mechanisms to guarantee quality of service in ad hoc network system. The reson we choose CSMA protocol instead of other MAC protocols is that it is used in most of currently wireless LAN productions. Via QoS routing information and reservation scheme, network resources are dynamically allocated to individual multimedia application connections.
OpenMath: an overview
Authors: Mike Dewar
Venue: ACM SIGSAM Bulletin (2000)

OpenMath is a standard for representing mathematical data in as unambiguous a way as possible. It can be used to exchange mathematical objects between software packages or via email, or as a persistent data format in a database. It is tightly focussed on representing semantic information and is not intended to be used directly for presentation, although tools exist to facilitate this. Since 1997 its development has been partially funded by the European Union under a multimedia ESPRIT project.The original motivation for OpenMath came from the Computer Algebra community. Computer Algebra packages were getting bigger and more unwieldy, and it seemed reasonable to adopt a generic "plug and play" architecture to allow specialised programs to be used from general purpose environments. There were plenty of mechanisms for connecting software components together, but no common format for representing the underlying data objects. It quickly became clear that any standard had to be vendor-neutral and that objects encoded in OpenMath should not be too verbose. This has led to the design outlined below.In 1998, the Worldwide Web Consortium (W3C) produced its first recommendation for the Extensible Markup Language (XML) [11], intended to be a universal format for representing structured information on the worldwide web. It was swiftly followed by the first MathML recommendation [10] which is an XML application oriented mainly towards the presentation (i.e. the rendering) of mathematical expressions. Both these developments were significant for OpenMath in different ways as shall be described later in this article and elsewhere in this issue of SIGSAM.The formal definition of OpenMath is contained within The OpenMath Standard [7] and its accompanying documents, and the reader is referred there for more details.
Making data structures confluently persistent
Authors: Amos Fiat, Haim Kaplan
Venue: Proceedings of the twelfth annual ACM-SIAM symposium on Discrete algorithms (2001)

We address a longstanding open problem of [8, 7], and present a general transformation that takes any data structure and transforms it to a confluently persistent data structure. We model this general problem using the concepts of a version DAG (Directed Acyclic Graph) and an instantiation of a version DAG. We introduce the concept of the effective depth of a vertex in the version DAG and use it to derive information theoretic lower bounds on the space expansion of any such transformation for this DAG. We then give a confluently persistent data structure, such that for any version DAG, the time slowdown and space expansion match the information theoretic lower bounds to within a factor of &Ogr;(log2(&brvbar;V&brvbar;)).
An Inductorless 300 MHz Wideband CMOS Power Amplifier
Authors: Henrik Sjöland
Venue: Analog Integrated Circuits and Signal Processing (1999)

The power amplifier tends to be one of the most demanding parts to fully integrate when building an entire radio on a CMOS chip. In this paper the design of a fully integrated RF power amplifier without inductors is described. As inductors in CMOS technology are associated with various problems, it is interesting to examine what performance can be achieved without them. &emsp;An amplifier with an operating band from 60 MHz to 300 MHz (&minus;3 dB) is built in 0.8 &mu;m CMOS. A 3 V supply is used. The measured midband power gain is 30 dB with 50 &Omega; resistive source and load impedance. As linearity is important for many modern modulation schemes, the amplifier is designed to be as linear as possible. The measured third order intercept point is 23 dBm and the 1 dB compression point is 10 dBm, both referred to the output. The output is single ended to avoid an off-chip differential to single ended transformer.
IRI-h, a Java-based distance education system: architecture and performance
Authors: R. Maly, H. Abdel-Wahab, C. Wild, C. M. Overstreet, A. Gupta, A. Abdel-Hamid, S. Ghanem, A. Gonzalez, X. Zhu
Venue: Journal on Educational Resources in Computing (JERIC) (2001)

We used our Original Interactive Remote Instruction (IRI) system to teach scores of university classes over the past years at sites up to 300 km apart. While this system is a prototype, its use in real classes allows us to deal with crucial issues in distributed education instruction systems. We describe our motivation and vision for a reimplementation of IRI that supports synchronous and asynchronous distance education. This new version, called IRI-h (h for hetergeneous), is coded in Java and executes on several different platforms. IRI-h extends IRI both to multiple platforms and heterogeneous network experiences with the developing prototype, including preliminary performance evaluation, and also unresolved issues still to be addressed.
Inductive methods for proving properties of programs
Authors: Zohar Manna, Stephen Ness, Jean Vuillemin
Venue: Communications of the ACM (1973)

There are two main purposes in this paper: first, clarification and extension of known results about computation of recursive programs, with emphasis on the difference between the theoretical and practical approaches; second, presentation and examination of various known methods for proving properties of recursive programs. Discussed in detail are two powerful inductive methods, computational induction and structural induction, including examples of their applications.