ppxscal/embedding_network huggingface dataset:
Harvesting information to sustain forests
Authors: Lois Delcambre, Timothy Tolle, The Forest Project Team
Venue: Communications of the ACM (2003)

We are building a Web-based system to provide easy access to documents for use by natural resource managers, scientists, and other interested parties in the Pacific Northwest. Initially, we are focusing on the Adaptive Management Area Program (www.fs.fed.us/r6/plan/adapt.htm) with the USDA Forest Service as the lead government partner in collaboration with natural resource management specialists from the USDI Bureau of Land Management, USDI Fish and Wildlife Service, as well as other agencies and groups.
Falling Through the Cracks at Microsoft
Authors: Shane Greenstein
Venue: IEEE Micro (2000)

Cases like Microsoft's federal antitrust fight come along once a decade. However, the national press has reported the results, interviewed a few experts, and already moved on. It's as if nothing happened on a grander scale.
General models for optimum arbitrary-dimension FPGA switch box designs
Authors: Hongbing Fan, Jiping Liu, Yu Liang Wu
Venue: Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design (2000)

An FPGA switch box is said to be hyper-universal if it is routable for all possible surrounding multi-pin net topologies satisfying the routing resource constraints. It is desirable to design hyper-universal switch boxes with the minimum number of switches. A previous work, Universal Switch Module, considered such a design problem concerning 2-pin net routings around a single FPGA switch box. However, as most nets are multi-pin nets in practice, it is imperative to study the problem that involves multi-pin nets. In this paper, we provide a new view of global routings and formulate the most general &kappa;-sided switch box design problem into an optimum &kappa;-partite graph design problem. Applying a powerful decomposition theorem of global routings, we prove that, for a fixed &kappa;, the number of switches in an optimum &kappa;-sided switch box with W terminals on each side is O (W), by constructing some hyper-universal switch boxes with O(W) switches. Furthermore, we obtain optimum, hyper-universal 2-sided and 3-sided switch boxes, and propose hyper-universal 4-sided switch boxes with less than 6.7W switches, which is very close to the lower bound 6W obtained for pure 2-pin net models in [5].
Set Operations in Object-Based Data Models
Authors: E. A. Rundensteiner, L. Bic
Venue: IEEE Transactions on Knowledge and Data Engineering (1992)

The semantics of set operations are not adequate for the richer data models of object-based database systems that include object-oriented and semantic data modeling concepts. The reason is that precise semantics of set operations on complex objects require a clear distinction between the dual notions of a set and a type, both of which are present in the class construct found in object-based data models. This gap is filled here by a framework for executing set theoretic operations on the class construct. The proposed set operations, including set difference, union, intersection and symmetric difference, determine both the type description of the derived class as well as its set membership. For the former, inheritance rules are developed for property characteristics such as single-valued versus multivalued and required versus optional. For the latter, the object identity concept is developed if borrowed from data modeling research. The framework allows for property inheritance among classes that are not necessarily IS-A related.
Usability Engineering in Dollars and Cents
Venue: IEEE Software (1993)

A cost-benefit analysis of usability engineering's contribution in two projects, obtaining both preproject estimates and postproject feedback, is presented. The first project involved replacing a business system and adding a new function. Usability engineering was completed within the seven-month development schedule. It included three iterations of usability tests that were a mixture of field and laboratory tests of both rough prototypes and the new application running on a test system. The second project involved replacing a semiautomatic process with a fully automated system. Usability activities include task analysis, screen design, baseline testing, usability prototype testing, results reporting, and recommendations for redesign and were completed in 21 months.
IPULOC - exploring dynamic program locality with the instruction processing unit for filling memory gap
Authors: Huang Zhenchun, Li Sanli
Venue: Journal of Computer Science and Technology (2002)

Memory gap has become an essential factor influencing the peak performance of high-speed CPU-based systems. To fill this gap, enlarging cache capacity has been a traditional method based on static program locality principle. However, the order of instructions stored in I-Cache before being sent to Data Processing Unit (DPU) is a kind of useful information that has not ever been utilized before. So an architecture containing an Instruction Processing Unit (IPU) in parallel with the ordinary DPU is proposed. The IPU can prefetch, analyze and preprocess a large amount of instructions otherwise lying in the I-Cache untouched. It is more efficient than the conventional prefetch buffer that can only store several instructions for previewing. By IPU, Load Instructions can be preprocessed while the DPU is executing on data simultaneously. It is termed as "Instruction Processing Unit with LOokahead Cache" (IPULOC for short) in which the idea of dynamic program locality is presented. This paper describes the principle of IPULOC and illustrates the quantitative parameters for evaluation. Tools for simulating the IPULOC have been developed. The simulation result shows that it can improve program locality during program execution, and hence can improve the cache hit ratio correspondingly without further enlarging the on-chip cache that occupies a large portion of chip area.
A Fixed-Point DSP for Graphics Engines
Authors: Matthew Johnson
Venue: IEEE Micro (1989)

The use of the 16-bit ADSP-2100 digital signal microprocessor as a fixed-point, low-end graphics engine for applications such as video games and small computer graphics packages is examined. It serves as the basis for a complete, hardware-oriented approach to performing graphics operations on a 3-D database. Normalization and formatting are performed to avoid overflow and preserve data formats through the transformation operation. Data structures that facilitate object rendering through the Bresenham line-segment drawing algorithm are used. A 3*3 rotation matrix is derived for this application, and the means for implementing translation, scaling, perspective, and zooming are described.
Sequential SPFDs
Authors: Subarnarekha Sinha, Andreas Kuehlmann, Robert K. Brayton
Venue: Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design (2001)

SPFDs are a mechanism to express flexibility in Boolean networks. Introduced by Yamashita et al. in the context of FPGA synthesis [4], they were extended later to general combinational networks [2]. We introduce the concept of sequential SPFDs and provide an algorithm to compute them based on a partition of the state bits. The SPFDs of each component in the partition are used to generate equivalence classes of states. We provide a formal relation between the resulting state classification and the equivalence classes produced by classical state minimization of completely specified machines [6]. The SPFDs associated with the state bits can be applied for re-encoding the state space. For this, we give an algorithm to re-synthesize the sequential circuit using sequential SPFDs and the new state re-encoding.
Teaching Software Engineering in a Workstation Environment
Authors: Mark Sherman, Robert L. Drysdale III
Venue: IEEE Software (1988)

A description is given of an undergraduate software-engineering course at Dartmouth College that uses an interactive, graphical, networked workstation environment (implemented on Apple Macintoshes). The student's projects use all the features of this environment, including graphics, windows, fonts, mice, networks, and sound generators. The course covers the technical aspects of building a large system. Class topics include refining the system architecture, evaluating data structures, measuring system performance, selecting a user interface, specifying modules, and comparing programming methodologies. The environment can be implemented on almost any computer, from micros to mainframes.
A Proof of GMP Square Root
Authors: Yves Bertot, Nicolas Magaud, Paul Zimmermann
Venue: Journal of Automated Reasoning (2003)

We present a formal proof (at the implementation level) of an efficient algorithm proposed by P. Zimmermann in 1999 to compute square roots of arbitrarily large integers. This program, which is part of the GNU Multiple Precision Arithmetic Library, is completely proven within the COQ system. Proofs are developed using the CORRECTNESS tool to deal with imperative features of the program. The formalization is rather large (more than 13,000 lines) and requires some advanced techniques for proof management and reuse.
A sharp inequality for vector norms
Authors: Tiberiu Trif
Venue: Octogon Mathematical Magazine (2002)

We prove that for all vectors a1,..., an ∈ Rm it holds that ||a1|| +...+||an|| ≤ ||a1 +...+an|| + 2/n Σ1≤i<j≤n||ai-aj||. Moreover, this inequality is sharp in the sense that the factor 2/n cannot be replaced by any smaller value.
Managing OO Projects Better
Authors: Paolo Nesi
Venue: IEEE Software (1998)

Nesi reveals that estimation of effort is key to managing OO development projects, then documents a few rules of thumb for doing this. One lesson he's learned from using these rules is that estimates for a whole project are not reliable if estimates for subcomponents are simply added up. As the project size increases, so does the overhead for communication and general interaction. Nesi goes beyond effort metrics and recommends that you collect metrics throughout the project and use them for continuous revalidation of assumptions and project performance. If we accept that "what you can't measure, you can't manage," this is good advice.
Multiresolution Analysis of Ridges and Valleys in Grey-Scale Images
Authors: J. M. Gauch, S. M. Pizer
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1993)

Two methods for identifying and analyzing the multiresolution behavior of ridges and valleys in grey-scale images are described. The first method uses the tools of differential geometry to focus on local image behavior. The resulting vertex curves mark the tops of ridges and bottoms of valleys in an image. The second method focuses on the global drainage patterns of rainfall on a terrain map. The resulting watershed boundaries also identify the tops of ridges and bottoms of valleys in an image. By following these two geometric representations through scale space, the authors build resolution hierarchies on ridges and valleys in the image that can be utilized for interactive image segmentation.
An Implementation for Test-Time Reduction in VLIW Transport-Triggered Architectures
Authors: V. A. Zivkovic, R. J. W. T. Tangelder, H. G. Kerkhoff
Venue: Journal of Electronic Testing: Theory and Applications (2002)

In this paper the implementation of the test strategy in a so-called Very Long Instruction Word Transport Triggered Architecture (VLIW-TTA) is discussed. The complete test strategy is derived referring to the results of test synthesis, carried out in the early phase of the design. It takes the area/throughput parameters into account. The test strategy, exploiting the regularity and modularity of the VLIW-TTA structure, remains general for an arbitrary application and instantiation of the TTA processor and is based on the partial scan approach along with the functional test. The test-time analysis, in order to justify our approach and show the superiority over the classical full-scan, has been performed. The results of our strategy are shown in a few examples at the end of the paper.
Protected Shared Variables in VHDL: IEEE Standard 1076a
Authors: Peter J. Ashenden, Philip A. Wilsey
Venue: IEEE Design Test (1999)

The VHDL standard currently allows concurrent access to variables shared between processes, but does not define any semantics for concurrency control. The IEEE 1076a Shared Variables Working Group has developed a form of monitors, called protected types, to provide mutually exclusive access to shared variables. This article identifies the problems that can arise from unprotected concurrent access to shared variables and reviews the idea of monitors, which forms the basis of the proposed language change. It describes protected types, gives some guidelines on using them for hardware modeling, and includes examples to illustrate their use.
Vertical Migration of Software Functions and Algorithms Using Enhanced Microsequencing
Authors: C. A. Papachristou, V. R. Immaneni
Venue: IEEE Transactions on Computers (1993)

A scheme for vertical migration of algorithms and functions with complex sequencing structure from software through firmware into microcoded VLSI structures is discussed. The expected benefits of migration are gains in speed, reliability, and stability. The scheme employs a migration model that is based on microcode modularity and is supported by a hardware microcontroller with enhanced sequencing capability. The basic idea is to capture, using effective compilation techniques, the explicit or implicit sequencing structure of a function. Migration is then effected by sequencing calls into a library of microcode modules of a target machine architecture. The modularity of the migration system is well suited for generating VLSI microcode. The experimental results from an environment consisting of several firmware development tools show substantial time performance improvements in comparison to software implementations. Comparisons to traditional migration approaches indicate that the proposed scheme is faster and requires less memory space for the migration of software algorithms into firmware.
Real-Time Search for Autonomous Agents and Multiagent Systems
Authors: Toru Ishida
Venue: Autonomous Agents and Multi-Agent Systems (1998)

Since real-time search provides an attractive framework for resource-bounded problem solving, this paper extends the framework for autonomous agents and for a multiagent world. To adaptively control search processes, we propose &epsiv;-search which allows suboptimal solutions with &epsiv; error, and &delta;-search which balances the tradeoff between exploration and exploitation. We then consider search in uncertain situations, where the goal may change during the course of the search, and propose a moving target search (MTS) algorithm. We also investigate real-time bidirectional search (RTBS) algorithms, where two problem solvers cooperatively achieve a shared goal. Finally, we introduce a new problem solving paradigm, called organizational problem solving, for multiagent systems.
On the Computation of Correlation Sequences in 3-D Recursive Digital Filters
Authors: Chyi Hwang, Tong-Yi Guo
Venue: Multidimensional Systems and Signal Processing (2002)

In this paper we are concerned with the computation of correlation sequences and complex integrals arising in Three-dimensional (3-D) recursive digital filtering applications. In particular, we focus on presenting a reliable and accurate method for evaluating triple complex integrals having a rational-form integrand. The basic idea is to reduce the triple complex integral into a double complex integral. The main computational tasks involved in the method includes the product-to-sum decomposition of the rational-form integrand, the integration of a definite integral, and the finding of inside-unit-circle (IUC) roots of 1-D polynomials. The proposed method of evaluating multiple complex integrals has its great applications in the design of optimal 3-D nonseparable-denominator recursive digital filters with minimum sensitivity and/or roundoff error. To demonstrate the effectiveness of the presented method, two numerical examples are given.
Emergent Properties of a Market-based Digital Library with Strategic Agents
Authors: Sunju Park, Edmund H. Durfee, William P. Birmingham
Venue: Autonomous Agents and Multi-Agent Systems (2000)

The University of Michigan Digital Library (UMDL) is designed as an open system that allows third parties to build and integrate their own profit-seeking agents into the marketplace of information goods and services. The profit-seeking behavior of agents, however, risks inefficient allocation of goods and services, as agents take strategic stances that might backfire. While it would be good if we could impose mechanisms to remove incentives for strategic reasoning, this is not possible in the UMDL. Therefore, our approach has instead been to study whether encouraging the other extreme&mdash;making strategic reasoning ubiquitous&mdash;provides an answer.Toward this end, we have designed a strategy (called the p-strategy) that uses a stochastic model of the market to find the best offer price. We have then examined the collective behavior of p-strategy agents in the UMDL auction. Our experiments show that strategic thinking is not always beneficial and that the advantage of being strategic decreases with the arrival of equally strategic agents. Furthermore, a simpler strategy can be as effective when enough other agents use the p-strategy. Consequently, we expect the UMDL is likely to evolve to a point where some agents use simpler strategies and some use the p-strategy.
Boundary Finding with Prior Shape and Smoothness Models
Authors: Yongmei Wang, Lawrence H. Staib
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (2000)

We propose a unified framework for boundary finding, where a Bayesian formulation, based on prior knowledge and the edge information of the input image (likelihood), is employed. The prior knowledge in our framework is based on principal component analysis of four different covariance matrices corresponding to independence, smoothness, statistical shape, and combined models, respectively. Indeed, snakes, modal analysis, Fourier descriptors, and point distribution models can be derived from or linked to our approaches of different prior models. When the true training set does not contain enough variability to express the full range of deformations, a mixed covariance matrix uses a combined prior of the smoothness and statistical variation modes. It adapts gradually to use more statistical modes of variation as larger data sets are available.
A Full-Screen Facility for Defining Relational and Entity-Relationship Database Schemas
Authors: Gary H. Sockut, Ashok Malhotra
Venue: IEEE Software (1988)

An easy-to-use, interactive facility for defining schemas for a mainframe database system has been developed that is more convenient than a linear language. The facility called Dbdefs, has several features that make it easy to use. It provides similar interfaces for defining schemas for two data models, relational and entity-relationship. An overview of Dbdefs is followed by discussion of the relational and entity-relationship interfaces.
The Message-Driven Processor: A Multicomputer Processing Node with Efficient Mechanisms
Authors: William J. Dally, J. A. Stuart Fiske, John S. Keen, Richard A. Lethin, Michael D. Noakes, Peter R. Nuth, Roy E. Davison, Gregory A. Fyler
Venue: IEEE Micro (1992)

The message-driven processor (MDP), a 36-b, 1.1-million transistor, VLSI microcomputer, specialized to operate efficiently in a multicomputer, is described. The MDP chip includes a processor, a 4096-word by 36-b memory, and a network port. An on-chip memory controller with error checking and correction (ECC) permits local memory to be expanded to one million words by adding external DRAM chips. The MDP incorporates primitive mechanisms for communication, synchronization, and naming which support most proposed parallel programming models. The MDP system architecture, instruction set architecture, network architecture, implementation, and software are discussed.
Image Information Systems: Where Do We Go From Here?
Authors: S. -K. Chang, A. Hsu
Venue: IEEE Transactions on Knowledge and Data Engineering (1992)

A conceptual framework for image information systems is presented. Current research topics are surveyed, and application examples are presented. The design issues for the next generation of active image systems are discussed. It is suggested that the next generation of active image information systems should be designed on the basis of notions of generalized icons and active indexes, resulting in smart images.
1997 Gordon Bell Prize Winners
Authors: Alan H. Karp, Ewing Lusk, David H. Bailey
Venue: Computer (1998)

The Comprehensive Nuclear Test Ban Treaty, which forbids the testing of nuclear weapons, is responsible for the dramatic performance gains reported in this year's Gordon Bell Prize competition. The connection between the treaty and the Bell Prize is simple to understand: One way to maintain confidence in the nuclear stock-pile needed for national security is to use computation to tell you what you would have learned from testing. The recognition that such computations far exceeded the capability of existing computers led the US Department of Energy to initiate the Accelerated Strategic Computing Initiative (ASCI) program in high-performance computing. Four of this year's entries reported result on ASCI-Red, the first result of this program.
RTL Design Validation, DFT and Test Pattern Generation for High Defects Coverage
Authors: M. B. Santos, F. M. Gonçalves, I. C. Teixeira, J. P. Teixeira
Venue: Journal of Electronic Testing: Theory and Applications (2002)

The purpose of this paper is to present a RTL design and test methodology allowing the identification of design errors and difficult to verify functional parts. Using novel RTL fault models (namely, for arithmetic and relational operators) and Testability Metrics, two approaches are combined: RTL DFT and TPG. The need to inject faults on implicit variables of the RTL description is analyzed. Testability metrics, based on RTL fault detection (also associated with implicit variables), are shown to exhibit high correlation with Defects Coverage, DC. This high correlation enables RTL tradeoff analysis, for different DFT solutions, or test pattern generation. The proposed methodology for TPG leads to high DC by exercising RTL dark corners in a multiple and unbiased way. The resulting test patterns are, in fact, loosely deterministic patterns, suitable for low-cost BIST implementation. The usefulness of the methodology is ascertained using the mixed-level VeriDOS fault simulation tool and benchmarks circuits.
Thermal flow through a porous radiant of low conductivity
Authors: Dan Poliševski
Venue: Zeitschrift f&uuml;r Angewandte Mathematik und Physik (ZAMP) (2002)

A radiant solid matrix has an ε -periodic distribution of pores which are occupied by an incompressible viscous fluid governed by the Stokes-Boussinesq system. We study the border case when the Rayleigh number is of order ε-2 and the ratio of the solid and fluid conductivity coefficients is of order ε2. Using the two-scale convergence techniques we obtain the homogenized system. It is similar to the Darcy-Boussinesq system with exterior radiation term, only that the conductivity is no longer isotropic. Also, we find that the macroscopic temperature is not merely the solution of the homogenized system; an extra term must be added, product of the radiation with a certain capacity of the solid matrix (compare to the results of [9] and [10]). This result is related to those already obtained in several special cases of highly heterogeneous media (see [3], [4], [7] and [8]).