ppxscal/embedding_network huggingface dataset:
Data-driven facial animation synthesis by learning from facial motion capture data
Authors: Ulrich Neumann
Venue:  (2006)

Synthesizing realistic facial animation remains one of the most challenging topics in the graphics community because of the complexity of deformation of a moving face and our inherent sensitivity to the subtleties of human facial motion. The central goal of this dissertation is to attempt data-driven facial animation synthesis that captures the dynamics, naturalness, and personality of facial motion while human subjects are speaking with emotions. The solution is to synthesize realistic 3D talking faces by learning from facial motion capture data. This dissertation addresses three critical parts of realistic talking face synthesis: realistic eye motion synthesis, natural head motion synthesis, and expressive speech animation synthesis. A texture-synthesis based approach is presented to simultaneously synthesize realistic eye gaze and blink motion, accounting for any possible correlations between the two. The quality of statistical modeling and the introduction of gaze-eyelid coupling are improvement over previous work, and the synthesized eye results are hard to distinguish from actual captured eye motion. Two different approaches (sample-based and model-based) are presented to synthesize appropriate head motion. Based on the aligned training pairs between audio features and head motion, the sample-based approach uses a K-nearest neighbors-based dynamic programming algorithm to search for the optimal head motion samples given novel speech input. The model-based approach uses the Hidden Markov Models (HMMs) to synthesize natural head motion. HMMs are trained to capture the temporal relation between the acoustic prosodic features and head motion. This dissertation also presents two different approaches (model-based and sample-based) to generate novel expressive speech animation given new speech input. The model-based synthesis approach accurately learns speech co-articulation models and expression eigen spaces from facial motion data, and then it synthesizes novel expressive speech animations by applying these generative co-articulation models and sampling from the constructed expression eigen spaces. The sample-based synthesis system (eFASE) automatically generates expressive speech animation by concatenating captured facial motion frames while animators establish constraints and goals (novel phoneme-aligned speech input and its emotion modifiers). Users can also edit the processed facial motion database via a novel phoneme-Isomap interface.
Hybrid Approach to Faster Functional Verification with Full Visibility
Authors: Chin-Lung Chuang, Wei-Hsiang Cheng, Dong-Jung Lu, Chien-Nan Jimmy Liu
Venue: IEEE Design Test (2007)

Logic simulators are still the most popular verification tools, and they can provide full controllability and visibility during the verification process. However, their simulation speed is too slow for a large amount of input patterns. Higher speeds are possible with hardware emulation such as FPGAs. But, because of poor visibility in the FPGAs, it is very hard to debug using this approach. The work described in this article focuses on building similar debugging capabilities for low-cost FPGAs that currently are available only in expensive emulators, such as the full visibility provided by software simulators. The authors propose an efficient approach to record an FPGA's internal behavior and replay the interesting period of time in a software simulator. High simulation speed is still possible with this approach because most simulation efforts are completed in the FPGA. Besides this, full visibility and a better debugging environment can be provided in the software simulation while replaying the time frames with errors. To reduce hardware overhead, the authors also propose an algorithm to minimize the amount of recorded data. Experimental results confirm the efficiency of using this approach.
Compiling for Hierarchical Shared Memory Multiprocessors
Authors: J. D. Martens, D. N. Jayasimha
Venue: Proceedings of the 1993 International Conference on Parallel Processing - Volume 02 (1993)

Issues related ro cumpiling for shared memory multiprocessors with multilevel memory hierarchies are discussed. In particular, a method using simple and regular sections for parallelizing nested iterative loops with constant dependence distances is described.
A normalized gradient algorithm for an adaptive recurrent perceptron
Authors: J. A. Chambers
Venue: Proceedings of the Acoustics, Speech, and Signal Processing, 2000. on IEEE International Conference - Volume 01 (2000)

A normalized algorithm for on-line adaptation of a recurrent perceptron is derived. The algorithm builds upon the normalized backpropagation (NBP) algorithm for feedforward neural networks, and provides an adaptive learning rate and normalization for a recurrent perceptron learning algorithm. The algorithm is based upon local linearization about the current point in the state-space of the network. Such a learning rate is normalized by the squared norm of the gradient at the neuron, which extends the notion of normalized linear algorithms to the nonlinear case.
Neural network predistortion technique for digital satellite communications
Authors: M. Ibnkahla
Venue: Proceedings of the Acoustics, Speech, and Signal Processing, 2000. on IEEE International Conference - Volume 06 (2000)

Digital satellite communication channels are equipped with nonlinear amplifiers (such as travelling wave tube amplifiers (TWT)) which exhibit severe performance degradation when they work near saturation. The paper proposes an adaptive neural network (NN) predistortion technique to process the transmitted data. The technique is based on two steps. In the first step, the TWT amplitude and phase conversions are modeled. In the second step, an approximation of the TWT inverse transfer function is used to implement the predistorter. The approach is applied to 16-QAM transmissions and is shown through computer simulations to out-perform classical Volterra series techniques.
Hand-held computers can be better smart cards
Authors: Dirk Balfanz, Edward W. Felten
Venue: Proceedings of the 8th conference on USENIX Security Symposium - Volume 8 (1999)

Smart cards are convenient and secure. They protect sensitive information (e.g., private keys) from malicious applications. However, they do not protect the owner from abuse of the smart card: An application could for example cause a smart card to digitally sign any message, at any time, without the knowledge of the owner. In this paper we suggest that small, hand-held computers can be used instead of smart cards. They can communicate with the user directly and therefore do not exhibit the above mentioned problem. We have implemented smart card functionality for a 3COM PalmPilot. Our implementation is a PKCS#11 module that plugs into Netscape Communicator and takes about 5 seconds to sign an email message. Generalizing from this experience, we argue that applications that are split between a PC and a hand-held device can be more secure. While such an application remains fast and convenient to use, it gains additional security assurances from the fact that part of it runs on a trusted device.
AutoPaG: towards automated software patch generation with source code root cause identification and repair
Authors: Zhiqiang Lin, Xuxian Jiang, Dongyan Xu, Bing Mao, Li Xie
Venue: Proceedings of the 2nd ACM symposium on Information, computer and communications security (2007)

Software patch generation is a critical phase in the life-cycle of a software vulnerability. The longer it takes to generate a patch, the higher the risk a vulnerable system needs to take to avoid from being compromised. However, in practice, it is a rather lengthy process to generate and release software patches. For example, the analysis on 10 recent Microsoft patches (MS06-045 to MS06-054) shows that, for an identified vulnerability, it took 75 days on average to generate and release the patch. In this paper, we present the design, implementation, and evaluation of AutoPaG, a system that aims at reducing the time needed for software patch generation. In our current work, we mainly focus on a common and serious type of software vulnerability: the out-of-bound vulnerability which includes buffer overflows and general boundary condition errors. Given a working out-of-bound exploit which may be previously unknown, AutoPaG is able to catch on the fly the out-of-bound violation, and then, based on data flow analysis, automatically analyzes the program source code and identifies the root cause - vulnerable source-level program statements. Furthermore, within seconds, AutoPaG generates a fine-grained source code patch to temporarily fix it without any human intervention. We have built a proof-of-concept system in Linux and the preliminary results are promising: AutoPaG is able to successfully identify the root cause and generate a source code patch within seconds for every vulnerability test in the Wilander's buffer overflow benchmark test-suite. In addition, the evaluation with a number of real-world out-of-bound exploits also demonstrates its effectiveness and practicality in automatically identifying (vulnerable) source code root causes and generating corresponding patches.
An analysis of two-population coevolutionary computation
Authors: Kenneth De Jong
Venue:  (2006)

Coevolutionary computation (CoEC) is the subfield of evolutionary computation (EC) centered around the notion of interaction among simultaneously evolving entities. While it promises important problem-solving advantages, coevolution also brings many challenges. A practitioner trying to use a coevolutionary algorithm (CoEA) to solve a problem is generally interested in how the choices made in designing the algorithm affect its performance on that particular problem. In other words, they would like to have information about the dependency: problem properties + algorithm properties &rarr; performance. For traditional evolutionary algorithms (EAs), our understanding of this dependency has reached reasonably satisfactory levels. For CoEAs it has not, as they have proven notoriously more complex and less intuitive. The main contribution of my dissertation is advancing the understanding of this dependency for traditional two-population coevolutionary algorithms. The way I achieve this is through extensive analysis that connects algorithm, problem and performance through one key aspect: dynamics. While the importance of understanding the dynamics of coevolutionary systems has been pointed out by previous research, this dissertation is the first study that "glues" all four pieces together. Additionally, an important feature of the analysis is that it spans subareas of CoEC that were previously studied independently (compositional cooperative and test-based competitive). It bridges them by identifying a problem property and introducing tools for analyzing this property that are applicable across subareas, thus providing a more holistic perspective of the field of CoEC. The analysis is performed both for previously unstudied aspects of CoEAs and for ones that have been investigated using other techniques. The power of the new analysis approach is particularly visible in the latter case, where it is shown to explain prior "mysterious" results.
Robust multiperiod portfolio management in the presence of transaction costs
Authors: Dimitris Bertsimas, Dessislava Pachamanova
Venue: Computers and Operations Research (2008)

We study the viability of different robust optimization approaches to multiperiod portfolio selection. Robust optimization models treat future asset returns as uncertain coefficients in an optimization problem, and map the level of risk aversion of the investor to the level of tolerance of the total error in asset return forecasts. We suggest robust optimization formulations of the multiperiod portfolio optimization problem that are linear and computationally efficient. The linearity of the optimization problems is an advantage when complex additional requirements need to be imposed on the portfolio structure, e.g., limitations on positions in certain assets or tax constraints. We compare the performance of our robust formulations to the performance of the traditional single period mean-variance formulation frequently employed in the financial industry.
Region-based enhancement of digital chest radiographs
Authors: Jyh-Shyan Lin
Venue: Proceedings of the Acoustics, Speech, and Signal Processing, 1996. on Conference Proceedings., 1996 IEEE International Conference - Volume 04 (1996)

In routine chest radiographs, the mediastinum is often underexposed and vascular structures are obscured by the diaphragm. We have developed a region-based processing algorithm to enhance contrast and brightness of selected anatomical regions, such as the mediastinum, without altering the other regions. We employ wavelet processing technique to segment a chest radiograph into different gray level regions and then apply different degrees of contrast enhancement procedure to them. The image enhancement is controlled by a proposed sigmoid function. The enhanced images showed improved visualization in the mediastinum area over the original unprocessed chest radiographs. Furthermore, the visibility of vascular structures which are obscured by the diaphragm and mediastinum is improved.
New realization method for linear periodic time-varying filters
Authors: A. Duverdier
Venue: Proceedings of the Acoustics, Speech, and Signal Processing, 1999. on 1999 IEEE International Conference - Volume 03 (1999)

For channel modeling, modulation and analogue scrambling, the modern telecommunications use often linear periodic time-varying filters. The authors recall the definition of these filters. In particular, it is shown that a stationary process subjected to a linear periodic filter becomes cyclostationary. We show that any linear periodic filter can be realized by means of periodic clock changes. An original implementation method is then introduced. An example illustrates the periodic clock change implementation and presents the advantages of the new implementation technique in comparison to the classical one.
Discriminative Gaussian process latent variable model for classification
Authors: Raquel Urtasun, Trevor Darrell
Venue: Proceedings of the 24th international conference on Machine learning (2007)

Supervised learning is difficult with high dimensional input spaces and very small training sets, but accurate classification may be possible if the data lie on a low-dimensional manifold. Gaussian Process Latent Variable Models can discover low dimensional manifolds given only a small number of examples, but learn a latent space without regard for class labels. Existing methods for discriminative manifold learning (e.g., LDA, GDA) do constrain the class distribution in the latent space, but are generally deterministic and may not generalize well with limited training data. We introduce a method for Gaussian Process Classification using latent variable models trained with discriminative priors over the latent space, which can learn a discriminative latent space from a small training set.
Dynamic address resolution for enhanced configurability in packet-based TDMA GPONs
Authors: J. D. Angelopoulos, C. Dessauvage, H. -C. Leligou, K. Kanonakis, C. Matrakidis, E. Six
Venue: Information Sciences: an International Journal (2007)

Packet-oriented PONs will offer an efficient way to transfer IP traffic, providing at the same time flexible Quality of Service mechanisms to support a great variety of services. To allow provisioning of connections from customer sites to ISP sub-networks across packet-based PONs, it is necessary to correlate the Ethernet MAC address used in the customer terminals to the ISP interfaces and the MAC addresses used in the shared PON system. Automatic address resolution mechanisms are needed to allow for automatic dynamic reconfiguration without manual intervention. The address resolution mechanism impacts on the design of the MAC local address since it should allow for identification of the client interfaces on both ends of the PON. This paper investigates the relevant issues and proposes a solution extending the widely used address resolution protocol.
Intrusion detection system for signal based SIP attacks through timed HCPN
Authors: Yanlan Ding, Guiping Su
Venue: Proceedings of the The Second International Conference on Availability, Reliability and Security (2007)

As Session Initiation Protocol is becoming widely used for the current IP telephony services due to its simplicity and powerful functions, vulnerabilities it exposes make it susceptible to various attacks especially signal based SIP-specific attacks. Based on the security issues of SIP, in this paper, we propose the design of an intrusion detection system combined with misuse and anomaly detection for these threats by a feedback mechanism. A timed HCPN model is utilized and suited to drive and simulate the IDS for SIP with four machines. Also some detection solutions for specific attacks are provided like two recall methods for CANCEL attack and so on.
A new parallel DSP with short-vector memory architecture
Authors: J. Fridman
Venue: Proceedings of the Acoustics, Speech, and Signal Processing, 1999. on 1999 IEEE International Conference - Volume 04 (1999)

This paper presents a new highly-parallel DSP architecture based on a short-vector memory system developed at Analog Devices, Inc. This DSP incorporates for the first time in an embedded processor a number of techniques found in general purpose computing, such as branch prediction, deep and fully interlocked pipeline, and SIMD instruction execution. By means of its short-vector high-bandwidth memory system it is able to deliver sustained performance that is close to its peak computational rates of 1.5 GFLOPS (32-bit floating-point), or 6 GOPS (16-bit fixed-point).
A cluster approach to spatio-temporal channel estimation
Authors: M. Nilsson
Venue: Proceedings of the Acoustics, Speech, and Signal Processing, 2000. on IEEE International Conference - Volume 05 (2000)

In a severe multipath environment the antenna receives multiple copies of the same transmitted signal. To solve for all waves is difficult if possible at all. In this paper we use the approach of grouping the spatio-temporal reflections into clusters. We study how the aperture and bandwidth affects the cluster resolution using experimental data. The measurements were obtained by transmitting linear FM (chirp) signals of 150 MHz bandwidth, in the 1800 MHz band. An antenna array of 16 elements was used as a receiver.
An efficient timing model for hardware implementation of multirate dataflow graphs
Authors: N. Chandrachoodan
Venue: Proceedings of the Acoustics, Speech, and Signal Processing, 200. on IEEE International Conference - Volume 02 (2001)

We consider the problem of representing timing information associated with functions in a dataflow graph used to represent a signal processing system in the context of high-level hardware (architectural) synthesis. This information is used for synthesis of appropriate architectures for implementing the graph. Conventional models for timing suffer from shortcomings that make it difficult to represent timing information in a hierarchical manner, especially for multirate signal processing systems. We identify some of these shortcomings, and provide an alternate model that does not have these problems. We show that with some reasonable assumptions on the way hardware implementations of multirate systems operate, we can derive general hierarchical descriptions of multirate systems similarly to single rate systems. Several analytical results such as the computation of the iteration period bound, that previously applied only to single rate systems can also easily be extended to multirate systems under the new assumptions. We have applied our model to several multirate signal processing applications, and obtained favorable results. We present results of the timing information computed for several multirate DSP applications that show how the new treatment can streamline the problem of performance analysis and synthesis of such systems.
ParallAX: an architecture for real-time physics
Authors: Thomas Y. Yeh, Petros Faloutsos, Sanjay J. Patel, Glenn Reinman
Venue: ACM SIGARCH Computer Architecture News (2007)

Future interactive entertainment applications will featurethe physical simulation of thousands of interacting objectsusing explosions, breakable objects, and cloth effects. Whilethese applications require a tremendous amount of performanceto satisfy the minimum frame rate of 30 FPS, there is a dramatic amount of parallelism in future physics workloads.How will future physics architectures leverage parallelismto achieve the real-time constraint?. We propose and characterize a set of forward-looking benchmarksto represent future physics load and explore the designspace of future physics processors. In response to thedemand of this workload, we demonstrate an architecturewith a set of powerful cores and caches to provide performancefor the serial and coarse-grain parallel components ofphysics simulation, along with a exible set of simple coresto exploit fine-grain parallelism. Our architecture combinesintelligent, application-aware L2 management with dynamiccoupling/allocation of simple cores to complex cores. Furthermore,we perform sensitivity analysis on interconnectalternatives to determine how tightly to couple these cores.
Time Domain Equalization in Modern Communication Systems Based on Discrete Multitone Modulation
Authors: Pavel Silhavy
Venue: Proceedings of the Sixth International Conference on Networking (2007)

The article deals with the implementation of the design algorithm of time-domain equalizer (TEQ) coefficients. This equalization principle is used in several modern transmission systems based on discrete multitone modulation (e.g. ADSL, VDSL, WLAN base on 802.11 g, PLC, etc.)
FPGA implementation of a tunable band-pass filter using the "basic heterodyne block"
Authors: D. Sasidaran
Venue: Proceedings of the Acoustics, Speech, and Signal Processing, 200. on IEEE International Conference - Volume 02 (2001)

Any band-pass filter may be converted into a tunable filter with a single tuning parameter through the use of a new tunable heterodyne band-pass filter concept in which the frequency of the heterodyne signal is adjusted thereby translating the entire filter transfer function in frequency. If the fixed filter is selected to be a narrow-band band-pass filter, the new tunable heterodyne band-pass filter concept can be used very effectively in the elimination of narrow band interference in wide-band communications or control systems. A single-chip version of this tunable filter can be constructed using a Xilinx Virtex XCV800 chip. The resulting filter is a flexible tunable band-pass filter that can be varied from DC to /spl pi//2 or from /spl pi//2 to it depending on the parameters of the fixed output low-pass filter.