ppxscal/embedding_network huggingface dataset:
The Intel 376 Family for Embedded Processor Applications
Authors: Clif Purkiser, Jim Kardach
Venue: IEEE Micro (1988)

A detailed examination is made of the register set, addressing modes, instruction set, protection mechanisms, and debugging features of the Intel 80376 processor, especially as they relate to embedded applications. Hardware for the processor is described. Three other members of the family, namely, the 82370 integrated system peripheral, the 27C203A pipelined 256-byte EPROM, and the 80387SX numeric coprocessor, are also examined.
The Equivalence of Support Vector Machine and Regularization Neural Networks
Authors: Péter András
Venue: Neural Processing Letters (2002)

We show in this brief paper the equivalence of the support vector machine and regularization neural networks. We prove both implication sides of the equivalence in a generally applicable way. The novelty lies in the effective construction of the regularization operator corresponding to a given support vector machine formulation. We give also a short introductory description of both neural network approximation frameworks.
Towards a non-linear narrative construction
Authors: Vidya Setlur, David A. Shamma, Kristian Hammond, Sanjay Sood
Venue: Proceedings of the 8th international conference on Intelligent user interfaces (2003)

This article describes the implementation of a system that 'imagines' while a movie is being played by finding associations in the movie's content and presenting them to the viewer. This related information, in the form of images and movie clips, helps enhance the viewer's experience in a new immerse environment.
Least Squares Policy Evaluation Algorithms with Linear Function Approximation
Authors: A. Nedić, D. P. Bertsekas
Venue: Discrete Event Dynamic Systems (2003)

We consider policy evaluation algorithms within the context of infinite-horizon dynamic programming problems with discounted cost. We focus on discrete-time dynamic systems with a large number of states, and we discuss two methods, which use simulation, temporal differences, and linear cost function approximation. The first method is a new gradient-like algorithm involving least-squares subproblems and a diminishing stepsize, which is based on the &lambda;-policy iteration method of Bertsekas and Ioffe. The second method is the LSTD(&lambda;) algorithm recently proposed by Boyan, which for &lambda;=0 coincides with the linear least-squares temporal-difference algorithm of Bradtke and Barto. At present, there is only a convergence result by Bradtke and Barto for the LSTD(0) algorithm. Here, we strengthen this result by showing the convergence of LSTD(&lambda;), with probability 1, for every &lambda; &isin; [0, 1].
Designing an Asynchronous Processor Using Petri Nets
Authors: Alex Semenov, Albert M. Koelmans, Lee Lloyd, Alexandre Yakovlev
Venue: IEEE Micro (1997)

We describe a technique for the design and analysis of a simple asynchronous microprocessor from a Labeled Petri Net specification. The implementation is obtained by means of refinement, transformation and translation. Several versions of the microprocessor design are presented, evaluated and compared. The Petri net based approach allows an interplay of different formal tasks, such as synthesis, verification and performance evaluation, to be carried out within the single modeling framework.
Universal Safety Standard is Infeasible—for Now
Authors: Praful V. Bhansali
Venue: IEEE Software (1996)

A forum for exchanging ideas, philosophy and experience.
A Fault-Tolerant Multiprocess Controller for Magnetic Bearings
Authors: Steven W. Yates, Ronald D. Williams
Venue: IEEE Micro (1988)

A fault-tolerant microprocessor system designed to provide digital control for an active magnetic bearing is described. This particular control problem demands significant processing power, is easily divided into relatively independent parallel tasks, and cannot tolerate controller failures. The overall system requirements and architecture are described, as is the design of the digital control module and the analog I/O board. The fault tolerance of the system is evaluated. Extensive computer simulations of system reliability models verified that the design satisfies all of the reliability requirements. Although the system was designed for a specific problem, much effort was expended to make it general enough for applications to a wide range of real-time applications.
Networks on Chips: A New SoC Paradigm
Authors: Luca Benini, Giovanni De Micheli
Venue: Computer (2002)

A system on chip (SoC) can provide an integrated solution to challenging design problems in the telecommunications, multimedia, and consumer electronics domains. Much of the progress in these fields hinges on the designers' ability to conceive complex electronic engines under strong time-to- market pressure. Success will require using appropriate design and process technologies, as well as interconnecting existing components reliably in a plug-and- play fashion. Focusing on using probabilistic metrics such as average values or variance to quantify design objectives such as performance and power will lead to a major change in SoC design methodologies. Overall, these designs will be based on both deterministic and stochastic models. Creating complex SoCs requires modular, component-based approach to both hardware and software design. Despite numerous challenges, the authors believe that developers will solve the problems of designing SoC networks. At the same time, they believe that a layered-micronetwork design methodology will likely be the only path to mastering the complexity of future SoC designs.
Extending the Feature Vector for Automatic Face Recognition
Authors: Xiaoguang Jia, Mark S. Nixon
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1995)

Many features can be used to describe a human face but few have been used in combination. Extending the feature vector using orthogonal sets of measurements can reduce the variance of a matching measure, to improve discrimination capability. This paper investigates how different features can be used for discrimination, alone or when integrated into an extended feature vector.This study concentrates on improving feature definition and extraction from a frontal view image, incorporating and extending established measurements. These form an extended feature vector based on four feature sets: geometric (distance) measurements, the eye region, the outline contour, and the profile. The profile, contour, and eye region are described by the Walsh power spectrum, normalized Fourier descriptors, and normalized moments, respectively. Although there is some correlation between the geometrical measures and the other sets, their bases (distance, shape description, sequency, and statistics) are orthogonal and hence appropriate for this research.A database of face images was analyzed using two matching measures which were developed to control differently the contributions of elements of the feature sets. The match was evaluated for both measures for the separate feature sets and for the extended feature vector. Results demonstrated that no feature set alone was sufficient for recognition whereas the extended feature vector could discriminate between subjects successfully.
View Operations on Objects with Roles for a Statically Typed Database Language
Authors: Antonio Albano, Giuseppe Antognoni, Giorgio Ghelli
Venue: IEEE Transactions on Knowledge and Data Engineering (2000)

To deal with the evolution of data and applications and with the existence of multiple views for the same data, the object data model needs to be extended with two different sets of operations: object extension operations, to allow an object to dynamically change its type, and object viewing operations, to allow an object to be seen as if it had a different structure. Object extension and object viewing operations are related in that they are both identity-preserving operations, but different in that object extension may modify the behavior of the original object while object viewing creates a new view for the original object without modifying its behavior. In this paper, a set of object viewing operations is defined in the context of a statically and strongly typed database programming language which supports objects with roles, and the relationships with object extension and role mechanisms are discussed. We then show how the object viewing operations can be used to give the semantics of a higher level mechanism to define views for object databases. Examples of the use of these operations are given with reference to the prototype implementation of the language Galileo 97.
Building the IBM 4758 Secure Coprocessor
Authors: Joan G. Dyer, Mark Lindemann, Ronald Perez, Reiner Sailer, Leendert van Doorn, Sean W. Smith, Steve Weingart
Venue: Computer (2001)

The authors sought to build a secure coprocessor¿defined as a tamper-responding device derived from the Abyss, Citadel, and 4755 work¿that would provide a single multipurpose platform third parties could use to develop and deploy secure coprocessor applications, with minimal IBM participation. The project had several goals: ensure that the device could be identified externally, design the device and its soft-ware to be securely configurable and updatable in the field, construct the software architecture to accommodate layers of code from different parties, avoid letting the compromise of one device breach any other's security, and validate all these assertions through an external party.Providing an environment in which applications could run securely forced the designers to focus not only on security mechanisms and their implementation and management, but also on the security policies they must support. Clearly, the hardware on which applications run must be secure, as must the operating system and run-time environment in between, while offering a reasonable API for applications developers. To fix problems in the field and enable fast and inexpensive reaction to changing customer needs, the designers implemented part of the code as firmware rather than as read-only memory.The 4758 project achieved most of its design goals. Currently, the authors are exploring other embedded processors, the addition of a network communication channel, and other form factors, including those appropriate for laptops.
Studies on striping and buffer caching issues for the software RAID file system
Authors: Jong-Hoon Kim, SeWoong Eom, Sam H. Noh, Yoo-Hun Won, Bok-Gyu Joo
Venue: Journal of Systems Architecture: the EUROMICRO Journal (2002)

A software RAID file system is defined as a system that distributes data redundantly across an array of disks attached to each of the workstations connected on a high-speed network. This configuration provides higher throughput and availability compared to conventional file systems. In this paper, we consider two specific issues regarding the distribution of data among the cluster, namely, striping and buffer caching for such an environment. Through simulation studies we compare the performance of various striping methods and show that for effective striping in software RAID file systems, it must take advantage of its flexible nature. Further, for buffer caching, we show that conventional caching schemes developed for distributed systems are insufficient, and that the Exclusively Old Data and Parity scheme that is presented in this paper, overcomes the limitations of the previously proposed schemes.
Guaranteeing Synchronous Message Deadlines with the Timed Token Medium Access Control Protocol
Authors: G. Agrawal, B. Chen, W. Zhao, S. Davari
Venue: IEEE Transactions on Computers (1994)

We study the problem of guaranteeing synchronous message deadlines in token ring networks where the timed token medium access control protocol is employed. Synchronous bandwidth, defined as the maximum time for which a node can transmit its synchronous messages every time it receives the token, is a key parameter in the control of synchronous message transmission. To ensure the transmission of synchronous messages before their deadlines, synchronous capacities must be properly allocated to individual nodes. We address the issue of appropriate allocation of the synchronous capacities. Several synchronous bandwidth allocation schemes are analyzed in terms of their ability to satisfy deadline constraints of synchronous messages. We show that an inappropriate allocation of the synchronous capacities could cause message deadlines to be missed, even if the synchronous traffic is extremely low. We propose a scheme, called the normalized proportional allocation scheme, which can guarantee the synchronous message deadlines for synchronous traffic of up to 33% of available utilization.
Microwave rectification in ballistic nanojunctions at room temperature
Authors: L. Worschech, A. Schliemann, S. Reitzenstein, P. Hartmann, A. Forchel
Venue: Microelectronic Engineering (2002)

Nanoelectronic junctions were fabricated by electron beam lithography and wet etching of modulation doped GaAs/AlGaAs heterostructures. Voltage differences between the branches of the junctions lead to rectification characteristics, which persist up to room temperature. We have investigated the high frequency properties of the rectification. A microwave injected into one branch generates a direct current through the nanojunction.
Visualizing Fluid Flow
Venue: Computer (1993)

Several techniques for 3D visualization of fluid flow are discussed. Particle insertion into flow, particle-rendering, isosurface generation, volume rendering, data probing, and specialized analysis and visualization methods are described.
Simulating the Madness of Crowds: Price Bubbles in an Auction-Mediated Robot Market
Authors: Ken Steiglitz, Daniel Shapiro
Venue: Computational Economics (1998)

We simulate a multiagent market with production, consumption, and exchange mediated by a sealed-bid double auction. Marked price bubbles and subsequent crashes occur when value-based (fundamentals-driven) and trend-based traders are both present, and the market equilibrium price is ramped up exogenously. Similarly, negative price bubbles and recoveries occur when the equilibrium price is ramped down. Because the simulated market is auction-mediated, we can observe the operations of traders during these events, and study the interactions that produce and resolve bubbles. Some preliminary circuit-breaker experiments are described, in which bubbles are interrupted during their formation.
Security Domains: Key Management in Large-Scale Systems
Authors: John R. Michener, Tolga Acar
Venue: IEEE Software (2000)

In large-scale systems, partitioning keys among higher-level structures becomes necessary. Establishing and managing these structures as security domains requires an underlying infrastructure to securely provide local services.
Internet Resource Discovery Services
Authors: Katia Obraczka, Peter B. Danzig, Shih-Hao Li
Venue: Computer (1993)

An overview of resource discovery services currently available on the Internet is presented. The authors concentrate on the following discovery tools: the Wide Area Information Servers (WAIS) project, Archie, Prospero, Gopher. The World-Wide Web (WWW), Netfind, the X.500 directory, Indie, the Knowbot Information Service (KIS), Alex, Semantic File Systems, and Nomenclator. The authors summarize the surveyed tools by presenting a taxonomy of their characteristics and design decisions. They also describe where to find and how to access several of the surveyed discovery services. They conclude with a discussion of future directions in the area of resource discovery and retrieval.
Evolving buses: backplane buses mature to keep pace with technology
Venue: Computer (1994)

Considers how the role and importance of the backplane bus in a system has evolved along with the advances in technology over the past decade. Backplane buses have come a long way from the early days of fairly simple protocols, a couple of connectors, and some traces on a printed circuit board. In early bus-based systems, the backplane bus was the main system bus providing interconnects from the CPU to memory, I/O, peripherals, and networking. The bus interface alone could easily take up a third of the board real estate on a small card. In today's systems, however, advances in technology and packaging art having a significant effect on what is expected of a backplane bus. Yesterday's backplane buses can no longer keep up with the demands of today's high-performance CPUs and their interconnection requirements. What we need is a new generation of buses to meet the expanded needs. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
Support for business-driven evolution with coordination technologies
Authors: L. Andrade, J. L. Fiadeiro, J. Gouveia, G. Koutsoukos, M. Wermelinger
Venue: Proceedings of the 4th International Workshop on Principles of Software Evolution (2001)

Software evolution is, ever more, a critical concern for most business organizations. In spite of many promises, software development techniques, such as Object-Oriented ones, have fallen short of addressing this problem. We show how new technologies based on the notion of "coordination contract" can be deployed for managing the levels of change imposed by the evolution of requirements and technological environments, both in terms of semantic modeling and tool support.
Towards constructing component-based software systems with safe dynamic adaptability
Authors: Noriki Amano, Takuo Watanabe
Venue: Proceedings of the 4th International Workshop on Principles of Software Evolution (2001)

In a software system, dynamic adaptability is the ability for dynamic adaptation on runtime environments. A software system with dynamic adaptability can adapt itself to the changes of runtime environments by changing its own behavior in dynamic & flexible way. Such dynamic adaptability can be considered as a basic mechanism of software evolution. We have proposed a software model with dynamic adaptability named DAS and its description language named LEAD++. In this paper, we consider about safety issues on dynamic adaptability of component-based software systems and propose an improved DAS model named Safe DAS. The safety means that adaptable behavior of component-based software systems does not violate their consistency. The Safe DAS model supports exceptions & assertions mechanisms, atomicity & serialization of adaptable behavior and a unique mechanism named dynamic assertions.
A Virtual Test Facility for the Simulation of Dynamic Response in Materials
Authors: Julian Cummings, Michael Aivazis, Ravi Samtaney, Raul Radovitzky, Sean Mauch, Dan Meiron
Venue: The Journal of Supercomputing (2002)

The Center for Simulating Dynamic Response of Materials at the California Institute of Technology is constructing a virtual shock physics facility for studying the response of various target materials to very strong shocks. The Virtual Test Facility (VTF) is an end-to-end, fully three-dimensional simulation of the detonation of high explosives (HE), shock wave propagation, solid material response to pressure loading, and compressible turbulence. The VTF largely consists of a parallel fluid solver and a parallel solid mechanics package that are coupled together by the exchange of boundary data. The Eulerian fluid code and Lagrangian solid mechanics model interact via a novel approach based on level sets. The two main computational packages are integrated through the use of Pyre, a problem solving environment written in the Python scripting language. Pyre allows application developers to interchange various computational models and solver packages without recompiling code, and it provides standardized access to several data visualization engines and data input mechanisms. In this paper, we outline the main components of the VTF, discuss their integration via Pyre, and describe some recent accomplishments in large-scale simulation using the VTF.
Organic data memory using the DNA approach
Authors: Pak Chung Wong, Kwong-kwok Wong, Harlan Foote
Venue: Communications of the ACM (2003)

For very long-term storage and retrieval, encode information as artificial DNA strands and insert into living hosts. As vectors, bacteria, even some bugs and weeds, might be good for hundreds of millions of years.
A Versatile Family of Consensus Protocols Based on Chandra-Toueg's Unreliable Failure Detectors
Authors: M. Hurfin, A. Mostéfaoui, M. Raynal
Venue: IEEE Transactions on Computers (2002)

This paper is on consensus protocols for asynchronous distributed systems prone to process crashes, but equipped with Chandra-Toueg's unreliable failure detectors. It presents a unifying approach based on two orthogonal versatility dimensions. The first concerns the class of the underlying failure detector. An instantiation can consider any failure detector of the class (provided that at least one process does not crash), or (provided that a majority of processes do not crash). The second versatility dimension concerns the message exchange pattern used during each round of the protocol. This pattern (and, consequently, the round message cost) can be defined for each round separately, varying from (centralized pattern) to (fully distributed pattern), n being the number of processes. The resulting versatile protocol has nice features and actually gives rise to a large and well-identified family of failure detector-based consensus protocols. Interestingly, this family includes at once new protocols and some well-known protocols (e.g., Chandra-Toueg's protocol). The approach is also interesting from a methodological point of view. It provides a precise characterization of the two sets of processes that, during a round, have to receive messages for a decision to be taken (liveness) and for a single value to be decided (safety), respectively. Interestingly, the versatility of the protocol is not restricted to failure detectors: a simple timer-based instance provides a consensus protocol suited to partially synchronous systems.
Temperature dependence of the conductance in quasi-one-dimensional superlattices
Authors: N. Mori, C. Hamaguchi, L. Eaves, P. C. Main
Venue: Microelectronic Engineering (2002)

We have performed a Monte Carlo simulation of the electron motion in a Landau-quantized GaAs/AlAs superlattice to investigate the effect of increasing the temperature on the miniband conduction. A strong drift-velocity enhancement is found to occur when cyclical phonon emission and absorption are taken into account.
Automated BIST for Sequential Logic Synthesis
Authors: Charles E. Stroud
Venue: IEEE Design Test (1988)

An automated built-in self-test (BIST) technique for general sequential logic is described that can be used directly at all levels of testing from device testing through system diagnostics. The technique selectively replaces existing system memory elements with BIST flip-flop cells, which it then connects to form a circular chain. Data are compacted and test patterns are generated simultaneously. The approach has been incorporated in a system for behavioral model synthesis to implement BIST in VLSI devices based on standard cells and in circuit packs based on PLDs, automatically. Seven production VLSI devices have been implemented with this automated BIST approach. Area overhead was between 6% and 19% for a fault coverage of 90%+ with the BIST capability alone.
Software Tools in Context
Authors: Dennis B. Smith, Paul W. Oman
Venue: IEEE Software (1990)

A context is provided for understanding where tools fit in the software life cycle. Tools are divided into vertical and horizontal architectures. Vertical tools support specific activities in a single life-cycle phase, such as analysis, design, or testing. Horizontal tools support activities across the entire life cycle, such as project management and cost estimation. The task of tool integration is described. Trends and anticipated changes for the next few years are covered.