ppxscal/embedding_network huggingface dataset:
Asteroidal Triple-Free Graphs
Authors: Derek G. Corneil, Stephan Olariu, Lorna Stewart
Venue: SIAM Journal on Discrete Mathematics (1997)

An independent set of three vertices such that each pair is joined by a path that avoids the neighborhood of the third is called an asteroidal triple. A graph is asteroidal triple-free (AT-free) if it contains no asteroidal triples. The motivation for this investigation was provided, in part, by the fact that the AT-free graphs provide a common generalization of interval, permutation, trapezoid, and cocomparability graphs. The main contribution of this work is to investigate and reveal fundamental structural properties of AT-free graphs. Specifically, we show that every connected AT-free graph contains a dominating pair, that is, a pair of vertices such that every path joining them is a dominating set in the graph. We then provide characterizations of AT-free graphs in terms of dominating pairs and minimal triangulations. Subsequently, we state and prove a decomposition theorem for AT-free graphs. An assortment of other properties of AT-free graphs is also provided. These properties generalize known structural properties of interval, permutation, trapezoid, and cocomparability graphs.
Model-Year Architectures for Rapid Prototyping
Authors: Jeff Pridmore, Greg Buchanan, Gerry Caracciolo, Janet Wedgwood
Venue: Journal of VLSI Signal Processing Systems (1997)

The Rapid Prototyping of Application-Specific Signal Processors (RASSP) program is changing the way engineers design embedded signal processors by providing a process that will reduce by at least a factor of four both the time-to-market and cost, and improve design quality. To achieve these improvements, Lockheed Martin&lsquo;s Advanced Technology Laboratories (ATL) is using a methodology that stresses hardware and software reuse, and model-year architectures that enable interoperability and upgrades through open interface standards. This paper describes ATL&lsquo;s model-year architecture, which defines a framework for reuse to enable low-cost technology upgrades for embedded processors. This approach can be applied to a wide range of military and commercial applications.
An application of optimization-by-simulation to discrete variable systems
Authors: Young H. Lee, Farhad Azadivar
Venue: Proceedings of the 17th conference on Winter simulation (1985)

An algorithm is being developed for optimization of discrete variable stochastic systems that are modeled by computer simulation. The algorithm is basically a complex type search method that interacts with the simulation model. The capabilities built in the procedure allows it to take into account the stochastic nature of the responses of the simulation model and arrive at a reasonable solution with a certain level of confidence. This paper reports preliminary results obtained from this procedure which is undergoing its final stages of development. An application of this procedure to optimization of operation of a manufacturing cell is also presented.
Migration Processes II: The Discrete Case
Authors: Sándor Fejes, Azriel Rosenfeld
Venue: Journal of Mathematical Imaging and Vision (1998)

Following the study of migration processes in the continuous domain in Part I of this paper, we reformulate the concept of migration in the discrete domain (Z^m) and define Discrete Migration Processes (DMP). We demonstrate that this model is a natural discrete representation of the continuous model and maintains the model&lsquo;s features in a qualitative sense. We show that under discrete migration any discrete set shrinks to a limit in finitely many iterations. The discrete representation provides an advantageous basis for digitally implementing the MP model. Using this implementation we illustrate the discrete migration of various types of sets under various types of constraints.
Implementing Atomic Actions in Ada 95
Authors: Andy Wellings, Alan Burns
Venue: IEEE Transactions on Software Engineering (1997)

Atomic actions are an important dynamic structuring technique that aid the construction of fault-tolerant concurrent systems. Although they were developed some years ago, none of the well-known commercially-available programming languages directly support their use. This paper summarizes software fault tolerance techniques for concurrent systems, evaluates the Ada 95 programming language from the perspective of its support for software fault tolerance, and shows how Ada 95 can be used to implement software fault tolerance techniques. In particular, it shows how packages, protected objects, requeue, exceptions, asynchronous transfer of control, tagged types, and controlled types can be used as building blocks from which to construct atomic actions with forward and backward error recovery, which are resilient to deserter tasks and task abortion.
On automated message processing in electronic commerce and work support systems: speech act theory and expressive felicity
Authors: Steven O. Kimbrough, Scott A. Moore
Venue: ACM Transactions on Information Systems (TOIS) (1997)

Electronic messaging, whether in an office environment or for electronic commerce, is normally carried out in natural language, even when supported by information systems. For a variety of reasons, it would be useful if electronic messaging systems could have semantic access to, that is, access to the meanings and contents of, the messages they process. Given that natural language understanding is not a practicable alternative, there remain three approaches to delivering systems with semantic access: electronic data interchange (EDI), tagged messages, and the development of a formal language for business communication (FLBC). We favor the latter approach. In this article we compare and contrast these three approaches, present a theoretical basis for an FLBC (using speech act theory), and describe a prototype implementation.
Concurrent automata, database computers, and security: a &ldquo;new&rdquo; security paradigm for secure parallel processing
Authors: T. Y. Lin
Venue: Proceedings on the 1992-1993 workshop on New security paradigms (1993)

Declustering has been proposed to speed up parallel database machines. However, the security requires clustering. In this paper, we use temporal clustering to reconcile the apparent conflict. Automata theory is applied to high level architecture design. Based on Petri net theory a database machine is proposed. The classical notion of clustering is extended to temporal dimension and is imported to parallel database systems. The proposed database machine not only has the linear speedup, its capability (modeling power) also is increased in the order of magnitude. The computational model (in terms of automata) of the total system is strictly higher than the union of that of individual machine. It also efficiently supports the security.
Identification of Man-Made Regions in Unmanned Aerial Vehicle Imagery and Videos
Authors: J. L. Solka, D. J. Marchette, B. C. Wallet, V. L. Irwin, G. W. Rogers
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1998)

This paper details recent work in our group on the use of low-level features for the identification of man-made regions in unmanned aerial vehicle (UAV) imagery. The feature sets that we have examined include classical statistical features such as the coefficient of variation in a window about a pixel, locally computed fractal dimension, and fractal dimension computed in the presence of wavelet boundaries. We will discuss these techniques of feature extraction along with our approach to the classification of the features. Our classification work has focused on the use of a new semiparametric probability density estimation technique. In addition, we will present classification results for region of interest identification based on a set of test images from a recent UAV test flight.
Predictive and adaptive bandwidth reservation for hand-offs in QoS-sensitive cellular networks
Authors: Sunghyun Choi, Kang G. Shin
Venue: ACM SIGCOMM Computer Communication Review (1998)

How to control hand-off drops is a very important Quality-of-Service (QoS) issue in cellular networks. In order to keep the hand-off dropping probability below a pre-specified target value (thus providing a probabilistic QoS guarantee), we design and evaluate predictive and adaptive schemes for the bandwidth reservation for the existing connections' handoffs and the admission control of new connections.We first develop a method to estimate user mobility based on an aggregate history of hand-offs observed in each cell. This method is then used to predict (probabilistically) mobiles' directions and hand-off times in a cell. For each cell, the bandwidth to be reserved for hand-offs is calculated by estimating the total sum of fractional bandwidths of the expected hand-offs within a mobility-estimation time window. We also develop an algorithm that controls this window for efficient use of bandwidth and effective response to (1) time-varying traffic/mobility and (2) inaccuracy of mobility estimation. Three different admission-control schemes for new connection requests using this bandwidth reservation are proposed. Finally, we evaluate the performance of the proposed schemes to show that they meet our design goal and outperform the static reservation scheme under various scenarios.
An introduction to SLX
Authors: James O. Henriksen
Venue: Proceedings of the 28th conference on Winter simulation (1996)

SLX is Wolverine Software's "next generation" simulation language. SLX builds on the strengths of Wolverine's GPSS/H (Henriksen & Crain, 1996). It provides powerful simulation capabilities in a modern, C-like language framework. SLX provides a multiplicity of layers, ranging from the SLX kernel, at the bottom, through traditional simulation languages, e.g., GPSS/H, in the middle, to application-specific language dialects and extensions at the top. This paper provides an overview of SLX for readers who are already familiar with simulation. An earlier paper (Henriksen 1995) presented key concepts of the architecture of SLX As of this writing, SLX has been heavily used by a number of alpha testers. Insights gained from our interactions with the software testers will be presented.
Necessary Conditions for Optimal Impulsive Control Problems
Authors: G. N. Silva, R. B. Vinter
Venue: SIAM Journal on Control and Optimization (1997)

Necessary conditions of optimality, in the form of a maximum principle, are derived for a class of optimal control problems, certain of whose controls are represented by measures and whose state trajectories are functions of bounded variation. State trajectories are interpreted as robust solutions of the dynamic equations, a concept of solutions which takes account of the interaction between the measure control and the state variables during the jumps. The maximum principle which is derived improves on earlier optimality conditions for problems of this nature, by allowing nonsmooth data, measurable time dependence, and a possibly time-varying constraint set for the conventional controls.
Orderings for Parallel Conjugate Gradient Preconditioners
Authors: S. A. Stotland, J. M. Ortega
Venue: SIAM Journal on Scientific Computing (1997)

The efficient solution of the linear system of equations $A\mathbf{x} = \mathbf{b}$ on parallel computers sometimes requires a reordering of the unknowns. We investigate the effects of various orderings on the rate of convergence and the computation rate of the preconditioned conjugate method with SSOR as the preconditioner. As a model problem, we use a generalized Poisson equation $\nabla (K \nabla u ) = f$, discretized with finite differencing in two and three dimensions. The natural ordering has the highest rate of convergence yet results in poor to modest parallelism, whereas the classical red/black (RB) ordering fully exploits vector/parallel properties but has a deleterious effect on the rate of convergence. Intermediate between the RB and natural orderings are the ``many-color'' orderings studied by Harrar and Ortega, but we show that these have rather poor communication properties. Alternatives are domain decomposition orderings, which we consider with and without separator sets. We investigate the effectiveness of these orderings on parallel machines, the Intel iPSC/860 hypercube in particular. We also examine the effect of the remainder matrix on the rate of convergence.
Proximal nodes: a model to query document databases by content and structure
Authors: Gonzalo Navarro, Ricardo Baeza-Yates
Venue: ACM Transactions on Information Systems (TOIS) (1997)

A model to query document databases by both their content and structure is presented. The goal is to obtain a query language that is expressive in practice while being efficiently implementable, features not present at the same time in previous work. The key ideas of the model are a set-oriented query language based on operations on nearby structure elements of one or more hierarchies, together with content and structural indexing and bottom-up evaluation. The model is evaluated in regard to expressiveness and efficiency, showing that it provides a good trade-off between both goals. Finally, it is shown how to include in the model other media different from text.
Managing server load in global memory systems
Authors: Geoffrey M. Voelker, Hervé A. Jamrozik, Mary K. Vernon, Henry M. Levy, Edward D. Lazowska
Venue: Proceedings of the 1997 ACM SIGMETRICS international conference on Measurement and modeling of computer systems (1997)

New high-speed switched networks have reduced the latency of network page transfers significantly below that of local disk. This trend has led to the development of systems that use network-wide memory, or global memory, as a cache for virtual memory pages or file blocks. A crucial issue in the implementation of these global memory systems is the selection of the target nodes to receive replaced pages. Current systems use various forms of an approximate global LRU algorithm for making these selections. However, using age information alone can lead to suboptimal performance in two ways. First, workload characteristics can lead to uneven distributions of old pages across servers, causing increased contention delays. Second, the global memory traffic imposed on a node can degrade the performance of local jobs on that node.This paper studies the potential benefit and the potential harm of using load information, in addition to age information, in global memory replacement policies. Using an analytic queueing network model, we show the extent to which server load can degrade remote memory latency and how load balancing solves this problem. Load balancing requests can cause the system to deviate from the global LRU replacement policy, however. Using trace-driven simulation, we study the impact on application performance of deviating from the LRU replacement policy. We find that deviating from strict LRU, even significantly for some applications, does not affect application performance. Based upon these results, we conclude that global memory systems can gain substantial benefit from load balancing requests with little harm from suboptimal replacement decisions. Finally, we illustrate the use of the intuition gained from the model and simulation experiments by proposing a new family of algorithms that incorporate load considerations as well as age information in global memory replacement decisions.
Using real-time queueing theory to control lateness in real-time systems
Authors: John P. Lehoczky
Venue: Proceedings of the 1997 ACM SIGMETRICS international conference on Measurement and modeling of computer systems (1997)

This paper presents real-time queueing theory, a new theory which embeds the ability of real-time scheduling theory to determine whether task timing requirements are met into the context of queueing models. Specifically, this paper extends the analysis developed in Lehoczky [9] to the GI/M/1 case. The paper also applies these models to study queue control strategies which can control customer lateness. Arriving customers have deadlines drawn from a general deadline distribution. The state variable for the queueing system must include the number in the queue (with supplementary variables as needed to create a Markov model) and the lead-time (deadline minus current time) of each customer; thus the state space is infinite dimensional. One can represent the state of the system as a measure on the real line and can represent that measure by its Fourier transform. Thus, a real-time queueing system can be characterized as a Markov process evolving on the space of Fourier transforms, and this paper presents a characterization of the instantaneous simultaneous lead-time profile of all the customers in the queue. This profile is complicated; however, in the heavy traffic case, a simple description of the lead-time profile emerges, namely that the lead-time profile behaves like a Brownian motion evolving on a particular manifold of Fourier transforms; the manifold depending upon the queue discipline and the customer deadline distributions. This approximation is very accurate when compared with simulations. Real-time queueing theory focuses on how well a particular queue discipline meets customer timing requirements, and focuses on the dynamic rather than the equilibrium behavior of the system. As such, it offers the potential to study control strategies to ensure that customers meet their deadlines. This paper illustrates the analysis and performance evaluation for certain queue control strategies. Generalizations to more complicated models and to queueing networks are discussed.
A 1.6-GHz Current-Controlled Oscillator with IntegratedInductor
Authors: E. Tarvainen, H. Ronkainen, P. Kuivalaine
Venue: Analog Integrated Circuits and Signal Processing (1998)

A 1.6 GHz fully monolithic silicon bipolar LC current-controlled oscillator (CCO) circuit implemented in a 0.8 &micro;m BiCMOS technology and characterized for use in wireless applications is presented. The integrated resonator circuit uses high speed (18 GHz) bipolar transistors, a 14 nH rectangular spiral inductor fabricated by using a standard 2-level metallization, and a wideband pn-varactor structure. Additionally, to save chip area, the integrated capacitors were fabricated below the planar inductor structure. In order to aid the IC design, a simple equivalent circuit model for the integrated inductor on silicon was developed and tested. The measured quiescent power dissipation of the integrated CCO circuit is 1.9 mW to 5.5 mW from a supply of 2&ndash;3 V, and a typical phase noise varies from &minus;82 to &minus;86 dBc/Hz at 100 kHz offset.
Automatic Interpretation and Coding of Face Images Using Flexible Models
Authors: Andreas Lanitis, Chris J. Taylor, Timothy F. Cootes
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1997)

Face images are difficult to interpret because they are highly variable. Sources of variability include individual appearance, 3D pose, facial expression , and lighting. We describe a compact parametrized model of facial appearance which takes into account all these sources of variability. The model represents both shape and gray-level appearance , and is created by performing a statistical analysis over a training set of face images. A robust multiresolution search algorithm is used to fit the model to faces in new images. This allows the main facial features to be located , and a set of shape , and gray-level appearance parameters to be recovered. A good approximation to a given face can be reconstructed using less than 100 of these parameters. This representation can be used for tasks such as image coding, person identification, 3D pose recovery, gender recognition , and expression recognition. Experimental results are presented for a database of 690 face images obtained under widely varying conditions of 3D pose, lighting , and facial expression. The system performs well on all the tasks listed above.
Making graphs reducible with controlled node splitting
Authors: Johan Janssen, Henk Corporaal
Venue: ACM Transactions on Programming Languages and Systems (TOPLAS) (1997)

Several compiler optimizations, such as data flow analysis, the exploitation of instruction-level parallelism (ILP), loop transformations, and memory disambiguation, require programs with reducible control flow graphs. However, not all programs satisfy this property. A new method for transforming irreducible control flow graphs to reducible control flow graphs, called Controlled Node Splitting (CNS), is presented. CNS duplicates nodes of the control flow graph to obtain reducible control flow graphs. CNS results in a minimum number of splits and a minimum number of duplicates. Since the computation time to find the optimal split sequence is large, a heuristic has been developed. The results of this heuristic are close to the optimum. Straightforward application of node splitting resulted in an average code size increase of 235% per procedure of our benchmark programs. CNS with the heuristic limits this increase to only 3%. The impact on the total code size of the complete programs is 13.6% for a straightforward application of node splitting. However, when CNS is used, with the heuristic the average growth in code size of a complete program dramatically reduces to 0.2%
Event scheduling schemes for time warp on distributed systems
Authors: Eunmi Choi, Dugki Min
Venue: Proceedings of the 28th conference on Winter simulation (1996)

In this paper we present event sensitive state saving as a novel idea for sparse state saving in Time Warp synchronized parallel discrete event simulations. This state saving model is aimed at efficient simulation of models where the execution time or granularity for different types or classes of events typically has a large variance. The event sensitive state saving mechanism is sensitive to which class of event the previously executed event belongs, and decide when to save simulation state based on this information. We present an analytical analysis and compare this new state saving model with the performance of an existing adaptive state saving model as well as the traditional Time Warp state saving model with fixed state saving interval.
A Farkas lemma Without A Standard Closure Condition
Authors: Jean B. Lasserre
Venue: SIAM Journal on Control and Optimization (1997)

We present a setting in which we derive a new Farkas lemma for the system $\{Ax=b, x\in S\}$ without the standard closure condition on $A(S)$. Further characterization in Hilbert spaces is also presented.
Design of Self-Testing Checkers for m-out-of-n Codes Using Parallel Counters
Authors: Stanislaw J. Piestrak
Venue: Journal of Electronic Testing: Theory and Applications (1998)

This paper extends the design method of self-testing checkers (STCs) for some m-out-of-n (m/n) codes, proposed recently in IEEE Trans. Comput., 1995 by Dimakopoulos et al. The checkers are built using a pair of parallel counters (composed of full-adders and half-adders) with a total of n inputs and a 2-rail STC. We show here how to build this type of checkers for a number of m/n codes for which previous methods failed.