ppxscal/embedding_network huggingface dataset:
Can Memory-Less Network Adapters Benefit Next-Generation InfiniBand Systems?
Authors: Sayantan Sur, Abhinav Vishnu, Hyun-Wook Jin, Wei Huang, Dhabaleswar K. Panda
Venue: Proceedings of the 13th Symposium on High Performance Interconnects (2005)

InfiniBand is emerging as a high-performance interconnect. It is gaining popularity because of its high performance and open standard. Recently, PCI-Express, which is the third generation high-performance I/O bus used to interconnect peripheral devices, has been released. The third generation of InfiniBand adapters allow applications to take advantage of PCI-Express. PCI-Express offers very low latency access of the host memory by network interface cards (NICs). Earlier generation InfiniBand adapters used to have an external DIMM attached as local NIC memory. This memory was used to store internal information. This memory increases the overall cost of the NIC. In this paper we design experiments, analyze the performance of various communication patterns and end applications on PCI-Express based systems, whose adapters can be chosen to run with or without local NIC memory. Our investigations reveal that on these systems, the memory fetch latency is the same for both local NIC memory and Host memory. Under heavy I/O bus usage, the latency of a scatter operation increased only by 10% and only for message sizes 1B - 4KB. These memory-less adapters allow more efficientuse of overall system memory and show practically no performance impact (less than 0.1%) for the NAS Parallel Benchmarks on 8 processes. These results indicate that memory-less network adapters can benefit next generation InfiniBand systems.
Minimum Reliable Scale Selection in 3D
Authors: Christopher Wyatt, Ersin Bayram
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (2006)

Multiscale analysis is often required in image processing applications because image features are optimally detected at different levels of resolution. With the advance of high-resolution 3D imaging, the extension of multiscale analysis to higher dimensions is necessary. This paper extends an existing 2D scale selection method, known as the minimum reliable scale, to 3D volumetric images. The method is applied to 3D boundary detection and is illustrated in examples from biomedical imaging. The experimental results show that the 3D scale selection improves the detection of edges over single scale operators using as few as three different scales.
Hardware-modulated parallelism in chip multiprocessors
Authors: Julia Chen, Philo Juang, Kevin Ko, Gilberto Contreras, David Penry, Ram Rangan, Adam Stoler, Li-Shiuan Peh, Margaret Martonosi
Venue: ACM SIGARCH Computer Architecture News (2005)

Chip multi-processors (CMPs) already have widespread commercial availability, and technology roadmaps project enough on-chip transistors to replicate tens or hundreds of current processor cores. How will we express parallelism, partition applications, and schedule/place/migrate threads on these highly-parallel CMPs?This paper presents and evaluates a new approach to highly-parallel CMPs, advocating a new hardware-software contract. The software layer is encouraged to expose large amounts of multi-granular, heterogeneous parallelism. The hardware, meanwhile, is designed to offer low-overhead, low-area support for orchestrating and modulating this parallelism on CMPs at runtime. Specifically, our proposed CMP architecture consists of architectural and ISA support targeting thread creation, scheduling and context-switching, designed to facilitate effective hardware run-time mapping of threads to cores at low overheads.Dynamic modulation of parallelism provides the ability to respond to run-time variability that arises from dataset changes, memory system effects and power spikes and lulls, to name a few. It also naturally provides a long-term CMP platform with performance portability and tolerance to frequency and reliability variations across multiple CMP generations. Our simulations of a range of applications possessing do-all, streaming and recursive parallellism show speedups of 4-11.5X and energy-delay-product savings of 3.8X, on average, on a 16-core vs. a 1-core system. This is achieved with modest amounts of hardware support that allows for low overheads in thread creation, scheduling and context-switching. In particular, our simulations motivated the need for hardware support, showing that the large thread management overheads of current run-time software systems can lead to up to 6.5X slowdown. The difficulties faced in static scheduling were shown in our simulations with a static scheduling algorithm, fed with oracle profiled inputs suffering up to 107% slowdown compared to NDP's hardware scheduler, due to its inability to handle memory system variabilities. More broadly, we feel that the ideas presented here show promise for scaling to the systems expected in ten years, where the advantages of high transistor counts may be dampened by difficulties in circuit variations and reliability. These issues will make dynamic scheduling and adaptation mandatory; our proposals represent a first step towards that direction.
Constructing Phylogenetic Networks from Trees
Authors: Sergey Bereg, Kathryn Bean
Venue: Proceedings of the Fifth IEEE Symposium on Bioinformatics and Bioengineering (2005)

We present a new method of constructing a phylogenetic network from a given phylogenetic tree. It is based on a procedure that locally improves the tree. The procedure is quite general and can be applied to phylogenetic networks. By repeating local improvements user can introduce a given number of recombination cycles. A sequence of networks with decreasing distance deviation can be generated. The algorithm is efficient and shows a good performance on an example with plants. This is due to the fact that the update in every step is local and optimal.
An interactive introduction to OpenGL programming
Authors: Dave Shreiner, Ed Angel, Vicki Shreiner
Venue: ACM SIGGRAPH 2004 Course Notes (2004)

"An Interactive Introduction to OpenGL Programming" provides an overview of the OpenGL Application Programming Interface (API), a library of subroutines for drawing three-dimensional objects and images on a computer. After the completion of the course, a programmer able to write simple programs in the "C" language will be able to create an OpenGL application that has moving 3D objects that look like they are being lit by lights in the scene and by specifying colors or images that should be used to color those objects. Additionally, the viewpoint of the scene can be controlled by the mouse and keyboard, and can be updated interactively. Finally, the course provides references for exploring more of the capabilities of OpenGL that aren't covered in the class.
PaxonDHT: Achieving Consensus in Distributed Hash Tables
Authors: Ben Temkow, Anne-Marie Bosneag, Xinjie Li, Monica Brockmeyer
Venue: Proceedings of the International Symposium on Applications on Internet (2006)

Despite the scalability, availability and resiliency potential suggested by Distributed Hash Tables, their lack of support for replication of mutable data and for strong consistency models stands in the way of their becoming widely accepted as a viable basis for the future generation Internet. This paper presents PaxonDHT, a Paxos-based middleware service, which ensures with high probability that a dynamic set of replicas reach total order agreement. PaxonDHT works well in the highly dynamic environment of DHTs, preserving the properties of the underlying DHT layer, and provides simultaneous support for heterogeneous services. Our algorithm has been deployed on Pastry, using the Common API for interoperability with other DHTs. Experimental results in a simulated network show that PaxonDHT is scalable with replica set size and system load, and that it works well in highly dynamic environments.
Generating enhanced natural environments and terrain for interactive combat simulations (GENETICS)
Authors: William D. Wells
Venue: Proceedings of the ACM symposium on Virtual reality software and technology (2005)

Virtual battlefields devoid of vegetation deprive soldiers of valuable training in the critical aspects of terrain tactics and terrain-based situational awareness. Creating believable landscapes by hand is notoriously expensive, requiring both proprietary tools and trained artists, which hampers rapid scenario generation and limits reuse. Our approach constructs large-scale natural environments at run-time using a procedural image-based algorithm without the need for artists or proprietary tools.This paper discusses the current state of the open source project GENETICS (Generating Enhanced Natural Environments and Terrain for Interactive Combat Simulations) and how simulationists can use GENETICS to quickly and cheaply build large-scale natural environments to improve training effectiveness. It will also briefly touch upon level-of-detail techniques and ecotype modeling.
Acting Responsibly with Geospatial Data
Authors: E. Michael Power, Roland L. Trope
Venue: IEEE Security and Privacy (2005)

Given their potential for usefulness, who would have thought that mapping applications such as Google Earth (http://earth.google.com) and Google Maps (http://maps.google.com) could cause trouble, let alone become new flashpoints for international disputes? These nifty little mapping applications have prompted apprehensions and policy debates about access to and use of sensitive geospatial data, and the issues are extremely complex yet subtle.
DRKH: A Power Efficient Encryption Protocol forWireless Devices
Authors: Ahmad M. Kholaif, Magda B. Fayek, Hussein S. Eissa, Hoda A. Baraka
Venue: Proceedings of the The IEEE Conference on Local Computer Networks 30th Anniversary (2005)

In this paper, we present Dynamic Re-keying with Key Hopping (DRKH) encryption protocol that uses RC4 encryption technique to ensure a strong security level with the advantage of low execution cost compared to other IEEE 802.11 security schemes. Low computational complexity makes DRKH suitable for solar- and batterypowered handheld devices such as nodes in Solar ESS (Extended Service Set) and wireless sensor networks. Our design goal is to eventually integrate DRKH with different emerging wireless technologies. However, in this paper, we will focus on the integration of DRKH with 802.11 standard since it is the most widely deployed wireless technology. The results and analysis show that DRKH overcomes all the security threats with Wired Equivalent Privacy (WEP) protocol while consuming a much lower power than WEP, Wi-Fi Protected Access (WPA) 1.0 and WPA 2.0.
Analyzing Ultra-Scale Application Communication Requirements for a Reconfigurable Hybrid Interconnect
Authors: John Shalf, Shoaib Kamil, Leonid Oliker, David Skinner
Venue: Proceedings of the 2005 ACM/IEEE conference on Supercomputing (2005)

The path towards realizing peta-scale computing is increasingly dependent on scaling up to unprecedented numbers of processors. To prevent the interconnect architecture between processors from dominating the overall cost of such systems, there is a critical need for interconnect solutions that both provide performance to ulta-scale applications and have costs that scale linearly with system size. In this work we propose the Hybrid Flexibly Assignable Switch Topology (HFAST) infrastructure. The HFAST approach uses both passive (circuit switch) and active (packet switch) commodity switch components to deliver all of the flexibility and fault-tolerance of a fully-interconnected network (such as a fat-tree), while preserving the nearly linear cost scaling associated with traditional low-degree interconnect networks. To understand the applicability of this technology, we perform an in-depth study of communication requirements across a broad spectrum of important scientific applications, whose computational methods include: finite-difference, latticebolzmann, particle in cell, sparse linear algebra, particle mesh ewald, and FFT-based solvers. We use the IPM (Integrated Performance Monitoring) profiling layer to gather detailed messaging statistics with minimal impact to code performance. This profiling provides us sufficiently detailed communication topology and message volume data to evaluate these applications in the context of the proposed hybrid interconnect. Overall results show that HFAST is a promising approach for practically addressing the interconnect requirements of future peta-scale systems.
Service Discovery in Pervasive Computing Environments
Authors: Fen Zhu, Matt W. Mutka, Lionel M. Ni
Venue: IEEE Pervasive Computing (2005)

Pervasive computing environments pose unique service discovery challenges, especially with regard to integrating computing devices with people and their ambient environments. Extremely dynamic environments and computing resources and security issues are also crucial issues. A survey of existing discovery protocol and a taxonomy of their components clarifies the open research problems for anytime, anywhere computing.
Signal segmentation and denoising algorithm based on energy optimisation
Authors: Sasan Mahmoodi, Bayan S. Sharif
Venue: Signal Processing (2005)

A nonlinear functional is considered in this short communication for time interval segmentation and noise reduction of signals. An efficient algorithm that exploits the signal geometrical properties is proposed to optimise the nonlinear functional for signal smoothing. Discontinuities separating consecutive time intervals of the original signal are initially detected by measuring the curvature and arc length of the smoothed signal. The nonlinear functional is then optimised for each time interval to achieve noise reduction of the original noisy signal. This algorithm exhibits robustness for signals characterised by very low signal to noise ratios.
Scenario optimization for interactive category search
Authors: Giang P. Nguyen, Marcel Worring
Venue: Proceedings of the 7th ACM SIGMM international workshop on Multimedia information retrieval (2005)

Most of the existing work in interactive content based retrieval concentrates on machine learning methods for effective use of relevance feedback. On the other end of the spectrum, the information visualization community focusses on effective methods for conveying information to the user. What lacks is research considering the information visualization and interactive content based retrieval as truly integrated parts of one search system. In such an integrated system there are many degrees of freedom like the number of images to display, the image size, different visualization modes, and possible feedback modes. To find optimal values for all of those using user studies is unfeasible. We therefore develop scenarios in which tasks and user actions are simulated. These are then optimized based on objective constraints and evaluation criteria. In such a manner the degrees of freedom are reduced and the remaining degrees can be evaluated in user studies. In this paper we present a system which integrates advanced similarity based visualization with active learning. We have performed extensive scenario based experimentation on an interactive category search task. The results show that indeed the use of advanced visualization and active learning pays off.
The UvA color document dataset
Authors: Leon Todoran, Marcel Worring, M. Smeulders
Venue: International Journal on Document Analysis and Recognition (2005)

Publications on color document image analysis present results on small, nonpublicly available datasets. In this paper we propose a well-defined and groundtruthed color dataset consisting of over 1000 pages, with associated tools for evaluation. As we focus on aspects specific to color documents, we leave out the document textual content in the ground truth. The color data groundtruthing and evaluation tools are based on a well-defined document model, complexity measures to assess the inherent difficulty of analyzing a page, and well-founded evaluation measures. Together they form a suitable basis for evaluating diverse applications in color document analysis. Both the dataset and the tools are available through our Web site at http: //www.science.uva.nl/UvA-CDD
Hardware/software managed scratchpad memory for embedded system
Authors: Andhi Janapsatya, Sri Parameswaran, A. Ignjatovic
Venue: Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design (2004)

We propose a methodology for energy reduction and performance improvement. The target system comprises of an instruction scratchpad memory instead of an instruction cache. Highly utilized code segments are copied into the scratchpad memory, and are executed from the scratchpad. The copying of code segments from main memory to the scratchpad is performed during runtime. A custom hardware controller is used to manage the copying process. The hardware controller is activated by strategically placed custom instructions within the executing program. These custom instructions inform the hardware controller when to copy during program execution. Novel heuristic algorithms are implemented to determine locations within the program to insert these custom instructions, as well as to choose the best sets of code segments to be copied to the scratchpad memory. For a set of realistic benchmarks, experimental results indicate the method uses 50.7% lower energy (on average) and improves performance by 53.2% (on average) when compared to a traditional cache system which is identical in size. Cache systems compared had sizes ranging from 256 to 16K bytes and associativities ranging from 1 to 32.
Computers and politics in China
Authors: Andrew C. Gordon
Venue: ACM SIGSOC Bulletin (1978)

Consider the following observations about the People's Republic of China:A team of "workers, peasants and soldiers" adhering in 1976 to the principle that "education must serve proletarian politics and be combined with productive labor," and working in a "simple workshop built through self-reliance" successfully developed a 1024-bit MOS random access memory chip for computers "with 5000 transistors on a chip one-fourth of the size of a fingernail."
Concurrent programming: thread-based synchronization versus job-based synchronization
Authors: Liubo Chen
Venue:  (2005)

Concurrent programming started in 1962 and has become more and more important with time passing. Synchronization plays an important role in concurrent programming. Two categories of synchronization can be identified: thread-based synchronization and job-based synchronization. This dissertation aims at giving the whole picture of shared-memory synchronization programming and providing programmers alternative synchronization programming methods. Part I of this dissertation deals with thread-based synchronization. First, formal synchronization programming methods such as global invariant approach and pattern-based approach are reviewed; second, the pattern-based approach is extended into real-time systems to solve general resource access problems with priority inversion control; and finally, cancellation of a thread involving synchronization with other threads is discussed in the context of the global invariant approach and the pattern-based approach. Part II of this dissertation focuses on job-based synchronization. As a typical example of such kind of synchronization, the synchronization problem in a thread-pool model is studied in detail.
Some thoughts on peer review of computing materials
Authors: Roberta Ash, Francis M. Sim, Ronald Anderson
Venue: ACM SIGSOC Bulletin (1974)

It is well known that over the past decade and a half social and behavioral scientists have become heavy users of computation facilities for a variety of purposes, chiefly in data-management and measurement analyses, in statistical analysis, both descriptive and inferential, and more recently in data and process simulations. At the same time, most social scientists have been, and many will continue to be, amateurs in computational practice. In addition, the types of computation which they need (or at least, have used) are often repetitive; relative to the total volume of use by social scientists there has been little demand for computational novelty.
Balancing Resource Utilization to Mitigate Power Density in Processor Pipelines
Authors: Michael D. Powell, Ethan Schuchman, T. N. Vijaykumar
Venue: Proceedings of the 38th annual IEEE/ACM International Symposium on Microarchitecture (2005)

Power density is a growing problem in high-performance processors in which small, high-activity resources overheat. Two categories of techniques, temporal and spatial, can address power density in a processor. Temporal solutions slow computation and heating either through frequency and voltage scaling or through stopping computation long enough to allow the processor to cool; both degrade performance. Spatial solutions reduce heat by moving computation from a hot resource to an alternate resource (e.g., a spare ALU) to allow cooling. Spatial solutions are appealing because they have negligible impact on performance, but they require availability of spatial slack in the form of spare or underutilized resource copies. Previous work focusing on spatial slack within a pipeline has proposed adding extra resource copies to the pipeline, which adds substantial complexity because the resources that overheat, issue logic, register files, and ALUs, are the resources in some of the tightest critical paths in the pipeline. Previous work has not considered exploiting the spatial slack already existing within pipeline resource copies. Utilization can be quite asymmetric across resource copies, leaving some copies substantially cooler than others. We observe that asymmetric utilization within copies of three key back-end resources, the issue queue, register files, and ALUs, creates spatial slack opportunities. By balancing asymmetry in their utilization, we can reduce power density. Scheduling policies for these resources were designed for maximum simplicity before power density was a concern; our challenge is to address asymmetric heating while keeping the pipeline simple. Balancing asymmetric utilization reduces the need for other performancedegrading temporal power-density techniques. While our techniques do not obviate temporal techniques in high-resource-utilization applications, we greatly reduce their use, improving overall performance.
An improved handwritten Chinese character recognition system using support vector machine
Authors: Jian-xiong Dong, Adam Krzyzak, Ching Y. Suen
Venue: Pattern Recognition Letters (2005)

This paper describes several techniques improving a Chinese character recognition system. Enhanced nonlinear normalization, feature extraction and tuning kernel parameters of support vector machine on a large data set with thousands of classes, contribute to improvement of the overall system performance. The enhanced nonlinear normalization method not only solves the aliasing problem in the original Yamada et al.'s nonlinear normalization method but also avoids the undue stroke distortion in the peripheral region of the normalized image. The support vector machine is for the first time tested on a large data set composed of several million samples and thousands of classes. The recognition system has achieved a high recognition rate of 99.0% on ETL9B, a handwritten Chinese character database.