ppxscal/embedding_network huggingface dataset:
Optimal Realization of Sets of Interconnection Functions on Synchronous Multiple Bus Systems
Authors: Priyalal Kulasinghe, Ahmed El-Amawy
Venue: IEEE Transactions on Computers (1996)

We develop a formal and systematic methodology for designing an optimal multiple bus system (MBS) realizing a set of interconnection functions whose graphical representation (denoted as IFG) is symmetric. The problem of constructing an optimal MBS for a given IFG is NP-Hard. In this paper, we show that polynomial time solutions exist when the IFG is vertex symmetric. This is the case of interest for the vast majority of important interconnection function sets.We present a particular partition (which can be found in polynomial time) on the edge set of a vertex symmetric IFG, that produces a symmetric MBS with minimum number of buses as well as minimum number of interfaces. We demonstrate several advantages of such an MBS over a direct-link architecture realizing the same IFG, in terms of the number of ports per processor, number of neighbors per processors, and the diameter.
Maximum Norm Analysis of Completely Discrete Finite Element Methods for Parabolic Problems
Authors: C. Palencia
Venue: SIAM Journal on Numerical Analysis (1996)

We consider full discretizations of linear parabolic initial value problems in any space dimension. Finite elements are used for the discretization in space. The resulting semidiscrete problem is integrated in time by means of a strongly A($\theta$)-acceptable rational method. Stability estimates are derived and error bounds are established in the maximum norm for both smooth and rough initial data.
NSF Center for Intelligent Information Retrieval
Authors: W. Bruce Croft
Venue: Communications of the ACM (1995)

The Center for Intelligent Information Retrieval (CIIR) was started at the University of Massachusetts two years ago to do research and technology transfer in the area of distributed, text-based information systems. The CIIR is part of the NSF State/Industry University Collaborative Research Centers program and relies heavily on government and industrial partners, in addition to federal funding. There are currently 24 members from a variety of industries and government agencies, and many of these are involved in both research and development projects.
PUMA: an operating system for massively parallel systems
Authors: Stephen R. Wheat, Arthur B. MacCabe, Rolf Riesen, David W. van Dresser, T. Mack Stallcup
Venue: Scientific Programming (1994)

This article presents an overview of PUMA (Performance-oriented, User-managed Messaging Architecture), a message-passing kernel for massively parallel systems. Message passing in PUMA is based on portals - an opening in the address space of an application process. Once an application process has established a portal, other processes can write values into the portal using a simple send operation. Because messages are written directly into the address space of the receiving process, there is no need to buffer messages in the PUMA kernel and later copy them into the applications address space. PUMA consists of two components: the quintessential kernel (Q-Kernel) and the process control thread (PCT). Although the PCT provides management decisions, the Q-Kernel controls access and implements the policies specified by the PCT.
Translation: myth or reality? (panel)
Authors: Grady Booch, Steven Fraser, Robert C. Martin, Steven J. Mellor, Michael Lee, Steven Garone, Martin Fowler, Douglas C. Schmidt, Marie Lenzi
Venue: Proceedings of the 11th ACM SIGPLAN conference on Object-oriented programming, systems, languages, and applications (1996)

In the realm of OO methodologies there are two major schools of thought. Both schools claim to define mechanisms whereby software applications can be created that are reusable, maintainable, and robust. Moreover, both schools claim to use abstraction as a key mechanism for achieving these benefits. At issue is whether or not these two schools are fundamentally different, or just variations on an object-oriented theme.Shlaer and Mellor have dubbed one of these schools "Translational". In the translational approach, two models are created. One is an abstract model of the application domain which is devoid of any design dependencies. The other model is an abstract model of the design which is devoid of any application dependencies. These two models are composed automatically to yield the code for the system.The other school - supported by Booch, Rumbaugh, Jacobson, and Martin - views the architecture of a system from several different perspectives of abstraction, e.g. logical, physical. These abstractions typically form a layer; abstractions in the logical sense manifest themselves as individual classes as well as collaborations of classes. There may be one layered model, at different layers of abstraction, or, especially given the Objectory view point, there may be multiple models, with an analysis model that's nearly independent from the design model.The panel will explore: bull; Is there a seamless transition between analysis and design? bull; Should there be a single model or should there be two - one for the analysis and one for the design? bull; If there are two models, how are they "bridged"? bull; What, if any, are the differences in process between the two schools? bull; How does architecture manifest itself! bull; Is there, in fact, a real difference between the two schools of thought?As a result of this exploration, we hope to answer the question: Is translation a myth or is it a reality?
Smoothly Global Stabilizability by Dynamic Feedback and Generalizations of Artstein's Theorem
Authors: John Tsinias
Venue: SIAM Journal on Control and Optimization (1995)

The purpose of this paper is to explore the dynamic feedback stabilization problem for general nonlinear systems extending previous works of Artstein, Sontag, and the author. First, sufficient conditions for global stabilization by smooth dynamic feedback are provided concerning a wide class of triangular systems, where the linearization at the equilibrium is controllable. For the general nonlinear case, we derive a necessary and sufficient condition for global stabilization by means of an almost smooth dynamic feedback.
Describing Prolog by its interpretation and compilation
Authors: Jacques Cohen
Venue: Communications of the ACM (1985)

Since its conception, Prolog has followed a developmental course similar to the early evolution of LISP. Although the version of Prolog described here typifies that currently in use, it should be considered within the framework of language evolution.
Affine Reconstruction from Perspective Image Pairs with a Relative Object-Camera Translation in Between
Authors: T. Moons, L. Van Gool, M. Proesmans, E. Pauwels
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1996)

A method is described to recover the three-dimensional affine structure of a scene consisting of at least five points identified in two perspective views with a relative object-camera translation in between. When compared to the results for arbitrary stereo views, a more detailed reconstruction is possible using less information. The method presented only assumes that the two images are obtained by identical cameras, but no knowledge about the intrinsic parameters of the camera(s) or about the performed translation is assumed. By the same method, affine 3D reconstruction from a single view can be achieved for parallel structures. In that case, four points suffice for affine reconstruction.
Reuse contracts: managing the evolution of reusable assets
Authors: Patrick Steyaert, Carine Lucas, Kim Mens, Theo D'Hondt
Venue: ACM SIGPLAN Notices (1996)

A critical concern in the reuse of software is the propagation of changes made to reusable artifacts. Without techniques to manage these changes, multiple versions of these artifacts will propagate through different systems and reusers will not be able to benefit from improvements to the original artifact. We propose to codify the management of change in a software system by means of reuse contracts that record the protocol between managers and users of a reusable asset. Just as real world contracts can be extended, amended and customised, reuse contracts are subject to parallel changes encoded by formal reuse operators: extension, refinement and concretisation. Reuse contracts and their operators serve as structured documentation and facilitate the propagation of changes to reusable assets by indicating how much work is needed to update previously built applications, where and how to test and how to adjust these applications.
Developing the VLSI laboratory for the computer architecture course
Authors: Arturo I. Concepcion, David R. Millican
Venue: ACM SIGCSE Bulletin (1996)

The paper presents an alternative way of having a hardware laboratory for the computer architecture course that is taught in every computer science curricula. For institutions like CSUSB, with no College of Engineering, having an actual hardware laboratory will be cost prohibitive. An alternative way is to have a set of computer-aided design (CAD) tools where students can design hardware and then test their designs using simulation. This has been done at CSUSB. By using MAGIC (a VLSI layout design tool) and IRSIM (a functional logic simulator) the VLSI Design Laboratory was developed for the computer architecture course in the Department of Computer Science. The VLSI Design Laboratory was implemented using the machines obtained from a matching equipment grant from IBM which consists of five IBM RS/6000s and 15 XStations. The paper presents how the laboratory complements the lecture and how the students learn the hierarchical design methodology of VLSI circuits. Future directions of the VLSI Design Laboratory are also presented.
Approximation Algorithms for Minimum-Time Broadcast
Authors: Guy Kortsarz, David Peleg
Venue: SIAM Journal on Discrete Mathematics (1995)

This paper deals with the problem of broadcasting in minimum time in the telephone and message-passing models. Approximation algorithms are developed for arbitrary graphs as well as for several restricted graph classes. In particular, an $O(\sqrt{n})$-additive approximation algorithm is given for broadcasting in general graphs, and an $O(\log n/\log\log n)$ (multiplicative) ratio approximation is given for broadcasting in the open-path model. This also results in an algorithm for broadcasting on random graphs (in the telephone and message-passing model) that yields an $O(\log n/\log\log n)$ approximation with high probability. In addition, the paper presents a broadcast algorithm for graph families with small separators (such as chordal, $k$-outerplanar, bounded-face planar, and series-parallel graphs), with approximation ratio proportional to the separator size times $\log n$. Finally, an efficient approximation algorithm is presented for the class of graphs representable as trees of cliques.
Spanners of Hypercube-Derived Networks
Authors: Marie-Claude Heydemann, Joseph G. Peters, Dominique Sotteau
Venue: SIAM Journal on Discrete Mathematics (1996)

A spanning subgraph $G'$ of a simple undirected graph $G$ is a t-spanner of $G$ if every pair of vertices that are adjacent in $G$ are at distance at most $t$ in $G'$. The parameter $t$ is called the dilation of the spanner. Spanners with small dilations have many applications, such as their use as low-cost approximations of communication networks with only small degradations in performance. In this paper, we derive spanners with small dilations for four closely related bounded-degree approximations of hypercubes: butterflies, cube-connected cycles, binary de Bruijn graphs, and shuffle-exchange graphs. We give both direct constructions and methods for deriving spanners for one class of graphs from spanners for another class. We prove that most of our spanners are minimum in the sense that spanners with fewer edges have larger dilations.
The STATEMATE semantics of statecharts
Authors: David Harel, Amnon Naamad
Venue: ACM Transactions on Software Engineering and Methodology (TOSEM) (1996)

We describe the semantics of statecharts as implemented in the STATEMATE system. This was the first executable semantics defined for the language and has been in use for almost a decade. In terms of the controversy around whether changes made in a given step should take effect in the current step or in the next one, this semantics adopts the latter approach.
Algorithm for Julian dates
Authors: Richard L. Branham,  Jr.
Venue: ACM SIGNUM Newsletter (1995)

C functions are given that allow one to calculate a Julian day number for a day, month, and year on the Julian calendar, take a Julian day number and convert it to a day, month, and year on the Julian calendar, and find the day of the week that corresponds to a day, month, and year on the Julian calendar.
Visual querying for digital libraries using dynamic hypertext aggregates: the DH31CI prototype
Authors: Montassar BenMrad, Giovanni Coray
Venue: ACM SIGWEB Newsletter (1995)

In the last few years, digital libraries have received a lot of attention given a maturation of recent technological achievements, particularly in the case of wide-spread computer networks, high-capacity storage media and more powerful personal computers [I]. Nevertheless, user needs must often be expressed through cryptic command languages that are still difficult to learn and to master. Documents relevant to the query are usually presented as a fiat list of titles that can be called by the user.
Combining simulation and scheduling: an application in the office furniture industry using ARENA and PREACTOR
Authors: K. Heinz Weigl
Venue: Proceedings of the 27th conference on Winter simulation (1995)

This paper describes the combination of a proprietary finite capacity scheduling package, PREACTOR 200, with the ARENA simulation package to provide a day-to-day scheduling tool for the assembly of office furniture by a company in Austria. The keyword of this project is "Factory in a Factory," or FIF, which denotes how the assembly facility is broken down into sub-units that are responsible for assembling different types of furniture. Previously ARENA had been used to model the interactions that occur within each FIF (labor, buffer space, access to the conveyors) and ensure that product arrived at the right time to the delivery area at the end of a main conveyor so that containers (that are used to transport orders to different locations around Europe) could be filled in the correct sequence. It was clear from this preliminary work that sequencing of product assembly in each FIF and load leveling, whereby the number of operators in each FIF could be changed according to product mix, were key to the functioning of the facility.
Techniques for reducing consistency-related communication in distributed shared-memory systems
Authors: John B. Carter, John K. Bennett, Willy Zwaenepoel
Venue: ACM Transactions on Computer Systems (TOCS) (1995)

Distributed shared memory (DSM) is an abstraction of shared memory on a distributed-memory machine. Hardware DSM systems support this abstraction at the architecture level; software DSM systems support the abstraction within the runtime system. One of the key problems in building an efficient software DSM system is to reduce the amount of communication needed to keep the distributed memories consistent. In this article we present four techniques for doing so: software release consistency; multiple consistency protocols; write-shared protocols; and an update-with-timeout mechanism. These techniques have been implemented in the Munin DSM system. We compare the performance of seven Munin application programs: first to their performance when implemented using message passing, and then to their performance when running on a conventional software DSM system that does not embody the preceding techniques. On a 16-processor cluster of workstations, Munin's performance is within 5% of message passing for four out of the seven applications. For the other three, performance is within 29 to 33%. Detailed analysis of two of these three applications indicates that the addition of a function-shipping capability would bring their performance to within 7% of the message-passing performance. Compared to a conventional DSM system, Munin achieves performance improvements ranging from a few to several hundred percent, depending on the application.
PYTHIA: a knowledge-based system to select scientific algorithms
Authors: Sanjiva Weerawarana, Elias N. Houstis, John R. Rice, Anupam Joshi, Catherine E. Houstis
Venue: ACM Transactions on Mathematical Software (TOMS) (1996)

Problem-solving environments (PSEs) interact with the user in a language &ldquo;natural&rdquo; to the associated discipline, and they provide a high-level abstraction of the underlying, computationally complex model. The knowledge-based system PYTHIA addresses the problem of (parameter, algorithm) pair selection within a scientific computing domain assuming some minimum user-specified computational objectives and some characteristics of the given problem. PYTHIA's framework and methodology are general and applicable to any class of scientific problems and solvers. PYTHIA is applied in the context of Parallel ELLPACK where there are many alternatives for the numerical solution of elliptic partial differential equations (PDEs). PYTHIA matches the characteristics of the given problem with those of PDEs in an existing problem population and then uses performance profiles of the various solvers to select the appropriate method given user-specified error and solution time bounds. The profiles are automatically generated for each solver of the Parallel ELLPACK library. &mdash;Authors' Abstract
High-bandwidth address translation for multiple-issue processors
Authors: Todd M. Austin, Gurindar S. Sohi
Venue: Proceedings of the 23rd annual international symposium on Computer architecture (1996)

In an effort to push the envelope of system performance, microprocessor designs are continually exploiting higher levels of instruction-level parallelism, resulting in increasing bandwidth demands on the address translation mechanism. Most current microprocessor designs meet this demand with a multi-ported TLB. While this design provides an excellent hit rate at each port, its access latency and area grow very quickly as the number of ports is increased. As bandwidth demands continue to increase, multi-ported designs will soon impact memory access latency.We present four high-bandwidth address translation mechanisms with latency and area characteristics that scale better than a multiported TLB design. We extend traditional high-bandwidth memory design techniques to address translation, developing interleaved and multi-level TLB designs. In addition, we introduce two new designs crafted specifically for high-bandwidth address translation. Piggyback ports are introduced as a technique to exploit spatial locality in simultaneous translation requests, allowing accesses to the same virtual memory page to combine their requests at the TLB access port. Pretranslation is introduced as a technique for attaching translations to base register values, making it possible to reuse a single translation many times.We perform extensive simulation-based studies to evaluate our designs. We vary key system parameters, such as processor model, page size, and number of architected registers, to see what effects these changes have on the relative merits of each approach. A number of designs show particular promise. Multi-level TLBs with as few as eight entries in the upper-level TLB nearly achieve the performance of a TLB with unlimited bandwidth. Piggyback ports combined with a lesser-ported TLB structure, e.g., an interleaved or multi-ported TLB, also perform well. Pretranslation over a single-ported TLB performs almost as well as a same-sized multi-level TLB with the added benefit of decreased access latency for physically indexed caches.
Evaluating multi-port frame buffer designs for a mesh-connected multicomputer
Authors: Gordon Stoll, Bin Wei, Douglas Clark, Edward W. Felten, Kai Li, Patrick Hanrahan
Venue: ACM SIGARCH Computer Architecture News (1995)

Multicomputers can be effectively used for interactive graphics rendering only if there are mechanisms available to rapidly composite and transfer images to an external display device. One method for achieving the necessary bandwidth for this operation is to provide multiple high-bandwidth ports into a frame buffer. In this paper, we evaluate the design space of a multiport frame buffer design for the Intel Paragon mesh routing network. We use an instrumented rendering system to capture the graphics operations needed for rendering a number of three-dimensional scenes; we then use those workloads as input to test programs running on the Paragon to estimate the performance of our hardware. Our experiments consider three major design questions: how many network ports the frame buffer needs, whether Z-Buffering should be done in hardware on the frame buffer or in software on the computing nodes, and whether the design alternatives are scalable.
CPSim: a tool for creating scalable discrete event simulations
Authors: Bojan Grošelj
Venue: Proceedings of the 27th conference on Winter simulation (1995)

CPSim is a tool that was originally designed for parallel simulations. A strict separation between the CPSim kernel and its application library enabled the creation of a serial version, preserving the user interface in the process. In other words, the same source simulation program written in C that uses the CPSim library may be compiled to run on a personal computer or on a multicomputer. The paper presents the CPSim programming model that enabled scalability and portability. It is also shown that a CPSim simulation executed on a single processor can outperform a classical event list simulation.
Eta-expansion does The Trick
Authors: Olivier Danvy, Karoline Malmkjær, Jens Palsberg
Venue: ACM Transactions on Programming Languages and Systems (TOPLAS) (1996)

Partial-evaluation folklore has it that massaging one's source programs can make them specialize better. In Jones, Gomard, and Sestoft's recent textbook, a whole chapter is dedicated to listing such &ldquo;binding-time improvements&rdquo;: nonstandard use of continuation-passing style, eta-expansion, and a popular transformation called &ldquo;The Trick.&rdquo; We provide a unified view of these binding-time improvements, from a typing perspective. Just as a proper treatment of product values in partial evaluation requires partially static values, a proper treatment of disjoint sums requires moving static contexts across dynamic case expressions. This requirement precisely accounts for the nonstandard use of continuation-passing style encountered in partial evaluation. Eta-expansion thus acts as a uniform binding-time coercion between values and contexts, be they of function type, product type, or disjoint-sum type. For the latter case, it enables &ldquo;The Trick.&rdquo; In this article, we extend Gomard and Jones' partial evaluator for the &lgr;-calculus, &lgr;-Mix, with products and disjoint sums; we point out how eta-expansion for (finite) disjoint sums enable The Trick; we generalize our earlier work by identifying the eta-expansion can be obtained in the binding-time analysis simple by adding two coercion rules; and we specify and prove the correctness of our extension to &lgr;-Mix.
Incremental computation of dominator trees
Authors: Vugranam C. Sreedhar, Guang R. Gao, Yong-fong Lee
Venue: ACM SIGPLAN Notices (1995)

Data flow analysis based on an incremental approach may require that the dominator tree be correctly maintained at all times. Previous solutions to the problem of incrementally maintaining dominator trees were restricted to reducible flowgraphs. In this paper we present a new algorithm for incrementally maintaining the dominator tree of an arbitrary flowgraph, either reducible or irreducible, based on a program representation called the DJ-graph. For the case where an edge is inserted, our algorithm is also faster than previous approaches (in the worst case). For the deletion case, our algorithm is likely to run fast on the average cases.