ppxscal/embedding_network huggingface dataset:
PeerAccess: a logic for distributed authorization
Authors: Marianne Winslett, Charles C. Zhang, Piero A. Bonatti
Venue: Proceedings of the 12th ACM conference on Computer and communications security (2005)

This paper introduces the PeerAccess framework for reasoning about authorization in open distributed systems, and shows how a parameterization of the framework can be used to reason about access to computational resources in a grid environment. The PeerAccess framework supports a declarative description of the behavior of peers that selectively push and/or pull information from certain other peers. PeerAccess local knowledge bases encode the basic knowledge of each peer (e.g., Alice's group memberships), its policies governing the release of each possible piece of information to other peers, and information that guides and limits its search process when trying to obtain particular pieces of information from other peers. PeerAccess proofs of authorization are verifiable and nonrepudiable, and their construction relies only on the local information possessed by peers and their parameterized behavior with respect to query answering, information push/pull, and information release policies (i.e., no omniscient viewpoint is required). We present the PeerAccess language and peer knowledge base structure, the associated formal semantics and proof theory, and examples of the use of PeerAccess in constructing proofs of authorization to access computational resources.
qwikWeb: integrating mailing list and WikiWikiWeb for group communication
Authors: Kouichirou Eto, Satoru Takabayashi, Toshiyuki Masui
Venue: Proceedings of the 2005 international symposium on Wikis (2005)

We have developed a new powerful group communication system qwikWeb, which is an integration of a WikiWikiWeb (wiki) and a mailing list system. Mailing lists are useful for exchanging dynamic information among people, but not useful for sharing static information. Wikis are useful for storing and editing static information on the Web, but sometimes people want to restrict the users or want to know who is responsible for the edited wiki page. Also, casual users cannot create a wiki site or a mailing list easily.We solved these problems by combining wiki and mailing list. Users of qwikWeb can create a wiki site and a mailing list simply by sending an e-mail message to the qwikWeb server, and start exchanging information by using the mailing list. All the messages sent to the mailing list are stored as newly created wiki pages, and they can be edited as standard wiki pages.In this paper, we describe the basic ideas, implementation details, and user experiences of the system.
Soft Error Modeling and Protection for Sequential Elements
Authors: Hossein Asadi, Mehdi B. Tahoori
Venue: Proceedings of the 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (2005)

Sequential elements, flip-flops, latches, and memory cells, are the most vulnerable components to soft errors. Since state-of-the-art designs contain millions of bistables, it is not feasible to protect all system bistables using hardening techniques that impose area, performance, and power overhead. A practical approach is to rank system bistables based on their contribution to the overall system vulnerability and protect the most problematic bistables. This analysis is traditionally performed by fault injection and simulation methods which are intractable for large designs and multi-cycle analysis. In this paper, we present an analytical framework to analyze multi-cycle error propagation behavior and then rank system bistables based on their effects on system-level soft error rate. The number of clock cycles required for an error in a bistable to be propagated to system outputs is used to measure the vulnerability of bistables to soft errors.
Automatic measurement of quality metrics for colonoscopy videos
Authors: Sae Hwang, JungHwan Oh, JeongKyu Lee, Yu Cao, Wallapak Tavanapong, Danyu Liu, Johnny Wong, Piet C. de Groen
Venue: Proceedings of the 13th annual ACM international conference on Multimedia (2005)

Colonoscopy is the accepted screening method for detection of colorectal cancer or its precursor lesions, colorectal polyps. Indeed, colonoscopy has contributed to a decline in the number of colorectal cancer related deaths. However, not all cancers or large polyps are detected at the time of colonoscopy, and methods to investigate why this occurs are needed. We present a new computer-based method that allows automated measurement of a number of metrics that likely reflect the quality of the colonoscopic procedure. The method is based on analysis of a digitized video file created during colonoscopy, and produces information regarding insertion time, withdrawal time, images at the time of maximal intubation, the time and ratio of clear versus blurred or non-informative images, and a first estimate of effort performed by the endoscopist. As these metrics can be obtained automatically, our method allows future quality control in the day-to-day medical practice setting on a large scale. In addition, our method can be adapted to other healthcare procedures. Last but not least, our method may be useful to assess progress during colonoscopy training, or as part of endoscopic skills assessment evaluations.
A Hierarchical Method for Automated Identification and Segmentation of Forms
Authors: S. Mandal, S. P. Chowdhury, A. K. Das, Bhabatosh Chanda
Venue: Proceedings of the Eighth International Conference on Document Analysis and Recognition (2005)

In this paper we propose a fully automatic hierarchical method for identification of forms using global as well as local features. Moments of certain orders are considered as global shape features and are utilised to reduce the search space by selecting a subset of forms present in the database. The type of the candidate form is then identified within this subset through detail analysis using local geometrical and topological features. The candidate form is then segmented to extract the user-filled information.
Making History: an Emergent System for the Systematic Accrual of Transcriptions of Historic Manuscripts
Authors: F. Carrera
Venue: Proceedings of the Eighth International Conference on Document Analysis and Recognition (2005)

To date, only a small percentage of the earth's historical written records have been tapped into to contribute to our knowledge of our past. Our project aims at leveraging the work of the thousands of frequent or occasional visitors of the world's archives to accumulate and disseminate the raw transcriptions produced by the army of researchers who are digging into this treasure-trove of information from our antiquity. Since written records of our past are by definition finite, our system will put in place a mechanism that promises to capture - once and for all - the written records that our ancestors left behind. This paper describes an emergent system architecture that promises to eliminate redundancy by gradually yet systematically creating a cumulative, distributed, electronic repository of digital transcriptions of the written records form our past, that can be shared and searched without duplications and overlaps. Testing and evaluation of the system will begin in the summer of 2005.
Efficiently Mining Gene Expression Data via a Novel Parameterless Clustering Method
Authors: Vincent S. Tseng, Ching-Pin Kao
Venue: IEEE/ACM Transactions on Computational Biology and Bioinformatics (TCBB) (2005)

Clustering analysis has been an important research topic in the machine learning field due to the wide applications. In recent years, it has even become a valuable and useful tool for in-silico analysis of microarray or gene expression data. Although a number of clustering methods have been proposed, they are confronted with difficulties in meeting the requirements of automation, high quality, and high efficiency at the same time. In this paper, we propose a novel, parameterless and efficient clustering algorithm, namely, Correlation Search Technique (CST), which fits for analysis of gene expression data. The unique feature of CST is it incorporates the validation techniques into the clustering process so that high quality clustering results can be produced on the fly. Through experimental evaluation, CST is shown to outperform other clustering methods greatly in terms of clustering quality, efficiency, and automation on both of synthetic and real data sets.
Fieldbuses Education Using Training Systems Designed with State-of-the-Art Technologies
Authors: Perfecto Marino, Miguel Angel Dominguez, Francisco Poza, Fernando Machado
Venue: Proceedings of the 18th International Conference on Systems Engineering (2005)

The industrial communication networks or fieldbuses have experienced a great growth in the last years due to the complexity achieved by the automation systems in several areas (industrial control, automotive, aircrafts, ships, home automation, etc.). Therefore, it is very interesting and essential the use of starter and training systems that can be applied in the educational process of technical degree courses. Thus, students can acquire a practical knowledge about the different fieldbus protocols existing in the market. This paper describes the design of different nodes that constitute a starter and training industrial network with application in the teaching of the CAN (Controller Area Network) protocol. These nodes have been designed and developed by the authors using different state-of-the-art technologies, looking for an educational purpose. The starter and training CAN network that is described in this paper is made up of one monitoring station (protocol analyser), one control module, one device based on the microcontroller 8751, one device based on reconfigurable circuit (FPGA: Field Programmable Gate Array) and several Input/Output devices based on the integrated circuit P82C150 SLIO-CAN.
On the Convergence of Successive Linear-Quadratic Programming Algorithms
Authors: Richard H. Byrd, Nicholas I. M. Gould, Jorge Nocedal, Richard A. Waltz
Venue: SIAM Journal on Optimization (2005)

The global convergence properties of a class of penalty methods for nonlinear programming are analyzed. These methods include successive linear programming approaches and, more specifically, the successive linear-quadratic programming approach presented by Byrd et al. [Math. Program., 100 (2004), pp. 27--48]. Every iteration requires the solution of two trust-region subproblems involving piecewise linear and quadratic models, respectively. It is shown that, for a fixed penalty parameter, the sequence of iterates approaches stationarity of the penalty function. A procedure for dynamically adjusting the penalty parameter is described, and global convergence results for it are established.
Video Streaming Over Multi-hop Wireless Networks
Authors: Hao Wang, Andras Farago, Subbarayan Venkatesan
Venue: Proceedings of the Seventh IEEE International Symposium on Multimedia (2005)

In this paper, we considered the problem of transporting layered video over erroneous multi-hop wireless networks and proposed a Distributed System. Our proposed Distributed Scheme is comprised of Distributed Control (DC), Distributed Buffer (DB) and Distributed Error Control schemes. The DC scheme improves the efficiency of the network bandwidth usage and reduces the end-to-end delay of the streaming application. End-to-end delay jitter can be reduced by proper use of the DB nodes' buffer. Replacing the traditional FEC and ARQ with our distributed FEC and ARQ scheme reduces the errorprotection overhead and ARQ delay and improves the wireless channel throughput. A Layered Video module is developed in GlomoSim 2.03 for video streaming application. We simulated our Distributed Scheme employing the Layered Video module in GlomoSim 2.03. Our simulation results confirm that QoS of Streaming Video over erroneous multi-hop wireless network can be improved using our proposed Distributed Scheme.
On authenticated computing and RSA-based authentication
Authors: Jean-Pierre Seifert
Venue: Proceedings of the 12th ACM conference on Computer and communications security (2005)

This paper presents a novel hardware attack against RSA-based authentication of programs. Like the seminal paper from [10] it exploits the attacker's ability to arbitrarily tamper with a computational device during its data processing. But, contrary to [10] our method targets the RSA signature verification which processes only public data. Surprisingly, we prove how to let the RSA verification process accept signatures (with high probability and assuming the Riemann Hypothesis) of arbitrary code --- signed with our own self-created private key. While our attack is so far only theoretical, its practical feasibility has been already implicitly confirmed, cf. [6]. In fact, through real experiments with tamper-resistant devices [4] discovered the following caveat being at the heart of our vulnerability: the most often observed fault during RSA-computations exposed to glitch attacks is the erroneous modification of the moduli. Moreover, our attack relies only upon the simplest and most easiest practically implementable fault induction method described by [8]. Our idea is somehow inspired by practiced methods circumventing the FLASH Boot ROM authentication mechanism of the Xbox due to F. Lehner, cf[17]. Our attack can be interpreted as the extrapolation of the mathematical foundation underlying those Xbox vulnerabilities.
Toward a Logical Tool for Generating New Arguments in an Argumentation Based Framework
Authors: Geoffroy Aubry, Vincent Risch
Venue: Proceedings of the 17th IEEE International Conference on Tools with Artificial Intelligence (2005)

Following the framework proposed by Besnard and Hunter for argumentation, this paper aims to propose a logical tool for the generation of new arguments when two formal agents have to face their respective knowledge. The following notions are addressed: the behaviour of an agent facing an argument, the answer of an agent in front of a set of formulas, and relations among arguments. X-logics, a nonmonotonic extension of classical propositional logic proposed by Siegel and Forget, is used as the background formalism for representing the reasoning of the agents on arguments.
Rewriting-Based Optimization for XQuery Transformational Queries
Authors: Maxim Grinev, Peter Pleshachkov
Venue: Proceedings of the 9th International Database Engineering & Application Symposium (2005)

The modern XML query language called XQuery includes advanced facilities both to query and to transform XML data. An XQuery query optimizer should be able to optimize any query. For "querying" queries almost all techniques inherited from SQL-oriented DBMS may be applied. The XQuery transformation facilities are XML-specific and have no counterparts in other query languages. That is why XQuery transformational queries need to be optimized with novel techniques. In this paper two kinds of such techniques (namely push predicates down XML element constructors and projection of transformation) are considered. A subset of XQuery for which these techniques can be fully implemented is identified. This subset seems to be the most interesting from the practical viewpoint. Rewriting rules for this subset are proposed and the correctness of these rules is formally justified. For the rest of the language we propose solutions that works for the most of common cases or consider the problems we have encountered.
Using Level Restoring Method for Dual Supply Voltage
Authors: K. Sadeghi, M. Emadi, F. Farbiz
Venue: Proceedings of the 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (2006)

A new level converter for use in dual voltage SOI digital circuits is presented. This technique uses the idea of keeper transistors, and consumes less power compared to the traditional methods. The effects of load capacitance on the circuit are studied by extensive simulations.
Reusing Traces in a Dynamic Conditional Execution Architecture
Authors: Tatiana Gadelha Serra dos Santos, Sergio Bampi, Philippe O. A. Navaux
Venue: Proceedings of the 17th International Symposium on Computer Architecture on High Performance Computing (2005)

The cost of control and data dependences in superscalar processors is still an open issue, for what no definitive solution was yet found. Moreover, the cost of branch mispredictions is getting worse due to the increasing number of pipeline stages. The Dynamic Conditional Execution (DCE) is a new approach to address this problem. The basic idea is to fetch and execute all paths produced by a branch that obey certain restrictions regarding complexity and size. As a consequence, a smaller number of predictions is performed, and therefore, a smaller number of branches is mispredicted. Although the execution of multiple paths of certain branches allows for a reduction in branch misprediction penalties, it implies on an increase in the number of executed instructions. Thus, an alternative to reduce the overhead created by DCE pipeline is to reuse previously executed values, freeing up resources for more useful instructions. The goal of this work is to analyze the impact of value reuse in DCE architecture. As it will be presented, this effectively reduces the overhead produced by the architecture, increasing the overall performance. This paper shows that, in some cases, the speedup gain exceeds 60% over the original DCE architecture.
Data Partitioning over Data Streams Based on Change-aware Sampling
Authors: Yongli Wang, Hongbing Xu, Yisheng Dong, Xuejun Liu, Jiangbo Qian
Venue: Proceedings of the IEEE International Conference on e-Business Engineering (2005)

A novel data partitioning method adapted to a distributed parallel streams processing system for power industry is proposed. This method uses changeaware sampling algorithm that can guarantee low error to describe the distribution characteristics of the data-values first. And then it uses an improved heuristic constructing equal depth histograms algorithm to generate approximate partition vector efficiently. Experiments results on actual data prove that the proposed method is efficient, practical and suitable for time-varying data streams processing.
Analog performance space exploration by Fourier-Motzkin elimination with application to hierarchical sizing
Authors: G. Stehr, H. Graeb, K. Antreich
Venue: Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design (2004)

Analog performance space exploration identifies the range of feasible performance values of a given circuit topology. It is an extremely challenging task of great importance to topology selection and hierarchical sizing. In this paper, a novel technique for the efficient simulation-based exploration of high-dimensional performance spaces is presented. To this end, fundamental circuit design knowledge is described by constraint functions. Based on a linearization of the latter and of the circuit performance functions, a description of the feasible performance range in the form of a polytope is derived. Moreover, the approach is integrated into a hierarchical sizing method, where it propagates topological and technological constraints bottom-up. Practical application results demonstrate the efficiency and usefulness of the new method.
Graphical Passwords: A Survey
Authors: Xiaoyuan Suo, Ying Zhu, G. Scott. Owen
Venue: Proceedings of the 21st Annual Computer Security Applications Conference (2005)

The most common computer authentication method is to use alphanumerical usernames and passwords. This method has been shown to have significant drawbacks. For example, users tend to pick passwords that can be easily guessed. On the other hand, if a password is hard to guess, then it is often hard to remember. To address this problem, some researchers have developed authentication methods that use pictures as passwords. In this paper, we conduct a comprehensive survey of the existing graphical password techniques. We classify these techniques into two categories: recognition-based and recall-based approaches. We discuss the strengths and limitations of each method and point out the future research directions in this area. We also try to answer two important questions: "Are graphical passwords as secure as text-based passwords?"; "What are the major design and implementation issues for graphical passwords?" This survey will be useful for information security researchers and practitioners who are interested in finding an alternative to text-based authentication methods.
A via-configurable regular fabric for nanometer technology
Authors: Yajun Ran
Venue:  (2005)

Nowadays very-large-scale-integration (VLSI) technology has advanced into the manometer era, The sharp increase in manufacturing and design complexity has made a fully-customized chip extremely difficult to design and fabricate. The huge design and manufacturing cost, particularly the cost of a full set of masks, has contributed to a significant decrease in new design starts lately, On the other hand, field-programmable gate arrays (FPGAs) still cannot compete with cell-based designs in performance, area and power consumption. As a third alternative, structured-ASICs have become promising to fill the gap between cell-based and FPGA-based designs. In this work, a novel via-configurable regular fabric is proposed. The fabric has pre-fabricated transistors, contacts, metal-1 (M1) wires and a fixed metal-2 (M2) mask. A single via-mask between M1 and M2 is used to implement different functionality and local connections. Due to the very high flexibility of our base cells, the fabric can achieve pretty high utilization and packing density. Because the layout structure is similar to standard cells, the performance of our fabric is comparable to that of cell-based designs. To further reduce mask cost, different via-configurable routing architectures are explored. Our crossover crossbar routing structure achieves the best throughput and helps reduce routing congestion and chip area. We show how to make a single-routing-via-mask fabric and examine its induced penalty on circuit performance and area. We also develop a complete design flow for our fabric. The routability-driven flow intelligently allocates white-space in-place when routing resources are insufficient and applies an efficient incremental cell-movement technique for congestion reduction. The flow can also be used by fabric vendors to quickly evaluate the trade-off between logic and routing resources in a fabric and to deliver a series of fabric chips for different application needs. Using the flow, we compare our via-configurable gate array (VCGA) to cell-based and FPGA-based designs. On average, a design implemented based on VCGA can achieve close performance and comparable area to the cell-based implementation. It's much faster and smaller than the FPGA-based implementation.
A Transport Layer Approach to Handover in IP Networks
Authors: Eric Beda, Neco Ventura
Venue: Proceedings of the Joint International Conference on Autonomic and Autonomous Systems and International Conference on Networking and Services (2005)

In this paper we scrutinize the applicability of network layered mobility schemes, in particular Mobile IP, within a mobile environment. We argue that a Transport Layer solution is better suited to support handover mechanisms, because not only will it reduce the overall complexity of the handover process but also it will permit applications to take advantage of influencing handover management. In this paper we present a concept of Socketless TCP (SLTCP) that may be used to enhance packet multiplexing and de-multiplexing at the transport layer to support address migration and handover mechanism.