ppxscal/embedding_network huggingface dataset:
Tinmith-Metro: New Outdoor Techniques for Creating City Models with an Augmented Reality Wearable Computer
Authors: Wayne Piekarski, Bruce H. Thomas
Venue: Proceedings of the 5th IEEE International Symposium on Wearable Computers (2001)

This paper presents new techniques for capturing and viewing on site 3D graphical models for large outdoor objects. Using an augmented reality wearable computer, we have developed a software system, known as Tinmith-Metro. Tinmith-Metro allows users to control a 3D constructive solid geometry modeller for building graphical objects of large physical artefacts, for example buildings, in the physical world. The 3D modeller is driven by a new user interface known as Tinmith-Hand, which allows the user to control the modeller using a set of pinch gloves and hand tracking. These techniques allow user to supply their AR renderers with models that would previously have to be captured with manual, time-consuming, and/or expensive methods.
Programming concurrency and synchronisation in Actel
Authors: Z. Abdelouahab, P. M. Dew
Venue: Proceedings of the 1996 International Conference on Parallel and Distributed Systems (1996)

This paper introduces mechanisms for exploiting concurrency and synchronisation in Actel: a concurrent object based language. It focuses on issues of combining parallelism with object orientation, performance, and synchronisation. Actel offers several mechanisms such as a new mode of message passing called 'semi-reference' to achieve an efficient inter-object concurrency. Parallel functions and parallel compound statements are provided to exploit concurrency inside an object at several levels without recourse to explicit synchronisation. Implicit synchronisation is obtained through future variables.
An Evolutionary Lifecycle Model with Agile Practices for Software Development at ABB
Authors: Aldo Dagnino
Venue: Proceedings of the Eighth International Conference on Engineering of Complex Computer Systems (2002)

Current software environments face increasedpressure to develop products under evolvingrequirements, changing technologies, scarcehuman resources, and the need to develop highquality applications. ABB has similar pressures,especially as the organization embraces theIndustrial IT initiative that aims at thedevelopment of interoperable and intelligentproducts. A new generation of softwaredevelopment lifecycle models has emerged latelycalled "Agile" and they embrace change, reducedevelopment cycle time, and attempt a usefulcompromise between no process and too muchprocess. The Agile Development in EvolutionaryPrototyping Technique (ADEPT) presented inthis paper, was developed at the ABB USCorporate Research Center, and incorporates"Agile" practices to streamline the technologydevelopment lifecycle of Industrial IT products.
Standard CMOS Implementation of a Multiple-Valued Logic Signed-Digit Adder Based on Negative Differential-Resistance Devices
Authors: Alejandro F. Gonzalez, Mayukh Bhattacharya, Shriram Kulkarni, Pinaki Mazumder
Venue: Proceedings of the 30th IEEE International Symposium on Multiple-Valued Logic (2000)

This paper presents MOS-NDR, a new prototyping technique for multiple-valued logic circuits combining MOS transistors and multipeak negative differential-resistance (NDR) devices such as resonant-tunneling diodes (RTDs). MOS-NDR emulates the folded current-voltage characteristics of NDR devices such as RTDs using only NMOS transistors. MOS-NDR has enabled the development of a fully integrated multivalued signed-digit full adder (SDFA) circuit by means of a standard 0.6-micron CMOS process technology. The prototype has been fabricated and correct operation has been verified. The circuit dimensions are 123.75 by 38.7 microns, which is more than 15 times smaller than the area required by the equivalent hybrid RTD-CMOS prototype. The propagation delay of the hybrid RTD-CMOS design is estimated to be close to six times higher than that of the MOS-NDR implementation.
Wearable Computers and the Possible Development of Musculoskeletal Disorders
Authors: James F. Knight, Chris Baber
Venue: Proceedings of the 4th IEEE International Symposium on Wearable Computers (2000)

Work-related musculoskeletal disorders (WRMDs) have been shown to be caused by (amongst other things) exposure to work tasks, which involve constrained pathomechanical body postures and physical load. Current research suggests that the added weight of a wearable computer and the positions which interacting with it requires induces acute musculoskeletal stress and may lead to chronic musculoskeletal disorders. These disorders may only reveal themselves after a long period. Therefore, it is important at this stage in wearable computer development to address these issues in the hope of diminishing their occurrence.
Reflective Decision Controls for Autonomous Distributed Objects
Authors: En-Hsin Huang, Tzilla Elrad
Venue: Proceedings of the Fifth International Symposium on Autonomous Decentralized Systems (2001)

This paper presents a reflective decision control mechanism for dealing with synchronization and scheduling issues in distributed computing environment. We present a component-based reflective architecture for assisting distributed objects in decision making. It enables autonomous entities to support reflective computation that requires a flexible means for managing the course of computation, resource allocation and scheduling. Such capability is critical to the successful implementation of distributed software that supports real-time and reactive/adaptive applications (e.g., robotics, manufacturing, and military systems). In many instances, these systems must be designed to monitor and manage complex systems in dynamic settings.
Speculative Concurrency Control with Deferred Commitment for Real-Time Databases
Authors: Azer Bestavros, Spyridon Braoudakis
Venue:  (1995)

Abstract A problem with Speculative Concurrency Control algorithms and other common concurrency control schemes using forward validation is that committing a transaction as soon as it finishes validating, may result in a value loss to the system. Haritsa showed that by making a lower priority transaction wait after it is validated, the number of transactions meeting their deadlines is increased, which may result in a higher value-added to the system. SCC-based protocols can benefit from the introduction of such delays by giving optimistic shadows with high value-added to the system more time to execute and commit instead of being aborted in favor of other validating transactions, whose value-added to the system is lower. In this paper we present and evaluate an extension to SCC algorithms that allows for commit deferments.
Assessing Software Based Safety Systems against the Requirements and Recommendations of IEC 880 (1986)
Authors: R. J. Tate
Venue: Proceedings of the 2nd IEEE Software Engineering Standards Symposium (1995)

This paper examines the process of assessing software-based systems against the IEC 880(1986) standard "Software for Computers in the Safety Systems of Nuclear Power Stations". An overview description of IEC 880 is provided and the relationship between the requirements in the main body of the standard and the guidance provided in the appendices is discussed. Some fundamental issues to be considered when performing an assessment are highlighted. In particular, the analysis of the development lifecycle, including consideration of issues such as the multiple iterations of development phases and the use of preexisting system components, is discussed. The various types of software/data which are present in a typical system are described and the applicability of the standard to each is reviewed. In conclusion, the author recognises the broad scope and relevance of IEC 880, but also highlights the practical problems encountered when attempting to gauge the 'compliance' of a system. The author provides some recommendations for assessors. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
A Novel Technology Mapping Method for AND/XOR Expressions
Authors: Seok-Bum Ko, Jien-Chung Lo
Venue: Proceedings of the 33rd International Symposium on Multiple-Valued Logic (2003)

In this paper, we propose a novel technology mappingtechnique for Look-Up Table (LUT) - based FieldProgrammable Gate Arrays (FPGA). The proposed technologymapping technique is based on AND/exclusive-OR(XOR) expressions. The AND/XOR nature of the proposedtechniques can map many important XOR-intensive applications,such as error detecting/correcting, data encryption/decryption, and computer arithmetic circuits efficientlyin FPGA. The typical EDA tools deal mainly with AND/ORexpressions and therefore are quite inefficient for XOR-intensiveapplications. We design a new approach and conductexperiments using MCNC benchmark circuits in FPGAenvironment to demonstrate the effectiveness of our proposedtechnology mapping technique. The proposed techniqueis superior to the typical methods with respect toarea. When using the proposed technique, the number ofCLB is reduced by 67.6 % (speed-optimized one) and 57.7% (area-optimized one) and the total number of equivalentgate counts is also reduced by 65.5 % compared to the typicalmethods.
Leveraging Software Reengineering Systems for Heterogeneous Distributed Computing Environments
Authors: Chia-Chu Chiang
Venue: Proceedings of the International Conference on Software Maintenance (ICSM'00) (2000)

ASG's Existing Systems Workbench (ESW) is a comprehensive, integrated tool set that supports the software reengineering process. These software-reengineering tools were originally developed for centralized environments. With the widespread use of object-oriented and client-server technologies, customers are expecting ESW to take advantage of these new technologies and cooperate with their heterogeneous distributed computing environments. In this paper, we propose a distributed object computing architecture for allowing ESW to operate in a heterogeneous distributed environment. The architecture was implemented with CORBA technology. The advantage of this new architecture enhances the product value and adapts the product to customer expectations.
A model for rate-dependent hysteresis in piezoceramic materials operating at low frequencies
Authors: Smith Ralph C., Ounaies Zoubeida, Wieman Robert
Venue:  (2001)

This paper addresses the modeling of certain rate-dependent mechanisms which contribute to hysteresis inherent to piezoelectric materials operating at low frequencies. While quasistatic models are suitable for initial material characterization in some applications, the reduction in coercive field and polarization values which occur as frequencies increase must be accommodated to achieve the full capabilities of the materials. The model employed here quantifies the hysteresis in two steps. In the first, anhysteretic polarization switching is modeled through the application of Boltzmann principles to balance the electrostatic and thermal energy. Hysteresis is then incorporated through the quantification of energy required to translate and bend domain walls pinned at inclusions inherent to the materials. The performance of the model is illustrated through a fit to low frequency data (0.1 Hz - 1 Hz) from a PZT5A wafer.
Parallel Selection Algorithms with Analysis on Clusters
Authors: A. Fujiwara, H. Katsuki, M. Inoue, T. Masuzawa
Venue: Proceedings of the 1999 International Symposium on Parallel Architectures, Algorithms and Networks (1999)

In this paper, we present three deterministic parallel selection algorithms with analysis on clusters. The first and second algorithms are proposed on the CGM (Coarse Grained Multicomputer) model. The first algorithm achieves optimality with respect to its computation time and runs in \mathcomputation time and O(min (log p, log log n)) communication rounds if \mathfor any \math, where n is the number of input elements and p is the number of processors. The second algorithm achieves optimality with respect to the number of communication rounds and runs in \mathcomputation time and the constant number of communication rounds if \mathfor any \math. The third selection algorithm is a hybrid algorithm of the above two algorithms and suitable for practical cluster computing. The algorithms are implemented using PVM, and its experimental results are also presented.
Effects of Message Loss on Distributed Termination
Authors: Richard Koo, Sam Toueg
Venue:  (1987)

We study the problem of termination in distributed systems with faulty communication channels. We show that for asynchronous systems, protocols that guarantee knowledge gain via message transfers cannot be guaranteed to terminate even if we assume that only transient communication failures can occur, and want to achieve only a weak kind of termination. The same result holds for synchronous systems as well.
AML: Attribute Grammars in ML
Authors: Sofoklis G. Efremidis, Kahlid A. Mughal, John H. Reppy
Venue:  (1993)

Attribute grammars are a valuable tool for constructing compilers and building user interfaces. This paper reports on a system we are developing, called AML (for Attribution in ML), which is an attribute grammar toolkit for building such applications as language-based programming environments using SML. This system builds on the proven technology of efficient attribute evaluation, while using a higher-level foundation for the implementation of interactive systems. It supports a general and uniform platform for building applications that can manipulate attributed terms and allow access to attribute values. We describe the design of the AML system, its current implementation status, and our plans for the future.
Number of Quantifiers is Better than Number of Tape Cells
Authors: Neil Immerman
Venue:  (1980)

We introduce a new complexity measure, $QN[f(n)]$, which clocks the size of sentences from predicate calculus needed to express a given property. Techniques from logic are used to prove sharp lower bounds in the measure. These results demonstrate space requirements for computations and may provide techniques for separating Time and Space complexity classes because we show that: $NSPACE [f(n)] \subseteq QN[f(n)^{2}/log(n)] \subseteq DSPACE[f(n)^{2}].$ The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
Data Flow Analysis Across Tuplespace Process Boundaries
Authors: James B. Fenwick,  Jr., Lori L. Pollock
Venue: Proceedings of the 1998 International Conference on Computer Languages (1998)

A current limitation of compilers for shared memory parallel languages is their restricted use of traditional code-improving transformations, such as constant propagation and dead code elimination. A major problem lies in the lack of data flow analysis techniques for programs with user-specified parallelism. In this paper, we demonstrate how data flow analysis remains quite viable in a compiler for shared memory parallel programs in a structured distributed shared memory environment, in which a shared space of tuples is accessed by properly synchronized methods. We demonstrate standard intraprocess data flow analysis performed in the midst of tuplespace communication statements, and present improvements to the precision of the analysis in the presence of these statements. We present a data flow system to compute reaching definitions across process boundaries, and a technique to improve the precision of this interprocess analysis. Lastly, some transformations enabled by this analysis are presented.
Pupil size variation as an indication of affective processing
Authors: Timo Partala, Veikko Surakka
Venue: International Journal of Human-Computer Studies (2003)

The present objective was to investigate pupil size variation during and after auditory emotional stimulation. Thirty subjects' (15 females and 15 males) pupil responses were measured while listening to 10 negative and 10 positive highly arousing sounds (e.g. a baby crying and laughing), and 10 emotionally neutral sounds (e.g. regular office noise). The subjects also rated their subjective experiences related to the stimuli. The results showed that the pupil size was significantly larger during both emotionally negative and positive stimuli than during neutral stimuli. The results for the time period of 2s following the stimulus offset showed that pupil size was significantly larger after both negative and positive than neutral stimulation. These results suggest that the autonomic nervous system is sensitive to highly arousing emotional stimulation. The subjective ratings confirmed that the stimuli influenced the subjects' emotional experiences as expected. Further analyses showed that female subjects had significantly larger pupil responses than males only to neutral stimuli and only during the auditory stimulation. In sum, our results showed that systematically chosen stimuli significantly affected the subjects' physiological reactions and subjective experiences. It could be possible to use pupil size variation as a computer input signal, for example, in affective computing. Auditory emotion-related cues could also be utilized to modulate the user's emotional reactions.
Computing Depth Orders and Related Problems
Authors: K P Agarwal, J M Katz, Micha Sharir
Venue:  (1994)

\def\K{{\cal K}} A depth order of $\K$, if exists, is a linear order $>$ of the objects in $\K$ such that if $K,L \in \K$ and $K$ lies vertically below $L$ then $K > L$. We present a new technique for computing depth orders, and apply it to several special classes of objects. Our results include: (i) If $\K$ is a set of $n$ triangles whose $xy$-projections are all `fat'', then a depth order for $\K$ can be computed in time $O(n\log^5 n)$. (ii) If $\K$ is a set of $n$ convex and simply-shaped objects whose $xy$-projections are all `fat'' and their sizes are within a constant ratio from one another, then a depth order for $\K$ can be computed in time $O(n\lambda_s^{1/2}(n)\log^4 n)$, where $s$ is the maximum number of intersections between the boundaries of the $xy$-projections of any pair of objects in $\K$, and $\lambda_s(n)$ is the maximum length of $(n,s)$ Davenport-Schinzel sequences.
On Effectiveness of Link Padding for Statistical Traffic Analysis Attacks
Authors: Xinwen Fu, Bryan Graham, Riccardo Bettati, Wei Zhao
Venue: Proceedings of the 23rd International Conference on Distributed Computing Systems (2003)

Traffic analysis attacks aim at deriving mission criticalinformation from the analysis of the traffic transmitted overa network. Countermeasures for such attacks are usuallyrealized by properly "padding" the payload traffic so thatthe statistics of the overall traffic become significantly differentfrom that of the payload traffic. In this paper, wepropose a analytical framework for traffic analysis attacksbased on statistical pattern recognition techniques. Westudy the effectiveness of countermeasures for traffic analysisattacks within our proposed framework. Two basic countermeasurestrategies are (a) to pad the traffic with constantinterarrival times of packets (CIT) or (b) to pad thetraffic with variable interarrival times (VIT). Our experimentsshow that CIT countermeasures fail when the adversaryuses sample variance or sample entropy of packet interarrivaltimes for statistical analysis. On the other hand,VIT countermeasures are effective regardless of which samplestatistics are used by the adversary. These observationsare validated by analysis of detection rates based on sampledistributions of packet interarrival times.
Structural Decomposition with Functional Considerations for Low Power
Authors: Chih-Hung Lee, Hsin-Hsiung Huang
Venue: Proceedings of the 3rd International Symposium on Quality Electronic Design (2002)

In this paper, we present an approach to minimize the power consumption in logic synthesis stage by using the gate decomposition technique. Owing to the power consumption of ICs is not only decided by the switching activity of each gate but also depended on the gate types in the target library, the major difference between our algorithm and the traditional methods is that we consider the power consumption of gate with different type. Besides, by the usage of inverter relocation based on the Demorgan's law, we can further reduce the IC's total power consumption. Under the cases of different probabilities of input signals switching rate are applied, experimental results show that our approach can further reduce up to 12.7% average power consumption than the case applied ExDecomp/HeuDecomp algorithm.
Building Program Understanding Tools Using Visitor Combinators
Authors: Arie van Deursen, Joost Visser
Venue: Proceedings of the 10th International Workshop on Program Comprehension (2002)

Program understanding tools manipulate program representations, such as abstract syntax trees, control-flow graphs, or data-flow graphs. This paper deals with the use of visitorcombinators to conduct such manipulations. Visitor combinators are an extension of the well-known visitor design pattern. They are small, reusable classes that carry out specificvisiting steps. They can be composed in different constellations to build more complex visitors. We evaluate the expressiveness, reusability, ease of development, and applicability of visitor combinators to the construction of program understanding tools. To that end, we conduct a case study in the use of visitor combinators for control-flow analysis and visualization as used in a commercial Cobol program understanding tool.
Overview of SiGe Technology Modeling and Application
Authors: Jiann S. Yuan
Venue: Proceedings of the 1st International Symposium on Quality of Electronic Design (2000)

Advances in wireless communications and information processing systems require implementation of very high performance electronic systems. In recent years, SiGe heterojunction bipolar transistors (HBTs) have emerged as one of the leading contenders to satisfy these demands. The low emitter-base turn-on voltage and device scaling significantly reduce power consumption in circuit operation, while maintaining high speed. With the increasing demand placed on voice and data communications, transmitting, receiving, and processing information at high frequencies and high speeds, the use of SiGe bipolar transistors becomes increasingly important.
Cooperative Computin for Distributed Embedded Systems
Authors: Cristian Borcea, Deepa Iyer, Porlin Kang, Akhilesh Saxena, Liviu Iftode
Venue: Proceedings of the 22 nd International Conference on Distributed Computing Systems (ICDCS'02) (2002)

The next generation of omputing systems will be embedded, in a virtually unbounded number, and dynamically connected. The current software, network architectures, and their associated programming models are not suitable for this scenario. This paper presents a distributed computing model, Cooperative Computing, and the Smart Messages architecture for programming large networks of embedded systems. In Cooperative Computing, distributed applications are dynamic collections of migratory execution units, called Smart Messages, working to achieve a common goal. Virtually any user-defined distributed application can be implemented using our model. We present preliminary results for our prototype implementation as well as simulation results for two previously proposed applications for sensor networks, Directed Diffusion and SPIN, implemented using Smart Messages.
A Short Note on Linear Autarkies, q-Horn Formulas and the Complexity Index
Authors: Maaren Hans van
Venue:  (1999)

It is shown that the tractable class of CNF formulas solvable by Linear Autarkies properly contains the class of q-Horn formulas and that it is incomparable with SLUR.