ppxscal/embedding_network huggingface dataset:
Diagonally convex directed polyominoes and even trees: a bijection and related issues
Authors: Emeric Deutsch, Svjetlan Feretic, Marc Noy
Venue: Discrete Mathematics (2002)

We present a simple bijection between diagonally convex directed (DCD) polyominoes with n diagonals and plane trees with 2n edges in which every vertex has even degree (even trees), which specializes to a bijection between parallelogram polyominoes and full binary trees. Next we consider a natural definition of symmetry for DCD-polyominoes, even trees, ternary trees, and non-crossing trees, and show that the number of symmetric objects of a given size is the same in all four cases.
Representation of Qualitative User Preference by Quantitative Belief Functions
Authors: S. K. M. Wong, P. Lingras
Venue: IEEE Transactions on Knowledge and Data Engineering (1994)

Many intelligent systems employ numeric degrees of belief supplied by the users to make decisions. However, the users may have difficulties in expressing their belief in terms of numeric values. The authors present a method for generating belief functions from symbolic information such as the qualitative preference relationships. The method of generating belief functions provides a practical interface between the users and a decision support system. It can be argued that the ability to generate numeric judgments with nonnumeric inputs is essential in the development of approximate reasoning systems. The proposed method can provide an important component for these systems by transforming qualitative information into quantitative information.
On the optimization power of redundancy addition and removal techniques for sequential circuits
Authors: Enrique San Millán, Luis Entrena, José Alberto Espejo
Venue: Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design (2001)

This paper attempts to determine the capabilities of existing Redundancy Addition and Removal (SRAR) techniques for logic optimization of sequential circuits. To this purpose, we compare this method with the Retiming and Resynthesis (RaR) techniques. For the RaR case the set of possible transformations has been established by relating them to STG transformations by other authors. Following these works, we first formally demonstrate that logic transformations provided by RaR are covered by SRAR as well. Then we also show that SRAR is able to identify transformations that cannot be found by RaR. This way we prove the higher potential of the Sequential Redundancy Addition and Removal over the Retiming and Resynthesis techniques.
Real interval representations
Authors: Yutaka Nakamura
Venue: Journal of Mathematical Psychology (2002)

This paper presents several necessary and sufficient conditions for real interval representability of biorders, interval orders, and semiorders. Let A and X be nonempty sets. We consider two types of interval representations for P ⊂ A × X. The first concerns the existence of two mappings, F: A → J↓ and f: X → J↑, such that, for all (a, x) ∈ A × X, (a, x) ∈ P ⇔ F(a) ∩ f(x) = Øf, where J↓ and J↑ respectively denote the set of all real intervals that are unbounded below and the set of all real intervals that are unbounded above. The second yields two mappings, F: A → J↓ and G: X → J↓, such that, for all (a, x) ∈ A × X, (a, x) ∈ P ⇔ F(a) ⊂ G(x). Specializations of those representations include the cases of A = X for interval orders and semiorders.
Automated Proof Construction in Type Theory Using Resolution
Authors: Marc Bezem, Dimitri Hendriks, Hans De Nivelle
Venue: Journal of Automated Reasoning (2003)

We provide techniques to integrate resolution logic with equality in type theory. The results may be rendered as follows. &bull; A clausification procedure in type theory, equipped with a correctness proof, all encoded using higher-order primitive recursion.&bull; A novel representation of clauses in minimal logic such that the &lambda;-representation of resolution steps is linear in the size of the premisses.&bull; A translation of resolution proofs into lambda terms, yielding a verification procedure for those proofs.&bull; Availability of the power of resolution theorem provers in interactive proof construction systems based on type theory.
Two stepping information technology with visualization: a viewpoint from the U.S. EPA Scientific Visualization Center
Authors: Theresa-Marie Rhyne
Venue: ACM SIGGRAPH Computer Graphics (2000)

Interactive visualization techniques facilitate the examination of unknown data sets. At the United States Environmental Protection Agency's (U.S. EPA) Scientific Visualization Center, we are exploring the combination of 3D visual displays with emerging information technologies. The following discussion highlights prototype efforts in three arenas: (1) Integrating Visualization into Data Mining Techniques; (2) Exploring Policy Analysis Visualization and (3) Combining Object-Relational Databases, Visualization and Web Technologies. The three prototypes are still in embryotic form. We anticipate it will take three to five years for actualization of these concepts and precise implementation details will change over time.The U.S. EPA is currently designing and implementing a new high profile Office of Environmental Information that will advocate the use and management of information as a strategic resource to enhance public health and environmental protection. New information technologies will be applied to facilitate the collection and dissemination of environmental data. We are hopeful that interactive visualization tools will be successfully used across the entire range of users, computing platforms and World Wide Web (Web) technologies that support the information life cycle.
Enumeration of multi-colored rooted maps
Authors: Didier Arquès, Anne Micheli
Venue: Discrete Mathematics (2002)

We present a study of n-colored rooted maps in orientable and locally orientable surfaces. As far as we know, no work on these maps has yet been published. We give a system of n functional equations satisfied by n-colored orientable rooted maps regardless of genus and with respect to edges and vertices. We exhibit the solution of this system as a vector where each component has a continued fraction form and we deduce a new equation generalizing the Dyck equation for rooted planar trees. Similar results are shown for n-colored rooted maps in locally orientable surfaces.
Controllability of nonlinear systems in Banach spaces: a survey
Authors: K. Balachandran, J. P. Dauer
Venue: Journal of Optimization Theory and Applications (2002)

This paper presents a survey on research using fixed-point theorems and semigroup theory to study the controllability of nonlinear systems and functional integrodifferential systems in Banach spaces. Also discussed is the use of this technique in K-controllability and boundary controllability problems for nonlinear systems and integro-differential systems in abstract spaces.
On Hedetniemi's conjecture and the colour template scheme
Authors: Claude Tardif, Xuding Zhu
Venue: Discrete Mathematics (2002)

Hedetniemi's conjecture states that the chromatic number of a product of graphs is the minimum of the chromatic numbers of the factors. El-Zahar and Sauer (Combinatorica 5 (1985) 121) have shown that the chromatic number of a product of 4-chromatic graphs is 4. In this paper, we investigate to which extent their methods can be adapted to the case of 5-chromatic graphs. Our main result is that if G and H are connected graphs of chromatic number at least 5 that both contain odd wheels as subgraphs, then their product also has chromatic number at least 5. However, we also provide counterexamples to the El-Zahar and Sauer conjecture on the structure of n-chromatic subgraphs of products of n-chromatic graphs. This implies that the method of El-Zahar and Sauer will not be sufficient to prove all cases of Hedetniemi's conjecture for chromatic numbers larger than 4.
Built-In Test Sequence Generation for Synchronous Sequential Circuits Based on Loading and Expansion of Input Sequences Using Single and Multiple Fault Detection Times
Authors: I. Pomeranz, S. M. Reddy
Venue: IEEE Transactions on Computers (2002)

We describe an on-chip test generation scheme for synchronous sequential circuits that allows at-speed testing of such circuits. The proposed scheme is based on loading of (short) input sequences into an on-chip memory and expansion of these sequences on-chip into test sequences. Complete coverage of modeled faults is achieved by basing the selection of the loaded sequences on a deterministic test sequence T_0 and ensuring that every fault detected by T_0 is detected by the expanded version of at least one loaded sequence. Specifically, each input sequence S is constructed based on a different fault f and is extracted from T_0 around a time unit where f is detected by T_0. Experimental results presented for benchmark circuits show that the length of the sequence that needs to be stored on-chip at any given time is, on the average, 11 percent of the length of T_0 and that the total length of all the loaded sequences is, on the average, 48 percent of the length of T_0. These results are obtained by extracting each sequence S around the first detection time of a target fault f. These results are further improved by considering several time units for every target fault f and selecting the shortest possible sequence based on f.
Multiversion Data Broadcast
Authors: Evaggelia Pitoura, Panos K. Chrysanthis
Venue: IEEE Transactions on Computers (2002)

Recently, broadcasting has attracted considerable attention as a means of disseminating information to large client populations in both wired and wireless settings. In this paper, we consider broadcasting multiple versions of data items to increase the concurrency of client transactions in the presence of updates. We introduce various techniques for organizing multiple versions on the broadcast channel. Performance results show that the overhead of supporting multiple versions can be kept low while providing a considerable increase in concurrency. Besides increasing the concurrency of client transactions, multiversion broadcast provides clients with the possibility of accessing multiple server states in a single broadcast cycle. Furthermore, multiversioning increases the tolerance of client transactions of disconnections from the broadcast channel.
Compiler Design Issues for Embedded Processors
Authors: Rainer Leupers
Venue: IEEE Design Test (2002)

Compilers translate high-level programming languages such as C and C++ into assembly code for a target processor. Used for decades to program desktop operating systems and applications, compilers are among themost wide-spread software tools. For processor-based embedded systems, however, the use of compilers is less common. Instead, designers still use assembly language to program any embedded applications. Anyone who has programmed a processor inassembly knows the resulting problems: a huge programming effort and, compared with C orC++, far less code portability, maintainability, and dependability. So, why is assembly programming still common in embedded-system design? The reason lies in embedded systems' high-efficiency requirements. Processor-based embedded systems frequently
Real time distributed processing of multiple associated pulse pattern sequences
Authors: A. J. B. Travis
Venue: Neural Networks (2001)

A Real Time Distributed Associative Memory Artificial Neural Network (RTANN) is described. This network associates groups of pulse pattern sequences. The subsequent reoccurrence of some sequences will cause the remainder to be regenerated. Training is carried out in real time simply by feeding pattern sequences directly into the network. The connections between units incorporate a wide range of transmission delays. During training the network enhances connection weights on units where coincidences occur between input and delayed pulses. Pattern regeneration utilises the reoccurrence of coincidences between delayed pulses. The simulation of an RTANN is presented. Continuous dual pattern sequences from notional sensors monitoring the shape and colour of an object were associated directly with a third dual pattern sequence having the form 'These objects look colour'. After training the network was able to correctly generate sentences describing combinations of object and colour not encountered during training.
Case study: the "Office of Real Soon Now" for visualization
Authors: Samuel P. Uselton
Venue: Proceedings of the conference on Visualization '02 (2002)

As part of a larger effort exploring alternative display systems, Lawrence Livermore National Laboratory has installed systems in two offices that extend and update the previously described "Office of Real Soon Now" project to improve the value for visualization tasks. These new systems use higher resolution projectors driven by workstations that run Unix-based applications via Linux and support hardware-accelerated 3D graphics, even across the boundary between displays.
Using Hypergames to Increase Planned Payoff and Reduce Risk
Authors: Russell Vane, Paul Lehner
Venue: Autonomous Agents and Multi-Agent Systems (2002)

Hypergames are an emerging tool for combining decision theoretic and game theoretic information. We explain a new approach to the standard two-player zero-sum single-stage normal game that maximizes expected gain while quantifying possible loss. A DTGT agent can use this formulation to select a plan based on its assessment of an opponent's intent, its assessment of an opponent's unpredictability and its utility model of the situation.
Consensus-Based Fault-Tolerant Total Order Multicast
Authors: Udo Fritzke, Philippe Ingels, Achour Mostefaoui, Michel Raynal
Venue: IEEE Transactions on Parallel and Distributed Systems (2001)

While Total Order Broadcast (or Atomic Broadcast ) primitives have received a lot of attention, this paper concentrates on Total Order Multicast to Multiple Groups in the context of asynchronous distributed systems in which processes may suffer crash failures. ¿Multicast to Multiple Groups¿ means that each message is sent to a subset of the process groups composing the system, distinct messages possibly having distinct destination groups. ¿Total Order¿ means that all message deliveries must be totally ordered. This paper investigates a consensus-based approach to solve this problem and proposes a corresponding protocol to implement this multicast primitive. This protocol is based on two underlying building blocks, namely, Uniform Reliable Multicast and Uniform Consensus. Its design characteristics lie in the two following properties: The first one is a Minimality property, more precisely, only the sender of a message and processes of its destination groups have to participate in the total order multicast of the message. The second property is a Locality property: No execution of a consensus has to involve processes belonging to distinct groups (i.e., consensus is executed on a ¿per group¿ basis). This Locality property is particularly useful when one is interested in using the Total Order Multicast primitive in large-scale distributed systems. In addition to a correctness proof, an improvement that reduces the cost of the protocol is also suggested.
Producing Reliable Initialization and Test of Sequential Circuits with Pseudorandom Vectors
Authors: Y. Savaria, M. Soufi, F. Darlay, B. Kaminska
Venue: IEEE Transactions on Computers (1995)

In this paper, the initialization of sequential circuits using pseudorandom input patterns is addressed. An extended Markov chain model that covers the initialization phase is proposed. This model support the theoretical framework used to demonstrate that sequential circuits can be initialized with pseudorandom vectors. This leads to a uniform BIST approach in which initialization and testing are performed together with a single pseudorandom generator.
The EVE Approach: View Synchronization in Dynamic Distributed Environments
Authors: Amy J. Lee, Anisoara Nica, Elke A. Rundensteiner
Venue: IEEE Transactions on Knowledge and Data Engineering (2002)

The construction and maintenance of data warehouses (views) in large-scale environments composed of numerous distributed and evolving information sources (ISs) such as the WWW has received great attention recently. Such environments are plagued with changing information because ISs tend to continuously evolve by modifying not only their content but also their query capabilities and interface and by joining or leaving the environment at any time. We are the first to introduce and address the problem of schema changes of ISs, while previous work in this area, such as incremental view maintenance, has mainly dealt with data changes at ISs. In this paper, we outline our solution approach to this challenging new problem of how to adapt views in such evolving environments. We identify a new view adaptation problem for view evolution in the context of ISs schema changes, which we call View Synchronization. We also outline the Evolvable View Environment (EVE) approach that we propose as framework for solving the view synchronization problem, along with our decisions concerning the key design issues surrounding EVE. The main contributions of this paper are: 1) we provide an E-SQL view definition language with which the view definer can direct the view evolution process, 2) we introduce a model for information source description which allows a large class of ISs to participate in our system dynamically, 3) we formally define what constitutes a legal view rewriting, 4) we develop replacement strategies for affected view components which are designed to meet the preferences expressed by E-SQL, 5) we prove the correctness of the replacement strategies, and 6) we provide a set of view synchronization algorithms based on those strategies. A prototype of our EVE system has successfully been built using Java, JDBC, Oracle, and MS Access.
A Multiple-Access Pipeline Architecture for Digital Signal Processing
Authors: B. C. McKinney, F. El Guibaly
Venue: IEEE Transactions on Computers (1988)

The design of a special-purpose CMOS processor for digital signal processing is described. A high degree of processing concurrency is achieved through the use of two modified pipelined architectures in parallel. Each pipeline section is connected to a bus for maximum flexibility in accessing any stage in the pipeline. Each pipeline section can be dynamically configured under microprogram control to perform different function evaluations. One pipeline processes the mantissa part of the data, while the other pipeline processes the exponent part. In this fashion, different operations could be run concurrently on the different fields of the floating-point data. Integer and fixed-point data can be processed by the arithmetic logic unit (ALU) under microprogram control. Pipeline latency and stage utilization for certain mathematical operations are discussed. An ALU was designed using this architecture in CMOS technology. The ALU is microprogram-controlled to perform complex-number floating-point multiplication in 520 ns, and complex-number floating-point addition in 240 ns with a power requirement of 250 mW when operating at 25 MHz (5-V supply).
Comments on "Synthetic Traces for Trace-Driven Simulation of Cache Memories"
Authors: S. M. Mahmud
Venue: IEEE Transactions on Computers (1994)

A number of errors have been discovered in the paper "Synthetic traces for trace-driven simulation of cache memories" by D. Thjebaut, J.L. Wolf and H.S. Stone. The authors of that paper have corrected some of these errors and presented them in a corrigendum. The remaining errors are corrected and presented in this correspondence.
Official Netscape Server-Side Javascript for Database Applications: Windows NT and UNIX, 10th edition
Authors: Luke Duncan
Venue:  (1997)

:Discover the unique server-side JavaScript code, applications manager, and objects needed to create database-enabled Internet/intranet/extranet applications. Extensive examples include the design and implementation of an enterprise time-tracking application, providing starting points for launching your projects.
Sub/spl mu/m Registration of Fiducial Marks Using Machine Vision
Authors: M. Tichem, M. S. Cohen
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1994)

Sub/spl mu/m registration between circularly symmetric fiducial marks can be achieved simply by finding their centroids by fitting circles to distributed edge positions determined by the second-derivative zero-crossing method. However, because of diffraction fringes, substantial errors originating in the tilt of the microscope optical axis must be minimized. This method is used for laser-fibre alignment tolerance studies.
Sams Teach Yourself UNIX System Administration in 24 Hours
Authors: Dave Taylor
Venue:  (2002)

:In just 24 lessons of one hour or less, you will learn how to maintain and administer any type of Unix system, from an individual Mac OS X workstation to a sophisticated Linux system, to a powerful Solaris enterprise server. Using a straightforward, step-by-step approach, each lesson builds on the previous one, allowing you to learn the essentials of Unix system administration from the ground up.
Case study: visualization and analysis of high Rayleigh number --- 3D convection in the Earth's mantle
Authors: Gordon Erlebacher, David A. Yuen, Fabien Dubuffet
Venue: Proceedings of the conference on Visualization '02 (2002)

Data sets from large-scale simulations (up to 5013 grid points) of mantle convection are analyzed with volume rendering of the temperature field and a new critical point analysis of the velocity field. As the Rayleigh number Ra is increased the thermal field develops increasingly thin plume-like structures along which heat is convected. These eventually break down and become turbulent. Visualization methods are used to distinguish between various models of heat conductivity and to develop an intuitive understanding of the structure of the flow.
InfiniBridge: An InfiniBand Channel Adapter with Integrated Switch
Authors: Chris Eddington
Venue: IEEE Micro (2002)

The InfiniBridge device supports 10- and 2.5-gigabit per second link speeds, hardware transport, multicast, and quality of service. Mapping communication protocols to InfiniBand's hardware transport connections achieves near wire-speed performance with minimal processor overhead.
A Statistical Model for Delay-Fault Testing
Authors: E. S. Park, M. R. Mercer, T. W. Williams
Venue: IEEE Design Test (1989)

The authors propose a statistical model for measuring delay-fault coverage. The model provides a figure of merit for delay testing in the same way that fault coverage provides one for the testing of single stuck-at faults. The mode measures test effectiveness in terms of the propagation delay of the path to be tested, the size of the delay defect, and the system clock interval, and then combines the data for all delay faults to measure total delay-fault coverage. The authors also propose a model for measuring the defect level as a function of the manufacturing yield and the predictions of the statistical delay-fault coverage model.