ppxscal/embedding_network huggingface dataset:
QUIKSIM - a block structured simulation language written in SIMSCRIPT
Authors: David G. Weamer
Venue: Proceedings of the third conference on Applications of simulation (1969)

Users of simulation languages have historically had to choose between one of two types of language. On the one hand, they could choose a block type language such as GPSS. Languages of this type have the advantage that the learning and programming of the language is both quick and relatively easy. Also, since the number of de-bugging runs is usually small, turn around time is likely to be quite rapid. However, the block structuring of the language may also create some difficulties. The fixed nature of the blocks, both as to the types of blocks available in the language and the manner in which the blocks simulate a particular activity, may render the language unsuitable for the simulation of certain types of systems. In addition, the need to pre-allocate much of the available memory space of the computer may make the use of a block structured language impossible on a small computer. The alternative to a block structured language is an algebraic language, such as SIMSCRIPT or FORTRAN. It would be desirable to have a language which combines the advantages of both types of language without some of the disadvantages. QUIKSIM represents an attempt to produce such a language.
&ldquo;Teaching systems design through systems documentation&rdquo;
Authors: John P. Walter
Venue: Proceedings of the 1st annual international conference on Systems documentation (1982)

This paper describes a teaching methodology, illustrating: &bull; Use of case studies having general appeal to full-time students and professional persons, &bull; Generally-accepted system documents, &bull; A prototype sequence for presentation of each document type, &bull; Measures of success of the methodology, and &bull; Pitfalls.
The teaching of program correctness
Authors: W. D. Maurer
Venue: Proceedings of the seventh SIGCSE technical symposium on Computer science education (1977)

For the past seven years, including three years at the University of California (Berkeley) and four years at The George Washington University, this author has taught material relating to the correctness of programs in both undergraduate and graduate courses. The simplest material on correctness that we teach is the proof of correctness of Euclid's algorithm, implemented as a program in FORTRAN, AL-GOL 60, PL/I, or BASIC, depending on the language to which elementary students are first introduced. (It would work just as easily in PASCAL.) This proof is found in (1), pp. 14-20. We usually give a simplified version of it, because the program in (1), for purposes of efficiency, works by dividing and taking the remainder, and we feel it is easier to illustrate the relevant concepts by using an algorithm that works by simple subtractions.
Indexing of subrecursive classes
Authors: Dexter Kozen
Venue: Proceedings of the tenth annual ACM symposium on Theory of computing (1978)

A theory of subrecursive indexings is developed, with emphasis on relationships between reducibilities, uniform simulation, and diagonalization.
Methods for system simulation on a restricted data flow architecture
Authors: Meledath Damodaran, Amitava Hazra
Venue: Proceedings of the ACM '81 conference (1981)

A number of parallel, MIMD architectures for continuous system simulation have been proposed, some designed and a few implemented [Korn,72], [Cyre et.al.,77], [Halin,et.al. 80] over the past few years. While these architectures vary in several aspects such as interconnection structures, processor components used etc., there is a strong similarity between them that arises from the problem at hand. This is the need for a controller or master processor that can control the flow of data between a group of subprocessors, and also initiate execution when required data are available. It is possible however to take a substantially different approach to the problem. In the data-flow approach [Rumbaugh,77], [Dennis,75] the data dependency of each instruction is explicit. An instruction gets executed only when the data for it are available. A general unrestricted data flow machine, while quite attractive, is a substantially difficult venture. But, with a few restrictions on the capability, a much less expensive machine is possible, that is still quite powerful for purposes such as continuous simulation. The present paper focuses on a survey and analysis of methods appropriate for continuous system simulation on such an architecture. However some key characteristics of this architecture must be appreciated before the analysis can be done.
Perspectives of the user interface
Authors: Daniel Robey
Venue: Proceedings of the seventeenth annual computer personnel research conference (1980)

It has become increasingly popular for researchers to study management information system users and their relationships with system developers. Motivated by numerous reports of system failure, which were not technical in nature, investigators have sought a better understanding of the user interface. The ultimate objective of much of this research is to guide methodologies for user-oriented system development and design of systems which meet user needs more readily. In other words, the intent is to design systems which are behaviorally valid as well as technically valid. Such a quest necessarily requires us to draw upon concepts from the behavioral sciences. To study user behavior, interpersonal relationships and organizational settings, one must either invent new theories or use existing ones. The latter strategy is strongly recommended for many reasons not reiterated here. But within the behavioral sciences there are fundamental choices among perspectives, and these choices influence our view of the user interface quite profoundly. Adopting any one approach allows the investigator to see and understand certain phenomena but to ignore others. Like the blind man examining the elephant, each observer develops a &ldquo;trained incapacity&rdquo; to see the object from other viewpoints. As a result, alternative explanations of research findings are rarely considered, much less reported. The purpose of this paper is to examine four different perspectives of the user interface: (1) user motivation, (2) user-developer differences, (3) organization structure, and (4) the political perspective. Each highlights certain legitimate system development issues. However, each also narrows our view of the user interface. Awareness of these perspectives accomplishes two purposes. First, researchers will be more receptive to the alternative perspectives and aware of the consequences of their choices. Second, investigators will treat the user interface less naively, especially through increased sensitivity to the political factors in system development.
Design automation and VLSI in the 80's (Panel Discussion)
Venue: Proceedings of the 17th Design Automation Conference (1980)

In the data, supplied to the 1979 DAC panel on VLSI and CAD in the 80's, was a steeply rising curve showing the number of transistors per chip plotted against year of introduction. This plot, by Bill Lattin of Intel, passed one million in 1983 and would reach ten million by 1985. Translated to circuits, this would mean 105 circuits by 1983, 106 circuits by 1985. The 1979 DAC panel presented the following collection of ideas for attacking this problem: Some of the increased circuit count will be swallowed up by redundant implementation in order to improve the chip yield. There will be only a few of these large chips designed and they will be general purpose units. To avoid expensive checking runs there will be more synthesis and less analysis. These chips will be designed with higher level languages to cut design time and avoid the mindboggling mass of detailed circuits. Hierarchical design techniques will be used for the same reason. The chip will be made up of standard design elements-registers, PLA's and ROM control logic. There will be little random logic. There will be lots of memory available on the chip such as 64K of RAM. Using the broad definition of VLSI as between 50,000 and 500,000 logic circuits the 1980 DAC panel will continue the debate on this Design Automation problem. A spectrum of positions still exists: Silicon usage versus design time. Standard cells versus gate arrays versus random logic. Few general purpose miniprocessors versus many special purpose ones. Optimistic DA tool developers versus pessimistic users. Total automation versus assistance only. Design integrity versus designer freedom. Practical versus impossible. Evolution versus revolution. The panel members were asked to submit a short position paper and prepare a five minute explanation of their views. They were also asked to respond to thirteen questions with a simple YES or NO answer. Their answers reflect their own personal opinions and are not necessarily those of their companies. Most of these questions cannot be answered with one word but to establish a starting point for debate the panelists were requested to pick the YES or NO answer that is most right. Since computer storage can obviously gobble up all the circuits per chip we can produce in the 80's, the following list of questions on these issues will refer to chips that contain 50,000 to 500,000 logic circuits beyond the RAM storage.
Convivial error recovery
Authors: Denis Samson, Yves Ouellet
Venue: Proceedings of the international conference on APL (1981)

This paper presents a new approach to an Event Control Mechanism (ECM) for APL. After an informal review of some typical ECM implementations, it describes the general architecture of an ECM and shows how the mentioned implementations map onto it. An extended ECM is then presented that combines many features of existing implementations with some new capabilities. It gives the user access to the immediate context of the subexpression where an error occurred and introduces new control functions to allow execution to move to a determined calling environment. The proposed additions aim at a &ldquo;convivial&rdquo; utilization of the ECM suitable both to automatic control and to interactive debugging of APL applications.
Benchmarking interactive systems: Calibrating the model
Authors: Douglas L. Bashioum
Venue: Proceedings of the 1980 international symposium on Computer performance modelling, measurement and evaluation (1980)

A methodology for benchmarking dedicated, interactive systems has been developed at The MITRE Corporation. This methodology uses a synthetic program model of the application which runs on the proposed hardware/operating system configurations and is driven by a statistically derived load. System performance is measured by analyzing the synthetic transaction response times. The methodology yields assurances to a buyer that the benchmarked system has at least an a priori defined amount of computer power available for applications-oriented software. This paper examines the methodology and the problems that were encountered and solutions which have been used in calibrating a benchmark model for a specific application. The benchmark was designed to model a large interactive information processing application on a procurement requiring loosely-coupled (no shared memory) multicomputer systems. The model consists of a set of interacting synthetic program cells, each composed of several abstractly defined components. The model is maintained in a very high level language that is automatically translated into a standard High Order Language (typically FORTRAN or COBOL) for delivery to the competing vendors. These delivered model cells contain automatically generated size and time filler code that &ldquo;calibrate&rdquo; the cells to consume the appropriate CPU time and memory space as defined by the abstract size units after accounting for each vendor's hardware and proposed system design.
Summary of minimal-total-processing-time drum and disk scheduling disciplines
Authors: Samuel H. Fuller
Venue: Proceedings of the fourth ACM symposium on Operating system principles (1973)

This article investigates the application of minimal-total-processing-time (MTPT) scheduling disciplines to rotating storage units when random arrival of requests is allowed. Fixed-head drum and moving-head disk storage units are considered and particular emphasis is placed on the relative merits of the MTPT scheduling discipline with respect to the shortest-latency-time-first (SLTF) scheduling discipline. The results of the simulation studies presented show that neither scheduling discipline is unconditionally superior to the other. For most fixed-head drum applications the SLTF discipline is preferable to MTPT, but for intra-cylinder disk scheduling the MTPT discipline offers a distinct advantage over the SLTF discipline. An implementation of the MTPT scheduling discipline is discussed and the computational requirements of the algorithm are shown to be comparable to SLTF algorithms. In both cases, the sorting procedure is the most time consuming phase of the algorithm.
An approach to systems correctness
Authors: Gilles Khan
Venue: Proceedings of the third ACM symposium on Operating systems principles (1971)

First, the problem of proving the correctness of an operating system is defined. Then a simple model is presented. Several examples are given to show how this model allows derivation of proofs about small systems.
Simulation system for brain modeling
Authors: Larry D. Wittie
Venue: Proceedings of the 7th conference on Winter simulation - Volume 2 (1974)

A highly parameterized, general purpose simulation system for brain structures has been coded in FORTRAN. Detailed three-dimensional models involving up to 8,000 neurons and 80,000 synapses can be specified and simulated. Individual model elements are not enumerated. Instead the parameter scheme uses spatial lattices and intersecting probability distributions to position neurons and synapses with any desired degree of precision or randomness. The system has been used to study neural activity in a cerebellar cortex model involving 2,000 neurons and 20,000 synapses and to evaluate an integrated circuit, picture-processing array made of 2,700 logic elements and 5,400 connections.
Design of a multi-level distribution system using simulation analysis
Authors: Leland Blank
Venue: Proceedings of the 12th annual symposium on Simulation (1979)

A digital inventory management simulation model is described and its use in a supply project to design and plan the operations of a multi-level inventory distribution system is explained. An overview of the project objectives, the actual system, and the purposes and general design specifications of the simulator are discussed. Details of the simulated events are described as are the user inputs and the output reports. The simulation is written in SIMSCRIPT for general application to large-scale inventory system design involving many products and storage facility locations. Manufacturing capacity limitations may be specified by the user to evaluate the effect on service levels at all points of the distribution system.
The CAI has invaded Georgia state university
Authors: Jane T. Anderson
Venue: Proceedings of the 8th annual ACM SIGUCCS conference on User services (1980)

The 1970's brought a dramatic increase in the use of computers in university communities. The impact was especially felt in the increase of novice student users. To meet the demand for training on the introductory level, User Services groups plunged head first into a new field, teaching. At Georgia State University for instance, to meet the ever increasing student influx into the use of computers, we developed twelve workshops each covering a specific area of study-a very traditional technique. We broke new ground by not only requiring that all students receive our training, but by also going into the individual classes at the professor convenience to present our material. Once the professors saw that our training helped both them and the student, we were eagerly accepted. CAI has been around for many years and there is an abundance of literature on the topic.
Some results concerning efficient and optimal algorithms
Authors: Ian Munro
Venue: Proceedings of the third annual ACM symposium on Theory of computing (1971)

Computational Complexity is concerned with how difficult, under some measure of difficulty, it is to evaluate certain functions or classes of functions. Most of the work in this area, however, deals with models of computation quite unlike a stored program computer, and functions very different from those which are actually computed. In this paper we turn our attention to techniques of computing some useful functions on &ldquo;computer-like&rdquo; devices in optimal or near optimal ways.
Storage reallocation in hierarchical associative memories
Authors: Jeffrey L. Gertz
Venue: Proceedings of the third ACM symposium on Operating systems principles (1971)

Two recent trends in computing, namely parallelism and programming generality, imply that increasing importance will be placed on developing location-independent schemes for computer memories. This paper examines several issues that arise when hierarchical associative memories are used to accomplish this objective. First, it presents methods for constructing economical associative memories to be utilized as lower levels in the hierarchy. Then, it considers the ramifications of storage reallocation in the memory and develops a new unit of storage transfer, the paragraph. Finally, it demonstrates that difficulties that might arise due to duplicate storage of data words in the memory can be negated by a simple scheme.
Microprogram structures for high level language elements
Authors: Gerhard Zimmermann
Venue: Proceedings of the 10th annual workshop on Microprogramming (1977)

Some elements of ALGOL-like languages consume much computer time, if they are coded on the machine instruction level. The examples of this paper show that this time and the number of program steps can be drastically reduced by microprogramming and suitable hardware processor structures. Furthermore it seems to be reasonable and possible to translate HLL-programs to microprograms avoiding the machine instruction level. The language MIMOLA is used for the documentation of the microprograms and for the top-down design of the hardware structures. An example structure is given.
Adaptive search techniques applied to software testing
Authors: J. P. Benson
Venue: ACM SIGMETRICS Performance Evaluation Review (1981)

An experiment was performed in which executable assertions were used in conjuction with search techniques in order to test a computer program automatically. The program chosen for the experiment computes a position on an orbit from the description of the orbit and the desired point. Errors were interested in the program randomly using an error generation method based on published data defining common error types. Assertions were written for program and it was tested using two different techniques. The first divided up the range of the input variables and selected test cases from within the sub-ranges. In this way a &ldquo;grid&rdquo; of test values was constructed over the program's input space. The second used a search algorithm from optimization theory. This entailed using the assertions to define an error function and then maximizing its value. The program was then tested by varying all of them. The results indicate that this search testing technique was as effective as the grid testing technique in locating errors and was more efficient. In addition, the search testing technique located critical input values which helped in writing correct assertions.
The notion of quantitative invisibility and the machine rendering of solids
Authors: Arthur Appel
Venue: Proceedings of the 1967 22nd national conference (1967)

Line drawings are the most common type of rendering used to convey geometrical description. This is due to the economy of preparing such drawings and the great information density obtainable. On a pure line drawing, that is where no attempt is made to specify or suggest shadows, tone or color, the lines rendered are either the intersection curves of surfaces or the contour curves of surfaces. The nature of these curves are adequately discussed in the literature 1 and in a previous report.2 In order to convey a realistic impression of an object or an assembly of objects, the segments of lines which cannot be seen by an observer are not drawn or are drawn dashed. Without specification of visibility a drawing is ambiguous. This paper presents a recently developed scheme for the determination of visibility in a line drawing which enables comparitively high speed calculation and excellent resolution.
Automatic recognition of vector and parallel operations in a higher level language
Authors: Paul B. Schneck
Venue: Proceedings of the ACM annual conference - Volume 2 (1972)

A compiler for recognizing statements of a FORTRAN program which are suited for fast execution on a parallel or pipeline machine such as ILLIAC-IV, STAR or ASC is described. The technique employs &ldquo;interval analysis&rdquo; to provide flow information to the vector/parallel recognizer. Where profitable the compiler changes scalar variables to subscripted variables. The output of the compiler is an extension to FORTRAN which shows parallel and vector operations explicitly.
Computer architecture in the computer science curriculum
Authors: Richard T. Thomas
Venue: Proceedings of the fourth SIGCSE technical symposium on Computer science education (1974)

Due to several complementary technological advances related to computer systems, there has lately been an increased interest in the architecture of computers. This increased interest has forced changes in and additions to the computer science curriculum. In this paper, an academic program is described which has been found to be highly successful in terms of student interest and learning. The role of computer architecture in this program is explored, and conclusions are drawn regarding this role.
A user-microprogrammable, local host computer with low-level parallelism
Authors: Shinji Tomita, Kiyoshi Shibayama, Toshiaki Kitamura, Toshiyuki Nakata, Hiroshi Hagiwara
Venue: ACM SIGARCH Computer Architecture News (1983)

This paper describes the architecture of a dynamically microprogrammable computer with low-level parallelism, called QA-2, which is designed as a high-performance, local host computer for laboratory use. The architectural principle of the QA-2 is the marriage of high-speed, parallel processing capability offered by four powerful Arithmetic and Logic Units (ALUs) with architectural flexibility provided by large scale, dynamic user-microprogramming. By changing its writable control storage dynamically, the QA-2 can be tailored to a wide spectrum of research-oriented applications covering high-level language processing and real-time processing. The QA-2 employs four identical ALUs which are independently controlled by the different fields of a 256-bit microinstruction. Sharing one uniform register file (6-kBytes), the ALUs can perform mutually independent/dependent operations on four sets of variable length operands (max. 4-Bytes &times; 4). In main memory accessing, four sets of variable length data (max. 4-Bytes &times; 4) can be simultaneously read from or written into different/continuous locations. In addition, structured microprogramming is possible because the QA-2 supports natural control structures such as an IF f(logic variables) THEN (CALL, GOTO or RETURN) ELSE (CALL,GOTO or RETURN) statement. All these features combine to yield an extensive microprogramming capability with which the user can tailor the QA-2 to his problems at hand.