ppxscal/embedding_network huggingface dataset:
Congruences and ideals in pseudoeffect algebras
Authors: Hai-Yang Li, Sheng-Gang Li
Venue: Soft Computing - A Fusion of Foundations, Methodologies and Applications (2007)

This paper is devoted to congruences and ideals in pseudoeffect algebras. Let I be a normal ideal in a pseudoeffect algebra E. We show that: (1) the relation ~ I induced by I is a congruence if and only if for every a&#x2208;E, I&#x2229; [0,a] is upper directed; (2) the relation ~ I induced by I is a strong congruence if and only if I is a normal weak Riesz ideal in a pseudoeffect algebra E. Moreover, we introduce a stronger concept of congruence&#x2014;namely Riesz strong congruence&#x2014;and we prove that, if I is a normal weak Riesz ideal in a pseudoeffect algebra E, then ~ I is a Riesz strong congruence and, conversely, if ~ is a Riesz strong congruence, then I =&#x00a0; [0]~ is a normal weak Riesz ideal, and ~ I =&#x00a0;~.
Computational Complexity of Partitioned List Algorithms
Authors: E. Morreale
Venue: IEEE Transactions on Computers (1970)

Some parameters related to the computational complexity of partitioned list algorithms are evaluated. Specifically, an upper bound is computed for the average number of comparisons needed by the most unsophisticated version of a partitioned list algorithm for processing a Boolean function in v variables and u canonical clauses. For the same functions the average memory size required for processing is also computed. Furthermore the minimum memory size necessary for processing any Boolean function in u canonical clauses by either a partitioned or a nonpartitioned list algorithm is computed. Results obtained from the above comparisons demonstrate that partitioned list algorithms compare favorably with nonpartitioned ones both with regard to the time and the memory required for computation.
The CIG System of Synthetic Image Generation
Authors: P. Leray
Venue: IEEE Computer Graphics and Applications (1982)

A synthetic image generator, developed in France, simulates targets such as jets, helicopters, tanks, and ships for military training. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
Smart: a tool for application reference testing
Authors: Qing Xie, Mark Grechanik, Matthew Hellige
Venue: Proceedings of the twenty-second IEEE/ACM international conference on Automated software engineering (2007)

Graphical User Interface (GUI) APplications (GAPs) are ubiquitous and provide various services. Since many GAPs are not designed to exchange information (i.e., interoperate), companies replace legacy GAPs with web services, that are designed to interoperate over the Internet. However, it is laborious and inefficient to create unit test cases to test the web services. We propose to demonstrate a SysteM for Application Reference Testing (SMART) novel approach for generating tests for web services from legacy GAPs. During demonstration of Smart we will show how this tool enables nonprogrammers to generate unit test cases for web services by performing drag-and-drop operations on GUI elements of legacy GAPs. We published a research paper that describes our approach and the results of the evaluation of Smart [2].
Efficient Fuzzy Rule Generation: A New Approach Using Data Mining Principles and Rule Weighting
Authors: O. Dehzangi, M. J. Zolghadri, S. Taheri, S. M. Fakhrahmad
Venue: Proceedings of the Fourth International Conference on Fuzzy Systems and Knowledge Discovery - Volume 02 (2007)

Classification Systems have been widely applied in different fields such as medical diagnosis. A fuzzy rule- based classification system (FRBCS) is one of the most popular approaches used in pattern classification problems. One advantage of a fuzzy rule-based system is its interpretability. However, we're faced with some challenges when generating the rule-base. In high dimensional problems, we can not generate every possible rule with respect to all antecedent combinations. In this paper, by making the use of some data mining concepts, we propose a method for rule generation, which can result in a rule-base containing rules of different lengths. Then, our rule learning algorithm based on R.O.C analysis tunes the rule-base to have better classification ability. Our goal in this article, is to check if generating cooperative rule-bases containing rules of different dimensions, can lead to better generalization ability. To evaluate the performance of the proposed method, a number of UCI- ML data sets were used. The results show that considering cooperation in a rule-base tuned by rule weighting process can improve the classification accuracy. It is also shown that increasing the maximum length of rules in the initial rule-base, improves the classification accuracy. Keywords: Pattern classification, fuzzy systems, data mining, rule weighting, Noise Removal
Effort Prediction in Iterative Software Development Processes -- Incremental Versus Global Prediction Models
Authors: Pekka Abrahamsson, Raimund Moser, Witold Pedrycz, Alberto Sillitti, Giancarlo Succi
Venue: Proceedings of the First International Symposium on Empirical Software Engineering and Measurement (2007)

Estimation of development effort without imposing overhead on the project and the development team is of paramount importance for any software company. This study proposes a new effort estimation methodology aimed at agile and iterative development environments not suitable for description by traditional prediction methods. We propose a detailed development methodology, discuss a number of architectures of such models (including a wealth of augmented regression models and neural networks) and include a thorough case study of Extreme Programming (XP) in two semi-industrial projects. The results of this research evidence that in the XP environment under study the proposed incremental model outperforms traditional estimation techniques most notably in early phases of development. Moreover, when dealing with new projects, the incremental model can be developed from scratch without resorting itself to historic data.
B74-3 Design Automation of Digital Systems-Volume 1, Thoery and Techniques
Authors: H. Y. Chang
Venue: IEEE Transactions on Computers (1974)

This book deals with a very important topic in computer engineering techniques, i.e., the use of digital computers as design tools in the development of digital systems. The use of design automation has been rapidly gaining wide acceptance, especially in recent years, in the computer industry due to the rapid pace of changing technologies and the desirability of shortening design and manufacturing intervals. While a number of significant results in design automation have been realized, most are either scattered in various literatures or are not readily obtainable. This book, written by eight authors, represents a body of information where several phases of design automation techniques, i.e., logic synthesis, logic simulation, testing, and physical implementation (partitioning, placement, and routing) are discussed.
Towards Smooth Introduction of IPv6 in SIP-based Architectures
Authors: Mohamed Boucadair, Yoann Noisette
Venue: Proceedings of the 32nd IEEE Conference on Local Computer Networks (2007)

This paper presents major complications that arise when activating SIP (Session Initiation Protocol) within heterogeneous (i.e. IPv4 and IPv6) realms. It proposes scenarios for migrating SIP-based conversational services to IPv6. It also introduces two new procedures for routing optimization purposes when heterogeneous nodes are involved in the same SIP session.
Analysis of filter-bank-based methods for fast serial acquisition of BOC-modulated signals
Authors: Elena Simona Lohan
Venue: EURASIP Journal on Wireless Communications and Networking (2007)

Binary-offset-carrier (BOC) signals, selected for Galileo and modernized GPS systems, pose significant challenges for the code acquisition, due to the ambiguities (deep fades) which are present in the envelope of the correlation function (CF). This is different from the BPSK-modulated CDMA signals, where the main correlation lobe spans over 2-chip interval, without any ambiguities or deep fades. To deal with the ambiguities due to BOC modulation, one solution is to use lower steps of scanning the code phases (i.e., lower than the traditional step of 0.5 chips used for BPSK-modulated CDMA signals). Lowering the time-bin steps entails an increase in the number of timing hypotheses, and, thus, in the acquisition times. An alternative solution is to transform the ambiguous CF into an "unambiguous" CF, via adequate filtering of the signal. A generalized class of frequency-based unambiguous acquisition methods is proposed here, namely the filter-bank-based (FBB) approaches. The detailed theoretical analysis of FBB methods is given for serial-search single-dwell acquisition in single path static channels and a comparison is made with other ambiguous and unambiguous BOC acquisition methods existing in the literature.
Think Pad: A Graphical system for Program-ming bY Demonstration
Authors: R. V. Rubin
Venue: IEEE Software (1985)

Specifying complex programs may become easier if the programming system allows the programmer to manipulate data structures graphically.
Optimal Biometric-Based Continuous Authentication in Mobile Ad Hoc Networks
Authors: Jie Liu, F. Richard Yu, Chung-Horng Lung, Helen Tang
Venue: Proceedings of the Third IEEE International Conference on Wireless and Mobile Computing, Networking and Communications (2007)

authentication is desirable so that a system can be monitored for the duration of the session to reduce the vulnerability. This paper presents an optimal biometric-based continuous authentication scheme in MANETs. We formulate the continuous authentica- tion process as a partially observed Markov decision process, and use dynamic programming-based hidden Markov model schedul- ing algorithms to derive the optimal scheme for continuous au- thentication. Extensive simulations show the effectiveness of the proposed scheme.
Design of Totally Fault Locatable Combinational Networks
Authors: A. Goundan
Venue: IEEE Transactions on Computers (1980)

The design of combinational logic networks is considered in which equivalent or indistinguishable stuck-type faults are confined to a small region of the network. A general type of fault equivalence called S-equivalence is introduced, which defines fault equivalence with respect to an arbitrary set of modules S. A network N is called totally fault locatable with respect to module set S, denoted TFLS, if all specified faults in N are S-equivalent. Some general structural properties of TFLS networks are derived. The problem of designing TFLS networks is investigated for S = {AND, OR, NAND, NOR, NOT} denoted AON, and S = {AON, EXCLUSIVE- OR} denoted AONE. All equivalent fault classes in TFLAON and TFLAONE networks can be identified by inspection. It is shown that every function has a TFLAONE network, that is, a realization where all equivalence classes can be identified by inspection, containing at most one control point or extra input. A method for constructing a TFLAONE realization of an arbitrary function is presented using at most one control point.
Pattern Recognition
Authors: K. S. Fu
Venue: Computer (1976)

During the past fifteen years, there has been a considerable growth of interest in problems of pattern recognition. This interest has created an increasing need for theoretical methods and experimental software and hardware for use in the design of pattern recognition systems. A number of books have been published on this subject,1-16and some special pattern recognition machines have been designed and built for practical use. Applications of pattern recognition include character recognition,12target detection, medical diagnosis, analysis of biomedical signals and images, remote sensing, identification of human faces and fingerprints, reliability,17socio-economics,18speech recognition and understanding,19and machine parts recognition.
File Input/Output Control Logic
Authors: R. H. Dependahl
Venue: Computer (1976)

This paper focuses on a key issue in operating system design that has hitherto received no explicit attention in the literature-file input/output control logic. Particular attention is concentrated on two well-known systems: the IBM System/360 under OS, and the Burroughs 1700 under the Master Control Program.
Enhanced mirrored servers for network games
Authors: Steven Daniel Webb, Sieteng Soh, William Lau
Venue: Proceedings of the 6th ACM SIGCOMM workshop on Network and system support for games (2007)

The Mirrored Server (MS) architecture uses multiple mirrored servers across multiple locations to alleviate the bandwidth bottleneck in the Client/Server (C/S) architecture. Each mirror receives and multicasts player updates to the others, simulates the game, and disseminates the new game state to players. However, keeping the game state consistent between mirrors in the presence of network delay, and maintaining game responsiveness requires each server in MS to simulate the game multiple times for each game update, and additional times in the event of costly rollbacks. In this paper we propose the Enhanced Mirrored Server (EMS) architecture. Like in the Peer-to-Peer architecture, EMS allows peers to exchange updates directly, resulting in a higher tolerance to delay at the mirrors. We propose using bucket synchronization in the mirrors so that each server in EMS simulates the game only once for each update and does not require rollbacks. The server dissenates updates to clients only in the event of inconsistency, and thus its outgoing bandwidth is lower than in MS. Our EMS uses cryptographic techniques to provide security equivalent to C/S, and prevents the timestamp cheat possible in MS. Our analytical analysis and simulations show the advantages of EMS over MS.
A Timing-Driven Algorithm for Leakage Reduction in MTCMOS FPGAs
Authors: H. Hassan, M. Anis, M. Elmasry
Venue: Proceedings of the 2007 Asia and South Pacific Design Automation Conference (2007)

A timing-driven MTCMOS (T-MTCMOS) CAD methodology is proposed for subthreshold leakage power reduction in nanometer FPGAs. The methodology uses the circuit timing information to tune the performance penalty due to sleep transistors according to the path delays, achieving an average leakage reduction of 44.36 % when applied to FPGA benchmarks using a CMOS 0.13mum process. Moreover, the methodology is applied to several FPGA architectures and CMOS technologies.
Strategy Development by Genetic Programming
Authors: Koun-Tem Sun, Yi-Chun Lin, Cheng-Yen Wu, Yueh-Min Huang
Venue: Proceedings of the Third International Conference on Natural Computation - Volume 04 (2007)

In this paper, we will apply genetic programming (GP) technique to develop two strategies: the ghost (attacker) and players (survivors) in the Traffic Light Game (a popular game among children). These two strategies are competing for each other. By applying GP, each one strategy is used as an "imaginary enemy" to evolve (train) another strategy. Based on this co-evolution process, the final developed strategies: the ghost can effectively capture the players, and the players can also escape from the ghost, rescue partners and detour the obstacles. Part of developed strategies had achieved success beyond our wildest dreams. The results encourage us to develop more complex strategies or cooperative models such as human learning models, the cooperative models of robot, and self-learning of virtual agents.
Towards a flexible global sensing infrastructure
Authors: Chien-Liang Fok, Gruia-Catalin Roman, Chenyang Lu
Venue: ACM SIGBED Review (2007)

Wireless sensor networks can potentially become larger, more prevalent, and interconnected via the Internet, forming a global sensing infrastructure that serves many users. In order to realize this and maximize its utility, it is necessary to develop a software architecture that enables new components to be integrated, multiple applications to share the same sensing substrate, and the integration of sensor and IP networks. We propose one such architecture that encodes applications as malleable, platform-independent, high-level mobile scripts. Multiple users are supported by allowing these scripts to execute concurrently, while flexibility is achieved by having them invoke platform-specific services. Services provide reusable functional capabilities that may vary across platforms and environmental conditions. They are platform-specific and may be discovered and redeployed on-demand at runtime. Service provision allows applications to exploit whatever computational capabilities are available, and new services to be added in response to changing application needs, resource availability, or environmental conditions. Our approach allows applications to function in diverse settings by employing dynamic rebinding of mobile scripts to different services as they execute over extended intervals across different types of networks.
Demonstration of 2.488 Gbit/s transmission on the UK--Channel Islands No 7 submarine cable system
Authors: R. B. Lewis, L. N. Barker, E. G. Bryant, S. F. Carter, D. M. Spirit, T. Widdowson, J. V. Wright
Venue: BT Technology Journal (2007)

The recently-installed UK--Channel Islands No 7 cable system is a 132 km unrepeatered, twelve optical fibre, 140 Mbit/s system. In February the cable was used for a series of tests to demonstrate new transmission and receiver equipment developed at British Telecom Research Laboratories (BTRL). The paper describes first the use of erbium fibre power amplifiers to achieve two-way transmission over the system at 2.488 Gbit/s, and then the testing of a novel semi-ruggedised laser PIN receiver.
A Framework for Classifying and Comparing Process Technology Domains
Authors: Reda Bendraou, Marie-Pierre Gervais
Venue: Proceedings of the International Conference on Software Engineering Advances (2007)

This paper introduces a framework for classifying and comparing three domains related to the process technology. More particularly, it gives process definitions, characteristics, modeling objectives, process model constituents, process context and scope proper to the Software Process Engineering (SPE), Business Process Management (BPM) and Workflow Management (WfM) domains. It also tends to clarify the relationship between these three process domains. Relationship, which is still a source of ambiguities for many process managers and company's deciders in their choices of the appropriate process technology that will stratify their process modeling goals.
Martini: A Network Interface Controller Chip for High Performance Computing with Distributed PCs
Authors: Konosuke Watanabe, Tomohiro Otsuka, Junichiro Tsuchiya, Hiroaki Nishi, Junji Yamamoto, Noboru Tanabe, Tomohiro Kudoh, Hideharu Amano
Venue: IEEE Transactions on Parallel and Distributed Systems (2007)

In this paper, “Martini,” a network interface controller chip for our original network called RHiNET is described. Martini is designed to provide high-bandwidth and low-latency communication with small overhead. To obtain high performance communication, protected user-level zero-copy RDMA communication functions are completely implemented by a hardwired logic. Also, to reduce the communication latency efficiently, we have proposed PIO-based communication mechanisms called “On-the-fly (OTF)” and have implemented them on Martini. The evaluation results show that Martini connected to a 64bit/66MHz PCI-bus achieves 470MByte/s maximum bidirectional bandwidth and 1.74 μsec minimum latency on host-to-host memory copying.
New Literature
Venue: Computer (1977)

MICROELECTRONIC PACKAGING SYSTEMS AND HARDWARE. MUPAC Corporation is offering a 60-page brochure, covering their complete line of microelectronic packaging systems and hardware. Described are microelectronic wire wrap panels and rack assemblies, as well as all associated hardware, including cable assemblies, component carriers, frames, pre-cut stripped wire, and enclosures. Available from the company at 646 summer Street, Brockton, MA 02402. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
Active XML Schema Containment Checking Based on Tree Automata Theory
Authors: Haitao Ma, Zhongxiao Hao, Yinghui Zhou
Venue: Proceedings of the 7th IEEE International Conference on Computer and Information Technology (2007)

An Active XML (AXML for short) document is an XML document where some of the data is given explicitly while other parts are defined only intentionally by means of em- bedded calls to Web services. When one of these calls is invoked, its results will be returned to enrich the original document. AXML schema defines the specification that AXML doc- uments should conform. Containment checking for AXML schemas has many applications, and is thus important. In this paper, we focus on the problem of AXML schema con- tainment and propose an efficient algorithm for this purpose based on tree automata theory. More precisely, we extend regular tree automata to represent AXML schemas and re- duce schema containment to the corresponding problem of tree automata. Though the latter has high complexity in general cases, we describe the tractable case by introduc- ing un-ambiguous restricts to AXML schema. Finally, we discuss that our methods for checking schema containment also can be used to solve the problem of AXML schema rewriting.
Syntactic Error Correction in Programming Languages
Authors: Kuo-Chung Tai
Venue: IEEE Transactions on Software Engineering (1978)

A technique for syntactic error correction, called pattern mapping, is developed. A pattern is used to describe how to map or change one string into another. Using a preconstructed list of patterns, for each detected error, the first pattern with successful mapping is found and a correction is made based on this pattern.
A Continuous Query Index for Processing Queries on RFID Data Stream
Authors: Jaekwan Park, Bonghee Hong, Chaehoon Ban
Venue: Proceedings of the 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (2007)

RFID middleware systems collect and filter RFID streaming data gathered continuously by numerous readers to process requests from applications. These requests are called continuous queries because they are executed continuously during tag movement. To enhance the performance of the middleware, an index must be built to process these continuous queries efficiently. Several approaches to building an index on queries rather than data records, called query index, have been proposed and are widely used to evaluate continuous queries over streaming data. EPCglobal proposed an Event Cycle Specification (ECSpec) model, which is a de facto standard query interface for RFID applications. Continuous queries based on ECSpec consist of a large number of segments that represent the query conditions. The problem when using any of the existing query indexes on these continuous queries is that it takes a long time to build the index because it is necessary to insert a large number of segments into the index. To solve this problem, we propose an aggregate transformation that converts a group of segments into compressed data. We also propose an efficient query index scheme for the transformed space. We compare the performance of the proposed index with existing query indexes. Our experiments show that the proposed index outperforms the others on various datasets.