ppxscal/embedding_network huggingface dataset:
Verifying correct pipeline implementation for microprocessors
Authors: Jeremy Levitt, Kunle Olukotun
Venue: Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design (1997)

We introduce a general, automatic verification technique for pipelined designs. The technique is based on a scalable, formal methodology for analyzing pipelines. The key advantages to our technique are: it specifically targets pipeline control, making it more efficient; it requires no explicit specification, since it compares hardware against itself; it can be used within the broader framework of hierarchical verification; and, it can be easily extended to handle certain "complex" pipelined structures.
Fashioning conceptual constructs in Ada
Authors: Robert C. Shock
Venue: Proceedings of the conference on TRI-ADA '90 (1990)

It is believed that future progress of software productivity depends upon capturing the essence of software in a unit called conceptual construct [BRO87]. The objective of this investigation is to characterize the conceptual construct in Ada code. The objective is met when the control/interfacing structures of the software product can be housed in a unit of code that separates itself from the specific instances of the data productions. This control unit can be reused without alterations for all instances of the data productions. The effect of this separation is analogous to a hardware chip that houses the logic and control structure in a black box, yet allows various sets of data to pass through it. The scope of the investigation characterizes the conceptual construct, details several examples of it, and outlines a design methodology that uses it. This methodology and a well-known, established one are both applied to the same problem. The resulting designs are compared. This investigation leads to these conclusions. To capture the notion of software essence requires two distinct steps. Step one abstracts the problem to a higher level of domain independence. Step two separates this level into a control unit and a unit of data productions. The control unit is reused without alterations for all instances of the data productions. The success of design reuse is directly proportional to the separation of the control flow of the program from the data productions.
Estimating steady state mean from short transient simulations
Authors: Pieter A. Voss, Jorge Haddock, Thomas R. Willemain
Venue: Proceedings of the 28th conference on Winter simulation (1996)

This paper presents a new approach to estimating and constructing confidence intervals for the steady state mean of a stochastic process from short simulations which may exhibit significant transient response. Specifically, we examine the conditional least squares estimator for the mean of an autoregressive process. If the process is autoregressive with normal innovations, this estimator is the conditional maximum likelihood estimate (MLE) of the mean. We show that the MLE is asymptotically normal, and derive a finite-sample approximation to its distribution. This provides the basis for two asymptotically valid single-replication confidence intervals which do not require choosing a batch size. As a point estimator, the MLE is a generalization of the estimator due to Snell and Schruben (1984) and is related to the weighted batch mean (Bischak, Kelton, and Pollock, 1993). Empirical results for a queuing network show that the autoregressive process is a reasonable model of transient response. For short series with reasonable initializations (e.g., empty and idle), the MLE yields confidence inter vals which are comparable or superior to those of existing procedures, in both single and parallel replication simulations.
Integrating information requirements along processes: a survey and research directions
Authors: C. Francalanci, A. Fuggetta
Venue: ACM SIGSOFT Software Engineering Notes (1997)

Information requirements have traditionally been collected separately for different business functions and then integrated into an overall specification. The recent orientation to a process perspective in managing business activities has emphasized early integration, by concurrently analyzing business processes and information requirements. Accordingly, information requirements analysis methodologies should take into account these new integration needs. In the paper, we discuss these new integration needs. Traditional methods for requirements integration from database design are analyzed and unfulfilled integration needs are highlighted. Then, other research fields are surveyed that dealt with problems similar to integration and offer interesting results: Recent developments in database design, software engineering and requirements reuse. Finally, we compare the different contributions and indicate open research directions.
Linear Sections of the Finite Veronese Varieties and AuthenticationSystems Defined Using Geometry
Authors: Corrado Zanella
Venue: Designs, Codes and Cryptography (1998)

In this paper we deal with authentication systems in which one key is used to authenticate many source states. We answer a related question on the cardinalities of the intersections of quadrics in PG (d,q). We first generalize a class of geometric authentication systems, which has been introduced by Beutelspacher, Tallini and Zanella4. The source states are the lines through a special point N of PG (d,q) (the d-dimensional projective space over GF (q)). The keys are some hypersurfaces which have N as a nucleus ( N is a nucleus of &Sigma; if every line through N meets &Sigma; in exactly one point). The message belonging to a source state &ell; and a key &Sigma; is the unique point of intersection of the line &ell; with the hypersurface &Sigma;. We give the values of s for which the constructed authentication systems have a security which is comparable to the best allowed by a theoretical bound. In case the hypersurfaces are quadrics, we give further results on the security. To this end, we determine the greatest cardinality for the intersections of the finite Veronese varieties with the projective subspaces of any given dimension. Finally, we discuss a possible implementation.
Mapping Conjugate Gradient Algorithms for Neutron Diffusion Applications onto SIMD, MIMD, and Mixed-Mode Machines
Authors: John John E. So, Thomas J. Downar, Raghunandan Janardhan, Howard Jay Siegel
Venue: International Journal of Parallel Programming (1998)

The performance of conjugate gradient (CG) algorithms for the solution of the system of linear equations that results from the finite-differencing of the neutron diffusion equation was analyzed on SIMD, MIMD, and mixed-mode parallel machines. A block preconditioner based on the incomplete Cholesky factorization was used to accelerate the conjugate gradient search. The issues involved in mapping both the unpreconditioned and preconditioned conjugate gradient algorithms onto the mixed-mode PASM prototype, the SIMD MasPar MP-1, and the MIMD Intel Paragon XP/S are discussed. On PASM , the mixed-mode implementation outperformed either SIMD or MIMD alone. Theoretical performance predictions were analyzed and compared with the experimental results on the MasPar MP-1 and the Paragon XP/S. Other issues addressed include the impact on execution time of the number of processors used, the effect of the interprocessor communication network on performance, and the relationship of the number of processors to the quality of the preconditioning. Applications studies such as this are necessary in the development of software tools for mapping algorithms onto either a single parallel machine or a heterogeneous suite of parallel machines.
NRG: global and detailed placement
Authors: Majid Sarrafzadeh, Maogang Wang
Venue: Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design (1997)

We present a new approach to the placement problem. The proposed approach consists of analyzing the input circuit and deciding on a two-dimensional global grid for that particular input. After determination of the grid size, the placement is carried out in three steps: global placement, detailed placement and final optimization. We will show that the output of the global placement can also serve as a fast and accurate predictor. Current implementation is based on simulated annealing. We have put all algorithms together in a placement package called NRG (pronounced N-er-G). In addition to area minimization, NRG can perform timing-driven placement. Experimental results are strong. We improve TimberWolf's results (version 1.2, the commercial version which is suppose to be better than all university versions including version 7) by about 5%. Our predictor can estimate the wirelength within 10-20% accuracy offering 2-20x speedup compared with the actual placement algorithm.
Memory-to-memory connection structures in FPGAs with embedded memory arrays
Authors: Steven J. E. Wilton, Jonathan Rose, Zvonko G. Vranesic
Venue: Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays (1997)

This paper shows that the speed of FPGAs with large embedded memory arrays can be improved by adding direct programmable connections between the memories. Nets that connect to multiple memory arrays are often difficult to route, and are often part of the critical path of circuit implementations. The memory-to-memory connection structure proposed in this paper allows for the efficient implementation of these nets, resulting in a reduction in memory access time of up to 25% and a slight improvement in routability.
HERCULES&mdash;a system for high-level synthesis
Authors: Giovanni De Micheli, David C. Ku
Venue: Proceedings of the 25th ACM/IEEE Design Automation Conference (1988)

This paper presents an approach to high-level synthesis of VLSI processors and systems. Synthesis consists of two phases: behavioral synthesis, which involves implementation-independent representations, and structural synthesis, that relates to the transformation of a behavior into an implementation. We describe HERCULES, a system for high-level synthesis developed at Stanford University. In particular, we address the hardware description problem, behavioral synthesis and optimization using a method called the reference stack, and the mapping of behavior onto a structure. We present a model for control based on sequencing graphs that supports multiple threads of execution flow, allowing varying degree of parallelism in the resulting hardware. Results are then presented for three examples: MC6502, Intel8251 and FRISC, a 16-bit microprocessor.
Space-Variant Fourier Analysis: The Exponential Chirp Transform
Authors: Giorgio Bonmassar, Eric L. Schwartz
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1997)

Space-variant, or foveating, vision architectures are of importance in both machine and biological vision. In this paper, we focus on a particular space-variant map, the log-polar map, which approximates the primate visual map, and which has been applied in machine vision by a number of investigators during the past two decades. Associated with the log-polar map, we define a new linear integral transform, which we call the exponential chirp transform. This transform provides frequency domain image processing for space-variant image formats, while preserving the major aspects of the shift-invariant properties of the usual Fourier transform. We then show that a log-polar coordinate transform in frequency (similar to the Mellin-Transform) provides a fast exponential chirp transform. This provides size and rotation, in addition to shift, invariant properties in the transformed space. Finally, we demonstrate the use of the fast exponential chirp algorithm on a database of images in a template matching task, and also demonstrate its uses for spatial filtering. Given the general lack of algorithms in space-variant image processing, we expect that the fast exponential chirp transform will provide a fundamental tool for applications in this area.
Empirical Evaluation of Innovations in Interval Branch and Bound Algorithms for Nonlinear Systems
Authors: R. Baker Kearfott
Venue: SIAM Journal on Scientific Computing (1997)

Interval branch and bound algorithms for finding all roots use a combination of a computational existence/uniqueness procedure and a tessellation process (generalized bisection). Such algorithms identify, with mathematical rigor, a set of boxes that contains unique roots and a second set within which all remaining roots must lie. Though each root is contained in a box in one of the sets, the second set may have several boxes in clusters near a single root. Thus, the output is of higher quality if there are relatively more boxes in the first set. In contrast to previously implemented similar techniques, a box expansion technique in this paper, based on using an approximate root finder, $\epsilon$-inflation, and exact set complementation, decreases the size of the second set, increases the size of the first set, and never loses roots.In addition to the expansion technique, use of second-order extensions to eliminate small boxes that do not contain roots, and interval slopes versus interval derivative matrices are studied. These items are evaluated empirically on a significant test problem set, within a Fortran-90 environment designed for such purposes. The results are compared with previous results and show that careful incorporation of the techniques yields both quantitatively and qualitatively superior computer codes.
Generalized resource sharing
Authors: S. Raje, R. A. Bergamaschi
Venue: Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design (1997)

Resource sharing is one of the main tasks in high-level synthesis, and although many algorithms have addressed the problem there are still several limitations which restrict the generality and applicability of current algorithms. Most clique-partitioning-based algorithms use local and inaccurate cost-functions which result in inefficient results. This paper presents algorithms for the resource sharing problem on registers and functional units, and shows how they overcome the limitations of existing algorithms. The main characteristics of this work are: interleaved register and functional unit merging in a global clique partitioning based framework, accurate merging cost estimation, accurate interconnect cost estimation, relative control cost taken into account and efficient false loop elimination. The results obtained show significant improvements in the delay of designs, while also minimizing area, specially for large designs with many sharing possibilities.
The InfoPad Multimedia Terminal: A Portable Device for Wireless Information Access
Authors: Thomas E. Truman, Trevor Pering, Roger Doering, Robert W. Brodersen
Venue: IEEE Transactions on Computers (1998)

The architecture of a device that is optimized for wireless information access and display of multimedia data is substantially different than configurations designed for portable stand-alone operation. The requirements to reduce the weight and energy consumption are the same, but the availability of the wireless link, which is needed for the information access, allows utilization of remote resources. A limiting case is when the only computation that is provided in the portable terminal supports the wireless links or the I/O interfaces, and it is this extreme position that is explored in the InfoPad terminal design. The architecture of the InfoPad terminal, therefore, can be viewed as essentially a switch which connects multimedia data sources in the supporting wired network to appropriate InfoPad output devices (e.g., video display), and connects InfoPad input devices to remote processing (e.g., speech recognizer server) in the backbone network.
Am embedded system case study: the firm ware development environment for a multimedia audio processor
Authors: Clifford Liem, Marco Cornero, Miguel Santana, Pierre Paulin, Ahmed Jerraya, Jean-Marc Gentit, Jean Lopez, Xavier Figari, Laurent Bergher
Venue: Proceedings of the 34th annual Design Automation Conference (1997)

This paper outlines a case study at SGS-Thomson Microelectronicson the development of a firmware development environment in co-operationwith Thomson Consumer Electronics Components. Theenviornment is for an embedded processor used for audiodecompression algorithms including: MPEG2, Dolby AC-3 Surround,and Dolby Pro-logic. The enabling component of the firmwareenvironment is a retargetable compiler which maps high-levelalgorithms onto the embedded processor. Although compilation is thecritical technology, this experience has shown that it is insufficient andthat other supporting design tools are also important. For this project,that environment includes an instruction-set simulator, a source-leveldebugger, a custom linker, and a compiler validation strategy. Themethodologies are outlined in this paper with an emphasis on thelessons learned in this hardware-software team development.
An Iteration for Indefinite Systems and Its Application to the Navier--Stokes Equations
Authors: Gene H. Golub, Andrew J. Wathen
Venue: SIAM Journal on Scientific Computing (1998)

For large sparse systems of linear equations iterative solution techniques are attractive. In this paper we propose and examine the convergence of an iterative method for an important class of nonsymmetric and indefinite coefficient matrices based on the use of an indefinite and symmetric preconditioner. We apply our technique to the linearized Navier--Stokes equations (the Oseen equations).
Adding some spice to CS1 curricula
Authors: Goefrey Holmes, Tony C. Smith
Venue: ACM SIGCSE Bulletin (1997)

CS1 curricula that focus primarily on teaching programming skills may fail to give students a sense of the breadth of topics to which a knowledge of computability might apply. We attempt to correct for this by adding a survey of computing concepts into our introductory course. Sophisticated topics usually reserved for senior level courses are presented in a popular science manner, and given equal time alongside the essential introductory programming material. By exposing students to a broad range of specific computational problems we endeavour to make their first course more interesting and enjoyable, and instil in them a sense of vision for areas they might specialise in as computing majors.
INFORMys: A Flexible Invoice-Like Form-Reader System
Authors: Francesca Cesarini, Marco Gori, Simone Marinai, Giovanni Soda
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1998)

In this paper, we describe a flexible form-reader system capable of extracting textual information from accounting documents, like invoices and bills of service companies. In this kind of document, the extraction of some information fields cannot take place without having detected the corresponding instruction fields, which are only constrained to range in given domains. We propose modeling the document's layout by means of attributed relational graphs, which turn out to be very effective for form registration, as well as for performing a focussed search for instruction fields. This search is carried out by means of a hybrid model, where proper algorithms, based on morphological operations and connected components, are integrated with connectionist models. Experimental results are given in order to assess the actual performance of the system.
Buekenhout-Tits Unitals
Authors: G. L. Ebert
Venue: Journal of Algebraic Combinatorics: An International Journal (1997)

A Buekenhout-Tits unital is defined to be a unital in {\it PG}(2, q^2) obtained by coning the Tits ovoid using Buekenhout&lsquo;s parabolic method. The full linear collineation group stabilizing this unital is computed, and related design questions are also addressed. While the answers to the design questions are very similar to those obtained for Buekenhout-Metz unitals, the group theoretic results are quite different
Constrained Learning in Neural Networks: Application to Stable Factorization of 2-D Polynomials
Authors: Stavros Perantonis, Nikolaos Ampazis, Stavros Varoufakis, George Antoniou
Venue: Neural Processing Letters (1998)

Adaptive artificial neural network techniques are introduced and applied to the factorization of 2-D second order polynomials. The proposed neural network is trained using a constrained learning algorithm that achieves minimization of the usual mean square error criterion along with simultaneous satisfaction of multiple equality and inequality constraints between the polynomial coefficients. Using this method, we are able to obtain good approximate solutions for non-factorable polynomials. By incorporating stability constraints into the formalism, our method can be successfully used for the realization of stable 2-D second order IIR filters in cascade form.
Board-level multiterminal net routing for FPGA-based logic emulation
Authors: Wai-Kei Mak, D. F. Wong
Venue: ACM Transactions on Design Automation of Electronic Systems (TODAES) (1997)

We consider a board-level routing problem applicable to FPGA-based logic emulation systems such as the Realizer System [Varghese et al. 1993] and the Enterprise Emulation System [Maliniak 1992] manufactured by Quickturn Design Systems. Optimal algorithms have been proposed for the case where all nets are two-terminal nets [Chan and Schlag 1993; Mak and Wong 1995]. We show how multiterminal nets can be handled by decomposition into two-terminal nets. We show that the multiterminal net decomposition problem can be modeled as a bounded-degree hypergraph-to-graph transformation problem where hyperedges are transformed to spanning trees. A network flow-based algorithm that solves both problems is proposed. It determines if there is a feasible decomposition and gives one whenever such a decomposition exists.
Polysomnography: a systematic review
Authors: Konrad E. Bloch
Venue: Technology and Health Care (1997)

Polysomnography refers to the continuous monitoring of multiple neurophysilogical and cardiorespiratory variables, usually over the course of a night, to study normal and disturbed sleep. Electroencephalographic, electrooculographic and electromyographic channels provide the basis for staging the recording into successive epochs of wakefulness and various non-Rapid-Eye-Movement (REM) and REM sleep. Detection of airflow at the nose and mouth by means of thermistors, and analysis of breathing patterns recorded from sensors placed around the ribcage and abdomen, sound recordings, the electrocardiogram and the combined application of several other measurement techniques allow the assessment of normal and abnormal physiological events in relation to sleep structure. Polysomnography has an important role in the diagnosis of disorders of sleep and wakefulness as well as in the assessment of treatment effects and in scientific investigations. Developments in digital signal processing have contributed to its widespread application in clinical practice and research.
A statistically emergent approach for language processing: application to modeling context effects in ambiguous Chinese word boundary perception
Authors: Kok-Wee Gan, Kim-Teng Lua, Martha Palmer
Venue: Computational Linguistics (1996)

This paper proposes that the process of language understanding can be modeled as a collective phenomenon that emerges from a myriad of microscopic and diverse activities. The process is analogous to the crystallization process in chemistry. The essential features of this model are: asynchronous parallelism; temperature-controlled randomness; and statistically emergent active symbols. A computer program that tests this model on the task of capturing the effect of context on the perception of ambiguous word boundaries in Chinese sentences is presented. The program adopts a holistic approach in which word identification forms an integral component of sentence analysis. Various types of knowledge, from statistics to linguistics, are seamlessly integrated for the tasks of word boundary disambiguation as well as sentential analysis. Our experimental results showed that the model is able to address the word boundary ambiguity problems effectively.