ppxscal/embedding_network huggingface dataset:
Modeling and forecasting of manufacturing variations (embedded tutorial)
Authors: Sani R. Nassif
Venue: Proceedings of the 2001 Asia and South Pacific Design Automation Conference (2001)

Process-induced variations are an important consideration in the design of integrated circuits. Until recently, it was sufficient to model die-to-die shifts in device performance, leading to the well known worst-case modeling and design methodology [1, 2]. However, current and near-future in-tegrated circuits are large enough that device and intercon-nect parameter variations within the chip are as important as those same variations from chip to chip. This presents a new set of challenges for process modeling and characterization and for the associated design tools and method-ologies. This paper examines the sources and trends of process variability, the new challenges associated with the increase in within-die variability analysis, and proposes a modeling and simulation methodology to deal with this variability.
A system-level co-verification environment for ATM hardware design
Authors: G. Post, A. Müller, T. Grötker
Venue: Proceedings of the conference on Design, automation and test in Europe (1998)

Common approaches to hardware implementation of networking components start at the VHDL level and are based on the creation of regression test benches to perform simulative validation of functionality. The time needed to develop test benches has proven to be a significant bottleneck with respect to time-to-market requirements. In this paper, we describe the coupling of a telecommunication network simulator with a VHDL simulator and a hardware test board. This co-verification approach enables the designer of hardware for networking components to verify the functional correctness of a device under test against the corresponding algorithmic description and to perform functional chip verification by reusing test benches from a higher level of abstraction.
Eyes on the road&mdash;augmenting traffic information
Authors: Martin Johansson, Mårten Pettersson
Venue: Proceedings of DARE 2000 on Designing augmented reality environments (2000)

This position paper outlines design ideas gained from a project dealing with different interaction concepts when designing a computer based navigation systems for truck drivers working over large areas and where the delivery and pick-up points from time to time are unfamiliar to the driver. The extension of this previous project includes more `untraditional' technology, but has the same approach and uses the same basic concepts. Both the original design and the new design are based on an empirical study of truck drivers work practice.
Scalable molecular dynamics for large biomolecular systems
Authors: Robert K. Brunner, James C. Phillips, Laxmikant V. Kale
Venue: Proceedings of the 2000 ACM/IEEE conference on Supercomputing (CDROM) (2000)

We present an optimized parallelization scheme for molecular dynamics simulations of large biomolecular systems, implemented in the production-quality molecular dynamics program NAMD. With an object-based hybrid force and spatial decomposition scheme, and an aggressive measurement-based predictive load-balancing framework, we have attained speeds and speedups that are much higher than any reported in literature so far. The paper first summarizes the broad methodology we are pursuing, and the basic parallelization scheme we used. It then describes the optimizations that were instrumental in increasing performance, and presents performance results on benchmark simulations.
A Comparison between the Tikhonov and the Bayesian Approaches to Calculate Regularisation Matrices
Authors: Andreu Català, Cecilio Angulo
Venue: Neural Processing Letters (2000)

Regularisation is a well-known technique for working with ill-posed and ill-conditioned problems that have been explored in a variety of different areas, including Bayesian inference, functional analysis, optimisation, numerical analysis and connectionist systems. In this paper we present the equivalence between the Bayesian approach to the regularisation theory and the Tikhonov regularisation into the function approximation theory framework, when radial basis functions networks are employed. This equivalence can be used to avoid expensive calculations when regularisation techniques are employed.
Education in high performance computing via the WWW: designing and using technical materials effectively
Authors: Susan Mehringer
Venue: Proceedings of the 1996 ACM/IEEE conference on Supercomputing (CDROM) (1996)

Cornell Theory Center, a national center for high performance computing, has been designing and delivering education programs on parallel processing in traditional workshops for years. With the advent and growth of the World Wide Web, we have been able to expand our training efforts to a distance education format, including online lectures and exercises, communication with CTC consultants and other participants, and logins on CTC's world-class IBM RS/6000 SP. This description includes workshop design, technical content covered, design of the modules, and participants' response.
Computer technology in communist China, 1956-1965
Authors: Donald G. Audette
Venue: Communications of the ACM (1966)

Based on information from translations of Communist Chinese news items and periodical literature for the 1956 through 1965 period, computer technology in China is reviewed under the following headings: (1) initial planning, organization and educational aspects of computer technology and automation; 2) machine development progress: two major specific machines in 1958-59, with Soviet aid; a vacuum in 1960-64 due to the withdrawal of Soviet aid; then presumably all-Chinese-made machines from 1965 to the present; (3) computer applications; (4) the trend of automation: control of production processes rather than data processing; and (5) the &ldquo;Yun Ch'ou Hsueh&rdquo; (Science of Operation and Programming) campaign of 1958-60, during which an attempt was made to bring concepts such as linear programming to ordinary Chinese workers and peasants. Communist China is adjudged to have a marginal computer capability, with most of its machines probably being of a binary nature; however, a turning point may have been reached in mid-1965.
Cost profile of a highly assured, secure operating system
Authors: Richard E. Smith
Venue: ACM Transactions on Information and System Security (TISSEC) (2001)

The Logical Coprocessing Kernel (LOCK) began as a research project to stretch the state of the art in secure computing by trying to meet or even exceed the &ldquo;A1&rdquo; requirements of the Trusted Computer System Evaluation Criteria (TCSEC). Over the span os seven years, the project was transformed into an effort to develop and deploy a product: the Standard Mail Guard (SMG). Since the project took place under a US government contract, the development team needed to maintain detailed records of the time spent on the project. The records from 1987 to 1992 have been combined with information about software code size and error detection. This information has been used to examine the practical impacts of high assurance techniques on a large-scale software development program. Tasks are associated with the A1 formal assurance requirements added approximately 58% to the development cost of security-critical software. In exchange for these costs, the formal assurance tasks (formal specifications, proofs, and specification code correspondence) uncovered 68% of the security flaws detected in LOCK's critical security mechanisms. However, a study of flaw detection during the SMG program found that only 14% of all flaws detected were of the type that could be detected using formal assurance, and that the work of the formal assusrance team only accounted for 19% of all flaws detected. While formal assurance is clearly effective at detecting flaws, its practicality hinges on the degree to which the formally modeled system properties represent all of a system's esential properties.
Efficient Parallelization of a Three-Dimensional Navier-Stokes Solver on MIMD Multiprocessors
Authors: A. Averbuch, B. Epstein, L. Ioffe, I. Yavneh
Venue: The Journal of Supercomputing (2000)

We present an efficient parallelization strategy for speeding up the computation of a high-accuracy 3-dimensional serial Navier-Stokes solver that treats turbulent transonic high-Reynolds flows. The code solves the full compressible Navier-Stokes equations and is applicable to realistic large size aerodynamic configurations and as such requires huge computational resources in terms of computer memory and execution time. The solver can resolve the flow properly on relatively coarse grids. Since the serial code contains a complex infrastructure typical for industrial code (which ensures its flexibility and applicability to complex configurations), then the parallelization task is not straightforward. We get scalable implementation on massively parallel machines by maintaining efficiency at a fixed value by simultaneously increasing the number of processors and the size of the problem.The 3-D Navier-Stokes solver was implemented on three MIMD message-passing multiprocessors (a 64-processors IBM SP2, a 20-processors MOSIX, and a 64-processors Origin 2000). The same code written with PVM and MPI software packages was executed on all the above distinct computational platforms. The examples in the paper demonstrate that we can achieve efficiency of about 60% for as many as 64 processors on Origin 2000 on a full-size 3-D aerodynamic problem which is solved on realistic computational grids.
Form management
Authors: D. Tsichritzis
Venue: Communications of the ACM (1982)

This paper consists of three interrelated parts. In the first part forms are intoduced as an abstraction and generalization of business paper forms. A set of facilities for the manipulation of forms and their contents is outlined. Forms can be created, stored, found, viewed in different media, mailed, and located by office workers. Data on forms can also be processed in a completely integrated way. The facilities are discussed both abstractly and in relation to a prototype system. In the second part a facility is outlined for the specification and implementation of automatic form procedures. These procedures specify actions on forms which are triggered automatically when certain preconditions are met. The preconditions, actions, and specification method are based on forms. The discussion is centered on our implementation of such a specification framework. Finally, in the third part, techniques for the analysis of office flow are specified. An algorithm is outlined for the categorization of forms into classes depending on the local routing and actions on the forms. In this way, we can obtain the paths that forms take and analyze the system for correctness and loading characteristics.
Concurrent error recovery with near-zero latency in synthesized ASICs
Authors: S. N. Hamilton, A. Orailoglu
Venue: Proceedings of the conference on Design, automation and test in Europe (1998)

The importance of fault tolerant design has been steadily increasing as reliance on error free electronics continues to rise in critical military, medical, and automated transportation applications. While rollback and checkpointing techniques facilitate area efficient fault tolerant designs, they are inapplicable to a large class of time-critical applications. We have developed a novel synthesis methodology that avoids rollback, and provides both zero reduction in throughput and near-zero error latency. In addition, our design techniques reduce power requirements associated with traditional approaches to fault tolerance.
The reconstruction of binary patterns from their projections
Authors: Shi-Kuo Chang
Venue: Communications of the ACM (1971)

Given the horizontal and vertical projections of a finite binary pattern f, can we reconstruct the original pattern f? In this paper we give a characterization of patterns that are reconstructable from their projections. Three algorithms are developed to reconstruct both unambiguous and ambiguous patterns. It is shown that an unambiguous pattern can be perfectly reconstructed in time m &times; n and that a pattern similar to an ambiguous pattern can also be constructed in time m &times; n, where m, n are the dimensions of the pattern frame.
Eliminating monotonous mathematics with FORMAC
Authors: Robert G. Tobey
Venue: Communications of the ACM (1966)

The FORMAC (FORmula MAnipulation Compiler) programming system provides a powerful tool for performing mathematical analysis. It is an extension of FORTRAN IV which permits the use of the computer to perform the tedious algebraic computations that arise in many different fields. Among the areas in which it has been successfully used are: differentiation of complicated expressions; expansion of truncated power series, solution of simultaneous equations with literal coefficients, nonlinear maximum likelihood estimation, tensor analysis, and generation of the coefficients of equations in Keplerian motion. These types of analysis&mdash;which arose in the solution of specific practical problems in physics, engineering, astronomy, statistics and astronautics&mdash;are discussed in the paper. In addition to its usage for specific problem solutions, FORMAC can also be used to automate the analysis phase in certain production programming. Several such applications are presented.
Exploiting parallelism in a network of workstations using COMA-BC
Authors: Benjamín Sahelices Fernández, Diego R. Llanos Ferraris, Agustín de Dios Hernández
Venue: ACM SIGARCH Computer Architecture News (2000)

In this paper we put forward a design for a multicomputer system based on a network of workstations which we call COMA-BC. It has a common address space in which a shared variables programming model can be used. The management of the shared address space is performed in a similar way to that in existing multiprocessor COMA systems. To be exact, the shared address space is divided into blocks, and their copies reside in the attraction memories of the workstations.The key piece in this system is the coherence cache protocol that we have developed. The goal of the protocol is to minimize the number and size of the messages travelling through the network so that the parallel applications can be executed without creating inconsistencies in the different copies of the blocks residing in the different nodes of the system.The proposed system has not been built, but a simulation environment has been specifically developed. This environment allows the simulation of the execution of parallel standard applications in COMA-BC. This simulation environment is driven by execution. Using the results and a simple analytic model, results have been obtained concerning the performance of the execution of standard parallel applications in terms of acceleration and efficiency. These results show the viability of a COMA-BC system as a way of exploiting parallelism at a low cost using workstations.
A Learning Agent that Assists the Browsing of Software Libraries
Authors: Christopher G. Drummond, Dan Ionescu, Robert C. Holte
Venue: IEEE Transactions on Software Engineering (2000)

Locating software items is difficult, even for knowledgeable software designers, when searching in large, complex, and continuously growing libraries. This paper describes a technique we term active browsing. An active browser suggests to the designer items it estimates to be close to the target of the a search. The novel aspect of active browsing is that it is entirely unobtrusive: It infers its similarity measure from the designer's normal browsing actions, without any special input. Experiments are presented in which the active browsing system succeeds 40 percent of the time in identifying the target before the designer has found it. An additional experiment indicates that this approach does, indeed, speed-up searches.
An algorithm for synthesis of large time-constrained heterogeneous adaptive systems
Venue: ACM Transactions on Design Automation of Electronic Systems (TODAES) (2001)

Large time-constrained applications are highly computer-intensive and are often implemented as a complex organization of pipelined data parallel tasks on a pool of embedded processors, DSP processors, and FPGAs. The large number of design alternatives available at each task level, the application as a whole, and the special needs of the reconfigurable devices (such as the FPGA) make the manual synthesis of such systems very tedious. The automatic synthesis algorithm in this paper combines exact (MILP-based) and heuristic techniques to solve this problem, which basically involves (1) propagation of timing constraints; (2) pipelining the loops to meet throughput requirements; (3) resource selection and scheduling, keeping the processing requirements and the timing constraints in view; (4) scheduling the resources across the tasks to ensure maximum utilization; and (5) hiding the reconfiguration delays of the FPGAs. While the use of MILP techniques helps in getting high-quality results, combining them with heuristics ensures acceptable synthesis times, striking a good balance between quality of results and synthesis time. Our experimental evaluation of the algorithm shows an average 40% in resource cost reduction (compared to manual synthesis) with synthesis times from minutes to as low as a few seconds in some cases.
Breaking and entering the male domain. Women in the IT industry
Authors: Liisa A. von Hellens, Sue H. Nielsen, Eileen M. Trauth
Venue: Proceedings of the 2001 ACM SIGCPR conference on Computer personnel research (2001)

Interviews with Australian IT professionals (twenty-two women and two men) working in technical areas are referenced to explore how the masculinity of the IT industry is perceived by women working as IT professionals. The skills the interviewees see as important for success in this industry and which have helped them to pursue a satisfactory and fulfilling career are also discussed. Mentoring is suggested as a means of changing young women's negative perceptions or IT as a career, in order to improve female participation in IT education and the IT industry.
Recorded magnetic tape for information interchange (1600 CPI, phase encoded)
Authors: C. Kerpelman
Venue: Communications of the ACM (1970)

This proposed American National Standard has been accepted for publication by American National Standards Committee X3, Computers and Information Processing. In order that the final version of the proposed standard reflect the largest public consensus, X3 authorized publication of this document to elicit comment and general public reaction, with the understanding that such a working document is an intermediate result in the standardization process and is subject to change, modification, or withdrawal in part or in whole. Comments should be directed to the X3 Secretary, Business Equipment Manufacturers Association, 1828 L Street, NW, Washington, DC 20036.&mdash;C.K.
DACIA: a mobile component framework for building adaptive distributed applications
Authors: Radu Litiu, Atul Prakash
Venue: ACM SIGOPS Operating Systems Review (2001)

Future distributed applications will need to support computing devices with a wide range of capabilities, varying network connectivity, increasing mobility of users, and a wide variation in load placed by clients on services. This paper presents DACIA, a framework for building adaptive distributed applications. In DACIA, distributed applications are viewed as consisting of connected components that typically implement data streaming, processing, and filtering functions. DACIA provides mechanisms for run-time reconfiguration of applications to allow them to adapt to the changing operating environments. Components can be moved to different hosts during execution, while maintaining communication connectivity with other components. New components can also be introduced along data paths, for example, to provide compression on low-bandwidth connections. Keeping communication overheads low is a significant challenge in designing component-based services. DACIA is designed so that communication costs among co-located components are similar to those of procedure calls. Performance results, as well as examples of adaptive services that can be built using DACIA are presented.
Making the Fortran-to-C transition: how painful is it really?
Authors: Gerhard Theurich, Bryce Anson, Nicola A. Hill, Adrian Hill
Venue: Computing in Science and Engineering (2001)

For over a decade, the Fortran/C controversy has split the scientific computing community into two groups. This article does not give a long list of technical pros and cons for either programming language, but provides the reader with a "real-world" case study of the Fortran-to-C transition the authors recently made.
A user-oriented time-shared online system
Authors: Laszlo Betyar
Venue: Communications of the ACM (1967)

An existing system and planned additions within the Data Processing Laboratory of the Brain Research Institute at UCLA is described. The system represents an attempt to provide research workers of the Institute with the ability to interact directly with a highly sophisticated digital computing complex in the most direct and simple fashion possible. It is anticipated that, with the accumulation of experience using the present system, significant advances will be possible in the system design through determination of interface parameters between the biological scientist and the digital computer.
Constructing worst case instances for semidefinite programming based approximation algorithms
Authors: Noga Alon, Benny Sudakov, Uri Zwick
Venue: Proceedings of the twelfth annual ACM-SIAM symposium on Discrete algorithms (2001)

Semidefinite programming based approximation algorithms, such as the Goemans and Williamson approximation algorithm for the MAX CUT problem, are usually shown to have certain performance guarantees using local ratio techniques. Are the bounds obtained in this way tight? This problem was considered before by Karloff and by Alon and Sudakov. Here we further extend their results and show, for the first time, that the local analyses of the Goemans and Williamson MAX CUT algorithm, as well as its extension by Zwick, are tight for every possible relative size of the maximum cut. We also obtain similar results for several related problems. Our approach is quite general and could possibly be applied to some additional problems and algorithms.
Bresenham's algorithm with Grey scale
Authors: M. L. V. Pitteway, D. J. Watkinson
Venue: Communications of the ACM (1980)

The control parameter in Bresenham's algorithm, when interpreted as a measure of distance from a straight line boundary, gives a weighted average of the intensities on each side of the line. This can be used to produce an aesthetically pleasing visual effect with modern display devices.
Double standards: bringing task parallelism to HPF via the message passing interface
Authors: Ian Foster, David R. Kohr,  Jr., Rakesh Krishnaiyer, Alok Choudhary
Venue: Proceedings of the 1996 ACM/IEEE conference on Supercomputing (CDROM) (1996)

High Performance Fortran (HPF) does not allow efficient expression of mixed task/data-parallel computations or the coupling of separately compiled data-parallel modules. In this paper, we show how a coordination library implementing the Message Passing Interface (MPI) can be used to represent these common parallel program structures. This library allows data-parallel tasks to exchange distributed data structures using calls to simple communication functions. We present microbenchmark results that characterize the performance of this library and that quantify the impact of optimizations that allow reuse of communication schedules in common situations. In addition, results from two-dimensional FFT, convolution, and multiblock programs demonstrate that the HPF/MPI library can provide performance superior to that of pure HPF. We conclude that this synergistic combination of two parallel programming standards represents a useful approach to task parallelism in a data-parallel framework, increasing the range of problems addressable in HPF without requiring complex compiler technology.