ppxscal/embedding_network huggingface dataset:
On the maximum size of (P,Q)-free families
Authors: Zoltan Furedi, Andras Gyarfas, Miklos Ruszinko
Venue: Discrete Mathematics (2002)

Let p be a positive integer and let Q be a subset of {0, 1,..., p}. Call p sets A1,A2,...,Ap of a ground set X a (p, Q)-system if the number of sets Ai containing x is in Q for every x ∈ X. In hypergraph terminology, a (p, Q)-system is a hypergraph with p edges such that each vertex x has degree d(x) ∈ Q. A family of sets F with ground set X is called (p, Q)-free if no p sets of F form a (p, Q)-system on X. We address the Turán-type problem for (p, Q)-systems: f(n,p,Q) is defined as max|F| over all (p,Q)-free families on the ground set [n] = {1,2,...,n}. We study the behavior of f(n, p, Q) when p and Q are fixed (allowing 2p+1 choices for Q) while n tends to infinity. The new results of this paper mostly relate to the middle zone where 2n-1 ≤ f(n,p,Q) ≤ (1 - c)2n (in this upper bound c depends only on p). This direction was initiated by Paul Erdös who asked about the behavior of f(n, 4,{0,3}). In addition, we give a brief survey on results and methods (old and recent) in the low zone (where f(n, p, Q) = o(2n)) and in the high zone (where 2n - (2 - c)n < f(n, p, Q)).
Delay-Fault Diagnosis by Critical-Path Tracing
Authors: Patrick Girard, Christian Landrault, Serge Pravossoudovitch
Venue: IEEE Design Test (1992)

A delay fault diagnosis process consisting of simulation of the fault-free circuit with a four-valued logic algebra and critical-path tracing from primary outputs to primary inputs is presented. An alternative to fault simulation, the method requires no delay-size-based fault models and considers only the fault-free circuit. A sensitivity analysis process for improving diagnosis accuracy is also presented.
Isoperimetric Normalization of Planar Curves
Authors: D. Sinclair, A. Blake
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1994)

This paper presents an algorithm for transforming closed planar curves into a canonical form, independent of the viewpoint from which the original image of the contour was taken. The transformation that takes the contour to its canonical form is a member of the projective group PGL(2), chosen because PGL(2) contains all possible transformations of a plane curve under central projection onto another plane. The scheme relies on solving computationally an "isoperimetric" problem in which a transformation is sought which maximises the area of a curve given unit perimeter. In the case that the transformation is restricted to the affine subgroup there is a unique extremising transformation for any piecewise smooth closed curve. Uniqueness holds, almost always, even for curves that are not closed. In the full projective case, isoperimetric normalization is well-defined only for closed curves. We have found computational counterexamples for which there is more than one extremal transformation. Numerical algorithms are described and demonstrated both for the affine and the projective cases. Once a canonical curve is obtained, its isoperimetric area can be regarded as an invariant descriptor of shape.
An Agent Framework for Intranet Document Management
Authors: Mark Ginsburg
Venue: Autonomous Agents and Multi-Agent Systems (1999)

Document management inside an organization is a complex and broadly scoped problem. This paper approaches the technical and social issues of Intranet document management by developing a straightforward document lifecycle model consisting of five phases: creation, publication, organization, access, and destruction. A document management system (DMS) which encompasses these areas should also have an evaluation component so its effectiveness can be measured.The document lifecycle is visualized as a waterfall model to help explore the discrete phases of an idealized Intranet DMS. The discussion of this model pinpoints where traditional DMS have fallen short, most notably in the areas of user-to-user and user-to-evaluator communication and coordination.From the document lifecycle, we derive an agent framework to integrate technical and social considerations and guide the design, implementation, and evaluation of a flexible and efficient DMS. The lifecycle model and agent framework are useful to organize both technical and social perspectives in this area.
Finding Patterns in Three-Dimensional Graphs: Algorithms and Applications to Scientific Data Mining
Authors: Xiong Wang, Jason T. L. Wang, Dennis Shasha, Bruce A. Shapiro, Isidore Rigoutsos, Kaizhong Zhang
Venue: IEEE Transactions on Knowledge and Data Engineering (2002)

This paper presents a method for finding patterns in 3D graphs. Each node in a graph is an undecomposable or atomic unit and has a label. Edges are links between the atomic units. Patterns are rigid substructures that may occur in a graph after allowing for an arbitrary number of whole-structure rotations and translations as well as a small number (specified by the user) of edit operations in the patterns or in the graph. (When a pattern appears in a graph only after the graph has been modified, we call that appearance ¿approximate occurrence.¿) The edit operations include relabeling a node, deleting a node and inserting a node. The proposed method is based on the geometric hashing technique, which hashes node-triplets of the graphs into a 3D table and compresses the label-triplets in the table. To demonstrate the utility of our algorithms, we discuss two applications of them in scientific data mining. First, we apply the method to locating frequently occurring motifs in two families of proteins pertaining to RNA-directed DNA Polymerase and Thymidylate Synthase and use the motifs to classify the proteins. Then, we apply the method to clustering chemical compounds pertaining to aromatic, bicyclicalkanes, and photosynthesis. Experimental results indicate the good performance of our algorithms and high recall and precision rates for both classification and clustering.
Focusing Real-Time Systems Analysis on User Operations
Authors: Michael S. Deutsch
Venue: IEEE Software (1988)

A way is presented to model and validate complex, real-time systems by describing these systems from the viewpoints of the major parties in system development: the customer, the user, and the implementer. The models representing these points of view are called, respectively, the requirements model, the operations-concept model, and the implementation model. The focus is on how the concept of operations can be formally factored into established real-time system-analysis methods in terms a nontechnical user can understand. The approach integrates and refines several real-time-oriented modeling methods, including structured analysis, finite-state machines, and threads. Modeling needs are discussed, the multiview paradigm is presented, and an extensive example of a bottle-filling system is given to illustrate the use of the method.
An approach to local refinement of structured grids
Authors: P. A. Durbin, G. Iaccarino
Venue: Journal of Computational Physics (2002)

Structured grids can be refined locally by adding line segments. These are notionally made into complete grid lines by filling the remainder of the line with blanks. A discretization scheme is adapted to this type of grid by adding interpolation points to complete differencing stencils. The Navier-Stokes equations are solved by the artificial compressibility approach. Examples show the efficacy of the method.
Evolving controllers for virtual creature locomotion
Authors: Michael Sanders, Richard Lobb, Patricia Riddle
Venue: Proceedings of the 1st international conference on Computer graphics and interactive techniques in Australasia and South East Asia (2003)

We consider the application of Evolutionary Algorithms (EAs) to the problem of automating the locomotion of computer-simulated creatures. We introduce niching as a way of maintaining genetic diversity and show that it results in the generation of a range of locomotion controllers and increases the probability of finding difficult or rare locomotion modes.
Automated Verification of Behavioral Equivalence for Microprocessors
Authors: F. Corella
Venue: IEEE Transactions on Computers (1994)

Presents a new method for verifying, in a fully automated way, that two synchronous sequential circuits have the same input/output behavior. The method applies to designs in which a distinction between data path and control can be made, and in particular to microprocessors. The verification is carried out at the register-transfer level. In contrast with previous methods, our procedure is not limited by the total number of latches in the circuit: it runs in time that is independent of the width of the data path. A price has to be paid for this: the procedure does not always terminate, and may produce false negatives. We argue, however, that these problems should not come up when verifying general purpose microprocessors. We have implemented the procedure in Prolog on an IBM RS/6000 workstation, and have tried it on the Tamarack-3 microprocessor previously verified by J.J. Joyce (1990) with the interactive theorem prover HOL at the University of Cambridge. We have verified the equivalence of several alternative implementations to the original one, in times ranging from 11 to 26 s, and we have detected the errors in several incorrect implementations, in times ranging from 1 to 26 s.
Design for Test and Time to Market: A Personal Perspective
Authors: Jon Turino
Venue: IEEE Design Test (1999)

This article explores current and future design for test implementation alternatives, including their impact on various product performance, yield, and test development time characteristics. It also discusses the relationship between electronic design for test automation and its effects on overall time to market for application-specific and system-on-chip (SoC) integrated circuits (ICs). The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
Partial Scan Testing on the Register-Transfer Level
Authors: Bruce S. Greene, Samiha Mourad
Venue: Journal of Electronic Testing: Theory and Applications (2002)

This paper presents a methodology to insert scan paths in a design that is specified on the Register Transfer Level (RT-Level). The results indicate that selecting registers on this level guarantees a reduction in DFT design time and improvement of fault coverage, without incurring high hardware overhead.
A Solution Method for a Special Class of Nondifferentiable Unconstrained Optimization Problems
Authors: B. Luderer, J. Weigelt
Venue: Computational Optimization and Applications (2003)

We consider quasidifferentiable functions in the sense of Demyanov and Rubinov, i. e. functions, which are directionally differentiable and whose directional derivative can be expressed as a difference of two sublinear functions, so that its &ldquo;subdifferential&rdquo;, called the quasidifferential, consists of a pair of sets. For these functions a generalized gradient algorithm is proposed. Its behaviour is studied in detail for the special class of continuously subdifferentiable functions. Numerical test results are given. Finally, the general quasidifferentiable case is simulated by means of &ldquo;perturbed&rdquo; subdifferentials, where we make use of the non-uniqueness in the quasidifferential representation.
Efficient Mapping Algorithms for a Class of Hierarchical Systems
Authors: S. G. Ziavras
Venue: IEEE Transactions on Parallel and Distributed Systems (1993)

Proposes techniques for mapping application algorithms onto a class of hierarchicallystructured parallel computing systems. Multiprocessors of this type are capable ofefficiently solving a variety of scientific problems because they can efficiently implementboth local and global operations for data in a two-dimensional array format. Among theset of candidate application domains, low-level and intermediate-level image processingand computer vision (IPCV) are characterized by high-performance requirements.Emphasis is given to IPCV algorithms. The importance of the mapping techniques stemsfrom the fact that the current technology cannot be used to build cost-effective andefficient systems composed of very large numbers of processors, so the performance ofvarious systems of lower cost should be investigated. Both analytical and simulationresults prove the effectiveness and efficiency of the proposed mapping techniques.
Designing for Web Site Usability
Authors: Jonathan Palmer
Venue: Computer (2002)

Despite its highly touted capabilities,the World Wide Web continues to generate substantialfrustration among users. The difficulty locating pertinent information,delays in downloadingcontent, and the need to sort through numerous hits for a single query can be overwhelming. Web sites also differ dramatically in their level of sophistication, ranging from heavilytext-based formats to sites replete with video, audio, and 3D graphics.A crucial element in Web site success is usability, the ease or difficulty users experience with online systems and processes. According to a recent study I conducted of 750 corporate Web sites ("Web Site Usabality, Design, and Performance Metrics," Information Systems Research,June 2002, pp. 151-167), businesses whose homepages address usability and incorporate otheressential design criteria report higher traffic,more repeat visitors, and greater customer satisfaction.
Interior-Point Methods for Massive Support Vector Machines
Authors: Michael C. Ferris, Todd S. Munson
Venue: SIAM Journal on Optimization (2002)

We investigate the use of interior-point methods for solving quadratic programming problems with a small number of linear constraints, where the quadratic term consists of a low-rank update to a positive semidefinite matrix. Several formulations of the support vector machine fit into this category. An interesting feature of these particular problems is the volume of data, which can lead to quadratic programs with between 10 and 100 million variables and, if written explicitly, a dense Q matrix. Our code is based on OOQP, an object-oriented interior-point code, with the linear algebra specialized for the support vector machine application. For the targeted massive problems, all of the data is stored out of core and we overlap computation and input/output to reduce overhead. Results are reported for several linear support vector machine formulations demonstrating that the method is reliable and scalable.
Small almost complete arcs
Authors: Emanuela Ughi
Venue: Discrete Mathematics (2002)

We exhibit a family of small arcs (in a Galois plane) which are near to be complete.
Algorithms for Automatic Test-Pattern Generation
Authors: Tom Kirkland, M. Ray Mercer
Venue: IEEE Design Test (1988)

Three well-known algorithms for the automatic test pattern generation (ATPG) for digital circuits are the D algorithm, Podem, and Fan. The author introduces the concept of test generation and analyzes the way each algorithm uses search and backtracking techniques to sensitize a fault and propagate it to an observable point. The heuristics used to guide ATPG search and the notation used to represent circuit values are examined.
ASF: a practical simulation-based methodology for the synthesis of custom analog circuits
Authors: Michael J. Krasnicki, Rodney Phelps, James R. Hellums, Mark McClung, Rob A. Rutenbar, L. Richard Carley
Venue: Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design (2001)

This paper describes ASF, a novel cell-level analog synthesis framework that can size and bias a given circuit topology subject to a set of performance objectives and a manufacturing process. To manage complexity and time-to-market, SoC designs require a high level of automation and reuse. Digital methodologies are inapplicable to analog IP, which relies on tight control of low-level device and circuit properties that vary widely across manufacturing processes. This analog synthesis solution automates these tedious, technology specific aspects of analog design. Unlike previously proposed approaches, ASF extends the prevalent "schematic and SPICE" methodology used to design analog and mixed-signal circuits. ASF is topology and technology independent and can be easily integrated into a commercial schematic capture design environment. Furthermore, ASF employs a novel numerical optimization formulation that incorporates classical downhill techniques into stochastic search. ASF consistently produces results comparable to expert manual design with 10x fewer candidate solution evaluations than previously published approaches that rely on traditional stochastic optimization methods.
Combining Program and Data Specialization
Authors: Sandrine Chirokoff, Charles Consel, Renaud Marlet
Venue: Higher-Order and Symbolic Computation (1999)

Program and data specialization have always been studied separately, although they are both aimed at processing early computations. Program specialization encodes the result of early computations into a new program&semi; while data specialization encodes the result of early computations into data structures.In this paper, we present an extension of the Tempo specializer, which performs both program and data specialization. We show how these two strategies can be integrated in a single specializer. This new kind of specializer provides the programmer with complementary strategies which widen the scope of specialization. We illustrate the benefits and limitations of these strategies and their combination on a variety of programs.
Towards Reduced Basis Approaches in ab initio Electronic Structure Computations
Authors: Eric Cancès, Claude Lebris, Yvon Maday, Gabriel Turinici
Venue: Journal of Scientific Computing (2002)

Due to the high dimensionality of the spaces where the problems are set, adapted discretization basis are often advocated in complex physical problems (Navier&ndash;Stokes equations, solid mecanics, ab initio electronic structure computations) to express the solution in terms of solution of similar (but easier to solve) problems. However, very few mathematical studies have been undertaken to asses the numerical properties of these approximations. Within this context, we will present in this paper an overview of the tools required to develop more rigorous reduced basis approaches for quantum chemistry: a posteriori numerical analysis and fast exponential decay of the n-width of the solution set.
Interlingua-based English&ndash;Hindi Machine Translation and Language Divergence
Authors: Shachi Dave, Jignashu Parikh, Pushpak Bhattacharyya
Venue: Machine Translation (2001)

Interlingua and transfer-based approaches to machine translation have long been in use in competing and complementary ways. The former proves economical in situations where translation among multiple languages is involved, and can be used as a knowledge-representation scheme. But given a particular interlingua, its adoption depends on its ability (a) to capture the knowledge in texts precisely and accurately and (b) to handle cross-language divergences. This paper studies the language divergence between English and Hindi and its implication to machine translation between these languages using the Universal Networking Language (UNL). UNL has been introduced by the United Nations University, Tokyo, to facilitate the transfer and exchange of information over the internet. The representation works at the level of single sentences and defines a semantic net-like structure in which nodes are word concepts and arcs are semantic relations between these concepts. The language divergences between Hindi, an Indo-European language, and English can be considered as representing the divergences between the SOV and SVO classes of languages. The work presented here is the only one to our knowledge that describes language divergence phenomena in the framework of computational linguistics through a South Asian language.
Extracting ontological concepts for tendering conceptual structures
Authors: Ahmad Kayed, Robert M. Colomb
Venue: Data Knowledge Engineering (2002)

It has been argued that beyond software engineering and process engineering, ontological engineering is the third capability needed if successful e-commerce is to be realized. In our experience of building an ontological-based tendering system, we face the problem of building an ontology. In this paper, we demonstrate how to build ontologies in the tendering domain. The ontology life cycle is identified. Extracting concepts from existing resources like on-line catalogs is described. We have reused electronic data interchange (EDI) to build conceptual structures in the tendering domain. An algorithm to extract abstract ontological concepts from these structures is proposed.
An Intelligent Search Method for Query Optimization by Semijoins
Authors: H. Yoo, S. Lafortune
Venue: IEEE Transactions on Knowledge and Data Engineering (1989)

The problem of finding an optimal semijoin sequence that fully reduces a given tree query is discussed. A method is presented that intelligently navigates the space of all semijoin sequences and returns an optimal solution. Experiments are reported that show that this method performs very efficiently: on average, less than 5% of the search space is searched before an optimal solution is found. Other advantages of the method are ease of implementation, generality of the cost mode considered, and ability to handle tree queries with arbitrary target lists.
Training consultants
Authors: R. T. Day
Venue: Proceedings of the 7th annual ACM SIGUCCS conference on User services (1979)

Consultants are trained to serve student and faculty computer users, first by having them observe the consulting process, and then by having them try it themselves with an experienced consultant looking on. Trainees are taught some acceptable responses to situations where they cannot readily solve the problem. They are challenged to become skillful in choosing the best response. Trainees are shown many sources of information, and then asked to become skillful in choosing among them.
Very High-Speed True Random Noise Generator
Authors: Ada Fort, Fabrizio Cortigiani, Santina Rocchi, Valerio Vignoli
Venue: Analog Integrated Circuits and Signal Processing (2003)

In this work an original CMOS implementation of a discrete-time deterministic-chaos algorithm for random bit generation is presented. The proposed circuit topology prevents the degradation of the generated-sequence statistical properties that can be caused by several factors, including the parameter spreading of the technological processes. Experimental results show that, with a final rate of 3 Mbit/s, the circuit is compliant with the most recent security requirements for cryptographic modules issued by the American National Institute of Standards and Technologies.