ppxscal/embedding_network huggingface dataset:
Mathematical semantics and data flow programming
Authors: Paul R. Kosinski
Venue: Proceedings of the 3rd ACM SIGACT-SIGPLAN symposium on Principles on programming languages (1976)

A Data Flow program [1,2] is a flow-chart like network of operators which compute concurrently, dependent only on the availability of the data which flow along the paths. Each operator has only a local effect, transforming input data to output data. Although operators may exhibit memory and thus not be functional from an input to an output, all operators are functions from input sequences to output sequences. This plus the strong locality of effect allows mathematization of semantics more readily than traditional programming languages which are burdened with omnipresent storage and occasional GOTO's. This paper proves the semantic behavior of some elementary Data Flow programs and proves that certain optimization transformations preserve other behaviors.
System balance analysis for vector computers
Authors: John C. Knight, William G. Poole,  Jr., Robert G. Voigt
Venue: Proceedings of the 1975 annual conference (1975)

The availability of vector processors capable of sustaining computing rates of 108 arithmetic results has raised the question of whether peripheral storage devices representing current technology can keep such processors supplied with data. By carefully examining the solution of a large banded linear system on these computers it is found that even under ideal conditions the processors will frequently be waiting for problem data.
A proto-language for computer simulation
Authors: John Craig Comfort
Venue: Proceedings of the 11th annual symposium on Simulation (1978)

In this paper, the proto-language P-L is introduced as a means of facilitating the construction of a simulation program from the system being analyzed. Features of P-L are presented; simplified versions of a court system and a hospital emergency room situation are expressed in the formalism of P-L. A data structure and organization for the resulting simulation programs are presented, as is the result of the author's application of P-L to the court simulation example.
An analysis of the full alpha-beta pruning algorithm
Authors: Gérard M. Baudet
Venue: Proceedings of the tenth annual ACM symposium on Theory of computing (1978)

An analysis of the alpha-beta pruning algorithm is presented which takes into account both shallow and deep cut-offs. A formula is first developed to measure the average number of terminal nodes examined by the algorithm in a uniform free of degree n and depth d when ties are allowed among the bottom positions: specifically, all bottom values are assumed to be independent identically distributed random variables drawn from a discrete probability distribution. A worst case analysis over all possible probability distributions is then presented by considering the limiting case when the discrete probability distribution tends to a continuous probability distribution. The branching factor of the alpha-beta pruning algorithm is shown to grow with n as &THgr;(n/In n), therefore confirming a claim by Knuth and Moore that deep cut-offs only have a second order effect on the behavior of the algorithm.
Long-range planning in computer chess
Authors: Jonathan Schaeffer
Venue: Proceedings of the 1983 annual conference on Computers : Extending the human resource (1983)

A serious deficiency in game-playing, tree-searching programs is their short-sightedness. Program strategy revolves around the maximization/minimization of what is attainable within the scope of the search tree with little consideration of what lies beyond. This paper describes Planner, a long-range chess strategist that assesses positions, determines a long-range strategy, and makes moves in the short-term (within the scope of the search tree) consistent with a long-term objective (beyond the depth of the search tree). In effect then, Planner allows the program to &ldquo;see&rdquo; beyond the limitations of the search tree.
High-performance raster graphics for microcomputer systems
Authors: Andreas Bechtolsheim, Forest Baskett
Venue: ACM SIGGRAPH Computer Graphics (1980)

A frame buffer architecture is presented that reduces the overhead of frame buffer updating by three means. First, the bit-map memory is (x,y) addressable, whereby a string of pixels can be accessed in parallel. Second, the pixel-change operation is performed by hardware in a single read-modify-write cycle. Third, multiple objects in the frame buffer are addressable simultaneously by a set of address registers. The remaining task of generating (x,y) addresses and providing new data can be managed rapidly by current microprocessors or DMA-devices. With a modest expenditure of hardware, this architecture eliminates all the bit-shifting, bit-masking, and bit-manipulation conventionally associated with frame buffer graphics, while retaining the full generality of user-programmable control. The particular implementation described allows raster manipulation at full bit-map memory bandwidth. It can paint a 16&times;16 pixel character into the frame buffer in 16 microseconds and can modify a 1024&times;1024 pixel raster in 64 milliseconds.
APL2M: Cross-computer software for straightforward language definition and code generation
Authors: Jean A.P.L. Rohmer
Venue: Proceedings of the international conference on APL: part 1 (1979)

We propose a modern software strategy based upon an unorthodox use of APL, permitting the adaptation of our system both upwards (new applications) and downwards (new processors). The tactic is the exploitation of APL not as a programming language but as a language for a macrogenerator. The purpose of this paper is twofold: first it explains to APL programmers how they can use this language to write assemblers, compilers in a very simple and pleasant manner; second it explains to mini-and microprocessor users that APL is surprisingly a sophisticated but cheap solution to their various software-engineering problems.
Teaching microcoding principles
Authors: Freeman L. Moore
Venue: Proceedings of the fourteenth SIGCSE technical symposium on Computer science education (1983)

Students are typically exposed to programming in various languages as part of their experience in computer science. Assembly language and hardware concepts are considered standard knowledge in addition to other related topics. Teaching firmware, the integration of hardware and software, is the subject of this paper. The need for teaching firmware is presented, followed by a description of a project assigned to students. Lastly, a discussion of the portability of the concepts learned is presented.
Graphics language / one - IBM Corporate-Wide physical design data format
Authors: David R. Lambert
Venue: Proceedings of the 18th Design Automation Conference (1981)

The evolution and structure of the IBM Corporate-Wide physical design data language, GL/1 (Graphics Language / One), is discussed. The need for a common graphics interface for communication among various design automation programs is demonstrated. At IBM, the same format is used from physical layout to mask generation for integrated circuit and printed circuit board designs.
Page segmentation and classification utilising a bottom-up approach
Authors: D. Drivas, A. Amin
Venue: Proceedings of the Third International Conference on Document Analysis and Recognition (Volume 2) - Volume 2 (1995)

This paper presents the use of analysing the connected components extracted from the binary image of a document page. Such an analysis provides a lot of useful information, and will be used to perform skew correction, segmentation and classification of the document. We present a new algorithm for determining the skew angle of lines of text in an image of a document with the advantage that it only performs one iteration to determine the skew angle. Experiments on over 30 pages show that the method works well on a wide variety of layouts, including sparse textual regions, mixed fonts, multiple columns, and even for documents with a high graphical content.
Why Ada is not just another programming language
Authors: Jean E. Sammet
Venue: Proceedings of the 1983 annual conference on Computers : Extending the human resource (1983)

Since there have been hundreds of high level languages developed over the past twenty years, many people are asking why there is so much fuss about Ada. The question is frequently asked&mdash;why isn't Ada just another programming language. Although Ada was developed to meet Department of Defense requirements, those requirements were really for embedded computer systems i.e. those in which the computer is integrated with additional hardware. Such systems certainly exist in the nonmilitary environment e.g. process control, microwave ovens, and so Ada is applicable to many cases which have no connection with the military. In addition to being a programming language, Ada provides support for software engineering concepts, as well as a programming support environment, and it is this combination which is unique. Ada is unique non-technically for social, economic, and political reasons which relate to the way in which it was developed and the way in which it is being viewed by many people and organizations. Ada is unique technically because of its support for the concept of software components, its excellent blend of modern useful features, and its support for the production of very large software systems.
On data secure computer networks
Authors: Gerald J. Popek
Venue: ACM SIGOPS Operating Systems Review (1975)

Recent research activities concerned with computer network security have produced a number of proposals for secure network designs. If one considers only the data security problem, and a network's contribution to it, then the recent progress suggests that reasonable solutions will soon be available. These solutions will be economical and merge reasonably well with existing network practices.
HFP: A hierarchical and functional programming based on attribute grammar
Authors: Takuya Katayama
Venue: Proceedings of the 5th international conference on Software engineering (1981)

A hierarchical and functional programming based on attribute grammar is presented. In this approach, programs are hierarchically decomposed into modules and each module is characterized by its inputs and outputs. A set of equations is associated with each decomposition, which specifies relationship between inputs and outputs of modules that participate in the decomposition. After giving formalisms and examples, an algorithm is described which transforms a program specification in our approach into a procedural type program and optimizations that should be applied to the generated program is discussed.
Special purpose vs. general purpose hardware for da
Venue: Proceedings of the 19th Design Automation Conference (1982)

This workshop will explore the need for special hardware as an aid to the user of Computer Aided Design. Traditionally, all CAD work has been done by general purpose computers which are not tailored to all the special needs of CAD. However, recently advances have been made in understanding how special hardware can help solve some of the unique problems associated with graphics, simulation and other types of analysis. The tradeoffs that occur when examining special vs. general purpose hardware are generally performance vs. flexibility, and performance vs. cost. Also, the expandibility of the general purpose approach has been a strong motivating factor. However, recent advances in high-speed, distributed networks may make it possible to have the best of both approaches.
Weathering the storm: Lessons from the data of a watershed ecosystem
Authors: John M. Nevison
Venue: Proceedings of the 7th conference on Winter simulation - Volume 2 (1974)

A simple model attempts only a rudimentary explanation of the real world. The hydrology model in this paper attempts to be the most elementary possible model of the week-to-week flow of a northern New England hardwood forest stream. The goal of the present model is to approximate the &ldquo;ideal&rdquo; forest and to refine the definition of &ldquo;ideal&ldquo;. In constructing such a model, every effort should be made to run it under &ldquo;ideal&rdquo;, &ldquo;quiet&rdquo; conditions.
Modularity and multi-microprocessor structures
Authors: D. P. Siewiorek
Venue: Conference record of the 7th annual workshop on Microprogramming (1974)

There are significant advantages to a modular approach to system design. As semiconductor technology has evolved the complexity of what a designer considers as a design primitive has also grown. Systems constructed from the next generation of module sets will bear a strong resemblance to multiprocessor structures. A taxonomy of the multiprocessor space is given and the subspace to be occupied by the next generation module sets is delineated. Summaries are given of recent research results on two key problems in modular, as well as general, multiprocessor structures: the parallel decomposition of algorithms and deadlocks. Some open research questions conclude the discussion.
The ALGOL 68 compiler of Paris-XI University (Orsay)
Authors: Daniel Taupin
Venue: Proceedings of the Strathclyde ALGOL 68 conference (1977)

The ALGOL-68 compiler of the University of Paris-XI (Orsay) has been implemented for Univac's 1110-series, under EXEC-VIII. It can compile the &ldquo;full language&rdquo; (including formats, unions, flexible arrays, recursive modes, parallel computation, etc.). It consists in 8 passes and yields usual relocatable code. Minor restrictions concern equivalence recognition of crossed recursive modes, multiple precision and short modes, and scope checking.
The BIG system - synergetic graphics
Authors: Charles E. Quenneville, Harvey Z. Kriloff
Venue: Proceedings of the 1976 annual conference (1976)

The recent decrease in the cost of graphics hardware has created an expanded potential opportunity for the use of graphic techniques. However, this potential is reduced by a lack of agreement on the software interface for this graphics environment. In almost every forum that discusses graphical techniques, new systems are introduced that are syntactically unique, but semantically very similar2,8,16. One of the major reasons for this proliferation of graphic systems is the large number of possible tradeoffs that exist between the performance parameters of these devices. Each graphics system can be optimized for a limited number of these parameters by adjusting a feature of the system design until the best results are obtained. Where more than one design feature affects a particular performance parameter, the system designer usually selects a single feature for adjustment and restricts the user's ability to modify any others. The users discover that they cannot adequately adjust that graphics system for their particular problem, leading to the creation of yet another graphics system. An evaluation of the techniques that have been used to provide this design factor optimization reveal that applying these techniques in combination provides a greater degree of user control over the graphics environment. This synergetic behavior leads to benefits that can be derived from a graphics system that allows the user a greater variety of implementation options. This flexibility will also allow the user to somewhat compensate for the present lack of a graphics standard. A system that utilizes this methodology is described and examples of its application are shown.
Design tools for VLSI (Position Statement)
Authors: Benjamin Lee
Venue: Proceedings of the 17th Design Automation Conference (1980)

Among the companies that design or want to design VSLI logic, how design time and cost affect profit depends on the nature of their products and their business. The merchant IC houses, National, TI, Intel, etc., are very concerned with chip area, hence cost, because their end products are chips or systems whose cost is mostly from chips. In addition, the high volume of parts sold means that a small reduction in area and cost can result in higher profit. On the other hand, system houses, such as IBM, Xerox, and HP, are using chips more for their technical contributions. The chip cost relative to the final system cost (including hardware and software) may be insignificant. No wonder the CAD tools perceived by these two types of companies are different. No one CAD tool or methodology can satisfy this diversity; a spectrum of trade-offs of design time vs. chip density exists. At IBM and other systems houses, total layout synthesis, employing gate arrays and standard cells, has been used extensively and successfully. But area-conscious chip makers, who in the microprocessor age are continuing to hand pack their layouts for maximum density, are suffering because of the unacceptably long time required for such layouts. But help is on the way! Recent research is leading to commercial products that can cut the design time significantly without area compromise. One such product makes use of symbolic graphical circuit descriptions, called stick diagrams, for input PLUS a program that compacts these features for maximum density consistent with the design rules. This capability allows the user to design in a &ldquo;high level language&rdquo;, without concern for lower level details, such as design rules. Another aid that is important is a good chip planning aid. It is well recognized that global optimal rearrangement will save much more area than any local maximal packing. So, the ability to rearrange large areas of circuits globally while keeping the electrical interconnections is extremely important in reducing die size. Such product is well within present day technology and may appear on the market place shortly. As long as silicon area remains important to cost, the approach to design will still favor design assistance rather than total automation. This is based on the belief that hand layout is denser than any automatic layout that exists today. So, tools that aid the designer are likely to be more useful and better accepted than total synthesis tools.
Active visual navigation using non-metric structure
Authors: P. A. Beardsley, I. D. Reid, A. Zisserman, D. W. Murray
Venue: Proceedings of the Fifth International Conference on Computer Vision (1995)

Demonstrates a method of using nonmetric visual information derived from an uncalibrated active vision system to navigate an autonomous vehicle through free-space regions detected in a cluttered environment. The structure of 3-space is recovered modulo an affine transformation using an uncalibrated active stereo head carried by the vehicle. The plane at infinity, necessary for recovering affine structure from projective structure, is found in a novel manner by making controlled rotations of the head. The structure is composed of 3D points obtained by detecting and matching image corners through the stereo image sequence. Considerable care has been taken to ensure that the processing is reliable, robust and automatic. Driveable regions are determined from the projection of the affine structure onto a plane parallel to the ground determined using projective constructs. Two methods of negotiating the regions are explored. The first introduces metric information to allow control of a Euclidean vehicle. The second uses visual servoing of the active head to navigate in the affinely described free-space regions.
All publishers are alike, aren't they? (Panel Discussion)
Authors: Charles Stewart, Jon Thompson, Charles Murphy, Barbara Friedman
Venue: Proceedings of the twelfth SIGCSE technical symposium on Computer science education (1981)

Topics 1. The Computer Education Publishing Marketplace: An Overview The Biggest and the Smallest, The Oldest and the Newest, Introductory Books Versus Advanced Books 2. Discussion Question: What Can Go Wrong in the Author-Publisher Relationship? 3. Discussion Question: What Advice Would You Give to a Close Friend in Selecting a Publisher? 4. Discussion Question: How Will Technology Change the Publishing Process and the Author-Publisher Relationship? 5. Discussion Question: Building Better Textbooks for Computer Education: How Do We Do It? 6. Summary and Conclusions
Structured model development techniques
Authors: Ronald R. Willis
Venue: Proceedings of the 2nd symposium on Simulation of computer systems (1974)

New software development methodologies such as top-down development, structured programming, and modular design have obvious and reported benefits in improving software quality and reducing software development costs. Since computer simulation languages are themselves software languages, and since credibility and modifiability are never more stressed than in models, the application of these methodologies to simulation languages seems appropriate. The three development methods, top-down development, structured programming, and process construction are considered in their application to computer simulation for program design analysis. While, potentially, each is shown to have significant positive effect in the quality of model product, some also lead to negative effects when used improperly; to implement a new development method which enhances model quality at the cost of model representation can severely degrade the credibility of results. The positive benefits of product quality must be weighed against the negative effects of non-credible results when these techniques are considered for computer system simulation. By accurately representing the system to be investigated in simulation language terms, assurance of the accuracy of results is maintained. If the process of accurate representation were considered as a development methodology itself, then model quality both as a software product and as an analysis tool is possible by supplementing new development techniques with representative modelling. The combination of these two techniques takes us one step further &ldquo;towards a more mature discipline&rdquo; as discussed by D. J. Lasser in (15) in that we are using structured translation techniques from real-system to model, validating models directly against the real-system, and increasing mutual understanding between the modeller and model customer via are representative model. Therefore, each of top-down development, structured programming, and process construction are first discussed as they are applicable to general software systems; second, as they are applicable to computer simulation models; and, lastly, how they can be used in conjunction with a representative modelling methodology to enhance both model quality and modelling results.
Modeling the binding policies of programming languages
Authors: Arthur Pyster, Charles Dana, Roger Wood
Venue: Proceedings of the 1979 annual conference (1979)

Current tools available to model binding policies are inadequate. To partially remedy this situation, we describe a scheme consisting of three major parts: &bull; a rigorous theoretical framework for addressing binding issues. &bull; a language in which to express binding policies. &bull; a graphic notation in which to easily and clearly express binding policy. Preliminary results on the first two aspects are reported here. Expressions of binding policy written in PASTE, our modeling language, have several advantages over those expressed in English. Among these are the rigor and clarity which a formal statement allows. Comparison between models can pinpoint exact differences in binding policy in a way imprecise English specification of a policy cannot. To demonstrate the utility of our modeling scheme and the current state of PASTE, we model two languages which differ only in binding policy. We show how these differences are clearly expressed through the models.