ppxscal/embedding_network huggingface dataset:
Video Image Processing with the Sonic Architecture
Authors: Simon D. Haynes, John Stone, Peter Y. K. Cheung, Wayne Luk
Venue: Computer (2000)

Current industrial video-processing systems use a mixture of high-performance workstations and application-specific integrated circuits. However, video image processing in the professional broadcast environment requires more computational power and data throughput than most of today's general-purpose computers can provide. In addition, using ASICs for video image processing is both inflexible and expensive.Configurable computing offers an appropriate alternative for broadcast video image editing and manipulation by combining the flexibility, programmability, and economy of general-purpose processors with the performance of dedicated ASICs.Sonic is a configurable computing system that performs real-time video image processing. The authors describe how it implements algorithms for two-dimensional linear transforms, fractal image generation, filters, and other video effects. Sonic's flexible and scalable architecture contains configurable processing elements that accelerate software applications and support the use of plug-in software.
Relational-Linear Quadtree Approach for Two-Dimensional Spatial Representation and Manipulation
Authors: F. Wang
Venue: IEEE Transactions on Knowledge and Data Engineering (1991)

An approach called relational-linear quadtree which provides information at multiple resolutions to describe spatial features together with descriptive or propositional information in desired structures is presented. It also provides powerful and flexible spatial analysis and manipulation ability. Its principle is quite clear, and implementation is very easy. It can be modified to fit other database models or structured knowledge representation schemes and can be implemented on most database management systems (DBMS) or expert system tools which support the structured models or schemes. The only extension is a set of quadtree operators which involve arithmetic operations on integers that can be coded as routines in a host language or a system command language. No additional processor is needed. This advantage makes the relational-linear quadtree a very practical approach in making use of the existing DBMSs or expert system tools to develop spatial information processing systems.
Solution of parallel language equations for logic synthesis
Authors: Nina Yevtushenko, Tiziano Villa, Robert K. Brayton, Alex Petrenko, Alberto L. Sangiovanni-Vincentelli
Venue: Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design (2001)

The problem of designing a component that combined with a known part of a system, conforms to a given overall specification arises in several applications ranging from logic synthesis to the design of discrete controllers. We cast the problem as solving abstract equations over languages. Language equations can be defined with respect to several language composition operators such as synchronous composition, &bull;, and parallel composition, &diams;; conformity can be checked by language containment. In this paper we address parallel language equations.Parallel composition arises in the context of modeling delay-insensitive processes and their environments. The parallel composition operator models an exchange protocol by which an input is followed by an output after a finite exchange of internal signals. It abstracts a system with two components with a single message in transit, such that at each instance either the components exchange messages or one of them communicates with its environment, which submits the next external input to the system only after the system has produced an external output in response to the previous input.We study the most general solutions of the language equation A &diams; X &sube; C, and define the language operators needed to express them. Then we specialize such equations to languages associated with important classes of automata used for modeling systems, e.g., regular languages and FSM languages. In particular, for A &diams; X &sube; C, we give algorithms for computing: the largest FSM language solution, the largest complete solution, and the largest solution whose composition with A yields a complete FSM language. We solve also FSM equations under bounded parallel composition.In this paper, we give concrete algorithms for computing such solutions, and state and prove their correctness.
Myopotential denoising of ECG signals using wavelet thresholding methods
Authors: Vladimir Cherkassky, Steven Kilts
Venue: Neural Networks (2001)

We present empirical comparisons of several wavelet-denoising methods applied to the problem of removing (denoising) myopotential noise from the observed noisy ECG signal. Namely, we compare the denoising accuracy and robustness of several wavelet thresholding methods (VISU, SURE and soft thresholding) and a new thresholding approach based on Vapink-Chervonenkis (VC) learning theory. Our findings indicate that the VC-based wavelet approach is superior to the standard thresholding methods in that it achieves: Higher denoising accuracy (in terms of both MSE measure and visual quality) and more robust and compact representation of the denoised signal (i.e., it uses fewer wavelets).
Systolic Modular Multiplication
Authors: C. D. Walter
Venue: IEEE Transactions on Computers (1993)

A systolic array for modular multiplication is presented using the ideally suited algorithm of P.L. Montgomery (1985). Throughput is one modular multiplication every clock cycle, with a latency of 2n+2 cycles for multiplicands having n digits. Its main use would be where many consecutive multiplications are done, as in RSA cryptosystems.
The Virtual Interface Architecture
Authors: Dave Dunning, Greg Regnier, Gary McAlpine, Don Cameron, Bill Shubert, Frank Berry, Anne Marie Merritt, Ed Gronke, Chris Dodd
Venue: IEEE Micro (1998)

Network bandwidths have been increasing and latencies through these networks have been decreasing. Unfortunately, applications have not been able to take full advantage of these performance improvements due to the many layers of user level and kernel level software that is required to get to the network. The Virtual Interface Architecture (or simply VI Architecture) was developed to significantly reduce the software overhead between a high performance CPU/memory subsystem and a high performance network. The Virtual Interface Architecture defines a set of functions and associated semantics used for moving data into and out of a process' memory. The design focus of the VI Architecture is to achieve low latency, high bandwidth communication/data exchange between processes running on two nodes within a computing cluster, with minimal CPU usage. Low latency and sustained high bandwidth are achieved by allowing a user process direct access to the network interface, avoiding intermediate copies of data and bypassing the operating system in a fully-protected fashion. CPU utilization is minimized by avoiding interrupts and context switches whenever possible. This article presents the mechanisms which support protected, zero-copy user-level access and the performance data of one implementation of the VI Architecture. Intel Corporation, Compaq Computer Corporation and Microsoft Corporation jointly authored the VI Architecture specification. A copy of the specification can be found at http://www.viarch.org/.
Frames: A Simple Characterization of Permutations Realized by Frequently Used Networks
Authors: José A. B. Fortes, Hasan Cam
Venue: IEEE Transactions on Computers (1995)

Rearrangeable multistage networks such as the Benes network realize any permutation, yet their routing algorithms are not cost-effective. On the other hand, there exist inexpensive routing algorithms for nonrearrangeable networks, but no simple technique exists to characterize all the permutations realized on these networks. This paper introduces the concept of frame and shows how it can be used to characterize all the permutations realized on various multistage interconnection networks. They include subnetworks of baseline, Benes, and cascaded baseline and shuffle-exchange networks.
A Component-Based Approach to Telecommunication Software
Authors: Pamela Zave, Michael Jackson
Venue: IEEE Software (1998)

This article discusses a domain-specific component-based architecture called Distributed Feature Composition. Based on the well-known pipe-and-filter architecture, DFC has been refined for use in the telecommunication domain. The authors also point to ways this approach might work in other domains, including data networks.
Regression analysis of experiments with complex confounding patterns guided by the alias matrix
Authors: John Lawson
Venue: Computational Statistics Data Analysis (2002)

Resolution III experiments with complex confounding patterns, often called main effect plans. Their main effects are partially confounded with two-factor interactions rather than being either independent or completely aliased, as they are in regular designs that are constructed from a defining relation. It is possible to detect some two-factor interactions, from experiments with complex confounding patterns if only a few of the factors are active. The partial confounding of interactions with main effects in these experiments allows one to estimate interactions with regression analysis. Recent papers have shown how the interactions can be detected using repeated runs of stepwise regression, or computationally intensive Bayesian methods. This paper shows that, with a short list of candidate interactions, the important interactions can be detected efficiently by a single pass of all subsets regression. The short list of candidates interactions for the all subsets regression are selected with regard to their potential for contributing to the value of the large estimated effects calculated from the data. The potential is determined by summing coefficients in the alias matrix. This paper reviews the concept of the alias matrix, and defines the alias plot that can be obtained from the alias matrix. The alias plot provides simple graphic for viewing the potential contribution of interactions to large estimated effects. The interactions identified on the alias plot, along with main effects, are used as candidates in an all subsets regression analysis of data from partially confounded experiments. The resulting strategy allows exploration of a wide range of the potential model space, can reveal several plausible models for the data if they exist, and can be completed using standard statistical software. Examples are presented.
Architecture of the VPP500 parallel supercomputer
Authors: Teruo Utsumi, Masayuki Ikeda, Moriyuki Takamura
Venue: Proceedings of the 1994 ACM/IEEE conference on Supercomputing (1994)

The VPP500 vector parallel processor is a highly parallel, distributed memory supercomputer that has a performance range of 6.4 to 355 gigaFLOPS and a main memory capacity from 1 to 222 gigabytes. The system scalably supports between 4 and 222 processors interconnected by a high-bandwidth crossbar network.Three key aspects of the VPP500, which are in sharp contrast to current massively parallel systems, characterize its architecture. First the building block is a 1.6 gigaFLOPS vector processor that is more than an order of magnitude faster than the processors used in massively parallel processors (MPP). This high uniprocessor performance reduces the dependence on parallelism. Second the distributed memory architecture and high-bandwidth crossbar network eliminate many of the bottlenecks found in MPP systems. These allow efficient utilization of hardware and have the effect of lessening the complexity of programming parallel computers. Third the system realizes high throughput by its capability to arbitrarily partition the processing elements for flexible multiprocessing.
Deformable Kernels for Early Vision
Authors: Pietro Perona
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1995)

Early vision algorithms often have a first stage of linear-filtering that ¿extracts¿ from the image information at multiple scales of resolution and multiple orientations. A common difficulty in the design and implementation of such schemes is that one feels compelled to discretize coarsely the space of scales and orientations in order to reduce computation and storage costs. This discretization produces anisotropies due to a loss of translation-, rotation-, and scaling-invariance that makes early vision algorithms less precise and more difficult to design. This need not be so: one can compute and store efficiently the response of families of linear filters defined on a continuum of orientations and scales. A technique is presented that allows 1) computing the best approximation of a given family using linear combinations of a small number of ¿basis¿ functions; 2) describing all finite-dimensional families, i.e., the families of filters for which a finite dimensional representation is possible with no error. The technique is based on singular value decomposition and may be applied to generating filters in arbitrary dimensions and subject to arbitrary deformations; the relevant functional analysis results are reviewed and precise conditions for the decomposition to be feasible are stated. Experimental results are presented that demonstrate the applicability of the technique to generating multi-orientation multi-scale 2D edge-detection kernels. The implementation issues are also discussed.
Quantitative comparative evaluation of 2D vector field visualization methods
Authors: David H. Laidlaw, J. Scott Davidson, Timothy S. Miller, Marco da Silva, R. M. Kirby, William H. Warren, Michael Tarr
Venue: Proceedings of the conference on Visualization '01 (2001)

We present results from a user study that compared six visualization methods for 2D vector data. Two methods used different distributions of short arrows, two used different distributions of integral curves, one used wedges located to suggest flow lines, and the final was line-integral convolution (LIC). We defined three simple but representative tasks for users to perform using visualizations from each method: 1) locating all critical points in an image, 2) identifying critical point types, and 3) advecting a particle.Results show different strengths and weaknesses for each method. We found that users performed better with methods that: 1) showed the sign of vectors within the vector field, 2) visually represented integral curves, and 3) visually represented the locations of critical points.These results provide quantitative support for some of the anecdotal evidence concerning visualization methods. The tasks and testing framework also provide a basis for comparing other visualization methods, for creating more effective methods, and for defining additional tasks to further understand tradeoffs among methods. They may also be useful for evaluating 2D vector on 2D surfaces embedded in 3D and for defining analogous tasks for 3D visualization methods.
Coupled analysis of electromigration reliability and performance in ULSI signal nets
Authors: Kaustav Banerjee, Amit Mehrotra
Venue: Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design (2001)

In deep submicron VLSI circuits, interconnect reliability due to electromigration and thermal effects is fast becoming a serious design issue particularly for long signal lines. This paper presents for the first time a rigorous coupled analysis of AC electromigration that are prevalent in signal lines and thermal effects arising due to Joule heating of the wires. The analysis is applied to study the effect of technology scaling using ITRS data, wherein the effects of increasing interconnect (Cu) resistivity with line dimensions and the effect of a finite barrier metal thickness have been included. Finally, we have also quantified the reliability implications for minimum sized vias in optimally buffered signal nets. Our analysis suggests that for the optimally buffered interconnects, while the maximum current density in the line remains limited by the performance, the current density in the vias exceeds the reliability limits and therefore requires careful consideration in the physical design process flow.
From Behavior to Structure: High-Level Synthesis
Authors: R. Camposano
Venue: IEEE Design Test (1990)

This paper shows how high-level synthesis bridges the gap between behavioral specifications and hardware structure by automatically generating a circuit description from a netlist. The resulting description can be used for other design automation tools, such as logic synthesis and layout. As opposed to logic synthesis, which optimizes only combinational logic, high-level synthesis deals with memory elements, the interconnection structures, (such as buses and multiplexers), and the sequential aspects of a design. The steps in the process of synthesizing synchronous digital hardware are explained. They consist of compilation, high-level transformations, scheduling, and allocation. Design representation is discussed, and problems remaining to be solved are indicated.
Efficient Mappings of Pyramid Networks
Authors: A. Dingle, I. H. Sudborough
Venue: IEEE Transactions on Parallel and Distributed Systems (1994)

We consider primarily the simulation of large networks by smaller ones-an importantconsideration, because interconnection networks are typically of a fixed size, and yetapplications may employ networks of a larger size. Current research (Dingle andSudborough, 1993) describes methods to simulate common data structures and networkarchitectures on the pyramid. However, these simulations assume that the pyramid growswith the size of the network or data structure. Because unbounded growth is notfeasible, we address the issue of mapping several points of the guest data structure ornetwork to a single host processor. We determine how a small pyramid may efficientlysimulate the computation of a larger pyramid as well as that of tree networks.
The WearARM Modular, Low-Power Computing Core
Authors: Paul Lukowicz, Urs Anliker, Gerhard Tröster, Steven J. Schwartz, Richard W. DeVaul
Venue: IEEE Micro (2001)

The WearARM computing core for wearable applications uses highly miniaturized, mechanically flexible electronic packaging technology. Used with the MIThril platform, the system supports high-performance, low-power, user configurable wearable computing with wireless connectivity and local mass storage.
Validation of an Automated System Model Generator
Authors: A. J. Gonzalez, H. R. Myler, F. D. McKenzie, M. Towhidnejad, R. R. Kladke
Venue: IEEE Transactions on Knowledge and Data Engineering (1994)

Modeling and simulation have always been highly useful techniques to use when designing, analyzing, or diagnosing an engineered system. Development of an appropriate model, in terms of accuracy, granularity, and complexity, has typically been the burden of the designer, analyst, or troubleshooter. It would naturally be advantageous if a model could be developed automatically, with the user supplying only some final minor refinements. The fact that most modern systems are designed in a computer-aided design (CAD) environment makes this a realistic prospect, because much of the data necessary for the model is already in electronic form. This article outlines a system called the automated knowledge generator (AKG), which embodies techniques that automatically create a model of an engineered system directly from its CAD representation, and describes the extensive testing process followed in order to validate its performance.
Constraint-Based, Multidimensional Data Mining
Authors: Jiawei Han, Laks V. S. Lakshmanan, Raymond T. Ng
Venue: Computer (1999)

Although many data-mining methodologies and systems have been developed in recent years, the authors contend that by and large, present mining models lack human involvement, particularly in the form of guidance and user control. They believe that data mining is most effective when the computer does what it does best--like searching large databases or counting--and users do what they do best, like specifying the current mining session's focus. This division of labor is best achieved through constraint-based mining, in which the user provides restraints that guide a search. Mining can also be improved by employing a multidimensional, hierarchical view of the data. Current data warehouse systems have provided a fertile ground for systematic development of this multidimensional mining. Together, constraint-based and multidimensional techniques can provide a more ad hoc, query-driven process that effectively exploits the semantics of data than those supported by current stand-alone data-mining systems.
Efficient Color Histogram Indexing for Quadratic Form Distance Functions
Authors: James Hafner, Harpreet S. Sawhney, Will Equitz, Myron Flickner, Wayne Niblack
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1995)

In image retrieval based on color, the weighted distance between color histograms of two images, represented as a quadratic form, may be defined as a match measure. However, this distance measure is computationally expensive (naively O(N2) and at best O(N) in the number N of histogram bins) and it operates on high dimensional features (O(N)). We propose the use of low-dimensional, simple to compute distance measures between the color distributions, and show that these are lower bounds on the histogram distance measure. Results on color histogram matching in large image databases show that prefiltering with the simpler distance measures leads to significantly less time complexity because the quadratic histogram distance is now computed on a smaller set of images. The low-dimensional distance measure can also be used for indexing into the database.
Neural Network in Communication with Medical Computer System
Authors: Edward Kackicki, Joanna Stempczyńnska, Rafal Wawrzyniak
Venue: Journal of Medical Systems (2001)

The paper presents a concept of an experimental module designed to recognize spoken utterances that cover a limited range of words indispensable in dialogs with computer medical systems. Research into the recognition of spoken words by a module based on artificial neural network is described. Usefulness of the obtained results for surgery-assisting multimedia systems and for a patient simulator supporting medical education of students in case history-taking and diagnosing is also discussed.
Comprehensive Static Characterization of Vertical Electrostatically Actuated Polysilicon Beams
Authors: Edward K. Chan, Krishna Garikipati, Robert W. Dutton
Venue: IEEE Design Test (1999)

This article presents the entire process of calibrating an electromechanical simulator: identifying relevant parameters, designing and measuring test structures, extracting parameters using detailed electromechanical simulations, and extrapolating the behavior of an actual device. The simulation model for vertical electrostatically actuated polysilicon beams is calibrated to a wide range of electrical and optical measurements of test structures, and is then used to predict the behavior of more complex dual-bias-electrode structures. We address various mechanical discontinuities and post-buckled pull-in behavior while avoiding arbitrary fitting coefficients that limit generality. The well-characterized behavior of the dual-electrode structures can serve as verification test cases for evaluating coupled electromechanical simulators.