ppxscal/embedding_network huggingface dataset:
Dynamic Replica Control Based on Fairly Assigned Variation of Data with Weak Consistency for Loosely Coupled Distributed Systems
Authors: Takao Yamashita
Venue: Proceedings of the 22 nd International Conference on Distributed Computing Systems (ICDCS'02) (2002)

This paper proposes a replica control method based on a fairly assigned variation of numerical data that has weak consistency for loosely coupled systems managed or used by different organizations. This method dynamically distributes the variation of numerical data to replicas according to their demands while achieving fairness among them. By assigning the variation, a replica can determine the possibility that processed update transactions will be aborted and can notify a client of the possibility even when network partitioning happens. In addition, fairly assigning the variation of data to replicas enables the disadvantage among replicas caused by asynchronous update to be balanced among replicas. Fairness control for assigning thevariation of data is performed by averaging the demands in the variation that are requested by the replicas. Simulation showed that our system can achieve extremely high fairness while processing update transactions at the maximum rate.
RBF neural networks for classification using new Kernel functions
Authors: Zhenqiu Liu, Hamparsum Bozdogan
Venue: Neural, Parallel Scientific Computations (2003)

In this paper, we introduce a new class of kernel functions and try to combine Kmean, EM, and new kernels together, instead of using linear function, we introduce nonlinear softmax output function and cross entropy error function into RBF networks. The resulting network is easy to use, and has favorable classification accuracy. Experiments show that our new model has better performance than traditional RBF neural networks and is super compared with MLP and other nonparametric classification tools.
Improved Extraction of Planar Segments for Scanned Surfaces
Authors: J. F. Poliakoff
Venue: Proceedings of the International Conference on Information Visualisation (2000)

The reverse engineering of a physical object often requires the production of a digital representation of the object. The object surface is scanned and a large number of points are obtained. These points are often organized in some way, which provides adjacency information. However, in other cases, the result is an unstructured set of points, or point cloud. From such a point cloud a triangulated surface can be generated, so in all cases adjacency information can be obtained. Copies of the original object can be manufactured using the triangulated surface to define the shape. Often the original object is made up of parts of a number of simple geometric primitives and could be represented much more simply. Our aim is to segment a discretely represented surface into a small number of such simple geometric components using a 'region growing' approach. This paper describes an improved algorithm (with 'super triangles') for planar extraction, which requires only the data points and some form of adjacency information.
Object Oriented Design Pattern Inference
Authors: Paolo Tonella, Giulio Antoniol
Venue: Proceedings of the IEEE International Conference on Software Maintenance (1999)

When designing a new application, experienced software engineers usually try to employ solutions that proved successful in previous projects. Such reuse of code organizations is seldom made explicit. Nevertheless it represents important information about the system, that can be extremely valuable in the maintenance phase, by documenting the design choices underlying the implementation. In addition, having it available, it can be reused whenever a similar problem is encountered.In this paper an approach is proposed to the inference of recurrent design patterns directly from the code or the design. No assumption is made on the availability of any pattern library, and the concept analysis algorithm, adapted for this purpose, is able to infer the presence of class groups which instantiate a common, repeated pattern. In fact, concept analysis provides sets of objects sharing attributes, which, in the case of object oriented design patterns, become class members or inter-class relations.The approach was applied to a C++ application, for which the structural relations among classes led to the extraction of a set of structural design patterns, which could be enriched with non structural information about class members and method invocations. The resulting patterns could be interpreted as meaningful organizations aimed at solving general problems which have several instances in the analyzed application.
Internet Galaxy: Reflections on the Internet, Business, and Society
Authors: Manuel Castells
Venue:  (2003)

:Manuel Castells is one of the world's leading thinkers on the new information age, hailed by The Economist as "the first significant philosopher of cyberspace," and by Christian Science Monitor as "a pioneer who has hacked out a logical, well-documented, and coherent picture of early 21st century civilization, even as it rockets forward largely in a blur." Now, in The Internet Galaxy, this brilliantly insightful writer speculates on how the Internet will change our lives. Castells believes that we are "entering, full speed, the Internet Galaxy, in the midst of informed bewilderment." His aim in this exciting and profound work is to help us to understand how the Internet came into being, and how it is affecting every area of human life--from work, politics, planning and development, media, and privacy, to our social interaction and life in the home. We are at ground zero of the new network society. In this book, its major commentator reveals the Internet's huge capacity to liberate, but also its ability to marginalize and exclude those who do not have access to it. Castells provides no glib solutions, but asks us all to take responsibility for the future of this new information age. The Internet is becoming the essential communication and information medium in our society, and stands alongside electricity and the printing press as one of the greatest innovations of all time. The Internet Galaxy offers an illuminating look at how this new technology will influence business, the economy, and our daily lives.
Linear-Processor NC Algorithms for Planar Directed Graphs II: Directed Spanning Trees
Authors: Ming Kao, E G Shannon
Venue:  (1990)

It has long been a fundamental open problem whether polylog time and {\em linear} processors are sufficient to find the strongly connected components of a directed graph and compute directed spanning trees for these components. This paper provides the first nontrivial partial solution to the tree problem: for a planar directed graph with $n$ vertices, if the graph is strongly connected, then a directed spanning tree rooted at a specified vertex can be built in $0(log^2~n)$ time using $0(n)$ processors. The algorithm is deterministic and runs on a parallel random access machine that allows concurrent reads and concurrent writes in its shared memory. The result complements an algorithm by Kao that computes the strongly connected components of a planar directed graph in $0(log^3~n)$ time and $0(n)$ processors.
Advanced Computing Research Institute Semi-annual Research Activity Report, April 1992 September 1992
Authors: Thomas F. Coleman
Venue:  (1992)

The Advanced Computing Research Institute (ACRI) is a unit of the Cornell Theory Center and is affiliated with the Cornell Computer Science Department. The ACRI is concerned with research in scientific computation and its application to engineering and scientific problems. Of particular importance is the use of and potential of advanced computer architectures and environments. Research areas include parallelizing compilers for scientific computation and the design of algorithms for numerical linear algebra, optimization, and partial differential equations. Currently, ACRI researchers are collaborating on several large-scale applications in the computational sciences, including: protein-folding and related molecular chemistry problems, structural optimization and biomechanics, particle methods for turbulent combustion, discrete-control problems, and the application of boundary element methods. The parallel computers available to the ACRI for research include the Theory Center machines a 64-node KSR computer, an IBM ES/9000, a network of IBM RS/6000s, as well as Computer Science resources: an 8K CM-200, a 32-node Intel iPSC/860, and a 64-node BBN Butterfly. This report consists of two parts. The first part contains a short summary of the progress made in the last six months on each of the four main projects: parallelizing compilers, computational linear algebra, computational optimization, and numerical methods for partial differential equations. Included also are a list of ACRI researchers and their research interests, a list of technical reports produced in the last six months, and a list of ACRI seminars. In the second part we highlight one of the projects, the parallelizing compiler work, where we give a more detailed introduction into this area and sketch our novel approach.
Characterization of message ordering specifications and protocols
Authors: V. V. Murty, V. K. Garg
Venue: Proceedings of the 17th International Conference on Distributed Computing Systems (ICDCS '97) (1997)

We study the problem of determining which message ordering specifications can be implemented in a distributed system. Further, if a specification can be implemented, we give a technique to determine whether it can be implemented by tagging information with user messages or if it requires control messages. To specify the message ordering, we use a novel method called forbidden predicates. All existing message ordering guarantees such as FIFO, flush channels, causal ordering, and logically synchronous ordering, (as well as many new message orderings) can be concisely specified using forbidden predicates. We then present an algorithm that determines from the forbidden predicate the type of protocol needed to implement that specification.
Troubleshooting Campus Networks: Practical Analysis of Cisco and LAN Protocols
Authors: Priscilla Oppenheimer, Joseph Bardwell
Venue:  (2002)

:All network designers and administrators want their campus LANs to run efficiently. This book provides tips and techniques for using protocol analyzers and other tools to recognize problems for both Cisco and multiprotocol traffic patterns.* Focuses on troubleshooting problems that arise from the Cisco routers inter-operating with many other network protocols* Covers both legacy and cutting-edge technologies* Authors are respected in the field for their teaching and training development skills in network troubleshooting
Graphic Representation Method and Neural Network Recognition of Time-Frequency Vectors of Speech Information
Authors: A. O. Zhirkov, D. N. Kortchagine, A. S. Lukin, A. S. Krylov, Yu. M. Bayakovskii
Venue: Programming and Computing Software (2003)

Currently, various time-frequency representations are often used for sound analysis. These representations, on the one hand, are convenient for visible sensation of sound by a human and, on the other hand, can be used for automatically analyzing sound pictures. In this paper, various methods for representation of sound as two-dimensional time-frequency vectors of a fixed dimension and their use for speech and speaker recognition problems are discussed. Probabilistic, distance-based, and neural-network methods for the recognition of these vectors by examples of separate words are considered. Numerical experiments showed that the best among them is the method based on a three-layer neural network, the short-time Fourier transform, and the two-dimensional wavelet transformation. For the speaker recognition problem, a distance-based recognition method employing the adaptive Hermite transform turned out the best among all.
Improving Search in Peer-to-Peer Networks
Authors: Beverly Yang, Hector Garcia-Molina
Venue: Proceedings of the 22 nd International Conference on Distributed Computing Systems (ICDCS'02) (2002)

Peer-to-peer systems have emerged as a popular way to share huge volumes of data. The usability of these systems depends on effective techniques to find and retrieve data; however, current techniques used in existing P2P systems are often very inefficient. In this paper, we present three techniques for efficient search in P2P systems. We present the design of these techniques, and then evaluate them using a combination of analysis and experiments over Gnutella, the largest open P2P system in operation. We show that while our techniques maintain the same quality of results as currently used techniques, they use up to 5 times fewerresources. In addition, we designed our techniques to be simple, so that they can be easily incorporated into existing systems for immediate impact.
Demonstration of a Novel Multiple-Valued T-Gate Using Multiple-Junction Surface Tunnel Transistors and Its Application to Three-Valued Data Flip-Flop
Authors: Tetsuya Uemura, Toshio Baba
Venue: Proceedings of the 30th IEEE International Symposium on Multiple-Valued Logic (2000)

A novel T-gate consisting of multi-junction surface tunnel transistors (MJ-STTs) and hetero-junction FETs (HJFETs) were proposed and its operation was successfully confirmed by both simulation and experiment. The number of the devices required for the T-gate can be drastically reduced due to a high functionality of the MJ-STT. Only three MJ-STTs and three HJFETs were required to fabricate the three-valued T-gate, whose number is less than one half of that of the conventional circuit. The fabricated circuit exhibited a basic T-gate operation with various logic functions. Furthermore, a multiple-valued data Flip-Flop (D-FF) circuit could be realized by only one T-gate.
Real-Time Symbolic Model Checking for Discrete Time Models
Authors: Sergio V. Campos, Edmund M. Clarke
Venue:  (1994)

The BDD-based symbolic model checking algorithm is extended to handle real-time properties using the bounded until operator. We believe that this algorithm, which is based on discrete time, is able to handle many real-time properties that arise in practical problems. One example of such a property is priority inversion. This is a serious problem that can make real-time systems unpredictable in subtle ways. Our work discusses this problem and presents one possible solution. The solution is formalized and verified using the modified algorithm. We also propose another extension to the model checking algorithm. Timed transition graphs are transition graphs in which events may take non-unit time to occur. The time it takes for a transition in a TTG to happen is determined by a time interval. This allows the construction of smaller and more realistic models. A symbolic model checking algorithm is given for formulas using the bounded until operator in TTG models.
Developing a High-Quality Software Tool for Fault Tree Analysis
Authors: Joanne Bechta Dugan, Kevin J. Sullivan, David Coppit
Venue: Proceedings of the 10th International Symposium on Software Reliability Engineering (1999)

Sophisticated dependability analysis techniques are being developed in academia and research labs, but few have gained wide acceptance in industry. To be valuable, such techniques must be supported by usable, reliable software tools. We present our approach to developing Galileo, a dynamic fault tree analysis tool we are developing to address these concerns. Galileo is designed to support efficient system-level analysis by automatically decomposing fault trees into modules that are solved separately using appropriate techniques. Usability is addressed by a software architecture based on a component-based design technique that we call package-oriented programming: we use a tightly integrated set of shrink-wrapped software packages to provide the bulk of the tool superstructure. To address tool dependability, we are developing natural language and partial formal specifications of fault tree elements, and we exploit the inherent redundancy associated with multiple analysis techniques as an aid in testing.
Realistic Communication Model for Parallel Computing on Cluster
Authors: Anthony T. C. Tam, Cho-Li Wang
Venue: Proceedings of the 1st IEEE Computer Society International Workshop on Cluster Computing (1999)

In this paper, we present a model for parallel computation on commodity cluster. Our cluster model is targeted as a tool for performance analysis and algorithm design. We abstract the communication event by means of local and remote data movements, and explicitly expose the contention problems by capturing them in our parameters. To validate our model, we compare the prediction accuracy of our model with the Postal model for the popular tree-based broadcast algorithm. Our model provides good prediction accuracy and answers to some performance issues that are missing in existing models. We examine the gather collective operation, in which contention delay dominates its overall execution time. Based on the model, we design a communication schedule for the gather operation that based on the upper and lower bounds, in which the congestion behavior could be under our control and achieve optimal results by avoiding data loss.
Automated Synthesis of Configurable Two-dimensional Linear Feedback Shifter Registers for Random/Embedded Test Patterns
Authors: Chien-In Henry Chen, Kiran George
Venue: Proceedings of the 4th International Symposium on Quality Electronic Design (2003)

A new approach to optimize a configurable two-dimensional(2-D) linear feedback shift registers (LFSR) forboth embedded and random test pattern generation in built-inself-test (BIST) is proposed. This configurable 2-D LFSRbased test pattern generator generates: 1) a deterministicsequence of test patterns for random-pattern-resistant faults,and then 2) random patterns for random-pattern-detectablefaults. The configurable 2-D LFSR test generator can beadopted in two basic BIST execution options: test-per-clock(parallel BIST) and test-per-scan (serial BIST). Experimentalresults of test-per-clock BIST for benchmark circuitsshow with the configurable scheme the number of flip-flopsof 2-D LFSR is reduced by 79%. The average number offaults detected by configurable 2-D LFSR is 9.27% higherthan the conventional LFSR. Experimental results of test-per-scan BIST for benchmark circuits demonstrate the effectivenessof the proposed technique in which high fault coveragecan be achieved.
Stop & Go BIST
Authors: Ilia Polian, Bernd Becker
Venue: Proceedings of the Proceedings of The Eighth IEEE International On-Line Testing Workshop (IOLTW'02) (2002)

A BIST method enabling two-pattern testing at-speed without violating thermal constraints by introducing cool down periods is proposed. The application of the method is demonstrated based on a scalable BIST architecture. Applicability on IP cores is given since only a two-pattern test set is required as input.
Informed Prefetching and Caching
Authors: R. H Patterson, Garth A. Gibson, Eka Ginting, Daniel Stodolsky, Jim Zelenka
Venue:  (1995)

The underutilization of disk parallelism and file cache buffers by traditional file systems induces I/O stall time that degrades the performance of modern microprocessor-based systems. In this paper, we present aggressive mechanisms that tailor file system resource management to the needs of I/O-intensive applications. In particular, we show how to use application-disclosed access patterns (hints) to expose and exploit I/O parallelism and to allocate dynamically file buffers among three competing demands: prefetching hinted blocks, caching hinted blocks for reuse, and caching recently used data for unhinted accesses. Our approach estimates the impact of alternative buffer allocations on application execution time and applies a cost-benefit analysis to allocate buffers where they will have the greatest impact. We implemented informed prefetching and caching in DEC''s OSF/1 operating system and measured its performance on a 150 MHz Alpha equipped with 15 disks running a range of applications including text search, 3D scientific visualization, relational database queries, speech recognition, and computational chemistry. Informed prefetching reduces the execution time of the first four of these applications by 20% to 87%. Informed caching reduces the execution time of the fifth application by up to 30%.
Macromedia Flash MX Actionscript, 1 edition
Authors: William B. Sanders
Venue:  (2002)

:Increase the speed and download time of your applications by taking advantage of the powerful features of ActionScript, Macromedia Flash MX's native programming language. This comprehensive reference explains the enhanced UI components, new object-oriented features of ActionScriptand much more. For anyone wanting to integrate sophisticated interactive elements into their Flash applications, and take Web application development to the next level, this is an exceptional resource.
Energy trade-offs in the IBM Wristwatch computer
Authors: Noboru Kamijoh, Tadanobu Inoue, C. Michael Olsen, M. T. Raghunath, Chandra Narayanaswami
Venue: Proceedings of the 5th IEEE International Symposium on Wearable Computers (2001)

We recently demonstrated a high function wrist watch computer prototype that runs the Linux operating system and also X11 graphics libraries. In this paper we describe the unique energy related challenges and tradeoffs we encountered while building this watch. We show that the usage duty factor for the device heavily dictates which of the powers, active power or sleep power, needs to be minimized more aggressively in order to achieve the longest perceived battery life. We also describe the energy issues that percolate through several layers of software all the way from device usage scenarios, applications, user interfaces, system level software to device drivers. All of these need to be systematically addressed to achieve the battery life dictated by the hardware components and the capacity of the battery in the device.
Asymptotic relations in the Askey scheme for hypergeometric orthogonal polynomials
Authors: Chelo Ferreira, José L. Lopez, Esmeralda Mainar
Venue: Advances in Applied Mathematics (2003)

It has been recently pointed out that several orthogonal polynomials of the Askey table admit asymptotic expansions in terms of Hermite and Laguerre polynomials [López and Temme, Meth. Appl. Anal. 6 (1999) 131-146; J. Comp. Appl. Math. 133 (2001) 623-633]. From those expansions, several known and new limits between polynomials of the Askey table were obtained in [López and Temme, Meth. Appl. Anal. 6 (1999) 131-146; J. Comp. Appl. Math. 133 (2001) 623-633]. In this paper, we make an exhaustive analysis of the three lower levels of the Askey scheme which completes the asymptotic analysis performed in [López and Temme, Meth. Appl. Anal. 6 (1999) 131-146; J. Comp. Appl. Math. 133 (2001) 623-633]: (i) We obtain asymptotic expansions of Charlier, Meixner-Pollaczek, Jacobi, Meixner, and Krawtchouk polynomials in terms of Hermite polynomials. (ii) We obtain asymptotic expansions of Meixner-Pollaczek, Jacobi, Meixner, and Krawtchouk polynomials in terms of Charlier polynomials. (iii) We give new proofs for the known limits between polynomials of these three levels and derive new limits.
Limitations to Delay-Insensitivity in Asynchronous Circuits
Authors: Alain J. Martin
Venue:  (1990)

No abstract available.