ppxscal/embedding_network huggingface dataset:
Software Quality in Consumer Electronics Products
Authors: Jan Rooijmans, Hans Aerts, Michiel Van Genuchten
Venue: IEEE Software (1996)

The software content in consumer electronics products has increased significantly in recent years. In the late 1980s, a high-end television set contained less than 64 Kbytes of ROM, while today's model often has more than 500 Kbytes. The expanding use of software in consumer electronics products calls for a more effective software-development process and the introduction of new technology. Until recently, the limited amount of software in consumer electronics products made it possible to deliver them without defects. Today, the amount of software contained in such products may reach 100,000 lines of source code. Organizations in the professional electronics industry have found how difficult it is to put a product of this size on the market without any defects.In 1991, Philips' CEO named a Software Process Improvement task force to focus on the increasing importance of software.We describe improvement activities undertaken at Philips Sound & Vision to meet the specific requirements of developing software for consumer electronics products at a time when the amount of software contained in each unit increased rapidly. In addition to improving its processes, the organization improved its requirements-and-design engineering architecture and its inspections, and it introduced metrics. We examine the results of these improvements in terms of effort and schedule overruns and defect density for three projects.
A Multiple Seed Linear Feedback Shift Register
Authors: J. Savir, W. H. McAnney
Venue: IEEE Transactions on Computers (1992)

The authors describe a design of an LFSR (linear feedback shift register) that can easily accommodate a change-of-seeds feature. This new LFSR is controlled by two separate clocks, one for the normal LFSR operation and one for the change of seeds option. The change of seeds is fast since it is accomplished by a pair of clock pulses rather than by long scan operations.
Active Disks for Large-Scale Data Processing
Authors: Erik Riedel, Christos Faloutsos, Garth A. Gibson, David Nagle
Venue: Computer (2001)

Active disk systems leverage the aggregate processing power of net-worked disks to offer increased processing throughput for large-scale data mining tasks. As processor performance increases and memory cost decreases, system intelligence continues to move away from the CPU and into peripherals. The authors propose using an active disk storage device that combines on-drive processing and memory with software downloadability to allow disks to execute application-level functions directly at the device.With active disks, application-specific functions access the excess computation power in drives. Active disks combine the requisite processing power of general-purpose disk-drive microprocessors with the special-purpose functionality of end-user programmability.The authors' experiment showed that active disks can accelerate an existing database system by moving data-intensive processing to the disks, thereby reducing the server CPU's processing load. The active disk approach eliminates the need for the PC processor, its memory subsystem, and I/O backplane, which makes active disks relatively inexpensive. The development of new data-intensive algorithms requires large amounts of disk space and high data-transfer rates for various processing tasks, with richer database structures, new content, new data sources, and novel applications for collected data. The authors contend that active disks can meet these needs while offering the parallelism available in large storage systems.
Time-Triggered Architecture: A Consistent Computing Platform
Authors: Reinhard Maier, Günther Bauer, Georg Stöger, Stefan Poledna
Venue: IEEE Micro (2002)

The time-triggered architecture provides a consistent computing platform for large complex applications and safety-relevant systems. TTA is already in use in railway systems, and the aerospace and automotive industries are beginning to adopt it, with first products making their way into the field.
Signed 2-independence in graphs
Authors: Michael A. Henning
Venue: Discrete Mathematics (2002)

A function f:V → {-1,1} defined on the vertices of a graph G = (V,E) is a signed 2-independence function if the sum of its function values over any closed neighbourhood is at most one. That is, for every υ ∈ V, f(N[υ]) ≤ 1, where N[υ] consists of υ and every vertex adjacent to υ. The weight of a signed 2-independence function is f(V) = Σ f(υ), over all vertices υ ∈ V. The signed 2-independence number of a graph G, denoted αs2(G), equals the maximum weight of a signed 2-independence function of G. In this paper, we establish upper bounds for αs2(G) in terms of the order and size of the graph, and we characterize the graphs attaining these bounds. For a tree T, upper and lower bounds for αs2(T) are established and the extremal graphs characterized. It is shown that αs2(G) can be arbitrarily large negative even for a cubic graph G.
Scheduling DAG's for Asynchronous Multiprocessor Execution
Authors: B. A. Malloy, E. L. Lloyd, M. L. Soffa
Venue: IEEE Transactions on Parallel and Distributed Systems (1994)

A new approach is given for scheduling a sequential instruction stream for execution "inparallel" on asynchronous multiprocessors. The key idea in our approach is to exploit thefine grained parallelism present in the instruction stream. In this context, schedules areconstructed by a careful balancing of execution and communication costs at the level ofindividual instructions, and their data dependencies. Three methods are used to evaluateour approach. First, several existing methods are extended to the fine grained situation.Our approach is then compared to these methods using both static schedule lengthanalyses, and simulated executions of the scheduled code. In each instance, our methodis found to provide significantly shorter schedules. Second, by varying parameters suchas the speed of the instruction set, and the speed/parallelism in the interconnectionstructure, simulation techniques are used to examine the effects of various architecturalconsiderations on the executions of the schedules. These results show that our approachprovides significant speedups in a wide-range of situations. Third, schedules produced byour approach are executed on a two-processor Data General shared memorymultiprocessor system. These experiments show that there is a strong correlationbetween our simulation results, and these actual executions, and thereby serve tovalidate the simulation studies. Together, our results establish that fine grainedparallelism can be exploited in a substantial manner when scheduling a sequentialinstruction stream for execution "in parallel" on asynchronous multiprocessors.
The IA-64 Architecture at Work
Authors: Carole Dulong
Venue: Computer (1998)

Over the past several years, strategies to increase microprocessor performance have focused on finding more instruction-level parallelism. ILP is basically the idea of finding several instructions to execute at the same time. By providing multiple functional units on which to execute instructions, computer architects expect to improve performance. However, two difficult problems limit ILP: branch instructions, which introduce control dependencies, and memory latency, the time it takes to retrieve data from memory. In the absence of new programming languages that are explicitly parallel, the task of "exposing" ILP falls to the compiler. In IA-64, Intel's upcoming 64-bit architecture, the compiler will play a pivotal role in using predication and control speculation to expose more ILP. To illustrate predication and control speculation, this article presents two code fragments scheduled with actual IA-64 instructions that are representative of general-purpose integer code, such as that found in computer-aided design and database applications. A comparison of performance with and without the two features demonstrates how predication and control speculation can yield a significant reduction in the number of cycles required to execute an instruction.
Expected-Value Analysis of Two Single Fault Diagnosis Algorithms
Authors: N. S. V. Rao
Venue: IEEE Transactions on Computers (1993)

The problem of diagnosing single faults is addressed for systems whose fault propagation properties can be modeled as directed graphs. In these systems, the nodes represent components and the edges represent fault propagation between the components. Some of the components are equipped with alarms that become active in response to faulty conditions. Two algorithms, FORWARD and BACKWARD, for computing the set of all potential candidates for a single fault that corresponds to a given set of active alarms, are studied. FORWARD moves forward from candidate nodes checking to see if they satisfy the alarm condition, and BACKWARD moves backwards from the alarms. In terms of worst-case time complexity, BACKWARD is better. These algorithms are analyzed using systems that are uniformly and randomly generated. In terms of the expected number of distinct nodes that are visited, FORWARD is shown to be better, and in terms of the total number of node visits, BACKWARD is found to be better. Thus, these algorithms are suited for different modes of storing the system graph.
Queries on Change in an Extended Relational Model
Authors: C. S. Jensen, L. Mark
Venue: IEEE Transactions on Knowledge and Data Engineering (1992)

A data model that allows for the storage of detailed change history in so-called backlog relations is described. Its extended relational algebra, in conjunction with the extended data structures, provides a powerful tool for the retrieval of patterns and exceptions in change history. An operator, Sigma , based on the notion of compact active domain is introduced. It groups data not in predefined groups but in groups that fit the data. This operator further expands the retrieval capabilities of the algebra. The expressive power of the algebra is demonstrated by examples, some of which show how patterns and exceptions in change history can be detected. Sample applications of this work are statistical and scientific databases, monitoring (of databases, manufacturing plants, power plants, etc.), CAD, and CASE.
The &pi;-Calculus in Direct Style
Authors: Gérard Boudol
Venue: Higher-Order and Symbolic Computation (1998)

We introduce a calculus which is a direct extension of both the &lambda; and the &pi; calculi. We give a simple type system for it, that encompasses both Curry&lsquo;s type inference for the &lambda;-calculus, and Milner&lsquo;s sorting for the &pi;-calculus as particular cases of typing. We observe that the various continuation passing style transformations for &lambda;-terms, written in our calculus, actually correspond to encodings already given by Milner and others for evaluation strategies of &lambda;-terms into the &pi;-calculus. Furthermore, the associated sortings correspond to well-known double negation translations on types. Finally we provide an adequate CPS transform from our calculus to the &pi;-calculus. This shows that the latter may be regarded as an &ldquo;assembly language&rdquo;, while our calculus seems to provide a better programming notation for higher-order concurrency. We conclude by discussing some alternative design decisions.
Perturbation heuristics for the pickup and delivery traveling salesman problem
Authors: Jacques Renaud, Fayez F. Boctor, Gilbert Laporte
Venue: Computers and Operations Research (2002)

This article describes and compares seven perturbation heuristics for the Pickup and Delivery Traveling salesman Problem (PDTSP). In this problem, a shortest Hamiltonian cycle is sought through a depot and several pickup and delivery pairs. Perturbation heuristics are diversification schemes which help a local search process move away from a local optimum. Three such schemes have been implemented and compared: Instance Perturbation, Algorithmic Perturbation, and Solution Perturbation. Computational results on PDTSP instances indicate that the latter scheme yields the best results. On instances for which the optimum is known, it consistently produces optimal or near-optimal solutions.
Numerical simulations of magneto transport in dot array systems at high magnetic fields
Authors: J. Oswald, Y. Ochiai, N. Aoki, L.-H. Lin, K. Ishibashi, Y. Aoyagi, J. P. Bird, D. K. Ferry
Venue: Microelectronic Engineering (2002)

We use a network model for modeling the magneto transport in quantum dot array systems. We study numerically the role of Fermi level pinning for the Landau level (LL) depopulation at the quantum point contacts which couple the dots. We find that for the case of Fermi level pinning by the 2DEG the resulting sawtooth behavior of the Fermi level leads to deviations from the linear dependence of the LL energies versus magnetic field, if those energies are obtained from depopulation experiments by sweeping the split gate voltage.
Addendum to "A Krylov--Schur Algorithm for Large Eigenproblems"
Authors: G. W. Stewart
Venue: SIAM Journal on Matrix Analysis and Applications (2002)

In this addendum to an earlier paper by the author, it is shown how to compute a Krylov decomposition corresponding to an arbitrary Rayleigh quotient. This decomposition can be used to restart an Arnoldi process, with a selection of the Ritz vectors corresponding to that Rayleigh quotient.
A Neuron-Weighted Learning Algorithm and its Hardware Implementation in Associative Memories
Authors: Tao Wang, Xinhau Zhuang, XiaoLiang Xing, Xipeng Xiao
Venue: IEEE Transactions on Computers (1993)

A novel learning algorithm for a neuron-weighted associative memory (NWAM) is presented. The learning procedure is cast as a global minimization, solved by a gradient descent rule. An analog neural network for implementing the learning method is described. Some computer simulation experiments are reported.
Wearable Computing: A First Step Toward Personal Imaging
Authors: Steve Mann
Venue: Computer (1997)

Miniaturization of components has enabled systems that are wearable and nearly invisible, so that individuals can move about and interact freely, supported by their personal information domain. Can you imagine hauling around a large, light-tight wooden trunk containing a co-worker or an assistant whom you take out only for occasional, brief interaction. For each session, you would have to open the box, wake up (boot) the assistant, and afterward seal him back in the box. Human dynamics aside, wouldn't that person seem like more of a burden than a help? In some ways, today's multimedia portables are just as burdensome. Let's imagine a new approach to computing in which the apparatus is always ready for use because it is worn like clothing. The computer screen, which also serves as a viewfinder, is visible at all times and performs multimodal computing (text and images). With the screen moved off the lap and up to the eyes, you can simultaneously talk to someone and take notes without breaking eye contact. Miniaturized into an otherwise normal pair of eyeglasses, such an apparatus is unobtrusive and useful in business meetings and social situations. Clothing is with us nearly all the time and thus seems like the natural way to carry our computing devices. Once personal imaging is incorporated into our wardrobe and used consistently, our computer system will share our first-person perspective and will begin to take on the role of an independent processor, much like a second brain-or a portable assistant that is no longer carted about in a box. As it "sees'' the world from our perspective, the system will learn from us, even when we are not consciously using it. Such computer assistance is not as far in the future as it might seem. Researchers were experimenting in related areas well before the late seventies, when I first became interested in wearable computing devices. Much of our progress is due to the computer industry's huge strides in miniaturization. My current wearable prototype,1 equipped with head-mounted display, cameras, and wireless communications, enables computer-assisted forms of interaction in ordinary situations-for example, while walking, shopping, or meeting people-and it is hardly noticeable.
G-Networks with resets
Authors: Erol Gelenbe, Jean-Michel Fourneau
Venue: Performance Evaluation (2002)

Gelenbe networks (G-networks) are product form queuing networks which, in addition to ordinary customers, contain unusual entities such as "negative customers" which eliminate normal customers and "triggers" which move other customers from some queue to another. These models have generated much interest in the literature since the early 1990s. The present paper discusses a novel model for a reliable system composed of N unreliable systems, which can hinder or enhance each other's reliability. Each of the N systems also tests other systems at random; it is able to reset another system if it is itself in working condition and discovers that the other system has failed, so that the global reliability of the system is enhanced. This paper shows how an extension of G-networks that includes novel "reset" customers can be used to model this behavior. We then show that a general G-network model with resets has product form, and prove existence and uniqueness of its solution.
Satisficing Equilibria: A Non-Classical Theory of Games and Decisions
Authors: W. C. Stirling, M. A. Goodrich, D. J. Packard
Venue: Autonomous Agents and Multi-Agent Systems (2002)

Satisficing, or being &ldquo;good enough,&rdquo; is the fundamental obligation of rational decision makers. We cannot rationally choose an option, even when we do not know of anything better, unless we know it is good enough. Unfortunately, we are not often in the position of knowing that there could be no better option, and hence that the option must be good enough. A complete search through all logical possibilities is often impractical, particularly in multi-agent contexts, due to excessive computational difficulty, modeling complexity, and uncertainty. It can be equally impractical, if it is even possible, to determine the cost of the additional required search to find an option that is good enough. In a departure from the traditional notion of satisficing as a species of bounded rationality, satisficing is here redefined in terms of a notion of intrinsic rationality. Epistemic utility theory serves as the philosophical foundation of a new praxeological decision-making paradigm of satisficing equilibria that is applicable to both single- and multiple-agent scenarios. All interagent relationships are modeled by an interdependence function that explicitly accommodates both self and group interest, from which multilateral and unilateral selectability and rejectability mass functions can be derived and compared via the praxeic likelihood ratio test.
Computer-Aided Prototyping for ASIC-Based Systems
Authors: Stephen Walters
Venue: IEEE Design Test (1991)

The use of computer-aided prototyping (CAP) with the RPM Emulation System is described. RPM creates a hardware functional prototype from an ASIC or full-custom chip netlist. It reads the chip netlist and then converts the chip design gates into a prototype design. It then synthesizes the prototype design, obtaining the information it needs to configure the reprogrammable hardware, primarily with partitioning and placement and routing technology. Finally, it physically implements the prototype design by electronically configuring the reprogrammable hardware. RPM includes embedded tools for interactive debugging with access to any internal design node, and a facility for handling quick incremental changes to the design. It is argued that other techniques such as silicon prototyping and manual prototyping are not practical; silicon has a poor debugging ability, and manual prototyping cannot handle large designs. The practical benefits of CAP are discussed.
BLIC: bi-level isosurface compression
Authors: Gabriel Taubin
Venue: Proceedings of the conference on Visualization '02 (2002)

In this paper we introduce a new and simple algorithm to compress isosurface data. This is the data extracted by isosurface algorithms from scalar functions defined on volume grids, and used to generate polygon meshes or alternative representations. In this algorithm the mesh connectivity and a substantial proportion of the geometric information are encoded to a fraction of a bit per Marching Cubes vertex with a context based arithmetic coder closely related to the JBIG binary image compression standard. The remaining optional geometric information that specifies the location of each Marching Cubes vertex more precisely along its supporting intersecting grid edge, is efficiently encoded in scan-order with the same mechanism. Vertex normals can optionally be computed as normalized gradient vectors by the encoder and included in the bitstream after quantization and entropy encoding, or computed by the decoder in a postprocessing smoothing step. These choices are determined by trade-offs associated with an in-core vs. out-of-core decoder structure. The main features of our algorithm are its extreme simplicity and high compression rates
Improving SoC Design Quality through a Reproducible Design Flow
Authors: Philippe Magarshack
Venue: IEEE Design Test (2002)

In his keynote speech at the Second IEEE International Symposium on Quality Electronic Design in March 2001, Philippe Magarshack examined the dynamics of system-on-a-chip design and addressed a fundamental question: Is there a reproducible process for achieving the right design at the right time?
Ascending subgraph decomposition of regular graphs
Authors: Hung-Lin Fu, Wei-Hsin Hu
Venue: Discrete Mathematics (2002)

We prove that every regular graph with (n+12) + t edges, 0 ≤ t ≤ n + 1, can be decomposed into n subgraphs G1, G2, ..., Gn such that |E(Gi)| = i and Gi ≤ Gi+1 for i = 1,2,..., n - 1 and |E(Gn)| = n + t
ImageMap: An Image Indexing Method Based on Spatial Similarity
Authors: Euripides G. M. Petrakis, Christos Faloutsos, King-Ip (David) Lin
Venue: IEEE Transactions on Knowledge and Data Engineering (2002)

We introduce ImageMap, as a method for indexing and similarity searching in Image DataBases (IDBs). ImageMap answers ¿queries by example,¿ involving any number of objects or regions and taking into account their interrelationships. We adopt the most general image content representation, that is, Attributed Relational Graphs (ARGs), in conjunction with the well-accepted ARG editing distance on ARGs. We tested ImageMap on real and realistic medical images. Our method not only provides for visualization of the data set, clustering and data mining, but it also achieves up to 1,000-fold speed-up in search over sequential scanning, with zero or very few false dismissals.
A rate-based flow control mechanism for avoiding congestion
Authors: Zhang Xiaolin, Wang Yuhong, Wu Jieyi
Venue: Journal of Computer Science and Technology (2002)

The rate-based flow control mechanisms for the Available Bit Rate (ABR) service are used to share the available bandwidth of a bottleneck switch connected to a bottleneck link fairly and reasonably among many competitive users, and to maintain the buffer queue length of the switch at a desired level in order to avoid congestion in Asynchronous Transfer Mode (ATM) networks. In this paper, a control theoretic approach that uses a Deadbeat-Response (DR) controller to the design of a rate-based flow control mechanism is presented. The mechanism has a simple structure and is robust in the sense that its stability is not sensitive to the change of the number of active Virtual Connections (VCs). Simulation results show that this mechanism not only ensures fair share of the bandwidth for all active VCs regardless of the number of hops they traverse but also has the advantages of fast convergence, no oscillation, and high link bandwidth utilization.