ppxscal/embedding_network huggingface dataset:
Delay-Optimal Quorum Consensus for Distributed Systems
Authors: Ada Waichee Fu
Venue: IEEE Transactions on Parallel and Distributed Systems (1997)

Given a set of nodes S, a coterie is a set of pairwise intersecting subsets of S. Each element in a coterie is called a quorum. Mutual exclusion in a distributed system can be achieved if each request is required to get consensus from a quorum of nodes. This technique of quorum consensus is also used for replicated distributed database systems, and bicoteries and wr-coteries have been defined to capture the requirements of read and write operations in user transactions. In this paper, we are interested in finding coteries, bicoteries, and wr-coteries with optimal communication delay. The protocols take into account the network topology. We design delay-optimal quorum consensus protocols for network topologies of trees, rings, and clustered networks.
Bridge: a versatile behavioral synthesis system
Authors: Chia-Jeng Tseng, Ruey-Sing Wei, Steven G. Rothweiler, Michael M. Tong, Ajoy K. Bose
Venue: Proceedings of the 25th ACM/IEEE Design Automation Conference (1988)

Bridge is a behavioral synthesis system being developed at AT T Bell Laboratories. Two slicing techniques are implemented in this system to drive structural allocation; one is local slicing and the other is global slicing. Global slicing supports the synthesis of concurrent processes with a centralized control. A variable in a behavioral description can be either a storage element or a signal. The impacts of treating a variable as a signal on data flow scheduling, control flow scheduling, and lifetime analysis are discussed. Intelligent bindings of the variables in a behavioral description to registers and signals not only reduce the implementation cost but also improve the circuit performance. Using global slicing and signal variables, a mircoarchitecture model can sometimes be reduced to the view of a finite state machine or a combinational circuit. Experimental data for the behavioral descriptions of the Intel 8251 are presented.
Parallel simulation environment for mobile wireless networks
Authors: Winston W. Liu, Ching-Chuan Chiang, Hsiao-Kuang Wu, Vikas Jha, Mario Gerla, Rajive L. Bagrodia
Venue: Proceedings of the 28th conference on Winter simulation (1996)

A parallel simulator has been designed for the evaluation of wireless, multihop, mobile networks. This paper describes the process of porting the simulator from a sequential to a parallel environment. Parallelization is critical in large radio networks, where the complexity of radio propagation models, channel access schemes and interference patterns makes sequential simulation very time consuming - in the order of several hours for 100 nodes experiments. With parallel execution, speedups of up to tenfold have been observed on a 16 processor SP/2, making large net work simulations viable.
Audio enhanced 3D interfaces for visually impaired users
Authors: Stephen W. Mereu, Rick Kazman
Venue: Issue 57 (January 1997) (1997)

Three dimensional computer applications such as CAD packages are often difficult to use because of inadequate depth feedback to the user. It has, however, been shown that audio feedback can help improve a user's sense of depth perception. This paper describes an experiment which evaluates the use of three different audio environments in a 3D task undertaken by visually impaired users. The three audio environments map tonal, musical, and orchestral sounds to an (x, y, z) position in a 3D environment. In each environment the user's task is to locate a target in three dimensions as accurately and quickly as possible. This experiment has three important results: that audio feedback improves performance in 3D applications for all users; that visually impaired users can use 3D applications with the accuracy of sighted users; and that visually impaired users can attain greater target accuracy than sighted users in a sound-only environment
Parameterized Duplication in Strings: Algorithms and an Application to Software Maintenance
Authors: Brenda S. Baker
Venue: SIAM Journal on Computing (1997)

As an aid in software maintenance, it would be useful to be able to track down duplication in large software systems efficiently. Duplication in code is often in the form of sections of code that are the same except for a systematic change of parameters such as identifiers and constants. To model such parameterized duplication in code, this paper introduces the notions of parameterized strings and parameterized matches of parameterized strings. A data structure called a parameterized suffix tree is defined to aid in searching for parameterized matches. For fixed alphabets, algorithms are given to construct a parameterized suffix tree in linear time and to find all maximal parameterized matches over a threshold length in a parameterized p-string in time linear in the size of the input plus the number of matches reported. The algorithms have been implemented, and experimental results show that they perform well on C code.
Optimal Backward Perturbation Bounds for Underdetermined Systems
Authors: Ji-guang Sun, Zheng Sun
Venue: SIAM Journal on Matrix Analysis and Applications (1997)

Let $A$ be an $n \times m,(m $$ \eta_{\theta}(y)=\inf\{\|(F^T, \theta g)\|_F: y\;{\rm is}\;{\rm the} \;{\rm minimum}\;2\hbox{\rm -norm}\;{\rm solution}\;{\rm to}\;(A+F)^Tx=b+g\},$$ where $\theta$ is a positive number. This problem is solved.
A Nested FGMRES Method for Parallel Calculation of Nuclear Reactor Transients
Authors: R. Janardhan, T. Downar
Venue: Journal of Scientific Computing (1998)

A semi-iterative method based on a nested application of Flexible Generalized Minimum Residual)FGMRES) was developed to solve the linear systems resulting from the application of the discretized two-phase hydrodynamics equations to nuclear reactor transient problems. The complex three-dimensional reactor problem is decomposed into simpler, more manageable problems which are then recombined sequentially by GMRES algorithms. Mathematically, the method consists of using an &ldquo;inner&rdquo; level GMRES to solve the preconditioner equation for an &ldquo;outer&rdquo; level GMRES. Applications were performed on practical, three-dimensional models of operating Pressurized Water Reactors (PWR). Serial and parallel applications were performed for a reactor model with two different details in the core representation. When appropriately tight convergence was enforced at each GMRES level, the results of the semi-iterative solver were in agreement with existing direct solution methods. For the larger model tested, the serial performance of GMRES was about a factor of 3 better than the direct solver and the parallel speedups were about 4 using 13 processors of the INTEL Paragon. Thus, for the larger problem over an order of magnitude reduction in the execution time was achieved indicating that the use of semi-iterative solvers and parallel computing can considerably reduce the computational load for practical PWR transient calculations.
The maintenance of common data in a distributed system
Authors: Baruch Awerbuch, Leonard J. Schulman
Venue: Journal of the ACM (JACM) (1997)

A basic task in distributed computation is the maintenance at each processor of the network, of a current and accurate copy of a common database. A primary example is the maintenance, for routing and other purposes, of a record of the current topology of the system. Such a database must be updated in the wake of locally generated changes to its contents. Due to previous disconnections of parts of the network, a maintenance protocol may need to update processors holding widely varying versions of the database. We provide a deterministic protocol for this problem, with only polylogarithmic overhead in both time and communication complexities. Previous deterministic solutions required polynomial overhead in at least one of these measures.
1.7 Volt, DC to 15 GHz Differential Amplifier with ConstantGroup Delay in InP-HBT Technology
Authors: M. Mokhtari, B. Kerzar>, T. Juhola, G. Schuppener, U. Westergren, H. Tenhunen, T. Swahn>, R. Walden
Venue: Analog Integrated Circuits and Signal Processing (1998)

10 dB gain&minus;, 15 GHz-Bandwidth amplifier has been designed and fabricated in InP-HBT technology. Operation of the amplifier was achieved at 1.7 V at total current consumption of 40 mA. The amplifier designed to have a Bessel-transfer-function has almost constant group delay up to 30 GHz. Pulse- and eye-diagram- measurements have been performed to verify large signal operation. At 3.3 V, 24 dB gain and 10 GHz bandwidth was achieved. The 1dB compression point at 1.7 V supply voltage is measured at &minus;10 dBm output power.
Incremental Learning With Sample Queries
Authors: Joel Ratsaby
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1998)

The classical theory of pattern recognition assumes labeled examples appear according to unknown underlying class conditional probability distributions where the pattern classes are picked randomly in a passive manner according to their a priori probabilities. This paper presents experimental results for an incremental nearest-neighbor learning algorithm which actively selects samples from different pattern classes according to a querying rule as opposed to the a priori probabilities. The amount of improvement of this query-based approach over the passive batch approach depends on the complexity of the Bayes rule.
Modeling and simulation education: is there a need for graduate degrees in modeling and simulation?
Authors: Ralph V. Rogers, Michael Zyda, Edward F. Mykytka, David Bartlett, Michael Bathe
Venue: Proceedings of the 28th conference on Winter simulation (1996)

The authors represent educational institution that currently offer simulation programs and non educational organizations with vested interests in simulation education. The programs represented by the panel members provide a varied perspective on the answer to the questions "What skills do simulation professionals need" Are separate simulation programs needed?", "Is there a sufficient body knowledge to warrant programs in simulation?" "Do existing programs in computer science, operations research, and engineering provide sufficient simulation education to meet simulation demand?". Panel discussions will center on these and other issues related to the growth and need of degree programs in simulation.
Interconnection synthesis with geometric constraints
Authors: Forrest Brewer, Barry Pangrle, Andrew Seawright
Venue: Proceedings of the 23rd annual workshop and symposium on Microprogramming and microarchitecture (1990)

We describe a simple linear placement model applicable to bit-slice data-paths and to the simultaneous generation of geometric layout with the synthesis of the interconnection nets required for communication. This model allows direct area trade-offs between several alternative interconnection devices such as multiplexers, busses, tri-state drivers and point-to-point wire connections. Addition of geometric constraints to the interconnection synthesis allows accurate interpretation of the designed connections in terms of the actual area required and the relative speed and routing limitations. Use of direct area cost functions in the design of the interconnections leads to different designs than do the a priori cost functions commonly used in high level synthesis systems. The newer designs make better use of the area and routing density than do designs where previously minimized interconnections are mapped into a linear placement. Also described is a new fast heuristic for linear placement which is used interactively as a cost function in the interconnection design.
Steiner Trees for Terminals Constrained to Curves
Authors: J. H. Rubinstein, D. A. Thomas, N. C. Wormald
Venue: SIAM Journal on Discrete Mathematics (1997)

We give a polynomial time algorithm for solving the Euclidean Steiner tree problem when the terminals are constrained to lie on a fixed finite set of disjoint finite-length compact simple smooth curves. The problem is known to be NP-hard in general. We also show it to be NP-hard if the terminals lie on two parallel infinite lines or on a bent line segment provided the bend has an angle of less than $120^\circ$.
Simulation game for teaching communications protocols
Authors: Eyal Shifroni, David Ginat
Venue: ACM SIGCSE Bulletin (1997)

During the development of a new program for teaching the subject of computer communication at high school, we examined different ways of teaching the algorithmic aspect of communication protocols. Upon trying the "standard" frontal lecture-type presentation, only a minority of the students comprehended the protocols.In looking for an alternative way of teaching, we developed a simulation game in which the students act as the protocol components. After playing the game, they discuss the characteristics of the protocol as experienced through playing.We found the simulation game method to be far more effective than the lecture-type presentation. The simulation game method had significantly improved the level of understanding and the motivation of the students.In this paper we describe the simulation game and its didactic method and discuss the results of applying it in high school classes in Israel during the past year.
Parallel ODE solvers
Authors: P. J. van der Houwen, B. P. Sommeijer
Venue: ACM SIGARCH Computer Architecture News (1990)

We are interested in the efficient solution of linear second order Partial Differential Equation (PDE) problems on rectangular domains. The PDE discretisation scheme used is of Finite Element type and is based on quadratic splines and the collocation methodology. We integrate the Quadratic Spline Collocation (QSC) discretisation scheme with a Domain Decomposition (DD) technique. We develop DD motivated orderings of the QSC equations and unknowns and apply the Preconditioned Conjugate Gradient (PCG) method for the solution of the Schur Complement (SC) system. Our experiments show that the SC-PCG-QSC method in its sequential mode is very efficient compared to standard direct band solvers for the QSC equations. We have implemented the SC-PCG-QSC method on the iPSC/2 hypercube and present performance evaluation results for up to 32 processors configurations. We discuss a type of nearest neighbour communication scheme, in which the amount of data transfer per processor does not grow with the number of processors. The estimated efficiencies are at the order of 90%.
Data-flow assisted behavioral partitioning for embedded systems
Authors: Samir Agrawal, Rajesh K. Gupta
Venue: Proceedings of the 34th annual Design Automation Conference (1997)

In this paper we present a novel compiler-directed approach tosystem-level partitioning for a given description of system functionalityin a hardware description language (HDL). The algorithmis based on a definition-use analysis of the storage in the systemmodel to ensure that the resulting portions can be implemented in aloosely-coupled multi-rate execution model with minimal synchronizationbetween the portions. The cost of the hardware-softwareinterface, in terms of amount of buffering required, is computed accuratelyas a part of the partitioning cost function using a data-flowreaching analysis. The proposed algorithm has been implementedand experimental results show up to 65% improvement in buffersizes over the min-cut partitioning algorithm.
On global dynamics of optimal graph reduction
Authors: Julia L. Lawall, Harry G. Mairson
Venue: Proceedings of the second ACM SIGPLAN international conference on Functional programming (1997)

Optimal graph reduction technology for the lambda;-calculus, as developed by Lamping, with modifications by Asperti, Gonthier, Abadl, and L eacute;vy, has a well-understood local dynamics based on a standard menagerie of reduction rules, as well as a global context semantics based on Girard's geometry of interaction. However, the global dynamics of graph reduction has not been subject to careful investigation. In particular, graphs lose their structural resemblance to lambda;-terms after only a few graph reduction steps, and little is known about graph reduction strategies that maintain efficiency or structure. While the context semantics provides global information about the computation, its use as part of a reduction strategy seems computationally infeasible. We propose a tractable graph reduction strategy that preserves computationally relevant global structure, and allows us to efficiently bound the computational resources needed to implement optimal reduction.A simple canonical representation for graphs is introduced that we call fan-normal form. This normal form allows us to reduce graphs based on efficient identification of beta;-redexes, rather than being guided by lower-level search for interacting nodes. In addition and perhaps more important, the fan-normal form facilitates a complexity analysis of graph reductions, showing that the number of fan interactions is essentially bounded by a polynomial in the number of unique L eacute;vy labels generated during a labelled reduction. This global analysis of the finitary dynamics of optimal reduction is the first demonstration that a reasonable implementation-independent cost model for the lambda;-calculus is in fact realized by Lamping's abstract algorithm. It remains to be seen whether similar claims can be made about so-called bookkeeping for fan interactions.
The future of custom cell generation in physical synthesis
Authors: Martin Lefebvre, David Marple, Carl Sechen
Venue: Proceedings of the 34th annual Design Automation Conference (1997)

We present a subjective review of custom cellgeneration methods in the context of future advances instate-of-the-art digital circuit synthesis. In particular, wedescribe three opportunities for coupling circuitoptimization operations with the library developmentprocess. These operations include electrical optimization,technology mapping, and cell level place and route.
A comparison study of the logic of four wafer fabrication simulators
Authors: Scott J. Mason, Paul A. Jensen, John W. Fowler
Venue: Proceedings of the 28th conference on Winter simulation (1996)

Many semiconductor manufacturing companies use one of the following four simulators to aid in analyzing, planning, and operating their manufacturing facilities: Tyecin Systems' ManSim/X, AutoSimulations' AutoSched, Systems Modeling's Wafer Fabrication Template, or Chance Industrial Solution's Delphi, which Wright, Williams, and Kelly now licenses as Factory Explorer. A benchmark study of the four packages was conducted, using actual factory data. The packages each produce different results between replications of the data, due to the data's stochastic nature. The differences which exist between the simulation packages studied in this paper, along with the modeling assumptions required to model the data, caused differences in the experimental output metrics of interest: product cycle time and tool utilization parameters. Some possible reasons are each simulation package's batching logic, setup avoidance rules, and rework occurrence estimators.
AutoSched tutorial
Authors: Matthew W. Rohrer
Venue: Proceedings of the 28th conference on Winter simulation (1996)

The AutoSched/sup TM/ finite capacity planning and scheduling tool helps you increase throughput, reduce in-process inventory, and increase equipment and personnel utilization. AutoSched efficiently schedules all of the constraints in your factory, such as shift schedules, work setup rules, batching, preventative maintenance, machine efficiency, and operator skill classes. With AutoSched, you can identify your bottleneck resources and apply intelligent operating rules to improve performance. One manufacturer reduced its average cycle time from 25 to 5 days, and reduced in process inventory to one-fifth previous levels using AutoSched. Scheduling with AutoSched allows you to set accurate commit dates, based on the current mix of work, available resources, and existing commit dates. AutoSched uses the AutoMod/sup TM/ simulation system, AutoSirnulations' proprietary simulation technology. AutoMod provides the discrete event simulation engine, 3-D graphics, and material handling constructs that are the foundation for AutoSched. Built-in task selection rules in AutoSched allow you to model how machines and personnel select tasks to increase factory performance. You can also easily customize AutoSched with an engineering-oriented, English-like language that provides the flexibility to create custom task selection rules. In addition to scheduling, the AutoSched planning tool can be used for capacity analysis. Simulation technology makes it possible for you to quickly and easily consider what if questions such as, What new equipment do we need to buy for producing the new product? Simply add the new equipment to the model, rerun it, and review the results. Effects of capital acquisitions, process changes, and changing product mixes can be evaluated prior to implementation.
The maximum entropy principle in information retrieval
Authors: Paul B. Kantor, Jung Jin Lee
Venue: Proceedings of the 9th annual international ACM SIGIR conference on Research and development in information retrieval (1986)

Applications, assumptions and properties of the maximum entropy principle are discussed. The maximum entropy principle integrates prior estimates of relevance with the observed distribution of term combinations. The result may be a reordering of the segments of a database, compared to a naive estimate. Numerical examples obtained by solution of the non-linear equations for the dual variables are presented and discussed. * Supported in part by the National Science Foundation under grant IST-8318630.
Improving code density using compression techniques
Authors: Charles Lefurgy, Peter Bird, I-Cheng Chen, Trevor Mudge
Venue: Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture (1997)

We propose a method for compressing programs in embedded processors where instruction memory size dominates cost. A post-compilation analyzer examines a program and replaces common sequences of instructions with a single instruction codeword. A microprocessor executes the compressed instruction sequences by fetching code words from the instruction memory, expanding them back to the original sequence of instructions in the decode stage, and issuing them to the execution stages. We apply our technique to the PowerPC, ARM, and i386 instruction sets and achieve an average size reduction of 39%, 34%, and 26%, respectively, for SPEC CINT95 programs.
Phase coupling for horizontal microcode generation
Authors: Vicki H. Allan, Robert A. Mueller
Venue: Proceedings of the 20th annual workshop on Microprogramming (1987)

Microcode for mass produced architectures is still predominantly generated by hand. Yet, as speed dictates the vertical migration of commonly executed functions to microcode, the demand for automated code generation increases. Though considerably more complex than phase-decoupled methods, phase-coupled methods for the generation of horizontal microcode have the potential to produce more highly optimized microcode. Results of the retargetable phase-coupled microcode compiler, Horizon, are presented and directions suggested.
Generation of high-order interpolants for explicit Runge-Kutta pairs
Authors: P. W. Sharp, J. H. Verner
Venue: ACM Transactions on Mathematical Software (TOMS) (1998)

Explicit Runge-Kutta pairs can be enhanced by providing them with interpolants. Enhancements include the ability to estimate and control the defect, to produce dense output, and to calculate past values in delay differential equations. The coefficients of an interpolant are easily generated by bootstripping on the order conditions. However, the generation of high-order interpolants requires a large number of arithmetic operations. We describe an efficient algorithm for the generation of high-order interpolants and illustrate the use of the algorithm with three applications.