ppxscal/embedding_network huggingface dataset:
Efficient use of memory bandwidth to improve network processor throughput
Authors: Jahangir Hasan, Satish Chandra, T. N. Vijaykumar
Venue: ACM SIGARCH Computer Architecture News (2003)

We consider the efficiency of packet buffers used in packet switches built using network processors (NPs). Packet buffers are typically implemented using DRAM, which provides plentiful buffering at a reasonable cost. The problem we address is that a typical NP workload may be unable to utilize the peak DRAM bandwidth. Since the bandwidth of the packet buffer is often the bottleneck in the performance of a shared-memory packet switch, inefficient use of available DRAM bandwidth further reduces the packet throughput. Specialized hardware-based schemes that alleviate the DRAM bandwith problem in high-end routers may be less applicable to NP-based systems, in which cost is an important consideration.In this paper, we propose cost-effective ways to enhance average-case DRAM bandwidth. In modern DRAMs, successive accesses falling within the same DRAM row are significantly faster than those falling across rows. If accesses to DRAM can be generated differently or reordered to take advantage of fast same-row accesses, peak DRAM bandwidth can be approached. The challenge is in exploiting this "row locality" despite the unpredictable nature of memory accesses in NPs. We propose a set of simple techniques to meet this challenge. These include locality-sensitive buffer allocation on packet input, reordering DRAM accesses to increase locality, and prefetching to reduce row miss penalty. We evaluate our techniques on cycle-accurate simulations of Intel's IXP 1200 network processor and find that they boost packet throughput on average by 42.7%, utilizing nearly the peak DRAM bandwidth, for a set of common NP applications processing a real trace.
On the robustness of Gaussian Elimination with Partial Pivoting
Authors: Paola Favati, M. Leoncini, A. Martinez
Venue:  (1999)

It has been recently shown that large growth factors might occur in Gaussian Elimination with Partial Pivoting (GEPP) also when solving some plausibly {\em natural} systems. In this note we argue that this potential problem could be easily solved, with much smaller risk of failure, by very small (and low cost) modifications of the basic algorithm, thus confirming its inherent robustness. To this end, we first propose an informal model with the goal of providing further support to the comprehension of the stability properties of GEPP. We then report the results of numerical experiments that confirm the viewpoint embedded in the model. Basing on the previous observations, we finally propose a simple scheme that could be turned into (even more) accurate software for the solution of linear systems. TEL:: 050593448 EMAIL:: favati@imc.pi.cnr.it
Parallelism in Random Access Machines
Authors: Steven Fortune, James C. Wyllie
Venue:  (1978)

A model of computation based on random access machines operating in parallel and sharing a common memory is presented. The computational power of this model is related to that of traditional models. In particular, deterministic parallel RAM''s can accept in polynomial time exactly the sets accepted by polynomial tape bounded Turing machines; nondeterministic RAM''s can accept in polynomial time exactly the sets accepted by nondeterministic exponential time bounded Turing machines. Similar results hold for other classes. The effect of limiting the size of the common memory is also considered.
Interactive Dialogues in Explanation and Learning
Authors: Giacomo Ferrari, Irina Prodanof, Michele Carenini, Paolo Moreschini
Venue:  (1991)

In this report, the first of the series described in the foreword, the most relevant characteristics of dialogues in explanation and learning are highlighted, on the basis of empirical data collected by City University of London. The intrinsecally different roles of expert (teacher) and user (student) are highlighted, and the consequences on the structure of the dialogue itself are discussed. The need for an approach based on the most recent developments of natural language dialogue modeling is advocated. TEL:: +39 50 560481
A Strong Local Consistency for Constraint Satisfaction
Authors: Romuald Debruyne
Venue: Proceedings of the 11th IEEE International Conference on Tools with Artificial Intelligence (1999)

Filtering techniques are essential to efficiently look for a solution in a constraint network (CN). However, for a long time it has been considered that to efficiently reduce the search space, the best choice is the limited local consistency achieved by forward checking [GB65,HE80]. However, more recent works [SF94,BR96,GS96] show that maintaining arc consistency (which is a more pruningful local consistency) during search outperforms forward checking on hard and large constraint networks. In this paper, we show that maintaining a local consistency stronger than arc consistency during search can be advantageous. According to the comparison of the local consistencies more pruningful than arc consistency that can be used on large CNs in [DE982], Max-restricted path consistency (Max-RPC, [DE97]) is one of the most promising local consistencies. We propose a new local consistency, called Max-RPCEn, that is stronger than Max-RPC and that has almost the same cpu time requirements.
Technology Transfer Between VLSI Design and Software Engineering:CAD Tools and Design Methodologies
Authors: U C Smith, Richard M R Gross.
Venue:  (1985)

Recent research on the explicit transfer of technology used in computer aided design (CAD) tools and design methodologies is reported. First, several examples are given of applications of these technologies to software engineering. Then, three research projects are described which focused on applying software engineering principles to the VLSI design process. They are: a methodology, language, and assessment tool for multi-level mixed mode VLSI designs; a research project that explored the potential for transfer of software design methodologies for managing VLSI design complexity; and a specification technique for ``modules'''' in a VLSI design that localizes the impact of changes to the design. Next, a CAD tool and design methodology are described which consider the design of software and hardware together, and apply common techniques to both. Finally, some observations are made on the appropriateness of technology transfer between VLSI design and software engineering.
Routing Permutations with Link-Disjoint and Node-Disjoint Paths in a Class of Self-Routable Networks
Authors: Yuanyuan Yang, Jianchao Wang
Venue: Proceedings of the 2002 International Conference on Parallel Processing (2002)

High-speed interconnects have been gaining much attention from the computer industry recently as interconnects are becoming a limiting factor to the performance of modern computer systems. This trend will even continue in the near future as technology improves. In this paper, we consider efficiently routing permutations in a class of switch-based interconnects. Permutation is an important communication pattern in parallel and distributed computing systems. We present a generic approach to realizing arbitrary permutations in a class of unique-path, self-routable multistage networks, such as baseline, omega, and banyan networks. It is well-known that this type of interconnect has low hardware cost but can realize only a small portion of all possible permutations between its inputs and outputs in a single pass. In this paper, we consider routing arbitrary permutations with link-disjoint paths and node-disjoint paths in such interconnects in a minimum number of passes. In particular, routing with node-disjoint paths has important applications in the emerging optical interconnects. We employ and further expand the Latin square technique used in the all-to-all personalized exchange algorithms for this class of multistage networks [1] for general permutation routing. As can be seen, our implementation of permutation routing is optimal in terms of the number of passes that messages are transmitted through the network, and it is near-optimal in network transmission time for sufficiently long messages.
Deciphering Cyberspace: Making the Most of Digital Communication Technology
Authors: Leonard Shyles
Venue:  (2002)

:Deciphering Cyberspace: Making the Most of Digital Communication Technology, a collection of new chapters by media experts, social-psychologists, and legal scholars, lucidly explores the modern digital information revolution with one goal: to demystify digital communication technology. By examining its subject matter from the three perspectives of technology, markets, and policy, Deciphering Cyberspace provides an impressively comprehensive view of the technical nature of cyberspace, its social impact, and legal significance for individuals, institutions, and society. Marrying the broad social and psychological impact of technology to the personal, this text goes beyond mere operation of technology and illuminates how systems work. Features of this Text Explains the physical principles that govern the functioning of all digital communication systems Interviews with industry experts spark interest and provide material from lively classroom discussion Chapter on connected education in the information age traces the history of new media in the field of communicationThis text is recommended for courses examining digital media communication in mass media, communication technology, and telecommunications. Deciphering Cyberspace is a must-have volume for anyone interested in keeping connected and learning about the ever-changing world of technology in our increasingly mediated world. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
Formal verification-a viable alternative to simulation?
Authors: A. Nordstrom
Venue: Proceedings of the 1996 IEEE International Verilog HDL Conference (IVC '96) (1996)

Functional validation and regression simulations constitute a large part of the entire ASIC design process and schedule. The drive to decrease time to market has resulted in pressure to reduce total simulation times. Formal verification addresses the schedule problem by eliminating the need for regression simulations. The paper investigates whether formal verification is a viable alternative to regression simulations for functional verification in a Verilog based design flow. The investigative methods were based on applying formal verification on all steps in the verification process. It is concluded that regression simulations can be mostly replaced by formal verification.
ISAAC: A Voice Activated Speech Response System for Wearable Computers
Authors: Asim Smailagic
Venue: Proceedings of the 1st IEEE International Symposium on Wearable Computers (1997)

ISAAC (Integrated Speech Activated Application Control) is a technology feasibility prototype which explored capabilities in the low-weight, low-energy area assuming communication over short distances. ISAAC employs speech for communicating with infrastructure in special rooms around campus. A wireless microphone transmits analog speech to a speech recognition system on a base computer. The base computer can control devices through infrared repeaters. It also communicates with the user via an infrared wireless headset. The user can read electronic mail or control the presentation (e.g., VCR, slide projector, etc.) using audio input/output.
Experiments in the Concurrent Computation of Spatial Association on the KSR1
Authors: Richard J. Marciano, Marc P. Armstrong, Clarie E. Pavlik
Venue:  (1994)

Spatial association measures, when computed for large data sets, have significant computational requirements. Parallel processing is one way to address these requirements. The design of parallel programs, however, requires careful planning since many factors under programmer control affect the efficiency of the resulting computations. In this paper, two strategies of parallel processing are described using as an illustration a measure of spatial association, G(d). An evaluation is made of the efficiency of the parallel implementations by varying the problem size and the number of processors used in parallel. The results obtained indicate that parallel processing can currently enable analysts to work in near-real-time with problems that range in the tens of thousands of observations; such problems require less than two minutes of execution time on the KSR1. Also superlinear speedups of almost 1500 are obtained for the computation phase of the problem.
QoS-Based Recovery of Multimedia Objects
Authors: Motokazu Yokoyama, Katsuya Tanaka, Makoto Takizawa
Venue: Proceedings of the Seventh International Conference on Parallel and Distributed Systems: Workshops (2000)

Distributed applications like those that teleconferences using high-speed networks are realized by using multiple multimedia objects. It is critical to discuss how a multimedia object supports quality of service (QoS) required by applications in change of the object including object faults. In this paper, we newly define global states of objects, which are consistent with respect to QoS supported by objects. Based on the QoS-based consistency, we discuss how to recover the objects from some states which do not satisfy QoS.
Leonardo's Laptop: Human Needs and the New Computing Technologies
Authors: Ben Shneiderman
Venue:  (2003)

:Ben Shneiderman's book dramatically raises computer users' expectations of what they should get from technology. He opens their eyes to new possibilities and invites them to think freshly about future technology. He challenges developers to build products that better support human needs and that are usable at any bandwidth. Shneiderman proposes Leonardo da Vinci as an inspirational muse for the "new computing." He wonders how Leonardo would use a laptop and what applications he would create.Shneiderman shifts the focus from what computers can do to what users can do. A key transformation is to what he calls "universal usability," enabling participation by young and old, novice and expert, able and disabled. This transformation would empower those yearning for literacy or coping with their limitations. Shneiderman proposes new computing applications in education, medicine, business, and government. He envisions a World Wide Med that delivers secure patient histories in local languages at any emergency room and thriving million-person communities for e-commerce and e-government. Raising larger questions about human relationships and society, he explores the computer's potential to support creativity, consensus-seeking, and conflict resolution. Each chapter ends with a Skeptic's Corner that challenges assumptions about trust, privacy, and digital divides.
{\bf (Revision of CS-1991-42.)} The Near-Horn Approach to Disjunctive Logic Programming
Authors: W D Reed, W D Loveland, T B Smith
Venue:  (1992)

This paper presents an overview of the near-Horn Prolog project at Duke University. The basic goal behind this project has been to extend Prolog to disjunctive logic programs (and thus full first-order expressibility) while retaining as much of the clarity and procedural simplicity of Prolog as possible. The approach taken to achieve this goal has been to combine Prolog with case analysis reasoning. The research work within the project can roughly be divided into three areas: procedure design, semantics, and implementation. Three different variants of Near-Horn Prolog have been devised, of which the most recent, Inheritance near-Horn Prolog (InH-Prolog), is the variant currently being favored. The semantics for the near-Horn Prologs, specifically for InH-Prolog, have been investigated, resulting in a case-analysis based fixpoint semantics which mimics the procedural behavior of InH-Prolog. Also, both classical and default negation have been incorporated into the near-Horn Prolog systems. Finally, an interpreter for the original near-Horn Prolog variant has been implemented, and a compiler for the InH-Prolog variant is currently nearing completion.
Practical Considerations in Protocol Verification: The E-2C Case Study
Authors: Yifei Dong, Scott A. Smolka, Eugene W. Stark, Stephanie M. White
Venue: Proceedings of the 5th International Conference on Engineering of Complex Computer Systems (1999)

We report on our efforts to formally specify and verify a new protocol of the E-2C Hawkeye Early Warning Aircraft. The protocol, which is currently in test at Northrop Grumman, supports communication between a Mission Computer (MC) and three or more Tactical Workstations (TWSs), connected by a single-segment LAN. We modeled the protocol in the PROMELA specification language of the SPIN verification tool, and used SPIN to analyze a number of properties of the protocol. Our investigation revealed a race condition that can lead to a disconnect of an MC/TWS connection when there is one lost UDP data-gram and significant timing delays. Such delays are virtually impossible under normal E-2C operating conditions, but could be due to noise on the MC/TWS LAN. A simple modification was proposed that avoids the disconnect in many situations. Practical considerations, however, mandated that the protocol be left as is: shutting down a noisy connection and reinitializing the TWS, with minimal delay and loss of information to the operator, was deemed preferable to operating in degraded mode.
Towards a Unified Method of Sharing in Object-Oriented Programming
Authors: Lynn A Stein
Venue:  (1989)

The tradeoff between flexibility and behavioral guarantee permeates almost every aspect of computer science. In object-oriented programming, this issue is reflected in the current delegation-vs.-inheritance debate. We describe several mechanisms which impart some of the flexibility of delegation to a more rigidly constrained system. In doing so, we outline a new design methodology which allows the user to program in a more natural and dynamic fashion, occasionally stepping outside the bounds of type inclusion, and then automatically restoring the structure of the strict class hierarchy.
Effectiveness of iterative solution strategies for the high frequency response of fluid-loaded structures
Authors: Yuan Lin, Karl Grosh
Venue: Finite Elements in Analysis and Design (2003)

The effectiveness of iterative solution strategies for the three-dimensional high frequency response of fluid-loaded structures formulated by the finite element method is investigated. Element-by-element sparse matrix storage was implemented and combined with the QMR iterative algorithm to solve the computationally intensive complex linear equations. To remedy the ill-conditioning caused by the fine mesh and vastly different spatial scales of the structures and fluid medium, two different preconditioning techniques are studied. The numerical experiments show that the SSOR preconditioner is the most cost efficient strategy though the ILU factorization is generally more effective in reducing the iteration counts. Also, the simple ILU(0) preconditioner is shown to be more efficient and reliable than recently developed ILUT(p, τ) preconditioner.
Business Line Implementation for Electronic Services
Authors: John Dodd, Chander Ramchandani, Simon Liu
Venue: IT Professional (2003)

Business lines can help diverse agencies collaborate to deliver efficient electronic services. Find out how to implement them.
Type Inference for Variant Object Types
Authors: Michele Bugliesi, Santiago M. Pericas-Geertsen
Venue:  (2000)

Abstract Existing type systems for object calculi are based on invariant subtyping. Subtyping invariance is required for soundness of static typing in the presence of method overrides, but it is often in the way of the expressive power of the type system. Flexibility of static typing can be recovered in different ways: in first-order systems, by the adoption of object types with variance annotations, in second-order systems by resorting to Self types. Type inference is known to be P-complete for first-order systems of finite and recursive object types, and NP-complete for a restricted version of Self types. The complexity of type inference for systems with variance annotations is yet unknown. This paper presents a new object type system based on the notion of Split types, a form of object types where every method is assigned two types, namely, an update type and a select type. The subtyping relation that arises for Split types is variant and, as a result, subtyping can be performed both in width and in depth. The new type system generalizes all the existing first-order type systems for objects, including systems based on variance annotations. Interestingly, the additional expressive power does not affect the complexity of the type inference problem, as we show by presenting an O(n^3) inference algorithm.
Automated Theorem Proving: Mapping Logic Into AI
Authors: W D Loveland
Venue:  (1986)

Logic can be defined as the formal study of reasoning; if we replace ``formal'''' by ``mechanical'''' we can place almost the entire set of methodologies used in the field of automated theorem proving (ATP) within the scope of logic. Because of the goals of ATP, if not always the methodologies, ATP has been considered to be within the domain of AI. We explore the methodologies of ATP, including the logics that underlie the theorem provers, and discuss some of the mechanisms that utilize these logics. These include term rewriting systems, mathematical induction, inductionless induction and even mixed integer programming. The ATP field, via resolution, has even provided the foundation for an exciting AI and database programming language, PROLOG. We conclude with a new method for extending the PROLOG system to work with non-Horn clause sets within a positive logic format, particularly simple for ``slightly non-Horn'''' clause sets.
Computing Concepts with Java Essentials, 3 edition
Authors: Cay Horstmann
Venue:  (2003)

:* Features the most effective introduction to computing and programming, using the most current version of the Java language (Java 1.4) * Includes expanded coverage of Applets and Graphics * The new edition features a stronger emphasis on design and interesting Java features * Material points out common mistakes, so that the reader will know to avoid them Wiley Higher Education
Quality Management Applied to the Development of a National Checklist for IS0 9001 Audits for Software
Authors: A. Walker
Venue: Proceedings of the 3rd International Software Engineering Standards Symposium (ISESS '97) (1997)

One of the commonly used tools in quality management is a checklist, which may contain a set of criteria against which the efficacy of a process is judged. This paper presents a case study of a national project to develop a checklist to support audits and assessments of ISO 9001-compliant quality management systems in the field of software. This national project is reviewed in terms of: project requirements, process and product quality objectives and quality management practices; participation by industry locally and internationally; the use of the Internet for communication and document distribution; the product development and review process; and the product trials (or validation).