ppxscal/embedding_network huggingface dataset:
W*-Grid: A Robust Decentralized Cross-layer Infrastructure for Routing and Multi-Dimensional Data Management in Wireless Ad-Hoc Sensor Networks
Authors: Gabriele Monti, Gianluca Moro, Stefano Lodi
Venue: Proceedings of the Seventh IEEE International Conference on Peer-to-Peer Computing (2007)

Sensor networks are usually composed by small units able to sense and transmit to a sink elementary data which are successively processed by an external machine. How- ever recent improvements in the memory and computational power of sensors, together with the reduction of energy consumptions, are rapidly changing the potential of such systems, moving the attention towards data-centric sensor networks. This paper presents W*-Grid, a fully decen- tralized and robust infrastructure for self-organizing data- centric sensor networks, where wireless communications occur through multi-hop routing among devices. The so- lution extends W-Grid by strongly improving the network recovery performance from link and/or device failures. In particular W*-Grid guarantees, by construction, at least two disjoint paths between each couple of nodes. This im- plies that the recovery in W*-Grid occurs without broad- casting transmissions and guaranteeing robustness while drastically reducing the energy consumption. An extensive number of simulations show the efficiency, robustness and traffic load of resulting networks under several scenarios of device density and of number of coordinates.
A Highly Integrated 8mW H.264/AVC Main Profile Real-time CIF Video Decoder on a 16MHz SoC Platform
Authors: Huan-Kai Peng, Chun-Hsin Lee, Jian-Wen Chen, Tzu-Jen Lo, Yung-Hung Chang, Sheng-Tsung Hsu, Yuan-Chun Lin, Ping Chao, Wei-Cheng Hung, Kai-Yuan Jan
Venue: Proceedings of the 2007 Asia and South Pacific Design Automation Conference (2007)

We present a hardwired decoder prototype for H.264/AVC main profile video. Our design takes as its input compressed H.264/AVC bit-stream and produces as its output video frames ready for display. We wrap the decoder core with an AMBA-AHB bus interface and integrate it into a multimedia SoC platform. Several architectural innovations at both IP and system levels are proposed to achieve very high performance at very low operating frequency. Running at 16MHz, our FPGA demo system is able to real-time decode CIF (352×288) video at 30 frames per second. Moreover, we take system cost into consideration such that only a single external SDRAM is needed and memory traffic minimized.
A geometric approach for early power grid verification using current constraints
Authors: Imad A. Ferzli, Farid N. Najm, Lars Kruse
Venue: Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design (2007)

The verification of power grids in modern integrated circuits must start at design time, where circuit information is unknown but could be specified or inferred from design or architectural considerations. This work builds on previously proposed techniques to deal with circuit uncertainty in the framework of linear current constraints, but proposes a cost-controlled solution, by following a geometric approach, and transforming a problem that requires as many linear programs as there are power grid nodes, to another involving a user-limited number of solutions of one linear system.
A Novel Gray Hole Attack Detection Scheme for Mobile Ad-Hoc Networks
Authors: Gao Xiaopeng, Chen Wei
Venue: Proceedings of the 2007 IFIP International Conference on Network and Parallel Computing Workshops (2007)

Mobile Ad Hoc Networks are vulnerable to various types of Denial of Service (DoS) attacks for the absence of fixed network infrastructure. The Gray Hole attack is a type of DoS attacks. In this attack, an adversary silently drops some or all of the data packets sent to it for further forwarding even when no congestion occurs. Firstly, DSR protocol, aggregate signature algorithm and network model were introduced. Secondly, we proposed to use aggregate signature algorithm to trace packet dropping nodes. The proposal was consisted of three related algorithms: the creating proof algorithm, the checkup algorithm and the diagnosis algorithm. The first was for creating proof, and the second was for checking up source route nodes, and the last was for locating the malicious nodes. Finally, the efficiency of the proposal was analyzed. The simulation results using ns-2 show that in a moderately changing network, most of the malicious nodes could be detected, the routing packet overhead was low, and the packet delivery rate has been improved.
Improving performance of transport protocols in multipath transferring schemes
Authors: Maysam Yabandeh, Sajjad Zarifzadeh, Nasser Yazdani
Venue: Computer Communications (2007)

One major drawback of multipath transferring schemes inspired by usage of different paths with diverse delays is the emergence of reordering among packets of the same flow. In this paper, we present two separate approaches to resolve this problem for UDP and TCP connections. By properly scheduling the packets among multiple paths, our UDP-based approach tries to deliver data to the receiver in-order, while imposing a minimum possible delay and small buffer space on the receiver's application. We theoretically prove the optimality of the proposed method and then present its analytical results. Unfortunately, in the case of TCP, the reordering intensifies the problem by bringing more timeouts and many unnecessary fast-retransmits which eventually degrades the throughput of TCP connections considerably. To address these issues, we first present the general conditions that should be held to avoid timeouts in multipath schemes. Then, we enhance our approach by preventing nonessential fast-retransmit/recovery events in TCP. Moreover, we introduce an analytical model to estimate the probability of triggering 3rd duplicate ACK in our method. Finally, through simulation experiments we show that the performance of our multipath methods is comparable with the optimal one-path transmissions (with aggregated bandwidth); especially, in terms of throughput and fast-retransmit ratio parameters.
Modeling and Managing Thermal Profiles of Rack-mounted Servers with ThermoStat
Authors: Jeonghwan Choi, Youngjae Kim, Anand Sivasubramaniam, Jelena Srebric, Qian Wang, Joonwon Lee
Venue: Proceedings of the 2007 IEEE 13th International Symposium on High Performance Computer Architecture (2007)

High power densities and the implications of high operating temperatures on the failure rates of components are key driving factors of temperature-aware computing. Computer architects and system software designers need to understand the thermal consequences of their proposals, and develop techniques to lower operating temperatures to reduce both transient and permanent component failures. Until recently, tools for understanding temperature ramifications of designs have been mainly restricted to industry for studying packaging and cooling mechanisms, with little access to such toolsets for academic researchers. Developing such tools is an arduous task since it usually requires cross-cutting areas of expertise spanning architecture, systems software, thermodynamics, and cooling systems. Recognizing the need for such tools, there has been recent work on modeling temperatures of processors at the micro-architectural level which can be easily understood and employed by computer architects for processor designs. However, there is a dearth of such tools in the academic/research community for undertaking architectural/systems studies beyond a processor - a server box, rack or even a machine room. This paper presents a detailed 3-dimensional Computational Fluid Dynamics based thermal modeling tool, called ThermoStat, for rack-mounted server systems. Using this tool, we model a 20 (each with dual Xeon processors) node rack-mounted server system, and validate it with over 30 temperature sensor measurements at different points in the servers/rack. We conduct several experiments with this tool to show how different load conditions affect the thermal profile, and also illustrate how this tool can help design dynamic thermal management techniques.
Network controlled handovers: challenges and possibilities
Authors: T. Melia, A. Oliva, I. Soto, P. Serrano, R. Aguiar
Venue: Wireless Personal Communications: An International Journal (2007)

The concept of network controlled handovers is commonly used in cellular technologies. With multi-mode terminals, using layer-2 techniques, this concept can only be applied inside each technology, which impairs the full exploitation of multi-access support. We discuss a layer-3 technique able to operate across technologies, and present an analysis of the performance advantages this technique brings. In general, an increase around 25% in system usage is achievable. The paper further analyses some cell characteristics that impact on the performance improvements achievable by network controlled handovers.
CREA: A Checkpoint Based Reliable Micro-architecture for Superscalar Processors
Authors: Shijian Zhang, Weiwu Hu
Venue: Proceedings of the 16th Asian Test Symposium (2007)

Conventional temporal redundant techniques to detect transient faults have resulted in considerable performance loss. One major reason for this problem is the reclamation of some critical resources, such as the instruction window and physical registers, is delayed, which degrades instruction-level parallelism. This paper proposes a novel fault-tolerant micro-architecture based on checkpoint mechanism. All occupied resources are reclaimed during the retirement stage in the first execution. Therefore, the performance overhead is mitigated evidently. Our scheme requires only small hardware cost and provides short fault detection latency.
Sofware Reviews
Venue: IEEE Software (1984)

"Software Reviews" is designed to present IEEE Software readers with timely evaluations of operating systems, applications, and utility software. This department will concentrate on software in widespread use, but reviews will not be limited to technical descriptions of various packages the economic and philosophical cause and effect of software systems will also be examined. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
An Approach to Convert Any Threshold Signature into a Threshold Group Signature
Authors: Guowen Li, Jia Yu, Rupeng Li, Daxing Li
Venue: Proceedings of the Eighth ACIS International Conference on Software Engineering, Artificial Intelligence, Networking, and Parallel/Distributed Computing - Volume 02 (2007)

A t-out-of-n threshold group signature is a generalization of group signature, in which only t or more members from a given group with n members can represent the group to generate a signature anonymously and the identities of the participating signers can be revealed in case of a dispute later. A new approach to convert any threshold signature into a threshold group signature is proposed in this paper. Compared with the proposal presented by Petersen, our approach has better efficiency and shorter signatures, and it does not require any secure channel among the participating signers. In particular, when the interpolation coefficients are calculated by the group manager, it has better anonymity.
Heterogeneous Congestion Control: Efficiency, Fairness and Design
Authors: Ao Tang, David Wei, Steven Low
Venue: Proceedings of the Proceedings of the 2006 IEEE International Conference on Network Protocols (2006)

When heterogeneous congestion control protocols that react to different pricing signals (e.g. packet loss, queueing delay,ECN marking etc.) share the same network, the current theory based on utility maximization fails to predict the network behavior.Unlike in a homogeneous network, the bandwidth allocation now depends on router parameters and flow arrival patterns. It canbe non-unique, inefficient and unfair. This paper has two objectives. First, we demonstrate the intricate behaviors of a heterogeneousnetwork through simulations and present a rigorous framework to help understand its equilibrium efficiency and fairness properties.By identifying an optimization problem associated with every equilibrium, we show that every equilibrium is Pareto efficientand provide an upper bound on efficiency loss due to pricing heterogeneity. On fairness, we show that intra-protocol fairnessis still decided by a utility maximization problem while inter-protocol fairness is the part over which we don¿t have control.However it is shown that we can achieve any desirable inter-protocol fairness by properly choosing protocol parameters. Second,we propose a simple slow timescale source-based algorithm to decouple bandwidth allocation from router parameters and flowarrival patterns and prove its feasibility. The scheme needs only local information.
Multi-probe LSH: efficient indexing for high-dimensional similarity search
Authors: Qin Lv, William Josephson, Zhe Wang, Moses Charikar, Kai Li
Venue: Proceedings of the 33rd international conference on Very large data bases (2007)

Similarity indices for high-dimensional data are very desirable for building content-based search systems for feature-rich data such as audio, images, videos, and other sensor data. Recently, locality sensitive hashing (LSH) and its variations have been proposed as indexing techniques for approximate similarity search. A significant drawback of these approaches is the requirement for a large number of hash tables in order to achieve good search quality. This paper proposes a new indexing scheme called multi-probe LSH that overcomes this drawback. Multi-probe LSH is built on the well-known LSH technique, but it intelligently probes multiple buckets that are likely to contain query results in a hash table. Our method is inspired by and improves upon recent theoretical work on entropy-based LSH designed to reduce the space requirement of the basic LSH method. We have implemented the multi-probe LSH method and evaluated the implementation with two different high-dimensional datasets. Our evaluation shows that the multi-probe LSH method substantially improves upon previously proposed methods in both space and time efficiency. To achieve the same search quality, multi-probe LSH has a similar time-efficiency as the basic LSH method while reducing the number of hash tables by an order of magnitude. In comparison with the entropy-based LSH method, to achieve the same search quality, multi-probe LSH uses less query time and 5 to 8 times fewer number of hash tables.
Formal Models of Capability-Based Protection Systems
Authors: L. Snyder
Venue: IEEE Transactions on Computers (1981)

The role of formal modeling in the study of capability- based protection systems is explained. Historical background is presented and a model of a computer science department's computer system is presented. A survey of several important capability-based models is given including the Harrison, Ruzzo, Ullman model, the Take-Grant model, and grammatical models. These models are presented in a unified manner with consistent terminology. The main results of the models are given. These results are compared, contrasted, and interpreted in the context of numerous examples.
Micro-architecture Pipelining Optimization with Throughput-Aware Floorplanning
Authors: Yuchun Ma, Zhuoyuan Li
Venue: Proceedings of the 2007 Asia and South Pacific Design Automation Conference (2007)

For modern processor designs in nanometer technologies, both block and interconnect pipelining are needed to achieve multi-gigahertz clock frequency, but previous approaches consider block pipelining and interconnect pipelining separately. For example, all recent works on wire pipelining assume pre-pipelined components and consider only inserting pipeline stages on point-to-point wire or bus connections. To the best of our knowledge, this paper is the first that considers block pipelining and interconnect pipelining simultaneously. We optimize multiple critical paths or loops in the micro-architecture and insert the pipelines stages optimally in the blocks and wires of these loops to meet the clock frequency requirement. We propose two approaches to this problem. The first approach is based on mixed integer linear programming (MILP) which is theoretically guaranteed to produce the optimal solution, and the second one is an efficient graph-based algorithm that produces near-optimal solutions. Experimental results show that simultaneous block and interconnect pipelining leads to more than 20% improvement over wire-pipelining alone on the overall processor performance. Moreover, the graph-based approach gives solutions very close to the MILP results ( 2% more than MILP results on average) but in a much shorter runtime.
Validation criteria for enhanced fuzzy clustering
Authors: Asli Celikyilmaz, I. Burhan Türkşen
Venue: Pattern Recognition Letters (2008)

We introduce two new criterions for validation of results obtained from recent novel-clustering algorithm, improved fuzzy clustering (IFC) to be used to find patterns in regression and classification type datasets, separately. IFC algorithm calculates membership values that are used as additional predictors to form fuzzy decision functions for each cluster. Proposed validity criterions are based on the ratio of compactness to separability of clusters. The optimum compactness of a cluster is represented with average distances between every object and cluster centers, and total estimation error from their fuzzy decision functions. The separability is based on a conditional ratio between the similarities between cluster representatives and similarities between fuzzy decision surfaces of each cluster. The performance of the proposed validity criterions are compared to other structurally similar cluster validity indexes using datasets from different domains. The results indicate that the new cluster validity functions are useful criterions when selecting parameters of IFC models.
Invited Talk 2: EDA to the Rescue of the Silicon Roadmap
Authors: T. W. Williams
Venue: Proceedings of the 16th Asian Test Symposium (2007)

Since the invention of the transistor nearly six decades ago, new technology nodes have been added approximately every two years. This march of progress has yielded smaller transistors that run about 40% faster with each geometry scaling, fulfilling the promise and industry-defining mantra of "smaller, faster, cheaper!", and harder to Test. Now, in the realm of 65- and 45-nanometer design and manufacturing, the industry is confronted by multiple complex and stubborn challenges: silicon technology keeps shrinking, but doesn't advance in speed at the same rate. The recent high-k dielectric announcements have yet to be proven manufacturable, and copper interconnect is already hitting the wall. We are driving to the edge of the silicon roadmap, but there is no viable alternative to CMOS within our reach. Not coincidentally, several companies are announcing their intention to stop internal R&D at the 45 nanometer node and use foundry-supplied processes at 32 nanometers and below. The electronics industry ecosystem is at a fork in the road: those few who can afford it will keep rushing to 45 nanometers and maybe beyond, to 32 and 25 nanometers; the rest will hold at 130 or perhaps 90 nanometers, trying to get the most out of those processes that they can. In both cases it is EDA that will come to the rescue. This is true for the Test area as well. We will show how new tools in test will be needed to keep up with these very hard requirements and how EDA Teat can help. EDA innovation is the gear that enables design for manufacturing and yield (which encompasses design for test), design for low power, and design for variability. EDA is not only the enabler for quality in electronic design; it is truly "where electronics begins!"
Corporate Convergence with the 3GPP IP Multimedia Subsystem
Authors: Kim Lynggaard Larsen, German Castro, Hans-Peter Schwefel, Vincenzo Scotto di Carlo
Venue: Proceedings of the The 2007 International Conference on Next Generation Mobile Applications, Services and Technologies (2007)

The future of communications is not only about new and "fancy" services, it also implies the improvement and simplification of day-by-day user experience. In today's mobile networks, there are neither products nor standardized solutions to achieve a functional integration and mobility between a corporate Private Branch Exchange (PBX) based network and a public IP Multimedia Subsystem (IMS) network, e.g. providing value added interworked services from both networks. Some proprietary solutions are based on call forwarding mechanisms and assume two independent subscriptions, and therefore two subscriber numbers. This paper presents some solutions for this problem and proposes an approach based on the "Group registration" which paves the way for a functional integration, starting in a first step with one number service support. The proposed design limits the impact on the PBX installed basis by concentrating the new functionality in the "IMS Gateway". These latter interfaces the corporate domains by means of a User-to-Network interface.
The Ada Language System
Authors: M. I. Wolfe
Venue: Computer (1981)

The ALS-a portable, retargetable, integrated environment-is being designed to meet rigorous Stoneman requirements. It addresses critical development and maintenance problems of embedded computer systems.
Effect of Modularity on System Evolution
Authors: R. F. Kamel
Venue: IEEE Software (1987)

Modularity is invaluable, but changes in one module can have a domino effect on others, requiring significant extra compilation. BNR Pascal reduces this extra compilation.
Vision based data fusion for autonomous vehicles target tracking using interacting multiple dynamic models
Authors: Zhen Jia, Arjuna Balasuriya, Subhash Challa
Venue: Computer Vision and Image Understanding (2008)

In this paper, a novel algorithm is proposed for the vision-based object tracking by autonomous vehicles. To estimate the velocity of the tracked object, the algorithm fuses the information captured by the vehicle's on-board sensors such as the cameras and inertial motion sensors. Optical flow vectors, color features, stereo pair disparities are used as optical features while the vehicle's inertial measurements are used to determine the cameras' motion. The algorithm determines the velocity and position of the target in the world coordinate which are then tracked by the vehicle. In order to formulate this tracking algorithm, it is necessary to use a proper model which describes the dynamic information of the tracked object. However due to the complex nature of the moving object, it is necessary to have robust and adaptive dynamic models. Here, several simple and basic linear dynamic models are selected and combined to approximate the unpredictable, complex or highly nonlinear dynamic properties of the moving target. With these basic linear dynamic models, a detailed description of the three-dimensional (3D) target tracking scheme using the Interacting Multiple Models (IMM) along with an Extended Kalman Filter is presented. The final state of the target is estimated as a weighted combination of the outputs from each different dynamic model. Performance of the proposed fusion based IMM tracking algorithm is demonstrated through extensive experimental results.