ppxscal/embedding_network huggingface dataset:
Multigrid for Locally Refined Meshes
Authors: Yair Shapira
Venue: SIAM Journal on Scientific Computing (1999)

A multilevel method for the solution of finite element schemes on locally refined meshes is introduced. For isotropic diffusion problems, the condition number of the two-level method is bounded independently of the mesh size and the discontinuities in the diffusion coefficient. The curves of discontinuity need not be aligned with the coarse mesh. Indeed, numerical applications with 10 levels of local refinement yield a rapid convergence of the corresponding 10-level, multigrid V-cycle and other multigrid cycles which are more suitable for parallelism even when the discontinuities are invisible on most of the coarse meshes.
The dilemma of credibility vs. speed
Authors: James Prekeges
Venue: ACM Journal of Computer Documentation (JCD) (2000)

CoRRs implicitly constrained but officially open acceptance policy for submitted papers raises concerns about both censorship and credibility. To avoid refereeing incoming papers yet still help readers assess their merits, CoRR could use coordinated public comments and ratings in the manner of some online auctions and booksellers.
Active Rule Termination Analysis: An Implementation and Evaluation of the Refined Triggering Graph Method
Authors: Susan D. Urban, Michael K. Tschudi, Suzanne W. Dietrich, Anton P. Karadimce
Venue: Journal of Intelligent Information Systems (1999)

This paper describes the implementation of the Refined Triggering Graph (RTG) method for active rule termination analysis and provides an evaluation of the approach based on the application of the method to a sample active application. The RTG method has been defined in the context of an active-deductive, object-oriented database language known as CDOL (Comprehensive, Declarative, Object Language). The RTG method studies the contents of rule pairs and rule cycles in a triggering graph and tests for: (1) the successful unification of one rule&lsquo;s action with another rule&lsquo;s triggering event, and (2) the satisfiability of active rule conditions, asking whether it is possible for the condition of a triggered rule to evaluate to true in the context of the triggering rule&lsquo;s condition. If the analysis can provably demonstrate that one rule cannot trigger another rule, the directed vector connecting the two rules in a basic triggering graph can be removed, thus refining the triggering graph. An important aspect in the implementation of the method is the development of a satisfiability algorithm for CDOL conditions. This paper presents the tool that was developed based on the RTG method, describing how techniques from constraint logic programming are integrated with other techniques for testing the satisfiability of rule triggering conditions. The effectiveness of the approach within the context of a sample application is also addressed.
Enriching buyers' experiences: the SmartClient approach
Authors: Pearl Pu, Boi Faltings
Venue: Proceedings of the SIGCHI conference on Human factors in computing systems (2000)

In electronic commerce, a satisfying buyer experience is a key competitive element. We show new techniques for better adapting interaction with an electronic catalog system to actual buying behavior. Our model replaces the sequential separation of needs identification and product brokering with a conversation in which both processes occur simultaneously. This conversation supports the buyer in formulating his or her needs, and in deciding which criteria to apply in selecting a product to buy. We have experimented with this approach in the area of travel planning and developed a system called SmartClient Travel which supports this process. It includes tools for need identification, visualization of alternatives, and choosing the most suitable one. We describe the system and its implementation, and report on user studies showing its advantages for electronic catalogs.
An Efficient Logic Equivalence Checker for Industrial Circuits
Authors: Jaehong Park, Carl Pixley, Michael Burns, Hyunwoo Cho
Venue: Journal of Electronic Testing: Theory and Applications (2000)

We present our formal combinational logic equivalence checking methods for industry-sized circuits. Our methods employ functional (OBDDs) algorithms for decisions on logic equivalence and structural (ATPG) algorithms to quickly identify inequivalence. The complimentary strengths of the two types of algorithms result in a significant reduction in CPU time. Our methods also involve analytical and empirical heuristics whose impact on performance for industrial designs is considerable. The combination of OBDDs, ATPG, and our heuristics resulted in a decrease in CPU time of up to 80% over OBDDs alone for the circuits we tested. In addition, we describe an algorithm for automatically determining the correspondence between storage elements in the designs being compared.
A 2 GHz Phase-Locked Loop Frequency Synthesizer with On-Chip VCO
Authors: Rami Ahola, Jyrki Vikla, Saska Lindfors, Jarkko Routama, Kari Halonen
Venue: Analog Integrated Circuits and Signal Processing (1999)

This paper discusses the implementation of the building blocks for a 2 GHz phase-locked loop frequency synthesizer in a standard 0.5 &mu;m BiCMOS process. These blocks include a low-power optimized dual modulus prescaler which is able to operate with input frequencies up to 2.7 GHz, a phase detector with extremely constant gain throughout the input phase difference range, a chargepump with a rail-to-rail output, and an on-chip voltage-controlled oscillator.
Versatile BIST: An Integrated Approach to On-line/Off-line BIST for Data-Dominated Architectures
Authors: Nilanjan Mukherjee, Ramesh Karri
Venue: Journal of Electronic Testing: Theory and Applications (1998)

Built-in Self Test (BIST) is increasingly being used in production testing of VLSICs. In BIST, extra logic is implemented to generate test patterns and compact test responses on chip. However, this extra logic is used only during the test mode. Traditionally, BIST structures used for on-line testing have been different from the BIST structures used for off-line production testing. Replicated hardware, comparators and checkers are typical on-line BIST structures. This is because on-line BIST techniques are mostly based on space or time or information redundancy. On the other hand, typical off-line BIST structures include linear feedback shift register (LFSR) based pattern generators and multiple input signature register (MISR) based test response compactors.In this paper we report a Versatile BIST approach (VBIST) that targets both off-line and on-line self test. VBIST uses off-line BIST circuitry for on-line testing as well. Unlike traditional on-line self test approaches, VBIST does not use functional data as test inputs. Rather, VBIST generates test patterns and compacts test responses during the normal mode of operation. Furthermore, VBIST coordinates this generation and application of test patterns and compaction of test responses with the usage profile of the modules in the design. VBIST entails little additional impact on performance and area of the design (vis-a-vis the performance and area of a design with off-line BIST). We validated the proposed approach using the Synopsys Behavioral Compiler as the synthesis framework and by writing synthesis scripts for incorporating VBIST constraints.
Requirements and the concept of cooperative system management
Authors: Bharat Bhushan Ahmed Patel
Venue: International Journal of Network Management (1998)

Cooperation among various types of management functions is necessary to allow management functions to interwork in providing and using information and services for systems management. To understand these tasks from the point of view of cooperative working, this article discusses the requirements and presents the concept of cooperative system management. &copy; 1998 John Wiley & Sons, Ltd.
Absorbing Boundary Conditions for the Schrödinger Equation
Authors: Thomas Fevens, Hong Jiang
Venue: SIAM Journal on Scientific Computing (1999)

A large number of differential equation problems which admit traveling waves are usually defined on very large or infinite domains. To numerically solve these problems on smaller subdomains of the original domain, artificial boundary conditions must be defined for these subdomains. One type of artificial boundary condition which can minimize the size of such subdomains is the absorbing boundary condition. The imposition of absorbing boundary conditions is a technique used to reduce the necessary spatial domain when numerically solving partial differential equations that admit traveling waves. Such absorbing boundary conditions have been extensively studied in the context of hyperbolic wave equations. In this paper, general absorbing boundary conditions will be developed for the Schrödinger equation with one spatial dimension, using group velocity considerations. Previously published absorbing boundary conditions will be shown to reduce to special cases of this absorbing boundary condition. The well-posedness of the initial boundary value problem of the absorbing boundary condition, coupled to the interior Schrödinger equation, will also be discussed. Extension of the general absorbing boundary condition to higher spatial dimensions will be demonstrated. Numerical simulations using initial single Gaussian, double Gaussian, and a narrow Gaussian pulse distributions will be given, with comparision to exact solutions, to demonstrate the reflectivity properties of various orders of the absorbing boundary condition.
A Parallel Algorithm to Evaluate Chebyshev Series on a Message Passing Environment
Authors: Roberto Barrio, Javier Sabadell
Venue: SIAM Journal on Scientific Computing (1999)

A simple parallel algorithm for the evaluation of polynomials written in the Chebyshev form is introduced. By this method only 2[log2 (p-2)] + [log2 p + 4 N/p] - 7 steps on p processors are needed to evaluate a Chebyshev series of degree N. Theoretical analysis of the efficiency is performed and some numerical examples on a CRAY T3D are shown.
Principal Component Analysis of Random Particles
Authors: Graham W. Horgan
Venue: Journal of Mathematical Imaging and Vision (2000)

Particles are random sets whose position and orientation are irrelevant. They are traditionally handled by calculating summaries of shape, such as compactness and elongation, or by defining landmarks, whose positions are then subject to statistical analysis. It would be advantageous in many applications if shape variability could be addressed without the need for landmarks. This paper proposes a way to do this. The first step is to define similarity/distance between shapes. This is done in terms of the area of non-overlap between them, when they have been brought into the closest possible alignment. The resulting distance matrix can then be treated by the methods of principal coordinate analysis. It is shown that this is equivalent to principal component analysis on the binary sets in R^2 defined as the regions within the shape outlines. The method is illustrated by application to a set of carrot outlines.
Scheduling data broadcast in asymmetric communication environments
Authors: Nitin H. Vaidya, Sohail Hameed
Venue: Wireless Networks (1999)

With the increasing popularity of portable wireless computers, mechanisms to efficiently transmit information to wireless clients are of significant interest. The environment under consideration is asymmetric in that the information server has much more bandwidth available, as compared to the clients. In such environments, often it is not possible (or not desirable) for the clients to send explicit requests to the server. It has been proposed that in such systems the server should broadcast the data periodically. One challenge in implementing this solution is to determine the schedule for broadcasting the data, such that the wait encountered by the clients is minimized. A broadcast schedule determines what is broadcast by the server and when. In this paper, we present algorithms for determining broadcast schedules that minimize the wait time. Broadcast scheduling algorithms for environments subject to errors, and systems where different clients may listen to different number of broadcast channels are also considered. Performance evaluation results are presented to demonstrate that our algorithms perform well.
Resource sharing in advance reservation agents
Authors: Olov Schelén, Stephen Pink
Venue: Journal of High Speed Networks (1998)

We present an architecture where clients can make end-to-end resource reservations through agents. For each domain in the network, there is an agent responsible for immediate and advance admission control. Reservations from different sources to the same destination domain are aggregated as their paths merge toward the destination. We show that network resources can be shared between immediate and advance reservations without being pre-partitioned. Admission control for immediate reservations use information about resources to be allocated for advance reservations in the near future. An important parameter in the admission control algorithm is the so called lookahead time, i.e., the point at which we actually start making resources available for approaching advance reservations by rejecting immediate requests. In our model, preemption of immediate reservations is made in cases where the admission control cannot make resources available through rejection of immediate requests. The risk of preemption can be varied by changing the lookahead time. We explore, with simulations, the effects of providing advance reservations with this model. The results show the cost in terms of resource utilization, rejection probability and preemption probability.
A Continuous-Time Model of AutoassociativeNeural Memories Utilizing the Noise-SubspaceDynamics
Authors: Seiichi Ozawa, Kazuyoshi Tsutsumi, Norio Baba
Venue: Neural Processing Letters (1999)

This paper presents a continuous-time model of Autoassociative Neural Memories (ANMs) which correspond to a modified version of pseudoinverse-type ANMs. This ANM model is derived from minimizing the energy function for a modular neural network. Through the eigendecomposition of the connection matrix, we show that the dynamical properties of the ANM are qualitatively different in the two state subspaces: a pattern-subspace and a noise-subspace. The proposed ANM has a distinctive feature in the noise-subspace dynamics. The size of basins of attraction can be varied by controlling the contribution of the noise-subspace dynamics to the whole network. The first simulation confirms this attractive feature. In the second simulation, we investigate the performance robustness of the ANM for several kinds of correlated pattern sets. These simulation results confirm the usefulness of the proposed ANM.
Attribute-based data dissemination for Internet applications
Authors: G. Robert Malan, Sushila Subramanian, Farnam Jahanian
Venue: Journal of High Speed Networks (1998)

The Salamander distribution system is a wide-area network data dissemination substrate that has been used daily for over a year by several groupware and webcasting Internet applications. Specifically, Salamander is designed to support push-based applications using attribute-based routing. This support provides a variety of delivery semantics ranging from collaborative group communication, used by the Upper Atmospheric Research Collaboratory (UARC) project, to basic data delivery, used by the Internet Performance Measurement and Analysis (IPMA) project. The substrate is designed to accommodate the large variation in Internet connectivity and client resources through the use of application-specific plug-in modules. This paper illustrates the architecture and design of the Salamander system driven by the needs of its set of current applications. The main architectural features described include colon; the attribute-based data routing mechanism, persistent data queries, negotiated push-technology, support for Application-level Quality of Service policies, and a lightweight temporal database.
SFT: a consistent checkpointing algorithm with shorter freezing time
Authors: Xiaohui Wei, Jiubin Ju
Venue: ACM SIGOPS Operating Systems Review (1998)

SFT algorithm, a consistent checkpointing algorithm with shorter freezing time, is presented in this paper. SFT is able to implement fault-tolerance in distributed systems. The features of the algorithm include shorter freezing time, lower overhead, and simple roll backing. To reduce checkpointing time, a special control message (Munblock) is used to ensure that at any given time a process can respond the checkpoint event quickly. Moreover, a main memory algorithm is used to improve concurrency of checkpointing. By using SFT algorithm, the freezing time resulted by checkpointing is less than 0.03s. The control message number of SFT is only O (n).
Why do fools fall into infinite loops: singing to your computer science class
Authors: Eric V. Siegel
Venue: ACM SIGCSE Bulletin (1999)

One effective way to introduce a dose of humanity, acknowledge the needs and struggles of CS1 students, and appeal to a broader range of learning styles is to present a computer science topic in an entertaining manner, e.g., with some form of artistic performance. In this paper, I describe three songs for CS1 that are designed to help students surmount three of the most difficult hurdles of that course. Empirical and anecdotal results demonstrate that the songs help students learn, and help them enjoy learning. These songs are a case study in entertainment; all instructors can find some way to entertain their class, and recordings of the songs themselves are available on the web for any instructor or student.
From browsing to interacting: DBMS support for responsive websites
Authors: Raghu Ramakrishnan
Venue: ACM SIGMOD Record (2000)

Internet websites increasingly rely on database management systems. There are several reasons for this trend: As sites grow larger, managing the content becomes impossible without the use of a DBMS to keep track of the nature, origin, authorship, and modification history of each article. As sites become more interactive, tracking and logging user activity and user contributions creates valuable new data, which again is best managed using a DBMS. The emerging paradigm of Customer-Centric e-Business places a premium on engaging users, building a relationship with them across visits, and leveraging their expertise and feed-back. Supporting this paradigm means that we not only have to track what users visit on a site, we also have to enable them to offer opinions and contribute to the content of the website in various ways; naturally, this requires us to use a DBMS. In order to personalize a user's experience, a site must dynamically construct (or at least fine-tune) each page as it is delivered, taking into account information about the user's past activity and the nature of the content on the current page. In other words, personalization is made possible by utilizing the information (about content and user activity) that we already indicated is best managed using a DBMS. In summary, as websites go beyond a passive collection of pages to be browsed and seek to present users with a personalized, interactive experience, the role of database management systems becomes central. In this talk, I will present an overview of these issues, including a discussion of related techniques such as cookies and web server logs for tracking user activity.
An asynchronous matrix-vector multiplier for discrete cosine transform
Authors: Kyeounsoo Kim, Peter A. Beerel, Youpyo Hong
Venue: Proceedings of the 2000 international symposium on Low power electronics and design (2000)

This paper proposes an efficient asynchronous hardwired matrix-vector multiplier for the rwo-dimensional discrete cosine transform and inverse discrete cosine transform (DCT/IDCT). The design achieves low power and high performance by taking advantage of the typically large fraction of zero and small-valued data in DCT and IDCT applications. In particular, it skips multiplication by zero and dynamically activates/deactivates required bit-slices of fine-grain bit-partitioned adders using simplified, static-logic-based speculative completion sensing. The results extracted by both bit-level analysis and HSPICE simulations indicate significant improvements compared to traditional designs.
Ellipsoidal Approximations of Convex Sets Based on the Volumetric Barrier
Authors: Michael Barrett, Geoff Walsham, John R. Doyle, K. M. Anstreicher
Venue: Mathematics of Operations Research (1999)

Let [math not displayed] be a convex set. We assume that ||x||infinity &#8804; 1 for all x &#949; C, and that C contains a ball of radius 1/R. For x &#949; Rn, r &#949; R, and B an n &#215; n symmetric positive definite matrix, let E(x, B, r) = {y|(y - x)T B(y - x)&#8804; r2}. A &#946;-rounding of C is an ellipsoid E(x, B, r) such that [math not displayed]. In the case that C is characterized by a separation oracle, it is well known that an O(n3/2)-rounding of C can be obtained using the shallow cut ellipsoid method in O(n3 ln(nR)) oracle calls. We show that a modification of the volumetric cutting plane method obtains an O(n3/2)-rounding of C in O(n2 ln(nR)) oracle calls. We also consider the problem of obtaining an O(n)-rounding of C when C has an explicit polyhedral description. Our analysis uses a new characterization of circumscribing ellipsoids centered at, or near, the volumetric center of a polyhedral set.
Fault-Tolerant Memory Architecture Against Radiation-Dependent Errors: A Mixed Error Control Approach
Authors: Octavian-Dumitru Mocanu, Joan Oliver
Venue: Journal of Electronic Testing: Theory and Applications (1999)

We present a high qualitative reconfigurability method for fault-tolerant memory systems against radiation influence on semiconductors. Its novelty lies in a joint failure repair mechanism. It uses a concurrent on-line technique based on asynchronous built-in current sensors (BICS), parity check and cold spare modules against electrical abnormal behaviour due to latch-up (LU), and the Hamming SEC code to counterattack single error upset (SEU), manifested in logical failures. Complete reliability computations, which underlie the proposed scheme, search for a 99.902% tolerance, thought to meet typical spatial irradiation conditions, to the cost of a small hardware overhead (2 spare (additional) 1K1 modules for each 1K16 of a memory system of 512K16, and Mean Time To Failure &equals; 10&minus;7 h&minus;1). Finally, as we envisage a 2.4 &mu;m CMOS implementation, we performed complexity estimations, which show that the supplementary self-tolerance ensuring circuitry involves an overhead of 0.0094% for a 512K16 memory. The recovering latency is minimised. For SEU in DRAM it requires zero latency and no more than the duration of an equivalent refresh cycle in SRAM. LU reflects a locality property, as only the affected module is submitted to the recovering algorithm.
(Almost) optimal parallel block access to range queries
Authors: Mikhail J. Atallah, Sunil Prabhakar
Venue: Proceedings of the nineteenth ACM SIGMOD-SIGACT-SIGART symposium on Principles of database systems (2000)

This guarantee is true for any number of dimensions. Subsequent to this work, Bhatia et al. [4] have proved that such a performance bound is essentially optimal for this kind of scheme, and have also extended our results to the case where the number of disks is a product of the form &kgr;1 * &kgr;2 * &hellip; * &kgr;t where the &kgr;ts need not all be 2.