ppxscal/embedding_network huggingface dataset:
Conservative pretty printing
Authors: Martin Ruckert
Venue: ACM SIGPLAN Notices (1997)

The main purpose of the pretty printing tool, presented here, is not so much the complete reformating of a program but is described better as finding and correcting formating errors.A set of relations is given describing the proper alignment of a piece of code in accordance with its syntactic structure. It is complemented by a simple algorithm to change any given source code to satisfy these relations.The relations are flexible enough to allow a variety of different formating styles while rejecting formating errors, i.e. code that is not formated according to its syntactic structure.Various examples illustrate the ideas, the problems, the goals, and the achievements.
Hierarchical test generation and design for testability of ASPPs and ASIPs
Authors: Indradeep Ghosh, Anand Raghunathan, Niraj K. Jha
Venue: Proceedings of the 34th annual Design Automation Conference (1997)

In this paper, we present design for testability (DFT) and hierarchicaltest generation techniques for facilitating the testingof application-specific programmable processors (ASPPs) andapplication-specific instruction processors (ASIPs). The methodutilizes the register transfer level (RTL) circuit description of anASPP or ASIP and tries to generate a set of test microcode patternswhich can be written into the instruction read-only memory(ROM) of the processor. These lines of microcode dictate a newcontrol/data flow in the circuit and can be used to test moduleswhich are not easily testable. The new control/data flow is used tojustify precomputed test sets of a module from the system primaryinputs to the module inputs and propagate output responses fromthe module output to the system primary outputs. If the derived testmicrocode cannot test all untested modules in the circuit, then testmultiplexers are added to the data path to test these modules andthus testability of all modules is guaranteed. This scheme has theadvantages of low area and delay overheads (average of 3.1% and0.4% respectively), high fault coverage (>99.6% for all cases) andat-speed testing. Test generation times are about three orders ofmagnitude smaller than an efficient gate-level sequential test generator.Only one external test pin is required for the DFT method.
Three Systems for Threshold Generation of Authenticators
Authors: R. Safavi-Naini
Venue: Designs, Codes and Cryptography (1998)

An authentication system with shared generation of authenticators is a system in which construction of an authentic codeword requires collaboration of an authorised group of transmitters. We propose three systems for threshold generation of authenticators that provide unconditional security and in two cases protection extends over multiple message transmissions. We describe the constructions and prove their security properties.
Factors that Impact Implementing a System Development Methodology
Authors: Tom L. Roberts,  Jr., Michael L. Gibson, Kent T. Fields, R. Kelly Rainer,  Jr.
Venue: IEEE Transactions on Software Engineering (1998)

This paper presents the findings of empirical research from 61 companies, mostly from the United States, to identify the factors that may impact implementation of a system development methodology (SDM). The study uses a survey instrument to identify the SDM implementation factors. The survey focused on the perspective of the primary constituents: functional managers, information systems managers, system personnel, and external consultants. The study uses an exploratory factor analysis that identifies five factors important to implementing an SDM: organizational SDM transition, functional management involvement/support, SDM transition, the use of models, and external support. The research findings have important implications for further research and the practice of system development. For researchers, it points to important measures in the implementation and use of SDMs that may be further verified and extended in subsequent research. For practitioners, it provides a general guide to the important aspects to consider in the implementation and use of an SDM.
Distributed simulation (panel)
Venue: Proceedings of the 17th conference on Winter simulation (1985)

Distributed simulation involves the simulation of some physical process in a distributed manner over a network of tightly coupled processors so that during execution different parts of the model execute in parallel. For discrete models this means that the internal support structure of the language/operating system must be altered to handle the control and synchronization of the distributed parts of the model. Simulated time has to be encoded and included with messages between the processors in order to facilitate this process. The major issues in distributed simulation of discrete systems include the establishment of accurate and efficient communication protocols, the detection and resolution of deadlock among the processes, language and hardware architectures to support the distributed processing, and mechanisms for partitioning models for distributed simulation. A panel of leading researchers in this area will discuss their current work in distributed simulation. In particular we will consider: What is the current status of work in distributed simulation? What advantages does distributed simulation offer? What are the current problems still requiring research? What is the impact of this area on simulation? In addition to response from the panel we hope to stimulate discussion among those attending the session.
Programming language semantics: the description of computational structures
Authors: Jon G. Riecke
Venue: ACM SIGPLAN Notices (1997)

Programming language semantics focuses on the structure of computation rather than the computability of functions. We review some key ideas in semantics and describe future directions.
Software unit test coverage and adequacy
Authors: Hong Zhu, Patrick A. V. Hall, John H. R. May
Venue: ACM Computing Surveys (CSUR) (1997)

Objective measurement of test quality is one of the key issues in software testing. It has been a major research focus for the last two decades. Many test criteria have been proposed and studied for this purpose. Various kinds of rationales have been presented in support of one criterion or another. We survey the research work in this area. The notion of adequacy criteria is examined together with its role in software dynamic testing. A review of criteria classification is followed by a summary of the methods for comparison and assessment of criteria.
Multistep Numerical Methods Based on the Scheifele G-Functions with Application to Satellite Dynamics
Authors: Pablo Martín, José M. Ferrándiz
Venue: SIAM Journal on Numerical Analysis (1997)

In 1971 Scheifele designed a method for the integration of perturbed oscillators by refining the classical method of power series. This method consists of defining a certain sequence of entire functions and finding the sought solution in the form of a linear combination of them using coefficients obtained through recurrence formulas. In spite of the good behavior of the Scheifele method, it is only practical for use in a few particular cases, in which the force function is very simple, given the complexity of the preliminary calculations needed to obtain the recurrence formulas. This problem is resolved in this article by converting the G-functions method into a multistep scheme. The key property is that those algorithms are able to integrate, without truncation error, harmonic oscillators involving various frequencies, and that, for perturbed problems, the local error contains the (small) perturbation parameter as a factor. Therefore, the methods are useful for finding highly accurate solutions to problems whose solutions are close to quasi-periodic ones. An application is performed in investigating the behavior of the proposed schemes for the integration of the orbital motion of Earth satellites.
Design of Neural Networks Based on Wave-Parallel ComputingTechnique
Authors: Yasushi Yuminaka, Yoshisato Sasaki, Takafumi Aoki, Tatsuo Higuchi
Venue: Analog Integrated Circuits and Signal Processing (1998)

A Wave-Parallel Computing (WPC) technique is proposed to address the interconnection problem in massively-parallel analog hardware required for implementing neural networks. The fundamental concepts are the frequency multiplexing of signals on a single line, and their wave-parallel processing without decomposition. This paper discusses the realization of a Hopfield-type massively-connected neural network, and shows that the WPC-based network exhibits much lower topological complexity compared with the original network. We also investigate the possible implementation of WPC using the present MOS technology, and discuss the performance evaluation in terms of the degree of multiplexing and the processing speed.
Stability and Convergence of a Finite Element Method for Reactive Transport in Ground Water
Authors: Zhangxin Chen, Richard E. Ewing
Venue: SIAM Journal on Numerical Analysis (1997)

An explicit finite element method is used to solve the linear convection--diffusion-reaction equations governing contaminant transport in ground water flowing through an adsorbing porous medium. The use of discontinuous finite elements for the convective part of the equations combined with mixed finite elements for the diffusive part renders the method for the concentration solution, which displays strong gradients, trivially conservative and fully parallelizable. We carry out a stability and convergence analysis. In particular, the method is proven to satisfy a maximum principle, to be total variation bounded, and to converge to the unique weak solution of the equations. Special attention is paid to the convective part of the equations. Numerical simulations are presented and discussed.
Event propagation conditions in circuit delay computation
Authors: Hakan Yalcin, John P. Hayes
Venue: ACM Transactions on Design Automation of Electronic Systems (TODAES) (1997)

Accurate and efficient computation of delays is a central problem in computer-aided design of complex VLSI circuits. Delays are determined by events (signal transitions) propagated from the inputs of a circuit to its outputs, so precise characterization of event propagation is required for accurate delay computation. Although many different propagation conditions (PCs) have been proposed for delay computation, their properties and relationships have been far from clear. We present a systematic analysis of delay computation based on a series of waveform models that capture signal behavior rigorously at different levels of details. The most general model, called the exact of W0 model, specifies each event occurring in a circuit signal. A novel method is presented that generates approximate waveforms by progressively eliminating signal values from the exact model. For each waveform model, we drive the PCs that correctly capture the requirements under which an event propagates along a path. The waveform models and their PCs are shown to form a well-defined hierarchy, which provides a means to trade accuracy for computational effort. The relationships among the derived PCs and existing ones are analyzed in depth. It is proven that though many PCs, such as the popular floating mode condition, produce a correct upper bound on the circuit delay, they can fail to recognize event propagation in some instances. This analysis further enables us to derive new and useful PCs. We describe such a PC, called safe static. Experimental results demonstrate that safe static provides an excellent accuracy/efficiency tradeoff.
SWITTEST: automatic switch-level fault simulation and test evaluation of switched-capacitor systems
Authors: S. Mir, A. Rueda, T. Olbrich, E. Peralías, J. L. Huertas
Venue: Proceedings of the 34th annual Design Automation Conference (1997)

A tool for the switch-level fault simulation and test evaluationof switched-capacitor systems is presented. Time or frequency-domainfault simulations with SWITCAP and time-domain faultsimulations with HSPICE can be performed. Adequate fault modelsare presented for both simulators. The tool has proven to bevery useful in the early evaluation of test strategies, providing similarresults to those obtained at the transistor-level.
The Turing factorization of a rectangular matrix
Authors: R. M. Corless, D. J. Jeffrey
Venue: ACM SIGSAM Bulletin (1997)

The Turing factorization is a generalization of the standard LU factoring of a square matrix. Among other advantages, it allows us to meet demands that arise in a symbolic context. For a rectangular matrix A, the generalized factors are written PA = LDU R, where R is the row-echelon form of A. For matrices with symbolic entries, the LDU R factoring is superior to the standard reduction to row-echelon form, because special case information can be recorded in a natural way. Special interest attaches to the continuity properties of the factors, and it is shown that conditions for discontinuous behaviour can be given using the factor D. We show that this is important, for example, in computing the Moore-Penrose inverse of a matrix containing symbolic entries.We also give a separate generalization of LU factoring to fraction-free Gaussian elimination.
The Collinearity Graph of the O^-(8,2) QuadricIs Not Geometrisable
Authors: Pratima Panigrahi
Venue: Designs, Codes and Cryptography (1998)

The result of the title was conjectured by F. De Clerck and V. D. Tonchev (Partial geometries and Quadrics, Sankhya, special volume 54 (1992), 137&ndash;145). We prove it here.
WebWork: METEOR_2&lsquo;s Web-Based Workflow Management System
Authors: John A. Miller, Devanand Palaniswami, Amit P. Sheth, Krys J. Kochut, Harvinder Singh
Venue: Journal of Intelligent Information Systems (1998)

METEOR_2 workflow management systems consist of both (1) design/build-time and (2) run-time/enactment components for implementing workflow applications. An enactment system provides the command, communication and control for the individual tasks in the workflow. Tasks are the run-time instances of intra- or inter-enterprise applications. We are developing three implementations of the METEOR_2 model: WebWork, OrbWork and NeoWork. This paper discusses WebWork, an implementation relying solely on Web technology as the infrastructure for the enactment system. WebWork supports a distributed implementation with participation of multiple Web servers. It also supports automatic code generation of workflow applications from design specifications produced by a comprehensive graphical designer. WebWork has been developed as a complement of its more heavyweight counterparts (OrbWork and NeoWork), with the goal of providing ease of workflow application development, installation, use and maintenance. At the time of this writing, WebWork has been installed by several of the LSDIS Lab&lsquo;s industrial partners for testing, evaluation and building workflow applications.
Model development and HCI
Authors: Mike Pidd
Venue: Proceedings of the 28th conference on Winter simulation (1996)

Much of the progress within discrete simulation has gone hand-in-hand with general developments in computing. Recent years have seen software developers putting great efforts into improving the user interfaces of discrete simulation systems. This too parallels developments elsewhere. This paper considers what further benefits there might be for users and developers of simulation software from more careful attention to interface design.
Management of personnel policies to increase the stability of Patriot crew members and their families: a simulation approach
Authors: Michael J. Kwinn,  Jr., Robert G. Phelan,  Jr.
Venue: Proceedings of the 28th conference on Winter simulation (1996)

The overwhelming success of the Patriot Air Defense weapon system during Operation Desert Storm has become a double edge sword for the system's enlisted crew members and their families. During the war, the Patriot system became the first proven means of defending against Tactical Ballistic Missile (TBM) attacks. The people and the governments of Israel, Saudi Arabia and the United States praised the Patriot crew members as true heroes. Unfortunately for the Patriot crew members, their success also meant that every country wanted the protection that the system offered. A battalion is now permanently stationed in Korea. Another battalion rotates every six months to Saudi Arabia. The increased number of deployments of the system and the crew members has had a dramatically negative impact on morale, retention and recruitment of Patriot crew members. In this paper, we present a simulation model which allows a personnel manager to vary personnel policies effecting Patriot crew members to determine the impact on the number and frequency of deployments and on unit readiness.
On Photometric Issues in 3D Visual Recognition from aSingle 2D Image
Authors: Amnon Shashua
Venue: International Journal of Computer Vision (1997)

We describe the problem of recognition under changing illumination conditions and changing viewing positions from a computational and human vision perspective. On the computational side we focus on the mathematical problems of creating an equivalence class for images of the same 3D object undergoing certain groups of transformations&mdash;mostly those due to changing illumination, and briefly discuss those due to changing viewing positions. The computational treatment culminates in proposing a simple scheme for recognizing, via alignment, an image of a familiar object taken from a novel viewing position and a novel illumination condition. On the human vision aspect, the paper is motivated by empirical evidence inspired by Mooney images of faces that suggest a relatively high level of visual processing is involved in compensating for photometric sources of variability, and furthermore, that certain limitations on the admissible representations of image information may exist. The psychophysical observations and the computational results that follow agree in several important respects, such as the same (apparent) limitations on image representations.
Variance reduction applied to product form multiclass queuing networks
Authors: Bruno Tuffin
Venue: ACM Transactions on Modeling and Computer Simulation (TOMACS) (1997)

Performance of product-form multiclass queuing networks can be determined from normalization constants. For large models, the evaluation of these performance metrics is not possible because of the required amount of computer resources (either by using normalization constants or by using MVA approaches). Such large models can be evaluated with Monte Carlo summation and integration methods. This article proposes two cluster sampling Monte Carlo techniques to deal with such models. First, for a particular type of network, we propose a variance reduction technique based on antithetic variates. It leads to an improvement of Ross, Tsang and Wang's algorithm which is designed to analyze the same family of models. Second, for a more general class of models, we use a mixture of Monte Carlo and quasi-Monte Carlo methods to improve the estimate with respect to Monte Carlo alone.
Obstructions For 2-Möbius Band Embedding Extension Problem
Authors: Martin Juvan, Bojan Mohar
Venue: SIAM Journal on Discrete Mathematics (1997)

Let $K=C\cup e_1\cup e_2$ be a subgraph of G consisting of a cycle C and disjoint paths e1 and e2 connecting two interlacing pairs of vertices in C. Suppose that K is embedded in the Möbius band in such a way that C lies on its boundary. An algorithm is presented which in linear time extends the embedding of K to an embedding of G, if such an extension is possible, or finds a "nice" obstruction for such embedding extensions. The structure of obtained obstructions is also analyzed in detail.
Clique r-Domination and Clique r-Packing Problems on Dually Chordal Graphs
Authors: Andreas Brandstädt, Victor D. Chepoi, Feodor F. Dragan
Venue: SIAM Journal on Discrete Mathematics (1997)

Let $\cal C$ be a family of cliques of a graph G=(V,E). Suppose that each clique C of $\cal C$ is associated with an integer r(C)$, where $r(C) \ge 0$. A vertex v r-dominates a clique C of G if $d(v,x) \le r(C)$ for all $x \in C$, where d(v,x) is the standard graph distance. A subset $D \subseteq V$ is a clique r-dominating set of G if for every clique $C \in \cal C$ there is a vertex $u \in D$ which r-dominates C. A clique r-packing set is a subset $P \subseteq \cal C$ such that there are no two distinct cliques $C',C''\in P$ $r$-dominated by a common vertex of G. The clique r-domination problem is to find a clique r-dominating set with minimum size and the clique r-packing problem is to find a clique r-packing set with maximum size. The formulated problems include many domination and clique-transversal-related problems as special cases. In this paper an efficient algorithm is proposed for solving these problems on dually chordal graphs which are a natural generalization of strongly chordal graphs. The efficient algorithm is mainly based on the tree structure and special vertex elimination orderings of dually chordal graphs. In some important particular cases where the algorithm works in linear time the obtained results generalize and improve known results on strongly chordal graphs.
A New Design Method for Self-Checking Unidirectional Combinational Circuits
Authors: V. V. Saposhnikov, A. Morosov, Vl. V. Saposhnikov, M. Gössel
Venue: Journal of Electronic Testing: Theory and Applications (1998)

In this paper, a new method for the design of unidirectional combinational circuits is proposed. Carefully selected non-unidirectional gates of the original circuit are duplicated such that every single gate fault can only be propagated to the circuit outputs on paths with either an even or an odd number of inverters. Unlike previous methods, it is not necessary to localize all the inverters of the circuit at the primary inputs. The average area over head for the described method of circuit transformation is 16% of the original circuit, which is less than half of the area overhead of other known methods. The transformed circuits are monitored by Berger codes, or by the least significant two bits of a Berger code. All single stuck-at faults are detected by the method proposed.
Automatic verification of pointer programs using monadic second-order logic
Authors: Jakob L. Jensen, Michael E. Jørgensen, Michael I. Schwartzbach, Nils Klarlund
Venue: Proceedings of the ACM SIGPLAN 1997 conference on Programming language design and implementation (1997)

We present a technique for automatic verification of pointer programs based on a decision procedure for the monadic second-order logic on finite strings.We are concerned with a while-fragment of Pascal, which includes recursively-defined pointer structures but excludes pointer arithmetic.We define a logic of stores with interesting basic predicates such as pointer equality, tests for nil pointers, and garbage cells, as well as reachability along pointers.We present a complete decision procedure for Hoare triples based on this logic over loop-free code. Combined with explicit loop invariants, the decision procedure allows us to answer surprisingly detailed questions about small but non-trivial programs. If a program fails to satisfy a certain property, then we can automatically supply an initial store that provides a counterexample.Our technique had been fully and efficiently implemented for linear linked lists, and it extends in principle to tree structures. The resulting system can be used to verify extensive properties of smaller pointer programs and could be particularly useful in a teaching environment.