ppxscal/embedding_network huggingface dataset:
A Unified Framework for the Performability Evaluation of Fault-Tolerant Computer Systems
Authors: K. R. Pattipati, Y. Li, H. A. P. Blom
Venue: IEEE Transactions on Computers (1993)

The problem of evaluating the performability density and distribution of degradable computer systems is considered. A generalized model of performability is considered, wherein the dynamics of configuration modes are modeled as a nonhomogeneous Markov process, and the performance rate in each configuration mode can be time dependent. The key to the development of a unifying mathematical framework is the introduction of two related performability processes: the forward performability process over the interval (0,t), and the performability-to-go process over the interval (t,T), where T is the mission time. Stochastic differential equations techniques show that the joint density of the forward performability and configuration states satisfies a linear, hyperbolic partial differential equation (PDE) with time-dependent coefficients that runs forward in time, while the performability-to-go process satisfies an adjoint PDE running reverse in time. A numerical method for solving the PDEs is presented and is illustrated with examples.
Limited Computational Ability and Approximation of Dynamical Systems
Authors: Domenico Colucci
Venue: Computational Economics (2001)

This paper addresses problems due to approximation of dynamical systems. The approach presented here is based on the notion of the shadowing property of a dynamical system and on the use of pseudotrajectories to approximate true orbits. In particular, specific results in the case of attractors and the notion of generalized shadowing are reviewed. The evidence described may be relevant for a wide range of economic models, whenever agents that have limited computational ability, such as agents relying on digital computers, are concerned. The final section presents two sample applications to economic models.
Orthogonal RBF Neural Network Approximation
Authors: Péter András
Venue: Neural Processing Letters (1999)

The approximation properties of the RBF neural networks are investigated in this paper. A new approach is proposed, which is based on approximations with orthogonal combinations of functions. An orthogonalization framework is presented for the Gaussian basis functions. It is shown how to use this framework to design efficient neural networks. Using this method we can estimate the necessary number of the hidden nodes, and we can evaluate how appropriate the use of the Gaussian RBF networks is for the approximation of a given function.
A Hybrid Index Technique for Power Efficient Data Broadcast
Authors: Qinglong Hu, Wang-Chien Lee, Dik Lun Lee
Venue: Distributed and Parallel Databases (2001)

The intention of power conservative indexing techniques for wireless data broadcast is to reduce mobile client tune-in time while maintaining an acceptable data access time. In this paper, we investigate indexing techniques based on index trees and signatures for data disseminated on a broadcast channel. Moreover, a hybrid indexing method combining strengths of the signature and the index tree techniques is proposed. Different from previous studies, our research takes into consideration of two important data organization factors, namely, clustering and scheduling. Cost models for the three indexing methods are derived for various data organization accommodating these two factors. Based on our analytical comparisons, the signature and the hybrid indexing techniques are the best choices for power conservative indexing of various data organization on wireless broadcast channels.
Scalable alignment of large-format multi-projector displays using camera homography trees
Authors: Han Chen, Rahul Sukthankar, Grant Wallace, Kai Li
Venue: Proceedings of the conference on Visualization '02 (2002)

This paper presents a vision-based geometric alignment system for aligning the projectors in an arbitrarily large display wall. Existing algorithms typically rely on a single camera view and degrade in accuracy1 as the display resolution exceeds the camera resolution by several orders of magnitude. Na&iuml;ve approaches to integrating multiple zoomed camera views fail since small errors in aligning adjacent views propagate quickly over the display surface to create glaring discontinuities. Our algorithm builds and refines a camera homography2 tree to automatically register any number of uncalibrated camera images; the resulting system is both faster and significantly more accurate than competing approaches, reliably achieving alignment errors of 0.55 pixels on a 24-projector display in under 9 minutes. Detailed experiments compare our system to two recent display wall alignment algorithms, both on our 18 Megapixel display wall and in simulation. These results indicate that our approach achieves sub-pixel accuracy even on displays with hundreds of projectors.
Performance Analysis of Three Text-Join Algorithms
Authors: Weiyi Meng, Clement Yu, Wei Wang, Naphtali Rishe
Venue: IEEE Transactions on Knowledge and Data Engineering (1998)

When a multidatabase system contains textual database systems (i.e., information retrieval systems), queries against the global schema of the multidatabase system may contain a new type of joins¿joins between attributes of textual type. Three algorithms for processing such a type of joins are presented and their I/O costs are analyzed in this paper. Since such a type of joins often involves document collections of very large size, it is very important to find efficient algorithms to process them. The three algorithms differ on whether the documents themselves or the inverted files on the documents are used to process the join. Our analysis and the simulation results indicate that the relative performance of these algorithms depends on the input document collections, system characteristics, and the input query. For each algorithm, the type of input document collections with which the algorithm is likely to perform well is identified. An integrated algorithm that automatically selects the best algorithm to use is also proposed.
Dynamic Taxonomies: A Model for Large Information Bases
Authors: Giovanni M. Sacco
Venue: IEEE Transactions on Knowledge and Data Engineering (2000)

A new taxonomic model for structuring and accessing large heterogeneous information bases is presented. The model is designed to simplify both classification and access by computer-illiterate people. It defines simple and intuitive operations to access large information bases at the conceptual level and at different levels of abstraction, in a totally assisted way, through a simple, yet effective visual interface. The model can also be used to summarize result sets computed by other query methods, such as information retrieval, shape retrieval, etc., and to provide user maps for complex hypermedia networks. The experience gained by applying this model to commercial applications is reported.
Synchrony, stability, and firing patterns in pulse-coupled oscillators
Authors: Pranay Goel, Bard Ermentrout
Venue: Physica D (2002)

We study non-trivial firing patterns in small assemblies of pulse-coupled oscillatory maps. We find conditions for the existence of waves in rings of coupled maps that are coupled bi-directionally. We also find conditions for stable synchrony in general all-to-all coupled oscillators. Surprisingly, we find that for maps that are derived from physiological data, the stability of synchrony depends on the number of oscillators. We describe rotating waves in two-dimensional lattices of maps and reduce their existence to a reduced system of algebraic equations which are solved numerically.
Spanning graphs of hypercubes: starlike and double starlike trees
Authors: Mohamed Kobeissi, Michel Mollard
Venue: Discrete Mathematics (2002)

The aim of this paper is to prove that certain trees are spanning trees of the hypercube Qn. We introduce a new family of graphs which span hypercubes and we characterize the double starlike trees with maximum degree up to six that span a hypercube. We conclude by some open problems about spanning graphs and partitioning the hypercube into vertex-disjoint cycles of even lengths.
Information Architecture: Basis and Future of CADD
Authors: Gerhard Schmitt
Venue:  (1999)

:At present, the computer serves mainly either to transfer and improve concepts that already exist or to build more quickly and effectively. Its potential as a knowledge base for architecture has still not been fully explored. Gerhard Schmitt intends to illustrate a number of aspects of this new territory and to demonstrate how the pool of information accumulated in the data bases could be exploited and elaborated as the "fifth dimension" of architecture.
Justification for Inclusion Dependency Normal Form
Authors: Mark Levene, Millist W. Vincent
Venue: IEEE Transactions on Knowledge and Data Engineering (2000)

Functional dependencies (FDs) and inclusion dependencies (INDs) are the most fundamental integrity constraints that arise in practice in relational databases. In this paper, we address the issue of normalization in the presence of FDs and INDs and, in particular, the semantic justification for Inclusion Dependency Normal Form (IDNF), a normal form which combines Boyce-Codd normal form with the restriction on the INDs that they be noncircular and key-based. We motivate and formalize three goals of database design in the presence of FDs and INDs: noninteraction between FDs and INDs, elimination of redundancy and update anomalies, and preservation of entity integrity. We show that, as for FDs, in the presence of INDs being free of redundancy is equivalent to being free of update anomalies. Then, for each of these properties, we derive equivalent syntactic conditions on the database design. Individually, each of these syntactic conditions is weaker than IDNF and the restriction that an FD not be embedded in the righthand side of an IND is common to three of the conditions. However, we also show that, for these three goals of database design to be satisfied simultaneously, IDNF is both a necessary and sufficient condition.
The Total Error in Calculating Linear Mathematical Models by Iterative Methods
Authors: A. N. Khimich, M. F. Yakovlev
Venue: Cybernetics and Systems Analysis (2002)

Estimates are derived for the total error in solving linear algebraic systems, including non-consistent ones, by one- and two-step iterative methods, with input data being approximate. Criteria for terminating iterative processes are constructed providing a given accuracy of the solution.
Hypothesis Testing: A Framework for Analyzing and Optimizing Hough Transform Performance
Authors: J. Princen, J. Illingowrth, J. Kittler
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1994)

In this paper a formal, quantitative approach to designing optimum Hough transform (HT) algorithms is proposed. This approach takes the view that a HT is a hypothesis testing method. Each sample in the HT array implements a test to determine whether a curve with the given parameters fits the edge point data. This view allows the performance of HT algorithms to be quantified. The power function, which gives the probability of rejection as a function of the underlying parametric distribution of data points, is shown to be the fundamentally important characteristic of HT behaviour. Attempting to make the power function narrow is a formal approach to optimizing HT performance. To illustrate how this framework is useful the particular problem of line detection is discussed in detail. It is shown that the hypothesis testing framework leads to a redefinition of the HT in which the values are a measure of the distribution of points around a curve rather than the number of points on a curve. This change dramatically improves the sensitivity of the method to small structures. The solution to many HT design problems can be posed within the framework, including optimal quantizations and optimum sampling of the parameter space. In this paper the authors consider the design of optimum I-D filters, which can be used to sharpen the peak structure in parameter space. Results on several real images illustrate the improvements obtained.
On the Efficient Allocation of Resources for Hypothesis Evaluation: A Statistical Approach
Authors: Steve Chien, Jonathan Gratch, Michael Burl
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1995)

This paper considers the decision-making problem of selecting a strategy from a set of alternatives on the basis of incomplete information (e.g., a finite number of observations). At any time the system can adopt a particular strategy or decide to gather additional information at some cost. Balancing the expected utility of the new information against the cost of acquiring the information is the central problem we address. In our approach, the cost and utility of applying a particular strategy to a given problem are represented as random variables from a parametric distribution. By observing the performance of each strategy on a randomly selected sample of problems, we can use parameter estimation techniques to infer statistical models of performance on the general population of problems. These models can then be used to estimate: 1) the utility and cost of acquiring additional information and 2) the desirability of selecting a particular strategy from a set of choices. Empirical results are presented that demonstrate the effectiveness of the hypothesis evaluation techniques for tuning system parameters in a NASA antenna scheduling application.
A non-collision hash trie-tree based fast IP classification algorithm
Authors: Xu Ke, Wu Jianping, Yu Zhongchao, Xu Mingwei
Venue: Journal of Computer Science and Technology (2002)

With the development of network applications, routers must support such functions as firewalls, provision of QoS, traffic billing, etc. All these functions need the classification of IP packets, according to how different the packets are processed subsequently, which is determined. In this article, a novel IP classification algorithm is proposed based on the Grid of Tries algorithm. The new algorithm not only eliminates original limitations in the case of multiple fields but also shows better performance in regard to both time and space. It has better overall performance than many other algorithms.
ATLAS I: Implementing a Single-Chip ATM Switch with Backpressure
Authors: Georgios Kornaros, Dionisios Pnevmatikatos, Panagiota Vatsolaki, Georgios Kalokerinos, Chara Xanthaki, Dimitrios Mavroidis, Dimitrios Serpanos, Manolis Katevenis
Venue: IEEE Micro (1999)

ATLAS I is a single-chip ATM switch with 10 Gb/s throughput, a shared buffer, 3 priority levels, multicasting, load monitoring, and optional credit-based flow control. It is a 6-million-transistor chip in 0.35-micron CMOS technology. We present here its implementation; we report on the design complexity and silicon cost of the chip and of the individual functions that it supports. Based on these metrics, we evaluate the architecture of the switch. The evaluation points in the direction of increasing the cell buffer size and dropping VP/VC translation, while other possible modifications are also discussed. The cost of credit support (10% in chip area and 4% in chip power) is minuscule compared to its benefits, i.e. compared to what alternative architectures have to pay in order to achieve comparable performance levels.
As We May Read: The Reading Appliance Revolution
Authors: Bill N. Schilit, Morgan N. Price, Gene Golovchinsky, Kei Tanaka, Catherine C. Marshall
Venue: Computer (1999)

In the 1970s, Alan Kay and his colleagues at Xerox PARC envisioned a dynamic, interactive electronic book. Now, nearly 30 years later, that vision has become a reality. A new kind of personal information appliance-the reading appliance- is emerging as a tool for serious readers. But is the world ready for reading appliances? These appliances are indeed viable, say the authors of this article. Advances in mobile hardware have made it possible to build the necessary hardware. Additionally, the Web has created a market for online reading by introducing millions of people to it, and books, magazines, newspapers, advertisements, and other printed matter can be produced and read at very low cost. Network-based digital libraries increase the availability of information, but people still tend to print the documents to work with them. Electronic book and document readers will neither replace paper nor will they replace desk-top computers. Instead, they will occupy their own unique and valuable role in our lives, bringing the paper and computer worlds closer together.
Designing for a Gigahertz
Authors: H. Peter Hofstee, Sang H. Dhong, David Meltzer, Kevin J. Nowka, Joel A. Silberman, Jeffrey L. Burns, Stephen D. Posluszny, Osamu Takahashi
Venue: IEEE Micro (1998)

At the ISSCC98 conference the IBM Austin Research Laboratory presented an experimental 64-bit integer processor; guTS (GigaHertz unit Test Site). The goal of the guTS project was to demonstrate that circuit techniques, and circuit-centric design, could significantly increase the performance of microprocessors, thus providing headroom for future performance growth beyond contributions from microarchitecture and CMOS technology. The processor is a full-custom, nearly 100% dynamic design. Starting with a circuit family and a few components we went from high-level design to tapeout in half a year. About 16 designers participated, several part-time only. guTS implements 96 instructions from the integer subset of the PowerPC instruction set architecture, and covers in excess of 90% of instructions executed in typical code. Address translation, floating-point, and I/O related instructions are omitted. guTS is a single-issue core. All instructions, including loads and stores, execute in a single cycle. The focus of this article is on the circuit-centric design approach that enabled the GigaHertz result. We explain how design was done "vertically" rather than "horizontally", creating room for the "tall" designer that can operate across the boundaries of microarchitecture, logic-, circuit-, and physical design. We also explain why developments in CMOS technology increasingly favor this approach. We give an example of a circuit-centric vertically-integrated solution for both a problem in the control and a problem in the dataflow. We discuss how we created the design interfaces necessary to pursue aggressive circuits and we explain our choice of circuit families. We briefly discuss two chip integration issues that further challenge the way microprocessor designs are commonly partitioned.
SEAM: A State-Entity-Activity-Model for a Well-Defined Workflow Development Methodology
Authors: A. Bajaj, S. Ram
Venue: IEEE Transactions on Knowledge and Data Engineering (2002)

Current conceptual workflow models use either informally defined conceptual models or several formally defined conceptual models that capture different aspects of the workflow, e.g., the data, process, and organizational aspects of the workflow. To the best of our knowledge, there are no algorithms that can amalgamate these models to yield a single view of reality. A fragmented conceptual view is useful for systems analysis and documentation. However, it fails to realize the potential of conceptual models to provide a convenient interface to automate the design and management of workflows. First, as a step toward accomplishing this objective, we propose SEAM (State-Entity-Activity-Model), a conceptual workflow model defined in terms of set theory. Second, no attempt has been made, to the best of our knowledge, to incorporate time into a conceptual workflow model. SEAM incorporates the temporal aspect of workflows. Third, we apply SEAM to a real-life organizational unit's workflows. In this work, we show a subset of the workflows modeled for this organization using SEAM. We also demonstrate, via a prototype application, how the SEAM schema can be implemented on a relational database management system. We present the lessons we learned about the advantages obtained for the organization and, for developers who choose to use SEAM, we also present potential pitfalls in using the SEAM methodology to build workflow systems on relational platforms. The information contained in this work is sufficient enough to allow application developers to utilize SEAM as a methodology to analyze, design, and construct workflow applications on current relational database management systems. The definition of SEAM as a context-free grammar, definition of its semantics, and its mapping to relational platforms should be sufficient also, to allow the construction of an automated workflow design and construction tool with SEAM as the user interface.
Invariant inference for static checking: an empirical evaluation
Authors: Jeremy W. Nimmer, Michael D. Ernst
Venue: ACM SIGSOFT Software Engineering Notes (2002)

Static checking can verify the absence of errors in a program, but often requires written annotations or specifications. As a result, static checking can be difficult to use effectively: it can be difficult to determine a specification and tedious to annotate programs. Automated tools that aid the annotation process can decrease the cost of static checking and enable it to be more widely used.This paper describes an evaluation of the effectiveness of two techniques, one static and one dynamic, to assist the annotation process. We quantitatively and qualitatively evaluate 41 programmers using ESC/Java in a program verification task over three small programs, using Houdini for static inference and Daikon for dynamic inference. We also investigate the effect of unsoundness in the dynamic analysis.Statistically significant results show that both inference tools improve task completion; Daikon enables users to express more correct invariants; unsoundness of the dynamic analysis is little hindrance to users; and users imperfectly exploit Houdini. Interviews indicate that beginning users found Daikon to be helpful; Houdini to be neutral; static checking to be of potential practical use; and both assistance tools to have unique benefits.Our observations not only provide a critical evaluation of these two techniques, but also highlight important considerations for creating future assistance tools.
Criss-Cross Hash Joins: Design and Analysis
Authors: Ram D. Gopal, R. Ramesh, Stanley Zionts
Venue: IEEE Transactions on Knowledge and Data Engineering (2001)

Join processing in relational database systems continues to be a difficult and challenging problem. In this research, we propose a criss-cross hash join strategy that draws from both hashing and indexing techniques, inheriting the advantages of each. To facilitate the criss-cross hash join, a simple data structure, termed page map, is introduced. The page maps aid in reducing the hashing effort incurred in the current hash based join methods. Furthermore, the page maps implicitly capture and exploit the possible inherent order among tuples in the relations, however partial it may be, to achieve superior performance. As the proposed methodology relies on the hashing scheme, the page maps are simpler, more compact, and easier to maintain than the traditional data structures associated with index based join methods. We develop the ideas intuitively first, followed by a formal development of the concepts and the algorithms. A detailed probabilistic analysis of the algorithms is presented and their performance is assessed through extensive empirical investigations. The empirical analysis suggests significant performance improvements over the current state-of-the-art hybrid hash method, especially in the presence of possible inherent order.