ppxscal/embedding_network huggingface dataset:
Non-numeric simulation
Authors: Steven Evans
Venue: Proceedings of the 7th conference on Winter simulation - Volume 2 (1974)

This paper introduces the concept of non-numeric simulation, a viewpoint which emphasizes the simulation possibilities among parameters associated relationally rather than numerically. One purpose of non-numeric simulation is presented as a means of evaluation of theoretical frameworks or systems of axioms that a researcher may be considering. By way of example, an essentially non-numeric simulation is sketched, also showing how it may evolve into a more classic, numeric form. Some types of results that may arise are discussed including detecting stable, oscillating, and steady-state processes and conditions. Finally our hypothetical example is related to an instance of research in organizational behavior, with two other applications briefly noted.
A bit-slice cache controller
Authors: B. D. Ackland
Venue: Proceedings of the 6th annual symposium on Computer architecture (1979)

Cache storage is a proven memory speedup technique in large mainframe computers. Two of the main difficulties associated with the use of this concept in small machines are the high relative cost and complexity of the cache controller. An LSI bit-slice chip set is described which should reduce both controller cost and complexity. The set will enable a memory designer to construct a wide variety of cache structures with a minimum number of components and interconnections. Design parameters are based on the results of extensive simulation. Particular emphasis is placed on the need for design flexibility. The chip set consists of three devices - an address bit-slice, a data bit-slice and a central control unit. Circuit design has been completed to a gate level based on an ECL/EFL implementation. The proposed structure will accommodate cache sizes up to 2K words with access times as short as 25 ns.
Software testing and the PABX
Authors: John O.B. Greaves, Art Bailey
Venue: Proceedings of the 1983 annual conference on Computers : Extending the human resource (1983)

The topic of software testing is as general as the blue sky, and because software has become one of the key ingredients used to build machines, testing methodologies have become an important part of the overall software development cycle, particularly in highly demanding real time environments. A good software test insures that the machine performs in the manner envisioned by its creators. While testing can be done at many stages ranging from design and code reviews to low level testing of code at the procedure and subroutine level, the focus of this paper will be on testing the functional behavior of the end product. Testing of a special class of machine, the Private Automatic Branch Exchange, (PABX) is discussed along with a novel approach which was developed and successfully applied. The PABX can be characterized as a finite state machine, but for testing purposes it has an almost infinite number of states to test. This paper will discuss the selection and formalization of an algorithmic testing notation and set of related procedures which insures stringent product quality goals while at the same time reducing the testing effort to a reasonable and manageable task.
Pipelines with internal buffers
Authors: Janak H. Patel
Venue: Proceedings of the 5th annual symposium on Computer architecture (1978)

Concurrent or overlapped processing of more than one task is a common technique used in many computer architectures to increase the throughput. A pipeline is one such form consisting of a set of hardware segments which can be operated in an overlapped fashion. The existing and many proposed pipelines assume that a task must flow synchronously, without wait or preemption, from segment to segment for its execution. In this paper we propose a pipeline model in which priority buffers are provided at every segment to control the flow of tasks. Several different priority implementations are analyzed assuming periodic arrivals of tasks. The characteristics studied are, queue size, wait time and throughput. It is shown that the theoretical maximum throughput of a pipeline is attainable with the use of internal buffers. Moreover, it is shown that a substantial degree of freedom in scheduling of tasks is achieved by these methods.
Current topics in fortran development: Macros and Compile-Time Processing
Authors: Jeanne T. Martin
Venue: Proceedings of the ACM '81 conference (1981)

A major aspect of the proposed Fortran 8x is a flexible framework for providing and accommodating application-specific facilities for software development. One form of such facilities is application-specific languages, and one cost-effective way of implementing and maintaining certain language features is by use of syntax macros. For example, the complete CODASYL data base model can be implemented in Fortran with such macros. A powerful macro facility, together with compile-time processing facilities, have been proposed for inclusion in next Fortran standard. This proposal will be presented, along with examples of its use in providing application-specific languages in Fortran.
The solution of certain two-dimensional markov models
Authors: G. Fayolle, P. J.B. King, I. Mitrani
Venue: Proceedings of the 1980 international symposium on Computer performance modelling, measurement and evaluation (1980)

A class of two-dimensional Birth-and-Death processes, with applications in many modelling problems, is defined and analysed in the steady-state. These are processes whose instantaneous transition rates are state-dependent in a restricted way. Generating functions for the steady-state distribution are obtained by solving a functional equation in two variables. That solution method lends itself readily to numerical implementation. Some aspects of the numerical solution are discussed, using a particular model as an example.
An interactive macro language application to a tracking problem and to a best ellipsoidal bounds problem
Authors: Joe Stiles
Venue: Proceedings of the 1976 annual conference (1976)

The National Bureau of Economic Research provides a national network for interactive research in economics. Economic models may be described and studied using this network. A common model possible is the discrete linear regulator. This model is so common that software has been developed to facilitate its use. The software is in the form of macros written in a macro language provided by NBER. Several macros are discussed, and an example of their use is given.
The challenge of human resources staffing and utilization in industrial computing - part 1
Authors: Marvin Kornbluh, William McCartin, Richard G. Schneider
Venue: Proceedings of the fifth SIGCSE technical symposium on Computer science education (1975)

Marvin Kornbluh Industry today is looking for creative systems analysts and programmers who can develop physical systems on the basis of sound business judgement rather than merely increasing the level of sophistication. They need &ldquo;entrepeneurs&rdquo; - those who know how to work effectively with hardware and software suppliers, know how to harness and direct the creative systems people, know how to be communications catalysts in giving advice and counsel to systems users, and know how to establish and maintain sensible budgets and project control systems. How these types of EDP personnel can be developed by the application of sound management principles to the establishment of &ldquo;custom-built&rdquo; educational and training programs that emphasize both the operations of the organization as well as the technical aspects of data processing will be discussed. William McCartin The nature of computer technology in a manufacturing environment and the resulting demand for extensive computer education and professional knowledge will be outlined. A company's response to this demand as it was influenced by technical and budgetary considerations is described. The current and future educational requirements necessary to successful implementation of computerized industrial applications, manufacturing process control, and factory automation is considered. Richard G. Schneider Computer-related careers in banking will be discussed. Personnel are needed who can specialize in such areas as computer operations efficiency, hardware performance measurement, systems software support and development, the use of management science techniques, data base development and systems support, and application systems development in programming. They must understand the technical aspects of their fields and communicate effectively to their technical and corporate management, with coordination of all the efforts involved in a large scale, 24 hour, 7 day week operation.
Asynchronous and clocked control structures for VLSI based interconnection networks
Authors: Mark A. Franklin, Donald F. Wann
Venue: ACM SIGARCH Computer Architecture News (1982)

A central issue in the design of multiprocessor systems is the interconnection network which provides communications paths between the processors. For large systems, high bandwidth interconnection networks will require numerous 'network chips' with each chip implementing some subnetwork of the original larger network. Modularity and growth are important properties for such networks since multiprocessor systems may vary in size. This paper is concerned with the question of timing control of such networks. Two approaches, asynchronous and clocked, are used in the design of a basic network switching module. The modules and the approaches are then modelled and equations for network time delay are developed. These equations form the basis for a comparison between the two approaches. The importance of clock distribution strategies and clock skew is quantified, and a network clock distribution scheme which guarantees equal length clock paths is presented.
Techniques and modules for element specification in a time - delay logic simulator
Authors: John L. Fike, S. A. Szygenda
Venue: Proceedings of the 1st symposium on Simulation of computer systems (1973)

This paper describes the development of element models (basic gates and flip-flops) for use in a multi-modal, assignable-delay logic simulator known as TEGAS2. The basic mechanism of this event-driven simulator is first described, together with the operation of the three basic simulation modes (nominal-delay two-value simulation, nominal-delay three-value simulation, and three-value simulation using an ambiguity region to provide race and hazard detection). The criteria used in developing the element models were: 1) The element should operate in a consistent manner for all simulation modes; 2) A basic set of circuit building blocks should be available; 3) The element evaluation should be relatively rapid; and 4) The set of element routines should be extensible. In order to discuss the above philosophy in detail, the desired operation of the And element is first described for each simulation mode. Equations are then derived from this description, and finally the Fortran statements are obtained. The handling of memory elements in a simulator poses a special problem. A Delay (&ldquo;D&rdquo;) flip-flop is used as an illustration of memory element modeling techniques; again, the development starts with a verbal description of the operation and arrives at the Fortran statements for the various simulation modes. A level-triggered master-slave J-K flip-flop is then used as a vehicle for a general discussion of the problems associated with more complex memory elements. A brief description is also given of the clocked S-R models used in the system.
Two year curricula in computer studies-implementing the guidelines
Authors: Richard W. Dillman, William H. Anderson, Dorothea L. Choper, John M. Lloyd, Katherine B. Simms, James F. Williams
Venue: Proceedings of the ninth SIGCSE technical symposium on Computer science education (1978)

The intent of this paper is to describe an implementation of a curriculum computable with the recently established ACM Community and Junior College Career in Computer Programming Guidelines (the &ldquo;Little&rdquo; Report). The proposed curriculum consists of a two-year associate degree program in Computer and Information Studies containing four options, one of which is a career option for computer programmers. The programs are supported by a set of twenty-five one, two, and three credit courses. Those courses will be discussed in this report.
FITTEN - an APL workspace for nonlinear regression
Authors: Lutz Edler, Jutta Berger
Venue: Proceedings of the international conference on APL (1982)

Based on the problems experimentally working scientists have if they want to fit theoretical curves or models (e.g. Bateman curves of compartment models in pharmacokinetics) to data which are nonlinear and can not be treated by usual regression techniques, we developed an interactive APL program called FITTEN in order to carry out nonlinear regressions. Emphasis has been placed on easy practicability, also for users with minor computing experience. Batch processing for high and interactive processing for low amounts of CPU was combined by the usage of several APL libraries. The mode of operation of FITTEN, the possibility to control the search and the output is demonstrated by an example.
Lunar orbiter command and telemetry data handling system at deep space stations
Authors: E. Knutson, L. Holgersen, D. R. Merrill
Venue: Proceedings of the 1966 21st national conference (1966)

The Lunar Orbiter will provide extensive photographic exploration of the lunar surface to aid in the selection of possible landing areas for Project Apollo manned landing mission. The Lunar Orbiter project* is one of the lunar and planetary programs directed by the NASA Langley Research Center. The Boeing Company is the prime spacecraft contractor. There will be five flight spacecraft and three ground test spacecraft. The first flight is scheduled in the middle of 1966. The Lunar Orbiter mission is supported by the Deep Space Network (DSN). The DSN consists of the Space Flight Operations Facility (SFOF), the Deep Space Instrumentation Facility (DSIF) and intersite communication links. The Jet Propulsion Laboratory operates the DSN and provides mission support for the Lunar Orbiter project.
SIGBIO (Paper Session)
Authors: Ronald W. Hagen Lewis J. Thomas,  Jr., Janet A. Thomas,  Jr. Betty F. Maskewitz, R. L. Henne, W. J. McClain, A. Safir, C. Kulikowski
Venue: Proceedings of the 1976 annual conference (1976)

Every year advances in computer systems and technology cause increased usage of the computer as a tool to further improve health care delivery. This session endeavors to present some of the more recent trends of computer applications in the field of medicine. Papers in this session will cover physiologic research systems, diagnostic system and medical computer program information centers.
The application of token rings to local networks of personal computers
Authors: R. L. Gordon
Venue: Proceedings of the 3rd ACM SIGSMALL symposium and the first SIGPC symposium on Small systems (1980)

It is the thesis of this short note that a network which operates by passing a control token sequentially around a loop, much like that of the Distributed Computing System [FARB 73, FARB 75] is appropriate for at least two forthcoming kinds of local personal computer networks. High end personal scientific computers will probably require very high bandwidth (50 Mhz) local networks, a requirement well suited for a token type ring network. At the other end of the spectrum, a low bandwidth (300 baud) network for low cost home or business personal computers may be established that use the conventional phone system and a variation of the token ring for arbitration.
Traffic and delay in a circular data network
Authors: J. F. Hayes, D. N. Sherman
Venue: Proceedings of the ACM second symposium on Problems in the optimizations of data communications systems (1971)

The operation and traffic behavior of a data transmission system using a loop topology are studied. A mathematical model is developed for evaluating system load and buffer delay. This model accommodates an arbitrary number of stations for a symmetric traffic pattern. Intrinsic to the model is a recognition of the bursty nature of data sources. Other factors that are taken into account are line and source rates as well as the blocking of data into fixed-size packets. Formulas are derived from which approximations to average message delay induced by traffic in the loop (a critical parameter in buffered systems) can be calculated. The results of the study are presented in a set of curves where normalized delay due to traffic within specific system configurations is plotted as a function of the number of stations and source activity. Simulation results for single loops of 5 and 50 stations are presented which indicate good agreement with the analytical approaches. A major conclusion is that, in certain quite reasonable circumstances, the delay is not large even for high line activity.
The application of simulation in computer system design and optimization
Authors: William C. Thompson
Venue: Proceedings of the second conference on Applications of simulations (1968)

As computer systems have grown in size, complexity, and cost, the emphasis in the computer field has turned from a &ldquo;need for programmers&rdquo; to a &ldquo;need for systems analysts&rdquo;. There are almost as many definitions of systems analysis as there are analysts. However, for purposes of discussion I will define a system analyst as a person who, given an automation objective, can design a computer system which, upon implementation, meets the objective in some way, e.g., minimum cost or maximum performance. Considering the cost of hardware today it is not without justification that &ldquo;successful&rdquo; systems analysts are highly paid technicians. Considering the age old economic law of supply and demand, it seems reasonable that this shortage would quickly be filled. However, this has not occurred because of the large experience requirement that systems analysts must have. There just are not that many &ldquo;old timers&rdquo; around to meet the demand.
A method for rapid testing of beam crossover circuits
Authors: D. W. Hightower, B. A. Unger
Venue: Proceedings of the 9th Design Automation Workshop (1972)

Crossovers on thin film substrates are conductive paths used to bridge or interconnect circuitry separated by intervening paths. Crossovers have been made by arching a fine wire or ribbon over the intervening path and bonding each end to a conductor, or by fabricating an interconnecting dielectric-conductor path sandwich by standard deposition and photolithographic techniques. During the past few years the number of Bell System circuits incorporating crossovers, and the number of crossovers incorporated in a single circuit, has increased very significantly. Some circuits now incorporate over 2000 crossovers. Economics dictates that all crossovers must be tested prior to committing chips and other bonded components. This paper describes a crossover fabrication process that incorporates a built-in test technique called CRONET (CROssover NEt Testing), and a computer aided design program that automates CRONET.
Functional design verification by multi-level simulation
Authors: Kit Tham, Rob Willoner, David Wimp
Venue: Proceedings of the 21st Design Automation Conference (1984)

This paper introduces Intel's functional CAD design environment and methodology. The generation of an accurate behavioral model for use in systems design validation and for comparisons with lower-level components is described. The need for both an RTL and a schematics simulator in Intel's hierarchical design methodology is explained. Finally, the paper shows how these two simulators have been linked together in two ways for two different purposes: for RTL-schematics verification, and for very large logic simulation runs.
Blueprints for the computer city: The quest for an architect's computer
Authors: Norman Soong, Charles Atwood, Charles Eastman, William Mitchell, Douglas Stoker
Venue: Proceedings of the 1984 annual conference of the ACM on The fifth generation challenge (1984)

This panel session is supported by the American Institute of Architects, the AIA. The purpose of this panel is to publicize the computing needs of the building industry, which consists primarily of architects, engineers, and contractors. We thank the AIA Computers in Architecture Committee for assisting in selecting this group of panelists to speak at the ACM84" on this subject as individual industry experts. To complement the ACM84' theme, &ldquo;The Fifth Generation Challenge,&rdquo; this panel will address the theme of the architect's quest for a computer. The material that will be presented at the panel session, is aimed to challenge and to stimulate visionary thinking. The session is not aimed at seeking answers, although some answers may be generated.
An on-line simulator and database system for management of a commercial fish farm
Authors: A. Neil Arnason, Carl J. Schwarz, David H. Scuse
Venue: Proceedings of the 13th conference on Winter simulation - Volume 1 (1981)

We have developed an on-line system to aid in the management of enclosed, multi-tank fish farms with water filtration, heating and recirculation, where fish are grown from fingerling through to market size (about 250 gr.). The manager has a high degree of control over tank loadings and fish rearing conditions, but he must maintain high production rates within biological constraints on water quality and fish density and within system constraints imposed by the physical plant. A multi-level interactive simulator permits exploration of management strategies, with nested levels of constraints. A database is used for storage of both real and simulated data on management interventions and their consequences on fish growth and water quality. Interaction between the simulators and the database aids model calibration and validation and permits storage of promising management strategies.
Some thoughts on teaching first year programming
Authors: Marcel Dupras, Fernand LeMay, Ali Mili
Venue: ACM SIGCSE Bulletin (1984)

Teaching programming to first year classes is most often considered a matter of minor importance. We think otherwise. This paper expresses our viewpoint on the matter and reports on an experiment supporting our viewpoint.
A contemporary perspective on design automation and VLSI in the 80's (Position Statement)
Authors: Jonathan Allen
Venue: Proceedings of the 17th Design Automation Conference (1980)

The goal of design automation for VLSI is to provide tools which permit rapid, correct, and economical design of custom circuits subject to constraints of area, time, or power. This design process can be seen as the transformation of a given input specification (e.g. a formal representation of an algorithm) through a succession of representations (architecture, functional elements, gates, circuits, layout) until a mask specification is obtained which can then be interpreted by a fabrication process to yield correctly working physical circuits. The major problems faced, then, are the selection of these representations together with the means to create, modify and transform them. Hovering over these needs is the growing cloud of complexity, which demands organized systems design such that the resulting specification can be easily understood, changed, and extended along with other designs to form still larger circuits. One term that ties all of these requirements together is productivity, and IC design is currently facing all the problems encountered in software system design. Just as programmers produce very few debugged instructions per day, today's IC designers usually produce less than ten &ldquo;debugged transistors&rdquo; per day when creating new logic circuits.