ppxscal/embedding_network huggingface dataset:
A type system for object initialization in the Java bytecode language
Authors: Stephen N. Freund, John C. Mitchell
Venue: ACM SIGPLAN Notices (1998)

In the standard Java implementation, a Java language program is compiled to Java bytecode. This bytecode may be sent across the network to another site, where it is then interpreted by the Java Virtual Machine. Since bytecode may be written by hand, or corrupted during network transmission, the Java Virtual Machine contains a bytecode verifier that performs a number of consistency checks before code is interpreted. As illustrated by previous attacks on the Java Virtual Machine, these tests, which include type correctness, are critical for system security. In order to analyze existing bytecode verifiers and to understand the properties that should be verified, we develop a precise specification of statically-correct Java bytecode, in the form of a type system. Our focus in this paper is a subset of the bytecode language dealing with object creation and initialization. For this subset, we prove that for every Java bytecode program that satisfies our typing constraints, every object is initialized before it is used. The type system is easily combined with a previous system developed by Stata and Abadi for bytecode subroutines. Our analysis of subroutines and object initialization reveals a previously unpublished bug in the Sun JDK bytecode verifier.
Non-linear Optimization on a Parallel Intel i860 RISC Based Architecture
Authors: J. F. Ball, R. E. Dorsey, J. D. Johnson
Venue: Computational Economics (1997)

A description of a parallel implementation of the Genetic Algorithm for non-linear optimization is presented. The system is implemented with four Intel i860 RISC processors using INMOS transputers for communications. The performance is compared to the Cray Y-MP, Cray J916, an SGI Power Challenge L R8000 75 MHZ workstation, an SGI Challenge L R4400 100 MHZ work-station, an SGI Indy SC R4400 200 MHZ workstation, and both parastation and Paramid parallel I860 machines, each with one to four participating I860s. Comparisons were made for neural network optimization of a limited dependent variable problem and a chaotic time series. A complex rational expectations model was also estimated. The I860 based machines were able to achieve performances comparable to the supercomputers.
Module-sensitive program specialisation
Authors: Dirk Dussart
Venue: Proceedings of the ACM SIGPLAN 1997 conference on Programming language design and implementation (1997)

We present an approach for specialising large programs, such as programs consisting of several modules, or libraries. This approach is based on the idea of using a compiler generator (cogen) for creating generating extensions. Generating extensions are specialisers specialised with respect to some input program. When run on some input data the generating extension produces a specialised version of the input program. Here we use the cogen to tailor modules for specialisation. This happens once and for all, independently of all other modules. The resulting module can then be used as a building block for generating extensions for complete programs, in much the same way as the original modules can be put together into complete programs. The result of running the final generating extension is a collection of residual modules, with a module structure derived from the original program.
Solution of Two-Dimensional Riemann Problems of Gas Dynamics by Positive Schemes
Authors: Peter D. Lax, Xu-Dong Liu
Venue: SIAM Journal on Scientific Computing (1998)

The positivity principle and positive schemes to solve multidimensional hyperbolic systems of conservation laws have been introduced in [X.-D. Liu and P. D. Lax, J. Fluid Dynam., 5 (1996), pp. 133--156]. Some numerical experiments presented there show how well the method works. In this paper we use positive schemes to solve Riemann problems for two-dimensional gas dynamics.
An evaluation of the real-time performances of SVR4.0 and SVR4.2
Authors: Sherali Zeadally
Venue: ACM SIGOPS Operating Systems Review (1997)

UNIX is one of the most widely used operating systems on current workstations. However, UNIX was originally designed as a multitasking and time-sharing system with little concern for supporting real-time applications. Recent versions of UNIX have incorporated real-time features and the designers of these systems claim to provide better response times than the standard UNIX kernel. In order to assess the benefits of these new features and verify these claims, this paper compares the real-time performances of two popular versions of UNIX namely System V Release 4.0 and System V Release 4.2 for the Intel platform.
Aztec Diamonds, Checkerboard Graphs, and Spanning Trees
Authors: Donald E. Knuth
Venue: Journal of Algebraic Combinatorics: An International Journal (1997)

This note derives the characteristic polynomial of a graph that represents nonjump moves in a generalized game of checkers. The number of spanning trees is also determined.
What is a secret&mdash;and&mdash;what does that have to do with computer security?
Authors: Ruth Nelson
Venue: Proceedings of the 1994 workshop on New security paradigms (1994)

This paper questions some of the basic assumptions of computer security in the context of keeping secrets, and it finds some major discrepancies. It then proposes a new paradigm for functional security in computer systems. The first conclusion of the paper is that secrecy and security cannot be expressed both algorithmically and accurately. The second conclusion of the paper is that functional security models, which look at the application software as well as the data, can be very useful. Use of more realistic models involves a more complex definition of secure systems, but it may reduce the conflict between security and function and may result in more effective secure systems.
On Incentives and Updating in Agent Based Models
Authors: Scott E. Page
Venue: Computational Economics (1997)

This paper introduces the concept of incentive based asynchronous updating in which the order of updating is determined by incentives. Previously, asynchronous updating has been shown to yield greater stability than synchromous updating for a variety of dynamical systems. However, in those models the order of updating is random. When incentives determine the ordering, the dynamics and end states change. For a conformity model on a two dimensional cellular automata, incentive based asynchronous updating yields greater linear disparity. Fot the game of life, it results in much greater sensitivity to initial conditions.
General simulation of multiprocessor interconnection networks
Authors: Nizar Al-Holou, Jay B. Ghosh, Dana B. Rogers
Venue: Proceedings of the 17th conference on Winter simulation (1985)

Multiprocessor systems are high-performance systems that are making a rapid foray into the mainstream of computing. To realize their full potential, however, consideration must be given to their design. The design of the interconnection networks is particularly critical. Performance studies based on analytical and/or simulation models are conducted to evaluate alternate designs. The analytical models are either so complex that they are intractable, or are based on assumptions so restrictive that they are unrealistic. Simulation models, on the other hand, are simple and can capture almost any level of realism. Their problems lie in high costs for their development and the specificity of their results. The research reported here addresses these issues in specific reference to the simulation of multiprocessor interconnection networks. General simulation is proposed to counter the development cost, and simulation-based meta-models are suggested for overcoming the lack of generality in simulation results. This paper describes a general simulation model as implemented in SLAMII.
H/Direct: a binary foreign language interface for Haskell
Authors: Sigbjorn Finne, Daan Leijen, Erik Meijer, Simon Peyton Jones
Venue: Proceedings of the third ACM SIGPLAN international conference on Functional programming (1998)

H/Direct is a foreign-language interface for the purely functional language Haskell. Rather than rely on host-language type signatures, H/Direct compiles Interface Definition Language (IDL) to Haskell stub code that marshals data across the interface. This approach allows Haskell to call both C and COM, and allows a Haskell component to be wrapped in a C or COM interface. IDL is a complex language and language mappings for IDL are usually described informally. In contrast, we provide a relatively formal and precise definition of the mapping between Haskell and IDL.
Nonparametric Regression Modeling with EquiprobableTopographic Maps and Projection Pursuit Learning with Application to PET Image Processing
Authors: Marc M. Van Hulle
Venue: Journal of VLSI Signal Processing Systems (1998)

A recently introduced rule for equiprobable topographic map formation, called the Vectorial Boundary Adaptation Rule (VBAR), is extended and applied to nonparametric projection pursuit regression. The performance of the regression procedure is compared to that of a number of other nonparametric regression procedures. The procedure is applied to positron emission tomography (PET) images for adaptive filtering and data compression purposes.
On Resolvable Difference Families
Authors: Marco Buratti
Venue: Designs, Codes and Cryptography (1997)

A Steiner 2-design is said to be G-invariantly resolvable if admits an automorphism group G and a resolution invariant under G. Introducing and studying resolvable difference families, we characterize the class of G-invariantly resolvable Steiner 2-designs arising from relative difference families over G. Such designs have been already studied by Genma, Jimbo, and Mishima [13] in the case in which G is cyclic. Developping their results, we prove that any (p, k, 1)-DF (p prime) whose base blocks exactly cover p&minus;1/k(k&minus;1) distinct cosets of the k-th roots of unity (mod p), leads to a Ckp-invariantly resolvable cyclic (kp,k,1)-BBD. This induced us to propose several constructions for DF&lsquo;s having this property. In such a way we prove, in particular, the existence of a C5p-invariantly resolvable cyclic (5p, 5, 1)-BBD for each prime p = 20n + 1 < 1.000.
Set-Theoretical Algebraic Approaches to Connectivityin Continuous or Digital Spaces
Authors: Christian Ronse
Venue: Journal of Mathematical Imaging and Vision (1998)

Connectivity has been defined in the framework of topological spaces, but also in graphs; the two types of definitions do not always coincide. Serra gave a set of formal axioms for connectivity, which consists in a list of properties of the family of all connected subsets of a space; this definition includes as particular case connected sets in a topological space or in a graph. He gave an equivalent characterization of connectivity in terms of the properties of the operator associating to a subset and a point of that space, the connected component of that subset containing that point. In this paper we give another family of axioms, equivalent to those of Serra, where connectivity is characterized in terms of separating pairs of sets. In the case of graphs, where connected sets are generated by pairs of end-vertices of edges, this new set of axioms is equivalent to the separation axioms given by Haralick.
Vertical Block Hidden Z-Matrices And The Generalized Linear Complementarity Problem
Authors: S. R. Mohan, S. K. Neogy
Venue: SIAM Journal on Matrix Analysis and Applications (1997)

In this paper we introduce vertical block hidden Z-matrices and study their minimality and complementarity properties.
Simulation for high speed processing
Authors: David T. Sturrock, Glenn R. Drake
Venue: Proceedings of the 28th conference on Winter simulation (1996)

High-speed processing lines are fundamental to the manufacturing processes of several industries, including food and beverage, consumer products, and pharmaceuticals. A high-speed process is defined here as a process where the volume and rate of jobs is such that discrete modeling and analysis cannot be done effectively. Traditionally, simulation analysis of high-speed processing lines has required a series of aggregations and simplifying assumptions to address the large volumes encountered. These approximations often cause the models to be poor predictors of real world systems. HiSpeed$im is a powerful, new approach for analyzing high-speed systems. It incorporates an interface and algorithmic engine specifically designed for simulating the complex control logic and equipment of high-speed processing. HiSpeed$im also leverages the powerful simulation platform of SIMAN/Arena. This combines the ease of use of a simulator and the speed of a custom-written product with the complete power and flexibility of the Arena general-purpose tool.
Optimal wire and transistor sizing for circuits with non-tree topology
Authors: Lieven Vandenberghe, Stephen Boyd, Abbas El Gamal
Venue: Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design (1997)

Conventional methods for optimal sizing of wires and transistors use linear RC circuit models and the Elmore delay as a measure of signal delay. If the RC circuit has a tree topology the sizing problem reduces to a convex optimization problem which can be solved using geometric programming. The tree topology restriction precludes the use of these methods in several sizing problems of significant importance to high-performance deep submicron design including, for example, circuits with loops of resistors, e.g., clock distribution meshes, and circuits with coupling capacitors, e.g., buses with crosstalk between the lines. The paper proposes a new optimization method which can be used to address these problems. The method uses the dominant time constant as a measure of signal propagation delay in an RC circuit, instead of Elmore delay. Using this measure, sizing of any RC circuit can be cast as a convex optimization problem which can be solved using the recently developed efficient interior-point methods for semidefinite programming. The method is applied to two important sizing problems --- sizing of clock meshes, and sizing of buses in the presence of crosstalk.
Computing, Social Activity, and Entertainment: A Field Study of a Game MUD
Authors: Jack Muramatsu, Mark S. Ackerman
Venue: Computer Supported Cooperative Work (1998)

Are game and entertainment systems different than work-oriented systems? What drives the user&lsquo;s experience in a collaborative game? To answer these questions, we performed a participant-observation study of a combat MUD, a game similar to Dungeons and Dragons. Our interest is in how this social world is arranged and managed (rather than, for example, in how participants form or display individual identities). The study explores the social arrangements and activities that give meaning and structure to the participants. We found that conflict and cooperation were the dominant social activities on this MUD, much more so than sociability. The game&lsquo;s management played a critical function in maintaining and promoting these activities. Moreover, novelty and entertainment were important for the design of both the system features and the sociality itself.
Minimal Surfaces Based Object Segmentation
Authors: Vincent Caselles, Ron Kimmel, Guillermo Sapiro, Catalina Sbert
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1997)

A geometric approach for 3D object segmentation and representation is presented. The segmentation is obtained by deformable surfaces moving towards the objects to be detected in the 3D image. The model is based on curvature motion and the computation of surfaces with minimal areas, better known as minimal surfaces. The space where the surfaces are computed is induced from the 3D image (volumetric data) in which the objects are to be detected. The model links between classical deformable surfaces obtained via energy minimization, and intrinsic ones derived from curvature based flows. The new approach is stable, robust, and automatically handles changes in the surface topology during the deformation.
A New Software Package for Linear Differential-Algebraic Equations
Authors: Peter Kunkel, Volker Mehrmann, Werner Rath, Jörg Weickert
Venue: SIAM Journal on Scientific Computing (1997)

We describe the new software package GELDA for the numerical solution of linear differential-algebraic equations with variable coefficients. The implementation is based on the new discretization scheme introduced in [P. Kunkel and V. Mehrmann, SIAM J. Numer. Anal., 33 (1996), pp. 1941--1961]. It can deal with systems of arbitrary index and with systems that do not have unique solutions or inconsistencies in the initial values or the inhomogeneity. The package includes a computation of all the local invariants of the system, a regularization procedure, and an index reduction scheme, and it can be combined with every solution method for standard index-1 systems. Nonuniqueness and inconsistencies are treated in a least square sense. We give a brief survey of the theoretical analysis of linear differential-algebraic equations with variable coefficients and discuss the algorithms used in GELDA. Furthermore, we include a series of numerical examples as well as comparisons with results from other codes, as far as this is possible.
Simulator for the evaluation of distributed network-system performance
Authors: Toshio Komatsu, Yukihiro Nakamura, Junro Nose
Venue: Proceedings of the 28th conference on Winter simulation (1996)

The INSYDE simulator was developed as a tool for estimating the performance of large-scale, complex computer systems using graphical type figures to describe system operations. This paper provides an overview of an enhanced version of INSYDE that can be applied to distributed network systems. The model description method and a number of application examples are also presented. A major challenge in simulating distributed network systems that interconnect multiple computer systems over a network is how to describe the intricate, complex model conditions of computer systems including task processing and interrupts on the one hand, and network-related model conditions (e.g., specif@irtg protocol, media access method, congestion control, broadcast communication, and so on) on the other in the most parsimonious fashion with the least amount of model description. In this work, the complex and intricate conditions of distributed network systems are simply described by creating a protocol media access method library, realizing packet splitting/merging and broadcast communication functions as nodes, adding system information that can be checked for congestion control, and multiplexing task processing.
Clock-Feedthrough Compensated First-Generation SI Circuitsand Systems
Authors: Bengt Jonsson, Nianxiong Tan
Venue: Analog Integrated Circuits and Signal Processing (1997)

In this paper we discuss the clock-feedthrough problem in switched-current circuits. We present a clock-feedthrough compensated first-generation SI memory cell that ideally cancels both constant and signal-dependent clock-feedthrough. It is shown how to optimize the memory cell performance according to a general cost function. Measured total harmonic distortion of the memory cell is less than -65 dB when optimized for low-power. The implementation of a second-order delta-sigma modulator using the presented memory cell is also described. Measurements confirmed a dynamic range of 11 bits. All circuits were implemented in a single-poly CMOS process.
Location of Stuck-At Faults and Bridging Faults Based on Circuit Partitioning
Authors: Irith Pomeranz, Sudhakar M. Reddy
Venue: IEEE Transactions on Computers (1998)

We propose a method of fault diagnosis at the chip level that reduces the number of simulations required to locate defect site(s) by logically partitioning the circuit into subcircuits. Candidate subcircuits that potentially contain the defect site(s) are identified and further partitioned until the defect site is located with the required resolution. Both stuck-at faults and nonfeedback bridging faults are considered as target fault models to represent defects. At the base of the fault location procedure is a procedure to identify subcircuits that potentially contain the fault site. This procedure is matched to the fault model being considered, thus allowing the same partitioning scheme to be applied to various fault models. The procedure presented here is applicable to combinational and fully scanned sequential circuits. Experimental results are presented to demonstrate the effectiveness of circuit partitioning in reducing the number of fault simulations required to locate a fault.
Design process model in the Yorktown Silicon Compiler
Authors: Raul Composano
Venue: Proceedings of the 25th ACM/IEEE Design Automation Conference (1988)

The automatic synthesis of an IBM 801 processing unit using the Yorktown Silicon Compiler is presented. The underlying design process model is explained showing the intermediate design stages, while emphasizing high-level issues. First, the principles of operations are translated manually into a high-level behavioral description. The system is decomposed by the designer into concurrent modules (in the 801, four pipeline stages). Structural synthesis automatically generates a circuit structure for each pipeline stage, including the control and the data path. The combinational logic is optimized globally during logic synthesis producing a multi-level implementation. The resulting size (in number of transistors) and the performance of the processor (estimated cycle time and cycles per instruction) are compared to a manual RT-level design.
Garment: a mechanism for abstraction and encapsulation of languages
Authors: Naixiao Zheng, Hongjun Zheng Zongyan Qiu
Venue: ACM SIGPLAN Notices (1997)

Domain-specific languages are closely related to interface languages of domain-oriented software. Thus, the specifications of such software can be abstracted to specifications of language systems, and implementation of such software can be abstracted to implementation of the language systems. As a unified model to support software development and research, a mechanism named Garment for abstracting and encapsulating languages is proposed. Garment provides a unified framework for defining languages (syntax and semantics) and describing relations between languages (which are classified as inheritance, shielding and extension). Finally, an experimental environment, which supports software development with Garment, is introduced briefly.
Function Estimation by Feedforward Sigmoidal Networks with BoundedWeights
Authors: Nageswara S. V. Rao, Vladimir Protopopescu
Venue: Neural Processing Letters (1998)

We address the problem of estimating a function f: [0,1] ^d &map; [-L,L] by using feedforward sigmoidal networks with a single hidden layer and bounded weights. The only information about the function is provided by an identically independently distributed sample generated according to an unknown distribution. The quality of the estimate is quantified by the expected cost functional and depends on the sample size. We use Lipschitz properties of the cost functional and of the neural networks to derive the relationship between performance bounds and sample sizes within the framework of Valiant&lsquo;s probably approximately correct learning.
The Covering Radius of Ternary Cyclic Codes with Lengthup to 25
Authors: Tsonka Stefanova Baicheva
Venue: Designs, Codes and Cryptography (1998)

The covering radius of all ternary cyclic codes of length up to 25 is given. Some of the results were obtained by computer and for others mathematical reasonings were applied. The minimal distances of all codes were recalculated.