ppxscal/embedding_network huggingface dataset:
A New Theoretical Approach to Absorbing Layers
Authors: Patrick Joly, Jukka Tuomela
Venue: SIAM Journal on Numerical Analysis (1997)

We consider the construction of absorbing boundary layers using asymptotic expansions, the small parameter being the width of the layer. This allows us to define the order of the layer. We compute layers of various orders and analyze their stability properties. Finally, we perform some numerical tests to evaluate the practical utility of our layers.
A unifying methodology for handovers of heterogeneous connections in wireless ATM networks
Authors: C.-K. Toh
Venue: ACM SIGCOMM Computer Communication Review (1997)

The aim of Wireless ATM is to provide multi-media services to mobile users. While existing research on Wireless ATM are focussed on handovers of unicast connections, handovers of multicast connections have not been investigated. While conventional multicast join and leave operations occur over the same path, this is not the case during mobile host migrations in a Wireless ATM network. In this paper, we reveal how handovers of multicast connections can be achieved in a manner irrespective of whether these multicast trees are source-, server- or core-based. More importantly, we demonstrate how the enhanced hybrid handover protocol incorporating crossover switch discovery can be used to support handovers of heterogeneous (i.e., unicast and multicast) connections in a uniform and unified manner, for Wireless ATM LANs employing either the centralised or distributed connection management scheme.
Fraction-free algorithms for linear and polynomial equations
Authors: George C. Nakos, Peter R. Turner, Robert M. Williams
Venue: ACM SIGSAM Bulletin (1997)

This paper extends the ideas behind Bareiss's fraction-free Gauss elimination algorithm in a number of directions. First, in the realm of linear algebra, algorithms are presented for fraction-free LU "factorization" of a matrix and for fraction-free algorithms for both forward and back substitution. These algorithms are valid not just for integer computation but also for any matrix system where the entries are taken from a unique factorization domain such as a polynomial ring. The second part of the paper introduces the application of the fraction-free formulation to resultant algorithms for solving systems of polynomial equations. In particular, the use of fraction-free polynomial arithmetic and triangularization algorithms in computing the Dixon resultant of a polynomial system is discussed.
Eigenfaces vs. Fisherfaces: Recognition Using Class Specific Linear Projection
Authors: Peter N. Belhumeur, João P. Hespanha, David J. Kriegman
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1997)

We develop a face recognition algorithm which is insensitive to large variation in lighting direction and facial expression. Taking a pattern classification approach, we consider each pixel in an image as a coordinate in a high-dimensional space. We take advantage of the observation that the images of a particular face, under varying illumination but fixed pose, lie in a 3D linear subspace of the high dimensional image space¿if the face is a Lambertian surface without shadowing. However, since faces are not truly Lambertian surfaces and do indeed produce self-shadowing, images will deviate from this linear subspace. Rather than explicitly modeling this deviation, we linearly project the image into a subspace in a manner which discounts those regions of the face with large deviation. Our projection method is based on Fisher's Linear Discriminant and produces well separated classes in a low-dimensional subspace, even under severe variation in lighting and facial expressions. The Eigenface technique, another method based on linearly projecting the image space to a low dimensional subspace, has similar computational requirements. Yet, extensive experimental results demonstrate that the proposed "Fisherface" method has error rates that are lower than those of the Eigenface technique for tests on the Harvard and Yale Face Databases.
The Existence of Partitioned Generalized Balanced TournamentDesigns with Block Size 3
Authors: E. R. Lamken
Venue: Designs, Codes and Cryptography (1997)

A generalized balanced tournament design, GBTD(n, k), defined on a kn-set V, is an arrangement of the blocks of a (kn, k, k &minus; 1)-BIBD defined on V into an n &times; (kn &minus; 1) array such that (1) every element of V is contained in precisely one cell of each column, and (2) every element of V is contained in at most k cells of each row. Suppose we can partition the columns of a GBTD(n, k) into k + 1 sets B1, B2, &hellip;, Bk + 1 where |Bi| = n for i = 1, 2, &hellip;, k &minus; 2, |Bi| = n&minus;1 for i = k &minus; 1, k and |Bk+1| = 1 such that (1) every element of V occurs precisely once in each row and column of Bi for i = 1, 2, &hellip;, k &minus; 2, and (2) every element of V occurs precisely once in each row and column of Bi &cup; Bk+1 for i = k &minus; 1 and i = k. Then the GBTD(n, k) is called partitioned and we denote the design by PGBTD(n, k). The spectrum of GBTD(n, 3) has been completely determined. In this paper, we determine the spectrum of PGBTD(n,3) with, at present, a fairly small number of exceptions for n. This result is then used to establish the existence of a class of Kirkman squares in diagonal form.
A Randomness-Rounds Tradeoff in Private Computation
Authors: Eyal Kushilevitz, Adi Rosén
Venue: SIAM Journal on Discrete Mathematics (1998)

We study the role of randomness in multiparty private computations. In particular, we give several results that prove the existence of a randomness-rounds tradeoff in multiparty private computation of $\fxor$. We show that with a single random bit, $\Theta(n)$ rounds are necessary and sufficient to privately compute $\fxor$ of n input bits. With $d\ge 2$ random bits, $\Omega(\log n/ d)$ rounds are necessary, and $O(\log n/ \log d)$ are sufficient. More generally, we show that the private computation of a boolean function f, using $d\ge 2 $ random bits, requires $\Omega(\log S(f)/ d)$ rounds, where S(f) is the sensitivity of f. Using a single random bit, $\Omega(S(f))$ rounds are necessary.
Modeling and Analysis of Workflows Using Petri Nets
Authors: Nabil R. Adam, Vijayalakshmi Atluri, Wei-Kuang Huang
Venue: Journal of Intelligent Information Systems (1998)

A workflow system, in its general form, is basically a heterogeneous and distributed information system where the tasks are performed using autonomous systems. Resources, such as databases, labor, etc. are typically required to process these tasks. Prerequisite to the execution of a task is a set of constraints that reflect the applicable business rules and user requirements.In this paper we present a Petri Net (PN) based framework that (1) facilitates specification of workflow applications, (2) serves as a powerful tool for modeling the system under study at a conceptual level, (3) allows for a smooth transition from the conceptual level to a testbed implementation and (4) enables the analysis, simulation and validation of the system under study before proceeding to implementation. Specifically, we consider three categories of task dependencies: control flow, value and external (temporal).We identify several structural properties of PN and demonstrate their use for conducting the following type of analyses: (1) identify inconsistent dependency specifications among tasks; (2) test for workflow safety, i.e. test whether the workflow terminates in an acceptable state; (3) for a given starting time, test whether it is feasible to execute a workflow with the specified temporal constraints. We also provide an implementation for conducting the above analyses.
Coding, Analysis, Interpretation, and Recognition of Facial Expressions
Authors: Irfan A. Essa, Alex P. Pentland
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1997)

We describe a computer vision system for observing facial motion by using an optimal estimation optical flow method coupled with geometric, physical and motion-based dynamic models describing the facial structure. Our method produces a reliable parametric representation of the face's independent muscle action groups, as well as an accurate estimate of facial motion.Previous efforts at analysis of facial expression have been based on the Facial Action Coding System (FACS), a representation developed in order to allow human psychologists to code expression from static pictures. To avoid use of this heuristic coding scheme, we have used our computer vision system to probabilistically characterize facial motion and muscle activation in an experimental population, thus deriving a new, more accurate, representation of human facial expressions that we call FACS+. Finally, we show how this method can be used for coding, analysis, interpretation, and recognition of facial expressions.
Towards efficient fine-grain software pipelining
Authors: Guang R. Gao, Herbert H. J. Hum, Yue-Bong Wong
Venue: ACM SIGARCH Computer Architecture News (1990)

Dataflow software pipelining was proposed as a means of structuring fine-grain parallelism and has been studied mostly under an idealized dataflow architecture model with infinite resources[9]. In this paper, we investigate the effects of software pipelining under realistic architecture models with finite resources. Our target architecture is the McGill Dataflow Architecture which employs conventional pipelined techniques to achieve fast instruction execution, while exploiting fine-grain parallelism via a data-driven instruction scheduler. To achieve optimal execution efficiency, the compiled code must be able to make a balanced use of both the parallelism in the instruction execution unit and the fine-grain synchronization power of the machine. A detailed analysis based on simulation results is presented, focusing on two key architectural factors - the fine-grain synchronization capacity and the scheduling mechanism for enabling instructions. On one hand, our results provide experimental evidence that software pipelining is an effective method for exploiting fine-grain parallelism in loops. On the other, the experiments have also revealed the (somewhat pessimistic) fact that even a fully software pipelined code may not achieve good performance if the overhead for fine-grain synchronization exceeds the capacity of the machine.
Threaded Prefetching: A New Instruction Memory Hierarchy for Real-TimeSystems
Authors: Minsuk Lee, Sang Lyul Min, Heonshik Shin, Chong Sang Kim, Chang Yun Park
Venue: Real-Time Systems (1997)

Cache memories have been extensively used to bridge the speed gap between high speed processors and relatively slow main memory. However, they are not widely used in real-time systems due to their unpredictable performance. This paper proposes an instruction prefetching scheme called threaded prefetching as an alternative to instruction caching in real-time systems. In the proposed threaded prefetching, an instruction block pointer called a thread is assigned to each instruction memory block and is made to point to the next block on the worst case execution path that is determined by a compile-time analysis. Also, the thread is not updated throughout the entire program execution to guarantee predictability. This paper also compares the worst case performances of various previous instruction prefetching schemes with that of the proposed threaded prefetching. By analyzing several benchmark programs, we show that the worst case performance of the proposed scheme is significantly better than those of previous instruction prefetching schemes. The results also show that when the block size is large enough the worst case performance of the proposed threaded prefetching scheme is almost as good as that of an instruction cache with 100 % hit ratio.
Recent results on the single-source shortest paths problem
Authors: Rajeev Raman
Venue: ACM SIGACT News (1997)

We summarize the currently best known theoretical results for the single-source shortest paths problem for directed graphs with non-negative edge weights. We also point out that a recent result due to Cherkassky, Goldberg and Silverstein (1996) leads to even better time bounds for this problem than claimed by the authors.
Artificial intelligence development aids (AIDA)
Authors: Gary Sullivan, Kenneth Fordyce
Venue: ACM SIGAPL APL Quote Quad (1985)

AIDA is a suite of APL based functions, and an approach, to assist in the development of modules to perform artificial intelligence (AI) tasks within a computer based information system (CBIS) or decision support system (DSS). The AIDA functions provide four basic capabilities: string processing or character manipulation Boolean knowledge representation predicate logic like knowledge representation a Boolean array based inference mechanism which helps identify parallel computation paths, has reversibility, and appears to improve performance by reducing rule visits This paper will describe some of the functions in AIDA, and briefly describe some of the systems developed with the help of AIDA. This should help demonstrate that APL is an excellent language for development of expert systems.
Use of domain analysis to implement the developer off-the-shelf systems (DOTSS) system acquisition approach
Authors: S. S. Gulu Gambhir
Venue: ACM SIGSOFT Software Engineering Notes (1997)

This paper discusses implementation of Eisner's Developer Off-the-Shelf Systems (DOTSS) system acquisition approach. The DOTSS method involves reuse of entire systems rather than reuse of modules or subsystems. Reuse issues, including methods, benefits, and obstacles as they relate to the DOTSS approach, are presented. The use of Domain Analysis is proposed as a means of developing a set of high-level system requirements that are not overly specific to the problem domain at hand, thereby allowing existing systems from related domains to be considered for reuse. A set of evaluation criteria that can be used to differentiate candidate systems is also included.
Valuation of potash reserves at the Waste Installation Pilot Plant
Authors: Peter C. Anselmo
Venue: Proceedings of the 28th conference on Winter simulation (1996)

Monte Carlo simulation was used in conjunction with several random walk price and cost models to value potash reserves at the Waste Installation Pilot Plant (WIPP) site new Carlsbad, New Mexico. Selection of market price and product processing cost models is the critical issue discussed in this paper. Key issues and inputs to the thirty five year simulation are briefly discussed. Results for one type of potash found in the WIPP region are presented. Present value distributions for revenues from potash operations and estimated cash flows to a single firm conducting potash extraction were generated using several price/cost model combinations. A simple Wiener process was selected for annual potash market prices, and processing costs were generated using random draws from a uniform distribution. The rationale for selection of this model combination is discussed.
Some Multiply Derived Translation Planes withSL(2,5) as an Inherited Collineation Group in the TranslationComplement
Authors: Arrigo Bonisoli, Gábor Korchmáros, Tamás Szönyi
Venue: Designs, Codes and Cryptography (1997)

Finite translation planes having a collineation group isomorphic to SL(2,5) occur in many investigations on minimal normal non-solvable subgroups of linear translation complements. In this paper, we are looking for multiply derived translation planes of the desarguesian plane which have an inherited linear collineation group isomorphic to SL(2,5). The Hall plane and some of the planes discovered by Prohaska [10], see also [1], are translation planes of this kind of order q&sup2;, provided that q is odd and either q&sup2; &equiv; 1 mod 5 or q is a power of 5. In this paper the case q&sup2; &equiv; -1 mod 5 is considered and some examples are constructed under the further hypothesis that either q &equiv; 2 mod 3, or q &equiv; 1 mod 3 and q &equiv; 1 mod 4, or q &equiv; -1 mod 4, 3 &nmid; q and q &equiv; 3,5 or 6 mod 7. One might expect that examples exist for each odd prime power q. But this is not always true according to Theorem 2.
Large-sample theory for standardized time series: an overview
Authors: Peter W. Glynn, Donald L. Iglehart
Venue: Proceedings of the 17th conference on Winter simulation (1985)

There are two basic approaches to constructing confidence intervals for steady-state parameters from a single simul t on run. The fir t s to consistently estimate the variance constant in the relevant central limit theorem. This is the approach used in the regenerative, spectral, and autoregressive methods. The second approach (standardized time series, STS) due to SCHRUBEN [10] is to &ldquo;cancel out&rdquo; the variance constant. This second approach contains the batch means method as a special case. Our goal in this paper is to discuss the large-simple properties of the confidence intervals generated by the STS method. In particular, the asymptotic (as run size becomes large) expected value and variance of the length of these confidence intervals is studied and shown to be inferior to the behavior manifested by intervals constructed using the first approach.
&ldquo;HIS-Treck -- the next generation&rdquo;: an introduction to future hospital information systems
Authors: Thomas L. Lincoln
Venue: Proceedings of the 1994 workshop on New security paradigms (1994)

The shift by health care organizations to integrated care with an outpatient emphasis requires the development of a new generation of multifaceted electronic medical record systems to coordinate these services. This paper introduces the context of present day health care computing to set the stage for Dr. Essin's paper on our proposed paradigm shift from record processing to document processing, using mark up language technologies. We believe that such document oriented systems can be designed to be both distributed and secure with respect to patient and institutional confidentiality.
Twenty-five years of electronic design automation
Authors: A. Richard Newton
Venue: Proceedings of the 25th ACM/IEEE Design Automation Conference (1988)

To commemorate the 25th anniversary of the ACM/IEEE Design Automation Conference, three distinguished colleagues have been invited to present both an historical perspective on the evolution of CAD for electronic systems over the past twenty-five years, and their view of where our industry is headed in the years to come. Each of the speakers has had a major influence on the development of electronic design automation technology. While each speaker has been asked to present a global view, their comments will be colored by their own regional experiences and emphasis.
Concurrent programming CAN be introduced into the lower-level undergraduate curriculum
Authors: Michael B. Feldman, Bruce D. Bachus
Venue: Proceedings of the 2nd conference on Integrating technology into computer science education (1997)

There have been selected cases of satisfactorily teaching undergraduates the topic of concurrent programming. However, these reported experiences did not validate nor invalidate the feasibility claim as they did not provide statistical evidence and validity threat acknowledgments. Prior to this study, there have not been any controlled experiments to address the feasibility of introducing concurrent programming into the curriculum. Unfortunately, in curriculum development, it is seldom that we make decisions based on experimentation. We conducted a controlled experiment to determine whether introducing concurrent programming into the novice or lower-level undergraduate curriculum is possible. The experimental hypotheses examined concurrent programming from a concepts perspective and a problem-solving perspective. We conducted a detailed analysis of both internal and external validity threats to assess not only the validity, but the generalizability of the findings. The findings provide scientific evidence that introducing concurrent programming into the novice or lower-level undergraduate curriculum is possible.
Circuit Placement, Chip Optimization, and Wire Routing for IBMIC Technology
Authors: D. J. Hathaway, R. R. Habra, E. C. Schanzenbach, S. J. Rothman
Venue: Journal of VLSI Signal Processing Systems (1997)

Recent advances in integrated circuit technology have imposed new requirements on the chip physical design process. At the same time that performance requirements are increasing, the effects of wiring on delay are becoming more significant. Larger chips are also increasing the chip wiring demand, and the ability to efficiently process these large chips in reasonable time and space requires new capabilities from the physical design tools. Circuit placement is done using algorithms which have been used within IBM for many years, with enhancements as required to support additional technologies and larger data volumes. To meet timing requirements, placement may be run iteratively using successively refined timing-derived constraints. Chip optimization tools are used to physically optimize the clock trees and scan connections, both to improve clock skew and to improve wirability. These tools interchange sinks of equivalent nets, move and create parallel copies of clock buffers, add load circuits to balance clock net loads, and generate balanced clock tree routes. Routing is done using a grid-based, technology-independent router that has been used over the years to wire chips. There are numerous user controls for specifying router behavior in particular areas and on particular interconnection levels, as well as adjacency restrictions.
WebCT and first year: student reaction to and use of a Web-based resource in first year computer science
Authors: Murray W. Goldberg
Venue: Proceedings of the 2nd conference on Integrating technology into computer science education (1997)

Our previous experiments with the World Wide Web (WWW) as an educational resource focused on a third year Computer Science course. The results were very positive showing a high degree of student satisfaction and improved academic performance. Our intuition, however, made us question whether the same would be true for a first year course given that the students are new to the university environment and often less willing to participate in class. Thus we performed an experiment comparing the difference between third and first year students in their reaction to and use of educational technologies. Overall we have found the use and acceptance of these resources to be higher for our third year students than for our first.
Random Multiple Access Algorithms Using a Control Mini-Slot
Authors: Dimitri Kazakos, Lazaros F. Merakos, Hakan Deliç
Venue: IEEE Transactions on Computers (1997)

The multiple access problem as characterized by infinite user population and a slotted-time channel is examined, and an algorithm that utilizes a control mini-slot is proposed. The stability region of the proposed algorithm is determined and compared to the random access algorithm with the highest known throughput. A break-even point is also given.
Tupling calculation eliminates multiple data traversals
Authors: Zhenjiang Hu, Hideya Iwasaki, Masato Takeichi, Akihiko Takano
Venue: ACM SIGPLAN Notices (1997)

Tupling is a well-known transformation tactic to obtain new efficient recursive functions by grouping some recursive functions into a tuple. It may be applied to eliminate multiple traversals over the common data structure. The major difficulty in tupling transformation is to find what functions are to be tupled and how to transform the tupled function into an efficient one. Previous approaches to tupling transformation are essentially based on fold/unfold transformation. Though general, they suffer from the high cost of keeping track of function calls to avoid infinite unfolding, which prevents them from being used in a compiler.To remedy this situation, we propose a new method to expose recursive structures in recursive definitions and show how this structural information can be explored for calculating out efficient programs by means of tupling. Our new tupling calculation algorithm can eliminate most of multiple data traversals and is easy to be implemented.