ppxscal/embedding_network huggingface dataset:
ET++&mdash;an object oriented application framework in C++
Authors: Andre Weinand, Erich Gamma, Rudolf Marty
Venue: ACM SIGPLAN Notices (1988)

ET++ is an object-oriented application framework implemented in C++ for a UNIX&dagger; environment and a conventional window system. The architecture of ET++ is based on MacApp and integrates a rich collection of user interface building blocks as well as basic data structures to form a homogeneous and extensible system. The paper describes the graphic model and its underlying abstract window system interface, shows composite objects as a substrate for declarative layout specification of complex dialogs, and presents a model for editable text allowing the integration of arbitrary interaction objects.
Achieving High Availability in Distributed Databases
Authors: Hector Garcia-Molina, Boris Kogan
Venue: IEEE Transactions on Software Engineering (1988)

An approach is presented for managing distributed database systems in the face of communication failures and network partitions. The approach is based on the idea of dividing the database into fragments and assigning each fragment a controlling entity called an agent. The goals achieved by this approach include high data availability and the ability to operate without promptly and correctly detecting partitions. A correctness criterion for transaction execution, called fragmentwise serializability, is introduced. It is less strict than the conventional serializability, but provides a valuable alternative for some applications.
Parallel expert system search techniques for a real-time application
Authors: G. B. Lamont, D. J. Shakley
Venue: Proceedings of the third conference on Hypercube concurrent computers and applications - Volume 2 (1989)

Expert systems are being used to govern the intelligent control of the Robotic Air Vehicle (RAV) which is currently a research project at the Air Force Avionics Laboratory. Due to the nature of the RAV system the associated expert system needs to perform in a demanding real-time environment. The use of a parallel processing capability to support the associated computational requirement may be critical in this application. Thus, parallel search algorithms for real-time expert systems are designed, analyzed and synthesized on the Texas Instruments (TI) Explorer and Intel Hypercube. Examined is the process involved with transporting the RAV expert systems from the TI Explorer, where they are implemented in the Automated Reasoning Tool (ART), to the iPSC Hypercube, where the system is synthesized using Concurrent Common LISP. The performance characteristics of the parallel implementation of these expert systems on the iPSC Hypercube are compared to the TI Explorer implementation.
Memory conflicts and machine performance
Authors: P. Tang, R. H. Mendez
Venue: Proceedings of the 1989 ACM/IEEE conference on Supercomputing (1989)

The data transfer capacity of a vector machine is a critical factor influencing the performance of the machine. The capacity is a function of several hardware and software parameters: the bandwidth of the crossing network between processing unit and memory, the number of independent memory modules, memory access configuration, types of vector operations, and the number of access ports in-use. Memory contention occurs in a multiple access port vector machine. When long vector operation performed, the machine efficiency is just the same as the efficiency of data transfer between memory and processing unit. A random bank choice model is proposed to analyze the memory contention and its influence on machine performance. The data obtained by the model are compared with the test results on the Cray X-MP and Y-MP, and the Ardent TITAN graphic minisupercomputers. The comparisons show that the modeling data and the test results match very well. One interesting conclusion from this model is that to preserve a constant level of memory access efficiency the number of independent memory banks should be proportional to the clocks of a memory active cycle as well as to the number of access ports.
Learning from Examples: Generation and Evaluation of Decision Trees for Software Resource Analysis
Authors: R. W. Selby, A. A. Porter
Venue: IEEE Transactions on Software Engineering (1988)

A general solution method for the automatic generation of decision (or classification) trees is investigated. The approach is to provide insights through in-depth empirical characterization and evaluation of decision trees for one problem domain, specifically, that of software resource data analysis. The purpose of the decision trees is to identify classes of objects (software modules) that had high development effort, i.e. in the uppermost quartile relative to past data. Sixteen software systems ranging from 3000 to 112000 source lines have been selected for analysis from a NASA production environment. The collection and analysis of 74 attributes (or metrics), for over 4700 objects, capture a multitude of information about the objects: development effort, faults, changes, design style, and implementation style. A total of 9600 decision trees are automatically generated and evaluated. The analysis focuses on the characterization and evaluation of decision tree accuracy, complexity, and composition. The decision trees correctly identified 79.3% of the software modules that had high development effort or faults, on the average across all 9600 trees. The decision trees generated from the best parameter combinations correctly identified 88.4% of the modules on the average. Visualization of the results is emphasized, and sample decision trees are included.
The kernel of Modula-2 integrated environment
Authors: Z. Guoliang, Z. Chengxiang
Venue: ACM SIGSOFT Software Engineering Notes (1988)

Integrated method is one of the effective methods to improve the efficiency of the software engineering environment. This paper describes the design of a Modula-2 integrated environment and its kernel environment which is implemented on IBM/PC-AT in Modula-2 language itself. The kernel environment supports incremental compiling and separate debugging of Modula-2 programs. It also supports the integration of the editor and the debugger. It is hoped that the whole Modula-2 integrated environment can be implemented based on the kernel environment and the environment information data base.
A New Spectral Test for Nonrandomness and the DES
Authors: Frank A. Feldman
Venue: IEEE Transactions on Software Engineering (1990)

A test for detecting the nonrandomness of finite binary strings is proposed. This test, based on an evaluation of the power spectrum of a finite string, extends and quantifies a similar test proposed by J. Gait.As an empirical measure of the sensitivity of the test, it was compared with a chi-square test for uniformity of distribution, which also measures nonrandomness. This comparison was performed by applying each of these tests to binary strings produced using short-round versions of the data encryption standard (DES) in output-feedback mode. By varying the number of DES rounds from 1 to 16, it was possible to gradually vary the degree of randomness of the resulting strings. The degree of randomness of the DES, including the 15 short-round versions, was also assessed. Only ensembles generated by one and two round versions were rejected as random.
The complexity of many faces in arrangements of lines of segments
Authors: H. Edelsbrunner, L. J. Guibas, M. Sharir
Venue: Proceedings of the fourth annual symposium on Computational geometry (1988)

We show that the total number of edges of m faces of an arrangement of n lines in the plane is &Ogr;(m2/3-&dgr; n2/3+2&dgr; + n), for any &dgr; > 0. The proof takes an algorithmic approach, that is, we describe an algorithm for the calculation of these m faces and derive the upper bound from the analysis of the algorithm. The algorithm uses randomization and, with high probability, its time complexity is within a log2n factor of the above bound. If instead of lines we have an arrangement of n line segments, then the maximum number of edges of m faces is Ogr;(m2/3-&dgr;n2/3+2&dgr; + n&agr;(n)logm), for any &dgr; > 0, where &agr;(n) is the functional inverse of Ackermann's function. We give a (randomized) algorithm that produces these faces and, with high probability, takes time that is within a log2n factor of the combinatorial bound.
Scripting applications in the public administration domain
Authors: Gerti Kappel, Jan Vitek, Oscar m. Nierstrasz, Betty Junod, Marc Stadelmann
Venue: ACM SIGOIS Bulletin (1989)

Scripting is an approach for constructing open applications from prepackaged software components. A scripting model characterizes and standardizes the interconnection interfaces of software components appropriate to an application domain. We present a scripting model for the domain of public administration applications, and we provide a scenario of scripting applications in this domain. This scripting model is being incorporated into a prototype visual scripting tool which provides a graphical editing facility for interactively scripting applications.
Hierarchical Interconnection Networks for Multicomputer Systems
Authors: Sivarama P. Dandamudi, D. L. Eager
Venue: IEEE Transactions on Computers (1990)

A performance analysis of a class of hierarchical interconnection networks is presented. The analysis includes both static analysis (i.e. queueing delays are neglected) and queueing analysis. In both cases, the hierarchical networks are shown to have better cost-benefit ratios. The queueing analysis is also validated by several simulation experiments. The impact of two performance enhancement schemes-replication of links and improved routing algorithms-on hierarchical interconnection network performance is also presented.
Adaptive Load Control of the Central Processor in a Distributed System with a Star Topology
Authors: A. Kumar
Venue: IEEE Transactions on Computers (1989)

The author presents adaptive control techniques for controlling the flow of real-time jobs from the peripheral processors (PPs) to the central processor (CP) of a distributed system with a star topology. He considers two classes of flow control mechanisms: (1) proportional control, where a certain proportion of the load offered to each PP is sent to the CP, and (2) threshold control, where there is a maximum rate at which each PP can send jobs to the CP. The problem is to obtain good algorithms for dynamically adjusting the control level at each PP in order to prevent overload of the CP, when the load offered by the PPs is unknown and varying. The author formulates the problem approximately as a standard system control problem in which the system has unknown parameters that are subject to change. Using well-known techniques (e.g. naive-feedback-controller and stochastic approximation techniques), he derives adaptive controls for the system control problem. He demonstrates the efficacy of these controls in the original problem by using the control algorithms in simulations of a queuing model of the CP and the load controls.
Parallel scheduling of recursively defined arrays
Authors: Thomas J. Myers, Maya B. Gokhale
Venue: Journal of Symbolic Computation (1988)

This paper describes a new method of automatic generation of concurrent programs which construct arrays defined by sets of recursive equations. We assume that the time of computation of an array element is a linear combination of its indices, and we use integer programming to seek a succession of hyperplanes along which array elements can be computed concurrently. The method can be used to schedule equations involving variable length dependency vectors and mutually recursive arrays. Portions of the work reported here have been implemented in the PS automatic program generation system.
Embedding triple-modular redundancy into a hypercube architecture
Authors: D. l. Kiskis, K. G. Shin
Venue: Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1 (1988)

This paper describes an embedding of Triple Modular Redundancy (TMR) into a binary hypercube. The goal is to improve fault tolerance by masking any single-point faults. Each module of an application task is triplicated and executed in parallel on three nodes of a 2-dimensional subcube (Q2) of the hypercube. Each of these nodes also executes a voter process. The remaining node is used for message passing only. All outputs from the triplicated modules are voted on, and the voting results are transmitted to the appropriate destination. Thus, all interunit messages are also triplicated. We propose an embedding of TMR into a hypercube which can be implemented in a manner transparent to the application program. Subcubes are allocated so that the address space for the TMR units is also a hypercube. Hence, the subcube allocation and intermodule communication schemes are defined to be analogous to the schemes used in the nonredundant system. The embedded system is proven to mask all single-point faults.
Facilitating connectivity in composite information systems
Authors: Richard Wang, Stuart E. Madnick
Venue: ACM SIGMIS Database (1989)

Timely access to multiple disparate databases which were independently developed and administered to produce composite information has become increasingly critical for organizations to gain competitive advantage. However, many inter-database problems such as inconsistency, ambiguity, and contradiction remain unresolved. This paper presents an approach for resolving these problems. The techniques employed in this approach include schema integration, inter-database tables, attribute subsetting, object hierarchies, and heuristic rules. Schema integration techniques resolve the incompatibilities among the databases at the schema level. Inter-database tables resolve the semantic inconsistency and concept granularity at the instance value level. The inter-database instance identification table identifies an instance across databases. Object hierarchies represent schemata as well as instances. Finally, heuristic rules are used to facilitate the construction of the inter-database instance identification table and the production of composite information.
Teaching programming to conversion course students
Authors: J. S. Briggs
Venue: ACM SIGCSE Bulletin (1989)

This paper describes the author's experiences of teaching introductory programming and elements of software engineering to a group of students on a one year conversion course. It addresses how topics such as program design, programming in the large and program readability are taught. None of the students on the course have computing or engineering backgrounds.
A graph transform model for configuration management environments
Authors: Dennis Heimbigner, Steven Krane
Venue: ACM SIGPLAN Notices (1989)

A model for software configuration management that subsumes several existing systems is described. It is patterned after compiler models in which programs are transformed by multiple phases ending in an executable program. We model configuration management as transforming a high-level specification of a software product to be produced into a complete specification capable of being executed to construct the product. This transformational approach is used to model four existing systems and to compare and contrast their operation.
Run-time checking in Lisp by integrating memory addressing and range checking
Authors: M. Sato, S. Ichikawa, E. Goto
Venue: ACM SIGARCH Computer Architecture News (1989)

This paper describes the BL addressing mode and the address tag in FLATS2 machine, which is a general-purpose MIMD computer now under construction. The BL addressing mode integrates memory accessing and range checking by hardware. Address tag is a bit in word, which indicates the capability for memory access. Combining them together, efficient memory protection is provided at run-time. It reduces the cost of run-time type checking in Lisp by checking the address tag and the address of a pointer against the range of the region associated to a type, in parallel with the memory access. The arithmetic instructions check the address tags of operands to support the generic arithmetic in Lisp. We can also make use of this scheme to check the number of arguments and multiple return values and to check array-bounds to support faster execution of Common Lisp program. These facilities are not specific to Lisp, so that they can be used more generally than other tagged architectures.
EDGE - a graph based tool for specifying interaction
Authors: Michael F. Kleyn, Indranil Chakravarty
Venue: Proceedings of the 1st annual ACM SIGGRAPH symposium on User Interface Software (1988)

This paper describes a new methodology for specifying and constructing complex interaction dialogs for the design of user interfaces. The method is new in that it promotes a decomposition of the interaction in terms of events in AND/OR graphs called Event-Decomposition Graphs (EDG). These Event-Decomposition Graphs can be progressively refined to capture the detailed semantics of the dialog. Multithreaded interaction can be composed by joining several Event-Decomposition Graphs together in a systematic way. In this paper we present a design tool for specifying and analyzing Event-Decomposition Graphs, and show that the combination of the notation and tool combines many of the capabilities of Context-Free Grammar- and Event-Notations while still providing the graphical view of Transition Network diagrams.
A Parallel Algorithm for Solving Sparse Triangular Systems
Authors: C.-W. Ho, R. C. T. Lee
Venue: IEEE Transactions on Computers (1990)

A fast parallel algorithm, which is generalized from the parallel algorithms for solving banded linear systems, is proposed to solve sparse triangular systems. The original problem is transformed into a directed graph. The solving procedure then consists of eliminating edges in this graph. The worst-case time-complexity of this parallel algorithm is O(log/sup 2/n) where n is the size of the coefficient matrix. When the coefficient matrix is a triangular banded matrix with bandwidth m, then the time-complexity of the algorithm is O(log(m)*log(n)).
Supercomputers on the internet: a case study
Authors: C. Kline
Venue: Proceedings of the ACM workshop on Frontiers in computer communications technology (1987)

This paper will discuss the design of a TCP/IP implementation and its upper level protocols on the University of Illinois supercomputer. We will also discuss some of the issues peculiar to TCP communication with a supercomputer, and some of the special problems encountered while writing and debugging under CTSS, which is not an environment particularly conducive to network development.
Verifying partial orders
Authors: C. Kenyon-Mathieu, V. King
Venue: Proceedings of the twenty-first annual ACM symposium on Theory of computing (1989)

We present a randomized algorithm which uses O(n(log n)1/3) expected comparisons to verify that a given partial order holds on n elements from an unknown total order.
Composing User Interfaces with InterViews
Authors: Mark A. Linton, John M. Vissides, Paul R. Calder
Venue: Computer (1989)

The authors describe a user interface toolkit, InterViews, that offers a rich set of composition mechanisms and a variety of predefined objects, allowing easy implementation of complex user interfaces. InterViews supports composition of three object categories, each implemented as a hierarchy of object classes derived from a common base class. The categories are interactive objects, structured graphics objects, and structured text objects. The authors present several simple applications and show how InterViews objects can implement their interfaces. They illustrate the benefits of separating interactive behavior and abstract data in several different contexts. They discuss InterViews support for end-user customization as well as the status of the current implementation.
What have we learnt from using real parallel machines to solve real problems?
Authors: G. C. Fox
Venue: Proceedings of the third conference on Hypercube concurrent computers and applications - Volume 2 (1989)

We briefly review some key scientific and parallel processing issues in a selection of some 84 existing applications of parallel machines. We include the MIMD hypercube transputer array, BBN Butterfly, and the SIMD ICL DAP, Goodyear MPP and Connection Machine from Thinking Machines. We use a space-time analogy to classify problems and show how a division into synchronous, loosely synchronous and asynchronous problems is helpful. This classifies problems into those suitable for SIMD or MIMD machines and isolates the asynchronous class as that for which major uncertainties as to possible parallelism exist. Interestingly about half of the scientific applications run excellently on SIMD machines with the other half able to take especial advantage of the MIMD architecture.
ORCA a sea-of-gates place and route system
Authors: M. Igusa, M. Beardslee, A. Sangiovanni-Vicentelli
Venue: Proceedings of the 26th ACM/IEEE Design Automation Conference (1989)

Sea-of-gates is becoming an important design style for Application Specific Integrated Circuits (ASICs). The sea-of-gates technology offers more flexible placement and routing options not available in gate arrays. Very few systems are available today that can automatically layout sea-of-gates and none of these systems effectively use the features available in sea-of-gates architecture. ORCA is a place and route system for sea-of-gates, whose objective is to produce the highest density layout by fully exploiting the inherent features of this new design style. The ORCA system starts with a module generator which preprocesses memory arrays and other logic with a regular structure to form high density macros. The remaining logic is clustered together to form flexible macros, which we call porous. The porous macro-cells allow global routing to pass through the macro instead of detouring around its perimeter. The porous macros are dynamically shaped and resized by interaction with global wiring analysis. Finally, a general channelless area router has been developed to address the multiple layers of interconnect and routing areas which will be dominantly over-the-cell. Due to the large size of the problem (e.g. 100,000 gates), the placement and routing algorithms are hierarchical.
Grammars for FFP
Authors: J. E. Lang
Venue: ACM SIGPLAN Notices (1988)

In Backus's original paper on FP and FFP [1], the syntax of these language is described informally. Though a formal syntax for Berkeley FP has appeared in print [2], no formal representation of FFP syntax has yet appeared. It is desirable to have such a formal representation for implementation purposes, and such a representation may also be useful for specifying where the syntax of FFP ends and its semantics begins. In this paper, we will write down formal grammars for FFP based on the syntax as given by Backus [1] and Williams [3] and will discuss their semantic implications. A third grammar similar to that for FP is presented and it may be used for implementing the language.