ppxscal/embedding_network huggingface dataset:
The Size of the Giant Component of a Random Graph with a Given Degree Sequence
Authors: Michael Molloy, Bruce Reed
Venue: Combinatorics, Probability and Computing (1998)

Given a sequence of nonnegative real numbers &lambda;0, &lambda;1, &hellip; that sum to 1, we consider a random graph having approximately &lambda;in vertices of degree i. In [12] the authors essentially show that if &sum;i(i&minus;2)&lambda;i>0 then the graph a.s. has a giant component, while if &sum;i(i&minus;2)&lambda;i<0 then a.s. all components in the graph are small. In this paper we analyse the size of the giant component in the former case, and the structure of the graph formed by deleting that component. We determine ε, &lambda;&prime;0, &lambda;&prime;1 &hellip; such that a.s. the giant component, C, has εn+o(n) vertices, and the structure of the graph remaining after deleting C is basically that of a random graph with n&prime;=n&minus;&#x2223;C&#x2223; vertices, and with &lambda;&prime;in&prime; of them of degree i.
Encryption overhead in embedded systems and sensor network nodes: modeling and analysis
Authors: Ramnath Venugopalan, Prasanth Ganesan, Pushkin Peddabachagari, Alexander Dean, Frank Mueller, Mihail Sichitiu
Venue: Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems (2003)

Recent research in sensor networks has raised issues of security for small embedded devices. Security concerns are motivated by the deployment of a large number of sensory devices in the field. Limitations in processing power, battery life, communication bandwidth and memory constrain the applicability of existing cryptography standards for small embedded devices. A mismatch between wide arithmetic for security (32 bit word operations) and embedded data bus widths (often only 8 or 16 bits) combined with lack of certain operations (e.g., multiply) in the ISA present other challenges.This paper offers two contributions. First, a survey investigating the computational requirements for e a number of common cryptographic algorithms and embedded architectures is presented. The objective of this work is to cover a wide class of commonly used encryption algorithms and to determine the impact of embedded architectures on their performance. This will help designers predict a system's performance for cryptographic tasks. Second, methods to derive the computational overhead of embedded architectures in general for encryption algorithms are developed. This allows one to project computational limitations and determine the threshold of feasible encryption schemes under a set of the constraints for an embedded architecture.Experimental measurements indicate uniform cryptographic cost for each encryption class and each architecture class and negligible impact of caches. RC4 is shown to outperform RC5 for the Atmega platform. But when message authentication is required in addition to encryption, hash or block ciphers, such as RC5, have the advantage of providing support for both authentication and encryption. The analytical model allows to assess the impact of arbitrary embedded architectures as a multi-variant function for each encryption scheme. Overall, our results are not only valuable to assess the feasibility of encryption schemes for existing embedded architectures, they also extend to assess the feasibility of encryption methods for new algorithms and architectures for sensor systems.
Array Regrouping and Its Use in Compiling Data-Intensive Embedded Applications
Authors: Victor De La Luz, Mahmut Kandemir
Venue: IEEE Transactions on Computers (2004)

Abstract--One of the key challenges facing computer architects and compiler writers is the increasing discrepancy between processor cycle times and main memory access times. To alleviate this problem in array-intensive embedded signal and video processing applications, compilers may employ either control-centric transformations that change data access patterns of nested loops or data-centric transformations that modify memory layouts of multidimensional arrays. Most of the memory layout optimizations proposed so far either modify the layout of each array independently or are based on explicit data reorganizations at runtime. This paper focuses on a compiler technique, called array regrouping, that automatically maps multiple arrays into a single data (array) space to improve data access pattern. We present a mathematical framework that enables us to systematically derive suitable mappings for a given array-intensive embedded application. The framework divides the arrays accessed in a given program into several groups and each group is independently layout-transformed to improve spatial locality and reduce the number of conflict misses. As compared to the previous approaches, the proposed technique makes two new contributions: 1) It presents a graph based formulation of the array regrouping problem and 2) it demonstrates potential benefits of this aggressive array-regrouping strategy in optimizing behavior of embedded systems. Extensive experimental results demonstrate significant improvements in cache miss rates and execution times. An important advantage of this approach over the previous techniques that target conflict misses is that it reduces conflict misses without increasing the data space requirements of the application being optimized. This is a very desirable property in many embedded/portable environments where data space requirements determine the minimum physical memory capacity. In addition to performance related issues, with the increased use of embedded/portable devices, improving energy efficiency of applications is becoming a critical issue. To develop a truly energy-efficient system, energy constraints should be taken into account early in the design process, i.e., at the source level in software compilation and behavioral level in hardware compilation. Source-level optimizations are particularly important in data-dominated media applications. In this paper, we also show how our array regrouping strategy increases energy savings from using multiple low-power operating modes provided in current memory modules. Using a set of array-intensive benchmarks, we observe significant savings in memory system energy.
Determinization of finite state weighted tree automata
Authors: Björn Borchardt, Heiko Vogler
Venue: Journal of Automata, Languages and Combinatorics (2003)

We investigate the determinization of nondeterministic bottom-up/top-down finite state weighted tree automata over some semiring A and compare the resulting four classes of formal tree series with each other. In particular, for every bottom-up finite state weighted tree automaton over some semifield (i.e., a semiring which contains a multiplicative inverse for every nonzero element) we construct a deterministic bottom-up weighted tree automaton. This construction is called partial determinization, because it may lead to an automaton with an infinite set of states. We prove sufficient conditions under which the partial determinization produces a bottom-up finite state weighted tree automaton which is equivalent to the original one. Using this partial determinization we generalize well known theorems on classes of tree languages (cf. [14] Chapter II, Theorems 2.6 and 2.10, Example 2.11), viz if A is a commutative and locally finite semifield, then (i) nondeterministic bottom-up, (ii) deterministic bottom-up, and (iii) nondeterministic top-down finite state weighted tree automata are equally powerful. Moreover, if the input alphabet is not trivial, then deterministic top-down finite state weighted tree automata are strictly less powerful than the aforementioned classes.
12k: between two points
Authors: Philip Sherburne
Venue: Organised Sound (2001)

K-k-k-k-k-k. Boof. Chhhhhhh. Hiss, whirr, pfing: 12k's is an onomatopoeic music. The audio equivalent of concrete poetry perhaps, where the sign (there, a letter or a word; here, a click or thud or tone) is elephantised, blown out of proportion, simultaneously stripped of reference and fraught with multivalent meaning. (Is it any coincidence that 12k founder Taylor Deupree is a graphic designer? You can almost hear the flip of a serif in 12k's grainy whoosh, or the nuzzling of kiss-kerned type in the cool brush of two bleeps.) In the releases of this Brooklyn label, notes, pulses, textures bear no immediate relation to the world around them, to a language of melody or tonal narrative, but in their careful melding of pulse and grain, they sketch an abstracted narrative of the development of several phenomena: electronic music, desktop DIY, and -especially -minimalism.
Maximum Statistics of N Random Variables Distributed by the Negative Binomial Distribution
Authors: Peter J. Grabner, Helmut Prodinger
Venue: Combinatorics, Probability and Computing (1997)

The lifetime of a player is defined to be the time where he gets his b-th hit, where a hit will occur with probability p. We consider the maximum statistics of N independent players. For b&ne;1 this is significantly more difficult than the known instance b=1. The expected value of the maximum lifetime of N players is given by logQ N+(b&minus;1)logQ logQ N+ smaller order terms, where Q=1&#x002F;(1&minus;p).
Science of computing suite (SOCS): resources for a breadth-first introduction
Authors: Carl Burch, Lynn Ziegler
Venue: Proceedings of the 35th SIGCSE technical symposium on Computer science education (2004)

Over the last ten years, our department's breadth-first introductory course has evolved independently of other survey courses in computer science. Due to its success, we duplicated the ideas into our course for non-majors, and this has also proven successful. None of the published resources match our vision for these courses, and so the department has developed its own. In this paper, we describe the design of the majors course, and we introduce a variety of resources developed for both courses. These resources, which could be useful in many other courses also, are freely available through the Web.
The Impact of Technology on Product Design, Productivity, and Profits: A Duopoly Model of Price-Quality Competition
Authors: Matt E. Thatcher
Venue: Proceedings of the Proceedings of the 37th Annual Hawaii International Conference on System Sciences (HICSS'04) - Track 8 - Volume 8 (2004)

This paper develops a two stage economic model of duopoly competition to examine the impact of technology investments in product design tools on product quality and price, firm productivity and profits, and consumer welfare. In the first stage the firms simultaneously choose product quality and in the second stage, after observing each other's quality choices, the firms simultaneously set prices. This model captures the firm's option to leverage technology tools to improve product quality and tracks the effect of such quality adjustments on measures of firm performance and consumer welfare. More specifically, the findings show that profit-maximizing firms will leverage technology-based design tools to improve product quality, resulting in higher levels of firm profits and consumer welfare; however, these improvements come at the expense of productivity. Alternatively, the findings show that firms that fail to improve quality, and instead leverage the tools to reduce production costs, will realize higher levels of productivity; however, this improvement in productivity comes at the expense of profits and consumer welfare. The results of the analytical model cast a new light on why it may be reasonable to empirically observe reductions in firm productivity following investments in IT tools that improve production capabilities.
The Use Patterns of Large, Interactive Display Surfaces: Case Studies of Media Design and Use for BlueBoard and MERBoard
Authors: Daniel M. Russell, Jay P. Trimble, Andreas Dieberger
Venue: Proceedings of the Proceedings of the 37th Annual Hawaii International Conference on System Sciences (HICSS'04) - Track 4 - Volume 4 (2004)

During the past several years we have been developing large, interactive display surfaces for collaboration uses in a variety of work settings. People in small work groups can easily create, annotate and share media with their partners. The Blueboard, developed at IBM Research, is a large display system for groups to use in exchanging information in a lightweight, informal collaborative way. It began as a large, ubiquitously placed display surface for walk-by use in a corporate setting and has evolved in response to task demands and user needs. At NASA, the MERBoard is being designed to support surface operations for theupcoming Mars Exploration Rover Missions. The MERBoard extends the design to support thecollaboration requirements for viewing, annotating, linking and distributing information for the science and engineering teams that will operate two rovers on the surface of Mars.Here we examine differing implementations of the same idea: a collaborative information tool that began from the same design goals, but which grew into somewhat different systems under the evolutionary pressures of the NASA and IBM task environments. Lessons about how media are designed, task requirements for collaborative use, information flow requirements and work practice drive the evolution of a system are illustrated.
A self-stabilizing quorum-based protocol for maxima computing
Authors: Yiwei Chiao, Masaaki Mizuno, Mitchell L. Neilsen
Venue: Distributed Computing (2002)

The goal of decentralized consensus protocols is to exchange information among nodes so that each node acquires the information held by every other node in the system. This paper presents a quorum-based, self-stabilizing maxima finding protocol which is based on a decentralized consensus protocol. The protocol exchanges information with less delay than existing ring-based, self-stablizing protocols. Furthermore, quorums can be composed, and the resulting composite quorums can be used to efficiently obtain a solution for any internetwork.
A General Alternative Procedure for Solving Negative Degree of Difficulty Problems in Geometric Programming
Authors: J. L. Alejandre, Ana Allueva, Jose Miguel Gonzalez
Venue: Computational Optimization and Applications (2004)

The degree of difficulty is an important concept in classical geometric programming theory. The dual problem is often infeasible when the degree of difficulty is negative and little has been published on this topic. In this paper, an alternative procedure is developed to find the optimal solution for the posynomial geometric programming problem with a negative degree of difficulty. First an equivalent problem was constructed with a positive degree of difficulty and the general posynomial geometric programming problem was solved using an original method previously developed by the authors. This method avoids the difficulty of non-differentiability of the dual objective function in the classical methods classified as dual. It also avoids the problem that appears when the feasible region for the dual problem is formed by an inconsistent system of linear equations.
Classifying large data sets using SVMs with hierarchical clusters
Authors: Hwanjo Yu, Jiong Yang, Jiawei Han
Venue: Proceedings of the ninth ACM SIGKDD international conference on Knowledge discovery and data mining (2003)

Support vector machines (SVMs) have been promising methods for classification and regression analysis because of their solid mathematical foundations which convery several salient properties that other methods hardly provide. However, despite the prominent properties of SVMs, they are not as favored for large-scale data mining as for pattern recognition or machine learning because the training complexity of SVMs is highly dependent on the size of a data set. Many real-world data mining applications involve millions or billions of data records where even multiple scans of the entire data are too expensive to perform. This paper presents a new method, Clustering-Based SVM (CB-SVM), which is specifically designed for handling very large data sets. CB-SVM applies a hierarchical micro-clustering algorithm that scans the entire data set only once to provide an SVM with high quality samples that carry the statistical summaries of the data such that the summaries maximize the benefit of learning the SVM. CB-SVM tries to generate the best SVM boundary for very large data sets given limited amount of resources. Our experiments on synthetic and real data sets show that CB-SVM is highly scalable for very large data sets while also generating high classification accuracy.
Implementing the shared event paradigm: architecture, issues and lessons learned
Authors: Dirk Trossen, Erik Molenaar
Venue: Information management: support systems & multimedia technology (2003)

Shared collaboration between distributed users gains more importance due to the globalization of organizations and institutions. Besides exchanging audiovisual data, sharing spreadsheets or graphics is of utmost importance, especially in scenarios for tele-working or tele-education. Although the Internet has gained more ground in our daily work, most applications nowadays are not prepared for shared collaboration, and it is expected that this non-awareness of distribution will remain persistent for most of the applications. For that, application-sharing technologies have been developed to encounter the problem sharing these kinds of applications among a set of distributed users. Two different paradigms to realize application sharing can be distinguished, namely sharing the application's output or the application's evolving state. In this chapter, the realization of an application-sharing service is presented, based on the latter paradigm, which is mostly suited for closed development or teaching scenarios. The requirements for the service as well as its realization are outlined, together with the lessons we learned from this realization.
High-Speed, Low-Complexity Systolic Designs of Novel Iterative Division Algorithms in GF(2^m)
Authors: Chien-Hsing Wu, Chien-Ming Wu, Ming-Der Shieh, Yin-Tsung Hwang
Venue: IEEE Transactions on Computers (2004)

Abstract--We extend the binary algorithm invented by Stein and propose novel iterative division algorithms over {\rm GF}(2^m) for systolic VLSI realization. While Algorithm EBg is a basic prototype with guaranteed convergence in at most 2m-1 iterations, its variants, Algorithms EBd and EBdf, are designed for reduced complexity and fixed critical path delay, respectively. We show that Algorithms EBd and EBdf can be mapped to parallel-in parallel-out systolic circuits with low area-time complexities of {\rm O}(m^2\log\log m) and {\rm O}(m^2), respectively. Compared to the systolic designs based on the extended Euclid's algorithm, our circuits exhibit significant speed and area advantages.
On-chip communication: system-level architectures and design methodologies
Authors: Kanishka Lahiri
Venue:  (2003)

The rapidly growing number and variety of components integrated onto a single System-on-Chip is resulting in an unprecedented increase in the volume and diversity of on-chip communication traffic. However, as technology scales into the deep submicron era, chip-level communication structures are challenged by large propagation delays, signal integrity problems, and increased power consumption. Consequently, the design of the on-chip communication architecture is expected to play a significant role in determining several system-wide metrics, such as overall system performance, power consumption, and battery life. However, state-of-the-art system design methodologies, tools, and architectures are not sufficiently geared towards handling the increasing role of on-chip communication. This thesis introduces the on-chip communication architecture as a primary concern in system-level design. It addresses challenges in communication architecture design from the standpoint of methodologies and architectures for high-performance and battery-efficient System-on-Chips. The specific contributions of this thesis include: (i) system-level performance and power analysis techniques to drive the design of the communication architecture, (ii) techniques for customizing the communication architecture to characteristics of the communication traffic generated by the application, (iii) techniques for run-time adaptation of on-chip communication protocols, and (iv) a communication-based, system-level power management methodology for the design of battery-efficient systems. Experiments conducted on variety of System-on-Chip designs demonstrate that incorporation of the developed techniques into the system design process enables significant improvements in design metrics such as performance and/or battery life. In addition, the techniques described in this thesis will go a long way in facilitating research and development of design methodologies for systems based on the emerging &ldquo;network-on-chip&rdquo; paradigm.
On augmented Lagrangians for Optimization Problems with a Single Constraint
Authors: R. N. Gasimov, A. M. Rubinov
Venue: Journal of Global Optimization (2004)

We examine augmented Lagrangians for optimization problems with a single (either inequality or equality) constraint. We establish some links between augmented Lagrangians and Lagrange-type functions and propose a new kind of Lagrange-type functions for a problem with a single inequality constraint. Finally, we discuss a supergradient algorithm for calculating optimal values of dual problems corresponding to some class of augmented Lagrangians.
On the call-by-value CPS transform and its semantics
Authors: Carsten Führmann, Hayo Thielecke
Venue: Information and Computation (2004)

We investigate continuations in the context of idealized call-by-value programming languages. On the semantic side, we analyze the categorical structures that arise from continuation models of call-by-value languages. On the syntactic side, we study the call-by-value continuation-passing transformation as a translation between equational theories. Among the novelties are an unusually simple axiomatization of control operators and a strengthened completeness result with a proof based on a delaying transform.
On distributed system management
Authors: Germán Goldszmidt
Venue: Proceedings of the 1993 conference of the Centre for Advanced Studies on Collaborative research: distributed computing - Volume 2 (1993)

Device failures, performance inefficiencies, improper allocation of resources, security compromises, and accounting are some of the problems associated with the operations of distributed systems. Effective management requires monitoring, interpreting and controlling the behavior of the distributed system resources, both hardware and software. Current management systems pursue a platform-centered paradigm, where agents monitor the system and collect data, which can be accessed by applications via management protocols. Some of the fundamental limitations of this paradigm include limited scalability, micromanagement, and semantic heterogeneity. We propose an alternative model, Management by Delegation, and contrast its properties via an application example, evaluating the health of a Distributed System.