ppxscal/embedding_network huggingface dataset:
Static and Dynamic Configurable Systems
Authors: Eduardo Sanchez, Jacques-Olivier Haenni, Jean-Luc Beuchat, André Stauffer, Andrés Perez-Uribe, Moshe Sipper
Venue: IEEE Transactions on Computers (1999)

Field-programmable gate arrays (FPGAs) are large, fast integrated circuits¿that can be modified, or configured, almost at any point by the end user. Within the domain of configurable computing, we distinguish between two modes of configurability: static¿where the configurable processor's configuration string is loaded once at the outset, after which it does not change during execution of the task at hand, and dynamic¿where the processor's configuration may change at any moment. This paper describes four applications in the domain of configurable computing, considering both static and dynamic systems, including: SPYDER (a reconfigurable processor development system), RENCO (a reconfigurable network computer), Firefly (an evolving machine), and the BioWatch (a self-repairing watch). While static configurability mainly aims at attaining the classical computing goal of improving performance, dynamic configurability might bring about an entirely new breed of hardware devices¿ones that are able to adapt within dynamic environments.
A fast Fourier transform compiler
Authors: Matteo Frigo
Venue: ACM SIGPLAN Notices (1999)

The FFTW library for computing the discrete Fourier transform (DFT) has gained a wide acceptance in both academia and industry, because it provides excellent performance on a variety of machines (even competitive with or faster than equivalent libraries supplied by vendors). In FFTW, most of the performance-critical code was generated automatically by a special-purpose compiler, called genfft, that outputs C code. Written in Objective Caml, genfft can produce DFT programs for any input length, and it can specialize the DFT program for the common case where the input data are real instead of complex. Unexpectedly, genfft "discovered" algorithms that were previously unknown, and it was able to reduce the arithmetic complexity of some other existing algorithms. This paper describes the internals of this special-purpose compiler in some detail, and it argues that a specialized compiler is a valuable tool.
Low power techniques and design tradeoffs in adaptive FIR filtering for PRML read channels
Authors: Khurram Muhammad, Robert B. Staszewski, Poras T. Balsara
Venue: Proceedings of the 2000 international symposium on Low power electronics and design (2000)

In this paper, we describe area and power reduction techniques for a low-latency adaptive finite-impulse response filter for magnetic recording read channel applications. Various techniques are used to reduce area and power dissipation while speed remains as the main performance criterion for the target application. A parallel transposed direct form architecture operates on real-time input data samples and employs a fast, low-area multiplier based on selection of radix-8 pre-multiplied coefficients in conjunction with one-hot encoded bus leading to a very compact layout and reduced power dissipation. Area, speed and power comparisons with other low-power implementation options are also shown. The proposed filter has been fabricated using a 0.18 &mgrm; L-effective CMOS technology and operates at 550 MSamples/s.
Transparent repeaters
Authors: Radu M. Secareanu, Eby G. Friedman
Venue: Proceedings of the 10th Great Lakes symposium on VLSI (2000)

The concept of a &ldquo;transparent repeater1,&rdquo; which is an amplifier circuit designed to minimize the delay introduced by highly resistive interconnect lines in high speed digital circuits, is introduced and described in this paper. An insertion methodology for this circuit is also discussed. Defining characteristics of this circuit are: the input is connected to the output, the output generates the same sense transition as the corresponding input transition, the buffer output becomes high impedance after every transition, and the buffer may detect input transitions with low threshold voltages.
Testability of 2-Level AND/EXOR Circuits
Authors: Rolf Drechsler, Harry Hengster, Horst Schäfer, Joachim Hartmann, Bernd Becker
Venue: Journal of Electronic Testing: Theory and Applications (1999)

It is often stated that AND/EXOR circuits are much easier to test than AND/OR circuits. This statement, however, only holds true for circuits derived from restricted classes of AND/EXOR expressions, like positive polarity Reed-Muller and fixed polarity Reed-Muller expressions. For these two classes of expressions, circuits with good deterministic testability properties are known. In this paper we show that these circuits also have good random pattern testability attributes. An input probability distribution is given that yields a short expected test length for biased random patterns. This is the first time theoretical results on random pattern testability are presented for 2-level AND/EXOR circuit realizations of arbitrary Boolean functions. It turns out that analogous results cannot be expected for less restricted classes of 2-level AND/EXOR circuits. We present experiments demonstrating that generally minimized 2-level AND/OR circuits can be tested as easy (or hard) as minimized 2-level AND/EXOR circuits.
Storage assignment optimizations to generate compact and efficient code on embedded DSPs
Authors: Amit Rao, Santosh Pande
Venue: ACM SIGPLAN Notices (1999)

DSP architectures typically provide dedicated memory address generation units and indirect addressing modes with auto-increment and auto-decrement that subsume address arithmetic calculation. The heavy use of auto-increment and auto-decrement indirect addressing require DSP compilers to perform a careful placement of variables in storage to minimize address arithmetic instructions to generate compact and efficient DSP code. Liao et al. formulated the problem of storage assignment as the simple offset assignment problem (SOA) and the general offset assignment problem (GOA), and proposed heuristic solutions.The storage allocation of variables critically depends on the sequence of variable accesses. In this paper we present techniques to optimize the access sequence of variables by applying algebraic transformations (such as commutativity and associativity) on expression trees to obtain the least cost offset assignment. We develop a new formulation of this problem as the least cost access sequence problem (LCAS). Based on the proposed framework, we develop heuristic algorithms that determine empirically near-optimal solutions resulting in fewer address arithmetic instructions. We have implemented the proposed heuristic algorithms by extending the storage assignment optimization in the SPAM compiler back-end targeted for the TMS320C25 DSP. In the case of SOA, experimental results for programs from the DSPstone benchmark suite show an average improvement of 3.36% in static code size and an average relative speed-up of 7.28% over results obtained using existing SOA algorithms. The average code size reduction over code compiled with a naive storage assignment algorithm is 7.04%. The proposed framework has also been applied to the GOA problem and shows average code size reductions of 2.04% over results obtained using existing GOA algorithms, and average code size reductions of 10.84% over a naive GOA algorithm. Code size reduction and improvement in dynamic instruction counts could be valuable given limited memory and real-time response requirements placed on embedded systems.
The impact of campus-wide portable computing on computer science education
Authors: Stan J. Thomas, Cary Laxer, Tomohiro Nishida, Helen Sherlock
Venue: ACM SIGCUE Outlook (1998)

At least fifty colleges and universities throughout the world have initiated plans under which all students buy, lease, or provide their own portable/laptop computer. The impact of these initiatives on the general educational environment has been widely discussed; however, the impact on the delivery of computer science education has not been. In this working group report we discuss a number of issues pertaining to computer science education in light of campus-wide computing initiatives. Our report relates experiences of faculty already involved in such endeavors plus ideas regarding the future of portable computers in computer science education. As such, it will be beneficial to computer science programmes currently involved in campus-wide computing initiatives as well as those that may become involved in the near future.
Statement-Level Communication-Free Partitioning Techniques for Parallelizing Compilers
Authors: Kuei-Ping Shih, Jang-Ping Sheu, Chua-Huang Huang
Venue: The Journal of Supercomputing (2000)

This paper addresses the problem of communication-free partition of iteration spaces and data spaces along hyperplanes. To finding more possible communication-free hyperplane partitions, we treat statements within a loop body as separate schedulable units. Instead of using the information about data dependence distance or direction vectors, our technique explicitly formulates array references as transformations from statement-iteration spaces to data spaces. Based on these transformations, the necessary and sufficient conditions for communication-free partition along hyperplanes to be feasible have been proposed. This approach can be applied to all programs with an imperfectly nested loop or sequences of imperfectly nested loops, whose array references are affine functions of outer loop indices or loop invariant variables. The proposed approach is more practical than existing methods in finding the data and computation distribution patterns that can cause the processor to execute fully-parallel on multicomputers without any interprocessor communication.
Teaching CSCW in developing countries through collaboration
Authors: Andrew Thatcher, Lesley-Anne Katz, David Trepess
Venue: ACM SIGCHI Bulletin (2000)

Teaching technical subjects in developing countries has proven to be a challenge. This is due to deficiencies in technology and knowledge resources, such as a lack of expertise in a field and a lack of up to date literature. These deficiencies have a major impact on the teaching of subjects such as HCI and CSCW, and have caused universities in developing countries to expand the scope of their teaching resources to form collaborations with other universities through distance leaning technology. This report will focus on experiences of a collaborative project between the University of the Witswatersrand (Wits) in South Africa and Staffordshire University (Staffs) in the UK. The aim of the project was to provide experiential knowledge of CSCW issues through establishing communication channels between the UK and South Africa.
A Bi-Directional Multilayer Perceptron
Authors: M. Jedra, A. El Ouardighi, A. Essaid, M. Limouri
Venue: Neural Processing Letters (1999)

We present in this paper a new neural net called Bi-directional Multi Layer Perceptron (BMLP). Its structure is identical to the one of the classical Multi Layer Perceptron (MLP) but it differs in its neurons. Those neurons possess the bi-directional connections. The BMLP is capable to implement non linear transformations and their reverses for functional approximation problems.
Rapid development of dependable applications over Ad hoc networks
Authors: Gruia-Catalin Roman, Amy L. Murphy
Venue: ACM SIGSOFT Software Engineering Notes (2000)

Advances in wireless communication and network computing technologies make possible new kinds of applications involving transient interactions among physical components that move across a wide range of spaces, from the confines of a room to the airspace across an ocean, and require no fixed networking infrastructure to communicate with one another. Such components may come together to form ad hoc networks for the purpose of exchanging information or in order to engage in cooperative task-oriented behaviors. Ad hoc networks are assembled, reshaped and taken apart as components move in and out of communication range; all interactions are transient; computations become highly decoupled and rely on weak forms of data consistency; disconnections are frequent and unpredictable; and component behavior is sensitive to changes in location, context, quality of service, or administrative domain.Our objective is to develop software engineering methods and an associated software infrastructure that will facilitate rapid development of dependable mobile applications executing over ad hoc networks.
Serial-HIPPI Network Interfaces Using the RoadRunnerPCI ASIC
Authors: Michael A. McGowen
Venue: International Journal of Network Management (1996)

HIPPI networking has long been used in production supercomputing environments for peripheral connectivity, clustering and high-speed LANs. Workstation-based HIPPI networks were difficult to implement because of the bulky, 50-pair copper cables that were required. Now, however, with fiber&hyphen;optic&hyphen;based Serial&hyphen;HIPPI available on network interface cards, large&hyphen;scale HIPPI LANs are not only viable, but are also easy to implement.
Cryptographic security Techniques for wireless networks
Authors: Danai Patiyoot, S. J. Shepherd
Venue: ACM SIGOPS Operating Systems Review (1999)

This paper deals with security techniques for wireless Networks. The work presented is based on a review of literature regarding current and future wireless security networks systems. The aspects discussed in this paper included the choices of cryptographic algorithms such as protocols for key management and authentication. Various conclusions are drawn from existing security networks and proposed in new wireless ATM network security. Also a proposal for future research into security techniques for wireless ATM networks included.
Design of an intramedullary leg lengthening device with a shape memory actuator
Authors: A. M. M. Aalsma, E. E. G. Hekman, J. Stapert, H. Grootenboer
Venue: Technology and Health Care (1999)

The procedure and the external fixator for lengthening long bones was developed by G.A. Ilizarov in the late 1960s. This technique has, despite its proven abilities for leg lengthening and correction of angular deformities, some considerable disadvantages for the patients. Discomfort, infections and restricted weight bearing are some reasons for the development of a completely intramedullary device for leg lengthening. The device developed at the Laboratory of Biomechanical Engineering, University of Twente, is a telescopic intramedullary nail with a maximum diameter of 13 mm, which can be lengthened with 0.5 mm steps induced by a shape memory alloy actuator. The electrical energy for the actuator is supplied from outside the body by inductive coupling of two solenoid coils. Internally, the electrical energy is transformed to thermal energy by Thermofoils and Peltier-elements.
Necessary Optimality Conditions for Control Problems and the Stone--Cech Compactification
Authors: Nadir Arada, Jean-Pierre Raymond
Venue: SIAM Journal on Control and Optimization (1999)

This paper deals with optimal control problems of parabolic equations in the presence of pointwise state constraints. We consider bounded controls which act in the initial condition of the state equation. The state variable is a bounded continuous function on the domain $Q=\Omega\times ]0,T[$ but is not continuous on $\overline Q$. In this case, the multiplier associated with state constraints is a regular bounded finitely additive measure on Q (but not a $\sigma$-additive one). Using some properties of the Stone--\u{C}ech compactification, we prove a decomposition theorem for this measure which allows us to interpret the adjoint equation in a classical sense. We obtain new optimality conditions for these kinds of problems, and we apply these results to the case of bilateral constraints.
Low-power considerations in the design of bluetooth (invited talk)
Authors: Sven Mattisson
Venue: Proceedings of the 2000 international symposium on Low power electronics and design (2000)

In this paper, we review the Bluetooth technology, a new universal radio interface enabling electronic devices to connect and communicate wirelessly via short-range connections. Motivations for the radio requirements are given, and the implications of system parameters like operating modes, frequency hopping, interference resistance are discussed from a low-power perspective. Speci!c characteristics enabling low-cost single-chip implementations and supporting low power consumption are outlined.
Assisting the &ldquo;virtual&rdquo; user
Authors: John Ober
Venue: ACM SIGDOC Asterisk Journal of Computer Documentation (1999)

The development of online assistance for remote users of computer-based systems depends upon the assumptions made about the barriers users face and about the available strategies for addressing them. Drawing from the domain of digital libraries and information discovery and retrieval, this commentary speculates about missed opportunities hidden by those assumptions. Critical questions about strategies to remove user barriers, to guide users past barriers, and to help educate users to anticipate and independently overcome barriers suggest transitions for online user assistance technologies that could take the form of "confusion recognizers," "assistance avatars," and "pedagogically aware" user interfaces.
Pointer analysis for multithreaded programs
Authors: Radu Rugina, Martin Rinard
Venue: Proceedings of the ACM SIGPLAN 1999 conference on Programming language design and implementation (1999)

This paper presents a novel interprocedural, flow-sensitive, and context-sensitive pointer analysis algorithm for multithreaded programs that may concurrently update shared pointers. For each pointer and each program point, the algorithm computes a conservative approximation of the memory locations to which that pointer may point. The algorithm correctly handles a full range of constructs in multithreaded programs, including recursive functions, function pointers, structures, arrays, nested structures and arrays, pointer arithmetic, casts between pointer variables of different types, heap and stack allocated memory, shared global variables, and thread-private global variables.We have implemented the algorithm in the SUIF compiler system and used the implementation to analyze a sizable set of multithreaded programs written in the Cilk multithreaded programming language. Our experimental results show that the analysis has good precision and converges quickly for our set of Cilk programs.
The Fringe Region Technique and the Fourier Method Used in the Direct Numerical Simulation of Spatially Evolving Viscous Flows
Authors: Jan Nordström, Niklas Nordin, Dan Henningson
Venue: SIAM Journal on Scientific Computing (1999)

To eliminate the problem with artificial boundary conditions and facilitate the use of Fourier methods, the fringe region (or filter, damping layer, absorbing layer, sponge layer) technique has been used in direct simulations of transitional and turbulent boundary layers. Despite the fact that good computational results have been obtained with this technique, it is not fully understood. The analysis in this paper indicates that the primary importance of the fringe region technique is to damp out the deviation associated with large scales in the direction normal to the wall. The lack of boundary conditions is compensated by the knowledge of an exact solution in the fringe region of the computational domain. The upstream influence from the fringe region is small. Numerical experiments verifying the theoretical predictions are presented.
Choice of Basis for Laplace Approximation
Authors: David J. C. MacKay
Venue: Machine Learning (1998)

Maximum a posteriori optimization of parameters and the Laplace approximation for the marginal likelihood are both basis-dependent methods. This note compares two choices of basis for models parameterized by probabilities, showing that it is possible to improve on the traditional choice, the probability simplex, by transforming to the &lsquo;softmax&rsquo; basis.
Spectral Elements on Infinite Domain
Authors: Kelly Black
Venue: SIAM Journal on Scientific Computing (1998)

A spectral-element technique to approximate partial differential equations (PDEs) on an infinite domain is examined. The method is based on Boyd's mapping of a semiinfinite interval to a finite interval, and it is extended to a variational setting which allows for an implementation using a spectral element method. By extending the method to a variational form, a straightforward implementation allows for high-order approximations over an infinite computational domain.Methods to find a high-order approximation have been proposed by Funaro, Maday, Mavriplis, and many others. The proposed methods all have drawbacks, including restrictions on the behavior of the approximation at infinity. Because the proposed method is based on a mapping to a finite domain, a much wider variety of boundary conditions can be enforced on the approximation.
A Note on BIBO Stability of Linear Discrete-Space Systems
Authors: Irwin W. Sandberg
Venue: Multidimensional Systems and Signal Processing (1999)

The cornerstone of the theory of discrete-space single-input single-output linear systems is the idea that every such system has an input-output map H that can be represented by a convolution or the familiar generalization of a convolution. This thinking involves an oversight which, under some mild assumptions, was recently corrected by adding an additional term to the representation. Here we give a criterion for the bounded-input bounded-output stability of such systems.
Counting, enumerating, and sampling of execution plans in a cost-based query optimizer
Authors: Florian Waas, César Galindo-Legaria
Venue: ACM SIGMOD Record (2000)

Testing an SQL database system by running large sets of deterministic or stochastic SQL statements is common practice in commercial database development. However, code defects often remain undetected as the query optimizer's choice of an execution plan is not only depending on the query but strongly influenced by a large number of parameters describing the database and the hardware environment. Modifying these parameters in order to steer the optimizer to select other plans is difficult since this means anticipating often complex search strategies implemented in the optimizer. In this paper we devise algorithms for counting, exhaustive generation, and uniform sampling of plans from the complete search space. Our techniques allow extensive validation of both generation of alternatives, and execution algorithms with plans other than the optimized one&mdash;if two candidate plans fail to produce the same results, then either the optimizer considered an invalid plan, or the execution code is faulty. When the space of alternatives becomes too large for exhaustive testing, which can occur even with a handful of joins, uniform random sampling provides a mechanism for unbiased testing. The technique is implemented in Microsoft's SQL Server, where it is an integral part of the validation and testing process.
TIP: a temporal extension to Informix
Authors: Jun Yang, Huacheng C. Ying, Jennifer Widom
Venue: ACM SIGMOD Record (2000)

Commercial relational database systems today provide only limited temporal support. To address the needs of applications requiring rich temporal data and queries, we have built TIP (Temporal Information Processor), a temporal extension to the Informix database system based on its DataBlade technology. Our TIP DataBlade extends Informix with a rich set of datatypes and routines that facilitate temporal modeling and querying. TIP provides both C and Java libraries for client applications to access a TIP-enabled database, and provides end-users with a GUI interface for querying and browsing temporal data.
Business Continuity Planning
Authors: Martin Nemzow
Venue: International Journal of Network Management (1997)

This article considers various strategies for protecting an organisation from both natural and man-made disasters. The differences between business continuity planning, and disaster recovery planning are recognised. &copy; 1997 John Wiley Sons, Ltd.