ppxscal/embedding_network huggingface dataset:
Research on Grid Resource Discovery Mechanism Based on Mobile Agent
Authors: ZhenChun Huang, GuoQing Li, Yi Zeng
Venue: Proceedings of the 2007 IFIP International Conference on Network and Parallel Computing Workshops (2007)

This paper proposes a kind of grid resource discovery model which is compartmentalized into three layers including ordinary node layer, super node layer and directory node layer, in order to reduce network traffic and enhance communications efficiency. In this model, mobile Agent is used to carry on the interaction between two layers. On the super node layer and the directory node layer, LDAP directory servers acts as a unified interface of the grid information's storage and access, and the metadata of ontology's concept cluster is used to describe the node information in the leaf nodes of the LDAP directory server. Thus, by using the LDAP directory structure, the ontology is introduced and a semantic grid of spatial information is constructed in order to enhance the intelligence of the grid resource discovery and obtain a better result. At last, resources' registration process in the LDAP server and the step of resource discovery is described.
A New Scheduling Algorithm for Critical Packet Loss Elimination during Handoff in Cellular Networks
Authors: J. Light
Venue: Proceedings of the Third IEEE International Conference on Wireless and Mobile Computing, Networking and Communications (2007)

Handling the mobile network performance degradation due to packet loss during handoff is the main focus of this paper. In this paper, it has been shown that appropriate scheduling algorithms in existence of smaller receive window size, and multi-level priority queues in the base station, highly decreases the critical packet loss during handoff and improves throughput. Critical packets are defined according to application objectives. Combination of efficient scheduling algorithms, optimum window size and priority buffers have been proposed as a solution to decrease the critical packet loss and improve the quality of service. Simulation results shown here substantiate the ideas presented in this paper. Index: Smooth handoff, scheduling algorithms, mobility management and packet loss elimination.
A Web based System to Calculate Quality Metrics for Digital Passport Photographs
Authors: Oriana-Yuridia Gonzalez-Castillo, Kresimir Delac
Venue: Proceedings of the Eighth Mexican International Conference on Current Trends in Computer Science (2007)

Quality measurement of digital passport photographs is a complex problem. The first problem to solve is to establish the quality metrics, quality scales and the level of acceptance for a certain quality. The second problem to solve is to offer an integrated system which covers the principles of software engineering plus a user-friendly interface. This paper introduces the solution for both problems. The method to calculate different and novel quality metrics based on a conventional estimation and a quality metric based on nonconformance of quality requirements for digital passport photographs. Conformance clauses of quality requirements were obtained from the specifications of the Machine Readable-Travel Documents (MRTD) document of the International-Civil Aviation Organization (ICAO) ICAO/MRTD and from the document of the International Standardization Organization (ISO). Series of algorithms were implemented to measure the quality of passport photographs in two ways: as an image and as a biometric sample.
Modeling and Verification of Communication Protocols in Sara: The X.21 Interface
Authors: R. R. Razouk
Venue: IEEE Transactions on Computers (1980)

This paper models the CCITT X.21 interface specification using a graph model and verifies the behavior of the interface using analysis tools accessible through UCLA's SARA (System Architects' Apprentice) design aid system. Behavior of the interface is modeled in three domains: control flow, data flow, and interpretation. Explicit models of assumed behavior for the environment and for the system under study are incorporated in a SARA world view such that systematic analysis and simulation can be applied.
Knowledge Mass and Multiple Approximate Reasoning in Type I Topological Logic
Authors: Yalin Zheng, Xiaoping Zou, Ning Wang, Jing Zheng, Ji Ouyang
Venue: Proceedings of the Fourth International Conference on Fuzzy Systems and Knowledge Discovery - Volume 01 (2007)

In this paper, we propose and investigate the type I knowledge mass, type I knowledge base, type I approxi- mate knowledge closure of knowledge base, type I topo- logical algorithm of multiple approximate reasoning in the framework of type I topological logic CIT . For the type I topological algorithm of multiple approximate reason- ing, Fréchet topology is also a critical topology. It is only valid for the the multiple approximate reasonings with A {Ai | i = 1, 2, · · · , n}, and is invalid for the multiple approximate reasonings which allow A F(S) - {Ai | i = 1, 2, · · · , n}. The topologies which are valid for the type I topological algorithm of the multiple approximate reasoning , can only be the non-Fréchet topologies. These topologies can realize not only the classic MP reasoning but also the non-classic approximate reasoning. It can activate some knowledge Ai Bi as A F(S) - {Ai | i = 1, 2, · · · , n}.
Full and relative awareness: a decidable logic for reasoning about knowledge of unawareness
Authors: Thomas Ågotnes, Natasha Alechina
Venue: Proceedings of the 11th conference on Theoretical aspects of rationality and knowledge (2007)

In the most popular logics combining knowledge and awareness, it is not possible to express statements about knowledge of unawareness such as "Ann knows that Bill is aware of something Ann is not aware of" - without using a stronger statement such as "Ann knows that Bill is aware of p and Ann is not aware of p", for some particular p. Recently, however, Halpern and R&ecirc;go (2006) introduced a logic in which such statements about knowledge of unawareness can be expressed. The logic extends the traditional framework with quantification over formulae, and is thus very expressive. As a consequence, it is not decidable. In this paper we introduce a decidable logic which can be used to reason about certain types of unawareness. The logic extends the traditional framework with an operator expressing full awareness, i.e., the fact that an agent is aware of everything, and another operator expressing relative awareness, the fact that one agent is aware of everything another agent is aware of The logic is less expressive than Halpern's and R&ecirc;go's logic. It is, however, expressive enough to express all of Halpern's and R&ecirc;go's motivating examples. In addition to proving that the logic is decidable and that its satisfiability problem is PSPACE-complete, we present an axiomatisation which we show is sound and complete.
Reconstruction of Solder Joint Surface Based on Shape from Shading
Authors: Fan-hui Kong, Yong-xin Wang
Venue: Proceedings of the Third International Conference on Natural Computation - Volume 05 (2007)

Inspection of solder joint is a critical step in the assembly of PCB (Printed Circuit Board) which requires high reliability. Previous studies have shown that a visual inspection is tedious and unreliable because the inspection process varies with the mood, time, experience and interpretation skills of an inspector. So, non-destructive inspection technology based on image captured by CCD (Charge Couple Device) has been widely used in a production of PCB because of their excellent characters. This paper deals with the reconstruction of the solder joint's surface in PCB based on shape form shading technology. Shape-from-shading (SFS) is an important non-contact measurement method that can be applied in the fields of remote sensing technology, industrial measurement, pattern recognition, product monitoring and micrograph measurement, etc. Therefore, more and more researchers pay more attention to this field recently. However, the application of SFS for reconstruction of solder joint surface has yet to be fully investigated. In this paper, compared to other measurement methods, the advantages of SFS method are analyzed firstly. Then, theory and survey of SFS method is introduced. To overcome the disadvantages existing in conventional SFS methods, some improved algorithms are provided and proved by experiments. This paper discusses the flow of solder joint inspection based on SFS. Experimental results reveal that the proposed method shows practical value in solder joint inspection.
Reduction of Fault Latency in Sequential Circuits by using Decomposition
Authors: Ilya Levin, Benjamin Abramov, Vladimir Ostrovsky
Venue: Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (2007)

The paper discusses a novel approach for reduction of fault detection latency in a selfchecking sequential circuit. The Authors propose decomposing the finite state machine (FSM) which describes the sequential circuit of interest, thus obtaining a number of component FSMs respectively describing the number of component circuits. Being decomposed to the number of component circuits, the initial circuit becomes able to detect faults much faster since, at each specific moment of time, one of the component circuits (FSMs) is working and all the others are being tested. The paper deals with the following aspects: a) the decomposition procedure; b) evaluation of the proposed approach based on a fault injection simulation; c) estimation of trade-off between the reduction of latency and the required hardware overhead. Results of the study are tested on a number of standard benchmarks.
Inverses of Linear Sequential Circuits
Authors: J. L. Massey, M. K. Sain
Venue: IEEE Transactions on Computers (1968)

Abstract This paper states the necessary and sufficient conditions for the existence of a feedforward inverse for a feedforward linear sequential circuit and gives an implicit procedure for constructing such inverses. It then goes on to give the necessary and sufficient conditions for the existence of general inverses with finite delay and gives procedures for constructing a class of such inverses. The discussion considers both the transfer function matrix description and the structural matrix description of the linear sequential circuit, together with the complementary nature of the results obtained from these two viewpoints. Finally, a large part of the work is motivated by results and techniques which have been applied in the study of continuous-time linear dynamical systems and thus serves to point out the advantages which may accrue through simultaneous study of both continuous-time systems and linear sequential circuits.
Modal logics of some geometrical structures
Authors: I. B. Shapirovsky
Venue: Problems of Information Transmission (2007)

We study modal logics of regions in a real space ordered by the inclusion and compact inclusion relations. For various systems of regions, we propose complete finite modal axiomatizations; the described logics are finitely approximable and PSPACE-complete.
The gameplay visualization manifesto: a framework for logging and visualization of online gameplay data
Authors: Simon Joslin, Ross Brown, Penny Drennan
Venue: Computers in Entertainment (CIE) (2007)

As massively multiplayer online games gain popularity, there has been a concomitant increase in their size and complexity, both technically and in terms of player usage. Quality assurance for such games takes up a major component of the development budget due to the painstaking work required to ensure the best possible gameplay. This article presents a new framework for the process of visualizing online game-play data. Major components such as an event model and data acquisition infrastructure are derived. Interface and implementation factors are also explored, including in-situ game interface approaches. We also expect that this framework can be modified for all genres of gaming that require an understanding of complex game-play.
CT-OLAP: temporal multidimensional data model and algebra for moving objects
Authors: Eilverijus Kondratas, Igor Timko
Venue: Proceedings of the ACM tenth international workshop on Data warehousing and OLAP (2007)

Sequenced queries are queries that are conceptually evaluated at each time instant. Therefore, this kind of queries return functions of time. Some applications (e.g., traffic analysis) need support for sequenced queries on data about continuous changes. Current temporal OLAP technology does not support this type of queries. Existing TOLAP models and algebras are based on discrete time. Hence, they can not represent data and query about continuous changes (i.e., continuous functions of time). In this paper, we propose a conceptual multidimensional model, CT-OLAP, that captures continuous functions of time. Its associated algebra supports sequenced analytical queries. CT-OLAP extends an existing powerful multidimensional model and algebra. CT-OLAP can be implemented in the Secondo DBMS. The motivation for this work is based on the requirements to a tool for traffic jam analysis formulated by the Municipality of Bozen-Bolzano, Italy.
Combined rate and power allocation with link scheduling in wireless data packet relay networks with fading channels
Authors: Minyi Huang, Subhrakanti Dey
Venue: EURASIP Journal on Wireless Communications and Networking (2007)

We consider a joint rate and power control problem in a wireless data traffic relay network with fading channels. The optimization problem is formulated in terms of power and rate selection, and link transmission scheduling. The objective is to seek high aggregate utility of the relay node when taking into account buffer load management and power constraints. The optimal solution for a single transmitting source is computed by a two-layer dynamic programming algorithm which leads to optimal power, rate, and transmission time allocation at the wireless links. We further consider an optimal power allocation problem for multiple transmitting sources in the same framework. Performances of the resource allocation algorithms including the effect of buffer load control are illustrated via extensive simulation studies.
Image Fusion Using Nonsubsampled Contourlet Transform
Authors: Bin Yang, Shutao Li, Fengmei Sun
Venue: Proceedings of the Fourth International Conference on Image and Graphics (2007)

Image fusion provides the means to integrate multiple images into a composite image which is more suitable for the purpose of human and machine perception or further image-processing tasks. This paper presents the use of nonsubsampled contourlet transform (NSCT) for image fusion. All the input images are decomposed firstly. Then the decomposition coefficients on the different scale are combined using different rule, and the fusion image is obtained by taking the corresponding inverse nonsubsampled contourlet transform of the fused coefficients. Some performance measures are used to evaluate the results. Extensive experimental results show that the proposed scheme performs better than the method based on the stationary wavelet transform (SWT).
B72-3 Computer Structures, Readings and Examples
Authors: M. J. Flynn
Venue: IEEE Transactions on Computers (1972)

This book represents a major contribution to the study of the architecture of computer systems. It will be, I believe, must reading for any serious student of the field.
Model Checking Data-Aware Workflow Properties with CTL-FO+
Authors: Sylvain Halle, Roger Villemaire, Omar Cherkaoui, Boubker Ghandour
Venue: Proceedings of the 11th IEEE International Enterprise Distributed Object Computing Conference (2007)

Most works that extend workflow validation beyond syn- tactical checking consider constraints on the sequence of messages exchanged between services. However, these con- straints are expressed only in terms of message names and abstract away their actual data content. Using the context of the User-controlled Lightpath initiative (UCLP) hosted by the CANARIE consortium, we provide examples of real- world "data-aware" web service constraints where the se- quence of messages and their content are interdependent. We present CTL-FO+, an extension over Computation Tree Logic that includes first-order quantification on state vari- ables in addition to temporal operators. We show how CTL- FO+ is adequate for expressing data-aware constraints, give a complete model checking algorithm for CTL-FO+ and establish its complexity to be PSPACE-complete. This makes using CTL-FO+ for validating workflow properties no harder than using the Linear Temporal Logic (LTL) al- ready used by some web service tools. Finally, we show how the modelling of data-aware properties is an increase in ex- pressiveness that cannot be efficiently simulated by these tools.
Using mathematics to improve ada compiled code, part 2: the proof
Authors: Ward D. Maurer
Venue: Proceedings of the 2007 ACM international conference on SIGAda annual international conference (2007)

In a previous paper, we presented a method of eliminating most procedure call overhead, and most static scoping overhead, in compiling a program written in Ada, or, for that matter, in any language which allows nested procedures. This involves the construction of a loop tree for the call graph of the program; we described this in another earlier paper. Once this is constructed, we make use of a criterion for deciding when a new base register is needed. Suppose that U and V are procedures, with V nested in U. Then the only time a new base register might be needed by V is when there is a loop, in the loop tree, that contains V but not U. This result was stated without proof in the first part of this paper; here we present the proof, after reviewing some basic mathematical concept.
Design and implementation of a personal firewall Based on NDIS Intermediate Drivers
Authors: He Chaokai
Venue: Proceedings of the Eighth ACIS International Conference on Software Engineering, Artificial Intelligence, Networking, and Parallel/Distributed Computing - Volume 01 (2007)

Firewall is the core technology of today's network security and the first line of defense against external network attacks and threats. most personal firewall deals with the packets under the user model, there are a lots of limits. in order to protect our privates better some operations need to be done under the kernel model. The NDIS by which we can easy do something under the kernel model is introduced in the windows operating system that is the mostly used system in personal computer. This paper clearly describes the architecture of the NDIS, on the base of the NDIS intermediate drivers presents a personal firewall model which operations under the kernel model.
Capital-Intensive Software Technology Part 3: Knowledge Engineering
Venue: IEEE Software (1984)

In the 1990's, software technology will increasingly emphasize knowledge reusability by both people and computers. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
Picture Segmentation by Texture Discrimination
Authors: S. W. Zucker
Venue: IEEE Transactions on Computers (1975)

This correspondence describes a method of dividing a picture into differently textured regions by thresholding the values of a suitable local picture property. The approach used is a generalization to natural textures of a technique recently proposed by Tsuji. The examples given involve textures that differ in coarseness; a method of estimating texture coarseness by analysis of local property values is also described.
Microcode Bit Optimization is NP-Complete
Authors: E. L. Robertson
Venue: IEEE Transactions on Computers (1979)

The general problem of formatting microinstructions so as to minimize the width of words in control memory is shown to be computationally difficult. Hence, we should not attempt to solve the general case, but concentrate on heuristics for reasonable subcases.
Verification of low-level crypto-protocol implementations using automated theorem proving
Authors: J. Jurjens
Venue: Proceedings of the 2nd ACM/IEEE International Conference on Formal Methods and Models for Co-Design (2005)

Designing and implementing cryptographic protocols is known to be difficult. A lot of research has been devoted to developing formal techniques to analyze abstract designs of cryptographic protocols. Less attention has been paid to the verification of implementation-relevant aspects of cryptographic protocols. This is an important challenge since it is non-trivial to securely implement secure designs, because a specification by its nature is more abstract than the corresponding implementation, and the additional information may introduce attacks not present on the design level. In this paper, we address aspects of crypto protocol implementations close to the hardware level. More concretely, we consider the industrial cryptographic token interface standard PKCS 11 which defines how software on untrustworthy hardware can make use of tamper-proof hardware such as smart-cards to perform cryptographic operations on sensitive data. We propose an approach for automated security analysis with first-order logic theorem provers of crypto protocol implementations making use of this standard.
A Method for Analyzing Loop Programs
Authors: R. C. Waters
Venue: IEEE Transactions on Software Engineering (1979)

This paper presents a method for automatically analyzing loops, and discusses why it is a useful way to look at loops. The method is based on the idea that there are four basic ways in which the logical structure of a loop is built up. An experiment is presented which shows that this accounts for the structure of a large class of loops. The paper discusses how the method can be used to automatically analyze the structure of a loop, and how the resulting analysis can be used to guide a proof of correctness for the loop. An automatic system is described which performs this type of analysis. The paper discusses the relationship between the structure building methods presented and programming language constructs. A system is described which is designed to assist a person who is writing a program. The intent is that the system will cooperate with a programmer throughout aUl phases of work on a program and be able to communicate with the programmer about it.
A Viterbi decoder architecture for a standard-agile and reprogrammable transceiver
Authors: L. Bissi, P. Placidi, G. Baruffa, A. Scorzoni
Venue: Integration, the VLSI Journal (2008)

This paper presents a Viterbi decoder (VD) architecture for a programmable data transmission system, implemented using a Field Programmable Gate Array (FPGA) device. This VD has been conceived as a building block of a software defined radio (SDR) mobile transceiver, reconfigurable on request and capable to provide agility in choosing between different standards. UMTS and GPRS Viterbi decoding is achieved by choosing different coding rates and constraint lengths, and the possibility to switch, at run time, between them guarantees a high degree of programmability. The architecture has been tested and verified with a Xilinx XC2V2000 FPGA for providing a generalized co-simulation/co-design testbed. The results show that this decoder can sustain an uncoded data rate of about 2Mbps, with an area occupancy of 46%, due to the efficient resources reuse.