ppxscal/embedding_network huggingface dataset:
Functionality Distribution for Parallel Rendering
Authors: Ramgopal Rajagopalan, Dhrubajyoti Goswami, Sudhir P. Mudur
Venue: Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Papers - Volume 01 (2005)

Handling very large datasets has been a key problem addressed in real-time distributed rendering research. With the advent of the programmable Graphics Processing Unit (GPU), itis now possible and even profitable to move many application-specific computations to be carried out by the GPU. It has been shown that modern GPUs outperform the standard PC-platform CPUs on a broad class of computations by over a factor of seven. Given the low costs and high processing speeds of GPUs, there is a trend towards using clusters of CPU/GPU systems. Configuring and programming these clusters for efficient distribution ofdata and computations is a major challenge. What are the computations that can be offloaded from the CPU to a GPU? The answer to this question is not simple as it depends on the following four factors: GPU's processing capacity, GPU's internal bandwidth, GPU-CPU communication bandwidth and the external network bandwidth. All these factors are subjectto change with every generation of hardware. But additions and alternatives to the traditional data-parallel architectures are now needed to exploit the full capability of such clusters using functional parallelism. In this paper, we present a number of architectural configurations that could be adapted on such clusters. Specifically, we demonstrate use of one such architecture: application of a GPU-based pipelined architecture to our work on real-time processing and rendering of large-point datasets which demands complex computations. We have also introduced a list of application and system parameters that are necessary to determine an optimal distribution of computation on the GPUs of a graphics cluster.
Full-Frame Video Stabilization
Authors: Yasuyuki Matsushita, Eyal Ofek, Xiaoou Tang, Heung-Yeung Shum
Venue: Proceedings of the 2005 IEEE Computer Society Conference on Computer Vision and Pattern Recognition (CVPR'05) - Volume 1 - Volume 01 (2005)

Video stabilization is an important video enhancement technology which aims at removing annoying shaky motion from videos. We propose a practical and robust approach of video stabilization that produces full-frame stabilized videos with good visual quality. While most previous methods end up with producing low resolution stabilized videos, our completion method can produce full-frame videos by naturally filling in missing image parts by locally aligning image data of neighboring frames. To achieve this, motion inpainting is proposed to enforce spatial and temporal consistency of the completion in both static and dynamic image areas. In addition, image quality in the stabilized video is enhanced with a new practical deblurring algorithm. Instead of estimating point spread functions, our method transfers and interpolates sharper image pixels of neighbouring frames to increase the sharpness of the frame. The proposed video completion and deblurring methods enabled us to develop a complete video stabilizer which can naturally keep the original image quality in the stabilized videos. The effectiveness of our method is confirmed by extensive experiments over a wide variety of videos.
Texture transfer during shape transformation
Authors: Huong Quynh Dinh, Anthony Yezzi, Greg Turk
Venue: ACM Transactions on Graphics (TOG) (2005)

Mappings between surfaces have a variety of uses, including texture transfer, multi-way morphing, and surface analysis. Given a 4D implicit function that defines a morph between two implicit surfaces, this article presents a method of calculating a mapping between the two surfaces. We create such a mapping by solving two PDEs over a tetrahedralized hypersurface that connects the two surfaces in 4D. Solving the first PDE yields a vector field that indicates how points on one surface flow to the other. Solving the second PDE propagates position labels along this vector field so that the second surface is tagged with a unique position on the first surface. One strength of this method is that it produces correspondences between surfaces even when they have different topologies. Even if the surfaces split apart or holes appear, the method still produces a mapping entirely automatically. We demonstrate the use of this approach to transfer texture between two surfaces that may have differing topologies.
Auto-Correlation Wavelet Support Vector Machine and Its Applications to Regression
Authors: Guangyi Chen, Gregory Dudek
Venue: Proceedings of the 2nd Canadian conference on Computer and Robot Vision (2005)

A Support Vector Machine (SVM) with the auto-correlation of compactly supported wavelet as kernel is proposed in this paper.It is proved that this kernel is an admissible support vector kernel.The main advantage of the auto-correlation of a compactly supported wavelet is that it satisfies the translation invariant property, which is very important for signal processing.Also, we can choose a better wavelet from different choices of wavelet families for our auto-correlation wavelet kernel.Experiments on signal regression show that this method is better than the existing SVM function regression with the scalar wavelet kernel, the Gaussian kernel, and the exponential radial basis function kernel.It can be easily extended to other applications such as pattern recognition by using this newly developed auto-correlation wavelet SVM.
Using Dummy Bridging Faults to Define a Reduced Set of Target Faults
Authors: Irith Pomeranz, Sudhakar M. Reddy
Venue: Proceedings of the 10th IEEE European Symposium on Test (2005)

The large numbers of bridging faults in a circuit resulted in several approaches to the selection of a subset of faults as targets for test generation. These approaches do not guarantee that all the bridging faults (or even that all the bridging faults that are likely to occur) will be detected. We investigate a different approach to the selection of target bridging faults. The approach is based on the introduction of dummy bridging faults, which are not physical faults but whose tests detect large numbers of physical faults. We apply this approach to four-way bridging faults. When no approximations are made, the proposed approach selects a subset of faults such that if they are detected, all the four-way bridging faults are guaranteed to be detected. We also investigate approximations and a test generation approach for the selected faults.
Graph isomorphism completeness for chordal bipartite graphs and strongly chordal graphs
Authors: Ryuhei Uehara, Seinosuke Toda, Takayuki Nagoya
Venue: Discrete Applied Mathematics (2005)

This paper deals with the graph isomorphism (GI) problem for two graph classes: chordal bipartite graphs and strongly chordal graphs. It is known that GI problem is GI complete even for some special graph classes including regular graphs, bipartite graphs, chordal graphs, comparability graphs, split graphs, and k-trees with unbounded k. On the other hand, the relative complexity of the GI problem for the above classes was unknown. We prove that deciding isomorphism of the classes are GI complete.
Broad-phase collision detection using semi-adjusting BSP-trees
Authors: Rodrigo G. Luque, João L. D. Comba, Carla M. D. S. Freitas
Venue: Proceedings of the 2005 symposium on Interactive 3D graphics and games (2005)

The broad-phase step of collision detection in scenes composed of n moving objects is a challenging problem because enumerating collision pairs has an inherent O(n2) complexity. Spatial data structures are designed to accelerate this process, but often their static nature makes it difficult to handle dynamic scenes. In this work we propose a new structure called Semi-Adjusting BSP-tree for representing scenes composed of thousands of moving objects. An scheduling algorithm evaluates locations where the BSP-tree becomes unbalanced, uses several strategies to alter cutting planes, and defer updates based on their re-structuring cost. We show that the tree does not require a complete re-structuring even in highly dynamic scenes, but adjusts itself while maintaining desirable balancing and height properties.
Optimized wafer-probe and assembled package test design for analog circuits
Authors: Soumendu Bhattacharya, Abhijit Chatterjee
Venue: ACM Transactions on Design Automation of Electronic Systems (TODAES) (2005)

It is well known that wafer-probe test costs of analog ICs are an order of magnitude less than the corresponding test costs of assembled packages. It is therefore natural to push as much of the testing process into wafer-probe testing as possible to reduce the scope of assembled package testing. However, the signal drive and response observation capabilities during wafer probe testing are limited in comparison to assembled packages. In this article, it is shown that by using band-limited transient test signals, which can be supported by wafer-probe test instrumentation, significant numbers of bad ICs can be detected early during the wafer-probe test. The optimal test stimuli are determined by cooptimizing the wafer-probe and assembled package test waveforms. Overall test costs, including the cost of packaging bad ICs, are minimized and are reduced up to four times. The proposed method has been validated using hardware test data, which were obtained through measurements made on a prototype.
Implementation of a simple 8-bit microprocessor with reversible energy recovery logic
Authors: Seokkee Kim, Soo-Ik Chae
Venue: Proceedings of the 2nd conference on Computing frontiers (2005)

We describe a simple 8-bit adiabatic microprocessor implemented with nMOS reversible energy recovery logic (nRERL) [1]. The implemented adiabatic microprocessor supports only a subset of the DLX instruction set architecture [15] in order to be fitted into a limited silicon area, and is integrated with an energy-efficient 6-phase clocked power generator (CPG). Phase scheduling was employed to reduce the number of the buffers required in the adiabatic microprocessor. Furthermore, reversibility breaking with self-energy recovery circuits (SERCs) was also employed to reduce energy consumption as well as circuit complexity by. The 8-bit microprocessor core and its on-chip 6-phase CPG were implemented in 0.18-mm CMOS technology. The former and the latter occupied 2.62 x 2.03 mm2 and 1.0 x 0.6 mm2, respectively. From the measurements, we have found that its minimum power consumption is 7.5μW at Vdd =1.8V and f=880kHz
A Reversible Data Hiding Scheme with Modified Side Match Vector Quantization
Authors: Chin-Chen Chang, Wei-Liang Tai, Min-Hui Lin
Venue: Proceedings of the 19th International Conference on Advanced Information Networking and Applications - Volume 1 (2005)

Indices are modified so that the secret data can be hidden into the index-based cover image, and thereby the problem of the stego-image quality degradation occurs. If the stego-image quality degradation problem can be solved enabling the receiver to reconstruct the original indices after extracting the hidden secret data from the index-based stego-image, then the compressed cover image can be used repeatedly by different users. To achieve our goal, in this paper, a reversible data-hiding scheme based on a modified side match vector quantization (SMVQ) technique is proposed. Our experimental results confirm the effectiveness and the reversibility of the proposed scheme.
AN EMPIRICALLY DEVELOPED SYSTEM FOR THE SELECTION OF COMPUTER INPUT DEVICES FORUSERS WITH PHYSICAL DISABILITIES
Authors: Sherry Perdue Casali
Venue: ACM SIGCHI Bulletin (1991)

Three experiments compared the speed and accuracy of item selection from two types of hierarchical pop-up menus (click-open walking). These menus are perceptually equivalent, but require very different action sequences to make selections from them. Two ways in which the action sequences differ involve (1) the amount of spatial constraint in the movement path, and (2) the position of the mouse button during the movement. The present results show that selection from click-open menus is faster and less error-prone than selection from walking menus. This disagrees with the Keystroke-Level Model of Card, Moran, and Newell (1983).
Neural Networks and Belief Logic
Authors: Yuan Yan Chen, Joseph J. Chen
Venue: Proceedings of the Fourth International Conference on Hybrid Intelligent Systems (2004)

Many researchers have observed that neurons process information in an imprecise manner - if a logical inference emerges from neural computation, it is inexact at best. Thus, there must be a profound relationship between belief logic and neural networks. In Chen (2002), a plausible neural network model that can compute probabilistic and possibilistic logic was proposed. In this article we further extend this model to continuous variables for function and relation estimation. We discuss why and how belief logic is derived from neural computation.
Analysis on Performance of Bilateral Robot System Using Wireless Communication
Authors: Takeshi Marugame, Makoto Ohnishi, Masao Nakagawa
Venue: Proceedings of the First Joint Eurohaptics Conference and Symposium on Haptic Interfaces for Virtual Environment and Teleoperator Systems (2005)

Wireless robotic manipulation promises applications in medical fields, allowing for surgeries to take place when the patient and surgeon are in distant places. Remote wireless robotic manipulation systems can possibly offer high dexterity and sensation capabilities, while allowing millimeter-scale control by the surgeon. Past research focus on robotic manipulation using a wired bilateral system, most of which assumes an error-free and zero-delay environment. This paper addresses the effect of implementing Adaptive Carrier Selection (ACS) and Kalman filter in simulated wireless bilateral system.
An exact algorithm for the knapsack sharing problem
Authors: Mhand Hifi, Hedi M'Halla, Slim Sadfi
Venue: Computers and Operations Research (2005)

In this paper, we develop an exact algorithm for solving the knapsack sharing problem. The algorithm is a new version of the method proposed in Hifi and Sadfi (J. Combin. Optim. 6 (2002) 35). It seems quite efficient in the sense that it solves quickly some large problem instances. Its main principle consists of (i) finding a good set of capacities, representing a set of critical elements, using a heuristic approach, and (ii) varying the values of the obtained set in order to stabilize the optimal solution of the problem. Then, by exploiting dynamic programming properties, we obtain good equilibrium which lead to significant improvements. The performance of the proposed algorithm, based on a set of medium and large problem instances, is compared to the standard version of Hifi and Sadfi (2002). Encouraging results have been obtained.
Locally Divergence-Free Discontinuous Galerkin Methods for MHD Equations
Authors: Fengyan Li, Chi-Wang Shu
Venue: Journal of Scientific Computing (2005)

In this paper, we continue our investigation of the locally divergence-free discontinuous Galerkin method, originally developed for the linear Maxwell equations (J. Comput. Phys. 194 588--610 (2004)), to solve the nonlinear ideal magnetohydrodynamics (MHD) equations. The distinctive feature of such method is the use of approximate solutions that are exactly divergence-free inside each element for the magnetic field. As a consequence, this method has a smaller computational cost than the traditional discontinuous Galerkin method with standard piecewise polynomial spaces. We formulate the locally divergence-free discontinuous Galerkin method for the MHD equations and perform extensive one and two-dimensional numerical experiments for both smooth solutions and solutions with discontinuities. Our computational results demonstrate that the locally divergence-free discontinuous Galerkin method, with a reduced cost comparing to the traditional discontinuous Galerkin method, can maintain the same accuracy for smooth solutions and can enhance the numerical stability of the scheme and reduce certain nonphysical features in some of the test cases.
Approximating optimal spare capacity allocation by successive survivable routing
Authors: Yu Liu, David Tipper, Peerapon Siripongwutikorn
Venue: IEEE/ACM Transactions on Networking (TON) (2005)

The design of survivable mesh based communication networks has received considerable attention in recent years. One task is to route backup paths and allocate spare capacity in the network to guarantee seamless communications services survivable to a set of failure scenarios. This is a complex multi-constraint optimization problem, called the spare capacity allocation (SCA) problem. This paper unravels the SCA problem structure using a matrix-based model, and develops a fast and efficient approximation algorithm, termed successive survivable routing (SSR). First, per-flow spare capacity sharing is captured by a spare provision matrix (SPM) method. The SPM matrix has a dimension the number of failure scenarios by the number of links. It is used by each demand to route the backup path and share spare capacity with other backup paths. Next, based on a special link metric calculated from SPM, SSR iteratively routes/updates backup paths in order to minimize the cost of total spare capacity. A backup path can be further updated as long as it is not carrying any traffic. Furthermore, the SPM method and SSR algorithm are generalized from protecting all single link failures to any arbitrary link failures such as those generated by Shared Risk Link Groups or all single node failures. Numerical results comparing several SCA algorithms show that SSR has the best trade-off between solution optimality and computation speed.
Application of learned user context to improve web search results
Authors: Aaron Archer Waterman, Jessie Burger, Mark Strohmaier
Venue: Journal of Computing Sciences in Colleges (2004)

Current search engines predictably return the same results for a given query, regardless of the user. However, different users often desire different information from searches made with identical keywords. The Web Host Access Tool (WHAT) project is an attempt to personalize Internet searching. Personalization is achieved through the use of a search context that is constructed through machine learning techniques.
Sun Certified Security Administrator for Solaris 9 10 Study Guide, 1 edition
Authors: John Chirillo, Edgar Danielyan
Venue:  (2005)

Table of contentsAbout the ContributorsAcknowledgmentsPrefaceIntroductionPart I: General Security ConceptsChapter 1: Fundamental Security ConceptsChapter 2: Attacks, Motives, and MethodsChapter 3: Security Management and StandardsPart II: Detection and Device ManagementChapter 4: Logging and Process AccountingChapter 5: Solaris Auditing, Planning, and ManagementChapter 6: Device, System, and File SecurityPart III: Security AttacksChapter 7: Denial of Service AttacksChapter 8: Remote Access AttacksPart IV: File and System Resources ProtectionChapter 9: User and Domain Account Management with RBACChapter 10: Fundamentals of Access ControlPart V: Solaris Cryptographic FrameworkChapter 11: Using Cryptographic ServicesPart VI: Authentication Services and Secure CommunicationChapter 12: Secure RPC Across NFS and PAMChapter 13: SASL and Secure ShellChapter 14: Sun Enterprise Authentication MechanismPart VII: AppendicesAppendix A: Final Test Study GuideAppendix B: Final TestAppendix C: Final Test AnswersAppendix D: Hands-On Exercises and SolutionsIndex
End-to-End Fair Bandwidth Allocation in Multi-Hop Wireless Ad Hoc Networks
Authors: Baochun Li
Venue: Proceedings of the 25th IEEE International Conference on Distributed Computing Systems (2005)

The shared-medium multi-hop nature of wireless ad hoc networks poses fundamental challenges to the design of an effective resource allocation algorithm to maximize spatial reuse of spectrum, whilemaintaining basic fairness among multiple flows. When previously proposed scheduling algorithms have been shown to perform well in providing fair shares of bandwidth among single-hop wireless flows, they do not consider multi-hop flows with an end-to-end perspective when maximizing spatial reuse of spectrum. Instead, previous work attempts to break each multi-hop end-to-end flow into multiple single-hop flows for scheduling purposes. While this may be sufficient for maintaining basic fairness properties among single-hop subflows with respect to bandwidth, we show that, due to the intra-flow correlation between upstream and downstream hops, it may not be appropriate for maximizing spatial reuse of bandwidth. In this paper, we analyze the issue of increasing such spatial reuse of bandwidth from an end-to-end perspective of multihop flows. Through analysis and simulation results, we show that our proposed algorithm is able to appropriately distribute resources amongmulti-hop flows, so that end-to-end throughput may be maximized in wireless ad hoc networks, while still maintaining basic fairness across the multi-hop flows.
Multithreshold voltage low-swing/low-voltage techniques in logic gates
Authors: Abdoul Rjoub, Odysseas Koufopavlou
Venue: Integration, the VLSI Journal (2004)

A low-power design circuit using low-swing voltage technique is proposed in this paper. The proposed technique could be used in order to decrease the power dissipation in three different types of logic gates namely the complementary pass-transistor logic (CPL), the cascade voltage switch logic (CVSL), and the domino logic. The main idea of the proposed technique is based on the replacement of the conventional CMOS inverter at the output of the logic gates with a new low-swing voltage inverter based on multithreshold voltage technology (LSIM). The inserted LSIM achieves a reduction in the static power dissipation, the dynamic power dissipation as the propagation delay time of the gates. To demonstrate the impact of the proposed technique in different applications, various types of circuits are designed for different conditions of: speed operation, load capacitance and supply voltages. In order to ensure the validity of the proposed technique in large circuit designs and fanout, a 8_bit Braun multiplier is designed in the three types of logic gates. SPICE simulation results for 3.3 V supply voltage using 0.5 µm multithreshold technology prove that 32%, 30% and 34%, reduction in power dissipation and 10%, 12% and 15% reduction in delay time could be achieved for the CPL, CVSL and domino logic gates respectively.
Inexact Semimonotonic Augmented Lagrangians with Optimal Feasibility Convergence for Convex Bound and Equality Constrained Quadratic Programming
Authors: Z. Dostál
Venue: SIAM Journal on Numerical Analysis (2005)

A variant of the augmented Lagrangian-type algorithm for strictly convex quadratic programming problems with bounds and equality constraints is considered. The algorithm exploits the adaptive precision control in the solution of auxiliary bound constraint problems in the inner loop while the Lagrange multipliers for the equality constraints are updated in the outer loop. The update rule for the penalty parameter is introduced that depends on the increase of the augmented Lagrangian. Global convergence is proved and an explicit bound on the penalty parameter is given. A qualitatively new feature of our algorithm is a bound on the feasibility error that is independent of conditioning of the constraints. When applied to the class of problems with the spectrum of the Hessian matrix in a given interval, the algorithm returns the solution in O(1) matrix-vector multiplications. The results are valid even for linearly dependent constraints. Theoretical results are illustrated by numerical experiments including the solution of an elliptic variational inequality.