ppxscal/embedding_network huggingface dataset:
Integrating UML diagrams for production control systems
Authors: Hans J. Köhler, Ulrich Nickel, Jörg Niere, Albert Zündorf
Venue: Proceedings of the 22nd international conference on Software engineering (2000)

This paper proposes to use SDL block diagrams, UML class diagrams, and UML behavior diagrams like collaboration diagrams, activity diagrams, and statecharts as a visual programming language. We describe a modeling approach for flexible, autonomous production agents, which are used for the decentralization of production control systems. In order to generate a (Java) implementation of a production control system from its specification, we define a precise semantics for the diagrams and we define how different (kinds of) diagrams are combined to a complete executable specification.Generally, generating code from UML behavior diagrams is not well understood. Frequently, the semantics of a UML behavior diagram depends on the topic and the aspect that is modeled and on the designer that created it. In addition, UML behavior diagrams usually model only example scenarios and do not describe all possible cases and possible exceptions.We overcome these problems by restricting the UML notation to a subset of the language that has a precise semantics. In addition, we define which kind of diagram should be used for which purpose and how the different kinds of diagrams are integrated to a consistent overall view.
The Moore--Penrose Generalized Inverse for Sums of Matrices
Authors: James Allen Fill, Donniell E. Fishkind
Venue: SIAM Journal on Matrix Analysis and Applications (1999)

In this paper we exhibit, under suitable conditions, a neat relationship between the Moore--Penrose generalized inverse of a sum of two matrices and the Moore--Penrose generalized inverses of the individual terms. We include an application to the parallel sum of matrices.
Interconnect scaling implications for CAD
Authors: Ron Ho, Ken Mai, Hema Kapadia, Mark Horowitz
Venue: Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design (1999)

Interconnect scaling to deep submicron processes presents many challenges to today's CAD flows. A recent analysis by Sylvester and Keutzer examined the behavior of average length wires under scaling, and controversially concluded that current CAD tools are adequate for future module-level designs. In our work, we show that average length wire scaling is sensitive to the technology assumptions, although the change in their behavior is small under all reasonable scaling assumptions. However, examining only average length wires is optimistic, since long wires are the ones that primarily cause CAD tool exceptions. In a module of fixed complexity, under both optimistic and pessimistic scaling assumptions, the number of long wires will increase slowly with scaling. More importantly, as the overall die capacity grows exponentially, the number of modules and thus the total number of wires in a design, will also increase exponentially. Thus, if the design team size and per-designer workload is to remain relatively constant, future CAD tools will need to handle long wires much better than current tools to reduce the percentage of wires that require designer intervention.
Dynamic vectorization: a mechanism for exploiting far-flung ILP in ordinary programs
Authors: Sriram Vajapeyam, P. J. Joseph, Tulika Mitra
Venue: ACM SIGARCH Computer Architecture News (1999)

Several ILP limit studies indicate the presence of considerable ILP across dynamically far-apart instructions in program execution. This paper proposes a hardware mechanism, dynamic vectorization (DV), as a tool for quickly building up a large logical instruction window. Dynamic vectorization converts repetitive dynamic instruction sequences into vector form, enabling the processing of instructions from beyond the corresponding program loop to be overlapped with the loop. This enables vector-like execution of programs with relatively complex static control flow that may not be amenable to static, compile time vectorization. Experimental evaluation shows that a large fraction of the dynamic instructions of four of the six SPECInt92 programs can be captured in vector form. Three of these programs exhibit significant potential for ILP improvements from dynamic vectorization, with speedups of more than a factor of 2 in a scenario of realistic branch prediction and perfect memory disambiguation. Under perfect branch prediction conditions, a fourth program also shows well over a factor of 2 speedup from DV. The speedups are due to the overlap of post-loop processing with loop processing.
Stability and Convergence of Principal Component Learning Algorithms
Authors: Wei-Yong Yan
Venue: SIAM Journal on Matrix Analysis and Applications (1998)

This paper is concerned with the differential equation approximating the subspace learning algorithm for extracting principal components. Two issues are fully resolved. First, all the stable equilibria are found. Second, the global convergence rate is explicitly obtained. The whole treatment is without the nonsingularity assumption on the covariance matrix.
Fault modeling and simulation for crosstalk in system-on-chip interconnects
Authors: Michael Cuviello, Sujit Dey, Xiaoliang Bai, Yi Zhao
Venue: Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design (1999)

System-on-chips (SOCs) using ultra deep sub-micron (DSM) technologies and GHz clock frequencies have been predicted by the 1997 SIA Road Map. Recent studies [3,4], as well as experiments reported in this paper, show significant crosstalk effects in long on-chip interconnects of GHz DSM chips. Recognizing the importance of high-speed, reliable interconnects in GHz SOCs, we address in this paper the problem of testing for glitch and delay errors caused by crosstalk in buses and interconnects between components of a SOC.Since it is not possible to explicitly test for all the possible process variations and defects that can lead to crosstalk errors in SOC interconnects, we present an abstract model, Maximum Aggressor (MA) fault model, and its test requirements. The attractiveness of the model is that it can abstract crosstalk defects in interconnects with a linear number of faults, while the corresponding MA tests provide complete coverage for all physical level defects related to cross-coupling capacitance between the interconnects. A SPICE-level fault simulation methodology is presented which allows simulation of a small subset of the potentially exponential number of defects. The simulation methodology also enables validation of the proposed fault model and the resulting test set.
Using complete system simulation to characterize SPECjvm98 benchmarks
Authors: Tao Li, Lizy Kurian John, Vijaykrishnan Narayanan, Anand Sivasubramaniam, Jyotsna Sabarinathan, Anupama Murthy
Venue: Proceedings of the 14th international conference on Supercomputing (2000)

Complete system simulation to understand the influence of architecture and operating systems on application execution has been identified to be crucial for systems design. While there have been previous attempts at understanding the architectural impact of Java programs, there has been no prior work investigating the operating system (kernel) activity during their executions. This problem is particularly interesting in the context of Java since it is not only the application that can invoke kernel services, but so does the underlying Java Virtual Machine (JVM) implementation which runs these programs. Further, the JVM style (JIT compiler or interpreter) and the manner in which the different JVM components (such as the garbage collector and class loader) are exercised, can have a significant impact on the kernel activities.To investigate these issues, this research uses complete system simulation of the SPECjvm98 benchmarks on the SimOS simulation platform. The execution of these benchmarks on both JIT compilers and interpreters is profiled in detail, to identify and quantify where time is spent in each component. The kernel activity of SPECjvm98 applications constitutes up to 17% of the execution time in the large dataset and up to 31% in the small dataset. The average kernel activity in the large dataset is approximately 10%, in comparison to around 2% in four SPECInt benchmarks studied. Of the kernel services, TLB miss handling is the most dominant in all applications. The TLB miss rates in the JIT compiler, dynamic class loader and garbage collector portions of the JVM are individually analyzed. In addition to such execution profiles, the ILP in the user and kernel mode are also quantified. The Java code is seen to limit exploitable parallelism and aggressive instruction issue is seen to be less efficient for SPECjvm98 benchmarks in comparison to SPEC95 programs. Also, the kernel mode of execution does not exhibit as much ILP as the user mode.
Selectivity estimation in spatial databases
Authors: Swarup Acharya, Viswanath Poosala, Sridhar Ramaswamy
Venue: Proceedings of the 1999 ACM SIGMOD international conference on Management of data (1999)

Selectivity estimation of queries is an important and well-studied problem in relational database systems. In this paper, we examine selectivity estimation in the context of Geographic Information Systems, which manage spatial data such as points, lines, poly-lines and polygons. In particular, we focus on point and range queries over two-dimensional rectangular data. We propose several techniques based on using spatial indices, histograms, binary space partitionings (BSPs), and the novel notion of spatial skew. Our techniques carefully partition the input rectangles into subsets and approximate each partition accurately. We present a detailed experimental study comparing the proposed techniques and the best known sampling and parametric techniques. We evaluate them using synthetic as well as real-life TIGER datasets. Based on our experiments, we identify a BSP based partitioning that we call Min-Skew which consistently provides the most accurate selectivity estimates for spatial queries. The Min-Skew partitioning can be constructed efficiently, occupies very little space, and provides accurate selectivity estimates over a broad range of spatial queries.
A Vortex-Grid Method for Prandtl's Equations
Authors: Gabriella Puppo
Venue: SIAM Journal on Scientific Computing (1999)

A fast deterministic vortex-grid method for the solution of the two-dimensional unsteady boundary layer equations is presented. The new method uses a Lagrangian particle formulation for the convective step of the momentum equation, as in Chorin's random vortex sheet method, while the diffusion step is solved with finite differences on an adaptive Eulerian grid. Two algorithms for choosing the grid are proposed and compared. A numerical convergence proof is given on a standard model problem and the rate of convergence is estimated. Finally the scheme is applied to the impulsively started circular cylinder. Our results show that the present scheme is able to describe the formation of the singularity, in agreement with the results of Van Dommelen and Shen [ J. Comput. Phys., 38 (1980), pp. 125--140].
Mechatronic assessment of arm impairment after chronic brain injury
Authors: D. J. Reinkensmeyer, B. D. Schmit, W. Z. Rymer
Venue: Technology and Health Care (1999)

Significant potential exists for mechatronic devices to improve assessment and treatment of individuals with a movement disability following stroke, traumatic brain injury, or cerebral palsy. We report the use of a mechatronic device for evaluation of the arm after chronic brain injury. We performed a series of experiments with the device in order to identify the relative contribution of three different motor impairments to decreased active range of motion of reaching in five brain-injured subjects. Our findings were that passive tissue restraint and agonist weakness, rather than antagonist restraint, were the most common contributors to decreased active range of motion. These results demonstrate the feasibility of objective assessment of functional movement using a mechatronic device, and could provide the basis for improved, individualized treatment planning and monitoring following brain injury.
Weakly Triangulated Comparability Graphs
Authors: Elaine Eschen, Ryan B. Hayward, Jeremy Spinrad, R. Sritharan
Venue: SIAM Journal on Computing (1999)

The class of weakly triangulated comparability graphs and their complements are generalizations of interval graphs and chordal comparability graphs. We show that problems on these classes of graphs can be solved efficiently by transforming them into problems on chordal bipartite graphs. We show that recognition and independent set on weakly triangulated comparability graphs can be solved in O(n2) time in this manner, and that the number of weakly triangulated comparability graphs is $2^{\Theta ( n {{\log}^2} n)}$.\ We also give algorithms to compute transitive closure and transitive reduction in O(n2loglogn) time if the underlying undirected graph of the transitive closure is a weakly triangulated comparability graph.
Optimal Interpolatory Subdivision Schemes in Multidimensional Spaces
Authors: Bin Han, Rong-Qing Jia
Venue: SIAM Journal on Numerical Analysis (1998)

We analyze the approximation and smoothness properties of fundamental and refinable functions that arise from interpolatory subdivision schemes in multidimensional spaces. In particular, we provide a general construction of bivariate interpolatory refinement masks such that the corresponding fundamental and refinable functions attain the optimal approximation order and smoothness order. In addition, these interpolatory refinement masks are minimally supported and enjoy full symmetry. Several examples are explicitly computed.
The Graphs with All Subgraphs T-Perfect
Authors: A. M. H. Gerards, F. B. Shepherd
Venue: SIAM Journal on Discrete Mathematics (1998)

The richest class of t-perfect graphs known so far consists of the graphs with no so-called odd-K. Clearly, these graphs have the special property that they are hereditary t-perfect in the sense that every subgraph is also t-perfect, but they are not the only ones. In this paper we characterize hereditary t-perfect graphs by showing that any non--t-perfect graph contains a non--t-perfect subdivision of K4, called a bad-K4. To prove the result we show which "weakly 3-connected" graphs contain no bad-K4; as a side-product of this we get a polynomial time recognition algorithm.It should be noted that our result does not characterize t-perfection, as that is not maintained when taking subgraphs but only when taking induced subgraphs.
Inference of message sequence charts
Authors: Rajeev Alur, Kousha Etessami, Mihalis Yannakakis
Venue: Proceedings of the 22nd international conference on Software engineering (2000)

Software designers draw Message Sequence Charts for early modeling of the individual behaviors they expect from the concurrent system under design. Can they be sure that precisely the behaviors they have described are realizable by some implementation of the components of the concurrent system? If so, can one automatically synthesize concurrent state machines realizing the given MSCs? If, on the other hand, other unspecified and possibly unwanted scenarios are &ldquo;implied&rdquo; by their MSCs, can the software designer be automatically warned and provided the implied MSCs?In this paper we provide a framework in which all these questions are answered positively. We first describe the formal framework within which one can derive implied MSCs, and we then provide polynomial-time algorithms for implication, realizability, and synthesis. In particular, we describe a novel algorithm for checking deadlock-free (safe) realizability.
Structure and Motion Estimation from Dynamic Silhouettes under Perspective Projection
Authors: Tanuja Joshi, Narendra Ahuja, Jean Ponce
Venue: International Journal of Computer Vision (1999)

We address the problem of estimating the structure and motion of a smooth curved object from its silhouettes observed over time by a trinocular stereo rig under perspective projection. We first construct a model for the local structure along the silhouette for each frame in the temporal sequence. The local models are then integrated into a global surface description by estimating the motion between successive time instants. The algorithm tracks certain surface features (parabolic points) and image features (silhouette inflections and frontier points) which are used to bootstrap the motion estimation process. The entire silhouettes along with the reconstructed local structure are then used to refine the initial motion estimate. We have implemented the proposed approach and report results on real images.
A Modified Forward-Backward Splitting Method for Maximal Monotone Mappings
Authors: Paul Tseng
Venue: SIAM Journal on Control and Optimization (2000)

We consider the forward-backward splitting method for finding a zero of the sum of two maximal monotone mappings. This method is known to converge when the inverse of the forward mapping is strongly monotone. We propose a modification to this method, in the spirit of the extragradient method for monotone variational inequalities, under which the method converges assuming only the forward mapping is (Lipschitz) continuous on some closed convex subset of its domain. The modification entails an additional forward step and a projection step at each iteration. Applications of the modified method to decomposition in convex programming and monotone variational inequalities are discussed.
Analysis of ISP IP/ATM network traffic measurements
Authors: Raja Epsilon, Jun Ke, Carey Williamson
Venue: ACM SIGMETRICS Performance Evaluation Review (1999)

This paper presents network traffic measurements collected from a commercial Internet Service Provider (ISP) whose traffic is being carried over an ATM backbone network. Much of the aggregate traffic is Web-related, and thus represents a Web/TCP/IP/AAL-5/ATM protocol stack. Four traces have been collected at the AAL-5 frame level, using a NavTel IW95000 ATM test set. These traces provide a detailed look at protocol-level behaviours, but only for rather short time durations (e.g., 30-40 seconds per trace). Analyses focus on aggregate-level traffic characteristics, as well as host-level and TCP connection-level traffic characteristics.The main workload characteristics observed from the measurements are the burstiness of the aggregate and individual traffic flows, a non-uniform distribution of traffic amongst hosts, a trimodal packet size distribution, and the strong presence of network-level effects (e.g., client modem speed, network Maximum Transmission Unit (MTU), network round trip time, TCP slow start) in the traffic structures seen. The workload characteristics are quite consistent across the four traces studied.
Partitioning Sequential Circuits on Dynamically Reconfigurable FPGAs
Authors: Douglas Chang, Malgorzata Marek-Sadowska
Venue: IEEE Transactions on Computers (1999)

A fundamental feature of Dynamically Reconfigurable FPGAs (DRFPGAs) is that the logic and interconnect are time-multiplexed. Thus, for a circuit to be implemented on a DRFPGA, it needs to be partitioned such that each subcircuit can be executed at a different time. In this paper, the partitioning of sequential circuits for execution on a DRFPGA is studied. To determine how to correctly partition a sequential circuit and what are the costs in doing so, we propose a new gate-level model that handles time-multiplexed computation. We also introduce an enchanced force directed scheduling (FDS) algorithm to partition sequential circuits that finds a correct partition with low logic and communication costs, under the assumption that maximum performance is desired. We use our algorithm to partition seven large ISCAS '89 sequential benchmark circuits. The experimental results show that the enhanced FDS reduces communication costs by 27.5 percent with only a 1.1 percent increase in the gate cost compared to traditional FDS.
Acquiring the reflectance field of a human face
Authors: Paul Debevec, Tim Hawkins, Chris Tchou, Haarm-Pieter Duiker, Westley Sarokin, Mark Sagar
Venue: Proceedings of the 27th annual conference on Computer graphics and interactive techniques (2000)

We present a method to acquire the reflectance field of a human face and use these measurements to render the face under arbitrary changes in lighting and viewpoint. We first acquire images of the face from a small set of viewpoints under a dense sampling of incident illumination directions using a light stage. We then construct a reflectance function image for each observed image pixel from its values over the space of illumination directions. From the reflectance functions, we can directly generate images of the face from the original viewpoints in any form of sampled or computed illumination. To change the viewpoint, we use a model of skin reflectance to estimate the appearance of the reflectance functions for novel viewpoints. We demonstrate the technique with synthetic renderings of a person's face under novel illumination and viewpoints.
Design, Implementation and Analysis of a New Redundant CORDIC Processor with Constant Scaling Factor and Regular Structure
Authors: Shen-Fu Hsiao, Jen-Yin Chen
Venue: Journal of VLSI Signal Processing Systems (1998)

A new high-speed redundant CORDIC processor is designed and implemented based on the double rotation method, which turns out to be the two-dimensional (2D) Householder CORDIC, a special case of the generalized Householder CORDIC in the 2D Euclidean vector space. The new processor has the advantages of regular structure and high throughput rate. The pipelined structure with radix-2 signed-digit (SD) redundant arithmetic is adopted to reduce the carry-propagation delay of the adders while the digit-serial structure alleviates the burden of the hardware cost and I/O requirement. Compared to previously proposed designs, the new CORDIC processor preserves the constant scaling factor, an important merit of the original CORDIC, and thus does not require any complicated division or square-root operations for variable scaling factor calculation. Furthermore, the processor is well suited to VLSI implementation since it does not call for any irregularly inserted correcting iterations. Both angle calculation mode for computing trigonometric function and vector rotation mode for plane rotations are supported. Practical VLSI chip implementation of the fixed-point redundant CORDIC processor using 0.6 &mu;m standard cell library is given including detailed numerical error analysis.
Reliable Location and Regression Estimates with Application to Range Image Segmentation
Authors: M. Baccar, L. A. Gee, M. A. Abidi
Venue: Journal of Mathematical Imaging and Vision (1999)

Range images provide important sources of information in many three-dimensional robot vision problems such as navigation and object recognition. Many physical factors, however, introduce noise to the discrete measurements in range images, identifying the need to reassess the error distribution in samples taken from real range images. This paper suggests the use of the L norms to yield reliable estimates of location and regression coefficients. This particular approach is compared against two commonly used approaches: Equally Weighted Least Squares, which minimizes the L_2 norm&semi; and the Chebychev approximation, which minimizes the L_1 norm. The problem is a weighted least squares case where the weights are derived from the chosen parameter, p, and its ability to yield a variety of location estimates spanning from the sample mean to the sample median. These two estimates have a wide application in image processing that includes noise removal. This paper will show the problems associated with these two techniques, and suggest experimental solutions to minimize them. A specific operating range is determined in which the L norms perform well and a regression module is used in conjunction with a region-growing segmentation algorithm to provide a reliable partition of range images.