ppxscal/embedding_network huggingface dataset:
Tactic-Based Modeling of Cognitive Inference on Logically Structured Notation
Authors: Eric Aaron
Venue:  (2000)

Computational (algorithmic) models of high-level cognitive inference tasks such as logical inference, mathematical inference, and decision making can have both theoretical and practical impact. They can improve our theoretical understanding of how people think and also provide practical direction for applications such as automated reasoning systems, systems attuned to user-interaction in decision-critical environments, and computer-aided education. To support those benefits, cognitive models need to be detailed, compositional, based in well-understood mathematics, and, to whatever extent possible, descriptively accurate. We introduce a new, interdisciplinary approach that could be used to develop cognitive models of high-level inference with these properties. Two significant aspects of this approach are tactics and eyetracking methods. Tactics are used to express high-level inferences in fully formalized mathematics for automated theorem proving systems; eyetracking methods provide insight into real-time and microcognitive information processing by permitting analysis of the visual attention of people performing cognitive tasks. Combining tactics and eyetracking methods with traditional techniques from applied logic, artificial intelligence, and cognitive science can result in more deeply detailed and accurate cognitive models. We demonstrate the feasibility of this new approach to modeling by describing its application to a calculational logic system that supports schematic reasoning via metalinguistic operations (such as textual substitution) without resorting to higher-order logic. We discuss several computational, psychological, and pedagogical insights that resulted from this approach, and we present a detailed, tactic-based model of calculational logic inference. Specific results include: an explanation of calculational logic as a formalized metalogic; a tactic-based implementation of calculational logic inference; some pedagogical observations on the teaching of calculational logic; and experimental results that demonstrate that eyetracking methods can provide insight into theorem proving that could not be achieved by studies of written work alone.
Active Files: A Mechanism for Integrating Legacy Applications into Distributed Systems
Authors: Partha Dasgupta, Ayal Itzkovitz, Vijay Karamcheti
Venue: Proceedings of the The 20th International Conference on Distributed Computing Systems ( ICDCS 2000) (2000)

Despite increasingly distributed Internet information sources with diverse storage formats and access-control constraints, most of the end applications (e.g., filters and media players) that view and manipulate data from these sources operate against a traditional file-based interface. These legacy applications need to be rewritten to access remote sources, or need to rely upon ad hoc intermediary applications that aggregate the data into a passive file before executing the legacy application.This paper presents a simple, elegant, programmable method for allowing natural integration of legacy applications into distributed system infrastructures. The approach called active files enables multiple information sources to be encapsulated as a local file that serves as their logical proxy. This local file is accessed though a sentinel process, which automatically starts when the file is opened, aggregates data from multiple sources, and filters all access to and from the file. More importantly, the integration of active files into client applications is transparent: an active file is virtually indistinguishable from a regular file. Active files find a variety of applications in both distributed and non-distributed systems. We discuss active files, their semantics, their usage and their implementations in Windows NT.
Modeling and analysis of complex computer systems-the MTCCS approach
Authors: H. Toetenel, R. L. Spelberg, S. Stuurman, J. van Katwijk
Venue: Proceedings of the 2nd IEEE International Conference on Engineering of Complex Computer Systems (1996)

The paper presents results from work in progress on finding a method for formal specification and verification of real time concurrent systems that incorporate a non trivial data component. We have extended Timed CCS, a timed CCS variant with a model oriented data language based on VDM. The semantics of the extension, called MTCCS is expressed in a combination of denotational and operational style. We show how verification of temporal logic properties based on symbolic model checking can be made possible for such a combination notation.
I/O Cell Placement and Electrical Checking Methodology for ASICs with Peripheral I/Os
Authors: James P. Libous
Venue: Proceedings of the 2nd International Symposium on Quality Electronic Design (2001)

Optimized I/O cell placement techniques take into account electromigration (EM), IR drop, and dI/dt noise issues in the power distribution network. This paper describes fast and easy electrical checking algorithms to be used early in the design process to verify if the I/O placements meet placement guidelines, and explains the details of the I/O cell placement-related rules used by the checking tool. Use of these techniques and methods can ensure high quality ASICs.
Segmentation and Recognition of Handwritten Dates
Authors: M. Morita, R. Sabourin, F. Bortolozzi, C. Y. Suen
Venue: Proceedings of the Eighth International Workshop on Frontiers in Handwriting Recognition (IWFHR'02) (2002)

This paper presents an HMM-MLP hybrid system to recognize complex date images written on Brazilian bank cheques. The system first segments implicitly a date image into sub-fields through the recognition process based on an HMM-based approach. Afterwards, the three obligatory date sub-fields are processed by the system (day, month and year). A neural approach has been adopted to work with strings of digits and a Markovian strategy to recognize and verify words. We also introduce the concept of meta-classes of digits, which is used to reduce the lexicon size of the day and year and improve the precision of their segmentation and recognition. Experiments show interesting results on date recognition.
Design and Implementation of Interrupt Packaging Mechanism
Authors: Kohta Nakashima, Shigeru Kusakabe, Hideo Taniguchi, Makoto Amamiya
Venue: Proceedings of the International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA'02) (2002)

As the amount of data transferred between the main processing unit and peripheral devices increases, the frequency of interrupts from peripheral devices also increases. Thus, the efficiency of interrupt handling is one of the key issues that must be addressed to realize high performance computing environments. In conventional interrupt mechanisms, an interrupt handler consists of three parts: a pre-processing routine, a main-handler routine and a post-processing routine. During a pre-processing routine, all register values are pushed to a stack, and values of the interrupt controller are changed so that the main-handler routine can execute with registers in a given interrupt priority. During a post-processing routine, values of interrupt controller are restored, and all register values are popped from the stack. The more interrupts occur, the more pre-processing and post-processing routine overhead must betolerated.In order to reduce interrupt overhead, we propose an interrupt packaging mechanism that packages main handlers of a series of interrupts and reduces the overhead of pre/post-processing.We have designed and implemented the interrupt packaging mechanism for interrupts from a Myrinet NIC (Network Interface Card). In our evaluation, we have improved system performance by 6.07%.
Verification of Fair Transition Systems
Authors: Orna Kupferman, Moshe Y. Vardi
Venue:  (1998)

In program verification, we check that an implementation meets its specification. Both the specification and the implementation describe the possible behaviors of the program, although at different levels of abstraction. We distinguish between two approaches to implementation of specifications. The first approach is trace-based implementation, where we require every computation of the implementation to correlate to some computation of the specification. The second approach is tree-based implementation, where we require every computation tree embodied in the implementation to correlate to some computation tree embodied in the specification. The two approaches to implementation are strongly related to the linear-time versus branching-time dichotomy in temporal logic. In this work, we examine the trace-based and the tree-based approaches from a complexity-theoretic point of view. We consider and compare the complexity of verification of fair transition systems, modeling both the implementation and the specification in the two approaches. We consider unconditional, weak, and strong fairnesses. For the trace-based approach, the corresponding problem is fair containment. For the tree-based approach, the corresponding problem is fair simulation. We show that while both problems are PSPACE-complete, their complexities in terms of the size of the implementation do not coincide, and the trace-based approach is easier. As the implementation is normally much bigger than the specification, we see this as an advantage of the trace-based approach. Our results are at variance with the known results for the case of transition systems with no fairness, where no approach is evidently advantageous.
Compact Dictionaries for Fault Diagnosis in BIST
Authors: Chunsheng Liu, Krishnendu Chakrabarty
Venue: Proceedings of the 4th International Symposium on Quality Electronic Design (2003)

We present a new technique for generating compactdictionaries for cause-effect diagnosis in BIST. Thisapproach relies on the use of three compact dictionaries: (i)D1, containing compacted LFSR signatures for a smallnumber of patterns and faults with high detectionprobability, (ii) an interval-based pass/fail dictionary D2 forthe BIST patterns and for faults with relatively lowerdetection probability, and (iii) D3, containing compactedLFSR signatures for clean-up ATPG vectors and random-resistantfaults. We show that D2, which is two orders ofmagnitude smaller than a maximal-resolution pass/faildictionary, provides nearly the same diagnostic resolutionas an uncompacted dictionary. We also show that by using a16-bit LFSR signature for D1 and D2, we obtain three ordersof magnitude reduction in dictionary size, yet nearly no lossin diagnostic resolution.
Using fault injection to increase software test coverage
Authors: J. M. Bieman, D. Dreilinger, Lijun Lin
Venue: Proceedings of the The Seventh International Symposium on Software Reliability Engineering (1996)

During testing, it is nearly impossible to run all statements or branches of a program. It is especially difficult to test the code used to respond to exceptional conditions. This untested code, often the error recovery code, will tend to be an error prone part of a system. We show that test coverage can be increased through an "assertion violation" technique for injecting software faults during execution. Using our prototype tool, Visual C-Patrol (VCP), we were able to substantially increase test branch coverage in four software systems studied.
Robust Data Compression for Analogue Test Outputs
Authors: Aleksandra Rankov, Gaynor E. Taylor, John Webster
Venue: Proceedings of the Proceedings of The Eighth IEEE International On-Line Testing Workshop (IOLTW'02) (2002)

Ohletz [1 ] described a mixed signal circuit architecture which can be reconfigured to allow built-in-self-test of both analogue and digital parts. In testing the analogue section an on board test signal can be generated from digital components, the analogue test output fed through an A-D converter and the resulting digital bit stream used as the input to a digital signature analyser. Clearly such test strategy has a number of advantages, but particular issues rise in using signature analysis in this way due to the tolerance bands ssociated with analogue signals. Such tolerances complicate the process of A-D conversion and lead to possible differences in the bit stream between two good devices with the danger of classifying good devices as faulty. The paper describes and evaluates method for overcoming this problem byillustrating it with a number of circuits.
Cost-Benefit Analysis of Web Bag in a Web Warehouse
Authors: Sourav S. Bhowmick, Wee-Keong Ng, Ee-Peng Lim, Sanjay Madria
Venue: Proceedings of the 1999 International Symposium on Database Engineering & Applications (1999)

Sets and bags are closely related structures and have been studied in relational databases. A bag is different from a set in that it is sensitive to the number of times an element occurs while a set is not. In this paper, we introduce the concept of web bag in the context of a web warehouse called WHOWEDA (Warehouse Of Weda Data) which we are currently building. Informally, a web bag is a web table which allows multiple occurrences of identical web tuples.Web bag helps to discover useful knowledge from a web table such as visible documents (or web sites), luminous docu-ments and luminous paths. In this paper, we provide a cost-benefit analysis of materializing web bags as compared to web tables with distinct web tuples.
The Hidden Costs of Design Qualit
Authors: Richard Goering, Richard Wallace
Venue: Proceedings of the 1st International Symposium on Quality of Electronic Design (2000)

This high-level panel will look at importantbut often overlookedglobal, social and economic implications of design quality. It will probe the costs, to both end users and manufacturers, of poor quality. Only by accounting for these costs can manufacturers gauge the importance of proper verification and design techniques.The goal of this panel is to identify some of the quality-related problems that could plausibly occur, discuss their consequences, and propose some solutions for improving the quality and reliability of electronic designs. This panel will also probe the question of who takes responsibility when silicon fails. Assuming that the wafer fab process is yielding correctly, and the chip is not working due to a design quality problem, then who pays what price? How is responsibility shared among systems companies, IP providers, and semiconductor manufacturers?
Toward a Practical Methodology for Completely Characterizing the Optimal Design Space
Authors: Stephen A. Blythe, Robert A. Walker
Venue: Proceedings of the 9th international symposium on System synthesis (1996)

One of the most compelling reasons for developing high-level synthesis systems has been the desire to quickly explore the design space. Since this problem is very difficult to solve optimally, most systems compute either lower bounds or estimates on the optimal tradeoff curve. The methodology described here goes beyond most previous work in several ways: (1) it computes all optimal tradeoff points so as to completely characterize the design space, (2) it solves not only the scheduling problem, but the clock determination and module selection problems as well, and (3) it carefully prunes the search space at each level of the design cycle.
Expressive Footwear for Computer-Augmented Dance Performance
Authors: Joseph A. Paradiso, Eric Hu
Venue: Proceedings of the 1st IEEE International Symposium on Wearable Computers (1997)

A sensor system is described for instrumenting a pair of dancing shoes in order to capture many expressive degrees of freedom and use them to drive music synthesizers and computer graphics in a real-time performance. Dynamic pressure is measured at three points in the shoe sole, as are the bend of the sole, pitch and yaw shoe angles, and translational shoe positions. Data will be transmit across a 19.2 kbaud wireless ink, enabling updates at 10 msec intervals.
Distributed Linear Algebra on Networks of Workstations
Authors: Peter Carlin
Venue:  (1994)

This thesis describes the development of a portion of a distributed linear algebra library for use on networks of workstations. The library was designed with special consideration towards three characterists of networks of workstations: small numbers of processes, availability of multithreading, and high communication latency. Two aspects of the library are highlighted. First, modifications to message passing primitives to permit their use in a multithreaded environment. Second, modifications to basic linear algebra algorithms to improve their performance on networks of stations. A model of distributed linear algebra on networks of workstations is developed, and used to predict the performance of the modified algorithms. These predictions are compared to experimental results on several networks of workstations.
Improving Behavior Efficiency in Virtual Worlds
Authors: Jeff White
Venue:  (1998)

As the complexity of computer games grows, it becomes increasingly necessary to manage the computational cost of both geometry and behavior. Although there have been many advances in software and hardware for efficiently processing geometry, there are relatively few techniques for managing behaviors. In anticipation of the rising cost of behavior execution, we identify techniques for improving behavior efficiency and discuss how these techniques are applicable to specific properties of behavior. We present examples that we have implemented that demonstrate the use and effectiveness of these techniques. We also describe a framework that allows applications to reuse these techniques. Although we focus on game environments, we believe this work is applicable to other virtual environments, such as information visualization, animated films, and virtual walkthroughs. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
Robustness of regularized linear classification methods in text categorization
Authors: Jian Zhang, Yiming Yang
Venue: Proceedings of the 26th annual international ACM SIGIR conference on Research and development in informaion retrieval (2003)

Real-world applications often require the classification of documents under situations of small number of features, mis-labeled documents and rare positive examples. This paper investigates the robustness of three regularized linear classification methods (SVM, ridge regression and logistic regression) under above situations. We compare these methods in terms of their loss functions and score distributions, and establish the connection between their optimization problems and generalization error bounds. Several sets of controlled experiments on the Reuters-21578 corpus are conducted to investigate the robustness of these methods. Our results show that ridge regression seems to be the most promising candidate for rare class problems.
Hardware Implementation of 'Supplementary Symmetrical Logic Circuit Structure' Concepts
Authors: Dan Olson, K. Wayne Current
Venue: Proceedings of the 30th IEEE International Symposium on Multiple-Valued Logic (2000)

A test chip was fabricated in standard 1.2-micron CMOS technology using Supplementary Symmetrical Logic Circuit Structure (SUS-LOC) concepts. The test chip demonstrates several ternary logical functions as well as the flexibility of the SUS-LOC structure. Logic functionality and switching performance of the chip were simulated and verified experimentally. Simulated and experimental results are presented and discussed.
Wide-diameter of generalized undirected de Bruijn graph UG/sub B/(n, n/sup 2/)
Authors: H. E. Escuardro, F. P. Muga,  II
Venue: Proceedings of the 1997 International Symposium on Parallel Architectures, Algorithms and Networks (1997)

Caro et al. (1996) have shown that the wide-diameter of the generalized de Bruijn Graphs UG/sub B/ (n, n(n+1)) is 5 for n/spl ges/2. In this paper, we show that the w-diameter of UG/sub B/ (n, n/sup 2/) is 4 where w=2(n-1) and n>4, We also show that UG/sub B/ (n, n/sup 2/) is 2(n-1)-regular and has diameter 2.
An Efficient Iterative Method for Stokes equations and Lame equations for nearly incompressible media with highly discontinuous coefficients
Authors: N. S. Bakhvalov, A. V. Knyazev, R. R. Parashkevov
Venue:  (1997)

We consider an efficient iterative solution technique for the isotropic linear elasticity (Lam\''{e}) equations for nearly incompressible media and Stokes equations with highly discontinuous coefficients. The iterative method involves a special choice for an initial guess and a preconditioner based on solving a constant coefficient problem. For simplicity, we only analyze a periodic boundary value problem. Some other standard boundary value problems can be treated similarly, or can be reduced to the periodic case by using the fictitious domain method. For the Lam\''{e} equations, we also discuss the case of absolutely compressible media.
(Un)decidability results for trigger design theories
Authors: Arno P.J.M. Siebes, Johan F.P. Akker, M. H. Voort
Venue:  (1995)

Active databases are databases extended with production rules or triggers. Triggers have different uses in databases. Originally they were devised as a more flexible method of constraint enforcement.Triggers have found a much wider use however, because it is possible to code all dynamics of an information system in database triggers.Such use results in the presence of large sets of triggers in an active database. The mutual interaction of triggers in a set can lead to undesired results such as non-termination of trigger execution. To enable us to analyse a trigger set in advance for such behaviour we need a design theory for database triggers. In this report we consider a number of predicates on trigger sets. Most important are termination and confluence. We examine the decidability of these predicates in a number of simple trigger languages. We show that these predicates are decidable for very simple triggers that consists of local conditions and replacement of attribute values. We also show that a very small extension of the trigger language, viz. with non-local conditions, makes these predicates undecidable. The extension of the initial language with arithmetic in the form of the successor function preserves the decidability of termination and confluence.
A criterion for constantness of harmonic functions on exterior domains
Authors: Murat Özdemir
Venue: Applied Mathematics and Computation (2003)

Liouville's classical theorem assures that every harmonic function on the whole space Rn that is moreover bounded from below is a constant. It is easy to observe that, generally, the some result does not hold if we replace the whole space Rn with an exterior domain. In this paper we have obtained a criterion for constantness of harmonic functions defined on exterior domains.
Document-self expansion for text categorization
Authors: Yuen-Hsien Tseng, Da-Wei Juang
Venue: Proceedings of the 26th annual international ACM SIGIR conference on Research and development in informaion retrieval (2003)

Approaches to increase training examples to hopefully improve classification effectiveness are proposed in this work. The approaches were verified by use of two Chinese collections classified by two top-performing classifiers.