ppxscal/embedding_network huggingface dataset:
A dynamically reconfigurable hardware-based cipher chip
Authors: Yukio Mitsuyama, Zaldy Andales, Takao Onoye, Isao Shirakawa
Venue: Proceedings of the 2001 Asia and South Pacific Design Automation Conference (2001)

A cipher core has been implemented, which is dedicated to a 64-bit block, 128-bit key, dynamically reconfigurable hardware-based cipher, called "Chameleon", in which two 32-cell, 8-context dynamically reconfigurable hardware units are employed to generate new subkeys for each of the 16 iterations in the encryption/decryption process. The proposed architecture has been implemented by 0.6 um CMOS3LM technology, using 65.6K transistors and attaining a maximum throughput of 317.5 Mbps. The new approach demonstrates distinctive features of enhanced complexity and flexibility dedicatedly for embedded encryption/decryption applications in the mobile computing.
Phase Space Error Control for Dynamical Systems
Authors: D. J. Higham, A. R. Humphries, R. J. Wain
Venue: SIAM Journal on Scientific Computing (1999)

Variable time-stepping algorithms for initial value ordinary differential equations are traditionally designed to solve a problem for a fixed initial condition and over a finite time. It can be shown that these algorithms may perform poorly for long time computations with initial conditions that lie in a small neighborhood of a fixed point. In this regime there are orbits that are bounded in space but unbounded in time, and the classical error-per-step or error-per-unit-step philosophy may be improved upon. A new error criterion is introduced that essentially bounds the truncation error at each step by a fraction of the solution arc length over the corresponding time interval. This new control can be incorporated within a standard algorithm as an additional constraint at negligible additional computational cost. It is shown that this new criterion has a positive effect on the linear stability properties and hence improves behavior in the neighborhood of stable fixed points. Furthermore, spurious fixed points and period two solutions are prevented. The new criterion is shown to be admissible in the sense that it can always be satisfied with nonzero stepsizes. Implementation details and numerical results are given.
Estimating the service time of web clients using server logs
Authors: Oscar Ardaiz, Felix Freig, Leandro Navarro
Venue: Workshop on Data communication in Latin America and the Caribbean (2001)

This article proposes and evaluates measures for estimating the service time of a web client using server logs, only from the server side without introducing traffic into the network. The HTTP protocol is described as well as the different interactions between the web server, the communication components, and the web client application. The first measure is based on the time it takes for the web server application to deliver an object to its operating system, keeping in mind the buffer effect of the server network. The second measure also considers the inter-arrival times to the server application of the GET requests for the objects that are part of a web page. We propose formulas, validated experimentally, that relate the proposed measurements in the server with the different components that take part in a web transaction and the service time experienced by clients. We have carried out several experiments to evaluate the validity of the proposed measurements and the best measure estimates the service time of the client with an error below 20% for 90% of the requests. We observed a cyclic component in the measurements of the server that can simplify the estimation of future values. For this reason, the proposed measures may be used to know what is the service time the client perceives in each visit to a server. It can also be used by content distribution networks to choose between several replica located in different places in the Internet.
Building a high-performance communication layer over virtual interface architecture on Linux clusters
Authors: Jin-Soo Kim, Kangho Kim Sung-In Jung
Venue: Proceedings of the 15th international conference on Supercomputing (2001)

The Virtual Interface Architecture (VIA) is an industry standard user-level communication architecture for cluster or system area networks. The VIA provides a protected, directly-accessible interface to a network hardware, removing the operating system from the critical communication path. Although the VIA enables low-latency high-bandwidth communication, the application programming interface defined in the VIA specification lacks many high-level features. In this paper, we develop a high performance communication layer over VIA, named SOVIA (Sockets Over VIA). Our goal is to make the SOVIA layer as efficient as possible so that the performance of native VIA can be delivered to the application, while retaining the portable Sockets semantics. We find that the single-threaded implementation with conditional sender-side buffering is effective in reducing latency. To increase bandwidth, we implement a flow control mechanism similar to the TCP's sliding window protocol. Our flow control mechanism is enhanced further by adding delayed acknowledgments and the ability to combine small messages. With these optimizations, SOVIA realizes comparable performance to native VIA, showing the latency of 10.5 &micro;sec for 4-byte messages and the peak bandwidth of 814Mbps on Giganet's cLAN. The functional validity of SOVIA is verified by porting FTP (File Transfer Protocol) application over SOVIA.
Development of a Decision Support System to Assist Anesthesiologists in Operating Room
Authors: Marina Krol, David L. Reich
Venue: Journal of Medical Systems (2000)

The complexity of modern anesthesia procedures requires the development of decision-support systems functioning in a smart-alarm capacity. We developed computer algorithms to detect critical conditions during surgery (light anesthesia or unstable blood pressure), based on computerized anesthesia records containing hemodynamic data (heart rate, mean arterial pressure and systolic arterial pressure). Our analysis indicated that a &ge;12% change in mean arterial blood pressure (MAP), compared with the median value of MAP over the preceding 10-min interval, may be chosen as the criterion for detecting LA, with a sensitivity of 96% and a specificity of 91%. The best agreement between human and computer ratings of blood pressure lability (correlation coefficient 0.78) was achieved when we used the absolute value of the fractional change of the mean arterial pressure (&verbar;FCM&verbar;) between one 2-min epoch and the next 2-min epoch. Work is under progress to develop a decision-support system to alert clinicians in the operating room environment to critical events.
An Adaptive-Focus Deformable Model Using Statistical and Geometric Information
Authors: Dinggang Shen, Christos Davatzikos
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (2000)

An active contour (snake) model is presented, with emphasis on medical imaging applications. There are three main novelties in the proposed model. First, an attribute vector is used to characterize the geometric structure around each point of the snake model; the deformable model then deforms in a way that seeks regions with similar attribute vectors. This is in contrast to most deformable models, which deform to nearby edges without considering geometric structure, and it was motivated by the need to establish point-correspondences that have anatomical meaning. Second, an adaptive-focus statistical model has been suggested which allows the deformation of the active contour in each stage to be influenced primarily by the most reliable matches. Third, a deformation mechanism that is robust to local minima is proposed by evaluating the snake energy function on segments of the snake at a time, instead of individual points. Various experimental results show the effectiveness of the proposed model.
VHDL-AMS: the missing link in system design - experiments with unified modelling in automative engineering
Authors: E. Moser, N. Mittwollen
Venue: Proceedings of the conference on Design, automation and test in Europe (1998)

After the IEEE ballot accepted the first draft language reference manual for VHDL-AMS (IEEE PAR 1076.1) in October 1997, we now can spend time and effort on applying the new arising methodology to real world problems outside the electronic domain. In automotive engineering we have system design problems dealing with hydraulic or mechanic components and their controlling units, for which we expect a major advantage by introducing unified modelling to all domains. With the Brite/EuRam-Project TOOLSYS (a joined effort of automotive industry and tool makers to apply VHDL-AMS as unified modelling language on mixed-domain applications) we prove the suitability as unified modelling and interchange language for real-world systems and components. First experiments with hydraulic components reveal numerical problems on analog circuit simulators. None of the available strategies for these particularly hard problems are included by the electronic simulator makers. With VHDL-AMS multi-domain modelling seems possible, now we need multi-domain simulation environments.
ML-DEWS: Modeling Language to Support Dynamic Evolution within Workflow Systems
Authors: Clarence Ellis, Karim Keddara
Venue: Computer Supported Cooperative Work (2000)

Organizations that are geared for success within today's business environments must be capable of rapid and continuous change. Dynamic change is a large and pervasive problem which surfaces within organizational workflows as well as within soft ware engineering, manufacturing, and numerous other domains. Procedural changes, performed in an ad hoc manner, can cause inefficiencies, inconsistencies, and catastrophic breakdowns within organizations. This document is concerned with change, especially dynamic change, to organizational procedures. We explain a taxonomy of change modalities, and present a modeling language for the unambiguous specification of procedural change. This language, call i>ML-DEWS, complements the formal model of dynamic change previously presented by the authors. Issues of exception handling, temporal specification, and participatory change are conveniently handled within the framework presented in this document.
An Integrated Approach to Designing and Evaluating CollaborativeApplications and Infrastructures
Authors: Prasun Dewan
Venue: Computer Supported Cooperative Work (2001)

Collaborative systems include both general infrastructures and specific applications for supporting collaboration. Because of the relative newness and complexity of these systems, it has been unclear what approach should be used to design and evaluate them. Based on the lessons learned from our work and that of others on collaborative systems, we have derived an integrated approach to researching collaborative applications and infrastructures. The approach can be described as a sequence of steps: We decompose the functionality of collaboration systems into smaller functions that can be researched more-or-less independently. For each of these functions, we adopt general (system-independent) principles regarding the design and implementation of the function, identify collaboration scenarios at multiple levels of abstraction, identify requirements based on the scenarios, adopt an interaction model to meet the requirements, realize the interaction model as a concrete user interface, develop a logical architecture of the system, identify a physical architecture for placing the logical components in a distributed system, develop infrastructure abstractions, use the abstractions to implement applications, and perform lab studies, field experiments, and simulations to evaluate the infrastructure and applications. As in other models with multiple phases, feedback from subsequent phases is used to modify the results from the previous phases. In this paper, we describe, illustrate and motivate this research plan.
Teaching CS1 with karel the robot in Java
Authors: Byron Weber Becker
Venue: ACM SIGCSE Bulletin (2001)

Most current Java textbooks for CS1 (and thus most current courses) begin either with fundamentals from the procedural paradigm (assignment, iteration, selection) or with a brief introduction to using objects followed quickly with writing objects. We have found a third way to be most satisfying for both teachers and students: using interesting predefined classes to introduce the fundamentals of object-oriented programming (object instantiation, method calls, inheritance) followed quickly by the traditional fundamentals of iteration and selection, also taught using the same predefined classes.Karel the Robot, developed by Richard Pattis [6] and well-known to many computer science educators, has aged gracefully and is a vital part of our CS1 curriculum. This paper explains how Karel may be used and the advantages of doing so.
Deterministic parsing of ambiguous grammars
Authors: A. V. Aho, S. C. Johnson, J. D. Ullman
Venue: Communications of the ACM (1975)

Methods of describing the syntax of programming languages in ways that are more flexible and natural than conventional BNF descriptions are considered. These methods involve the use of ambiguous context-free grammars together with rules to resolve syntactic ambiguities. It is shown how efficient LR and LL parsers can be constructed directly from certain classes of these specifications.
Computational algorithms for closed queueing networks with exponential servers
Authors: Jeffrey P. Buzen
Venue: Communications of the ACM (1973)

Methods are presented for computing the equilibrium distribution of customers in closed queueing networks with exponential servers. Expressions for various marginal distributions are also derived. The computational algorithms are based on two-dimensional iterative techniques which are highly efficient and quite simple to implement. Implementation considerations such as storage allocation strategies and order of evaluation are examined in some detail.
Psychology of calculator languages: a framework for describing differences in users' knowledge
Authors: Richard E. Mayer, Piraye Bayman
Venue: Communications of the ACM (1981)

This paper presents a framework for describing users' knowledge of how a simple four-function calculator operates. Differences among novices and experts in their conceptions of &ldquo;what goes on inside the calculator&rdquo; for various sequences of button presses are summarized. Individual differences include different views on when an expression is evaluated, different procedures for evaluating a chain of arithmetic, and different rules for evaluating unusual sequences of key presses.
Architectural and performance evaluation of GigaNet and Myrinet interconnects on clusters of small-scale SMP servers
Authors: Jenwei Hsieh, Tau Leng, Victor Mashayekhi, Reza Rooholamini
Venue: Proceedings of the 2000 ACM/IEEE conference on Supercomputing (CDROM) (2000)

GigaNet and Myrinet are two of the leading interconnects for clusters of commodity computer systems. Both provide memory-protected user-level network interface access, and deliver low-latency and high-bandwidth communication to applications. GigaNet is a connection-oriented interconnect based on a hardware implementation of Virtual Interface (VI) Architecture and Asynchronous Transfer Mode (ATM) technologies. Myrinet is a connection-less interconnect which leverages packet switching technologies from experimental Massively Parallel Processors (MPP) networks. This paper investigates their architectural differences and evaluates their performance on two commodity clusters based on two generations of Symmetric Multiple Processors (SMP) servers. The performance measurements reported here suggest that the implementation of Message Passing Interface (MPI) significantly affects the cluster performance. Although MPICH-GM over Myrinet demonstrates lower latency with small messages, the polling-driven implementation of MPICH-GM often leads to tight synchronization between communication processes and higher CPU overhead.
Low Voltage Rail to Rail CMOS Current Feedback Operational Amplifier and its Applications for Analog VLSI
Authors: Soliman A. Mahmoud, Hassan O. Elwan, Ahmed M. Soliman
Venue: Analog Integrated Circuits and Signal Processing (2000)

This paper presents a new CMOS current feedback operational amplifier (CFOA) with rail to rail swing capability at all terminals. The circuit operates as a class AB for lower power consumption. Besides operating at low supply voltages of &plusmn;1.5 V, the proposed CFOA has a standby current of 200 &mu;A. The proposed CFOA circuit is thus a versatile building block for low voltage low power applications. The applications of the CFOA to realize a transconductor/multiplier cell, MOS-C differential integrator, MOS-C bandpass filter and MOS-C oscillator are given. PSpice simulations based on 1.2 &mu;m level three parameters obtained from MOSIS are given.
Multilanguage programming on the JVM: the Ada 95 benefits
Authors: Franco Gasperoni, Gary Dismukes
Venue: ACM SIGAda Ada Letters (2000)

The latest trend in our industry, "pervasive computing", predicts the proliferation of numerous, often invisible, computing devices embedded in consumer appliances connected to the ubiquitous Internet. Secure, reliable applications combined with simplicity of use will make or break a company's reputation in this market.The Java "write once, run anywhere" paradigm, introduced by Sun in the mid-90s, is embodied in a widely available computing platform targeting pervasive devices. Although the Java Virtual Machine was designed to support the semantics of the Java programming language, it can also be used as a target for other languages.The Ada 95 programming language is a good match for the Java platform from the standpoint of its portability, security, reliability, and rich feature set. In this article we explain the features that have made Ada the language of choice for software-critical applications and how these features complement the Java programming language while increasing the overall reliability and flexibility of the Java platform.
Testing DSP cores based on self-test programs
Authors: W. Zhao, C. Papachristou
Venue: Proceedings of the conference on Design, automation and test in Europe (1998)

This paper presents a new method for the testing of the datapath of DSP cores based on self-test program. During the test, random patterns are loaded into the core, exercise different components of the core, and then are loaded out of the core for observation under the control of the self-test programs. We propose a systematic approach to generate the self-test program based on two metrics. One is the structural coverage and the other is the testability metric. Experimental results show the self-test program obtained by this approach can reach very high fault coverage in programmable core testing. A Systematic Analysis of Reuse Strategies for Design of Electronic Circuits83590292abs.htm Manfred Koegst, Dieter Garte Fraunhofer-Institut für Integrierte Schaltungen, EAS DresdenPeter Conradi, , Michael WahlUniversität-GH SiegenIn this paper a number of reuse approaches for circuit design are analysed. Based on this analysis an algebraic core model for discussion of a general reuse strategy is proposed. Using this model, the aim is to classify different reuse approaches for circuit design, to compare the applied terms and definitions, and to formulate classes of typical reuse tasks. In a practical application with focus on retrieval and parameterisation techniques, this model is on the way to being applied to DSP design issues. Reconfigurable Logic for Systems on a Chip83590340abs.htm W. Shields NeelyNational SemiconductorThe electronic systems of the future will be implemented in terms of multi-million gate "systems on a chip". These systems will require an enormous investment in design and manufacturing; yet the pace of technological change (e.g., new algorithm development, new processor and memory designs) and ever changing requirements puts them in danger of obsolescence soon after they are created - applications always want to take advantage of new technical advances and must meet changed requirements. What is needed are single chip systems that are designed to be adaptable to a family of applications. The emerging technology of configurable logic offers the promise of large-scale silicon systems that are adaptive after manufacture, with little or no sacrifice in execution efficiency compared to hard-wired systems.
A laminae approach to constructing geometric feature volumes
Authors: T. Lim, J. R. Corney, D. E. R. Clark
Venue: Proceedings of the sixth ACM symposium on Solid modeling and applications (2001)

The limiting factor for the majority of reported feature recognition (AFR) algorithms lie in their inability to handle anything more complex than the restricted geometric domain of 2.5D machined components. This paper describes a novel approach to recognising shape features on models comprising both simple and complex ruled surfaces. Specifically, the paper describes how the concept of 3D-laminae enables feature volumes bounded by complex ruled surfaces to be constructed. This generic feature recognition algorithm requires no predefined feature libraries and advocates the notion of neutral features, which separates the generic features identified by the extraction algorithm from those (features) classified subsequently to suit a discrete domain. The work concentrates on identifying machinable volumes (for manufacture by CNC machines) and the classifications presented apply specifically to this context. However, because the algorithm is capable of handling complex ruled surfaces, it is envisaged that the proposed methodology will be applicable to industries involved with the manufacture of dies and moulds.
Volumetric multi-texturing for functionally gradient material representation
Authors: Seok-Min Park, Richard H. Crawford, Joseph J. Beaman
Venue: Proceedings of the sixth ACM symposium on Solid modeling and applications (2001)

Solid Freeform Fabrication (SFF) methods have demonstrated the potential to manufacture parts from Functionally Gradient Materials (FGM). One of the keys to success is an accurate and systematic represention of varying material distributions in the geometry. This paper introduces a method called Volumetric Multi-Texturing (VMT) to represent a three dimensional density gradient. The scheme originates from volumetric rendering by texturing, which is used in computer graphics to create fuzzy objects such as clouds and smoke. By analogy, FGM design is envisaged as creating material clouds in a confined geometric space in a structured and controllable manner. Another motivation for pursuing this approach is that, based on our research into expected applications, material gradients will be emphasized near the surface of a part. Our method exploits procedural and implicit schemes to design and acquire density information. The implicit procedural approach, as opposed to an input database, allows a user to interactively create and modify the design patterns without explicitly changing the individual values in the database. Further, it promises convenience in process planning, and efficiency in data storage and computation time. The material gradient modeler is applied to a boundary representation (B-rep) model of the part. Therefore, this scheme can be easily integrated most commercial solid modelers. The theoretical approach, design procedure, and tool path generation for fabricating example parts are presented in the paper.
Topological ordering of a list of randomly-numbered elements of a network
Authors: Daniel J. Lasser
Venue: Communications of the ACM (1961)

A network of directed line segments free of circular elements is assumed. The lines are identified by their terminal nodes and the nodes are assumed to be numbered by a non-topological system. Given a list of these lines in numeric order, a simple technique can be used to create at high speed a list in topological order.