ppxscal/embedding_network huggingface dataset:
JADE: a FIPA2000 compliant agent development environment
Authors: Fabio Bellifemine, Agostino Poggi, Giovanni Rimassa
Venue: Proceedings of the fifth international conference on Autonomous agents (2001)

JADE (Java Agent Development Framework) is a software environment to build agent systems for the management of networked information resources in compliance with the FIPA2000 specifications for interoperable intelligent multi- agent systems. The goal of JADE is to simplify development while ensuring standard compliance through a comprehensive set of system services and agents. JADE offers an agent runtime system on which implement efficient FIPA 2000 compliant multi- agent systems and supports their development through the availability of a predefined programmable agent model and of a set of management and testing tools. This paper describes the main features of the JADE system and introduces some of the most important projects based on JADE software.
Switching response modeling of the CMOS inverter for sub-micron devices
Authors: L. Bisdounis, S. Nikolaidis, O. Koufopavlou, C. E. Goutis
Venue: Proceedings of the conference on Design, automation and test in Europe (1998)

In this paper an accurate, analytical model for the evaluation of the CMOS inverter delay in the sub- micron regime, is presented. A detailed analysis of the inverter operation is provided which results to accurate expressions describing the output waveform. These analytical expressions are valid for all the inverter operation regions and input waveform slopes. They take into account the influences of the short- circuit current during switching, and the gate-to- drain coupling capacitance. The presented model shows clearly the influence of the inverter design characteristics, the load capacitance, and the slope of the input waveform driving the inverter on the propagation delay. The results are in excellent agreement with SPICE simulations.
DNA segmentation as a model selection process
Authors: Wentian Li
Venue: Proceedings of the fifth annual international conference on Computational biology (2001)

Previous divide-and-conquer segmentation analyses of DNA sequences do not provide a satisfactory stopping criterion for the recursion. This paper proposes that segmentation be considered as a model selection process. Using the tools in model selection, a limit for the stopping criterion on the relaxed end can be determined. The Bayesian information criterion, in particular, provides a much more stringent stopping criterion than what is currently used. Such a stringent criterion can be used to delineate larger DNA domains. A relationship between the stopping criterion and the average domain size is empirically determined, which may aid in the determination of isochore borders.
Provable security for cryptographic protocols&mdash;exact analysis and engineering applications
Authors: James W. Gray,  III, Kin Fai Epsilon IP, King-Shan Lui
Venue: Journal of Computer Security (1998)

We develop an approach to deriving concrete engineering advice for cryptographic protocols from provable-security-style proofs of security. The approach is illustrated with a simple, yet useful protocol. Our main result provides the first published proof of an exact probabilistic relationship between a high-level protocol and multiple cryptographic primitives. This exact relationship enables us to rigorously derive concrete recommendations on the bitlengths of cryptographic keys and on how often principals should rekey. As an additional benefit of our approach, the process of developing our theorem and proof lead us to identify and implement an improvement in our example protocol.
Report of a visit to discuss common programming languages in Czechoslavakia and Poland, 1963
Authors: John A. Gosden, Roger E. Gay, John L. Jones, Jack N. Merner, Christopher J. Shaw
Venue: Communications of the ACM (1963)

Early in June 1963 there was a meeting in Berlin [1] of the Subcommittee for Programming Languages, SC5 of TC97, the Technical Committee for Standardization of Computers and Information Processing [2]. Taking advantage of the proximity of Poland and Czechoslovakia, who are interested in the subject but have not actively participated in SC5, a small group representing the Secretariat of SC5 visited those countries. The major purpose of the visit was to discuss such topics as the state of the art of programming languages in each country&mdash;both development and use, any national standardization activity, participation in international standardization, and the present state and future prospects of international standardization. A formal report was made to SC5 in Berlin after the visit. The present report is not an official report of the visit. It is a private report of the group, intended for public dissemination. It includes some material not directly relevant to the official purpose of the visit and omits some of the material pertinent only to the official ISO activity, or parts of the discussions which it would be premature or discourteous to publish at this time.
Improving the Mean-Field Approximation in Belief Networks Using Bahadur's Reparameterisation of the Multivariate Binary Distribution
Authors: K. Humphreys, D. M. Titterington
Venue: Neural Processing Letters (2000)

We develop a new extension to the Mean-Field approximation for inference in graphical models which has advantages over other approximation schemes which have been proposed. The method is economical in its use of variational parameters and the approximating conditional distribution can be specified with direct reference to the dependence structure of the variables in the graphical model. We apply the method to sigmoid belief networks.
Algorithms: Algorithm 338: algol procedures for the fast Fourier transform
Authors: Richard C. Singleton
Venue: Communications of the ACM (1968)

The following procedures are based on the Cooley-Tukey algorithm [1] for computing the finite Fourier transform of a complex data vector; the dimension of the data vector is assumed here to be a power of two. Procedure COMPLEXTRANSFORM computes either the complex Fourier transform or its inverse. Procedure REALTRANSFORM computes either the Fourier coefficients of a sequence of real data points or evaluates a Fourier series with given cosine and sine coefficients. The number of arithmetic operations for either procedure is proportional to n log2 n, where n is the number of data points.
A model of shared DASD and multipathing
Authors: Yonathan Bard
Venue: Communications of the ACM (1980)

This paper presents a model of an I/O subsystem in which devices can be accessed from multiple CPUs and/or via alternative channel and control unit paths. The model estimates access response times, given access rates for all CPU-device combinations. Central to the model's algorithm is the estimation of the rotational position sensing (RPS) miss probabilities by means of the maximum entropy principle. Performance differences strongly favored the English-based editor.
Sequential formula translation
Authors: K. Samelson, F. L. Bauer
Venue: Communications of the ACM (1960)

The syntax of an algorithmic language such as ALGOL is conveniently described as a sequence of states indicated by an element called cellar. Transitions are controlled by admissible state-symbol pairs which may be represented by a transition matrix. This description of syntax furnishes at the same time an extremely simple rule for translating into machine programs statements in the algorithmic language. Sequential treatment, however, is not feasible in the case of certain optimizing processes such as recursive address calculation.
A Framework for Variational Grid Generation: Conditioning the Jacobian Matrix with Matrix Norms
Authors: Patrick M. Knupp, Nicolas Robidoux
Venue: SIAM Journal on Scientific Computing (1999)

Functionals for variational grid generation, in which the Jacobian matrix and matrix norms play a central role, are presented. All first-order geometric qualities of a structured grid (length, area, volume, angle between sides, aspect ratio, grid alignment) are determined by the Jacobian matrix of the induced mapping between the logical and physical regions. Grids with desirable quality can be generated by requiring the Jacobian matrix or the corresponding metric tensor to have certain properties. Functionals can be obtained by integrating over the logical or physical domain a power of the norm of a matrix derived from the Jacobian matrix. A judicious choice of this derived matrix results in a functional whose minima are mappings with desired features. Many well-known grid generators fit in this framework; for example, the harmonic generator arises when one drives the metric tensor toward the identity. The framework provides insight into what grid qualities these functionals describe. Three new directional control functionals are proposed and tested.
High-Speed Parallel-Prefix Modulo 2n - 1 Adders
Authors: Lampros Kalampoukas, Dimitris Nikolos, Costas Efstathiou, Haridimos T. Vergos, John Kalamatianos
Venue: IEEE Transactions on Computers (2000)

A novel parallel-prefix architecture for high speed modulo 2n-1 adders is presented. The proposed architecture is based on the idea of recirculating the generate and propagate signals, instead of the traditional end-around carry approach. Static CMOS implementations verify that the proposed architecture compares favorably with the already known parallel-prefix or carry look-ahead structures.
The NetWire emulator: a tool for teaching and understanding networks
Authors: Enrico Carniani, Renzo Davoli
Venue: Proceedings of the 6th annual conference on Innovation and technology in computer science education (2001)

The evolution of the parallel computing theory has shown over years the need for complex and reliable emulation tools for teaching, learning and developing new distributed algorithms in a realistic network environment. NetWire[emu] is a distributed architecture designed for educational and research purposes which provides a synthetic and realistic network environment that may be used to teach and learn parallel algorithms (or parallel operating systems) as well as to research and develop new distributed algorithms.NetWire is an architecture based on a client/server derivation scheme: each client can interact with one or more servers emulating one or more networks by the NOEL protocol (Network Oriented Emulation Language), which is an extension of TCL over TCP/IP specifically designed for NetWire. The user can thus control all the physical parameters of each network or part of it (communication channels, hubs, network adapters and so on).Furthermore, the NetWire API library interfaces the synthetic network environment to real software applications with ease, hiding the whole architecture behind the appearance of a network device driver, fully compatible with the operating system the applications run on.Moreover, NetWire already provides a featured Xwindows interface, and because of the integrated TCL language and the interactions between NOEL and TK, it is possible to fastly build up new and powerful GUI based programs.Thus, the field of application of NetWire is twofold: on a side, it may be used as a tool for teaching distributed algorithms on parallel and distributed operating systems, and on the other one it is a tool for the research and development of new distributed algorithms.
Improving index performance through prefetching
Authors: Shimin Chen, Phillip B. Gibbons, Todd C. Mowry
Venue: ACM SIGMOD Record (2001)

This paper proposes and evaluate Prefetching B+-Trees (pB+-Trees), which use prefetching to accelerate two important operations on B+-Tree indices: searches and range scans. To accelerate searches, pB+-Trees use prefetching to effectively create wider nodes than the natural data transfer size: e.g., eight vs. one cache lines or disk pages. These wider nodes reduce the height of the B+-Tree, thereby decreasing the number of expensive misses when going from parent to child without significantly increasing the cost of fetching a given node. Our results show that this technique speeds up search and update times by a factor of 1.21-1.5 for main-memory B+-Trees. In addition, it outperforms and is complementary to &ldquo;Cache-Sensitive B+-Trees.&rdquo; To accelerate range scans, pB+-Trees provide arrays of pointers to their leaf nodes. These allow the pB+-Tree to prefetch arbitrarily far ahead, even for nonclustered indices, thereby hiding the normally expensive cache misses associated with traversing the leaves within the range. Our results show that this technique yields over a sixfold speedup on range scans of 1000+ keys. Although our experimental evaluation focuses on main memory databases, the techniques that we propose are also applicable to hiding disk latency.
A homogeneous framework to model relevance feedback
Authors: David E. Losada, Alvaro Barreiro
Venue: Proceedings of the 24th annual international ACM SIGIR conference on Research and development in information retrieval (2001)

Relevance feedback is an appreciated process to produce increasingly better retrieval. Usually, positive feedback plays a fundamental role in the feedback process whereas the role of negative feedback is limited. We think that negative feedback is a promising precision oriented mechanism and we propose a logical framework in which positive and negative feedback are homogeneously modeled. Evaluation results against small test collections are provided.
Automatic parsing for content analysis
Authors: Frederick J. Damerau
Venue: Communications of the ACM (1970)

Although automatic syntactic and semantic analysis is not yet possible for all of an unrestricted natural language text, some applications, of which content analysis is one, do not have such a stringent coverage requirement. Preliminary studies show that the Harvard Syntactic Analyzer can produce correct and unambiguous identification of the subject and object of certain verbs for approximately half of the relevant occurences. This provides a degree of coverage for content analysis variables which compares favorably to manual methods, in which only a sample of the total available text is normally processed.
A generalization of AVL trees
Authors: Caxton C. Foster
Venue: Communications of the ACM (1973)

A generalization of AVL trees is proposed in which imbalances up to &Dgr; are permitted, where &Dgr; is a small integer. An experiment is performed to compare these trees with standard AVL trees and with balanced trees on the basis of mean retrieval time, of amount of restructuring expected, and on the worst case of retrieval time. It is shown that, by permitting imbalances of up to five units, the retrieval time is increased a small amount while the amount of restructuring required is decreased by a factor of ten. A few theoretical results are derived, including the correction of an earlier paper, and are duly compared with the experimental data. Reasonably good correspondence is found. 0
The use of interactive graphics to solve numerical problems
Authors: L. B. Smith
Venue: Communications of the ACM (1970)

With the advent of on-line (time-sharing) computer systems and graphic terminals, we have available a new dimension in numerical problem solving capabilities. Rather than simply use the new power to achieve fast turnaround, we can develop interactive routines which are easy to use and also take advantage of the insight and visual capabilities of the human problem solver. Several on-line systems for general purpose mathematical problem solving have already been implemented as well as some special purpose systems for solving problems in a particular area such as ordinary differential equations. The advantage of restricting the problem area is that the interface with a user can be greatly simplified. In this paper we discuss some of the advantages accrued by such systems and design considerations for interactive routines. Furthermore, an implmentation of an on-line least squares data-fitting program, PEG, is presented with results obtained from empirical data. In conclusion, areas for future work in this field are discussed.
A quadtree medial axis transform
Authors: Hanan Samet
Venue: Communications of the ACM (1983)

As printed Quadtree skeletons are exact representations of the image and are used because they are observed to yield space efficiently and a decreased sensitivity to shifts in contrast with the quadtree. The QMAT can be used as the underlying representation when solving most problems that can be solved by using a quadtree. An algorithm is presented for the computation of the QMAT of a given quadtree by only examining each BLACK node's adjacent and abutting neighbors. Corrected Abstract (published as corrigendum in CACM 27, 2 (February 1984) p. 151) The skeletal and medial axis transform concepts used in traditional image processing representations are adapted to the quadtree representation. The result is the definition of of a new data structure termed the Quadtree Medial Axis Transform (QMAT). A QMAT results in a partition of the image into a set of nondisjoint squares having sides whose lengths are sums of powers of 2 rather than, as is the case with quadtrees, a set of disjoint squares having sides of lengths which are powers of 2. The motivation is not to study skeletons for the usual purpose of obtainings approximations of the image. Instead, quadtree skeletons are exact representations of the image and are used because they are observed to yield space efficiency and a decreased sensitvity to shifts in contrast with the quadtree. The QMAT can be used as the underlying representation when solving most problems that can be solved by using a quadtree. An algorithm is presented for the computation of the QMAT of a given quadtree by only examining each BLACK node's adjacent and abutting neighbors. Analysis of the algorithm reveals an average execution time proportional to the complexity of the image, i.e., the number of BLACK blocks.
Comment on Lawler's multilevel Boolean minimization
Authors: Ronald C. de Vries
Venue: Communications of the ACM (1970)

Lawler [1] proposed a method of multilevel Boolean minimization which is a generalization of the conventional prime implicant approach for two-level minimization. In his article, he presented two lemmas (Lemmas 1 and 2) that are important in reducing the number of calculations involved in obtaining a solution. These lemmas can be extended to increase the efficiency even more. In particular, it is possible to lower the upper limit of the function interval for an incompletely specified function [2]. Later, the extended version of these lemmas will be shown to be of value in several aspects of the minimization procedure.
Parallel methods for integrating ordinary differential equations
Authors: J. Nievergelt
Venue: Communications of the ACM (1964)

This paper is dedicated to the proposition that, in order to take full advantage for real-time computations of highly parallel computers as can be expected to be available in the near future, much of numerical analysis will have to be recast in a more &ldquo;parallel&rdquo; form. By this is meant that serial algorithms ought to be replaced by algorithms which consist of several subtasks which can be computed without knowledge of the results of the other subtasks. As an example, a method is proposed for &ldquo;parallelizing&rdquo; the numerical integration of an ordinary differential equation, which process, by all standard methods, is entirely serial.
Toward better wireload models in the presence of obstacles
Authors: Chung-Kuan Cheng, Andrew B. Kahng, Bao Liu, Dirk Stroobandt
Venue: Proceedings of the 2001 Asia and South Pacific Design Automation Conference (2001)

Efficient and accurate interconnect estimation is crucial to design convergence. With System-on-Chip design, IP blocks form routing obstacles that cannot be accounted for by existing a priori wirelength estimations. In this paper, we identify two distinct effects of obstacles on interconnection length: (i) changes due to the redistribution of interconnect terminals and (ii) detours that have to be made around the obstacles. Theoretical expressions of both effects for point-to-point nets with a single obstacle are derived and compared to experimental observations. We also experimentally assess these effects for multi-terminal interconnections and in the presence of multiple obstacles. We single out cases where the effects are additive, which suggests the use of lookup tables and equivalent blockage relations. Our results are applicable in chip planning tools, where they enable improved accounting for obstacles in a priori wirelength estimation schemes.
Blind Men and Elephants: Six Approaches to TREC data
Authors: David Banks, Paul Over, Nien-Fan Zhang
Venue: Information Retrieval (1999)

The paper reviews six recent efforts to better understand performance measurements on information retrieval (IR) systems within the framework of the Text REtrieval Conferences (TREC): analysis of variance, cluster analyses, rank correlations, beadplots, multidimensional scaling, and item response analysis. None of this work has yielded any substantial new insights. Prospects that additional work along these lines will yield more interesting results vary but are in general not promising. Some suggestions are made for paying greater attention to richer descriptions of IR system behavior but within smaller, better controlled settings.
Even no data has a value
Authors: Yair M. Babad, Jeffrey A. Hoffer
Venue: Communications of the ACM (1984)

Data that are missing, lost, or incomplete can be very significant in certain situations. Programs and languages need to be able to identify and manage such data effectively.
Register transfer level VHDL models without clocks
Authors: M. Mutz
Venue: Proceedings of the conference on Design, automation and test in Europe (1998)

Several hardware compilers on the market convert from so-called RT level VHDL subsets to logic level descriptions. Such models still need clock signals and the notion of physical time in order to be executable. In a stage of a top-down design starting from the algorithmic level, register transfers are considered, where the timing is not controlled by clock signals and where physical time is not yet relevant. We propose an executable VHDL subset for such register transfer models.
Real-Time Access Control and Reservation on B-Tree IndexedData
Authors: Tei-Wei Kuo, Chih-Hung Wei, Kam-Yiu Lam
Venue: Real-Time Systems (2000)

This paper proposes methodologies to control the access of B ^+-tree-indexed data in a batch and firm real-time fashion. Algorithms are proposed to insert, query, delete, and rebalance B ^+-tree-indexed data based on the non-real-time algorithms proposed in Kerttu, Eljas, and Tatu (1996) and the idea of priority inheritance (Sha, Rajkumar, and Lehoczky, 1990). We propose methodologies to reduce the number of disk I /O to improve the system performance without introducing more priority inversion. When the schedulability of requests with critical timing constraints is highly important, we propose a mechanism for data reservation based on the idea of preemption level and the Stack Resource Policy (Baker, 1990). The performance of our methodologies was evaluated by a series of experiments, from which we have obtained encouraging results.