ppxscal/embedding_network huggingface dataset:
Interface usage measurements in a user interface management system
Authors: Dan R. Olsen, Bradley W. Halversen
Venue: Proceedings of the 1st annual ACM SIGGRAPH symposium on User Interface Software (1988)

User Interface Management Systems have provided support for most user interface design personnel with the exception of dialogue evaluators. Potential support that a UIMS can provide to evaluators of user interfaces generated by the UIMS are discussed. Metrics for measuring interactive behavior have been implemented as part of a User Interface Management System. It is shown how the external control and separate dialogue description features of UIMSs make possible such measurements. These metrics are automatically mapped back to the responsible portions of the dialogue description. Reports are generated which aid interface evaluators in locating specific problems in a user interface design.
Chemical reaction dynamics: integration of coupled sets of ordinary differential equations on the Caltech hypercube
Authors: P. G. Hipes, T. Mattson, Y-S. Wu, A. Kuppermann
Venue: Proceedings of the third conference on Hypercube concurrent computers and applications - Volume 2 (1989)

Use of the Caltech/JPL hypercube multicomputer to solve problems in chemical dynamics is the subject of this paper. The specific application is quantum mechanical atom diatomic molecule reactive scattering. One methodology for solving this dynamics problem on a sequential computer is based on symmetrized hyperspherical coordinates. We will discuss our strategy for implementing the hyperspherical coordinate methodology on the hypercube. In particular, the performance of a parallel integrator for the special system of ordinary differential equations which arises in this application is discussed.
An experimental study of methods for parallel preconditioned Krylov methods
Authors: D. Baxter, J. Saltz, M. Schultz, S. Eisenstat, K. Crowley
Venue: Proceedings of the third conference on Hypercube concurrent computers and applications - Volume 2 (1989)

High performance multiprocessor architectures differ both in the number of processors, and in the delay costs for synchronization and communication. In order to obtain good performance on a given architecture for a given problem, adequate parallelization, good balance of load and an appropriate choice of granularity are essential. We discuss the implementation of parallel version of PCGPAK for both shared memory architectures and hypercubes. Our parallel implementation is sufficiently efficient to allow us to complete the solution of our test problems on 16 processors of the Encore Multimax/320 in an amount of time that is a small multiple of that required by a single head of a Cray X/MP, despite the fact that the peak performance of the Multimax processors is not even close to the supercomputer range. We illustrate the effectiveness of our approach on a number of model problems from reservoir engineering and mathematics.
Aliasing Probability for Multiple Input Signature Analyzer
Authors: D. K. Pradhan, S. K. Gupta, M. G. Karpovsky
Venue: IEEE Transactions on Computers (1990)

Single and multiple multiple-input-signature-register (MISR) aliasing probability expressions are presented for arbitrary test lengths. A framework, based on algebraic codes, is developed for the analysis and synthesis of MISR-based test response compressors for BIST. This framework is used to develop closed-form expressions for the aliasing probability of MISR for arbitrary test length. An error model, based on q-ary symmetric channel, is proposed using more realistic assumptions. Results are presented that provide the weight distributions for q-ary codes (q=2/sup m/, where the circuit under test has m outputs). These results are used to compute the aliasing probability for the MISR compression technique for arbitrary test lengths. This result is extended to compression using two different MISRs. It is shown that significant improvements can be obtained by using two signature analyzers instead of one. The weight distribution of a class of codes of arbitrary length is also given.
The Alonzo functional programming language
Authors: J. D. Ramsdell
Venue: ACM SIGPLAN Notices (1989)

Alonzo is a programming language for specifying an output stream of characters as a function of a given input stream of characters. It is a non-strict language based on the untyped lambda;-calculus, and it has been enriched by adding syntax for local bindings and mutual recursion. Primitive data and their operators have been included along with strict vectors.
From defects to failures: a view of dependable computing
Authors: Behrooz Parhami
Venue: ACM SIGARCH Computer Architecture News (1988)

A unified framework and terminology for the study of computer system dependability is presented. Impairments to dependability are viewed from six abstraction levels. It is argued that all of these levels are useful, in the sense that proven dependability procurement techniques can be applied at each level, and that it is beneficial to have distinct, precisely defined terminology for describing impairments to and procurement strategies for computer system dependability at these levels. The six levels in the proposed framework are:1. Defect level or component level, dealing with deviant atomic parts.2. Fault level or logic level, dealing with deviant logic values or path selections.3. Error level or information level, dealing with deviant internal states.4. Malfunction level or system level, dealing with deviant functional behavior.5. Degradation level or service level, dealing with deviant performance.6. Failure level or result level, dealing with deviant outputs or actions.Briefly, a hardware or software component may be defective (perfect hardware may also become defective due to wear and aging). Certain system states expose the defect, resulting in the development of a logic-level fault. Information flowing within a faulty system may become contaminated, leading to the presence of an error. An erroneous system state may result in a subsystem malfunction. Automatic or manually controlled reconfiguration can isolate or bypass the malfunctioning subsystem but may lead to a degraded performance or service. Serious performance degradation may lead to a result-level system failure when untrustworthy or untimely results are produced. Finally, a failed computer system can have adverse effects on the larger societal or corporate system into which it is incorporated.
Systems for symbolic computations in boolean algebra
Authors: S. V. Kolyada
Venue: Proceedings of the international symposium on Symbolic and algebraic computation (1990)

Boolean algebra as scientific discipline has a few features. It is a pure mathematical theory and, on the other hand, an applied mathematical theory too. Boolean algebra is applied, for instance, to improve intelligence of software, to automate integrated circuit design and theorem proving as it can be used to model situation analysis and decision making. Computer algebra system for Boolean algebra (APAL-PC) allows to write and process logical formulae in usual manner. The system APAL-PC consists of the following components: functional bases {0,1, ,v,&not;} and {0,1,+,*} for writing formulae; systems of equations for each standard functional basis, each of the systems is applied for usual Boolean algebra formula processing; a set of operators for formula processing. These operators can be used to evaluate, order and expand formulae, to move brackets in formulae, to transfer formulae from one functional basis to another equivalently, to prove equivalency and graphical identity of Boolean formulae, to apply equations and systems of equations, to copy and substitute into formulae and so on; control tools - operators to save and restore results for given number of processing steps and the set of canonical forms. The system APAL-PC is developed for IBM PC personal computers on the basis of the programming language C and universal formula processing tools implemented at Glushkov Institute of Cybernetics. The experience of development of a similar system APAL-ES (implemented in OS/360 environment) is taken in consideration in designing of the APAL-PC.
REDUCE and the bifurcation of limit cycles
Authors: N. G. Lloyd, J. M. Pearson
Venue: Journal of Symbolic Computation (1990)

A technique is described which has been used extensively to investigate the bifurcation of limit cycles in polynomial differential systems. Its implementation requires a Computer Algebra System, in this case REDUCE. Concentration is on the computational aspects of the work, and a brief resume is given of some of the results which have been obtained.
Network security via private-key certificates
Authors: Don Davis, Ralph Swick
Venue: ACM SIGOPS Operating Systems Review (1990)

We present some practical security protocols that use private-key encryption in the public-key style. Our system combines a new notion of private-key certificates, a simple key-translation protocol, and key-distribution. These certificates can be administered and used much as public-key certificates are, so that users can communicate securely while sharing neither an encryption key nor a network connection.
Only prime superpositions need be considered in the Knuth-Bendix completion procedure
Authors: Deepak Kapur, David R. Musser, Paliath Narendran
Venue: Journal of Symbolic Computation (1988)

The Knuth and Bendix test for local confluence of a term rewriting system involves generating superpositions of the left-hand sides, and for each superposition deriving a critical pair of terms and checking whether these terms reduce to the same term. We prove that certain superpositions, which are called composite because they can be split into other superpositions, do not have to be subjected to the critical-pair-joinability test; it suffices to consider only prime superpositions. As a corollary, this result settles a conjecture of Lankford that unblocked superpositions can be omitted. To prove the result, we introduce new concepts and proof techniques which appear useful for other proofs relating to the Church-Rosser property. This test has been implemented in the completion procedures for ordinary term rewriting systems as well as term rewriting systems with associative-commutative operators. Performance of the completion procedures with this test and without the test are compared on a number of examples in the Rewrite Rule Laboratory (RRL) being developed at General Electric Research and Development Center.
Performance models for Noahnet
Authors: G. M. Parulkar, A. S. Sethi, D. J. Farber
Venue: Symposium proceedings on Communications architectures and protocols (1988)

Noahnet is an experimental flood local area network with features such as high reliability and high performance. Noahnet uses a randomly connected graph topology with four to five interconnections per node and a flooding protocol to route messages. The purpose of this paper is to present two analytical performance models which we have designed to understand the load-throughput behavior of Noahnet. Both models assume slotted Noahnet operation and also assume that if k messages attempt transmission in a slot, the network gets divided into k partitions of arbitrary sizes - one partition for each message. First, we show that the average number of successful messages in a slot given k partitions of transmissions is (M - k)/(N - 1), where N is the number of nodes in the network and M is the number of nodes out of N that participate in the flooding of k messages. This is an interesting result and is used in both models to derive the load-throughput equations. Each model is then presented using a set of assumptions, derivations of load-throughput equations, a set of plots, and the discussion of results. Models one and two differ in the way they account for retransmissions.
Smalltalk and exploratory programming
Authors: D. W. Sandberg
Venue: ACM SIGPLAN Notices (1988)

Using Smalltalk-80, programmers can produce prototypes much faster than with C or Pascal. What techniques do Smalltalk-80 programmers use to produce these prototypes? What is special about Smalltalk-80 that enables them to uses these techniques? Can these techniques be used with conventional languages such as C? In an attempt to answer these questions we interviewed experienced Smalltalk programmers and asked how they approach programming in Smalltalk. Such introspective interviews that are conducted after completion of a project are known to be somewhat unreliable, but not enough is known to use any other methodology. What follows is a summary of the interviews, followed by an explanation of the results. Finally we discuss some of the weaknesses of Smalltalk and some possible solutions.
On the Number of Acceptable Task Assignments in Distributed Computing Systems
Authors: Kang G. Shin, Ming-Syan Chen
Venue: IEEE Transactions on Computers (1990)

A distributed computing system and cooperating tasks can be represented by a processor graph G/sub p/=(V/sub p/, E/sub p/) and a task graph G/sub T/=(V/sub T/, E/sub T/), respectively. An edge between a pair of nodes in G/sub T/ represents the existence of direct communications between the two corresponding tasks. The maximal number of hops between two processors in G/sub p/ to which two adjacent tasks in G/sub T/ are assigned is called dilation of that assignment. Characterization and use of the number of acceptable assignments for given G/sub T/ and G/sub P/ are treated. Assignments with the dilation less than or equal to one are considered. This dilation constraint represents a special case in which two adjacent tasks in G/sub T/ must be assigned to either a single processor or two adjacent processors in G/sub p/. For the case where N(G/sub T/, G/sub P/) denotes the numbers of acceptable assignments under this constraint, N(G/sub T/, G/sub P/) are derived for arbitrary G/sub T/ and G/sub P/, and a recursive expression is formulated for N(G/sub T/, G/sub P/) when G/sub T/ is a tree. For some restricted cases, either closed-form or recursive-form expressions of N(G/sub T/, G/sub P/) are derived. The results on N(G/sub T/, G/sub P/) are extended to the completely general case, assignments with dilations greater than one, where two adjacent tasks in G/sub T/ can be assigned to any two processors in G/sub P/ which are not necessarily adjacent to each other.
Time-by-Example Query Language for Historical Databases
Authors: A. U. Tansel, M. E. Arkun, G. Ösoyoğlu
Venue: IEEE Transactions on Software Engineering (1989)

The authors propose a graphical query language, Time-by-Example (TBE), which has suitable constructs for interacting with historical relational databases in a natural way. TBE is user-friendly. It follows the graphical, two-dimensional approach of such previous languages as Query-by-Example (QBE), Aggregation-by-Example (ABE), and Summary-Table-by-Example (STBE). TBE also uses the hierarchical window (subquery) concept of ABE and STBE. TBE manipulates triple-valued (set-triple-valued) attributes and historical relations. Set-theoretic expressions are followed to deal with time intervals. The BNF specification for TBE is given.
Path Allocation Access Control in Fiber Optic Communication Systems
Authors: A. Ganz, I. Chlamtac
Venue: IEEE Transactions on Computers (1989)

A path-oriented channel allocation management approach is introduced for the emerging high-bandwidth fiber optic star networks. In the proposed approach, the transmission channel of the source node and the reception channel of the destination node are synchronized at the central switching node, creating a virtual path for packet communication between any two nodes. The number of virtual paths that can be established simultaneously, i.e. the number of concurrent packet transmissions, equals the number of channels in the network. The proposed path allocation thus provides maximum spatial reuse not found in existing fiber optic star systems. The provision of a virtual path for every packet eliminates the need for buffering at the central node and provides bounded delays.
Knowledge-based agents in a command and control simulation
Authors: Kevin Lehnert, Michael Sullivan
Venue: ACM SIGSIM Simulation Digest (1988)

To facilitate research into multi-agent planning issues, we have developed the Command and Control Testbed Using Simulation (CACTUS) and the Situation-based Autonomous Reasoner in a GBB Environment (SARGE). CACTUS is a simulation of combat operations for platoon-sized units in battalion-level engagements. We model in detail those command and control problems impacting the way planning is done by a formation commander. These include incomplete and uncertain information, imperfect control, differing agent characteristics, and limited inter-unit communications.The testbed originally required the user to input specific movement and firing instructions for each unit simulated. An interface to the simulation permits the integration of automated planners in place of user input. The SARGE commander was built to relieve the user of the need to provide detailed instructions at the simulation system level. Units with SARGE commanders take goal level instructions and SARGE then explictly reasons about plans to achieve those goals and submits the instructions necessary to implement those plans in CACTUS. SARGE uses the blackboard model of reasoning as implemented in the Generic Blackboard (GBB) tool. User access to the knowledge affecting SARGE behavior allows us to assess the impact of different tactical and doctrinal schemes on planning at higher levels of command.The SARGE and CACTUS systems provide the foundations for developing automated planners for multiple unit formations by raising the level of abstraction for inputting instruction to subordinate units. We will use this incremental approach to address command and control issues at progressively higher levels in the chain of command and to develop, refine, and evaluate artificial intelligence techniques to integrate human and machine capabilities. Our ultimate goal is to collect applicable techniques into a system supporting rapid prototyping of tactical decision aids. SARGE and CACTUS are vital steps in this process.
Optimal bounds for decision problems on the CRCW PRAM
Authors: Paul Beame, Johan Hastad
Venue: Journal of the ACM (JACM) (1989)

Optimal &OHgr;(log n/log log n) lower bounds on the time for CRCW PRAMS with polynomially bounded numbers of processors or memory cells to compute parity and a number of related problems are proven. A strict time hierarchy of explicit Boolean functions of n bits on such machines that holds up to &Ogr;(log n/log log n) time is also exhibited. That is, for every time bound T within this range a function is exhibited that can be easily computed using polynomial resources in time T but requires more than polynomial resources to be computed in time T - 1. Finally, it is shown that almost all Boolean functions of n bits require log n - log log n + &OHgr;(1) time when the number of processors is at most polynomial in n. The bounds do not place restrictions on the uniformity of the algorithms nor on the instruction sets of the machines.
File organizations and access methods for CLV disks
Authors: S. Christodoulakis, D. A. Ford
Venue: ACM SIGIR Forum (1989)

A large and important class of optical disc technology are CLV format discs such as CD ROM and WORM. In this paper, we examine the issues related to the implementation and performance of several different file organizations on CLV format optical discs such as CD ROM and WORM. The organizations examined are based on hashing and trees. The CLV recording scheme is shown to be a good environment for efficiently implementing hashing. Single seek access and storage utilization levels approaching 100% can be achieved for CD ROM's. It is shown that a B-tree organization is not a good choice for WORM discs (both CAV and CLV), but a modified ISAM approach can be appropriate for WORM discs. We describe clustered BIM's, a class of tree organizations appropriate for CD ROMS. Expressions for the expected retrieval performance of both hashing and trees are also given. The paper concludes by outlining recent results and future directions on buffered implementations of access methods for WORM discs, as well as advantages of signature based access methods for text retrieval in WORM disc architectures.
Transmission Delays in Hardware Clock Synchronization
Authors: K. G. Shin, P. Ramanathan
Venue: IEEE Transactions on Computers (1988)

Various methods, both with software and hardware, have been proposed to synchronize a set of physical clocks in the system. Software methods are very flexible and economical but suffer an excessive time overhead, whereas hardware methods require no time overhead but are unable to handle transmission delays in clock signals. The effects of nonzero transmission delays in synchronization have been studied extensively in the communication area in the absence of malicious or Byzantine faults. The authors show that it is easy to incorporate the ideas from the communication area into the existing hardware clock synchronization algorithms in order to take into account the presence of both malicious faults and nonzero transmission delays.
Fast parallel thinning algorithms: parallel speed and connectivity preservation
Authors: R. W. Hall
Venue: Communications of the ACM (1989)

A recently published parallel thinning approach [4] is evaluated. An improvement is suggested to enable preservation of certain diagonal lines which are not preserved by this algorithm. A unified notion of what is meant by an iteration (or subiteration) and parallel speed is presented, and with regard to its parallel speed this algorithm is argued to be comparable to other two-subiteration algorithms. The parallel speed of this algorithm is compared experimentally to the original algorithm that it improves [12] and it is shown that, unlike execution time on a specific machine, parallel speed is not improved. Finally, a more complete connectivity analysis is given illustrating sufficient additional conditions for applying fully in parallel the basic thinning operator used in both algorithms while maintaining all image connectivity properties.
An efficient approach to data flow analysis in a multiple pass global optimizer
Authors: S. Jain, C. Thompson
Venue: Proceedings of the ACM SIGPLAN 1988 conference on Programming Language design and Implementation (1988)

Data flow analysis is a time-consuming part of the optimization process. As transformations are made in a multiple pass global optimizer, the data flow information must be updated to reflect these changes. Various approaches have been used, including complete recalculation as well as partial recalculation over the affected area. The approach presented here has been designed for maximum efficiency. Data flow information is completely calculated only once, using an interval analysis method which is slightly faster than a purely iterative approach, and which allows partial recomputation when appropriate. A minimal set of data flow information is computed, keeping the computation and update cost low. Following each set of transformations, the data flow information is updated based on knowledge of the effect of each change. This approach saves considerable time over complete recalculation, and proper ordering of the various optimizations minimizes the amount of update required.