ppxscal/embedding_network huggingface dataset:
Cooperative Vision Integration Through Data-Parallel Neural Computations
Authors: Scott T. Toborg, Kai Hwang
Venue: IEEE Transactions on Computers (1991)

The authors describe a neural network approach for combining processing of multiple early vision modules. Energy functions for coupling the computation of intensity contours, optical flow, and stereo disparity are defined. Hopfield neural networks are used for function minimization with deterministic annealing to avoid spurious local minima. Vision integration schemes are developed by extending the work of T.A. Poggio et al. (1988) to include cooperative interactions between different vision modules and the Hebbian adaptation of vision module coupling on a massively parallel computer consisting of 4096 processing elements operated in a single-instruction-multiple-data mode. Simple experiments assess the performance of various integration approaches. The resulting algorithms facilitate fast, robust image segmentation.
How shall we manage cyberspace and its growing population?
Authors: Maarten van Swaay
Venue: Proceedings of the 1992 ACM annual conference on Communications (1992)

The growing network of computer systems and its users has become a new society; it cannot exist in the absence of trust and promise, if for no other reason than because its members must be expected to abide by shared rules of behaviour. How shall we build trust without visibility? How can we reduce temptation, and much are we willing to tolerate? How shall we set rules of behavior? Can we make promises about the behavior of the machines we rely on? How shall we share and apportion responsibility for mishaps and failures? How shall we recognize abuse and what shall we do with abusers? We cannot hope to answer these questions by decree, but must attempt to build consensus in vigorous and sustained discussion.
Generation and recognition of formal languages by modifiable grammars
Authors: Boris Burshteyn
Venue: ACM SIGPLAN Notices (1990)

In this article the formal definitions of modifiable grammars are presented, and the equivalence between classes of modifiable grammars and Turing machines is proved. Some criteria for reducing modifiable grammars to context-free grammars are provided. A lazy LR(1) algorithm for context-free grammars and an algorithm for constructing a LR(1) parser for modifiable grammars are discussed.
A VDM Case Study in Mural
Authors: Bob Fields, Morten Elvang-Gøransson
Venue: IEEE Transactions on Software Engineering (1992)

The application of an interactive theorem-proving assistant and specification support tool called mural in the specification and verification of a small Vienna development method (VDM) development is described. It is the authors' intention to give a feel for how mural works and of mural's applicability as a tool in specifying and verifying software.
A Synthesis Approach to Design Optimally Fault Tolerant Network Architecture
Authors: A. Sengupta, P. D. Joshi, S. Bandyopadhyay
Venue: IEEE Transactions on Computers (1991)

A synthesis approach to the design of a class of regular networks which provide optimal fault tolerance and are of small diameter is presented. The approach makes it possible to design a regular network in the form of a directed graph when the number of nodes n and the number of connections per node d are given, for any n and d. The designed graph will have node connectivity d and a diameter proportional to (og/sub d/ n).
Timed Atomic Commitment
Authors: Susan B. Davidson, Victor Wolfe, Insup Lee
Venue: IEEE Transactions on Computers (1991)

Timed atomic commitment is defined, protocols to implement it in a realistic operating environment are devised, and its usefulness is shown through an example. In a large class of hard-real-time control applications, components execute concurrently on distributed nodes and must coordinate, under timing constraints, to perform the control task. As such, they perform a type of atomic commitment. Traditional atomic commitment differs, however, because there are no timing constraints; agreement is eventual. The authors define timed atomic commitment (TAC), which requires the processes to be functionally consistent, but allows the outcome to include an exceptional state, indicating that timing constraints have been violated. Centralized and decentralized protocols to implement TAC are presented. Programming constructs for TAC are introduced, and their use is illustrated in a coordinating robots example.
Performance analysis of &ldquo;Time Warp&rdquo; with limited memory
Authors: Ian F. Akyildiz, Liang Chen, Samir R. Das, Richard M. Fujimoto, Richard F. Serfozo
Venue: ACM SIGMETRICS Performance Evaluation Review (1992)

The behavior of n interacting processes synchronized by the &ldquo;Time Warp&rdquo; rollback mechanism is analyzed under the constraint that the total amount of memory to execute the program is limited. In Time Warp, a protocol called &ldquo;cancelback&rdquo; has been proposed to reclaim storage when the system runs out of memory. A discrete state, continuous time Markov chain model for Time Warp augmented with the cancelback protocol is developed for a shared memory system with n homogeneous processors and homogeneous workload. The model allows one to predict speedup as the amount of available memory is varied. To our knowledge, this is the first model to achieve this result. The performance predicted by the model is validated through direct performance measurements on an operational Time Warp system executing on a shared-memory multiprocessor using a workload similar to that in the model. It is observed that Time Warp with only a few additional message buffers per processor over that required in the corresponding sequential execution can achieve approximately the same or even greater performance than Time Warp with unlimited memory, if GVT computation and fossil collection can be efficiently implemented.
Consistency in software system development: framework, model, techniques tools
Authors: Torben Mejlvang Hangensen, Bent Bruun Kristensen
Venue: ACM SIGSOFT Software Engineering Notes (1992)

An important aspect in the software development process is the consistency between various parts of the software system being designed and implemented. During the development of a system we are aware of the consistency problems and we usually solve these by special arrangements developed as part of the development of the software system. In general the solutions applied for some specific system cannot be reused for other systems. The purpose of this paper is to introduce a general understanding of consistency and the techniques and tools for handling consistency. We introduce a concept called description to denote the various pieces of information which must be consistent. The description covers any fragments software and data, e.g. such as source code, parse trees, and machine code. The interpretation of a description is defined as a mapping into the set of objects, that the description is supposed to describe. Consistency of descriptions is defined as relations between the interpretations of the descriptions. The concepts description, interpretation and relation are used as a framework for modeling consistency in software systems. A consistency model includes interfaces, control parts and representions for descriptions in a system, and a specification of the consistency relations, that are relevant for the system. The model provides consistency as a new and very important perspective on software systems. It provides a graphical notation, which gives an overview of the consistency relations in a software system being designed. The model is very general and it does therefore apply to any type of software systems. This restricts the level of detail in the model of consistency, but the model allows enhancement of the specification once the type of software system is given. We define four basic techniques for handling consistency in software systems modeled in terms of descriptions. By combining these techniques we are able to describe the handling of consistency in a given software system. These techniques and the graphical consistency modeling language form a first step towards an engineered approach to the construction of software systems from a consistency view.
On ACC
Authors: Richard Beigel, Jun Tarui
Venue: Proceedings of the 32nd annual symposium on Foundations of computer science (1991)

It has been shown by A. Yao (1990) that every language in ACC is recognized by a sequence of depth-2 probabilistic circuits with a symmetric gate at the root and n/sup polylog/(n) AND gates of fan-in polylog (n) at the leaves. The authors simplify Yao's proof and strengthen his results: every language in ACC is recognized by a sequence of depth-2 deterministic circuits with a symmetric gate at the root and n/sup polylog/(n) AND gates of fan-in polylog(n) at the leaves. They also analyze and improve modulus-amplifying polynomials constructed by S. Toda (1989) and Yao: this yields smaller circuits in Yao's and the present results on ACC.
Retrospective on a year of participatory design using the PICTIVE technique
Authors: Michael J. Muller
Venue: Proceedings of the SIGCHI conference on Human factors in computing systems (1992)

PICTIVE is a participatory design technique for increasing the direct and effective involvement of users and other stakeholders in the design of software. This paper reviews a year of the use of PICTVE on products and research prototypes at Bellcore. What we have learned is illustrated through five brief case studies. The paper concludes with a summary of our current PICTIVE practice, expressed as three developing, interrelated models: an object model, a process model, and a participation model.
Performance evaluation of the IBM RISC System/6000: comparison of an optimized scalar processor with two vector processors
Authors: Margaret L. Simmons, Harvey J. Wasserman
Venue: Proceedings of the 1990 ACM/IEEE conference on Supercomputing (1990)

RISC System/6000 computers are workstations with a reduced instruction set processor recently developed by IBM. This report details the performance of the 6000-series computers as measured using a set of portable, standard-Fortran, computationally-intensive benchmark codes that represent the scientific workload at the Los Alamos National Laboratory. On all but three of our benchmark codes, the 40-ns RISC System was able to perform as well as a single Convex C-240 processor, a vector processor that also has a 40-ns clock cycle, and on these same codes, it performed as well as the FPS-500, a vector processor with a 30-ns clock cycle.
Virtual reality learning environments: potentials and challenges
Authors: Meredith Bricken
Venue: ACM SIGGRAPH Computer Graphics (1991)

This paper addresses the unique characteristics of emerging Virtual Reality (VR) technology and the potential of virtual worlds as learning environments. I describe several key attributes of VR environments and discuss them in relationship to educational theory and pedagogical practice. I then identify three challenges that must be met before VR can be integrated into educational settings: cost, usability, and fear of the technology.
Considered harmful&mdash;still
Authors: Robert Bernecky
Venue: ACM SIGAPL APL Quote Quad (1990)

The APL character set has contributed, more than any other facet of the language, to its lack of acceptance in the computing community at large. The character set is a metaproblem---not a problem in and of itself, but a creator of other recurring problems of hardware, software, ergonomics, and psychology. The adoption of new, ASCII-based dialects of APL, such as J, is suggested as one solution to the character-set problem.
Automatic document classification: natural language processing, statistical analysis, and expert system techniques used together
Authors: M. J. Blosseville, G. Hébrail, M. G. Monteil, N. Pénot
Venue: Proceedings of the 15th annual international ACM SIGIR conference on Research and development in information retrieval (1992)

In this paper we describe an automated method of classifying research project descriptions: a human expert classifies a sample set of projects into a set of disjoint and pre-defined classes, and then the computer learns from this sample how to classify new projects into these classes. Both textual and non-textual information associated with the projects are used in the learning and classification phases. Textual information is processed by two methods of analysis: a natural language analysis followed by a statistical analysis. Non-textual information is processed by a symbolic learning technique. We present the results of some experiments done on real data: two different classifications of our research projects.
Optimal file sharing in distributed networks (preliminary version)
Authors: Moni Naor, Ron M. Roth
Venue: Proceedings of the 32nd annual symposium on Foundations of computer science (1991)

Given a distributed network of processors represented by an undirected graph G=(V, E) and a file size k, the problem of distributing an arbitrary file w of k bits among all nodes of the network G is considered. Memory devices are to be assigned to the node of G such that, by accessing the memory of its own and of its adjacent nodes, each node can reconstruct the contents of w. The objective is to minimize the total size memory in the network. A file distribution scheme that realizes this objective for k>>log Delta /sub G/, where Delta /sub G/, stands for the maximum degree in G, is presented. For this range of k, the total size of memory required by the suggested scheme approaches an integer programming lower bound on that size.
Use of prosody in syntactic disambiguation: an analysis-by-synthesis approach
Authors: C. W. Wightman, N. M. Veilleuz, M. Ostendorf
Venue: Proceedings of the workshop on Speech and Natural Language (1991)

Experiments have shown that prosody is used by human listeners to disambiguate spoken language and, in particular, that the relative size and location of prosodic phrase boundaries provides a cue for resolving syntactic ambiguity. Therefore, automatically detected prosodic phrase boundaries can provide information useful in speech understanding for choosing among several candidate parses. Here, we propose a scoring algorithm to rank candidate parses based on an analysis-by-synthesis method which compares the observed prosodic phrase structure with the predicted structure for each candidate parse. In experiments with a small corpus of ambiguous sentences spoken by FM radio announcers, we have achieved disambiguation performance close to the performance of human subjects in perceptual experiments.
Work for the Hairdressers: The Production of de Prony's Logarithmic and Trigonometric Tables
Authors: I. Grattan-Guinness
Venue: IEEE Annals of the History of Computing (1990)

A summary account is given of the large set of logarithmic and trigonometric tables produced at the end of the 18th century under the direction of Gaspard Riche de Prony. Although they were completed in 1801, their size made publication a costly task; and it was never done, despite the fact that printing was started more than once and various efforts were made over the years to find finance. Eventually a reduced edition of some tables appeared in 1891. In addition to the history some details are given of the mathematical methods used in the compilation of the tables. An appendix considers the possible influence of this project upon Babbage's ideas on computers and tables.
ALHARD: an application-oriented language for hardware simulation
Authors: Taizo Kojima, Kaoru Tsuru, Akira Sugimoto
Venue: Proceedings of the 1990 ACM annual conference on Cooperation (1990)

For the purpose of the specification and operation level simulations of hardware, hardware description language Alhard (Application-oriented Language for HARDware simulation) was designed, and its simulation system was developed. Alhard language is an application-oriented language to be used for generation of simulators, and is designed by expanding C language to be used for hardware descriptions. Its characteristics are an operation for the bit string, an object oriented feature, and demon function activated by event driven. In this system, by using the demon function, hardware descriptions can be separated from the descriptions of check functions for simulators and user interfaces. Simulations can be executed by converting the hardware description into C language to be compiled. In the simulation systems, visual user interfaces, implemented through use of the demon function, are provided. In this paper, a summary of the system, software structure, language specifications, simulator interfaces, and an example of an application of this system to a micro-program simulator are described.
A Stabilized Parallel Algorithm for Direct-Form Recursive Filters
Authors: Richard P. Brent, Zhou Bing Bing
Venue: IEEE Transactions on Computers (1991)

A stabilized parallel algorithm for direct-form recursive filters is obtained, using a method of derivation in the Z domain. The degree of parallelism, stability, and complexity of the algorithm is examined. It is shown how to reduce the number of multiplications compared to the number required in a naive implementation. The algorithm is regular and modular, so very efficient VLSI architectures can be constructed to implement it. The degree of parallelism in these implementations can be chosen freely and is not restricted to be a power of two.
Competitive distributed job scheduling (extended abstract)
Authors: Baruch Awerbuch, Shay Kutten, David Peleg
Venue: Proceedings of the twenty-fourth annual ACM symposium on Theory of computing (1992)

This paper examines the problem of balancing the job load in a network of processors, and introduces an online algorithm for scheduling a sequence of jobs in a competitive manner. The algorithm is shown to be polylog (n)-competitive according to a strict definition that forces the online algorithm to be competitive even when considering any bounded area of the network and bounded period of time. We also analyze the common greedy feedback-based approach, and provide matching lower and upper bounds (up to a polylogarithmic factor) for the tradeoff between the costs of searches and updates under this approach.
Fortran 90 pointers vs. &ldquo;Cray&rdquo; pointers
Authors: Jeanne Martin
Venue: ACM SIGPLAN Fortran Forum (1992)

The Fortran 77 standard does not contain pointer facilities, but because of heavy user demand, many Fortran 77 compilers have been extended with "Cray" pointers. The demand for pointers in Fortran was heard by the standards committee, X313, and a pointer facility was added to the follow-on Fortran standard, Fortran 90. X3J3, for reasons that may soon become apparent, chose not to follow existing practice and specify "Cray" pointers, but to standardize a somewhat different pointer facility. Fortran 90 pointers complement the Fortran 90 language; they fit well with the new Fortran 90 array processing and data facilities. The popularity of "Cray" pointers indicates that they fit well with Fortran 77, and since Fortran 90 contains all of Fortran 77, it would be possible to extend Fortran 90 processors to accept "Cray" pointers as well. This would make it easier for existing codes that use pointers to migrate to new Fortran 90 processors. But is it a good idea for a processor to provide two pointer facilities? How difficult is it to convert from "Cray" pointers to Fortran 90 pointers? This paper provides some information that may be helpful in answering these questions.
The Total Delay Fault Model and Statistical Delay Fault Coverage
Authors: Eun Sei Park, M. Ray Mercer, Thomas W. Williams
Venue: IEEE Transactions on Computers (1992)

Delay testing at the operational system clock rate can detect system timing failures caused by delay faults. However, delay fault coverage in terms of the percentage of the number of tested faults may not be an effective measure of delay testing. A quantitative delay fault coverage model to provide a figure of merit for delay testing is presented. System sensitivity of a path to a delay fault along that path and the effectiveness of a delay test are described in terms of the propagation delay of the path under test and the delay defect size. A new statistical delay fault coverage model is established. A defect level model is also proposed as a function of the yield of a manufacturing process and the new statistical delay fault coverage. A new delay testing strategy driven by the defect level for delay faults is proposed.
Efficient algorithms for the Riemann-Roch problem and for addition in the Jacobian of a curve (extended abstract)
Authors: Ming-Deh Huang, Doug Ierardi
Venue: Proceedings of the 32nd annual symposium on Foundations of computer science (1991)

Several computational problems concerning the construction of rational functions and intersecting curves over a given curve are studied. The first problem is to construct a rational function with prescribed zeros and poles over a given curve. More precisely, let C be a smooth projective curve and assume as given an affine plane model F(x,y)=0 for C, a finite set of points P/sub i/=(X/sub i/, Y/sub i/) with F (X/sub i/, Y/sub i/)=0 and natural numbers n/sub i/, and a finite set of points Q/sub i/=(X/sub j/, Y/sub j/) with F(X/sub j/, Y/sub j/)=0 and natural numbers m/sub j/. The problem is to decide whether there is a rational function which has zeros at each point P/sub i/ of order n/sub i/, poles at each Q/sub j/ of order m/sub j/, and no zeros or poles anywhere else on C. One would also like to construct such a rational function if one exists. An efficient algorithm for solving this problem when the given plane curve has only ordinary multiple points is given.
Distributed Instruction Set Computer Architecture
Authors: Lingtao Wang, Chuan-lin Wu
Venue: IEEE Transactions on Computers (1991)

The Distributed Instruction Set Computer Architecture (DISC) is proposed as a fine-grained multiprocessing computer architecture. DISC uses a parallel instruction set and a distributed control mechanism to explore fine-grained, parallel processing in a multiple-functional-unit system. Multiple instructions are executed in parallel and/or out of order at the highest speed of n instructions/cycle, where n is the number of functional units. Based on this architecture, a hardware system is developed. Extensive studies were conducted on a behavioral DISC system model to investigate the performance level, the effect of program sizes, and the hardware utilization. Simulation showed that a DISC system incorporating 16 functional units can run 7.7 times faster than a single-functional-unit DISC system.