ppxscal/embedding_network huggingface dataset:
Automating program analysis
Authors: Timothy Hickey, Jacques Cohen
Venue: Journal of the ACM (JACM) (1988)

The first part of the paper shows that previous theoretical work on the semantics of probabilistic programs (Kozen) and on the correctness of performance annotated programs (Ramshaw) can be used to automate the average-case analysis of simple programs containing assignments, conditionals, and loops. A performance compiler has been developed using this theoretical foundation. The compiler is described, and it is shown that special cases of symbolic simplifications of formulas play a major role in rendering the system usable. The performance compiler generates a system of recurrence equations derived from a given program whose efficiency one wishes to analyze. This generation is always possible, but the problem of solving the resulting equations may be complex. The second part of the paper presents an original method that generalizes the previous approach and is applicable to functional programs that make use of recursion and complex data structures. Several examples are presented, including an analysis of binary tree sort. A key feature of the analysis of such programs is that distributions on complex data structures are represented using attributed probabilistic grammars.
Economies of scale in computing: Grosch's law revisited
Authors: Haim Mendelson
Venue: Communications of the ACM (1987)

Does Grosch's law apply in the 1980s? A look at the price and performance of computer systems concludes that there are no economies of scale in computing. Computer technology is characterized by constant returns to scale, a fact that has important implications on future centralization/decentralization decisions.
Rendering antialiased shadows with depth maps
Authors: William T. Reeves, David H. Salesin, Robert L. Cook
Venue: Proceedings of the 14th annual conference on Computer graphics and interactive techniques (1987)

We present a solution to the aliasing problem for shadow algorithms that use depth maps. The solution is based on a new filtering technique called percentage closer filtering. In addition to antialiasing, the improved algorithm provides soft shadow boundaries that resemble penumbrae. We describe the new algorithm in detail, demonstrate the effects of its parameters, and analyze its performance.
Fibonacci heaps and their uses in improved network optimization algorithms
Authors: Michael L. Fredman, Robert Endre Tarjan
Venue: Journal of the ACM (JACM) (1987)

In this paper we develop a new data structure for implementing heaps (priority queues). Our structure, Fibonacci heaps (abbreviated F-heaps), extends the binomial queues proposed by Vuillemin and studied further by Brown. F-heaps support arbitrary deletion from an n-item heap in O(log n) amortized time and all other standard heap operations in O(1) amortized time. Using F-heaps we are able to obtain improved running times for several network optimization algorithms. In particular, we obtain the following worst-case bounds, where n is the number of vertices and m the number of edges in the problem graph: O(n log n + m) for the single-source shortest path problem with nonnegative edge lengths, improved from O(mlog(m/n+2)n); O(n2log n + nm) for the all-pairs shortest path problem, improved from O(nm log(m/n+2)n); O(n2log n + nm) for the assignment problem (weighted bipartite matching), improved from O(nmlog(m/n+2)n); O(m&bgr;(m, n)) for the minimum spanning tree problem, improved from O(mlog log(m/n+2)n); where &bgr;(m, n) = min {i &uharl; log(i)n &le; m/n}. Note that &bgr;(m, n) &le; log*n if m &ge; n. Of these results, the improved bound for minimum spanning trees is the most striking, although all the results give asymptotic improvements for graphs of appropriate densities.
Performance analysis and design of a logic simulation machine
Authors: K. Wong, M. A. Franklin
Venue: Proceedings of the 14th annual international symposium on Computer architecture (1987)

The high costs associated with logic simulation of large VLSI circuits has led to the need for new computer architectures tailored to the simulation task. Such architectures have the potential for significant speed-ups over software-based logic simulators executing on standard sequential computers. This paper presents a model of one class of multiprocessor simulation architectures and compares the performance of some of these machines using data obtained from simulations of VLSI circuits. In addition, we discuss the implications of our results on machine design and examine the sensitivity of the model to variations in circuit characteristics.
A review and analysis of Fortran 8x
Authors: Brian T. Smith
Venue: ACM SIGNUM Newsletter (1988)

The ANSI Standards Subcommittee X3J3 on Fortran has recently completed a draft proposed standard for the Fortran programming language. The draft proposed standard, known informally as Fortran 8x, is a revision of the current standard X3.9-1978, known informally as Fortran 77. This report is a review of Fortran 8x and consists of a series of six articles. The first article gives a general overview of Fortran 8x. The next three articles give brief discussions of the array facilities; the enhanced numeric facilities; and user-defined data types, procedure interfaces, and the new program unit called a module. The fifth article provides a brief analysis of the controversial issues discussed by X3J3 (including both the accepted and rejected facilities for Fortran 8x). The sixth article gives a brief comparison with Ada. The report concludes with a summary giving information on how and where to express opinions of the draft proposed standard.
Integer multiplication and division on the HP precision architecture
Authors: Daniel J. Magenheimer, Liz Peters, Karl Pettis, Dan Zuras
Venue: ACM SIGARCH Computer Architecture News (1987)

In recent years, many architectural design efforts have focused on maximizing performance for frequently executed, simple instructions. Although these efforts have resulted in machines with better average price/performance ratios, certain complex instructions and, thus, certain classes of programs which heavily depend on these instructions may suffer by comparison. Integer multiplication and division are one such set of complex instructions. This paper describes how a small set of primitive instructions combined with careful frequency analysis and clever programming allows the Hewlett-Packard Precision Architecture integer multiplication and division implementation to provide adequate performance at little or no hardware cost.
Fortran 8x&mdash;its public review
Authors: Brian T. Smith
Venue: ACM SIGNUM Newsletter (1988)

The ANSI Standards Subcommittee X3J3 has recently released the draft proposed Fortran standard [1] for public review. The proposed revision, informally known as Fortran 8x, is being reviewed, beginning October 23, 1987, and ending February 23, 1988. It represents an upward compatible revision of the current standard Fortran 77 [2] in the sense that all Fortran 77 standard-conforming programs conform to the proposed Fortran 8x language.
Work-unit environments of information systems and non-information systems people: implications for end-user computing and distributed processing
Authors: Thomas W Ferratt, Larry E Short
Venue: Proceedings of the twenty-first annual conference on Computer personnel research (1985)

This study investigates whether work-unit environments differ for information systems (IS) and non-information systems (non-IS) employees. Within the same occupational level, i.e., within clerical, technical-professional, and managerial level personnel, no differences are discovered in the overall work-unit environments of IS and non-IS employees. Speculation is presented suggesting that (1) the management of end-user personnel need not change as they become more involved in performing information systems tasks and (2) IS and non-IS personnel in distributed processing environments should be managed similarly.
Run-time generation of HPS microinstructions from a VAX instruction stream
Authors: Y. N. Patt, S. W. Melvin, W. M. Hwu, M. C. Shebanow, C. Chen
Venue: Proceedings of the 19th annual workshop on Microprogramming (1986)

The VAX architecture is a popular ISP architecture that has been implemented in several different technologies targeted to a wide range of performance specifications. However, it has been argued that the VAX has specific characteristics which preclude a very high performance implementation. We have developed a microarchitecture (HPS) which is specifically intended for implementing very high performance computing engines. Our model of execution is a restriction on fine granularity data flow. In this paper, we concentrate on one particular aspect of an HPS implementation of the VAX architecture: the generation of HPS microinstructions (i.e. data flow nodes) from a VAX instruction stream.
The profile naming service
Authors: Larry L. Peterson
Venue: ACM Transactions on Computer Systems (TOCS) (1988)

Profile is a descriptive naming service used to identify users and organizations. This paper presents a structural overview of Profile's three major components: a confederation of attribute-based name servers, a name space abstraction that unifies the name servers, and a user interface that integrates the name space with existing naming systems. Each name server is an independent authority that allows clients to describe users and organizations with a multiplicity of attributes; the name space abstraction is a client program that implements a discipline for searching a sequence of name servers; and the interface provides a tool with which users build customized commands. Experience with an implementation in the DARPA/NSF Internet demonstrates that Profile is a feasible and effective mechanism for naming users and organizations in a large internet.
Introducing object-oriented programming into the computer science curriculum
Authors: John R. Pugh, Wilf R. LaLonde, David A. Thomas
Venue: ACM SIGCSE Bulletin (1987)

In recent years, object-oriented programming languages and object-oriented program design have become increasingly popular. Dialects of many popular programming languages are now available which support the major concepts of object-oriented programming; namely message-passing, classes, generic operations and inheritance. Experience in the paradigm is increasingly supporting the view that object-oriented programming may be to the 80's what structured programming was to the 70's in terms of its influence on software development.After reviewing the notions of object-oriented programming, we describe our experiences in introducing the object-oriented paradigm into the Computer Science curriculum. The impact was felt in four courses dealing with data types and data structures, programming languages, software engineering, and compiler construction. In addition, we describe the use of the Smalltalk environment in advanced course and project work. We chronicle our experiences in the expectation that they will be of benefit to other educators considering adopting the object-oriented paradigm. Finally, we review the potential benefits of introducing object-oriented programming into the computer science curriculum.
Fine-grained mobility in the Emerald system
Authors: Eric Jul, Henry Levy, Norman Hutchinson, Andrew Black
Venue: ACM Transactions on Computer Systems (TOCS) (1988)

Emerald is an object-based language and system designed for the construction of distributed programs. An explicit goal of Emerald is support for object mobility; objects in Emerald can freely move within the system to take advantage of distribution and dynamically changing environments. We say that Emerald has fine-grained mobility because Emerald objects can be small data objects as well as process objects. Fine-grained mobility allows us to apply mobility in new ways but presents implementation problems as well. This paper discusses the benefits of tine-grained mobility, the Emerald language and run-time mechanisms that support mobility, and techniques for implementing mobility that do not degrade the performance of local operations. Performance measurements of the current implementation are included.
Task Allocation and Precedence Relations for Distributed Real-Time Systems
Authors: W. W. Chu, M.-T. Lan
Venue: IEEE Transactions on Computers (1987)

In a distributed processing system with the application software partitioned into a set of program modules, allocation of those modules to the processors is an important problem. This paper presents a method for optimal module allocation that satisfies certain performance constraints. An objective function that includes the intermodule communication (IMC) and accumulative execution time (AET) of each module is proposed. It minimizes the bottleneck-processor utilization a good principle for task allocation. Next, the effects of precedence relationship (PR) among program modules on response time are studied. Both simulation and analytical results reveal that the program-size ratio between two consecutive modules plays an important role in task response time. Finally, an algorithm based on PR, AET, and IMC and on the proposed objective function is presented. This algorithm generates better module assignments than those that do not consider the PR effects.
On the parameters of human visual performance: an investigation of the benefits of antialiasing
Authors: Kellogg S. Booth, M. Philip Bryden, Wiliam B. Cowan, Michael F. Morgan, Brian L. Plante
Venue: ACM SIGCHI Bulletin (1986)

A two-part experiment was conducted to investigate the effects of aliasing artifacts and screen resolution on a simple visual recognition task. The results indicate that in many cases far less realism may be necessary in synthetic computer-generated imagery than is often assumed in the literature. The first part of the experiment comprised a subjective rating of image quality, the second part measured task effectiveness of image quality. In the second part subjects were asked to discriminate between images of two types of objects built from cubes, similar to objects used in experiments involving mental rotation.At higher resolutions the elimination of aliasing artifacts did not significantly improve subjects' performance. At intermediate and low resolutions, comparable to what might be used for iconic menus, the reduction in aliasing artifacts resulted in improved performance. The subjective ratings indicate that for both high and low resolution the elimination of aliasing artifacts does not improve &ldquo;quality,&rdquo; whereas images rendered at intermediate resolutions are significantly degraded by aliasing artifacts to the extent that antialiasing improves the subjective rating.An interpretation of these results is given in the context of an ongoing research program aimed at identifying the parameters of real-time human performance for graphics workstations.
The Roles of Execution and Analysis in Algorthm Design
Authors: David M. Steier, Elaine Kant
Venue: IEEE Transactions on Software Engineering (1985)

The analysis and execution of partial algorithm descriptions is an important part of the algorithm design process (as is borne out by studying the behavior of human algorithm designers). In this paper, we describe a language for representing partially designed algorithms and a process, developmental evaluation, that can discover useful knowledge to guide design. Using these and other results from our research in artificial intelligence, we are building a system, DESIGNER, that automatically designs algorithms. This paper also compares developmental evaluation to execution and analysis techniques used for testing complete programs and for validation of abstract specifications; concepts similar to those found in developmental evaluation are thus shown to apply to all stages of the software life cycle.
Two-level hybrid interpreter/native code execution for combined space-time program efficiency
Authors: T. Pittman
Venue: Papers of the Symposium on Interpreters and interpretive techniques (1987)

A two-level programming model permits the applications programmer to write programs that benefit both from the code density of interpreted virtual machines and from the speed of native code execution. A well-defined boundary between the native code and the virtual machine facilitates the development of translators to be used at both levels.
Tree resolution and generalized semantic tree
Authors: S Kundu
Venue: Proceedings of the ACM SIGART international symposium on Methodologies for intelligent systems (1986)

A resolution proof or a derivation of the empty clause from a set of clauses S = {C1, C2, &hellip;, Ck} is called a tree resolution if no clause Ci is used in more than one resolvent. We show that an unsatisfiable set of clauses S has a tree resolution proof if and only if there is a general semantic tree for S in which no clause appears in more than one terminal node. As an important application of this result, we derive a simple algorithm for obtaining a tree resolution proof, if one exists. The tree resolution proofs are important because they allow us to obtain the shortest &ldquo;explanation&rdquo;.
Note on a pseudorandom number generator
Authors: James Fullerton
Venue: ACM SIGNUM Newsletter (1987)

A function for generating pseudorandom numbers on programmable calculators is evaluated and found to be deficient.
Expert Systems and the "Myth" of Symbolic Reasoning
Authors: Jon Doyle
Venue: IEEE Transactions on Software Engineering (1985)

Elements of the artificial intelligence approach to expert systems offer great productivity advantages over traditional approaches to application systems development, even though the end result may be a program employing no AI techniques. These productivity advantages are the hidden truths behind the "myth" that symbolic reasoning programs are better than ordinary ones.
The algorithms capture approach to Ada transition
Authors: David P. Wood
Venue: ACM SIGAda Ada Letters (1988)

The mandate for the use of the Ada language in Department of Defense software systems, as well as the growing interest in Ada that exists in the commercial software industry, has created the need for planned, systematic transition paths from existing programs to Ada programs. The demands that Ada places on the life-cycle development of software increases the need for careful planning in any Ada transition effort. At the same time, the desire to derive Ada systems from an existing non-Ada baseline also increases the need for careful control of the transition process. This paper examines the general issues behind such a transition, and describes a transition process geared toward maximizing the benefit of the use of the Ada language, while maintaining a tightly-controlled link with existing systems.
Legged robots
Authors: Marc H. Raibert
Venue: Communications of the ACM (1986)

Research on legged machines can lead to the construction of useful legged vehicles and help us to understand legged locomotion in animals.
Version control in families of large programs
Authors: J. F. H. Winkler
Venue: Proceedings of the 9th international conference on Software Engineering (1987)

Programs products are quite often families of large and modular programs. Modern programming languages support the formulation of such program families only partially. At the time being it is usually not possible to describe different revisions, variants, and versions of single program building blocks and whole programs. This paper presents a proposal for the formulation of such version information as part of the program text. In a newly introduced CONFIG part of a program building block the programmer can express: (1) to which versions the building block belongs, and (2) which versions of other building blocks it uses. In this new construct a version is defined as a pair (revision, variant), and a variant as a vector of attribute values. With these language constructs the &ldquo;knowledge&rdquo; about the program versions can be expressed by facts and rules. The representation of this knowledge is adapted to the structure of the program, and the generation of specific program versions can be done automatically. The configuration algorithm has been implemented in Prolog, and this prototype implementation has been used for some examples.
Using AI as a research tool
Authors: T Kyle
Venue: Issue 97 (July 1986) (1986)

AI and expert systems techniques have been used as part of a research project and found to be useful and to have great potential for aiding both the research and the management of such projects. The potential benefits to each of these areas go far beyond what has been realized in the present project. We discuss some of these benefits and the experience gained to this time.
Writing multi-user applications in APL2
Authors: James A. Brown
Venue: Proceedings of the international conference on APL (1986)

This paper presents a general scheme for quickly implementing multi-user applications. Several facilities of APL2 are discussed which make APL2 a particularly suitable solution for such problems. The resulting implementation is used to demonstrate how the advanced facilities of APL2 affect the writing of programs. The simplicity of the programs indicates how productive APL2 can be. The paper does not discuss the necessary user-friendly front end that any application should have because that is no different from a single user application.
Byte-Oriented Error-Correcting Codes for Semiconductor Memory Systems
Authors: C. L. Chen
Venue: IEEE Transactions on Computers (1986)

Byte-oriented error-correcting codes are useful in correcting and detecting errors in a memory system organized in multiple-bit-perchip fashion. This paper presents the construction of new single-byte error-correcting and double-byte error-detecting codes.
Architecture of high performance integrated Prolog processor IPP
Authors: S. Yamaguchi, T. Bandoh, K. Kurosawa, M. Morioka
Venue: Proceedings of the 1987 Fall Joint Computer Conference on Exploring technology: today and tomorrow (1987)

This paper describes a high speed integrated Prolog processor (IPP) which integrates the extended Warren's Prolog instructions, and its acceleration hardware into a 32-bit super-minicomputer. Tagged data format and instruction format under constraints of a general purpose machine architecture, and aspects of the hardware architecture of the IPP which includes some special hardware for an accelerating Prolog instruction execution are described. The IPP is implemented by high speed ECL(emitter coupled logic) gate arrays and its inference performance is 1 MLIPS for the deterministic concatenate program. It is easy for the IPP to link Prolog programs and existing procedural programs. And it can share its hardware resource with a base machine. Therefore, using the IPP, a high cost/performance practical AI system can be realized.