ppxscal/embedding_network huggingface dataset:
Quality of service mechanisms in optical burst-switched networks
Authors: Qiong Zhang
Venue:  (2005)

The explosive growth of the Internet demands a high-speed transmission technology for supporting rapidly increasing bandwidth requirements. Currently, wavelength division multiplexing (WDM) technology enables multiplexing of 160&ndash;320 wavelengths into a single fiber, with a transmission rate of 10&ndash;40 Gb/s per wavelength. In order to efficiently utilize the raw bandwidth in WDM networks, an all-optical transport method, which supports fast resource provisioning and asynchronous transmission, must be developed. Optical burst switching (OBS) is such a promising bufferless WDM switching technology. An important issue in OBS networks is the development of quality of service (QoS) mechanisms in order to offer better services for diverse Internet applications. In this dissertation, we propose an absolute QoS model which ensures that an upper bound on the burst loss probability is guaranteed for the high-priority class. We develop two mechanisms for providing loss guarantees at OBS core nodes: an early dropping mechanism and a wavelength grouping mechanism. We also discuss admission control and resource provisioning for OBS networks, and propose a path clustering technique to further improve the network-wide loss performance. We develop analytical loss models for the proposed schemes and verify the results by simulation. We also propose a burst retransmission scheme in OBS networks in which bursts lost in the OBS network are retransmitted in the OBS transport layer. Our retransmission scheme reduces burst loss probability significantly. We develop an analytical model for obtaining the burst loss probability over an OBS network that uses the retransmission scheme. TCP carries a majority of Internet traffic, thus understanding and improving the performance of TCP implementations over OBS networks is critical. Due to the bufferless nature of OBS networks, randomburst losses may occur, even at low traffic loads. For OBS networks in which TCP is implemented at a higher layer, these random burst losses may be mistakenly interpreted by the TCP layer as congestion in the network, leading to serious degradation of the TCP performance. We adopt the burst retransmission scheme to reduce the probability that the TCP layer falsely detects congestion, thereby improving the TCP throughput. We analyze the TCP throughput when OBS networks employ the burst retransmission scheme and develop a simulation model to validate the analytical results.
A high-level tool for the design of custom image processing systems
Authors: Sergio Martins, Jose Carlos Alves
Venue: Proceedings of the 8th Euromicro Conference on Digital System Design (2005)

Real-time image processing is a computational intensive task with applications in various engineering fields. In several image processing applications, a significant amount of computing power is committed to image enhancement operations, basic segmentation and identification of regions of interest for further analysis. Such type of front-end processing can be done efficiently by custom data-flow processors closely coupled to an image sensor. This paper proposes a visual design environment to support the high-level design of custom data-flow processors for real-time image analysis applications. The tool is embedded in Matlab/Simulink, and the system modeling is done using a library of blocks that implement common low-level image processing operations. Functional validation is performed efficiently by the simulation engine of Simulink in a frame by frame basis, using the functions provided by the image processing toolbox in Matlab. The automatic generation of a synthesizable RTL model guarantees a logic implementation of the system that complies to the high-level model validated, under constraints imposed by the user and the target reconfigurable device.
Securing Email Archives through User Modeling
Authors: Yiru Li, Anil Somayaji
Venue: Proceedings of the 21st Annual Computer Security Applications Conference (2005)

Online email archives are an under-protected yet extremely sensitive information resource. Email archives can store years worth of personal and business email in an easy-to-access form, one that is much easier to compromise than messages being transmitted .on the wire.. Most email archives, however, are protected by reusable passwords that are often weak and can be easily compromised. To protect such archives, we propose a novel user-specific design for an anomaly-based email archive intrusion detection system. As a first step towards building such a system, we have developed a simple probabilistic model of user email behavior that correlates email senders and a user's disposition of emails. In tests using data gathered from three months of observed user behavior and synthetic models of attacker behavior, this model exhibits a low rate of false positives (generally one false alarm every few weeks) while still detecting most attacks. These results suggest that anomaly detection is a feasible strategy for securing email archives, one that does not require changes in user authentication or access behavior.
Unified activity management: supporting people in e-business
Authors: Thomas P. Moran, Alex Cozzi, Stephen P. Farrell
Venue: Communications of the ACM (2005)

Meshing formal business processes with informal human collaborations is needed to support business activities.
Intermediate-representation recovery from low-level code
Authors: Thomas Reps, Gogul Balakrishnan, Junghee Lim
Venue: Proceedings of the 2006 ACM SIGPLAN symposium on Partial evaluation and semantics-based program manipulation (2006)

The goal of our work is to create tools that an analyst can use to understand the workings of COTS components, plugins, mobile code, and DLLs, as well as memory snapshots of worms and virus-infected code. This paper describes how static analysis provides techniques that can be used to recover intermediate representations that are similar to those that can be created for a program written in a high-level language.
Configuring Common Personal Software: a Requirements-Driven Approach
Authors: Sotirios Liaskos, Alexei Lapouchnian, Yiqiao Wang, Yijun Yu, Steve Easterbrook
Venue: Proceedings of the 13th IEEE International Conference on Requirements Engineering (2005)

We investigate the personalization capabilities of common personal software systems. We use a typical e-mail client as an example of such a system, and examine the configuration screens it offers to its users. We discover that each configuration value reflects each of the ways with which the user goals can be satisfied. Thus, we construct a goal model in which alternative ways for satisfying high level goals are matched with alternative system configurations. This way, automatic configuration of the system by reasoning about the overlaying goal model can be achieved. We find that the vast majority of the configuration options that refer to system functionality can be configured using this method, facilitating thereby the personalization tasks for users with no technical background, and ensuring, at the same time, consistency and meaningfulness in theconfiguration result.
Cross Layer Design for IEEE 802.11 WLANs: Joint Rate Control and Packet Scheduling
Authors: Qiuyan Xia, Mounir Hamdi
Venue: Proceedings of the The IEEE Conference on Local Computer Networks 30th Anniversary (2005)

IEEE 802.11 Wireless Local Area Networks (WLANs) are widely deployed nowadays. With traditional layered architecture, current WLAN adopts functional layer partitioning and aims at optimization in individual layers. However, in a highly dynamic and media sharing wireless environment, the capacity enhancement at physical layers may not necessarily benefit the overall system performance. Moreover, in a multiuser setting, throughput can be increased substantially if partial knowledge of the channel is known. In this paper, we address the issue of cross layer design in the proposed "Weighted Fair Scheduling based on Adaptive Rate Control" (WFS-ARC) framework, where the PHY layer knowledge is shared with the MAC/LLC layer. It can make good matching of instantaneous channel conditions of multiple users with resource allocation to each user.
High performance, low power and secure embedded systems
Authors: Zili Shao
Venue:  (2005)

Embedded systems are driving an information revolution with their pervasion in our everyday lives. The increasingly ubiquitous embedded systems pose a host of technical challenges different from those faced by general-purpose computer systems because they are more application specific and more constrained in terms of timing, power, area, memory and other resources. It becomes an important research problem to design high-performance, low power and secure embedded systems with various constraints and limited resources. In our research, we have attacked this problem from various aspects including low power optimization, high-level architecture synthesis, and hardware/software co-design for embedded system security. In low power optimization, we focus on reducing power consumption on VLIW (Very Long Instruction Word) architectures. We identify that switching activity and schedule length are the two most important factors that influence the energy consumption of an application executed on a VLIW processor. We formally prove that the minimum-switching-activities scheduling problem is NP-complete with or without resource constraints. Several novel scheduling techniques have been proposed that tremendously improve the state-of-the-art techniques. In high-level architecture synthesis, we address high-level architecture synthesis for real-time Digital Signal Processing (DSP) using heterogeneous functional units (FUs). With more and more different types of FUs available, same type of operations can be processed by heterogeneous FUs with different costs, where the cost may relate to power, reliability, etc. For such special purpose architecture synthesis, therefore, an important problem is how to assign a proper function unit type to each operation of a DSP application and generate a schedule in such a way that all requirements can be met and the total cost can be minimized. We prove that this problem is NP-complete and propose several algorithms to solve it. The experiments show that our algorithms can effectively reduce the total cost compared with the previous work. Security is another important issue in embedded system designs. With more embedded systems networked, it becomes an important problem to defend them against buffer overflow attacks that have been causing serious security problems for decades. We propose a hardware/software co-design technique to solve this problem, and our technique can defend embedded systems against more types of attacks with less overhead compared with the previous work. We also propose a novel hardware/software optimization technique that can greatly reduce the overhead of array pointer boundary checking, one of the most effective buffer overflow defending techniques when source code is available.
Volume 1 number 1 SICSIM Newsletter
Venue: ACM SIGSIM Simulation Digest (1973)

The ACM Special Interest Committee on Digita] Simulation (SICSIM) was chartered at the 1967 National ACM meeting in August of 1967. SICSIM's goals are to provide the programming community with a forum for exchanging technology related to digital simulation and to improve and advance the state of the art in digital simulation. (A copy of the SICSIM Statement of Function is attached.) The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
Apollonian Circle Packings: Geometry and Group Theory I. The Apollonian Group
Authors: Ronald L. Graham, Jeffrey C. Lagarias, Colin L. Mallows, Allan R. Wilks, Catherine H. Yan
Venue: Discrete Computational Geometry (2005)

Apollonian circle packings arise by repeatedly filling the interstices between four mutually tangent circles with further tangent circles. We observe that there exist Apollonian packings which have strong integrality properties, in which all circles in the packing have integer curvatures and rational centers such that (curvature) $\times$ (center) is an integer vector. This series of papers explain such properties. A Descartes configuration is a set of four mutually tangent circles with disjoint interiors. An Apollonian circle packing can be described in terms of the Descartes configuration it contains. We describe the space of all ordered, oriented Descartes configurations using a coordinate system $M_ D$ consisting of those $4 \times 4$ real matrices $W$ with $W^T Q_{D} \bW = Q_{W}$ where $Q_D$ is the matrix of the Descartes quadratic form $Q_D= x_1^2 + x_2^2+ x_3^2 + x_4^2 - \frac{1}{2}(x_1 +x_2 +x_3 + x_4)^2$ and $Q_W$ of the quadratic form $Q_W = -8x_1x_2 + 2x_3^2 + 2x_4^2$. On the parameter space $M_ D$ the group $\mathop{\it Aut}(Q_D)$ acts on the left, and $\mathop{\it Aut}(Q_W)$ acts on the right, giving two different "geometric" actions. Both these groups are isomorphic to the Lorentz group $O(3, 1)$. The right action of $\mathop{\it Aut}(Q_W)$ (essentially) corresponds to Mobius transformations acting on the underlying Euclidean space $\rr^2$ while the left action of $\mathop{\it Aut}(Q_D)$ is defined only on the parameter space. We observe that the Descartes configurations in each Apollonian packing form an orbit of a single Descartes configuration under a certain finitely generated discrete subgroup of $\mathop{\it Aut}(Q_D)$, which we call the Apollonian group. This group consists of $4 \times 4$ integer matrices, and its integrality properties lead to the integrality properties observed in some Apollonian circle packings. We introduce two more related finitely generated groups in $\mathop{\it Aut}(Q_D)$, the dual Apollonian group produced from the Apollonian group by a "duality" conjugation, and the super-Apollonian group which is the group generated by the Apollonian and dual Apollonian groups together. These groups also consist of integer $4 \times 4$ matrices. We show these groups are hyperbolic Coxeter groups.
Celebrating the Past, Looking to the Future
Authors: Doris L. Carver
Venue: Computer (2006)

The editor in chief reaffirms Computer's continuing commitment to provide timely information about diverse topics in computer science, technology, and applications and outlines plans for editorial coverage during the Computer Society's 60th anniversary year.
Extensible Platform Software Architecture Design and its impact in the embedded network software engineering
Authors: Toshihiko Yamakami
Venue: Proceedings of the The Fifth International Conference on Computer and Information Technology (2005)

With 3G system introduction, the data communication applications are a key for the mobile Internet evolution. It is a challenge to design an extensible and resourceefficient software platform for mobile multimedia services. The methodology to identify the trade-off in the software architecture design was unexplored in the past literature. The author compares the two software platforms for micro browsers in order to identify the trade-off factors between extensibility and compactness. The author summarizes the three extension schemes, abstract rendering, XML framework, and extensible common components. The author proposes a discrete component analysis to evaluate the impact from the extensible architecture. With this analysis, the author presents the footprint overhead estimate for the embedded software environment designed for mobile handsets. It is a useful measure when the trade-off between the hard-wired concise implementation and the extensiontolerant implementations.
Implementation and Performance Analysis of a Packet Scheduler on a Programmable Network Processor
Authors: Fariza Sabrina, Salil S. Kanhere, Sanjay Jha
Venue: Proceedings of the The IEEE Conference on Local Computer Networks 30th Anniversary (2005)

The problem of achieving fairness in the allocation of the bandwidth resource on a link shared by multiple flows of traffic has been extensively researched over the last decade. However, as these flows traverse a computer network, they share many different kinds of resources such as links, processor cycles, buffers and battery power, a critical resource in mobile devices. The ultimate goal should hence be overall fairness in the allocation of multiple resources rather than a single specific resource such as link bandwidth. In our earlier work we have presented a novel scheduler called Prediction-based Composite Fair Queueing (PCFQ), which jointly allocates the fair share of the link bandwidth as well as processing resource to all competing flows. Our scheme also uses a simple and adaptive online prediction scheme for reliably estimating the execution times of the incoming data packets. We have demonstrated via simulation experiments that PCFQ can provide much improved Quality of Service (QoS) guarantees as compared to separate bandwidth and processor schedulers. With the rapid increase in the capacity of transmission links, the ease with which a scheduler can be implemented in real hardware systems gains paramount importance. In this paper we concentrate on the design and implementation of the PCFQ scheduler in a programmable router. We demonstrate that our scheduler can be easily implemented on an off-theshelf network processor such as the Intel IXP 2400 board. We also validate our design by carrying out extensive experiments and demonstrate the improved performance achieved by the PCFQ scheduler. The experimental results from the IXP2400 implementation highlight the effectiveness and high performance of this algorithm in a real world system.
Interpreting computer code in a computer-based learning system for novice programmers: Research Articles
Authors: Iain Milne, Glenn Rowe
Venue: Software&mdash;Practice Experience (2005)

Although the principles of writing compilers and interpreters are well known, we have found that the ideas needed to develop an interpreter for the express purpose of allowing direct interaction with the running code do not yet appear to have been published in an academic context. We describe a programming method that can be used for the production of an interpreter for common object-oriented languages such as C++, Java and C&num;. The main purpose of the interpreter is to parse short, relatively simple programs and allow direct interaction between the user and the running code. Such a system is useful for projects such as OGRE, which is an educational tool allowing students to visualize in three-dimensional graphics the state of a program as it runs. The interpreter works by first parsing the source code and building up a data structure capable of representing the program's source code in a form that can be used to both run the program and extract detailed information from the running program. This extraction allows for novel uses of the interpreter, such as forming the basis for a visualization system that must display and provide such information to the user as they watch their executing program. This paper considers the construction of such an interpreter specifically for C++, but the principles should be the same for other similar languages such as Java and C&num;. We cover the main tasks required of the programmer to create and use the data structure, highlighting areas such as its design, initial construction during parsing, and techniques required to use it for interpretation. These include the ability for the data structure to intelligently clone subsets of itself when multiple copies of one of its elements are required by the running program, how it handles C++'s complicated function overloading and overriding rules, and how inheritance and polymorphism can be supported. Copyright &copy; 2005 John Wiley & Sons, Ltd.
A Riemannian Framework for Tensor Computing
Authors: Xavier Pennec, Pierre Fillard, Nicholas Ayache
Venue: International Journal of Computer Vision (2006)

Tensors are nowadays a common source of geometric information. In this paper, we propose to endow the tensor space with an affine-invariant Riemannian metric. We demonstrate that it leads to strong theoretical properties: the cone of positive definite symmetric matrices is replaced by a regular and complete manifold without boundaries (null eigenvalues are at the infinity), the geodesic between two tensors and the mean of a set of tensors are uniquely defined, etc.We have previously shown that the Riemannian metric provides a powerful framework for generalizing statistics to manifolds. In this paper, we show that it is also possible to generalize to tensor fields many important geometric data processing algorithms such as interpolation, filtering, diffusion and restoration of missing data. For instance, most interpolation and Gaussian filtering schemes can be tackled efficiently through a weighted mean computation. Linear and anisotropic diffusion schemes can be adapted to our Riemannian framework, through partial differential evolution equations, provided that the metric of the tensor space is taken into account. For that purpose, we provide intrinsic numerical schemes to compute the gradient and Laplace-Beltrami operators. Finally, to enforce the fidelity to the data (either sparsely distributed tensors or complete tensors fields) we propose least-squares criteria based on our invariant Riemannian distance which are particularly simple and efficient to solve.
Adaptive Routing Filters for Robust Query Processing in Schema-Based P2P Systems
Authors: Katja Hose, Marcel Karnstedt, Kai-Uwe Sattler, Ernst-August Stehr
Venue: Proceedings of the 9th International Database Engineering & Application Symposium (2005)

Peer Data Management Systems (PDMS) currently gain attention at an emerging scale in order to cope with the needs of growing organizational integration. Efficient query processing, as one of the main requirements in these systems, provides three major challenges: achieving robustness, scalability and self organization. In this paper we deal with the physical aspects of these requirements. We introduce an adaptive maintenance technique based on query feedback for keeping routing filters, used to optimize routing, up-to-date. These filters are applied in conjunction with an iterative query processing strategy and we show that this can improve robustness and scalability of query processing in distributed data management systems.
SafetyChip: a time monitoring and policing device
Authors: Gustaf Naeser, Lars Asplund, Johan Furunäs
Venue: ACM SIGAda Ada Letters (2005)

The SafetyChip proposes a strategy where parts of the effort invested in the formal verification during the development of a system can be reused during the system's operation. The strength in a formal verification of a system is that a system can mathematically be proven to fulfil certain requirements, e.g., timing requirements. The SafetyChip uses information from verification to monitor and police a system during run-time. The monitoring is done by surveillance of the applications communication with the run-time kernel. If deviance from the predefined verified behaviour is detected, the SafetyChip can signal (police) this in different ways, e.g., by generating interrupts the system can respond to.In our experiments we use systems written in Ravenscar compliant Ada code and have automated model extraction from source code to the models used to verify the system.This paper presents the functionality and design of the SafetyChip. Properties of an implementation of the SafetyChip are also presented.