ppxscal/embedding_network huggingface dataset:
SYNCRO: A dataflow command shell for the lilith/modula computer
Authors: Tom DeMarco, Aurel Soceneantu
Venue: Proceedings of the 7th international conference on Software engineering (1984)

SYNCRO is a two-dimensional command interpreter that allows human interface through a graphic command language. This paper describes the concept of two-dimensional commands for direct implementation of leveled data flow structures, and comments on the SYNCRO scheme for effecting them. SYNCRO is implemented in Modula-2 on Niklaus Wirth's Lilith/Modula computer.
A microprogrammed keyword transformation unit for a database computer
Authors: Krishnamurthi Kannan, David K. Hsiao, Douglas S. Kerr
Venue: ACM SIGMICRO Newsletter (1977)

The design of a microprogrammable microprocessor-based keyword transformation unit for a database computer(DBC) is described. The DBC, a specialized back-end computer capable of managing 109 - 1010 bytes of data, consists of two loops of memories and processors, the structure loop and the data loop, connected through a database command and control processor (DBCCP). The structure loop is used to retrieve and update the large amount (107 - 109 bytes) of structural information about the database from a structure memory (SM) at a rate commensurate with the database operations performed on the mass memory of the data loop. A keyword transformation unit (KXU) is therefore required to enhance the performance of the structure memory. The KXU encodes variable-length keywords into a fixed-length form by hashing. By managing a library of carefully designed hashing algorithms and by dynamically loading the algorithms in a writable control store for execution, the KXU allows the efficient storage of keywords and their associated information and minimizes subsequent accesses to the SM.
An operating systems implementation project for an undergraduate course
Authors: Manfred Ruschitzka
Venue: Proceedings of the seventh SIGCSE technical symposium on Computer science education (1977)

While the adoption of an implementation project for an operating systems course is certainly beneficial, non-trivial projects are inherently demanding in terms of student efforts and computer costs. This paper reports on a project which has been designed to keep the effort for an extensive simulation of a contemporary system within acceptable limits. The project involves both a hardware simulator and an operating system, and a considerable reduction of the overall effort could be achieved by enhancing the hardware with operating systems support features. The design criteria as well as the characteristics of the resulting hardware configuration and operating system are presented, and the value of the project as a teaching tool is discussed
Office Information Systems research and development projects in Europe (Invited)
Authors: Najah Naffah
Venue: ACM SIGOA Newsletter (1982)

In Europe most research projects in the area of Office Information Systems are concentrated around public communication services and transmission networks. Very few projects exist in what we call the Automated Office of the Future. In the first category, known as TELEMATIQUE, we find the videotex services, which consist of data banks connected to public networks and offering access to residential users through their color TV sets. A second service, called TELETEX, will start soon in different European countries to replace the present telex service with some kind of communicating word processors. All these projects are sponsored by the PTT and operate according to a set of standards elaborated by the CCITT. On the other hand, true Office Information Systems projects, which are tailored to the private users and organizations needs, are very rare. Some manufacturers are working on new word processors combining data processing and text processing, with voice input for command, and voice output for signalling. Local networks have been built in different research centers and have been produced by local manufacturers and distributed on national basis (e.g., Cambridge Ring in England, Danube in France, and Cobus in Switzerland). While manufacturers as ICL, Thomson, Siemens, Olivetti are announcing products with many components imported from the U.S., the research community has been very active in exploring new approaches for O.I.S. Under the sponsorship of the CEC, a group of researchers from France, Germany, Norway, Sweden, U.K., are working on the interconnection of Heterogeneous message systems, where the most difficult problems reside in the naming strategy to adopt, the conversion between message format, the high level protocols to implement. Two research centers in Switzerland and in France, have been building workstations for the office. The first one has produced a portable personnel computer with text editor (Smaky - Ecole Polytechnique de Lausanne), and the second has built a sophisticated workstation with many integrated services (Burovlseur of the Kayak project - INRIA, France). In addition, a complete prototype of O.I.S. is under development in this project. Other work is undertaken by different research centers on issues related to O.I.S. (Queen Mary College - London; GMC, HMI and the University of Hamburg - Germany; INRIA, IMAG, SUPELEC, UPS - France .... ). In this presentation, we will give a summary of the work that has been accomplished and the future of some of the projects.
The chip complexity of binary arithmetic
Authors: R. P. Brent, H. T. Kung
Venue: Proceedings of the twelfth annual ACM symposium on Theory of computing (1980)

The chip complexity of a computation is concerned with the chip area, A, and the time, T, required to perform the computation when implemented on a chip. An area-time product AT&agr;,for &agr; &ge; 0, is used as a complexity measure. A particular value of &agr;, which is chosen by the user, reflects the relative importance between A and T. This paper derives lower and upper bounds on the area-time complexity for chips that implement binary arithmetic, assuming a model of computation which is intended to approximate, current and anticipated LSI or VLSI technology.
Market expansion policy evaluation by simulation
Authors: R. E. Thiele, R. R. Klimpel
Venue: Proceedings of the fourth annual conference on Applications of simulation (1970)

This paper is concerned with the evaluation of proposed policies for expanding the market of a speciality industrial product and is based on an actual industrial case study. The product under consideration is relatively new and unique with the company holding excellent raw material and technical knowledge positions. While some completely new industrial processes using the new product are feasible, it is anticipated that the major use of the product will be as a replacement for existing products possessing significantly less advantageous use characteristics at a comparable price. Thus, the potential market for the new product is reasonably well known and the problem becomes one of seeking a greater market share rather than creating a strictly new market. Historically, the marketing and distribution system for this industrial speciality has involved the use of numerous independently owned outlets (often loosely chain affiliated). These distributors are geographically widely spread across the United States and provide the storage and immediate customer shipping and contact work necessary. This is similar to the usual industrial goods outlet handling a wide variety of products (occasionally offering two or more competitive products of the same type). Because of the extreme financial outlay required, the lack of actual customer marketing experience, the lack of a complete speciality product line in this general market, and time, it is not possible for the company to set up a distribution network of its own. Rather, the expansion of the use of the new product must take place by developing contractual relationships with existing distributors. Thus, a technical sales force must be organized and trained to act as the representative of the company to the various distributors (and also to the distributors' customers). By company policy, this route was preferred rather than, for example, the use of manufacturers agents, etc.
The macro model for data compression (Extended Abstract)
Authors: James A. Storer, Thomas G. Szymanski
Venue: Proceedings of the tenth annual ACM symposium on Theory of computing (1978)

A general model for data compression is presented which includes most data compression systems in the literature as special cases. All macro schemes are based on the principle of finding redundant strings or patterns and replacing them by pointers to a common copy. Different varieties of macro schemes may be defined by varying the interpretation of pointers, for instance, a pointer may indicate a substring of the compressed string, a substring of the original string, or a substring of some other string such as an external dictionary. Other varieties of macros schemes may be defined by restricting the type of overlapping or recursion that may be used. Trade-offs between different varieties of macro schemes, exact lower bounds on the amount of compression obtainable, and the complexity of encoding and decoding are discussed as well as how the work of other authors (such as Lempel-Ziv) relates to this model.
Generating correlated random variables for quality control applications
Authors: Athanasios Vasilopoulos
Venue: Proceedings of the 16th annual symposium on Simulation (1983)

A great deal of data in business, economics, engineering, and the natural sciences occur in the form of time series, where observations are dependent. In such cases, identification techniques may be used to identify a specific model and the likelihood function can be used to provide maximum likelihood estimates of the model parameters. It may also be desirable to generate a sequence of numbers x1, x2,...,xn so that the individual xi's have specified univariate distributions and the correlations &rgr;ij between xi and xj are specified by the modeler. For quality control applications, when the charting variable is the sample standard deviation s, the control limits are functions of E (s) and std (s). In this paper the density function of s is derived for n&equil;2 and n&equil;3, and a sequence of random numbers is generated which possesses that density function. For n &ge; 4 the density function f(s) becomes extremely complicated and other methods have to be used.
Use of format models and generic outlines to develop source material
Authors: Roger A. Grice
Venue: Proceedings of the 2nd annual international conference on Systems documentation (1983)

This paper describes how format models and generic outlines were used to produce macro and system logic descriptions for the first release of IBM's Distributed Processing Programming Executive (DPPX) during the system's development. Because models and outlines were created and adopted early in the system's development cycle and because project control of both the information and information-developing process were enforced, initial documentation available to system developers was in the same format and of the same quality as the descriptions made available to users after the system was released. The process resulted in higher quality descriptions and less last-minute rework. Format models and generic outlines provide a standard description of how the system should be described. In the case of macros, the format model tells the developer how the macro will be described in customer publications and identifies the required information and information formats to be used in the macro's initial description. Following the format ensures that all required information will be included in the initial descriptions of all system macros and that the descriptions of all the system macros will be in the form needed to produce the final descriptions. In the case of system logic descriptions, the generic outline helps ensure that all areas of the system are described in a complete, consistent manner and that there is as little overlap as possible in the system's descriptions. Generic outlines and format models help ensure that: &bull; Source material will adhere to a specified format. &bull; Developers can produce better source material with less effort. &bull; Less rewriting is required to convert the source material to final copy. &bull; Less review is required to ensure accuracy of the final copy. &bull; Developers have final-quality information for their own use. &bull; Drafts for review can be produced more quickly and more easily. When a new macro or system component is approved for inclusion in the system, its description is added to the project's internal information data base. The description is modified, if necessary, to fit the required format and is placed in the data base and an entry for it is placed in the data base's table of contents. The description is then available for review, use, and update by all members of the project.
Probabilistic temporal logics for finite and bounded models
Authors: Sergiu Hart, Micha Sharir(
Venue: Proceedings of the sixteenth annual ACM symposium on Theory of computing (1984)

We present two (closely-related) propositional probabilistic temporal logics based on temporal logics of branching time as introduced by Ben-Ari, Pnueli and Manna and by Clarke and Emerson. The first logic, PTLf, is interpreted over finite models, while the second logic, PTLb, which is an extension of the first one, is interpreted over infinite models with transition probabilities bounded away from 0. The logic PTLf allows us to reason about finite-state sequential probabilistic programs, and the logic PTLb allows us to reason about (finite-state) concurrent probabilistic programs, without any explicit reference to the actual values of their state-transition probabilities. A generalization of the tableau method yields exponential-time decision procedures for our logics, and complete axiomatizations of them are given. Several meta-results, including the absence of a finite-model property for PTLb, and the connection between satisfiable formulae of PTLb and finite state concurrent probabilistic programs, are also discussed.
Detection of Roads from Satellite Image Using the Optimal Search
Authors: Yan Rianto, Shozo Kondo, Talguk Kim
Venue: Proceedings of the 10th International Conference on Image Analysis and Processing (1999)

Since networks of main roads are basic information for classification of the use of the earth surface, automatic detection of roads from satellite images is a very important problem. In this paper, a new detection theory is proposed which can overcome drawbacks of current theories and detect plural roads in an image with high speed and high precision. Firstly, a binary image representing edges of a given image is used to evaluate the possibility for a road to pass on each edge pixel. We propose an 8-direction filter, a clearing filter, and a parallel-edge-detection filter, which can compile insufficient local information to obtain global information enough to detect a road. After these filters, the possibility of a road passing on a edge pixel can be effectively evaluated. Secondly, by using the Hough transform and the optimal search method it is possible to detect a complete road. This detection theory does not depend on the size of image and can detect almost all the main roads in an image including intersecting and T-type roads.
Alex: A conversational, hierarchical logic design system
Authors: Keith A. Duke, Klim Maling
Venue: Proceedings of the 17th Design Automation Conference (1980)

A fresh look at the technical problems of present-day logic design and at the principal activities of the logic designer resulted in a system for hierarchical logic design. It is supported by a novel, high-level graphic language to describe the connections between logical devices. A major concern was to ensure that processes invoked by a user while designing, modifying and testing logic normally require only a few seconds or, on rare occasions, a few minutes to execute.
Comments on the administrative/academic interface
Authors: Ronald Anton
Venue: Proceedings of the annual ACM SIGUCCS symposium on The administration and management of small-college computing centers (1972)

Swarthmore College is a small liberal-arts college, located in southeast Pennsylvania. The attitude of the administration towards the computer until just recently was strictly hands-off. If you walked into an office and said, &ldquo;How about putting something on the computer?&rdquo;, they would get up and walk out, or they didn't hear so well that day, or something like that. At present, we are doing a lot of administrative work on the computer, mainly because the vice-president put out a letter that said, &ldquo;Use the computer.&rdquo; That was all there was to it. We are starting to bring in the general ledger and accounting system for the business office, the alumni mailing list, which is about 22,000 names, and probably next month we'll do our first mailing, and numerous other small jobs which fell our lot because Miss SO-AND-SO who's been with the college for fifty years finally retired and nobody knows how to do the work she was doing. We print things like payroll labels, which they used to print by hand once a week on the time cards&mdash;about a three-hour job that we do now in about thirty seconds. Other things are vacation and sick leave, which is a monstrous problem, mainly because nobody else can figure it out, or wants to be in charge of finding the sick leave every month. They blame it on the computer if it's wrong.
Increasing hardware complexity&mdash;a challenge to computer architecture education
Authors: R. Hartenstein
Venue: Proceedings of the 1st annual symposium on Computer architecture (1973)

The paper starts with a survey over history and present-day situation of educational concepts and design methods in computer architecture. Complexity problems, bad design habits, cooperation problems between specialists, as well as their changing range of responsibility are covered, and the consequences of the developmental trends are discussed: now it is time for switching over to an integrated teaching of hardware/software design methods. The HIM scheme (&hbarbelow;ierarchy of &ibarbelow;nterpretive &mbarbelow;odules) is suggested as a conceptual machine organization framework for modelling the implementation of language hierarchies. The application of the HIM scheme for better understanding of semantics, and for a derivation of designing guidelines is discussed.
Analysis of loop transmission systems
Authors: John D. Spragins
Venue: Proceedings of the ACM second symposium on Problems in the optimizations of data communications systems (1971)

A variety of topologies have been used for computer communications systems, including star, multidrop and loop configurations. This paper discusses the results obtained in a theoretical study of loop systems. The type of loop system studied is sketched in Figure la, and consists of one central system (a CPU or system controller) and a number of satellite systems or terminals. Loop adapters connect each system to the loop.
Typesetting in the academic environment
Authors: Wade C. Waldock
Venue: Proceedings of the 10th annual ACM SIGUCCS conference on User services (1982)

The demands for information in machine readable form have grown tremendously in the last decade, and the advent of special processing to handle textual information has proved to be a necessity in many applications. Text processors, designed primarily for document storage and printing, have evolved into machines with full editing and preview capabilities, with add-on technological enhancements such as dictionaries, bibliographies, and arithmetic. Other realizations of text processing include application software written for large mainframe computers, such as SCRIPT from the University of Waterloo and RUNOFF from Digital Equipment Corp. These programs offer word processing in a multi-user environment that best fits the needs of an organization such as a university. These environments allow many users to create, store, and revise their documents simultaneously, increasing the throughput in the input phase.
The complexity of problems in systems of communicating sequential processes (Extended Abstract)
Authors: Richard E. Ladner
Venue: Proceedings of the eleventh annual ACM symposium on Theory of computing (1979)

There is a wide-spread belief among computer scientists that systems of communicating sequential processes are harder to analyze than purely sequential processes. The belief is largely based on the observation that the parallelism in such systems leads to a large number of possible interleavings of the actions of the different processes. We will show that other evidence supporting this belief is that the properties we are trying to analyze about these systems are themselves intrinsically complex. They are properties that make no sense when they are applied to purely sequential processes, or even parallel systems of sequential processes that have no ability to communicate with each other.
Educator's view of structured concepts
Authors: John F. Schrage
Venue: Proceedings of the ACM 1980 annual conference (1980)

Based on a review of textbooks and literature and discussion with information systems educators, the use of structured concepts began to be taught in programming classes in the early 1970s. The classic articles on structured programming and analysis/design, respectively, are the following: &ldquo;Flow Diagrams, Turing Machines, and Languages with Only Two Formation Rules,&rdquo; by Bohm, C. and Jacopini, G. Communications of the ACM, Volume 9, Number 5, pp. 366-371, May 1966. &ldquo;Structured Design,&rdquo; by Stevens, W. P.; Myers, G. J.; and Constantine, L. L. IBM Systems Journal, Volume 13, Number 2, pp. 115-139, 1974.
Use of associative memory techniques in implementation of multivalued logic systems
Authors: Yoh-Han Pao, Jeffrey L. Altmann**
Venue: Proceedings of the sixth international symposium on Multiple-valued logic (1976)

This discussion is concerned with certain aspects of pattern recognition which seemingly have received considerably less attention than many of the other areas. Our present objective is to articulate our understanding of certain areas of pattern recognition which are amenable to a certain amount of vagueness in carrying out &ldquo;recognition&rdquo; In section 2 of this discussion we describe an approach for dealing with this type of pattern recognition. Two illustrations of applications of this method are contained in section 3. Summarizing remarks and discussions of additional promising areas for use of this technique are contained in section 4.
Queueing network models of multimicrocomputer networks
Authors: Daniel A. Reed
Venue: Proceedings of the 1983 ACM SIGMETRICS conference on Measurement and modeling of computer systems (1983)

Recent developments in very large scale integration have made it feasible to construct a highly parallel computer composed of large numbers of interconnected microcomputers. The modeling problems posed by this approach to parallel processing differ in several significant respects from those associated with traditional queueing network models of computer systems. Among them are the size of the models, the varied interconnection network topologies, and algorithm dependent internode communication patterns. We extend queueing theoretic models to include multimicrocomputer networks with primary emphasis on two areas: characterizing interconnection network workloads and finding efficient solution techniques for the resulting models.