ppxscal/embedding_network huggingface dataset:
Applying Genre Analysis to EMS Design: The Example of a Small Accounting Firm
Authors: Pedro Antunes, Carlos J. Costa, João Ferreira Dias
Venue: Proceedings of the Seventh International Workshop on Groupware (2001)

Abstract: The concept of genre has already been used to analyse organizational communication. It has also been recently used to examine persistent conversations and patterns of thinking. It may there be an opportunity to apply the genre perspective to Electronic Meeting Systems (EMS) as well. This paper describes how we analysed meetings using the concept of communication genre and draws several consequences for EMS design. Some of the identified design issues are: (1) the EMS could reflect the organizational orientation towards producing value; (2) EMS may consider the situated nature of work; (3) EMS could support long-term usage; (4) Genres could be incorporated in genre-based EMS to identify decision-making patterns; and (5) Genres shape communication artefacts, accommodating different views and reflecting the genre system that originates them. The paper describes an EMS, based on genres, that we developed to address these design issues. The EMS was developed and used in the context of a small accounting firm. Preliminary results show that the approach contributes to a better fit to organisational needs than traditional EMS.
A Comparison of General Approaches to Multiprocessor Scheduling
Authors: Jing-Chiou Liou, Michael A. Palis
Venue: Proceedings of the 11th International Symposium on Parallel Processing (1997)

The paper demonstrates the effectiveness of the two phase method of scheduling, in which task clustering is performed prior to the actual scheduling process. Task clustering determines the optimal or near optimal number of processors on which to schedule the task graph. In other words, there is never a need to use more processors (even though they are available) than the number of clusters produced by the task clustering algorithm. The paper also indicates that when task clustering is performed prior to scheduling, load balancing (LB) is the preferred approach for cluster merging. LB is fast, easy to implement, and produces significantly better final schedules than communication traffic minimizing (CTM). In summary, the two phase method consisting of task clustering and load balancing is a simple, yet highly effective strategy for scheduling task graphs on distributed memory parallel architectures.
On Bootstrapping Replicated CORBA Applications
Authors: W. Zhao, Louise E. Moser, P. M. Melliar-Smith
Venue: Proceedings of the 26th International Computer Software and Applications Conference on Prolonging Software Life: Development and Redevelopment (2002)

Critical components of a distributed system must be replicated to achieve high availability and fault tolerance. Current fault-tolerant CORBA infrastructures have concentrated on mechanisms for object replication and recovery, while rarely considering practical issues related to the context, i.e., the CORBA middleware within the process in which the object runs. Our study shows that to replicate and recover complex CORBA applications, the behavior of the process that hosts the CORBA objects, in particular, the bootstrapping of an application, must be taken into account. In this paper, we discuss the challenges that arose when bootstrapping CORBA applications in some common scenarios, and we provide strategies to handle such difficulties so that CORBA applications can be rendered fault-tolerant.
Pancake Problems with Restricted Prefix Reversals and some Corresponding Cayley Networks
Authors: Douglas W. Bass, Ivan Hal Sudborough
Venue: Proceedings of the 1998 International Conference on Parallel Processing (1998)

The pancake problem concerns the number of prefix reversals ("flips") needed to sort the elements of an arbitrary permutation, which is the diameter of the n-dimensional Pancake network. We restrict the problem by allowing only a few of the possible n - 1 flips. Let f(i) denote a flip of size i. We consider sets with either O(1) flips or lg n flips, and explore their corresponding Cayley networks, such as: The Subcube(n) network, for n = 2^k, defined by the lg n flips {f(2), f(4), f(8), ..., f(n)}. Subcube(n) is isomorphic to a network obtained from an (n - 1) dimensional hypercube, Q(n - 1), by deleting all but lg n of the edges incident to each of its nodes, has diameter (3n / 2) - 2 (we give an optimum routing algorithm), and hosts Q(n - 1) with nearly optimum dilation. The Triad(n) network, where n is odd and floor(n / 2) mod 4 is not 0, defined by the set of flips {f(floor(n / 2)), f(ceil(n / 2)), f(n)}. Triad(n) has n! nodes and diameter Theta(n lg n). Both the n-dimensional shuffle-exchange and shuffle-exchange permutation networks can be emulated by Triad(n) with constant slowdown.
An Improved Analytical Model for Wormhole Routed Networks with Application to Butterfly Fat-Trees
Authors: Ronald I. Greenberg, Lee Guan
Venue: Proceedings of the international Conference on Parallel Processing (1997)

A performance model for wormhole routed interconnection networks is presented and applied to the butterfly fat-tree network. Experimental results agree very closely over a wide range of load rate. Novel aspects of the model, leading to accurate and simple performance predictions, include (1) use of multiple-server queues, and (2) a general method of correcting queuing results based on Poisson arrivals to apply to wormhole routing. These ideas can also be applied to other networks.
Arithmetic Pattern Generators for Built-In Self-Test
Authors: Albrecht P. Stroele
Venue: Proceedings of the 1996 International Conference on Computer Design, VLSI in Computers and Processors (1996)

Adders, subtracters, ALUs, and multipliers, which are available in many data paths, can be utilized to generate test patterns for built-in self-test. In this paper guidelines for the design of arithmetic pattern generators are developed. Experimental results show that the generated patterns achieve similar fault coverage as pseudo-random sequences and require about the same test length. Hence, instead of adding LFSR-based test registers, arithmetic pattern generators can be used, and performance degradation is avoided.
Theoretical and Practical Aspects of Computer Speech Processing
Authors: Zygmunt Ciota
Venue: Proceedings of the 1st IEEE International Conference on Cognitive Informatics (2002)

Design process of computer speech systems has been presented. Going over the nowadays solutions of neural networks, the systolic structure gives the biggist possibility for smart realization of speech processor. Speech processing system, built generally as software surroundings, occupies an immense memory space. For real-time application it is necessary to combine the existing algorithms. Further increasing of the speed can be also achieved by using hardware-software co-design. The approach presented in this paper, permits to design such effective systems of human voice synthesis and speech identification. Since the spoken language can be very often ambiguous, then it was useful to include fuzzy logic approach and also artificial neural networks, to obtain more effective methods of speech processing.Mixed analog-digital realizations have been also discussed. Practical realizations of current mode building blocks ensure the cheapest realization of CMOS integrated circuits.
Semantic collaborative web caching
Authors: Lionel Brunie, Jean-Marc Pierson, David Coquil
Venue: Proceedings of the 3rd International Conference on Web Information Systems Engineering (2002)

Too much information is no information.When the quantity of data becomes too large, users need help and tools to find their path in the information space.Nowadays, any user can browse through Terabytes of data and more.The difficulty is to find the best way among all possible documents.Our feeling is that a user is not generic and has always some particular interests.Thus, the percentage of relevant documents is small, the time to access these documents must be reduced at most. We propose in this paper a collaborative proxy architecture, close to the user, based on "hot" relevance topics, and the dynamic constuction of virtual communities.In this framework, the temperature of a document or a subject reflects its current interest among a community.We propose and architecture that allows proxies not only to manage efficiently cached documents but also to exchange documents with other proxies.Furthermore, these proxies manage meta-data about their partial views of the information space.We show how such an approach fits to enhance the global efficiency of the Web both in terms of Web content indexing, adding semantic value where raw byte arrays are often considered.
IP Validation for FPGAs using Hardware Object TechnologyTM
Authors: Steve Casselman, John Schewel, Christophe Beaumont
Venue: Proceedings of the 13th International Symposium on Parallel Processing and the 10th Symposium on Parallel and Distributed Processing (1999)

Although verification and simulation tools are always improving, the results they provide remain hard to analyze and interpret. On one hand, verification sticks to the functional description of the circuit, with no timing consideration. On the other hand, simulation runs mainly on subsets of the entire input domain.Furthermore, these tools provide results in a format (e.g. state graphs, bit vectors or signal waves) that remain disconnected from the real output of the application.We introduce in this paper the process of validation applied to digital designs in FPGAs. It allows the designer the ability to test his/her implementation using the real data of the application and providing real results. With such real data, it becomes easier to identify where the error occurs and then to understand it.
TABS - A New Software Framework for Document Image Processing, Analysis, and Understanding
Authors: C. Cracknell, Andy C. Downton, L. Du
Venue: Proceedings of the 4th International Conference on Document Analysis and Recognition (1997)

This paper provides an overview of a new software framework, TABS, which has been designed to support the rapid development of image processing and image analysis systems and components. Compared to other image manipulation software frameworks, TABS has a number of novel features which make it particularly suitable for use in applications where hypotheses rather than single ``hard'' results are generated by system components, and symbolic data are manipulated.
The Quest for Software Components Quality
Authors: Miguel Goulão, Fernando Brito e Abreu
Venue: Proceedings of the 26th International Computer Software and Applications Conference on Prolonging Software Life: Development and Redevelopment (2002)

Component based software development is becoming more generalized, representing a considerable market for the software industry. The perspective of reduced development costs and shorter life cycles acts as a motivation for this expansion. However, several technical issues remain unsolved before software component's industry reaches the maturity exhibited by other component industries. Problems such as the component selection by their integrators, the component catalogs formalization and the uncertain quality of third-party developed components, bring new challenges to the software engineering community. This paper presents an overview of the current research efforts on software components, from a qualityassessment perspective. The emerging of empirical component based software engineering practices, to complement the current research trends with a more effective component's quality and complexity evaluation, is perceived as a research area that will become very active in a near future.
The Defense Manpower Data Center Pay Data Warehouse: Development and Lessons Learned
Authors: Magdi N. Kamel, Tara L. Lutman
Venue: Proceedings of the 13th International Workshop on Database and Expert Systems Applications (2002)

This paper describes the analysis, design, and initial implementation of a data warehouse that reports on DoD military and civilian personnel and pay data for the Defense Manpower Data Center (DMDC). Using database technologies, Computer Aided Software Engineering (CASE) tools, and Query and Reporting Tools, a Pay Data Warehouse was designed and slated forimplementation and integration with an already existing Personnel Data Warehouse.
A New Technique for 3-D Domain Decomposition on Multicomputers which Reduces Message-Passing
Authors: Joseph Gil, Alan S. Wagner
Venue: Proceedings of the 10th International Parallel Processing Symposium (1996)

Algorithms for many geometric and physical algorithms rely on a decomposition of 3-D space. The cubical decomposition that is typically used can lead to costly communication overheads when implemented on multicomputers since each cubical cell is adjacent to, and may interact with, as many as 26 neighbouring cells. We explore an alternate decomposition based on truncated octahedra that, along with other advantages, reduces message passing. The cost of implementing the communication structure resulting from this decomposition on low degree regular communication networks is studied. We show that this structure can be embedded with dilation 2 onto a 3-D mesh. A dilation 3 embedding onto a regular graph is also presented.
Characterizing parallel file-access patterns on a large-scale multiprocessor
Authors: Apratim Purakayastha, Carla Schlatter Ellis, David Kotz, Nils Nieuwejaar, Michael L. Best
Venue: Proceedings of the 9th International Symposium on Parallel Processing (1995)

High-performance parallel file systems are needed to satisfy tremendous I/O requirements of parallel scientific applications. The design of such high-performance parallel file systems depends on a comprehensive understanding of the expected workload, but so far there have been very few usage studies of multiprocessor file systems. This paper is part of the CHARISMA project, which intends to fill this void by measuring real file-system workloads on various production parallel machines. In particular, here we present results from the CM-5 at the National Center for Supercomputing Applications. Our results are unique because we collect information about nearly every individual I/O request from the mix of jobs running on the machine. Analysis of the traces leads to various recommendations for parallel file-system design.
Accurate device modeling techniques for efficient timing simulation of integrated circuits
Authors: Anirudh Devgan
Venue: Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors (1995)

Accuracy of a transient simulator is critically dependent on its device models, and device model evaluation is often a bottleneck in transient simulation performance. This paper presents comprehensive modeling techniques to compute Fast-to-evaluate and Accurate Simplified Transistor (FAST) models for aggressive MOS technologies. These FAST models accurately capture the static and dynamic behavior of the transistor, and lend themselves to efficient transient simulation. Use of FAST models in timing simulator AGES leads to speedups of 1000/spl times/ or more over traditional circuit simulators with little or no loss in circuit timing accuracy.
Memory Hierarchy Synthesis of a Multimedia Embedded Processor
Authors: Steve Fu
Venue: Proceedings of the 1996 International Conference on Computer Design, VLSI in Computers and Processors (1996)

As the disparity between embedded processor and main memory speed widens, and the availability of integration increases, cache hierarchy design plays an increasing role in processor performance. We propose tools for optimizing embedded processor performance under area, latency, and performance constraints. As a case study , we explore the cache design space for an Application Specific Embedded Processor (ASEP) targeted for software MPEG1 and MPEG2 decompression. We find that for cache area allocation of greater than 16$mm^{2}$, the two level on-chip cache achieves the best performance across all three benchmarks. For cache area under 16$mm^{2}$, an on-chip primary cache with a 256KB off-chip secondary cache performs best. With the addition of two prefetching techniques, Stride Prediction Table and Stream Cache, we are able to further reduce the cache area usage by up to 70\% while increasing the performance by up to 17\%. The optimized ASEPs are capable of displaying MPEG1 movies at 30 frames per second with cache area usage as low as 6.8$mm^{2}$.
Knowledge Integration: Its Relation to Organisational Learning, to Knowledge Management (KM) Methods ( e.g. BSC) and to Measuring the Benefits of KM
Authors: Rainer P. Born
Venue: Proceedings of the 13th International Workshop on Database and Expert Systems Applications (2002)

In the sequel I shall argue to consider "knowledge integration" as the successor concept to knowledge management (KM for short). --Why so? If we take up the explication of "implicit knowledge" as one essential ingredient in knowledge management, then it may be clear that the distribution and application of that implicit knowledge in order to solve certain problems and improve the performance etc would be essential to the success of management. [Thetechnical core is the scheme L/R below which is used to externalise and represent tacit/implicit knowledge in a new way -transgressing the limits of experts systems.] But what is really important is that the application of all those technical means [the tools to provide knowledge] has to take into account the situation of the people to apply that kind of knowledge, i. e. the problem is how can one integrate both the explicated knowledge in a system or work and how can one make an appropriate " sense" of the data/information provided (interpret them, give meaning to them). This point links up neatly with ideas proposed by Peter Senge, Brian Arthur and others in a joint workshop by SoL (Society of Organizational Learning) and MacKinsey (in 2001) concerning new forms of leadership and new Economics in general. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
Causality Filters: A Tool for the Online Visualization and Steering of Parallel and Distributed Programs
Authors: Eileen Kraemer
Venue: Proceedings of the 11th International Symposium on Parallel Processing (1997)

Interactive program steering is a promising technique for improving the performance of parallel and distributed applications. Steering decisions are typically based on visual presentations of some subset of the computation's current state, a historical view of the computation's behavior, or views of metrics based on the program's performance. As in any endeavor, good decisions require accurate information. However, the distributed nature of the collection process may result in distortions in the portrayal of the program's execution. These distortions stem from the merging of streams of information from distributed collection points into a single stream without enforcing the ordering relationships that held among the program components that produced the information. An ordering filter placed at the point at which the streams are merged can ensure a valid ordering, leading to more accurate visualizations and better informed steering decisions. In this paper we describe the implementation of such filters in the Falcon interactive steering toolkit, and present a methodology for their specification for automated generation.
Special purpose FPGA for high-speed digital telecommunication systems
Authors: A. Tsutsui, T. Miyazaki, K. Yamada, N. Ohta
Venue: Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors (1995)

A new FPGA (Field Programmable Gate Array) is developed for high-speed digital telecommunication systems. As architecture is based on the fundamental characteristics extracted from an analysis of actual systems. The FPGA has several unique features for realizing high-speed transport data processing. It allows us to build the high-performance components that are frequently used in transport data processing. In addition, its inter-chip connection mechanism enables us to build flexible multi-FPGA modules. Furthermore, we introduce a dedicated CAD system for the FPGA. We design several actual transport processing circuits on the FPGA using the CAD system and evaluate them. Experimental results show that the device has the potential to realize practical systems.
Modal and Guarded Characterisation Theorems over Finite Transition Systems
Authors: Martin Otto
Venue: Proceedings of the 17th Annual IEEE Symposium on Logic in Computer Science (2002)

Characterisation theorems for modal and guarded fragments of first-order logic are explored over finite transition systems. We show that the classical characterisations in terms of semantic invariance under the appropriate forms of bisimulation equivalence can be recovered at the level of finite model theory. The new, more constructive proofs naturallyextend to alternative proofs of the classical variants. The finite model theory version of van Benthem's characterisation of basic modal logic is due to E. Rosen. That proof is simplified and the result slightly strengthened in terms of quantitative bounds. The main theme, however, is a uniform treatment that extends to incorporate universal and inverse modalities and guarded quantification over transition systems. Technically, the present treatment exploits first-order locality in the context of a new finitary construction of locally acyclic bisimilar covers. These serve as graded finite analogues of tree unravellings, giving local control over first-order logic in finite bisimilar companion structures.
A Fuzzy Logic Framework to Improve the Performance and Interpretation of Rule-Based Quality Prediction Models for OO Software
Authors: Houari A. Sahraoui, Mounir A. Boukadoum, Hassan M. Chawiche, Gang Mai, Mohamed Serhani
Venue: Proceedings of the 26th International Computer Software and Applications Conference on Prolonging Software Life: Development and Redevelopment (2002)

Current object-oriented (OO) software systems must satisfy new requirements that include quality aspects. These, contrary to functional requirements, are difficult to determine during the test phase of a project. Predictive and estimation models offer an interesting solution to this problem. This paper describes an original approach to build rule-based predictive models that are based on fuzzy logic and that enhance the performance of classical decision trees. The approach also attempts to bridge the cognitive gap that may exist between the antecedent and the consequent of a rule by turning the latter into a chain of sub rules that account for domain knowledge. The whole framework is evaluated on a set of OO applications.
A rugged scalable parallel system
Authors: Alan L. Smeyne, John R. Nickolls
Venue: Proceedings of the 9th International Symposium on Parallel Processing (1995)

Tremendous strides are being made in the development of applications for scalable, parallel, high performance computing systems. One of the factors limiting further applications has been the lack of small, rugged, embeddable systems to support embedded airborne, shipboard, and landbased installations operating in severe environments. Litton Guidance and Control Systems, together with MasPar Computer Corporation, and supported by the Advanced Research Projects Agency (ARPA), Computer Systems Technology Office (CSTO), are addressing this problem. Together, we are repackaging MasPar's highly successful commercial massively parallel processing system to minimize size and maximize survivability in severe environments. The resulting rugged scalable parallel system is software transparent with the commercial systems.