ppxscal/embedding_network huggingface dataset:
Robust Multi-clue Face Tracking System
Authors: Yujia Cao, Xin Wei, Li Zhao, Riccardo Di Federico
Venue: Proceedings of the 2009 WRI Global Congress on Intelligent Systems - Volume 04 (2009)

In this paper we present a multi-clue face tracking system, based on the combination of a face detector and two independent trackers. The detector, a variant of the Viola-Jones algorithm, is set to generate very low false positive error rate. It initiates the tracking system and updates its state. The trackers, based on 3DRS and optical flow respectively, have been chosen to complement each other in different conditions. The main focus of this work is the integration of the two trackers and the design of a closed loop detector-tracker system, aiming at achieving superior robustness at real-time operation on a PC platform. Tests were carried out to assess the actual performance of the system. With an average of about 95% correct face location rate and no significant false positives, the proposed approach appears to be particularly robust to complex backgrounds, ambient light variation, face orientation and scale changes, partial occlusions, different facial expressions and presence of other unwanted faces.
High-Performance Rekeying Processor Architecture for Group Key Management
Authors: Abdulhadi Shoufan, Sorin A. Huss
Venue: IEEE Transactions on Computers (2009)

Group key management is a critical task in secure multicast applications such as Pay-TV over the Internet. The communication group key must be updated and distributed after every change in the group membership. Many solutions have been proposed in the last years to minimize the cost of this rekeying process on the server side. Most of these solutions are tree-based approaches such as the logical key hierarchy. These approaches suffer from three problems. First, tree-based solutions aim at minimizing rekeying costs only by reducing the number of needed cryptographic operations such as encryption or secure hashing. Second, these solutions do not treat the time-consuming digital signing needed to authenticate rekeying messages. Third, tree-based approaches manage huge amounts of keys by software which compromises security. In this paper, a novel hardware/software architecture is proposed, which optimizes the rekeying performance not only by minimizing the number of cryptographic operations, but also by reducing the execution times of these operations including digital signing with the aid of hardware acceleration. All help-keys are generated, managed, and stored on hardware, which enhances the system security. To keep flexibility, control-intensive tasks such as tree management are performed as software functions on the embedded processor. The presented rekeying processor is designed based on a comprehensive security analysis with the aid of a novel illustration for security threats, requirements, and technical solutions, a so-called Security Y-Diagram. A performance measurement on a prototype implementation shows that the rekeying processor can join and disjoin members much faster than software solutions besides supporting much larger groups.
Enhanced gate induced drain leakage current in HfO2 MOSFETs
Authors: Moshe Gurfinkel, John S. Suehle, Yoram Shapira
Venue: Microelectronic Engineering (2009)

The substrate current of high-@k dielectric MOSFETs has been studied using dc sweep and transient (down to 100@ms per I-V curve) electrical measurements. These measurements reveal trap-assisted substrate current components in addition to the traditional bell-shaped impact ionization current. By separating the transversal and lateral electric field contributions, the gate induced drain leakage (GIDL) is shown to dominate the substrate current at low gate biases. At high gate biases, tunneling of valence band electrons from the bulk to the gate dominates. The results show that the GIDL current is the result of band-to-band tunneling assisted by traps located at the HfO"2/SiO"2 interface and transition layer, and not the result of oxide charging.
Benjamin Wah Wins 2008 Kanai Award
Authors: Bob Ward
Venue: Computer (2009)

Topics covered include the presentation of the 2008 Kanai Award and recent bylaws changes.
Can Neurophysiologic Synchronies Provide a Platform for Adapting Team Performance?
Authors: Ronald H. Stevens, Trysha Galloway, Chris Berka, Marcia Sprang
Venue: Proceedings of the 5th International Conference on Foundations of Augmented Cognition. Neuroergonomics and Operational Neuroscience: Held as Part of HCI International 2009 (2009)

We have explored using neurophysiologic patterns as an approach for developing a deeper understanding of how teams collaborate when solving time-critical, complex real-world problems. Fifteen students solved substance abuse management simulations individually, and then in teams of three while measures of mental workload (WL) and engagement (E) were generated by electroencephalography (EEG). High and low workload and engagement levels were identified at each epoch for each team member and vectors of these measures were clustered by self organizing artificial neural networks. The resulting patterns, termed neurophysiologic synchronies, differed for the five teams reflecting the teams' efficiency. When the neural synchronies were compared across the collaboration, segments were identified where different synchronies were preferentially expressed. This approach may provide an approach for monitoring the quality of team work during complex, real-world and possible one of a kind problem solving, and for adaptively modifying the teamwork flow when optimal synchronies are not frequent.
Cryptanalysis of Tweaked Versions of SMASH and Reparation
Authors: Pierre-Alain Fouque, Jacques Stern, Sébastien Zimmer
Venue: Selected Areas in Cryptography: 15th International Workshop, SAC 2008, Sackville, New Brunswick, Canada, August 14-15, Revised Selected Papers (2009)

In this paper, we study the security of permutation based hash functions, i.e. blockcipher based hash functions with fixed keys. SMASH is such a hash function proposed by Knudsen in 2005 and broken the same year by Pramstaller et al. Here we show that the two tweaked versions, proposed soon after by Knudsen to thwart the attack, can also be attacked in collision in time ${\mathcal O}(n2^{n/3})$. This time complexity can be reduced to ${\mathcal O}(2^{2\sqrt{n}})$ for the first tweak version, which means an attack against SMASH-256 in c·232 for a small constant c. Then, we show that an efficient generalization of SMASH, using two permutations instead of one, can be proved secure against collision in the ideal-cipher model in ¿(2 n/4) queries to the permutations. In order to analyze the tightness of our proof, we devise a non-trivial attack in ${\mathcal O}(2^{3n/8})$ queries. Finally, we also prove that our construction is preimage resistant in ¿(2 n/2) queries, which the best security level that can be reached for 2-permutation based hash functions, as proved in [12].
Vote and Be Heard: Adding Back-Channel Signals to Social Mirrors
Authors: Tony Bergstrom, Karrie Karahalios
Venue: Proceedings of the 12th IFIP TC 13 International Conference on Human-Computer Interaction: Part I (2009)

In face-to-face group situations, social pressure and organizational hierarchy relegate the less outspoken to silence, often resulting in fewer voices, fewer ideas, and groupthink. However, in mediated interaction like email, more people join in the discussion to offer their opinion. With this work, we aim to combine the benefits of mediated communication with the benefits and affordances of face-to-face interaction by adding a mediated back-channel. We describe Conversation Votes, a tabletop system that augments verbal conversation with a shared anonymous back-channel to highlight agreement. We then discuss a study of our design with groups engaged in repeated discussion. Our results show that anonymous visual back-channels provide a medium for the underrepresented voices of a conversation and balances interaction among all participants.
BlueTone: a framework for interacting with public displays using dual-tone multi-frequency through bluetooth
Authors: David Dearman, Khai N. Truong
Venue: Proceedings of the 11th international conference on Ubiquitous computing (2009)

Large information displays are common in public and semi-public spaces but still require rapid and lightweight ways for users to interact with them. We present BlueTone, a framework for developing large display applications which will interpret and react to dual-tone multi-frequency sounds transmitted from mobile phones paired with the display using the Bluetooth headset profile. BlueTone enables text entry, cursor manipulation and menu selection without requiring the installation of any special software on a user's mobile phone.
Integrating Accessibility and Functional Requirements
Authors: Rehema Baguma, Roger G. Stone, Jude T. Lubega, Th. P. Weide
Venue: Proceedings of the 5th International Conference on Universal Access in Human-Computer Interaction. Part III: Applications and Services (2009)

Initial research on Web accessibility was focused on testing completed Web pages. More recently, the focus is moving to integrating accessibility features into coding tools such as Dreamweaver 8 and plugins notably LIFT. Thus accessibility is being considered slightly earlier in the development process. However, the state of Web accessibility is still disappointing even on websites that have followed the guidelines and or used evaluation and coding tools. We are proposing an approach to start considering accessibility much earlier. Our purpose is to address accessibility in the context of what is to be done and who will be participating. In this paper, we present views of Web developers about this approach. We then show (using a case study) how Web developers can elicit accessibility requirements alongside functional requirements and integrate the two to obtain conceptual models with explicit traces of accessibility requirements integrated with functional requirements. Finally we discuss lessons learnt from the case study and common benefits of the approach for Web accessibility and Web projects.
Existence and Design of a Kind of Biorthogonal Vector-Valued Wavelets
Authors: Junqiu Wang, Juanfei Li
Venue: Proceedings of the 2009 International Conference on Environmental Science and Information Application Technology - Volume 03 (2009)

In this article, we develop the vector-valued multiresolution analysis and the biorthogonal vector-valued wavelets. The existence of biorthogonal vector-valued compactly supported wavelets associated with a pair of biorthogonal vector-valued compactly supported scaling functions is studied. A novel method for designing a class of biorthogonal vector-valued finitely supported wavelet functions is proposed by means of multiresolution analysis and time-frequency analysis.
Green Advocate in E-Commerce
Authors: Ying-Lien Lee, Fei-Hui Huang, Sheue-Ling Hwang
Venue: Proceedings of the 13th International Conference on Human-Computer Interaction. Part IV: Interacting in Various Application Domains (2009)

The continuous growth of e-commerce sees waves of information explosion. Online shoppers have to confront with more information than ever when they are making purchasing decisions. Among the tools that try to reduce this burden of information overload, recommender system is one of the widely employed techniques which can be seen in stores such as Amazon.com and iTunes Store. This paper presents an approach of the interaction design of recommender system in the context of green digital products. By cultivating the field of game design, elements that make game fun and engaging are borrowed and applied to the design of the recommender system to motivate shoppers to opt for greener choices. In addition, the idea of Kansei Engineering will be employed in the system to recommend according to the perceived characteristics of products. A framework of such system will be described, along with future extensions of the framework in the realm of e-commerce.
Dynamic program parallelization
Authors: Lorenz Huelsbergen, James R. Larus
Venue: Proceedings of the 1992 ACM conference on LISP and functional programming (1992)

Static program analysis limits the performance improvements possible from compile-time parallelization. Dynamic program parallelization shifts a portion of the analysis from complie-time to run-time, thereby enabling optimizations whose static detection is overly expensive or impossible. Lambda tagging and heap resolution are two new techniques for finding loop and non-loop parallelism in imperative, sequential languages with first-class procedures and destructive heap operations (e.g., ML and Scheme). Lambda tagging annotates procedures during compilation with a tag that describes the side effects that a procedure's application may cause. During program execution, the program refines and examines tags to identify computations that may safely execute in parallel. Heap resolution uses reference counts to dynamically detect potential heap aliases and to coordinate parallel access to shared structures. An implementation of lambda tagging and heap resolution in an optimizing ML compiler for a shared memory parallel computer demonstrates that the overhead incurred by these run-time methods is easily offset by dynamically-exposed parallelism and that non-trivial procedures can be automatically parallelized with these techniques.
On exact specification by examples
Authors: Martin Anthony, Graham Brightwell, Dave Cohen, John Shawe-Taylor
Venue: Proceedings of the fifth annual workshop on Computational learning theory (1992)

Some recent work [7, 14, 15] in computational learning theory has discussed learning in situations where the teacher is helpful, and can choose to present carefully chosen sequences of labelled examples to the learner. We say a function t in a set H of functions (a hypothesis space) defined on a set X is specified by S***X if the only function in H which agrees with t on S is t itself. The specification number &sgr;(t) of t is the least cardinality of such an S. For a general hypothesis space, we show that the specification number of any hypotheis is at least equal to a parameter from [14] known as the testing dimension of H. We investigate in some detail the specification numbers of hypotheses in the set Hn of linearly separable boolean functions: We present general methods for finding upper bounds on &sgr;(t) and we characterise those t which have largest &sgr;(t). We obtain a general lower bound on the number of examples required and we show that for all nested hypotheses, this lower bound is attained. We prove that for any t &egr; Hn, there is exactly one set of examples of minimal cardinality (i.e., of cardinality &sgr;(t)) which specifies t. We then discuss those t &egr; Hn which have limited dependence, in the sense that some of the variables are redundant (i.e., there are irrelevant attributes), giving tight upper and lower bounds on &sgr;(t) for such hypotheses. In the final section of the paper, we address the complexity of computing specification numbers and related parameters.
Trip report: participatory design 90
Authors: Werner Beuschel, Jeanne Pickering
Venue: ACM SIGCHI Bulletin (1990)

The conference was sponsored by CPSR (Computer Professionals for Social Responsibility) and its Workplace Project in Palo Alto and held at the University of Washington in Seattle, March 31 and April 1, 1990. Almost 200 people attended the six invited talks, a panel and ten workshops. It was the first conference of its kind in the United States.
A Characterization of t/s-Diagnosability and Sequential t-Diagnosability in Designs
Authors: J.-K. Lee, J. T. Butler
Venue: IEEE Transactions on Computers (1990)

A multiprocessing system is t/s-diagnosable if all faulty processors can be identified to within s processors, provided there are no more than t faulty processors. A characterization theorem of S. Karunanithi and A.D. Friedman (1979) for t/s-diagnosability in certain special cases of systems called designs is extended to the entire class of D/sub 1,t'/(n) designs. It is shown that for large t, s is approximately t/sup 2//4t'. Furthermore, the minimum number of processors needed to attain a given diagnosability is derived. A multiprocessor system is sequentially t-diagnosable if at least one faulty processor can be identified provided there are no more than t faulty processors. A theorem by F. Preparata, G. Metze, and R. Chien (1967), giving a sufficient condition for sequential t-diagnosability in the single-loop system (a special case of designs), is extended to the entire class of D/sub 1,t'/(n) designs. It is shown that, for large t, approximately t/sup 2//4t' nodes are needed for a D/sub 1,t'/(n) design to be sequentially t-diagnosable.
An examination of strategies for estimating capacity to share among private workstations
Authors: Matt W. Mutka
Venue: ACM SIGSMALL/PC Notes (1992)

The effective management of a cluster of private workstations requires an examination of the characteristics of the usage patterns of workstations. This paper analyzes workstation usage patterns in order to understand opportunities for exploiting idle capacity. Our study is based on traces of user workstation activity in a university environment. It identifies two areas where enhancements can be made. One identified area is the ability of a manager of the shared capacity of a workstation cluster to schedule jobs with deadline constraints. This opportunity is the result of an ability to make good predictions of the time-varying amount of capacity that is available for sharing. A simple prediction strategy is developed which is shown to have only a small amount of error. For the second area of enhancement, we show that it is feasible to allocate partitions of workstations for specific periods. This aids those users who on occasions need exclusive access to several machines. We examine the profile of periods during which exclusive access to partitions can be given, the rate that owners preempt users of partitions, and the distribution of inter-preemption intervals.
On the complexity of computing the homology type of a triangulation
Authors: Bruce Randall Donald, David Renpan Chang
Venue: Proceedings of the 32nd annual symposium on Foundations of computer science (1991)

An algorithm for computing the homology type of a triangulation is analyzed. By triangulation is meant a finite simplicial complex; its homology type is given by its homology groups (with integer coefficients). The algorithm could be used in computer-aided design to tell whether two finite-element meshes or Bezier-spline surfaces are of the same topological type, and whether they can be embedded in R/sup 3/. Homology computation is a pure combinatorial problem of considerable intrinsic interest. While the worst-case bounds obtained for this algorithm are poor, it is argued that many triangulations (in general) and virtually all triangulations in design are very sparse in a particular sense. This sparseness measure is formalized, and a probabilistic analysis of the sparse case is performed to show that the expected running time, of the algorithm is roughly quadratic in the geometric complexity (number of simplices) and linear in the dimension.
Run-Time Parallelization and Scheduling of Loops
Authors: Joel H. Salz, Ravi Mirchandaney, Kay Crowley
Venue: IEEE Transactions on Computers (1991)

The authors study run-time methods to automatically parallelize and schedule iterations of a do loop in certain cases where compile-time information is inadequate. The methods presented involve execution time preprocessing of the loop. At compile-time, these methods set up the framework for performing a loop dependency analysis. At run-time, wavefronts of concurrently executable loop iterations are identified. Using this wavefront information, loop iterations are reordered for increased parallelism. The authors utilize symbolic transformation rules to produce: inspector procedures that perform execution time preprocessing, and executors or transformed versions of source code loop structures. These transformed loop structures carry out the calculations planned in the inspector procedures. The authors present performance results from experiments conducted on the Encore Multimax. These results illustrate that run-time reordering of loop indexes can have a significant impact on performance.
Prefetch unit for vector operations on scalar computers (abstract)
Authors: Ivan Sklenar
Venue: Proceedings of the 19th annual international symposium on Computer architecture (1992)

Current caches are not adequate for vector operations. A new kind of support for vector operations, called prefetch unit, is designed to improve the performance of the scalar (SISD) processors. The prefetch unit can be used for any SISD architecutre and also for many kinds of MIMD architectures. It may run in parallel and asynchronously with other parts of processor. It keeps trace of the history of memory references, and initializes rarely any superfluous prefetches.
A new simultaneous circuit partitioning and chip placement approach based on simulated annealing
Authors: Abhijit Chatterjee, Richard Hartley
Venue: Proceedings of the 27th ACM/IEEE Design Automation Conference (1991)

The problems of circuit partitioning and chip placement have been studied in the past. Given a circuit partitioned into chips, one can optimize the placement of the chips on a printed circuit board with regard to a given cost function. Conversely, given a placement of the chips on the board, one can optimize the partitioning of the circuit into the chips with regard to the same cost function. However, given neither the circuit partitioning nor the chip placement, we are faced with a difficult optimization problem. Our target technology is one in which the chips are unpackaged chips placed on a substrate, analogous to the printed circuit board and interconnected together with high density interconnect to realize a complex system. We propose a new approach in which the circuit is both partitioned and placed simultaneously by a simulated annealing based algorithm. Our approach is seen to yield excellent results in reasonable run times.
Starvation and Critical Race Analyzers for Ada
Authors: G. M. Karam, R. J. A. Buhr
Venue: IEEE Transactions on Software Engineering (1990)

Starvation and critical race analysis tools for Ada designs are described. These tools are part of a temporal analysis toolset that includes an operational specification language, a language interpreter, and a deadlock analyzer for Ada. The starvation analyzer is based on a set-theoretic model of starvation. It uses a proof tree produced by the deadlock analyzer to define the possible computation space of the design. A preprocessing phase of the starvation tool optimizes the analysis so that the resulting analysis is efficient. Unlike livelock analysis in state machines, the starvation analyzer does not require a priori specification of home states to discern liveness. The critical race analysis tool provides semiautomatic proof of critical races by identifying nondeterministic rendezvous (races) from the proof tree generated by the deadlock analyzer, and then assisting the human operator in identifying which of these constitute critical races. Several design examples are used to demonstrate the capabilities of the two analysis methods.
Object-oriented graphics for requirements analysis and logical design
Authors: Donald Firesmith
Venue: ACM SIGAda Ada Letters (1991)

Numerous graphic notations have been proposed during the last 5 years for use during Object-Oriented Requirements Analysis and Logical Design. The following article describes the consistent set of tool-supported object-oriented graphics that are part of ASTS Development Method 2 (ADM_2), a full development cycle method in use on various projects in the United States, Canada, and England.