ppxscal/embedding_network huggingface dataset:
Player adaptive entertainment computing
Authors: Kevin Kok Wai Wong
Venue: Proceedings of the 2nd international conference on Digital interactive media in entertainment and arts (2007)

The entertainment computing industry has experienced exponential growth over the last few years and has also attracted many researchers to the field. This area of the entertainment industry has become a highly competitive area. While in the past, excellent graphics were enough to increase the likelihood of success for such entertainment computing application. In the present climate a high standard of graphics is assumed or expected. Recently, it can be observed a shift to focus on the design of the entertainment media for individual, so as to increase the perceive value. The shift of this focus is similar to the customer relationship management (CRM), the term used in business world. One of the important models in CRM is personalization, which is to provide perceived value to customer when interacting with a business. In entertainment computing industry, the objectives of the designer or developer are quite similar to that of the business, which is to increase the perceive value when interacting with the entertaining media. This is normally done by market research to identify the target group or pre-production concept pitch. In this presentation, we introduce the concept of Player Adaptive Entertainment Computing (PAEC), which is to provide personalized experience for each individual when interacting with the entertainment media. For discussion and illustration of this concept, we narrow our focus on entertainment digital games. Two of the important areas in PAEC are to create specific targeted strategies to cater for individual game player, and also to perform personalization. Personalization in games can be in term of difficulty levels, game resources, emotion, characters, etc. In game design, the first area can be easily identified and addressed in considerably easiness. Normally, during this first stage, the genre of the entertainment game will be determined. However, the second area of personalization is sometime difficult. This is due the differences of players in term of their personality, background, skill and learning ability. The most important part of the PAEC is related to the perceived value from the game player. Normally, the perceived value is directly related to the factors such as fun, challenge, entertaining, and interest level. As individual is difference, personalization becomes the important factor to improve this perceived value. Personalization for PAEC is defined as any set of actions that can tailor the entertainment media experience to a particular user or player. In this presentation, we will touch on two small areas of the PAEC for illustration of the player adaptive ability using Artificial Intelligence. One is related to the personalized difficulty level adjustment and the other one is related to adaptive resource allocation.
Protection of Computer Ideawork Today and Tomorrow
Venue: IEEE Software (1984)

A combination of court developments, legislative solations, and technical solntions are required to afford computer technologists the protection they deserve. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
CellSort: high performance sorting on the cell processor
Authors: Buǧra Gedik, Rajesh R. Bordawekar, Philip S. Yu
Venue: Proceedings of the 33rd international conference on Very large data bases (2007)

In this paper we describe the design and implementation of CellSort - a high performance distributed sort algorithm for the Cell processor. We design CellSort as a distributed bitonic merge with a data-parallel bitonic sorting kernel. In order to best exploit the architecture of the Cell processor and make use of all available forms of parallelism to achieve good scalability, we structure CellSort as a three-tiered sort. The first tier is a SIMD (single-instruction multiple data) optimized bitonic sort, which sorts up to 128KB of items that cat fit into one SPE's (a co-processor on Cell) local store. We design a comprehensive SIMDization scheme that employs data parallelism even for the most fine-grained steps of the bitonic sorting kernel. Our results show that, SIMDized bitonic sorting kernel is vastly superior to other alternatives on the SPE and performs up to 1.7 times faster compared to quick sort on 3.2GHz Intel Xeon. The second tier is an in-core bitonic merge optimized for cross-SPE data transfers via asynchronous DMAs, and sorts enough number of items that can fit into the cumulative space available on the local stores of the participating SPEs. We design data transfer and synchronization patters that minimize serial sections of the code by taking advantage of the high aggregate cross-SPE bandwidth available on Cell. Results show that, in-core bitonic sort scales well on the Cell processor with increasing number of SPEs, and performs up to 10 times faster with 16 SPEs compared to parallel quick sort on dual-3.2 GHz Intel Xeon. The third tier is an out-of-core bitonic merge which sorts large number of items stored in the main memory. Results show that, when properly implemented, distributed out-of-core bitonic sort on Cell can significantly outperform the asymptotically (average case) superior quick sort for large number of memory resident items (up to 4 times faster when sorting 0.5GB of data with 16 SPEs, compared to dual-3.2GHz Intel Xeon).
An on-line interactive method for finding association rules data streams
Authors: Se Jung Shin, Won Suk Lee
Venue: Proceedings of the sixteenth ACM conference on Conference on information and knowledge management (2007)

In order to trace the changes of association rules over an online data stream efficiently, this paper proposes two different methods of generating all association rules directly over the changing set of currently frequent itemsets. While all of the currently frequent itemsets are monitored by the estDec method, all the association rules of every frequent itemset in the prefix tree of the estDec method are generated. For this purpose, a traversal stack is introduced to efficiently enumerate all association rules. These online methods can avoid the drawbacks of the conventional two-step approach. In an on-line environment, a user may be interested in finding those association rules whose antecedents or consequents are fixed to be a specific itemset. Since generating all the association rules may take too long to produce them timely, two additional methods, namely Assoc-X and Assoc-Y, are introduced. Finally, the proposed methods are compared by a series of experiments to identify their various characteristics.
A Framework for the Quantitative Evaluation of Distributed Computer Systems
Authors: M. J. ,  Jr. Gonzalez
Venue: IEEE Transactions on Computers (1980)

Current and anticipated advances in semiconductor technology, in general, and in the area of microcomputers, in particular, will lead to a widespread utilization of distributed computer systems. The advantages of these types of systems have led to numerous design efforts. Most of these efforts have been undertaken in a largely ad hoc manner without any mechanism for the evaluation of design tradeoffs. At the same time it has become apparent that the most desirable evaluation approach must be objective and quantitative in nature. In this document we present a framework by means of which such an evaluation can be undertaken. The elements of the framework are identified and the requirements of each of these elements are given.
Introduction to the Role of Redundancy in Computer Arithmetic
Authors: D. E. Atkins
Venue: Computer (1975)

Redundancy, the state of being in excess of what is necessary, as applied in the implementation of computer arithmetic is motivated by three design goals: to improve reliability, to increase speed of operation, and/or to provide structural flexibility. In achieving the first goal, improvement of reliability, hardware redundancy and/or redundant arithmetic codes are applied to the detection and correction of faults. Although this is an increasingly vital area it will not be discussed in this paper. Rather, the focus will be on the other two potential benefits: more specifically, on the judicious use of number systems employing redundancy in representation. A positional number system with fixed radix, r, is redundant if the allowable digit set includes more than r distinct elements, thereby affording alternate representations of a given numeric value. Uniqueness. of representation is sacrificed with hope of greater gains. A novel, rigorous treatment of redundant, radix polynomial representation is included in Reference 1. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
On Interactive Image Recognition for Human-Machine Interfacing
Authors: Tajmilur Rahman, Al-Amin Ahsan Raja Chowdhury, Al-Amin Bhuiyan
Venue: Proceedings of the 2007 International Conference on Convergence Information Technology (2007)

This paper introduces a new concept for the establishment of human-machine symbiotic relationship through interactive image recognition. The system is based on the implementation of knowledge-based image processing methodologies for intelligent recognition of image and intelligent responding for an autonomous robot or machine. This paper includes two novel contributions of image application; one is image metamorphosis another is Image recognition for intelligent system. Using these two important image applications we have achieved the interactive image recognition for human-machine interfacing. The system is organized with the learning and recognition of images using neural network with back-propagation algorithm. Images have been processed and converted to feature vectors that are compared with the feature vectors of a training set of images. This image recognition system can play a big role over establishing more perfect human-machine interfacing. The proposed system has been tested extensively with a large data set and it performs accuracy of 93.33% on that database. Keywords: Histogram Equalization, Gray-level Transformation, Activation-function Thresholding, Metamorphosis, Neural-Network, Seed-value Interpolation.
A Note on the Interruption of Extended Core Storage Transfers
Authors: M. H. Mxcdougall
Venue: IEEE Transactions on Computers (1972)

In the Control Data 6000 system transfers between central memory and extended core storage may be interrupted through the issuance of an exchange jump by a peripheral processor. Reinitiation of the transfer requires that it be repeated completely rather than resumed at the point of interruption. The transfer process locks out the central processing unit (CPU), so an interrupted trahsfer results in lost CPU time. In this note an estimate of this time loss as a function of interrupt rate, transfer length, and transfer initiation overhead is obtained, as well as an estimate of the transfer length which minimizes lost CPU time.
Full Life-Cycle Support for End-to-End Processes
Authors: Bernhard Steffen, Prakash Narayan
Venue: Computer (2007)

Fully supporting end-to-end processes requires combining service-orientation--which takes an engineering approach to reducing the gap between software requirements and implementation--with model-driven design--which addresses the same problem in terms of well-understood mathematical structures.
A Case for White-box Testing Using Declarative Specifications Poster Abstract
Authors: Danhua Shao, Sarfraz Khurshid, Dewayne E. Perry
Venue: Proceedings of the Testing: Academic and Industrial Conference Practice and Research Techniques - MUTATION (2007)

Software testing, the most commonly used technique for validating the quality of software, is a labor intensive process, and typically accounts for about half the total cost of software development and maintenance. Automating testing not only reduces the cost of producing software but also increases the reliability of modern software. White-box testing and black-box testing are two commonly used techniques that have complementary strengths. White-box testing uses the internal structures (such as control flow or data flow) of programs. Black-box uses an external interface. Automated approaches to black-box testing make extensive use of specifications, e.g., to specify test inputs or test oracles. In unit testing of objectoriented code, preconditions, which define constraints on legal method inputs, and postconditions, which define expected behavior and outputs, form an integral part of specifications.
Application-Specific Topology Design Customization for STNoC
Authors: Gianluca Palermo, Cristina Silvano, Giovanni Mariani, Riccardo Locatelli, Marcello Coppola
Venue: Proceedings of the 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (2007)

Customized network-oriented communication architectures have recently become a must to support high bandwidth SoCs. To this end, a corresponding communication design flow is necessary to support the design space exploration of complex SoCs with tight design constraints. In order to exploit the benefits introduced by the NoC approach for the on-chip communication, the paper presents a Pareto Simulated Annealing (PSA) approach for the customization of the network topology. The proposed PSA approach has been applied to STNoC, the Network on-Chip developed by STMicroelectronics. Starting from the ring topology, the proposed application-specific design flow tries to find a set of customized topologies (optimized in terms of performance and area/energy overhead) by adding custom links up to the spidergon topology.
Transformation of rough set models
Authors: Daowu Pei, Zong-Ben Xu
Venue: Knowledge-Based Systems (2007)

This paper considers transformation of rough set models containing union, intersection, inverse and composition of approximation spaces. As special cases, approximation spaces induced from several kinds of closures of relations are also investigated. The main results given in this paper will be useful to theoretical and practical researches of rough set theory.
K-means Clustering for Multispectral Images Using Floating-Point Divide
Authors: Xiaojun Wang, Miriam Leeser
Venue: Proceedings of the 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (2007)

Many signal processing algorithms can be accelerated using reconfigurable hardware. To achieve a good speedup compared to running software on a general purpose processor, fine-grained control over the bitwidth of each component in the datapath is desired. This goal can be achieved by using NU's variable precision floating-point library. To analyze the usefulness of the floating-point divide unit, we incorporate it into our previous implementation of the Kmeans clustering algorithm applied to multispectral satellite images. With the lack of a floating-point divide hardware implementation, the mean updating step in each iteration of the K-means algorithm had to be moved to the host computer for calculation. The new means calculated on the host then had to be moved back to the FPGA board for the next iteration of the algorithm. This added data transfer overhead between the host and the FPGA board. In this work, we use the new fp div module to implement the mean updating step in FPGA hardware. This greatly reduces the communication overhead between host and FPGA board and further accelerates run time. The Kmeans clustering example illustrates the use of the fp div, fix2float and float2fix modules seamlessly assembled together in a real application. It is the first implementation that has the complete K-means computation done in FPGA hardware. Our results show that the hardware implementation achieves a speedup of over 2150x for core computation time and about 11x for total run time including data transfer time. They also show that the divide in FPGA hardware is 100 times faster than in software. Moreover, implementing divide in the FPGA frees the host to work on other tasks concurrently with K-means clustering, thus providing further speedup by allowing the image analyst to exploit this coarse grained parallelism.
Research on Model Criterion and Mapping of Simulation Computation
Authors: Yunxiang Ling, Bin Zhou, Rui Li, Zhiyong Wang
Venue: Proceedings of the Third International Conference on Natural Computation - Volume 05 (2007)

Methods of natural computation development (such as simulation computation) , have not been completely standard. These concrete problems are as follows: nonstandard state of models, and irregularity of the procedure of model developing. Because of the deficiency of common standard and criterion, the models of simulation systems under "chimney pattern " are repeatedly developed, hard to be interconnected , interacted, and efficient ,leaving total waste of money and efforts. By making the criterions of concept model, component model and federate model (adopting HLA/RTI standard, IEEE1516), this paper focuses on the standardization of the procedure of simulation system development. Different layer's model criterions are the mapping base between different layers that makes the realization of conversion more efficient and convenient. At the same time, these conversion patterns also provide an important function for automatic generation tools: supporting the automatic mapping of different models, which makes development work more efficient and valid.
Staying FIT: efficient load shedding techniques for distributed stream processing
Authors: Nesime Tatbul, Uǧur Çetintemel, Stan Zdonik
Venue: Proceedings of the 33rd international conference on Very large data bases (2007)

In distributed stream processing environments, large numbers of continuous queries are distributed onto multiple servers. When one or more of these servers become overloaded due to bursty data arrival, excessive load needs to be shed in order to preserve low latency for the query results. Because of the load dependencies among the servers, load shedding decisions on these servers must be well-coordinated to achieve end-to-end control on the output quality. In this paper, we model the distributed load shedding problem as a linear optimization problem, for which we propose two alternative solution approaches: a solver-based centralized approach, and a distributed approach based on metadata aggregation and propagation, whose centralized implementation is also available. Both of our solutions are based on generating a series of load shedding plans in advance, to be used under certain input load conditions. We have implemented our techniques as part of the Borealis distributed stream processing system. We present experimental results from our prototype implementation showing the performance of these techniques under different input and query workloads.
Customer Need-Based Design Retrieval Using Fuzzy ARTMAP Neural Network
Authors: Li Yu, Liya Wang
Venue: Proceedings of the Fourth International Conference on Fuzzy Systems and Knowledge Discovery - Volume 02 (2007)

Industrial design is a complex activity. To improve its efficiency, one of the most important tasks is retrieving past design information. This study developed a customer need-based reference design retrieval method to provide engineering designers with easy access to relevant designs and related knowledge. Supervised by the similarity of technical specifications, the method is able to search for reference designs similar to the input customer needs based on fuzzy ARTMAP (FAM) neural network. By adjusting a single FAM parameter, designers can retrieve a proper number of reference designs. Our implementation example shows that the proposed method is an effective design retrieving tool.
An Implementation of an Address Generator Using Hash Memories
Authors: Tsutomu, Munehiro Matsuura
Venue: Proceedings of the 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (2007)

An address generator produces a unique address from 1 to k for the input that matches to one of k registered vectors, and produces 0 for other inputs. This paper presents the super hybrid method to design an address generator. The hash memories realize about 96% of the registered vectors, while the reconfigurable PLA realizes the remaining 4% of the registered vectors. With the super hybrid method, we can implement up to 20 times more registered vectors than the conventional method that uses only logic elements of an FPGA. Experimental results using lists of English words show that the usefulness of the approach.
New Quality Metrics for Object-Oriented Programs
Authors: Dapeng Liu, Shaochun Xu
Venue: Proceedings of the Eighth ACIS International Conference on Software Engineering, Artificial Intelligence, Networking, and Parallel/Distributed Computing - Volume 03 (2007)

Some software metrics can be used to measure the program quality. Coupling metrics, as one type of quality metrics, are used in impact analysis and other maintenance tasks. In this work, we proposed new coupling metrics that measure the method calling relationships between classes. We also conducted experiments on five open-source systems to evaluate the effectiveness of the new measurement. The case study demonstrated that our proposed software metrics can complement the use of existing quality metrics to measure the software systems.
On learning thresholds of parities and unions of rectangles in random walk models
Authors: Sébastien Roch
Venue: Random Structures Algorithms (2007)

In a recent breakthrough, [Bshouty et al., J Comput Syst Sci 71 (2005), 250265] obtained the first passive-learning algorithm for DNFs under the uniform distribution. They showed that DNFs are learnable in the Random Walk and Noise Sensitivity models. We extend their results in several directions. We first show that thresholds of parities, a natural class encompassing DNFs, cannot be learned efficiently in the Noise Sensitivity model using only statistical queries. In contrast, we show that a cyclic version of the Random Walk model allows to learn efficiently polynomially weighted thresholds of parities. We also extend the algorithm of Bshouty et al. to the case of Unions of Rectangles, a natural generalization of DNFs to {0, ,b - 1}n. &copy; 2007 Wiley Periodicals, Inc. Random Struct. Alg., 2007
A proposal for a framework to classify and review contingent information system design methods
Authors: Virginie Goepp, François Kiefer, Roland De Guio
Venue: Computers and Industrial Engineering (2008)

Today, information systems (IS) and related information technologies occupy a prime position in our organizations. However, over 60% of IS projects represent a failure. In this boarder, the contingent and modular design methods, which enable to adapt the steps of the project to the context and to use several method fragments and techniques in a combined manner, seem promising. However, they do not reach expected efficiency since the failure rate remains high. Existing propositions emphasise the description of such methods, but there is no means to understand the underlying logic of integrated contingency approaches. Such means are however essential to help clarifying and analysing existing contingent approaches and to assist researchers in developing more innovative contingent methods. The paper is an attempt to explore some of the issues underlying contingent IS design methods and to propose a framework for their classification. The framework is a 3-dimensional framework which advocates that a contingent design method can be well defined by its contingency level, characterization type and adaptation mode. After reviewing eight existing methods according to the framework, these are analysed and further research directions are highlighted.