ppxscal/embedding_network huggingface dataset:
On-line Signature Verification: Discrimination Emphasised
Authors: Ronny Martens, Luc J. M. Claesen
Venue: Proceedings of the 4th International Conference on Document Analysis and Recognition (1997)

Narrowly seen, this paper presents an on-line signature verification system, based on 3D force patterns and pen inclination angles, as recorded during signing. The feature extraction mechanism is based on the well-known elastic matching technique. In contradiction to previous work in the same area however, we emphasise the importance of the final step in the process: the discrimination based on the extracted features. We show that by choosing the right discrimination approach we are able to improve the quality of the entire verification process drastically. The techniques we compare for discrimination, however, are not specific to signature verification, but should be considered carefully in every process, where a classification decision is made out of a set of parameters.
A High Performance Configurable Storage Manager
Authors: Alexandros Biliris, Euthimios Panagos
Venue: Proceedings of the Eleventh International Conference on Data Engineering (1995)

Presents the architecture of /spl Bscr/eSS (Bell Laboratories Storage System)-a high-performance configurable database storage manager providing key facilities for the fast development of object-oriented, relational or home-grown database management systems. /spl Bscr/eSS is based on a multi-client multi-server architecture offering distributed transaction management facilities and extensible support for persistence. We present some novel aspects of the /spl Bscr/eSS architecture, including a fast object reference technique that allows re-organization of databases without affecting existing references, and two operation modes that an application running on a client or server machine can use to interact with the storage system-(i) copy on access and (ii) shared memory. Subject Terms: storage management; client-server systems; transaction processing; object-oriented databases; distributed databases; relational databases; high-performance configurable database storage manager; BeSS; Bell Laboratories Storage System; object-oriented database management systems; relational database management systems; home-grown database management systems; multi-client multi-server architecture; distributed transaction management facilities; extensible support; persistence; fast object reference technique; database reorganization; operation modes; copy on access; shared memory
A National Clearinghouse Service for B2B Exchanges in the Telecommunications Industry
Authors: Mohammad Moghadam, Chung-Min Chen, Tony Lin, Amjad Umar
Venue: 24th International Computer Software and Applications Conference (2000)

To effectively compete in the competitive telecommunications marketplace, telecommunication service providers need to execute business transactions and exchange business information electronically with each other. This short paper describes Telcordia(tm) Exchange Link, an interconnection clearinghouse that has been developed at Telcordia Technologies specifically to support B2B exchanges in the telecommunications industry.
Constructing the Spanners of Graphs in Parallel
Authors: Weifa Liang, Richard P. Brent
Venue: Proceedings of the 10th International Parallel Processing Symposium (1996)

Given a connected graph G=(V,E) with n vertices, a subgraph G' is an approximate t-spanner of G if, for every u, vV, the distance between u and v in G' is at most f(t) times longer than the distance in G, where f(t) is a polynomial function of t and t = f(t)
PM-PVM: A Portable Multithreaded PVM
Authors: Claudio M. P. Santos, Júlio S. Aude
Venue: Proceedings of the 13th International Symposium on Parallel Processing and the 10th Symposium on Parallel and Distributed Processing (1999)

PM-PVM is a portable implementation of PVM designed to work on SMP architectures supporting multithreading. PM-PVM portability is achieved through the implementation of the PVM functionality on top of a reduced set of parallel programming primitives. Within PM-PVM, PVM tasks are mapped onto threads and the message passing functions are implemented using shared memory. Three implementation approaches of the PVM message passing functions have been adopted. In the first one, a single message copy in memory is shared by all destination tasks. The second one replicates the message for every destination task but requires less synchronization. Finally, the third approach uses a combination of features from the two previous ones. Experimental results comparing the performance of PM-PVM and PVM applications running on a 4-processor Sparcstation 20 under Solaris 2.5 show that PM-PVM can produce execution times up to 54% smaller than PVM.
SMS and Interactivity - Some Results from the Field, and its Implications on Effective Uses of Mobile Technologies in Education
Authors: Andy Stone, Jonathan Briggs, Craig Smith
Venue: Proceedings IEEE International Workshop on Wireless and Mobile Technologies in Education (2002)

This paper reports the results of an experiment undertaken to test the effectiveness of a two-way SMS campaign for a UK youth brand. These results are presented, and considered from the perspective of leveraging these results in an educational technology context. It is proposed that these results and their findings can inform more effective future usage of mobiletechnologies in education.
A Test Framework for CORBA Interoperability
Authors: Mang Li, Ina Schieferdecker, Arno Puder
Venue: Proceedings of the 5th IEEE International Conference on Enterprise Distributed Object Computing (2001)

Abstract: This paper presents a new approach to interoperability testing of CORBA implementations. The ORB Under Test (OUT) is embedded in the test system in such a way, that the behavior of either the client side or the server side of the OUT is controllable and observable. Components of the test system emulate the peer entities of the OUT and the applications based on the OUT, in order to get direct access both to the GIOP interface and to the CORBA APIs. A specification framework for the test system is proposed. It separates the concerns of test data and test behavior to facilitate modularity and dynamic of the test system. The description languages CORBA IDL, ODMG ODL and TTCN-3 are used in the framework.
Dome: Parallel Programming in a Distributed Computing Environment
Authors: Jose Nagib Cotrim Árabe, Adam Beguelin, Bruce Lowekamp, Erik Seligman, Mike Starkey, Peter Stephan
Venue: Proceedings of the 10th International Parallel Processing Symposium (1996)

The Distributed object migration environment (Dome) addresses three major issues of distributed parallel programming: ease of use, load balancing, and fault tolerance. Dome provides process control, data distribution, communication, and synchronization for Dome programs running in a heterogeneous distributed computing environment. The parallel programmer writes a C++ program using Dome objects which are automatically partitioned and distributed over a network of computers. Dome incorporates a load balancing facility that automatically adjusts the mapping of objects to machines at runtime, exhibiting significant performance gains over standard message passing programs executing in an imbalanced system. Dome also provides checkpointing of program state in an architecture independent manner allowing Dome programs to be checkpointed on one architecture and restarted on another.
Formally Modeling a Metal Processing Plant and its Closed Loop Specifications
Authors: Enrico Tronci
Venue: The 4th IEEE International Symposium on High-Assurance Systems Engineering (1999)

We present a case study on automatic synthesis of control software from formal specifications for an industrial automation control system. Our aim is to compare the effectiveness (i.e. design effort and controller quality) of automatic controller synthesis from closed loop formal specifications with that of manual controller design followed by automatic verification. The system to be controlled (plant) models a metal processing facility near Karlsruhe.We succeeded in automatically generating C code implementing a (correct by construction) embedded controller for such a plant from closed loop formal specifications. Our experimental results show that for industrial automation control systems automatic synthesis is a viable and profitable (especially as far as design effort is concerned) alternative to manual design followed by automatic verification.
A Compiler-Directed Cache Coherence Scheme Using Data Prefetching
Authors: Hock-Beng Lim, Pen-Chung Yew
Venue: Proceedings of the 11th International Symposium on Parallel Processing (1997)

Cache coherence enforcement and memory latency reduction and hiding are very important problems in the design of large-scale shared-memory multiprocessors. In this paper, we propose a compiler-directed cache coherence scheme which makes use of data prefetching. The Cache Coherence with Data Prefetching (CCDP) scheme uses compiler analysis techniques to identify potentially-stale data references, which are references to invalid copies of cached data. The key idea of the CCDP scheme is to enforce cache coherence by prefetching the up-to-date data corresponding to these potentially-stale references from the main memory.Application case studies were conducted to gain a quantitative idea of the performance potential of the CCDP scheme on a real system. We applied the CCDP scheme on four benchmark programs from the SPEC CFP95 and CFP92 suites, and executed them on the Cray T3D. The experimental results show that for the programs studied, our scheme provides significant performance improvements by caching shared data and reducing the remote shared-memory access penalty incurred by the programs.
Static Optimality Theorem for External Memory String Access
Authors: Valentina Ciriani, Paolo Ferragina, Fabrizio Luccio, S. Muthukrishnan
Venue: Proceedings of the 43rd Symposium on Foundations of Computer Science (2002)

Data warehouses are increasingly storing and managing large scale string data, and dealing with large volume of transactions that update and search string data. Motivated by this context, we initiate the study of self-adjusting data structures for string dictionary operations, that is, data structures that are designed to be efficient on an entire sequence rather than individual string operations. Furthermore, we study this problem in the external memory modelwhere string data is too massive to be stored in internal memory and has to reside in disks; each access to a disk page fetches B items, and the cost of the operations is the number of pages accessed (I/Os).We show that given a dictionary of n strings S_1 , \ldots ,S_n of total length N, asequence of m string searches S_{i_1 } ,S_{i_2 } , \ldots ,S_{i_m } takes 0(\sum\limits_{j = 1}^m {(\frac{{\left| {S_{i_j } } \right|}}{B}}+ \sum\limits_{i = 1}^n {(n_i } \log _B \frac{m}{{n_i }})) expected I/Os, where ni is the number of times Si is queried. Inserting or deleting a string S takes 0(\frac{{\left| S \right|}}{B} + \log _B n) expected amortized I/Os. The \sum\nolimits_{j = 1}^m \frac{{\left| {S_{i_j } } \right|}}{B} term is a lower bound for reading the input; the \sum\nolimits_{i = 1}^n {n_i } \log _B \frac{m}{{n_i }} term is the entropy of the query sequence and is a standard information-theoretic lower bound. This is the Static Optimality Theorem for external-memory string access. The static optimality theorem was first formalized and proved by Tarjan and Sleator for numerical dictionary in their classic "splay" trees paper in 1985 [16]; they left open the B-tree case for numerical values (page 684), and a fortiori, the case of string data in an external-memory setting, that we settle here. We obtain our result not by using traditional "splay" operations on search trees as in [16], but by designing a novel and conceptually simple self-adjusting data structure based on the well-known skip lists.
COBOL Script: A Business-Oriented Scripting Language
Authors: Tetsuji Imajo, Tatsuki Miyake, Shinobu Sato, Toshiyuki Ito, Daisuke Yokotsuka, Yoshihide Tsujihata, Shunsuke Uemura
Venue: Proceedings of the 4th International conference on Enterprise Distributed Object Computing (2000)

This paper describes COBOL Script, a Web-oriented script language developed by Hitachi. COBOL Script includes the following features: (1) The language specifications, which consist of functions required for Web computing, are a subset of COBOL85, the most frequently used programming language in business information systems. (2) COBOL Script supports decimal arithmetic functions that have the same precision as in standard COBOL85 on mainframe computers. (3) Efficient implementation was based on analysis of the pros and cons of the COBOL processing system. Using COBOL Script, users can: (1) Process applications requiring high precision, such as account-related applications, over the Web. (2) Use a test debugger and a Coverage Function with COBOL Script for large-scale development projects. (3) Use Japanese in programs. (4) Achieve good run-time performance.
A Toolset for Supporting UML Static and Dynamic Model Checking
Authors: Wuwei Shen, Kevin Compton, James Huggins
Venue: Proceedings of the 26th International Computer Software and Applications Conference on Prolonging Software Life: Development and Redevelopment (2002)

The Unified Modeling Language has become widely accepted as a standard in software development. Several tools have been produced to support UML model validation. However, most of them support either static or dynamic model checking; and no tools support to check both static and dynamic aspects of a UML model . But a UML model should include the static and dynamic aspects of a software system. Furthermore, these UML tools translate a UML model into a validation language such as PROMELA. But they have some shortcomings: there is no proof of correctness (with respect to the UML semantics) for these tools. In order to overcome these shortcomings, we present a toolset which can validate both static and dynamic aspects of a model; and this toolset is based on the semantic model using Abstract State Machines. Since the toolset is derived from the semantic model, the toolset is correct with respect to the semantic model.
Verifying the performance of the PCI local bus using symbolic techniques
Authors: Sérgio Vale Aguiar Campos, Edmund M. Clarke, Wilfredo R. Marrero, Marius Minea
Venue: Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors (1995)

Symbolic model checking is a successful technique for checking properties of large finite-state systems. This method has been used to verify a number of real-world hardware designs; however it is not able to determine timing or performance properties directly. Since these properties are extremely important in the design of high-performance systems and in time-critical applications, we have extended model checking techniques to produce timing information. Our results allow a more detailed analysis of a model than is possible with tools that simply determine whether a property is satisfied or not. We present algorithms that determine the exact bounds on the time interval between two specified events and the number of occurrences of another event in such an interval. To demonstrate how our method works, we have modelled the PCI local bus and analyzed its temporal behavior. The results demonstrate the usefulness of our technique in analyzing complex modem designs.
Market Equilibrium via a Primal-Dual-Type Algorithm
Authors: Nikhil R. Devanur, Christos H. Papadimitriou, Amin Saberi, Vijay V. Vazirani
Venue: Proceedings of the 43rd Symposium on Foundations of Computer Science (2002)

Although the study of market equilibria has occupied center stage within Mathematical Economics for over a century, polynomial time algorithms for such questions have so far evaded researchers. We provide the first such algorithm for the linear version of a problem defined by Irving Fisher in 1891. Our algorithm is modeled after Kuhn's primal-dual algorithm for bipartite matching.
Performance and Implementation Aspects of Higher Order Head-of-Line Blocking Switch Boxes
Authors: Michael Jurczyk
Venue: Proceedings of the international Conference on Parallel Processing (1997)

Nonuniform traffic can degrade the overall performance of multistage interconnection networks substantially. This performance degradation was traced back to higher order head-of-line blocking (higher order HOL-blocking) effects within the network in the literature. This paper further elaborates on higher order HOL-blocking networks, on their performance under nonuniform traffic patterns, and on methods on how to efficiently implement switch boxes to construct higher order HOL- blocking networks. An analytical upper bound of the achievable network bandwidth under nonuniform traffic patterns is de- rived and compared to simulation results. Furthermore, it is discussed how central memory buffered switch boxes can be efficiently changed into higher order HOL-blocking switch boxes through only minor changes in the switch box control path. With those switch boxes, high network performance under nonuniform traffic patterns can be achieved with regular hardware effort.
High level profiling based low power synthesis technique
Authors: S. Katkoori, N. Kumar, R. Vemuri
Venue: Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors (1995)

We present a profiling based technique for power estimation. This technique is implemented in the PDSS (Profile Driven Synthesis System) for the synthesis of low power designs. Initially, each module in the module library is characterized for the average switching capacitance per input vector. The input description is simulated using user-specified set of input vectors to collect the profile data for various operators and carriers. The profile data, in conjunction with the pre-characterized module library is used to estimate the total capacitance switched by each of the valid schedules produced by the PDSS scheduler. A valid schedule is one which satisfies other constants such as area and delay. The schedule with the least switching capacitance estimate is further synthesized to the layout level. Results show an average deviation of 12% compared with the actual switching capacitance values at the layout level.
An Improved Algorithm for Performance Optimal Technology Mapping with Retiming in LUT-Based FPGA Desig
Authors: Jason Cong, Chang Wu
Venue: Proceedings of the 1996 International Conference on Computer Design, VLSI in Computers and Processors (1996)

A novel algorithm, named SeqMapII, of technology mapping with retiming for optimal clock period for K-LUT based FPGAs was recently proposed by Pan and Liu. The time complexity of their algorithm, however, is O(K^3 n^4 log (K n^2) log n) for sequential circuits with n gates, which is too high for medium and large size designs in practice. In this paper, we present three strategies to improve the performance of the approach in: 1) efficient label update with single K-cut computation based on the monotone property of labels that we showed for sequential circuits, 2) a novel approach for the K-cut computation in partial flow networks, which are much smaller in practice, 3) SCC (strongly connected component) partition to further speedup the algorithm. In practice, our algorithm works in O(K n^3 log n) time and O(Kn) space according to our experimental results. It is 2x10^4 times faster than SeqMapII-opt for computing optimal solutions and 2 times faster than SeqMapII-heu which uses very small expanded circuits as a heuristic.
The Mentor Project: Steps Toward Enterprise-Wide Workflow Management
Authors: Dirk Wodtke, Jeanine Weißenfels, Gerhard Weikum, Angelika Kotz Dittrich
Venue: Proceedings of the Twelfth International Conference on Data Engineering (1996)

Enterprise-wide workflow management where workflows may span multiple organizational units require particular consideration of scalability, heterogeneity, and availability issues. The Mentor project which is introduced in this paper aims to reconcile a rigorous workflow specification method with a distributed middleware architecture as a step towards enterprise-wide solutions. The project uses the formalism of state and activity charts and a commercial tool, Statemate, for workflow specification. A first prototype of Mentor has been built which allows executing specifications in a distributed manner A major contribution of this paper is the method for transforming a centralized state chart spectfication into a form that is amenable to a distributed execution and to incorporate the necessary synchronization between different processing entities. Fault tolerance issues are addressed by coupling Mentor with the Tuxedo TP monitor.
Mining Mutually Dependent Patterns
Authors: Sheng Ma, Joseph L. Hellerstein
Venue: Proceedings of the 2001 IEEE International Conference on Data Mining (2001)

In some domains, such as isolating problems in computer net-worksand discovering stock market irregularities, there is more interest inpatterns consisting of infrequent, but highly correlated items rather thanpatterns that occur frequently (as defined by minsup, the minimum supportlevel). Herein, we describe the m-pattern, a new pattern that is definedin terms of minp, the minimum probability of mutual dependence of itemsin the pattern. We show that all infrequent m-pattern can be discovered byan efficient algorithm that makes use of: (a) a linear algorithm to qualifyan m-pattern; (b) an effective technique for candidate pruning based on anecessary condition for the presence of an m-pattern; and (c) a level-wisesearch for m-pattern discovery (which is possible because m-patterns aredownward closed). Further, we consider frequent m-patterns, which aredefined in terms of both minp and minsup. Using synthetic data, we studythe scalability of our algorithm. Then, we apply our algorithm to data froma production computer network both to show the m-patterns present andto contrast with frequent patterns. We show that when minp_0, our algorithmis equivalent to finding frequent patterns. However, with a larger minp, our algorithm yields a modest number of highly correlated items, which makes it possible to mine for infrequent but highly correlated item-sets. To date, many actionable m-patterns have been discovered in production systems.
Navegador3D: An Internet Based Flight Simulator of Urban Centers
Authors: M. B. Vieira, Arnaldo de Albuquerque Araújo, S. Philipp-Foliguet, Matthieu Cord, M. Jordan, J. Grillo
Venue: Proceedings of the 15th Brazilian Symposium on Computer Graphics and Image Processing (2002)

Nowadays several areas of application need a precise 3D cartographic model, specially in the urban domain: telecommunications, urbanism, tourism and other ludicrous applications. The analysis of aerial stereoscopic photos provides a fast method to obtain a faithful relief of the observed scene, including its superstructures. This work presents the Navegador3D developed by NPDI/UFMG, ETIS/ENSEA and Vist@erea/INFOSTRATA.