ppxscal/embedding_network huggingface dataset:
The complexity of linear problems in fields
Authors: Volker Weispfenning
Venue: Journal of Symbolic Computation (1988)

We consider linear problems in fields, ordered fields, discretely valued fields (with finite residue field or residue field of characteristic zero) and fields with finitely many independent orderings and discrete valuations. Most of the fields considered will be of characteristic zero. Formally, linear statements about these structures (with parameters) are given by formulas of the respective first-order language, in which all bound variables occur only linearly. We study symbolic algorithms (linear elimination procedures) that reduce linear formulas to linear formulas of a very simple form, i.e. quantifier-free linear formulas, and algorithms (linear decision procedures) that decide whether a given linear sentence holds in all structures of the given class. For all classes of fields considered, we find linear elimination procedures that run in double exponential space and time. As a consequence, we can show that for fields (with one or several discrete valuations), linear statements can be transferred from characteristic zero to prime characteristic p, provided p is double exponential in the length of the statement. (For similar bounds in the non-linear case, see Brown, 1978.) We find corresponding linear decision procedures in the Berman complexity classes @?c@?NSTA(*,2^c^n,dn) for d = 1, 2. In particular, all hese procedures run in exponential space. The technique employed is quantifier elimination via Skolem terms based on Ferrante & Rackoff (1975). Using ideas of Fischer & Rabin (1974), Berman (1977), Furer (1982), we establish lower bounds for these problems showing that our upper bounds are essentially tight. For linear formulas with a bounded number of quantifiers all our algorithms run in polynomial time. For linear formulas of bounded quantifier alternation most of the algorithms run in time 2^O^(^n^^^k^) for fixed k.
Parallel algorithms for super performance
Authors: D. J. Shakshober
Venue: Proceedings of the 1989 ACM/IEEE conference on Supercomputing (1989)

This paper describes the development of parallel algorithms on M31, a large-scale, shared memory multiprocessor VAX computer. Matrix operations have been optimized for a subset of the BLAS, the Basic Linear Algebra Subroutines. Efficient image processing algorithms were also developed for parallel Convolution, Correlation, and Fast Fourier Transforms (non-synchronizing one and two dimensional FFTs). The effect of matrix partitioning was examined using two different memory allocation strategies. We found that contiguous memory partitioning can yield performance gains beyond the linear expectation. Super performance was achieved through a parallel algorithm devised to minimize cache-replacements. Fewer replacements allowed high CPU utilization with minimal system overhead. Inefficient matrix partitioning tended to stifle parallel performance because frequent cache misses created heavy bus traffic and thus increased system overhead.
Invariance of complexity measures for networks with unreliable gates
Authors: Nicholas Pippenger
Venue: Journal of the ACM (JACM) (1989)

A new probabilistic failure model for networks of gates is formulated. Although this model has not been used previously, it supports the proofs of both the positive and negative results appearing in the literature. Furthermore, with respect to this new model, the complexity measures of both size and depth are affected by at most constant multiplicative factors when the set of functions that can be computed by gates is changed from one finite and complete basis to another, or when the bound on the failure probability of the gates is changed (within the limits allowed by the basis), or when the bound on the error probability of the network is changed (within the limits allowed by the basis and the failure probability of the gates).
Random number generators are chaotic
Authors: C. Herring, J. I. Palmore
Venue: ACM SIGPLAN Notices (1989)

We observe that pseudo-random number generators, familiar to all programmers, are examples of deterministic chaotic dynamical systems. We discuss the implications of this finding and compare computer generation of pseudo-random numbers to the theoretical ideal of a (noncomputable) random sequence.
Rule management and evaluation: an active DBMS perspective
Authors: S. Chakravarthy
Venue: ACM SIGMOD Record (1989)

An active database management system is characterized by its ability to monitor and react to both database and nondatabase events in a timely and efficient manner. There have been several attempts at integrating this capability with conventional, passive DBMSs. In fact, this capability has been shown to be pivotal for supporting a variety of database functions in an elegant manner.
Deriving specifications from requirements
Authors: W. L. Johnson
Venue: Proceedings of the 10th international conference on Software engineering (1988)

Specification-based software development makes software easier to validate and maintain. Yet specifications of large systems are themselves large, making understanding and validation difficult. One cause for this problem is that specifications and requirements are kept distinct. This paper describes an approach to specification development in which the specification arises naturally through the requirements analysis process. The emerging specification is developed into a complete system description using formal transformations called high-level editing commands. Automated support for this development process within the Knowledge-Based Specification Assistant will be described. This support involves applying high-level editing commands, assisting in the choice of editing commands, and tracking the effects of these commands.
SMARTGEN: the implementation of an expert system for the generation of digital logic diagnostic tests
Authors: Asad Karim, Stephen A. Szygenda
Venue: Proceedings of the 1st international conference on Industrial and engineering applications of artificial intelligence and expert systems - Volume 1 (1988)

Test generation for digital logic can be traced back as early as 1959, to Eldred [1], although it lacked formalism at that time. Eldred presented the idea of single path sensitization. It didn't take long for the engineering community to come up with circuits, for which Eldred's approach failed to detect all detectable faults. This led to the development of the D-Algorithm for test generation, by P. Roth [2]. The D-Algorithm was based on mathematical foundations and provided a formal approach to test generation. It suggested the classical idea of test generation; namely, a simple search of the test circuit at the gate level.
Decoupling Link Scheduling Constraints in Multi-Hop Packet Radio Networks
Authors: C. G. Prohazka
Venue: IEEE Transactions on Computers (1989)

An aspect of the problem of constructing a minimal length link schedule for a PRN (packet radio network) is examined. Specifically, it is assumed that a PRN of unrestricted topology is given, including a set of users, a set of channels, a set of interference links, a frequency band assignment, and an initial link schedule. It is required that any link schedule satisfies two constraints. The first is the transmission/reception constraint, namely that users cannot transmit and receive simultaneously and cannot transmit/receive more than one packet at a time. The second is the interference-free constraint, namely that no user interferes with any other. It is assumed that the initial link schedule satisfies the transmission/reception constraint, but not necessarily the interference-free constraint. Then it is shown that a simple modification of the initial link is needed to satisfy the latter constraint as well, i.e. the two constraints can be decoupled.
XE design rationale: Clu revisited
Authors: V. Hirvisalo, J. Arkko, J. Kuusela, E. Nuutila, M. Tamminen
Venue: ACM SIGPLAN Notices (1989)

XE is a programming language designed and implemented at the Helsinki University of Technology by the ExBed project. The design of XE is based on the CLU programming language. This paper discusses differences between the two languages and the design decisions of XE.
Application development project support
Authors: G. Chroust
Venue: ACM SIGSOFT Software Engineering Notes (1989)

ADPS (Application Development Project Support), developed in the IBM Vienna Software Development Laboratory, is an environment for the industrial development of application software. Crucial prerequisite for such an environment is the definition of a detailed process of how to proceed (a Process Model) and an appropriate instrumentation via computer support (a Process Mechanism) which not only helps the users to follow the established process but also provides the users with various support functions.This paper puts the Process Model (ADPS/M) and the Process Mechanism (ADPS/P) into the broader context of current software engineering concepts. It explains principles and reasons for the architecture of ADPS.
Software products framework for diagnosing network problems
Authors: Alan MacInnes
Venue: ACM SIGCOMM Computer Communication Review (1988)

This paper presents an overview of major functional components that should be considered for inclusion as part of a network software product. These functional components support the activity of diagnosing problems in the network environment.
CPC (Cyclic Pipeline Computer)-an Architecture Suited for Josephson and Pipelined-Memory Machines
Authors: K. Shimizu, E. Goto, S. Ichikawa
Venue: IEEE Transactions on Computers (1989)

Describes a novel computer architecture, called a cyclic pipeline computer (CPC), which is especially suited for Josephson technologies. Since each Josephson logic device acts as a latch, it is possible to use high-pitch and shallow logic pipelining without any increase in delay time and cost. Hence, both the processor and the main memory can be built from the Josephson devices and can be pipelined with the same pipeline pitch time. The CPC supports multiple instruction/multiple data stream (MIMD) by time-sharing the processor and the main memory among multiple instruction streams. In addition, it employs advanced control to speed up the computation for each instruction stream.
Interactive learning: a multiexpert paradigm for acquiring new knowledge
Authors: Steven R. LeClair
Venue: Issue 108 (April 1989) (1989)

In this paper a paradigm for knowledge acquisition is presented. The paradigm, referred to as Multiexpert Knowledge System (MKS), is based on the philosophy that many decision problems which are candidate expert system applications do not rely on just a single expert for advice but utilize the expertise of many, sometimes conflicting, knowledge sources. Because of the potential for conflict between sources, the contemporary approach to building multiple expert or multiexpert knowledge systems has been to eliminate conflict prior to building the knowledge base. The MKS paradigm accommodates multiple, potentially conflicting experts and uses their expertise in the formulation of new knowledge (rules). These new rules are tested using sequential analysis and organized into a knowledge base by means of an entropy reduction program. Together the MKS paradigm, sequential analysis and entropy reduction are components in the design of an 'interactive' learning expert system which behaves as a 'virtual' expert learning and unlearning new knowledge.
Efficient vector processing on dataflow supercomputer SIGMA-1
Authors: K. Hiraki, S. Sekiguchi, T. Shimada
Venue: Proceedings of the 1988 ACM/IEEE conference on Supercomputing (1988)

Efficiency in vector handling is the key to obtaining high performance in numerical programs. So far, the main defect of dataflow computers is inefficiency in vector processing. We propose structure-flow processing as a new scheme for handling data structures such as vectors in dataflow architecture. The main objective of structure-flow processing is to enhance vector processing performance of a dataflow computer. In this structure-flow processing scheme, the arrival of a data structure unrolls the control structure which processes the data structure itself. A high-level structure is an implementation mechanism of a structure-flow scheme on a practical dataflow computer. Since all the computation is executed by instruction-level dataflow architecture, scalar level parallelism and function level parallelism are also fully utilized by this scheme. The SIGMA-1 architecture that supports high-level structure processing are discussed and the performance is measured. According to the measurement, vector programs can be executed three to four times faster than by unfolding using scalar dataflow processing.
The development of ergonomic standards
Authors: W. Dzida
Venue: ACM SIGCHI Bulletin (1989)

This paper is an attempt to introduce a conception for the development of human factors standards. Most propositions and assertions presented here rely upon experiences made in German standardization groups.The paper provides some assertions concerning the peculiarities of ergonomic standards. Furthermore, some prerequisites are discussed to be envisaged when a standardization committee is going to engender normative propositions. The German standard on ergonomic dialogue design (DIN 66 234, Part 8) is taken as an example for the development of ergonomic standards. The historical background and some problems with the application of the standard are explained thereby contributing to an ongoing discussion about this standard.The paper is intended to reflect a tradition of thought in German standardization committees as well as to contribute to the current debate in the human factors community as well as in the new ISO group (ISO TC 159 / SC4 / WG5: Software Ergonomics an Man-Machine Dialogue).
Approximate spatial reasoning
Authors: Soumitra Dutta
Venue: Proceedings of the 1st international conference on Industrial and engineering applications of artificial intelligence and expert systems - Volume 1 (1988)

It is a truism that much of human reasoning is approximate in nature. Spatial reasoning is an area where humans consistently reason approximately with demonstrably good results. The unique mental processes behind these actions are not well understood. However, it is important that we try to incorporate such approximate reasoning techniques in our computer systems. Approximate spatial reasoning is very important for intelligent mobile agents (e.g., robots), specially for those operating in uncertain or unknown or dynamic domains. In such situations, besides the hazard in the domain, the real constraints (e.g., limited memory and limited time for observations and/or inferencing) faced by agents makes the use of approximate reasoning techniques imperative. In this paper we present a model for approximate spatial reasoning using fuzzy logic to represent the uncertainty in the environment. We develop algorithms to reason about spatial information expressed in the form of approximate linguistic descriptions, very similar to the kind of spatial information processed by humans. We only deal with static spatial reasoning in this paper.
An Analysis of Scatter Decomposition
Authors: David M. Nicol, Joel H. Saltz
Venue: IEEE Transactions on Computers (1990)

A formal analysis of a powerful mapping technique known as scatter decomposition is provided. Scatter decomposition divides an irregular computational domain into a large number of equally sized pieces and distributes them modularly among processors. A probabilistic model of workload in one dimension is used to formally explain why and when scatter decomposition works. The first result is that if a correlation in workload is a convex function of distance, then scattering a more finely decomposed domain yields a lower average processor workload variance. The second result shows that if the workload process is a stationary Gaussian and the correlation function decreases linearly in distance until becoming zero and then remain zero, scattering a more finely decomposed domain yields a lower expected maximum processor workload. It is shown that if the correlation function decreases linearly across the entire domain, then among all mappings that assign an equal number of domain pieces to each processor, scatter decomposition minimizes the average processor workload variance. The dependence of these results on the assumption of decreasing correlation is illustrated with situations where a coarser granularity actually achieves better load balance.
Statistical gravitational lensing on the Mark III hypercube
Authors: J. Apostolakis, C. S. Kochanek
Venue: Proceedings of the third conference on Hypercube concurrent computers and applications - Volume 2 (1989)

We describe a parallel algorithm for the nonlinear optics problem of gravitational lensing. The method is a &ldquo;ray-tracing&rdquo; method which studies the statistical properties of the image population associated with a gravitational lens. A parallel computer is needed because the spatial resolution requirements of the problem make the program too large to run on conventional machines. The program is implemented on the Mark III hypercube to take maximum advantage of this machine's 128 Mbytes of memory. The concurrent implementation uses a scattered domain decomposition and the CrOS III communications routines. The communications in the problem are so irregular that no completely satisfactory implementation was made in terms of the execution time of the program: the maximum speed-up relative to a sequential implementation is a factor of 4 on a 32 node machine. However, the goal of efficiently using all of the Mark III's memory was achieved, and the execution time was not the limiting factor in the problem. If the crystal router were used, the implementation would be much more efficient. Development of the program was terminated at this stage, however, because we were able to extract the physics of interest without the more sophisticated communications routines.
Bounded concurrrent time-stamp systems are constructible
Authors: D. Dolev, N. Shavit
Venue: Proceedings of the twenty-first annual ACM symposium on Theory of computing (1989)

Concurrent time stamping is at the heart of solutions to some of the most fundamental problems in distributed computing. Based on concurrent-time-stamp-systems, elegant and simple solutions to core problems such as &fnof;c&fnof;s-mutual-exclusion, construction of a multi-reader-multi-writer atomic register, probabilistic consensus,&hellip; were developed. Unfortunately, the only known implementation of a concurrent time stamp system has been theoretically unsatisfying, since it requires unbounded size time-stamps, in other words, unbounded memory. Not knowing if bounded concurrent-time-stamp-systems are at all constructible, researchers were led to constructing complicated problem-specific solutions to replace the simple unbounded ones. In this work, for the first time, a bounded implementation of a concurrent-time-stamp-system is presented. It provides a modular unbounded-to-bounded transformation of the simple unbounded solutions to problems such as above. It allows solutions to two formerly open problems, the bounded-probabilistic-consensus problem of Abrahamson [A88] and the &fnof;i&fnof;o-@@@@-exclusion problem of [FLBB85], and a more efficient construction of mrmw atomic registers.
The complexity of the circularity problem for attribute grammars: a note on a counterexample for a simpler construction
Authors: Joost Engelfriet
Venue: ACM SIGACT News (1989)

It is shown in [Dil] that the construction in [Jaz] is incorrect. A correct version of the construction can be found in [EngFil].
Strategies for the Prevention of Communication Deadlocks in Distributed Parallel Programs
Authors: V. C. Barbosa
Venue: IEEE Transactions on Software Engineering (1990)

The occurrence of communication deadlocks caused by the unavailability of message buffers during the execution of distributed parallel programs is investigated. Such deadlocks can occur even if the program is designed for deadlock-freedom, since they are largely dependent on the system's ability to handle message buffering space. A class of deadlock prevention strategies which require that the programmer provide upper bounds on the buffer usage in the several communication channels involved is exploited, and it is argued that such bounds are relatively simple to obtain in many cases. The proposed strategies range from those which require a minimal amount of buffers to those which ensure a reasonable level of concurrency in process execution, although at the expense of more buffering space. It is shown that in general these strategies require the solution of NP-hard optimization problems, and an efficient heuristic to tackle the concurrency-optimal strategy is suggested. Randomly generated systems are then used to show that the heuristic tends to be very successful.
Mode Detection by Relaxation
Authors: A. Touzani, J. G. Postaire
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1988)

A relaxation process is described and applied to the detection of the modes of the underlying probability density function for clustering multidimensional data. When the process is iterated, the label probabilities become very high in the modal region and very low in the valleys, so that mode detection becomes trivial.
Supercomputing of circuits simulation
Authors: Y. Fukui, H. Yoshida, S. Higono
Venue: Proceedings of the 1989 ACM/IEEE conference on Supercomputing (1989)

The Circuit Analysis is very important in the development of LSI. We have been conducting the speed-up of the circuit analysis program SPICE-GT. SPICE-GT is based on the SPICE 2G.6 program from the University of California Berkely. We achieved speed-up by the factor of 300 compared to the original SPICE. In this paper, we discussed the speed-up methods concerning mainly on a computer side of view. There are DC analysis, AC analysis and transient analysis in a circuit analysis, the transient analysis is the most resource consuming step. It can be divided into next three items : (1) computation of circuit matrix, (2) LU decomposition, (3) others (input/output, etc). Because these three items differ in character, we applied different tuning method for each item. Our tuning method are (1) vectorization, (2) multi-tasking(parallel processing), (3) code-generation. The computation of circuit matrix can be executed in parallel, therefore we applied the multi-tasking and the vectorization. The multi-tasking version is about two times faster than the uni-tasking version in elapse time. When we applied the vectorization, the vectorization version is about three times faster than the scalar version in CPU time. Our vectorization method is generalized for the programs that have complicated conditional jump. The computation of LU decomposition can not be executed in parallel, we applied the code-generation method (scalar version, vector version, block elimination version). The code generation is the speed-up method for the linear equations, it is about 100 times faster than FORTRAN version. In input/output, we applied usual tuning method, these methods all together resulted in the speed-up by the factor of about 11 in the circuit analysis.