ppxscal/embedding_network huggingface dataset:
Real World Digital Video
Authors: Pete Shaner
Venue:  (2002)

:Now, virtually anyone with a vision can also have a voice. The formerly formidable barriers to producing highly professional video projects are crumbling as high-quality camcorders and nonlinear editing software become increasingly affordable. And this powerful creative medium is finding its way into the hands of all kinds of people -- company training directors, aspiring fiction moviemakers, independent newshawks, product promotion specialists, documentarians, even home-movie Andy Warhols. What story do you want to tell? Whether you're a professional videomaker, a serious amateur, or an aspiring videographer, you'll find what you need in this comprehensive guide to digital videomaking. Real World Digital Video covers every phase of video production, including buying or renting equipment, capturing professional-quality images and sound, editing footage, adding titles and special effects, and distributing finished video on tape, film, DVD, or streaming over the Internet. The authors, two working filmmakers and teachers, are steeped in both the technology and the craft. Together, they've produced an authoritative, down-to-earth, and totally up-to-date reference.
Protocols and Ports: Reusable Inter-Object Behavior Patterns
Authors: Bran Selic
Venue: Proceedings of the 2nd IEEE International Symposium on Object-Oriented Real-Time Distributed Computing (1999)

In this paper we introduce the concept of protocols. A protocol is a formal specification of potentially complex reusable pattern of inter-object behavior. To make it reusable, a protocol is defined independently of any specific object classes or instances. Even though they are defined independently of individual classes, we demonstrate how, using the notion of two-way interfaces called ports, protocols can be formally bound to structures of collaborating objects.This gives us a framework in which it is possible to formally verify if a particular combination of objects can indeed achieve the desired inter-object behavior. A further advantage is that programs with protocol specifications are more understandable and more maintainable than traditional object-oriented programs since the required high-level behavior is explicit. In the paper, we describe both protocols and ports using the base concepts of the recent Unified Modeling Language (UML) standard.
Analyzing the latency of the Totem multicast protocols
Authors: E. Thomopoulos, L. E. Moser, P. M. Melliar-Smith
Venue: Proceedings of the 6th International Conference on Computer Communications and Networks (1997)

Multicast group communication protocols provide a foundation on which distributed systems can be built. The performance of these protocols is, however, not easy to characterize or to analyze. This research determines probability density functions for the latency to message delivery for the Totem multicast protocols, which provide reliable totally ordered delivery of multicast messages across single and multiple local-area networks (LANs). Totem uses a logical token-passing ring on each LAN with gateways that forward messages selectively between LANs. Comparing the performance of single-ring, two-ring and four-ring networks shows that, with message filtering in the gateways, multiple-ring networks can achieve lower mean latency, less variability in the latency, and shorter tails of the latency distribution than an equivalent single-ring network.
A Current-Mode Folding/Interpolating CMOS Analog to Quaternary Converter Using Binary to Quaternary Encoding Block
Authors: Sung Il Han, Seung Yong Park, Hyeon Kyeong Seong, Heung Soo Kim
Venue: Proceedings of the 32nd International Symposium on Multiple-Valued Logic (2002)

A current-mode folding and interpolating analog toquaternary digital converter (AQC) with binary toquaternary encoder has been proposed in this paper. Acurrent-mode three-level folding amplifier has beenemployed to reduce the number of reference currentsources and a low impedance current-mode approach isadopted. A voltage level converter circuit has beenproposed not only to encode the binary output signal tothe quaternary output signal, but also to enable theproposed AQC to be applied as a starting point device ofthe quaternary logic. Fast settling time and low powerconsumption of the AQC are achieved by utilizing theproposed architecture. The simulation results of thedesigned 4 digit AQC show a sampling rate of 14MHz anda power dissipation of 150mW with a single power supplyof 3.3V for a double poly four metal standard CMOS 0.35 /mu n-well technology.
Novel Circuit Styles for Minimization of Floating Body Effects in Scaled PD-SOI CMOS
Authors: Koushik K. Das, Richard B. Brown
Venue: Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI'03) (2003)

SOI (silicon-on-insulator)technology suffers from anumber of floating body effects,most notably parasiticbipolar and history effects.These are influenced by therapidly increasing gate tunneling current caused by anultra-thin gate oxide,even at scaled VDs [8 ].This paperanalyzes these effects in detail and proposes a number ofnovel circuit styles to minimize them.Simulation resultsare based on model parameters from an AMD 0.25 µmPD-SOI process.
A Framework for Automatic Algorithm Animation
Authors: Yi Lin
Venue:  (1991)

Algorithm animation and data visualization have been shown to help people understand the behavior of algorithms and programs. Different approaches to algorithm animation and data visualization have been tried, but all the existing systems have drawbacks. On one hand, algorithm animation systems can generate nice animations, but users have to modify the original program and code the animation scenes by hand. On the other hand, data visualization systems are more automated, but they do not support smooth illustration of abstract operations and are not sufficiently general and flexible. This research proposes another approach to data visualization and algorithm animation. Through automatic insertion of code, the manual modification of programs is avoided. By analyzing programs at preprocessing time rather than run time, the program being monitored is made more efficient. By putting data objects and image objects into classes, the reusability of the animation methods and the flexibility of the whole system are increased. Finally, by automatically abstracting out high-level operations from low-level ones, high-quality algorithm animation is generated without analyzing the algorithm manually. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
Comparative Assessment of Adaptive Body-Bias SOI Pass-Transistor Logic
Authors: Geun Rae Cho, Tom Chen
Venue: Proceedings of the 4th International Symposium on Quality Electronic Design (2003)

We present a silicon-on-insulator (SOI) pass-transistor logic(PTL) gate with an active body bias control circuit and comparethe proposed PTL gate with other types of PTL gates with differentbody bias circuits in two different 0:13µm SOI CMOStechnologies. The experimental results show that the proposedSOI PTL gate using the body bias controlled technique is superiorin terms of performance and power consumption thanother DTMOS PTL gates.
Performance Analysis of a Synthetic Task Precedence Model with the Control of a Task Scheduling Algorithm
Authors: Yu Gong, Carolyn McCreary, Ian Akyildiz
Venue:  (1992)

In a multiprocessor environment, a sequential program is first divided into various subtasks, and a task precedence relation is computed based upon dependences between these tasks. This relation is represented by a directed acyclic graph (DAG), with the nodes of the DAG corresponding to individual tasks, and the arcs corresponding to restrictions on the order of task execution. In the second phase, a task scheduling algorithm assigns the various tasks of the DAG to individual processors. In this phase, to minimize the total execution time of the DAG, a tradeoff must be made between communication cost, i.e., when related tasks are assigned to different processors, and processing time, i.e., when multiple tasks are assigned to the same processor. Design of task scheduling algorithms has been an active research subject in recent years. The performance of a scheduling algorithm has primarily been evaluated through case studies. The major problem with the case-based investigations is that multiple and exhaustive DAGs must be studied individually, which is often not feasible. This dilemma illustrates the need for studies of a synthetic precedence model, able to capture common properties of all possible precedence relations for a class of programs. In this paper, a synthetic task precedence model with a built-in task scheduling algorithm is developed. From this model, performance measurements are computed analytically, including the mean and variance of completion time, the probability distribution of completion time and speedup. Analytical results are validated with experimental results obtained through extensive simulations.
Comparison between Random and Pseudo-Random Generation for BIST of Delay, Stuck-at and Bridging Faults
Authors: Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel
Venue: Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW) (2000)

The combination of higher quality requirements and sensitivity of high performance circuits to delay defects has led to an increasing emphasis on delay testing of VLSI circuits. As delay, testing using external testers requires expensive ATE; built-in self-test (BIST) is an alternative technique that can significantly reduce the test cost. The generation of test patterns in this case is usually pseudo-random (produced from an LFSR), and it has been proven that Single Input Change (SIC) test sequences are more effective than classical Multiple Input Change (MIC) test sequences when high robust delay fault coverage is targeted. In this paper, we first question the use of a pseudo-random generation to produce effective delay test pairs. We demonstrate that using truly random test pairs (produced from a software generation) to test path delay faults in a given circuit produces higher delay fault coverage than that obtained with pseudo-random test pairs obtained from a classical primitive LFSR. Next, we show that the same conclusion can be drawn when stuck-at or bridging fault coverage is targeted rather delay fault coverage. A modified hardware TPG structure allowing the generation of truly random test patterns is introduced at the end of the paper.
Asynchronous Circuits for Token-Ring Mutual Exclusion
Authors: Alain J. Martin
Venue:  (1990)

No abstract available.
Signaling System # 7, 4 edition
Authors: Travis Russell
Venue:  (2002)

:Originally designed for analog telephone networks, SS7 has continually undergone changes to accommodate the ever-evolving world of telecom. Today, SS7 is used for data, voice, video, audio, and voice-over IP networks -- and no other resource even comes close to providing such a complete understanding of the signaling network, its architecture, and protocols used to communicate through it like Travis Russell's Signaling System #7.
Interprocedural Data Flow Analysis Based on Temporal Specifications
Authors: Arnd Poetzsch-Heffter
Venue:  (1993)

This paper investigates the specification of data flow problems by temporal logic formulas and proves fixpoint analyses correct. Temporal formulas are interpreted w.r.t. programming language semantics given in the framework of evolving algebras. This enables very high-level specifications, in particular for history sensitive problems. E.g. the classical bit vector analyses can be refined by using information about conditions in branches without having to change their specifications. The general semantics framework makes the approach directly applicable to realistic programming languages. We use the specifications to prove fixpoint implementations of data flow analyses correct. As an example, we develop a powerful interprocedural deadness analysis that uses constant information depending on the context where the active procedure was called. By proving such a combination of backward and forward analyses correct, we illustrate the use of specifications in correctness proofs.
Nested Invocation Protocol for Object-Based Systems
Authors: Kenichi Hori, Tomoya Enokido, Makoto Takizawa, Michel Raynal
Venue: Proceedings of the Sixth IEEE International Symposium on Object-Oriented Real-Time Distributed Computing (2003)

We discuss how to invoke a method on multiple object replicas in a quorum-based way. Suppose each instance of a method t on replicas of an object x invokes another methodu on replicas in a quorum of an object y . Here, the method u is redundantly invoked multiple times on some replicas of the object y . If each instance of the method t issues a method u to its own quorum, more number of replicas are manipulated than the quorum number. This is quorum expansion. We discuss a protocol to invoke methods on replicas in a nested manner without the redundant invocation and quorum expansion. We evaluate the protocol on howmany replicas are manipulated and requests are issued.
Sur les fonctions q-Bessel de Jackson
Authors: Changgui Zhang
Venue: Journal of Approximation Theory (2003)

(About Jackson q-Bessel functions)Laplace transform allows to resolve differential equations in the neighborhood of an irregular singular point. The purpose of the article is to study how to apply a basic Borel-Laplace transformation to q-difference equations satisfied by the q-Bessel functions of F.H. Jackson. Connection matrices are obtained between solutions at the origin and solutions at infinity.
Security of Tzeng's Time-Bound Key Assignment Scheme for Access Control in a Hierarchy
Authors: Xun Yi Yiming Ye
Venue: IEEE Transactions on Knowledge and Data Engineering (2003)

Tzeng proposes a time-bound cryptographic key assignment scheme for access control in a partial-order hierarchy. In this paper, we show that Tzeng's scheme is insecure against the collusion attack whereby three users conspire to access some secret class keys that they should not know according to Tzeng's scheme.
Some New Graph Labeling Problems: A Preliminary Report
Authors: Stephen Penrice
Venue:  (1995)

All "labelings" discussed in this paper are vertex labelings. We call a labeling $1$ of $G$ an $N$-labeling if there exists a connected induced subgraph $H$ of $G$ with $\sum_{x \in V(H)}1(x) = i$ for every integer $i$, $1 \leq i \leq N$. Then $\sigma_c(G)$ is the largest integer $N$ such that $G$ has an $N$-labeling. A labeling $1$ of $G$ is called {\em irredundant\/} if, for all connected induced subgraphs $H_1$ and $H_2$, $\sum_{x \in V(H_1)}1(x) = \sum_{x \in V(H_2)}1(x)$ if and only if $H_1 = H_2$. Then $\sigma_p(G)$ is the smallest integer $N$ such that there exists an irredundant labeling $1$ of $G$ with $\sum_{x \in V(G)}1(x) = N$. In this report, we study $\sigma_c(G)$ and $\sigma_p(G)$ in the cases where $G$ is a complete graph minus one edge, a star, a path, or a cycle. We obtain some preliminary results, but there are many interesting questions left open.
Dynamic Service Composition for Wireless Web Access
Authors: Siu-Nam Chuang, Alvin T. S. Chan, Jiannong Cao
Venue: Proceedings of the 2002 International Conference on Parallel Processing (2002)

This paper describes a Web proxy architecture called WebPADS, short for "Web Proxy for Actively Deployable Services." The WebPADS was developed to enhance Web applications running on a wireless network. The WebPADS provides mechanisms to automatically locate and configure a flexible and adaptive wireless Web proxy. In addition, it provides a framework that facilitates the development of add-on services, where the services can be actively deployed and migrated across Web proxies, in order to adapt to the changing wireless environment.
Practical Issues in Implementing Software Reliability Measurement
Authors: Allen P. Nikora
Venue: Proceedings of the 10th International Symposium on Software Reliability Engineering (1999)

Many ways of estimating software systems' reliability, or reliability-related quantities, have been developed over the past several years. Of particular interest are methods that can be used to estimate a software system's reliability or fault content prior to test, or to discriminate between components that are fault-prone and those that are not. In this panel, we discuss practical issues to be addressed in implementing software reliability measurement techniques in a production development environment.
Analyzing Teams of Cooperating Mobile Robots
Authors: Bruce R Donald, James Jennings, Daniela Rus
Venue:  (1994)

In [Don4], we described a manipulation task for cooperating mobile robots that can push large, heavy objects. There, we asked whether explicit local and global communication between the agents can be removed from a family of pushing protocols. In this paper, we answer in the affirmative. We do so by using the general methods of [Don4] analyzing information invariants. We discuss several measures for the information complexity of the task of pushing with cooperating mobile robots, and we present a methodology for creating new manipulation strategies out of existing ones. We develop and analyze synchronous and asynchronous manipulation protocols for a small team of cooperating mobile robots that can push large boxes. The protocols we describe have been implemented in several forms on the Cornell mobile robots in our laboratory.
A Proof Method for the Six-Valued Logic for Incomplete Information
Authors: Seiki Akama
Venue: Proceedings of the 27th International Symposium on Multiple-Valued Logic (1997)

Garcia and Moussavi proposed a six-valued logic to model incomplete information. Although their logic is promising, it lacks a proof theory to serve as a basis for automated reasoning. We describe a sequent style proof method for the logic and show that the consequence relation in the logic is equivalent to the one in Belnap's four-valued logic. We also suggest alternative formal interpretations for the logic.
Caratterizzazione estetica di superfici free-form
Authors: Meirana Maria, De M Teresa
Venue:  (1997)

La modellazione di superfici ai fini della progettazione estetica viene eseguita utilizzando sistemi CAD che rappresentano curfve e superfici sottoforma di B-spline razionali non uniformi (NURBS). EMAIL:: meirana@ima.ge.cnr.it KEYWORDS:: Superfici free-form
A New Multi-Channel MAC Protocol with On-Demand Channel Assignment for Multi-Hop Mobile Ad Hoc Networks
Authors: S.-L. Wu, C.-Y Lin, Y.-C. Tseng, J.-P. Sheu
Venue: Proceedings of the 2000 International Symposium on Parallel Architectures, Algorithms and Networks (2000)

The wireless mobile ad hoc network (MANET) architecture has received a lot of attention recently. This paper considers the access of multiple channels in a MANET with multi-hop communication behavior. We point out several interesting issues when using multiple channels. We then propose a new multi-channel MAC protocol, which is characterized by the following features: (i) it follows an "on-demand" style to assign channels to mobile hosts,(ii) the number of channels required is independent of the network topology and degree, (iii) it flexibly adapts to host mobility and only exchanges few control messages to achieve channel assignment and medium access, and (iv) no clock synchronization is required. Compared toexisting protocols, some assign channels to hosts statically (thus a host will occupy a channel even when it has no intention to transmit)[d, 12, 141, some require a number of channels which is a function of the maximum connectivity[4, 10, 12, 141, and some necessitate a clocksynchronization among all hosts in the MANET[l4, 241. Extensive simulations are conducted to evaluate the proposed protocol.
Mostly-Copying Collection: A Viable Alternative to Conservative Mark-Sweep
Authors: Frederick Smith, Greg Morrisett
Venue:  (1997)

Many high-level language compilers generate C code and then invoke a C compiler to do code generation, register allocation, stack management, and low-level optimization. To date, most of these compilers link the resulting code against a conservative mark-sweep garbage collector in order to reclaim unused memory. We introduce a new collector, MCC, based on mostly-copying collection, and characterize the conditions that favor such a collector over a mark-sweep collector. In particular we demonstrate that mostly-copying collection outperforms conservative mark-sweep under the same conditions that accurate copying collection outperforms accurate mark-sweep: Specifically, MCC meets or exceeds the performance of a mature mark-sweep collector when allocation rates are high, and physical memory is large relative to the live data.
Learning innate face preferences
Authors: James A. Bednar, Risto Miikkulainen
Venue: Neural Computation (2003)

Newborn humans preferentially orient to facelike patterns at birth, but months of experience with faces are required for full face processing abilities to develop. Several models have been proposed for how the interaction of genetic and evironmental influences can explain these data. These models generally assume that the brain areas responsible for newborn orienting responses are not capable of learning and are physically separate from those that later learn from real faces. However, it has been difficult to reconcile these models with recent discoveries of face learning in newborns and young infants. We propose a general mechanism by which genetically specified and environment-driven preferences can coexist in the same visual areas. In particular, newborn face orienting may be the result of prenatal exposure of a learning system to internally generated input patterns, such as those found in PGO waves during REM sleep. Simulating this process with the HLISSOM biological model of the visual system, we demonstrate that the combination of learning and internal patterns is an efficient way to specify and develop circuitry for face perception. This prenatal learning can account for the newborn preferences for schematic and photographic images of faces, providing a computational explanation for how genetic influences interact with experience to construct a complex adaptive system.
Just Enough CRM (Just Enough Series)
Authors: Francoise Tourniaire
Venue:  (2003)

The decision-maker's guide to competitive advantage with CRM Getting real benefits from CRM--fast A complete roadmap for auditing and improving your current CRM processes Best practices for CRM project management and implementation Effective strategies for aligning CRM with the goals of the businessJust Enough CRM gives decision-makers practical insight for planning, designing, and deploying CRM systems that deliver on their promises--and for avoiding the pitfalls that cause so many CRM implementations to fail. Leading CRM consultant Francoise Tourniaire shows how to streamline and improve every phase of the project lifecycle, from needs assessment and vendor selection through metrics, and beyond.Tourniaire offers realistic guidelines and checklists for making sense of vendors' pitches, customizing CRM to your own organization's needs, and guiding the entire implementation process. These techniques apply to any CRM implementation, especially projects at mid-sized companies with $10 to $500 million in revenues--projects all too often neglected in other books.Whether you're a senior executive, line-of-business manager, CRM project manager, or project participant, this book will help you transform the promise of CRM into a quantifiable, sustainable, competitive advantage.