ppxscal/embedding_network huggingface dataset:
An improvement of the projection operator in cylindrical algebraic decomposition
Authors: H. Hong
Venue: Proceedings of the international symposium on Symbolic and algebraic computation (1990)

The Cylindrical Algebraic Decomposition (CAD) method of Collins [5] decomposes r-dimensional Euclidean space into regions over which a given set of polynomials have constant signs. An important component of the CAD method is the projection operation: given a set A of r-variate polynomials, the projection operation produces a set P of (r - 1)-variate polynomials such that a CAD of r-dimensional space for A can be constructed from a CAD of (r-1)-dimensional space for P. In this paper, we present an improvement to the projection operation. By generalizing a lemma on which the proof of the original projection operation is based, we are able to find another projection operation which produces a smaller number of polynomials. Let m be the number of polynomials contained in A, and let n be a bound for the degree of each polynomial in A in the projection variable. The number of polynomials produced by the original projection operation is dominated by m2n3 whereas the number of polynomials produced by our projection operation is dominated by m2n2.
Language issues in the specification and design of composite systems
Authors: M. S. Feather
Venue: ACM SIGPLAN Notices (1989)

Our focus is on the design of composite systems, that is, systems to be realized as the combination of interacting autonomous components. Typically there are some overall goals that the system is intended to achieve, and the components act concurrently, interleaving their actions, to achieve those goals. Since multiple components are involved, they must communicate in order to coordinate their individual activities. We will argue that the design of such a system should progress from a set of requirements for the entire system, and outline features of our specification language, Gist, that make it suited to expressing the stages in such a design process.
ABE: An environment for Engineering Intelligent Systems
Authors: L. D. Erman, J. S. Lark, F. Hayes-Roth
Venue: IEEE Transactions on Software Engineering (1988)

The ABE multilevel architecture for developing intelligent systems addresses the key problems of intelligent systems engineering: large-scale applications and the reuse and integration of software components. ABE defines a virtual machine for module-oriented programming and a cooperative operating system that provides access to the capabilities of that virtual machine. On top of the virtual machine, ABE provides a number of systemdesign and development frameworks, which embody such programming metaphors as control flow, blackboards, and dataflow. These frameworks support the construction of capabilities, including knowledge processing tools, which span a range from primitive modules to skeletal systems. Finally, applications can be built on skeletal systems. In addition, ABE supports the importation of existing software, including both conventional and knowledge processing tools.
Abstract continuations: a mathematical semantics for handling full jumps
Authors: Matthias Felleisen, Mitch Wand, Daniel Friedman, Bruce Duba
Venue: Proceedings of the 1988 ACM conference on LISP and functional programming (1988)

Continuation semantics is the traditional mathematical formalism for specifying the semantics of non-local control operations. Modern Lisp-style languages, however, contain advanced control structures like full functional jumps and control delimiters for which continuation semantics is insufficient. We solve this problem by introducing an abstract domain of rests of computations with appropriate operations. Beyond being useful for the problem at hand, these abstract continuations turn out to have applications in a much broader context, e.g., the explication of parallelism, the modeling of control facilities in parallel languages, and the design of new control structures.
Benchmarks for LAN performance evaluation
Authors: L. Press
Venue: Communications of the ACM (1988)

A technique for quickly benchmarking the performance of local area networks (LANs) is presented. Programs which model both intermittent and constant network activity are given.
Geometry helps in matching
Authors: Pravin Vaidya
Venue: Proceedings of the twentieth annual ACM symposium on Theory of computing (1988)

A set of 2n points on the plane induces a complete weighted undirected graph as follows: The points are the vertices of the graph and the weight of an edge between any two points is the distance between the points under some metric. We study the problem of finding a minimum weight complete matching (MWCM) in such a graph. We give an &Ogr;(n23 (logn)4) algorithm for finding an MWCM in such a graph, for the L1 (manhattan), the L2 (euclidean), and the L&infin; metrics. We also study the bipartite version of the problem, where half the points are painted with one color and the other half are painted with another color, and the restriction is that a point of one color may be matched only to a point of another color. We present an &Ogr;(n2.5 logn) algorithm for the bipartite version, for the L1, L2, and L&infin;, metrics. The running time for the bipartite version can be further improved to &Ogr;(n2 (logn)3) for the L1 and L&infin; metrics.
Motion Field and Optical Flow: Qualitative Properties
Authors: A. Verri, T. Poggio
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1989)

It is shown that the motion field the 2-D vector field which is the perspective projection on the image plane of the 3-D velocity field of a moving scene, and the optical flow, defined as the estimate of the motion field which can be derived from the first-order variation of the image brightness pattern, are in general different, unless special conditions are satisfied. Therefore, dense optical flow is often ill-suited for computing structure from motion and for reconstructing the 3-D velocity field by algorithms which require a locally accurate estimate of the motion field. A different use of the optical flow is suggested. It is shown that the (smoothed) optical flow and the motion field can be interpreted as vector fields tangent to flows of planar dynamical systems. Stable qualitative properties of the motion field, which give useful informations about the 3-D velocity field and the 3-D structure of the scene, usually can be obtained from the optical flow. The idea is supported by results from the theory of structural stability of dynamical systems.
Systolic Architectures for the Computation of the Discrete Hartley and the Discrete Cosine Transforms Based on Prime Factor Decomposition
Authors: Chaitali Chakrabarti, Joseph JáJá
Venue: IEEE Transactions on Computers (1990)

Two-dimensional systolic array implementations for computing the discrete Hartley transform (DHT) and the discrete cosine transform (DCT) when the transform size N is decomposable into mutually prime factors are proposed. The existing two-dimensional formulations for DHT and DCT are modified, and the corresponding algorithms are mapped into two-dimensional systolic arrays. The resulting architecture is fully pipelined with no control units. The hardware design is based on bit serial left to right MSB (most significant bit) to LSB (least significant bit) binary arithmetic.
Gate matrix layout synthesis with two-dimensional folding
Authors: I. Lin, D. H. C. Du, S. H. C. Yen
Venue: Proceedings of the 26th ACM/IEEE Design Automation Conference (1989)

We have developed a gate matrix layout synthesis tool which utilizes folding technique on both rows and columns. The conventional interval graph model and the recently proposed dynamic net-list representation can not fully depict circuit schematics such as inter-net connections. The incomplete representations may mislead the search process for an optimal solution during the layout partitioning and the gate ordering phases. We propose a new graph-based model called hierarchical dynamic net-list to improve the schematic representation. Based on the new model, the folded layout area in the partitioning phase can be more accurately estimated. The new gate ordering algorithm proposed by us also takes the advantages of the hierarchical dynamic net-list model to handle the gate placement in the folded layouts. The experimental results show 12% to 15% improvement in layout area for small circuits and 30% improvement for a large circuit.
A Group-Theoretic Model for Symmetric Interconnection Networks
Authors: S. B. Akers, B. Krishnamurthy
Venue: IEEE Transactions on Computers (1989)

The authors develop a formal group-theoretic model, called the Cayley graph model, for designing, analyzing, and improving such networks. They show that this model is universal and demonstrate how interconnection networks can be concisely represented in this model. It is shown that this model enables the authors to design networks based on representations of finite groups. They can then analyze these networks by interpreting the group-theoretic structure graph theoretically, Using these ideas, and motivated by certain well-known combinatorial problems, they develop two classes of networks called star graphs and pancake graphs. These networks are shown to have better performance than previous networks.
Automatic parallelization of APL-style programs
Authors: Wai-Mee Ching
Venue: ACM SIGAPL APL Quote Quad (1990)

APL-style programs use high level primitives on arrays instead of DO-loops whenever possible. For such programs, the average size of a basic blocks is much large than those in their FORTRAN counterparts. Hence, it is sufficiently profitable and relative easy to concentrate on basic blocks when parallelizing APL-style programs. But such an approach must depend on an APL compiler. The APL/370 compiler we have been developing aims at implementing automatic parallelization of APL programs at basic block level. The compiler exploits functional parallelism on data independent sub-expressions and data parallelism of array primitives on array elements. The compiler front end does a local data dependency analysis and emits synchronization flags at function nodes. The back end does partitioning of (assembly code) array loop. A set of low-level synchronization primitives on MVS has also been developed. This will enable us to run compiled applications in parallel mode on IBM 3090 multi-processors to access the effectiveness of various scheduling methods on a shared memory model.
Algorithm 671: FARB-E-2D: fill area with bicubics on rectangles&mdash;a contour plot program
Authors: A. Preusser
Venue: ACM Transactions on Mathematical Software (TOMS) (1989)

An algorithm plotting contour lines for discrete values zij, given at the nodes of a rectangular mesh is described. A bicubic Hermite polynomial f(x, y) is determined for every rectangle of the mesh, interpolating the zij and the derivatives zx, zy, and zxy. The derivatives are optionally computed by the algorithm. The contours found are normally smooth curves. They consist of polygons approximating intersections with the bicubics. It is possible to fill the areas between them with certain colors or patterns. This is done with a piecewise technique rectangle by rectangle. The method for finding the points of the polygons is shortly reviewed, and some numerical problems are pointed out. The algorithm has a flexible, easy-to-use interface and is easily installed with all plotting systems, provided that a fill-area command is available. A GKS interface may be used.
Topological analysis of local-area internetworks
Authors: G. Trewitt
Venue: Symposium proceedings on Communications architectures and protocols (1988)

It has become common to connect local-area networks together to form high-bandwidth internetworks. The topology of such an internetwork &mdash; how the component networks and gateways are interconnected &mdash; is an important factor in determining the reliability of the internet. We present several techniques for analyzing an internetwork's topology. These techniques are based on a novel mapping of network components onto a bipartite graph. We use these techniques to analyze the topology of the Stanford University Network and the impact of topological changes as it has grown to its current size of 60 networks.
Size-time complexity of Boolean networks for prefix computations
Authors: G. Bilardi, F. P. Preparata
Venue: Journal of the ACM (JACM) (1989)

The prefix problem consists of computing all the products x0x1 &hellip; xj (j = 0, &hellip; , N - 1), given a sequence x = (x0, x1, &hellip; , xN-1) of elements in a semigroup. In this paper we completely characterize the size-time complexity of computing prefixes with Boolean networks, which are synchronized interconnections of Boolean gates and one-bit storage devices. This complexity crucially depends upon two properties of the underlying semigroup, which we call cycle-freedom (no cycle of length greater than one in the Cayley graph of the semigroup), and memory-induciveness (arbitrarily long products of semigroup elements are true functions of all their factors). A nontrivial characterization is given of non-memory-inducive semigroups as those whose recurrent subsemigroup (formed by the elements with self-loops in the Cayley graph) is the direct product of a left-zero semigroup and a right-zero semigroup. Denoting by S and T size and computation time, respectively, we have S = &THgr;((N/T)log(N/T)) for memory-inducive non-cycle-free semigroups, and S = &THgr;(N/T) for all other semigroups. We have T &egr; [&OHgr;(log N), &Ogr;(N)] for all semigroups, with the exception of those whose recurrent subsemigroup is a right-zero semigroup, for which T &egr; [&OHgr;(1), &Ogr;(N)]. The preceding results are also extended to the VLSI model of computation. Area-time optimal circuits are obtained for both boundary and nonboundary I/O protocols.
A manager/controller for the software development process
Authors: C. A. Fritsch, D. L. Perry
Venue: Proceedings of the 4th international software process workshop on Representing and enacting the software process (1988)

Enhanced management and control of the product realization process is required by today's marketplace. We propose a computer aided facility for such an enhanced realization of switching system products that are largely software based. This facility, called the Manager/Controller, is based on a three layer architecture which consists of a process description layer which reads and writes to a product definition (information) layer and is managed by a control layer that has both broad and detailed knowledge of the realization activity. In this paper, we will sketch the characteristics of processes that we must control and outline the nature of the Manager/Controller.
Programming ecology or APL and the world at large
Authors: Jim Lucas
Venue: ACM SIGAPL APL Quote Quad (1990)

APL, like any programming language, interacts with various environments and individuals. How it does so and how it evolves in response to these external influences are important to the continuing health and survival of the language. It can also have a profound effect on the evolution of these same environments and individuals, since APL is a part of their universe, just as they are part of its universe. This paper examines the demands and opportunities of interacting with these external influences and the means by which APL has tried to deal with them as a set of mutually interdependent systems, i.e., an ecology. It also proposes some future evolutionary directions for APL which should not only insure its survival but gain it a dominant position in the programming ecology. Not the least conclusion is that APL must be responsible for its own success.
Influence of Visual Technology on the Evolution of Language Environments
Authors: A. L. Amber, M. M. Burnett
Venue: Computer (1989)

The increasing influence of visual technology on language environments that has resulted from the increasing availability of workstations is discussed. An evolution that began with the relatively straightforward translation of textual techniques into corresponding visual techniques and has progressed to uses of visual techniques that have no natural parallel using purely textural techniques is traced. Visual user interfaces, visual editing, and visual languages are surveyed.
Security auditing - fear of detection -vs- fear of detecting
Authors: B. Neugent
Venue: ACM SIGSAC Review (1989)

It's amazing how far technology has come since the invention of the Frankenstein monster. Not long ago I read about a prototype of a new kind of secure personal computer (PC). This machine was so secure that, for one user, it could generate 135 million bytes of audit data per day. My first reaction on reading this was to think that any actual information hidden in that audit data would certainly be secure.
Data compression with finite windows
Authors: E. R. Fiala, D. H. Greene
Venue: Communications of the ACM (1989)

Several methods are presented for adaptive, invertible data compression in the style of Lempel's and Ziv's first textual substitution proposal. For the first two methods, the article describes modifications of McCreight's suffix tree data structure that support cyclic maintenance of a window on the most recent source characters. A percolating update is used to keep node positions within the window, and the updating process is shown to have constant amortized cost. Other methods explore the tradeoffs between compression time, expansion time, data structure size, and amount of compression achieved. The article includes a graph-theoretic analysis of the compression penalty incurred by our codeword selection policy in comparison with an optimal policy, and it includes empirical studies of the performance of various adaptive compressors from the literature.
Object oriented toolkits for simulation program generators
Authors: O. M. Ulgen, T. Thomasma, Y. Mao
Venue: Proceedings of the 21st conference on Winter simulation (1989)

Simulation Program Generators (SPGs) developed using object-oriented environments may be designed to have a number of capabilities not available in traditional SPGs. One such capability is the description of an object's behavior from scratch without any programming when such behavior does not exist in the knowledgebase of the SPG. SmarterSim is an SPG that is currently being developed to provide the user a number of object-oriented tools including libraries of elemental operations, actions/requests, states, and rules and a number of function block templates to create new behavior using the existing primitive elements. The behavior of objects in a robotic manufacturing cell is described using SmarterSim. Like its predecessor SmartSim, SmarterSim supports a hierarchical, modular modeling for building of subsystems (coupled models) from model objects (atomic models) using subsystem management features. The paper also discusses the use of object oriented environments for traditional SPGs and simulation programming languages.
Charting the course of a user survey that will rock the boat
Authors: Sue Stager
Venue: Proceedings of the 16th annual ACM SIGUCCS Conference on User Services (1988)

What shall we do with the user survey? What shall we do with the user survey? What shall we do with the user survey? Early in the morning? Thoughts of an upcoming annual user survey should produce neither shudders nor (worse yet) yawns from your computer center staff. Granted, most service organizations toss responsibility for the user survey around like a hot potato because the potential to &ldquo;get burned&rdquo; is real. But there are strategies for increasing the likelihood that you'll not just survive the survey experience in an academic computing environment, but actually benefit from it. Whether done poorly or proficiently, the user survey is a monumental task. It's just common sense, therefore, that if having a greater understanding of your services won't make a difference in how you deliver those services or if you don't have any burning questions about services that need answering, then you shouldn't bother with a user survey. You'll be doing both the campus and yourself a favor. I've put together a list of simple rules for computer user surveys that will hopefully, as the title claims, chart a course that leads to a survey that will produce changes in the way you deliver services. In an attempt to adhere to the nautical theme of the conference, I've couched these user survey rules in terms of safety rules for boating and canoeing that I found in my Girl Scout Handbook (copyright 1955). If that sounds particularly boring to you, consider that most writers couch guidelines for user surveys in the language of statistical inference and hypothesis testing, so anything is an improvement to my way of thinking. Actually, it really took very little imagination on my part to translate the simple Girl Scout boating rules into guidelines for computer center user surveys. For instance, the gem &ldquo;Stay ashore in bad weather&rdquo; translate very nicely into this user survey guideline: &ldquo;Never administer your user survey immediately after a thunderstorm that resulted in a two week power failure in which all systems were down and a massive loss of user files occurred.&rdquo;
A dynamic storage scheme for conflict-free vector access
Authors: D. T. Harper, D. A. Linebarger
Venue: ACM SIGARCH Computer Architecture News (1989)

Previous investigations into data storage schemes have focused on finding a storage scheme that permits conflict-free access for a set of frequently encountered access patterns. This paper considers an alternative approach. Rather than forcing a single storage scheme to be used for all access patterns, conflict-free accesses of any constant stride can be made by selecting a storage scheme for each vector based on the accessing patterns used with that vector. By factoring the stride into two components, one a power of 2 and the other relatively prime to 2, a storage scheme can be synthesized which allows conflict-free access to the vector using the specified stride. All such schemes are based on a variation of the row rotation mechanism proposed by Budnik and Kuck[1]. Each storage scheme is based on two parameters, one describes the type of rotation to perform and the other describes the amount of memory to be rotated as a single block. Hardware required to implement this storage scheme is efficient. The performance of the memory under access strides other than the stride used to specify the storage scheme is also considered. This models a vector being accessed with multiple strides, in particular the row/column access of a matrix, and situations when the stride can not be determined prior to initializing the vector. Simulation results show that if a single buffer is added to each memory port then the average performance of the dynamic scheme surpasses that of the interleaved scheme for arbitrary stride accesses. For dynamic storage schemes to be effective, the compiler must be able to detect information about the stride of vector accesses. In general, this is within the capabilities of current vectorizing compilers. Dynamic storage schemes also may allow more flexibility in program transformation performed by vectorizing compilers during optimization.