ppxscal/embedding_network huggingface dataset:
OOCE: Object-Oriented Communication Engine for SoC Design
Authors: Jesus Barba, Fernando Rincon, Francisco Moya, Felix J. Villanueva, David Villa, Julio Dondo, Juan C. Lopez
Venue: Proceedings of the 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (2007)

For decades, software middlewares have tackled with the heterogeneity and interconnectivity roblems in computer networks with success. These problems are recurrent in the design of complex systems-on chip with a large number of components of different nature (including SW and HW modules). In this paper we present an objectoriented communication engine (OOCE) based on the architectural concepts used in software middlewares that unifies the inter-communication interface for both HW and SW elements. The infrastructure provided by the OOCE introduces a low-overhead abstraction layer that can be easily used to implement several parallel programming models. An implementation of this approach has been made for the Xilinx-V2Pro platform.
Interaction paradigms in technology-enhanced social spaces: a case study in museums
Authors: Franca Garzotto, Francesca Rizzo
Venue: Proceedings of the 2007 conference on Designing pleasurable products and interfaces (2007)

This paper investigates, through a case study, the interaction paradigms that can be adopted in a museum exhibition involving hybrid interactive artifacts, i.e., installations that support visitors manipulating and interacting with physical and digital exhibits [6], [1]. We discuss the design principles and solutions we adopted in a temporary exhibition titled "The Fire and The Mountain", where we integrated technological and physical artifacts within a multi-sensory exhibition space to foster enjoyment, engagement, and, ultimately, learning, and to promote a variety of social behaviors among visitors interacting together and with hybrid exhibits. We also discuss a field study we carried on to evaluate the user experience in "The Fire and the Mountain", and the lessons we learnt.
Directions and Issues in Architecture and Language
Authors: M. J. Flynn
Venue: Computer (1980)

Traditional architectures are based on technological premises that are no longer valid. The new " ground rules" make possible new relationships between architecture and language.
Note: A note on binary matroid with no M(K3,3)-minor
Authors: Xiangqian Zhou
Venue: Journal of Combinatorial Theory Series B (2008)

We prove that if M is an internally 4-connected binary matroid with an M(K"5)-minor and with no M(K"3","3)-minor, then either M has rank 4, or M is isomorphic to one of the following matroids: T"1"2, T"1"2/e, T"1"1@?, T"1"2@?, and T"1"3@?.
CASTOR: A Distributed Storage Resource Facility for High Performance Data Processing at CERN
Authors: Giuseppe Lo Presti, Olof Barring, Alasdair Earl, Rosa Maria Garcia Rioja, Sebastien Ponce, Giulia Taurelli, Dennis Waldron, Miguel Coelho Dos Santos
Venue: Proceedings of the 24th IEEE Conference on Mass Storage Systems and Technologies (2007)

Mass storage systems at CERN have evolved over time to meet growing requirements, in terms of both scalability and fault resiliency. The CERN Advanced STORage system (CASTOR) and its new disk cache management layer (CASTOR2) have been developed to meet the challenges raised by the experiments using the new accelerator that CERN is building: the Large Hadron Collider (LHC) [4]. This system must be able to cope with hundreds of millions of files, tens of petabytes of storage and handle a constant throughput of several gigabytes per second. In this paper, we detail CASTOR's architecture and implementation and present some operational aspects. We finally list the performance levels achieved by the current version both in a production environment and during internal tests.
Minimizing the object dimensions in circle and sphere packing problems
Authors: E. G. Birgin, F. N. C. Sobral
Venue: Computers and Operations Research (2008)

Given a fixed set of identical or different-sized circular items, the problem we deal with consists on finding the smallest object within which the items can be packed. Circular, triangular, squared, rectangular and also strip objects are considered. Moreover, 2D and 3D problems are treated. Twice-differentiable models for all these problems are presented. A strategy to reduce the complexity of evaluating the models is employed and, as a consequence, instances with a large number of items can be considered. Numerical experiments show the flexibility and reliability of the new unified approach.
A Novel Algorithm of Covert Image Communication with Wavelet Transform and Information Fusion
Authors: Peng Jian, Li-yun Su, Zheng Li, Shi-fu Tang
Venue: Proceedings of the Fourth International Conference on Image and Graphics (2007)

A novel image covert communication algorithm is proposed to use discrete wavelet transform and information fusion. For the good performance of the algorithm, the security information is modulated into the fractal modulated sequences and changes into encoded image. Because of mankind's sensitive differences in monochromatic images, three monochromatic channels of color image are regarded as three communication channels that have different performances. Then the fractal modulated image as security signal is adaptively embedded in 2-DCT domain of every communication channel. During detection process we use information fusion technique to regard 3 channels as 3 detached sensors and carry out information fusion by communication channels' performances. The simulation results show that we can remarkably extract the hiding meaningful image information and the algorithm can achieve good robustness and the quality of the security information image is guaranteed.
GRIP: Generic Representatives in PRISM
Authors: Alastair F. Donaldson, Alice Miller, David Parker
Venue: Proceedings of the Fourth International Conference on Quantitative Evaluation of Systems (2007)

We give an overview of GRIP, a symmetry reduction tool for the probabilistic model checker PRISM, together with experimental results for a selection of example specifications.
Quantifying Effective Memory Bandwidth of Platform FPGAs
Authors: Andrew G. Schmidt, Ron Sass
Venue: Proceedings of the 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (2007)

The benefits of High Performance Computing (HPC) can be seen in a wide range of applications. From science and medicine to industries as diverse as oil exploration, financial, and entertainment [5], access to cost-effective HPC is becoming a critical part of our national infrastructure. Although exponential semiconductor advances are giving computational scientists faster computing speeds, applications with large amounts of data may not necessarily solve problems faster. More specifically, technology trends are working against system designers: computation rates and memory capacity are both rising faster than the bandwidth between these two components. This so called "Memory Wall" was predicted for general-purpose computing over a decade ago [8], but to date large on-chip caches are able to compensate for the growing disparity. FPGA designers do not have the luxury of large caches, so to be successful, high-performance designs must include custom memory hierarchies and data paths as well as application-specific computations.
Distance Hereditary Graphs and the Interlace Polynomial
Authors: Joanna A. Ellis-Monaghan, Irasema Sarmiento
Venue: Combinatorics, Probability and Computing (2007)

The vertex-nullity interlace polynomial of a graph, described by Arratia, Bollobás and Sorkin in [3] as evolving from questions of DNA sequencing, and extended to a two-variable interlace polynomial by the same authors in [5], evokes many open questions. These include relations between the interlace polynomial and the Tutte polynomial and the computational complexity of the vertex-nullity interlace polynomial. Here, using the medial graph of a planar graph, we relate the one-variable vertex-nullity interlace polynomial to the classical Tutte polynomial when x=y, and conclude that, like the Tutte polynomial, it is in general #P-hard to compute. We also show a relation between the two-variable interlace polynomial and the topological Tutte polynomial of Bollobás and Riordan in [13]. We define the γ invariant as the coefficient of x1 in the vertex-nullity interlace polynomial, analogously to the β invariant, which is the coefficientof x1 in the Tutte polynomial. We then turn to distance hereditary graphs, characterized by Bandelt and Mulder in [9] as being constructed by a sequence ofadding pendant and twin vertices, and show that graphs in this class have γ invariant of 2n+1 when n true twins are added intheir construction. We furthermore show that bipartite distance hereditary graphs are exactly the class of graphs with γ invariant 2, just as the series-parallel graphs are exactly the class of graphs with β invariant 1. In addition, we show that a bipartite distance hereditary graph arises precisely as the circle graph of an Euler circuitin the oriented medial graph of a series-parallel graph. From this we conclude that the vertex-nullity interlace polynomial is polynomial time to compute for bipartite distancehereditary graphs, just as the Tutte polynomial is polynomial time to compute for series-parallel graphs.
Formal verification at higher levels of abstraction
Authors: Daniel Kroening, Sanjit A. Seshia
Venue: Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design (2007)

Most formal verification tools on the market convert a high-level register transfer level (RTL) design into a bit-level model. Algorithms that operate at the bit-level are unable to exploit the structure provided by the higher abstraction levels, and thus, are less scalable. This tutorial surveys recent advances in formal verification using high-level models. We present word-level verification with predicate abstraction and satisfiability modulo theories (SMT) solvers. We then describe techniques for term-level modeling and ways to combine word-level and term-level approaches for scalable verification.
Adaptive Replication Based Security Aware and Fault Tolerant Job Scheduling for Grids
Authors: Congfeng Jiang, Cheng Wang, Xiaohu Liu, Yinghui Zhao
Venue: Proceedings of the Eighth ACIS International Conference on Software Engineering, Artificial Intelligence, Networking, and Parallel/Distributed Computing - Volume 02 (2007)

Most of the existing job scheduling algorithms for grids have ignored the security problem with a handful of exceptions. Moreover, existing algorithms using fixed-number job replications will consume excessive resources when grid security level changes dynamically. In this paper, a Security Aware and Fault Tolerant Scheduling (SAFTS) algorithm based on adaptive replication is proposed which schedules the jobs by matching the user security demand and resource trust level and the number of the job replications changes adaptively with the dynamic of grid security. In experiments on RSBSME (Remote Sensing Based Soil Moisture Extraction) workload in a real grid environment, the average job scheduling success rate is 97%, and average grid utilization is 74%. Experiment results show that performance of SAFTS is better than non-security-aware and fixed-number job replication scheduling algorithms and SAFTS is fault-tolerant and scalable.
Queries and updates in the coDB peer to peer database system
Authors: Enrico Franconi, Gabriel Kuper, Andrei Lopatenko, Ilya Zaihrayeu
Venue: Proceedings of the Thirtieth international conference on Very large data bases - Volume 30 (2004)

In this short paper we present the coDB P2P DB system. A network of databases, possibly with different schemas, are interconnected by means of GLAV coordination rules, which are inclusions of conjunctive queries, with possibly existential variables in the head; coordination rules may be cyclic. Each node can be queried in its schema for data, which the node can fetch from its neighbours, if a coordination rule is involved.
An Optimal Approach to Fault Tolerant Software Systems Design
Authors: T. F. Gannon
Venue: IEEE Transactions on Software Engineering (1978)

A systematic method of providing software system fault recovery with maximal fault coverage subject to resource constraints of overall recovery cost and additional fault rate is presented. This method is based on a model for software systems which provides a measure of the fault coverage properties of the system in the presence of computer hardware faults. Techniques for system parameter measurements are given. An optimization problem results which is a doubly-constrained 0,1 Knapsack problem. Quantitative results are presented demonstrating the effectiveness of the approach.
A Method for Self-Organizing Communication in WSN Based Localization Systems: HashSlot
Authors: Marcel Baunach, Reiner Kolla, Clemens Muhlberger
Venue: Proceedings of the 32nd IEEE Conference on Local Computer Networks (2007)

Localization of objects within space is a common problem in WSN research. Besides the location estimation itself, wireless communication is a central aspect within such systems. We present the novel HashSlot method for assured and collision-free transmission of radio packets from multiple sources to a common destination within a constant and predictable time. Due to self-organization, our approach needs no prior active coordination between sensor nodes and offers various techniques like selectable quality of service levels to dynamically limit the number of returned information during runtime. Thereby, precision and speed of the localization process can be adjusted, fault tolerance can be achieved and energy consumption will be reduced. This paper describes theory and application of the HashSlot method within a real WSN based localization system.
Unification of problem solving environment implementation layers with XML-based specifications
Authors: Jiang Shu, Layne T. Watson, Naren Ramakrishnan, Frederick A. Kamke, Christopher L. North
Venue: Advances in Engineering Software (2008)

This paper describes how a design approach based on specifications via XML is used to unify the implementation layers of a problem solving environment WBCSim. WBCSim is a Web based simulation system designed to increase the productivity of wood scientists conducting research on wood-based composites manufacturing processes. WBCSim serves as a prototypical example for the design, construction, and evaluation of small-scale problem solving environments. WBCSim supports five process models. An XML datasheet is tailored for each model. The WBCSim interface layer, server scripts, and database management system all use this XML datasheet to improve the usability and maintainability of the three layers - client, server, developer - comprising the WBCSim system. A detailed description of the WBCSim system architecture is presented, along with a typical scenario of usage.
Ontologies and agents for a bus fleet management system
Authors: M. V. Belmonte, J. L. Pérez-de-la-Cruz, F. Triguero
Venue: Expert Systems with Applications: An International Journal (2008)

This paper reports on the design and implementation of a multi-agent decision support system for the bus fleet management domain. In particular, we show a complete description of the proposed multi-agent architecture and focus mainly on knowledge and software engineering features. The system has been developed in collaboration with the Malaga urban bus company (EMT) and it is based on a faithful reproduction of the real operating conditions of three existing lines of this company.
Review: A new concept of phase-compensated continuous-time Chebyshev filters
Authors: J. Piskorowski
Venue: Signal Processing (2008)

One of the important problems of signal processing is to design a continuous-time filter that provides both a constant delay over the desired frequency band and a selective magnitude response, and at the same time ensures the transient of the designed filter as short as possible. This paper presents the theoretical concept of time-varying Chebyshev filters with compensated group delay response. Using the compensated Chebyshev type I filter, we introduce time-varying parameters to its structure for the purpose of the minimization of the transient that was lengthened due to the group delay compensation. Results verifying the effectiveness of the proposed approach are presented and compared to the traditional filters.
Paternity analysis in Excel
Authors: Margarida Rocheta, F. Miguel Dionísio, Luís Fonseca, Ana M. Pires
Venue: Computer Methods and Programs in Biomedicine (2007)

Paternity analysis using microsatellite information is a well-studied subject. These markers are ideal for parentage studies and fingerprinting, due to their high-discrimination power. This type of data is used to assign paternity, to compute the average selfing and outcrossing rates and to estimate the biparental inbreeding. There are several public domain programs that compute all this information from data. Most of the time, it is necessary to export data to some sort of format, feed it to the program and import the output to an Excel book for further processing. In this article we briefly describe a program referred from now on as Paternity Analysis in Excel (PAE), developed at IST and IBET (see the acknowledgments) that computes paternity candidates from data, and other information, from within Excel. In practice this means that the end user provides the data in an Excel sheet and, by pressing an appropriate button, obtains the results in another Excel sheet. For convenience PAE is divided into two modules. The first one is a filtering module that selects data from the sequencer and reorganizes it in a format appropriate to process paternity analysis, assuming certain conventions for the names of parents and offspring from the sequencer. The second module carries out the paternity analysis assuming that one parent is known. Both modules are written in Excel-VBA and can be obtained at the address www.math.ist.utl.pt/~fmd/pa/pa.zip. They are free for non-commercial purposes and have been tested with different data and against different software (Cervus, FaMoz, and MLTR).
Clustering by common friends finds locally significant proteins mediating modules
Authors: Bill Andreopoulos, Aijun An, Xiaogang Wang, Michalis Faloutsos, Michael Schroeder
Venue: Bioinformatics (2007)

Motivation: Much research has been dedicated to large-scale protein interaction networks including the analysis of scale-free topologies, network modules and the relation of domain–domain to protein–protein interaction networks. Identifying locally significant proteins that mediate the function of modules is still an open problem. Method: We use a layered clustering algorithm for interaction networks, which groups proteins by the similarity of their direct neighborhoods. We identify locally significant proteins, called mediators, which link different clusters. We apply the algorithm to a yeast network. Results: Clusters and mediators are organized in hierarchies, where clusters are mediated by and act as mediators for other clusters. We compare the clusters and mediators to known yeast complexes and find agreement with precision of 71% and recall of 61%. We analyzed the functions, processes and locations of mediators and clusters. We found that 55% of mediators to a cluster are enriched with a set of diverse processes and locations, often related to translocation of biomolecules. Additionally, 82% of clusters are enriched with one or more functions. The important role of mediators is further corroborated by a comparatively higher degree of conservation across genomes. We illustrate the above findings with an example of membrane protein translocation from the cytoplasm to the inner nuclear membrane. Availability: All software is freely available under Supplementary information. Contact: williama@biotec.tu-dresden.de Supplementary information: http://www.cse.yorku.ca/billa/MODULARPIN/
An Approach to Scientific Array Processing: The Architectural Design of the AP-120B/FPS-164 Family
Authors: A. E. Charlesworth
Venue: Computer (1981)

Architecture, not hardware, gives the FPS array processor family its computational speed. Here is an inside look at the trade-offs and ideas that went into its design.
Unawareness and strategic announcements in games with uncertainty
Authors: Erkut Y. Ozbay
Venue: Proceedings of the 11th conference on Theoretical aspects of rationality and knowledge (2007)

I study games with uncertainty where players have different awareness regarding a chance player's moves (contingencies). An announcer, who is fully aware of the contingencies, can announce some of them to an unaware decision maker (DM) before the DM takes an action. I introduce an equilibrium concept and a refinement to study the way the DM generates her belief on her extended awareness.
Component refinement and CSC-solving for STG decomposition
Authors: Mark Schaefer, Walter Vogler
Venue: Theoretical Computer Science (2007)

STGs (Signal Transition Graphs) give a formalism for the description of asynchronous circuits based on Petri nets. To overcome the state explosion problem one may encounter during circuit synthesis, a nondeterministic algorithm for decomposing STGs was suggested by Chu and improved by one of the present authors. Here we study how CSC-solving-which is essential for circuit synthesis-can be combined with decomposition. For this purpose, the correctness definition for decomposition is enhanced with internal signals and hierarchical decomposition is proven correct. Based on this, it is shown that speed-independent CSC-solving preserves correctness and can be combined with decomposition. Furthermore, we use our new correctness definition to give the first correctness proof for the decomposition method of Carmona and Cortadella. Finally, we compare three different implementation relations for STGs: one derived from our correctness definition; one defined by Dill based on trace structures; and one derived from I/O-compatibility defined by Carmona and Cortadella.
Protection Against External Errors in a Dedicated System
Authors: C. Bellon
Venue: IEEE Transactions on Computers (1982)

This paper deals with the protection of a dedicated subsystem against an erroneous environment. The inputs of the subsystem can be erroneous and the subsystem must be able to detect erroneous inputs and to recover from them.
Monophonic sound source separation with an unsupervised network of spiking neurones
Authors: Ramin Pichevar, Jean Rouat
Venue: Neurocomputing (2007)

We incorporate auditory-based features into an unconventional pattern classification system, consisting of a network of spiking neurones with dynamical and multiplicative synapses. Although the network does not need any training and is autonomous, the analysis is dynamic and capable of extracting multiple features and maps. The neural network allows computing a binary mask that acts as a dynamic switch on a speech vocoder made of an FIR gammatone analysis/synthesis bank of 256 filters. We report experiments on separation of speech from various intruding sounds (siren, telephone bell, speech, etc.) and compare our approach to other techniques by using the log spectral distortion (LSD) metric.
A new approach to select the optimum neighborhood for edge preserving filter
Authors: Leiku Yang, Shengyu Li, Xiaoping Lu, Zengzhang Guo
Venue: Proceedings of the Fourth International Conference on Image and Graphics (2007)

this paper, we propose a new approach to select the optimum neighborhood for edge preserving filter, which is based on the minimum distance of gray value between the current pixel and its neighborhood. Compared with the earlier algorithm searching the least mean variance of neighborhood, our approach can consider not only the neighborhood character itself but also the relationship with the current pixel. This advantage has been directly shown to us from the equation deducing of the new algorithm, and the experiment has good results also.