ppxscal/embedding_network huggingface dataset:
Intel's 80960: An Architecture Optimized for Embedded Control
Authors: David P. Ryan
Venue: IEEE Micro (1988)

Important features and capabilities of the 80960 are briefly examined, and an overview of its architecture is given. A detached discussion is presented of the register model, core instruction set, register operations, memory operations, control operations instruction cache, user-supervisor protection, interrupts, faults, and debug support.
A Computational Study of the Homogeneous Algorithm for Large-scale Convex Optimization
Authors: Erling D. Andersen, Yinyu Ye
Venue: Computational Optimization and Applications (1998)

Recently the authors have proposed a homogeneous and self-dual algorithm for solving the monotone complementarity problem (MCP) [5]. The algorithm is a single phase interior-point type method; nevertheless, it yields either an approximate optimal solution or detects a possible infeasibility of the problem. In this paper we specialize the algorithm to the solution of general smooth convex optimization problems, which also possess nonlinear inequality constraints and free variables. We discuss an implementation of the algorithm for large-scale sparse convex optimization. Moreover, we present computational results for solving quadratically constrained quadratic programming and geometric programming problems, where some of the problems contain more than 100,000 constraints and variables. The results indicate that the proposed algorithm is also practically efficient.
Multidimensional Fechnerian scaling: regular variation version
Authors: Ehtibar N. Dzhafarov
Venue: Journal of Mathematical Psychology (2002)

The underlying assumptions of Fechnerian scaling are complemented by an assumption that ensures that any psychometric differential (the rise in the value of a discrimination probability function as one moves away from its minimum in a given direction) regularly varies at the origin with a positive exponent. This is equivalent to the following intuitively plausible property: any two psychometric differentials are comeasurable in the small (i.e., asymptotically proportional at the origin), without, however, being asymptotically equal to each other unless the corresponding values of the Fechner-Finsler metric function are equal. The regular variation version of Fechnerian scaling generalizes the previously proposed power function version while retaining its computational and conceptual simplicity.
On-Chip Test for Mixed-Signal ASICs using Two-Mode Comparators with Bias-Programmable Reference Voltages
Authors: Daniela De Venuto, Michael J. Ohletz
Venue: Journal of Electronic Testing: Theory and Applications (2001)

A design-for-testability implementation for analogue functional blocks of mixed-signal ASICs is presented. For the analogue blocks direct access via an analogue input pin for the automated test equipment is required. To this end existing OpAmp or OTA stages of the respective analogue blocks are converted into simple clocked comparators. The resulting two-mode comparators are used to observe specific internal nodes of the functional block under test. Depending on the comparator mode, the observed test response evaluation can either be static and/or quasi-dynamic. At least two reference voltages are required each with two different levels determined by a hysteresis. All necessary reference voltages are generated on-chip in the central biasing cell of the ASIC. Due to this Design-for-Testability implementation, an on-chip test evaluation can be performed without the need to bring an analogue signal on- or off-chip. From simulation and measurement results of a feasibility study performed on a general purpose test circuit realised in 0.35 &mu;m technology, the applicability was demonstrated. It showed that good fault coverages in the analogue functional blocks can be achieved. Estimations about the biasing programming indicated that this technique is in particular suitable for mixed-signal ASICs larger than 15 mm2 with a typical total power consumption of more than 50 mW typical for high voltage applications.
What Is Object-Oriented Programming?
Authors: Bjarne Stroustrup
Venue: IEEE Software (1988)

The meaning of the term 'object oriented' is examined in the context of the general-purpose programming language C++. This choice is made partly to introduce C++ and partly because C++ is one of the few languages that supports data abstraction, object-oriented programming, and traditional programming techniques. The support of programming paradigms by languages is discussed and four paradigms are examined: procedural, data hiding, data abstraction, and object-oriented programming. The support of the latter two by C++ is discussed in some detail.
Security for Virtual Private Intranets
Authors: William A. Arbaugh, James R. Davin, David J. Farber, Jonathan M. Smith
Venue: Computer (1998)

The economies and conveniences of telecommuting have made the technologically sophisticated home office a growing phenomenon. Businesses, however, are facing a major challenge in extending the office network environment to employees' homes. Many companies have developed highly integrated enterprise networking solutions, which through a standardized desktop allow users on a LAN or secured intranet to easily communicate and share data. When this connectivity is done properly which is not easy both employee and employer benefit. But it also carries a risk because the enterprise does not control the home environment. How to transparently establish the trustworthiness of home machines so that their interconnection to the enterprise can be extended via an internetwork? This article describes a proposed solution, secure identity-based loading. SIBL uses smart cards, operating system modifications, and network authentication to provide secure, economical, and transparent home office environments.
Bytecode fetch optimization for a Java interpreter
Authors: Kazunori Ogata, Hideaki Komatsu, Toshio Nakatani
Venue: ACM SIGOPS Operating Systems Review (2002)

Interpreters play an important role in many languages, and their performance is critical particularly for the popular language Java. The performance of the interpreter is important even for high-performance virtual machines that employ just-in-time compiler technology, because there are advantages in delaying the start of compilation and in reducing the number of the target methods to be compiled. Many techniques have been proposed to improve the performance of various interpreters, but none of them has fully addressed the issues of minimizing redundant memory accesses and the overhead of indirect branches inherent to interpreters running on superscalar processors. These issues are especially serious for Java because each bytecode is typically one or a few bytes long and the execution routine for each bytecode is also short due to the low-level, stack-based semantics of Java bytecode. In this paper, we describe three novel techniques of our Java bytecode interpreter, write-through top-of-stack caching (WT), position-based handler customization (PHC), and position-based speculative decoding (PSD), which ameliorate these problems for the PowerPC processors. We show how each technique contributes to improving the overall performance of the interpreter for major Java benchmark programs on an IBM POWER3 processor. Among three, PHC is the most effective one. We also show that the main source of memory accesses is due to bytecode fetches and that PHC successfully eliminates the majority of them, while it keeps the instruction cache miss ratios small.
The Composite Banyan Network
Authors: Seung-Woo Seo, Tse-Yun Feng
Venue: IEEE Transactions on Parallel and Distributed Systems (1995)

A new multipath multistage interconnection network called the composite banyan network is proposed. The network incorporates both the banyan and the reverse banyan networks and is constructed by superimposing the two. The basic building blocks in the composite banyan network are 3 × 3 switching elements with log2N stages. A major advantage of the composite banyan network over existing networks with 3 × 3 SEs is an efficient and fast control algorithm that sets up a path between any source and destination pair. Instead of complex numerical calculations, the network can easily generate a primary routing tag and alternate tags through simple binary operations. Also, the network has a lot of favorable features, including regularity, symmetry, and easy rerouting capability under faults and conflicts. It is shown that at least two totally disjoint paths exist between any source and destination pair, which increase the degree of fault-tolerance. A deterministic permutation routing algorithm is also developed for the 8 × 8 composite banyan network. Using a simple tabular method, it is shown that the algorithm always finds a set of conflict-free tags.
A hybrid image alignment system for fast and precise pattern localization
Authors: Shang-Hong Lai, Ming Fang
Venue: Real-Time Imaging (2002)

The need for accurate and efficient pattern localization prevails in many industrial applications, such as automated visual inspection and factory automation. The image reference approach is very popular in automatic visual inspection due to its general application to a variety of inspection tasks. However, it requires precise alignment of the inspection pattern in the image. To achieve precise pattern alignment, traditional template matching is extremely time-consuming when the search space is large. In this paper, we present a new hybrid image alignment system for fast and accurate pattern localization in a large search space. This pattern localization algorithm is very useful for applications in automated visual inspection and pick-and-place applications. The proposed hybrid alignment algorithm comprises a hierarchical nearest-neighbor search process and an optical-flow based energy minimization method. The hierarchical nearest-neighbor search, which is based on the learning-from-examples principle, produces rough estimates of the transformation parameters for the initial guesses of the optical-flow based energy minimization method. The energy minimization process iteratively refines the estimation results and provides associated confidence measures. Experimental results are shown to demonstrate the accuracy and efficiency of the proposed algorithm.
Optional and responsive locking in collaborative graphics editing systems
Authors: David Chen, Chengzheng Sun
Venue: ACM SIGGROUP Bulletin (1999)

Object-based collaborative graphics editing systems allow multiple users to edit the same graphics document at the same time from multiple sites. This paper examines the use of locking to prevent the generation of conflicting operations in this type of systems. Two types of locks are examined: object and region. A locking scheme which preserves the intentions of all operations is proposed. Furthermore, the problems of lock ownership caused by concurrent operations are resolved.
How RISCy is DSP?
Authors: Michael R. Smith
Venue: IEEE Micro (1992)

The characteristics of benchmark digital signal processing (DSP) algorithms are examined. These characteristics are used to suggest the features of an ideal DSP architecture, which is compared to current DSP and reduced instruction set computer (RISC) architectures. Timing comparisons taken from data books and research show that several on-the-market RISCs have a DSP performance close to or better than some DSP chips. Analysis of these DSP and RISC architectures leads to the suggestion of an ideal low-cost RISC DSP chip.
Block Diagram Reduction of the Interconnected Linear Time-Varying Systems in the Time-Frequency Domain
Authors: Haipeng Zhao, Joseph Bentsman
Venue: Multidimensional Systems and Signal Processing (2002)

The problem of obtaining the time-frequency domain input-output model of a linear time-varying (LTV) system formed by linking the time-frequency domain blocks describing LTV subsystems is considered. Simultaneous input-output transformation of the constituent LTV subsystems modeled in terms of two-dimensional impulse responses into time-frequency domain is developed. It is shown that this transformation gives rise to the time-frequency domain subsystem representation which lends itself easily to: 1) deriving composition rules for obtaining the simplified overall interconnection model, and 2) revealing the constraints on individual subsystem modeling that need to be satisfied to admit such simplification. These composition rules are developed for the reduction of standard topologies including series, parallel, and feedback interconnections. The reduction of a more complicated topology using these rules is demonstrated.
Geometric Reasoning for Extraction of Manufacturing Features in Iso-Oriented Polyhedrons
Authors: S. N. Trika, R. L. Kashyap
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1994)

This paper investigates the extraction of machining features from boundary descriptions of iso-oriented (having no inclined faces) polyhedrons. We prove that manufacturing the features proposed by our feature extractor results exactly in the desired part-in this respect, the approach is both sound and complete. Our method uses the adjacency information between faces to derive the features. This keeps the determination of isolated features in a part straightforward. However, interaction of features creates difficulties since the adjacency information between some faces is lost. We derive this lost information by considering faces that when extended intersect other faces to form concave edges. The derived face adjacencies are termed virtual links. Augmenting the virtual links to the cavity graph of the object leads to its feature graph, and subgraph matching of primitive graphs in this graph results in feature hypotheses. A feature hypothesis is considered valid if the volume corresponding to it is not shared with the part in question; therefore, we verify the feature hypotheses by checking the regularized intersection of the feature volume and the part. Thus, feature verification employs a constructive solid geometry approach. We have implemented a prototype of the system in the Smalltalk-80 environment.
Long Time Behavior of the Perfectly Matched Layer Equations in Computational Electromagnetics
Authors: S. Abarbanel, D. Gottlieb, J. S. Hesthaven
Venue: Journal of Scientific Computing (2002)

We investigate the long time behavior of two unsplit PML methods for the absorption of electromagnetic waves. Computations indicate that both methods suffer from a temporal instability after the fields reach a quiescent state. The analysis reveals that the source of the instability is the undifferentiated terms of the PML equations and that it is associated with a degeneracy of the quiescent systems of equations. This highlights why the instability occurs in special cases only and suggests a remedy to stabilize the PML by removing the degeneracy. Computational results confirm the stability of the modified equations and is used to address the efficacy of the modified schemes for absorbing waves.
A Methodology for Synthesis of Data Path Circuitse
Authors: Amit Chowdhary, Rajesh Gupta
Venue: IEEE Design Test (2002)

This methodology extracts the regularity of data path blocks from their HDL descriptions and preserves it throughout the synthesis process. By automating various design steps, the methodology significantly improves design productivity and achieves designs comparable in terms of delay and size to manually designed circuits.
Curve Segmentation Under Partial Occlusion
Authors: N. Katzir, M. Lindenbaum, M. Porat
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1994)

2-D shape boundary segmentation is required as a fundamental and important stage in the recognition of partially occluded objects. We introduce here a new segmentation method capable of extracting a controlled number of segments along a smooth boundary curve. This new approach is invariant to similarity transformation, and partial occlusion has only marginal influence on the segmentation of the visible part. The basic concept is to transform the curve into another one which intersects itself. Points of intersection of the new curve are re-transformed to the original curve and serve as endpoints of segments. Properties of the transform are discussed, and conditions for existence of intersection points are given. Simulation results of gray level images are presented, and advantages of our method over conventional approaches relying on singular points of the curvature are discussed.
Efficiently Supporting Temporal Granularities
Authors: Curtis E. Dyreson, William S. Evans, Hong Lin, Richard Thomas Snodgrass
Venue: IEEE Transactions on Knowledge and Data Engineering (2000)

Granularity is an integral feature of temporal data. For instance, a person's age is commonly given to the granularity of years and the time of their next airline flight to the granularity of minutes. A granularity creates a discrete image, in terms of granules, of a (possibly continuous) time-line. We present a formal model for granularity in temporal operations that is integrated with temporal indeterminacy, or ¿don't know when¿ information. We also minimally extend the syntax and semantics of SQL-92 to support mixed granularities. This support rests on two operations, scale and cast, that move times between granularities, e.g., from days to months. We demonstrate that our solution is practical by showing how granularities can be specified in a modular fashion, and by outlining a time- and space-efficient implementation. The implementation uses several optimization strategies to mitigate the expense of accommodating multiple granularities.
Modified group divisible designs with block size 5 and &#x03BB; = 1
Authors: R. Julian R. Abel, Ahmed M. Assaf
Venue: Discrete Mathematics (2002)

In this paper we investigate the existence of 5-MGDDs of typemn. Some new incomplete transversal designs are also given.
Learning Equilibrium Play: A Myopic Approach
Authors: Sjur Didrik Flåm
Venue: Computational Optimization and Applications (1999)

We model repeated play of noncooperative stage games in terms of approximate gradient steps. That simple format requires little information and no optimization. Moreover, it allows players to evaluate marginal cost or profit inexactly and to move with different velocities. Uncertainty can also be accommodated. Granted some crucial stability, we show that play converges to Nash equilibrium.
Frequency domain analysis of switching noise on power supply network
Authors: Shiyou Zhao, Kaushik Roy, Cheng Kok Koh
Venue: Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design (2000)

In this paper, we propose an approach for the analysis of power supply noise in the frequency domain for power/ground (P/G) networks of tree topologies. We model the P/G network as a linear time invariant (LTI) pseudo-distributed RLC network and the gates (or cells) as time-varying current sources. Voltage fluctuation caused by the switching events is calculated based on the effective impedances seen by the corresponding current sources and the spatial correlation between the nodes of the power network. Superposition is applied to the LTI system to obtain the overall noise spectrum at any node of the power supply network. Inverse Fast Fourier Transformation (IFFT) is then performed on the frequency domain noise spectrum to obtain the time domain noise waveform. The proposed algorithm has a complexity of O(n2). Experimental results show that our approach can produce accurate noise waveforms.
A New Superconvergence for Mixed Finite Element Approximations
Authors: Richard E. Ewing, Mingjun Liu, Junping Wang
Venue: SIAM Journal on Numerical Analysis (2002)

A new superconvergence result is established for numerical solutions of elliptic problems obtained from the mixed finite element method of Raviart--Thomas over rectangular partitions. The well-known optimal order error estimate in L2-norm for the flux approximation is of order ${\cal O}(h^{k+1})$, where $k\ge 0$ is the order of polynomials employed in the Raviart--Thomas element. The new superconvergence shows an improved accuracy of order ${\cal O}(h^{k+3})$ between the mixed finite element approximation and an appropriately defined local projection of the flux variable when k>0. A postprocessing technique using local projection methods is proposed and analyzed in order to provide a new approximate solution with the superconvergent order ${\cal O}(h^{k+3})$.
Optimal Control on the Heisenberg Group
Authors: F. Monroy-Pérez, A. Anzaldo-Meneses
Venue: Journal of Dynamical and Control Systems (1999)

Let H denote either the Heisenberg group \Bbb R^{2n+1}, or the Cartesian product of n copies of the three-dimensional Heisenberg group \Bbb R^3. Let &lcub;X1, Y1, &hellip;, Xn, Yn&rcub; be an independent set of left-invariant vector fields on H. In this paper, we study the left-invariant optimal control problem on H with the dynamics \dot{q}(t)=\sum\limits^n_{i=1}u_i(t)X_i(q(t))+v_i(t)Y(q(t)), the cost functional \Lambda(q,u)={1 \over 2}\int \sum\limits^n_{i=1}\mu_i(u^2_i+v^2_i), with arbitrary positive parameters &mu;1, &hellip;, &mu;n, and admissible controls taken from the set of measurable functions t\mapsto u(t)=(u_1(t),v_1(t),\ldots , u_n(t), v_n(t)). The above control system is encoded either in the kernel of a contact 1-form (for \Bbb R^{2n+1}), or in the kernel of a Pfaffian system (for \Bbb R^{3n}). In both cases, the action of the semi-direct product of the torus Tn with H describe the symmetries of the problem.The Pontryagin maximum principle provides optimal controls&semi; extremal trajectories are solutions to the Hamiltonian system associated with the problem. Abnormal extremals (which do not depend on the cost functional) yield solutions that are geometrically irrelevant.An explicit integration of the extremal equations provides a tool for studying some aspects of the sub-Riemannian structure defined on H by means of the above optimal control problem.
Looking Back, Moving Forward
Authors: Jerzy W. Rozenbilt, Sanjaya Kumar
Venue: Computer (2001)

A synergistic approach to developing complex computer-based systems will continue to play an important role.
PicoJava: A Direct Execution Engine For Java Bytecode
Authors: Harlan McGhan, Mike O'Connor
Venue: Computer (1998)

Key to the central promise inherent in Java technology-"write once, run anywhere"-is the fact that Java programs run on the Java virtual machine, insulating them from any contact with the underlying hardware. Consequently, Java programs must execute indirectly through a translation layer built into the Java virtual machine. Translation essentially converts Java virtual machine instructions (called byte-codes) into corresponding machine-specific binary instructions. Bytecode is a single image of a program that will execute identically (in principle) on any system equipped with a JVM. The first step toward the development of a new class of Java processors was the creation of the bytecode execution engine itself, called the picoJava core. PicoJava directly executes Java bytecode instructions and provides hardware support for other essential functions of the JVM. Executing bytecode instructions in hardware eliminates the need for dynamic translation, thus extending the useful range of Java bytecode programs to embedded environments. By the end of 1998, Java processors like Sun's microJava 701 should be available for evaluation from several licensees of the picoJava core technology