ppxscal/embedding_network huggingface dataset:
A Triple Modular Redundancy Technique Providing Multiple-Bit Error Protection Without Using Extra Redundancy
Authors: Wil J. van Gils
Venue: IEEE Transactions on Computers (1986)

A well-known technique for providing tolerance against single hardware component failures is triplication of the component, called triple modular redundancy (TMR). In this paper a component is taken to be a processor-memory configuration where the memory is organized in a bit-sliced way. If voting is performed bitwise in an orthodox TMR configuration consisting of three of these components, failure of a complete component or failure of bit-slices not on corresponding positions in the memories can be tolerated. We present a TMR technique, not using more redundancy than orthodox TMR, that can tolerate the failure of arbitrary bit-slices (including those on corresponding positions) up to a certain amount. Additionally it can tolerate the failure of arbitrary bit-slices up to a certain amount whenever one component is known to be malfunctioning or whenever one component is disabled. This generalized TMR technique is described for processor-memory configurations processing 4-, 8-, and 16-bit words, respectively.
Allocating Independent Subtasks on Parallel Processors
Authors: Clyde P. Kruskal, Alan Weiss
Venue: IEEE Transactions on Software Engineering (1985)

When using MIMD (multiple instruction, multiple data) parallel computers, one is often confronted with solving a task composed of many independent subtasks where it is necessary to synchronize the processors after all the subtasks have been completed. This paper studies how the subtasks should be allocated to the processors in order to minimize the expected time it takes to finish all the subtasks (sometimes called the makespan). We assume that the running times of the subtasks are independent, identically distributed, increasing failure rate random variables, and that assigning one or more subtasks to a processor entails some overhead, or communication time, that is independent of the number of subtasks allocated. Our analyses, which use ideas from renewal theory, reliability theory, order statistics, and the theory of large deviations, are valid for a wide class of distributions. We show that allocating an equal number of subtasks to each processor all at once has good efficiency. This appears as a consequence of a rather general theorem which shows how some consequences of the central limit theorem hold even when we cannot prove that the central limit theorem applies.
The Feasibility of a VLSI Chip for Ray Tracing Bicublic Patches
Authors: Ron Pulleyblank, John Kapenga
Venue: IEEE Computer Graphics and Applications (1987)

In this article we explore the possibility of a VLSI chip for ray tracing bicubic patches in Bezier form. The purpose of the chip is to calculate the intersection point of a ray with the bicubic patch to a specified level of accuracy, returning parameter values (u,v) specifying the location of the intersection on the patch, and a parameter value, t, which specifies the location of the intersection on the ray. The intersection is calculated by succesively subdividing the patch and computing the intersection of the ray with a bounding box of each subpatch until the bounding volume meets theaccuracy requirement. There are two operating modes: another in which all intersections are found. This algorithm (and the chip) correctly handle the difficult cases of the ray tangentially intersecting a planar patch and intersections of the ray at a silhouette edge of the patch. Estimates indicate that such a chip could be implemented in 2-micron NMOS (N-type metal oxide semiconductor) and could computer patch-ray intersections at the rate of one every 15 microseconds for patces that are prescaled and specified to a 12-bit fixed point for each of the x, y, and z components. A version capable of handling 24-bit patches could compute patch/ray intersections at the rate of one every 140 section point could be performed with the addition of nine scalar subtractions and six scalar multiplies. Images drawn using a software version of the algorithm are presented and discussed.
Can Redundancy and Masking Improve the Performance of Synchronizers?
Authors: Lindsay Kleeman, Antonio Cantoni
Venue: IEEE Transactions on Computers (1986)

This paper considers the possibility of achieving improvements in the reliability of synchronizing an asynchronous signal, by exploiting redundancy and masking. Redundancy and masking techniques have been applied successfully to mask both permanent and transient hardware faults. However, it is shown in this paper that redundancy and masking techniques are ineffective against synchronization failures which arise because of metastable behavior of synchronizing elements.
Fourier Synthesis of Ocean Scenes
Authors: Gary A. Mastin, Peter A. Watterberg, John F. Mareda
Venue: IEEE Computer Graphics and Applications (1987)

Considerable interest in scene synthesis has focused on fractal techniques such as 1/f noise filtering. However, these techniques produce poor synthetic ocean scenes. A superior technique is presented here that used an empirical sea spectrum model to represent a fully developed sea in nautre. A computer program has been written whereby a user supplies a wind velocity, and a two-dimensional Fourier-domain filter is created whose shape is decribed by the modified Pierson-Moskowitz spectrum. A white-noise image can then be filtered and rendered with a ray-tracing algorithm to produce a realistic ocean scene. Wave motion may be invoked by manipulating teh phase of the Fourier-transormed white-noise image. Several phase-manipulating techniques have been implemented.
Editing and compiling whole programs
Authors: Keith D Copper, Ken Kennedy, Linda Torczon
Venue: Proceedings of the second ACM SIGSOFT/SIGPLAN software engineering symposium on Practical software development environments (1987)

The IRn programming environment pays systematic attention to the problems entailed in developing, debugging, and optimizing large programs. This paper reviews the principal mechanisms provided by IRn to support large programs. It describes the structure used to represent large programs and the tools that manipulate this structure. It also explores the way that the IRn compiling system handles whole programs: performing interprocedural analysis, removing redundant modules, and generating customized procedure linkages.
Metrics for Ada packages: an initial study
Authors: J. D. Gannon, E. E. Katz, V. R. Basili
Venue: Communications of the ACM (1986)

Many novel features of Ada present programmers with a formidable learning task. The study of four first-time Ada programmers suggests that a background in the software engineering practices supported by Ada is necessary to learn to use the features of the language.
Compiling Smalltalk-80 to a RISC
Authors: William R. Bush, A. Dain Samples, David Ungar, Paul N. Hilfinger
Venue: ACM SIGARCH Computer Architecture News (1987)

The Smalltalk On A RISC project at U. C. Berkeley proves that a high-level object-oriented language can attain high performance on a modified reduced instruction set architecture. The single most important optimization is the removal of a layer of interpretation, compiling the bytecoded virtual machine instructions into low-level, register-based, hardware instructions. This paper describes the compiler and how it was affected by SOAR architectural features. The compiler generates code of reasonable density and speed. Because of Smalltalk-80's semantics, relatively few optimizations are possible, but hardware and software mechanisms at runtime offset these limitations. Register allocation for an architecture with register windows comprises the major task of the compiler. Performance analysis suggests that SOAR is not simple enough; several hardware features could be efficiently replaced by instruction sequences constructed by the compiler.
The standards factor
Authors: Jon Meads
Venue: ACM SIGCHI Bulletin (1986)

When Lorraine Borman asked me to act as the focal point for standards of interest to the SIGCHI community, I didn't expect it to be much of an effort. The only relevant issue appeared to be the infamous German DIN proposed standard for interactive screen presentations, which appeared to be too vague and indiscriminate to be applicable to much at all. Surely, after an initial furor, it would die a vagrant's death - unnoticed and unmourned.
Rational for and organization of the engineering information system program
Authors: A. J. Gadient, J. L. Ebel
Venue: Proceedings of the 24th ACM/IEEE Design Automation Conference (1987)

The need for a robust, multi-user, integrated design environment for electronic systems is the result of the phenomenal growth in integrated circuit fabrication technology over the last decade. Attempts to develop &ldquo;integrated&rdquo; design environments highlight the current lack in design tool interoperability. The Very High Speed Integrated Circuits (VHSIC) program recognizes the importance of integrated design environments for the design of future defense electronic systems and for the insertion of new technologies into existing electronic systems, and is attempting to ease the task of integrating disparate electronic system design aids by addressing the design tool interoperability problem through the Engineering Information System (EIS) program. This paper describes the rationale for the EIS program, highlights its goals, and outlines the program's structure.
The Fortran 8X standard
Authors: T. Lahey
Venue: ACM SIGPLAN Fortran Forum (1987)

The Fortran Standard Committee has submitted a draft of the next Fortran Standard, referred to as 8x, for public review. Copies of this draft are available for $50 from Global Engineering Documents in Santa Ana, CA, 800 854-7179. Comments should be mailed to: ANSI X3 Secretariat, CBEMA, 311 First Street NW, Suite 500, Washington, DC 20001
Some experiments with a run length control for simulations on PCs
Authors: Ralph Duersch, Lee W. Schruben
Venue: Proceedings of the 20th annual symposium on Simulation (1987)

This paper describes an implementation and the performance of a new confidence interval estimation technique that determines how long a simulation should be run to produce results that satisfy a relative precision criterion. This technique also identifies initial transients and ignores transient data points when determining run length. It has been implemented for use with personal computers (PCs) and four different models are used to demonstrate the performance of the procedure.
Packet routing algorithms for integrated switching networks
Authors: Daniel A. Reed, Chong-kwon Kim
Venue: Proceedings of the 1987 ACM SIGMETRICS conference on Measurement and modeling of computer systems (1987)

Repeated studies have shown that a single switching technique, either circuit or packet switching, cannot optimally support a heterogeneous traffic mix composed of voice, video and data. Integrated networks support such heterogeneous traffic by combining circuit and packet switching in a single network. To manage the statistical variations of network traffic, we introduce a new, adaptive routing algorithm called hybrid, weighted routing. Simulations show that hybrid, weighted routing is preferable to other adaptive routing techniques for both packet switched networks and integrated networks.
KNOs: KNowledge acquisition, dissemination, and manipulation Objects
Authors: D. Tsichritzis, E. Fiume, S. Gibbs, O. Nierstrasz
Venue: ACM Transactions on Information Systems (TOIS) (1987)

Most object-oriented systems lack two useful facilities: the ability of objects to migrate to new environments and the ability of objects to acquire new operations dynamically. This paper proposes Knos, an object-oriented environment that supports these actions. Knos' operations, data structures, and communication mechanisms are discussed. Knos objects &ldquo;learn&rdquo; by exporting and importing new or modified operations. The use of such objects as intellectual support tools is outlined. In particular, various applications involving cooperation, negotiation, and apprenticeship among objects are described.
A probabilistic algorithm for the post office problem
Authors: K Clarkson
Venue: Proceedings of the seventeenth annual ACM symposium on Theory of computing (1985)

The post office problem is the following: points in d-dimensional space, so that given an arbitrary point p, the closest points in S to p can be found quickly. We consider the case of this problem where the Euclidean norm is the measure of distance. The previous best algorithm for this problem for d>2 requires &Ogr;(n2d+1) preprocessing time to build a data structure allowing an &Ogr;(log n query time. We will show that a data structure can be built in expected &Ogr;(n(d-1)(1+k)) time, for any fixed k;>&Ogr;, so that closest-point queries can be answered in &Ogr;(log n) worstcase time. (The constant factors depend on d and k.) The algorithm employs random sampling, so the expected time holds for any set of points. A variant of this algorithm (for the variant problem where only one closest point of S to the query point is desired) requires &Ogr;(n&lceil;d/2&rceil;) &ogr;(n&lceil;d/2&rceil;) preprocessing time for &ogr;(nt) worst-case query time, for any fixed &egr;>0. These results approach the &OHgr;(n&lceil;d/2&rceil;) preprocessing time required for any algorithm constructing the Voronoi diagram of the input points. Implementation of these algorithms requires not too much more than a random sampling procedure and a procedure for constructing the Voronoi diagram of that random sample.
Database Integrity Block Construct: Concepts and Design Issues
Authors: Leszek Lilien, Bharat Bhargava
Venue: IEEE Transactions on Software Engineering (1985)

When a crash occurs in a transaction processing system, the database can enter an unacceptable state. To continue the processing, the recovery system has three tasks: 1) verification of the database state for acceptability, 2) restoration of an acceptable database state, and 3) restoration of an acceptable history of transaction processing. Unfortunately these tasks are not trivial and the computational complexity of the algorithms for most of them is either NP-complete or NP-hard. In this paper we discuss the concepts and design issues of a construct called database integrity block (DIB). The implementation of this construct allows for efficient verification of the database state by employing a set of integrity assertions and restoration of transaction history by utilizing any database restoration technique such as audit trail or differential file. This paper presents approximation algorithms for minimizing the costs of evaluation of integrity assertions by modeling the problem as the directed traveling salesman problem, and presents a methodology to compare the costs of audit trail and differential file techniques for database restoration. The applicability of integrity verification research to the problem of multiple-query optimization is also included.
Filtering by repeated integration
Authors: Paul S. Heckbert
Venue: ACM SIGGRAPH Computer Graphics (1986)

Many applications of digital filtering require a space variant filter - one whose shape or size varies with position. The usual algorithm for such filters, direct convolution, is very costly for wide kernels. Image prefiltering provides an efficient alternative. We explore one prefiltering technique, repeated integration, which is a generalization of Crow's summed area table.We find that convolution of a signal with any piecewise polynomial kernel of degree n--1 can be computed by integrating the signal n times and point sampling it several times for each output sample. The use of second or higher order integration permits relatively high quality filtering. The advantage over direct convolution is that the cost of repeated integration filtering does not increase with filter width. Generalization to two-dimensional image filtering is straightforward. Implementations of the simple technique are presented in both preprocessing and stream processing styles.
The performance of multiversion concurrency control algorithms
Authors: Michael J. Carey, Waleed A. Muhanna
Venue: ACM Transactions on Computer Systems (TOCS) (1986)

A number of multiversion concurrency control algorithms have been proposed in the past few years. These algorithms use previous versions of data items in order to improve the level of achievable concurrency. This paper describes a simulation study of the performance of several multiversion concurrency control algorithms, investigating the extent to which they provide increases in the level of concurrency and also the CPU, I/O, and storage costs resulting from the use of multiple versions. The multiversion algorithms are compared with regard to performance with their single-version counterparts and also with each other. It is shown that each multiversion algorithm offers significant performance improvements despite the additional disk accesses involved in accessing old versions of data; the nature of the improvement depends on the algorithm in question. It is also shown that the storage overhead for maintaining old versions that may be required by ongoing transactions is not all that large under most circumstances. Finally, it is demonstrated that it is important for version maintenance to be implemented efficiently, as otherwise the cost of maintaining old versions could outweigh their concurrency benefits.
Estimating the multiplicities of conflicts to speed their resolution in multiple access channels
Authors: Albert G. Greenberg, Philippe Flajolet, Richard E. Ladner
Venue: Journal of the ACM (JACM) (1987)

New, improved algorithms are proposed for regulating access to a multiple-access channel, a common channel shared by many geographically distributed computing stations. A conflict of multiplicity n occurs when n stations transmit simultaneously to the channel. As a result, all stations receive feedback indicating whether n is 0, 1, or &ge;2. If n = 1, the transmission succeeds; whereas if n &ge; 2, all the transmissions fail. Algorithms are presented and analyzed that allow the conflicting stations to compute a stochastic estimate n* of n, cooperatively, at small cost, as a function of the feedback elicited during its execution. An algorithm to resolve a conflict among two or more stations controls the retransmissions of the conflicting stations so that each eventually transmits singly to the channel. Combining one of our estimation algorithms with a tree algorithm (of Capetanakis, Hayes, and Tsybakov and Mikhailov) then leads to a hybrid algorithm for conflict resolution. Several efficient combinations are possible, the most efficient of which resolves conflicts about 20 percent faster on average than any of the comparable algorithms reported to date.
Dialog management in interactive systems: a comparative survey
Authors: Stefan Britts
Venue: ACM SIGCHI Bulletin (1987)

Developing interactive systems is very expensive. This stems from the fact that, in average, 50--60 per cent of the lines of code in an application are for dialog management [Sutto77]. Therefore, dialog development has been recognized as an important area both among researchers and practitioneers. As a result, many tools have been developed, or are under development, with the aim of reducing the dialog design and implementation efforts, and hence, reducing the costs.
A distributed repository for immutable persistent objects
Authors: Douglas Wiebe
Venue: ACM SIGPLAN Notices (1986)

Jasmine is an object-oriented system for programming-in-the-large. Jasmine describes software using system model objects. These objects are persistent (they have lifetimes of days or decades) and immutable (since system models act as historical records). This paper describes JStore, a distributed, replicated repository for system model objects. JStore provides robust, transactional, write-once storage.Designs are presented for the serialization, location, and replication of objects. Description procedures serialize objects for network transmission and permanent storage. An expanding ring multicast search algorithm locates saved objects. JStore replicates objects using a lazy replication algorithm built on top of the location mechanism. Decision procedures determine the replication policy used at each storage site.
Lobbying for computer legislation
Authors: Jay BloomBecker
Venue: ACM SIGCAS Computers and Society (1986)

Warning: This is an article about how democracy has begun to come to computing. It is a challenge to those who would like to see it spread. I make no pretense of objectivity or dispassion (only accuracy). I want to make your blood boil and your face flush, impelling you out of lassitude into revolutionary commitment. I want to turn the "appliance operators" into "cybernetworkers," citizens of the information age.
Synthesizing Code for Resource Controllers
Authors: Krithivasan Ramamritham
Venue: IEEE Transactions on Software Engineering (1985)

A distributed system is viewed as a set of objects and processes utilizing the objects. If a shared object, known as a resource, is accessed concurrently, some mechanism is necessary to control use of the resource in order to satisfy the consistency and fairness requirements associated with the resource. These mechanisms are termed resource controllers.
Matching Language and Hardware for Parallel Computation in the Linda Machine
Authors: Sudhir Ahuja, Nicholas J. Carriero, David H. Gelernter, Venkatesh Krishnaswamy
Venue: IEEE Transactions on Computers (1988)

The Linda Machine is a parallel computer that has been designed to support the Linda parallel programming environment in hardware. Programs in Linda communicate through a logically shared associative memory called tuple space. The goal of the Linda Machine project is to implement Linda's high-level shared-memory abstraction efficiently on a nonshared-memory architecture. The authors describe the machine's special-purpose communication network and its associated protocols, the design of the Linda coprocessor, and the way its interaction with the network supports global access to tuple space. The Linda Machine is in the process of fabrication. The authors discuss the machine's projected performance and compare this to software versions of Linda.
Ray tracing Jell-O brand gelatin
Authors: Paul S. Heckbert
Venue: Communications of the ACM (1988)

New technology is presented for imaging a restricted class of dessert foods.
TSIOPAK&mdash;a proposal for a new Sharp APL file system
Authors: Carlos G. Leon
Venue: ACM SIGAPL APL Quote Quad (1987)

Communication between OS files is often necessary when information that is manipulated and stored in Sharp APL files is required to be used by non-APL routines. For example, one may use APL for number crunching and have the output processed by SAS or FORTRAN to plot the data. The arising demand for procedures that would make data accessible from APL to other systems motivated the author to take action. TSIOPAK was developed with the intention to provide a standard interface between Sharp APL and the MVS operating system facilitating the accessibility of data created through APL and other languages. In addition, the reader will find that starting from the section titled the TSIOPAK File System, the format for each section looks very much like the Sharp APL Reference Manual. This is not a coincidence, what the author has tried to achieve with this work is to have a file system functionally identical to Sharp's using OS files. The author's efforts have gone as far as trying to replicate the format of Sharp's manual. In addition, parts of the Sharp APL File System have not been implemented in TSIOPAK due to the lack of time and resources. Hence, this paper is a proposal for a new file system which would make APL-generated data generally available.