ppxscal/embedding_network huggingface dataset:
A Fast Partitioning Method for PLA-Based FPGAs
Authors: Zafar Hasan, David Harrison, Maciej Ciesielski
Venue: IEEE Design Test (1992)

A method for automatic multipartitioning of a multiple-output logic function into the smallest number of subfunctions for mapping to fixed-size PLAs of a field-programmable gate array (FPGA) chip is described. A detailed example to demonstrate the procedure is presented. It is shown that, for this example, the method produced almost optimum partitions in a fast and efficient manner.
Practical traffic grooming scheme for single-hub SONET/WDM rings
Authors: Xiang-Yang Li, Liwu Liu, Peng-Jun Wan, Ophir Frieder
Venue: Journal of High Speed Networks (2002)

In SONET/WDM networks, one fiber supports multiple wavelengths and each wavelength supports several low rate tributary streams. 'Traffic grooming' then is defined as properly using SONET Add/Drop Multiplexer to electronically multiplex and demultiplex required tributary traffic patterns with minimal resource cost (wavelengths and ADMs).This paper studies traffic grooming problem in single hub SONET/WDM networks and extends existing results. We analyze the real deployments, generalize their results, and study the practical special cases. We prove that BLSR/2 would never be more expensive than UPSR under any traffic pattern. We also present the exact minimum costs of uniform traffic in both UPSR and BLSR/2. We give approximation algorithms for optimal grooming of non-uniform traffic. Finally, we consider how to select the line speeds if there are two different line speeds available.
An evolutive architecture reasons as a semiotic, hermeneutic and autopoietic entity
Authors: Albertina Lourenci
Venue: Proceedings of the 4th International Workshop on Principles of Software Evolution (2001)

To build evolutive architectural and implementation code levels isomorphically to a domain level that generates sustainable cities autopoietically is challenging due to: 1) the likening of software to art is still in its infancy [14], 2) the highly interactive nature of the cooperative game exhibited by the experts has just begun to emerge [2] and 3) the needs of higher order reasoning structures mimicking the most evolved human cognitive processes such as reflective abilities, semiotic, hermeneutic and autopoietic reasoning require twining together many bits of fiber from diversified domains in order to see new formations and configurations of possible meaning.
Dominant-Subspace Invariants
Authors: D. Gregory Arnold, Kirk Sturtz, Vince Velten, N. Nandhakumar
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (2000)

Object recognition requires robust and stable features that are unique in feature space. Lie group analysis provides a constructive procedure to determine such features, called invariants, when they exist. Absolute invariants are rare in general, so quasi-invariants relax the restrictions required for absolute invariants and, potentially, can be just as useful in real-world applications. This paper develops the concept of a dominant-subspace invariant, a particular type of quasi-invariant, using the theory of Lie groups. A constructive algorithm is provided that fundamentally seeks to determine an integral submanifold which, in practice, is a good approximation to the orbit of the Lie group action. This idea is applied to the long-wave infrared problem and experimental results are obtained supporting the approach. Other application areas are cited.
Estimating the Complexity of Synthesized Designs from FSM Specifications
Authors: Biswadip Mitra, Preeti Panda, P. Pal Chaudhuri
Venue: IEEE Design Test (1993)

A procedure for estimating the complexity of synthesized designs from finite-state machine (FSM) specifications is described. Incorporating this estimate in the data path synthesis stage allows a trade-off between data path and control logic, resulting in high quality designs in terms of synthesized logic area. It is shown that the estimation process takes 650 to 3000 times less CPU time than the synthesis procedure.
Reusing Specifications in OO Applications
Authors: Roberto Bellinzona, Maria Grazia Fugini, Barbara Pernici
Venue: IEEE Software (1995)

Reuse in the early development phases of an application can reduce the effort of producing specifications and improve their quality. The paper presents the requirement specification phase for object-oriented applications under a reuse approach. Object-oriented specifications are reused by accessing a repository of reusable components and by adapting them to the application requirements. A model for specifications reuse based on the composition approach is presented; the model is also used to encode development knowledge guiding in the specification activity. Specification reuse is supported by a tool to select reusable components and to guide the developer in tailoring the components to the needs of a specific application. The RECAST tool (REquirement Composition And Specification Tool) presented in the paper has functionalities for retrieving reusable components from a repository and functionalities driving the composition and tailoring activities, on the basis of knowledge about the development process stored in the repository.
A Model and Methodology for Hardware-Software Codesign
Authors: Donald E. Thomas, Jay K. Adams, Herman Schmit
Venue: IEEE Design Test (1993)

A behavioral model of a class of mixed hardware-software systems is presented. A codesign methodology for such systems is defined. The methodology includes hardware-software partitioning, behavioral synthesis, software compilation, and demonstration on a testbed consisting of a commercial central processing unit (CPU), field-programmable gate arrays, and programmable interconnections. Design examples that illustrate how certain characteristics of system behavior and constraints suggest hardware or software implementation are presented.
Large Market on the Horizon
Authors: Ken Sakamura
Venue: IEEE Micro (2002)

A typical automobile uses as many microprocessors as an average middle-class American household. In addition, consider that higher-end, more expensive cars use close to 100 micro-processors, according to auto industry insiders. Such comparisons indicate that microprocessors for the automotive industry are becoming a huge market.
Grain Filters
Authors: Vicent Caselles, Pascal Monasse
Venue: Journal of Mathematical Imaging and Vision (2002)

Motivated by operators simplifying the topographic map of a function, we study the theoretical properties of two kinds of &ldquo;grain&rdquo; filters. The first category, discovered by L. Vincent, defines grains as connected components of level sets and removes those of small area. This category is composed of two filters, the maxima filter and the minima filter. However, they do not commute. The second kind of filter, introduced by Masnou, works on &ldquo;shapes&rdquo;, which are based on connected components of level sets. This filter has the additional property that it acts in the same manner on upper and lower level sets, that is, it commutes with an inversion of contrast. We discuss the relations of Masnou's filter with other classes of connected operators introduced in the literature. We display some experiments to show the main properties of the filters discussed above and compare them.
Simulation approaches for strongly coupled interconnect systems
Authors: Joel R. Phillips, L. Miguel Silveira
Venue: Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design (2001)

Shrinking feature sizes and increasing speeds of operation make interconnect-related effects very relevant for current circuit verification methodologies. Reliable and accurate system verification requires the full analysis of circuits together with the environment that surrounds them, including the common substrate, the packaging structures, and perhaps even board information. In this paper we discuss circuit-level simulation algorithms that enable the analysis of the impact of strongly coupled interconnect structures on nonlinear circuit operation, so as to allow reliable and accurate system verification.
The Evitability of Software Patents
Authors: W. Neville Holmes
Venue: Computer (2000)

Responding to Kenneth Nichols' recent article in Computer ("The Age of Software Patents," April 1999, pp. 25-31), the author disputes the two claims: "software patents are neither inherently good nor bad" and "software patents are here to stay." The author thinks software patents are not impersonal technology, but rather a part of an intellectual patent system that is a social artifact. Because all social artifacts are fair game for judgments, software patents fall into that category. Not only does the author think it reasonable that an interested party examine the ethics and morality of any branch of the legal system (of which software patents and copyrights are a part), but he feels professionals in relevant areas have a social duty to do so.After exploring several arguments for software patents and copyrights, the author settles on the evitability of software patents, though he points out this does not ensure they will be avoided. However, he thinks there are good arguments for avoiding software patents for other more practical and just forms of monopoly for software.
Selecting Software Subcontractors
Authors: Jim Nielsen, Ann Miller
Venue: IEEE Software (1996)

Large-scale software projects place special demands on the developing organization and can require much greater participation by outside companies. The IRIDIUM project is one of the most ambitious engineering projects of the past few decades and certainly one of the largest commercial engineering projects ever undertaken.When project planners first conceptualized the IRIDIUM system, they realized that much of the domain expertise for it lay within the US defense and space industry and in other major suppliers around the world. Motorola's Satellite Communications Division began as a brokerage organization, managing many suppliers who were contracted to develop the software.We have learned that suppliers of all sizes can have mature software processes and that mature processes exist among suppliers of every geographic distribution. The most important lesson we have learned is to follow up with suppliers so that they know the importance we place on quality and process improvement.
Improving Information Access for Public Health Professionals
Authors: Sharon Telleen, Elaine Martin
Venue: Journal of Medical Systems (2002)

Fundamental to our protection against biological weapons and the detection of disease outbreaks is the need to strengthen our surveillance systems. Improved electronic communications between local, state, and federal public health agencies provide a way for health officials to share information on unusual disease outbreaks and provide important health alert information. This article describes a model of a partnership between a regional medical library of the National Library of Medicine, a school of public health, and federally qualified community health centers. This project upgraded technology and provided public health professional training on Internet information and resources for local public health agencies.
Effects of Update Techniques on Main Memory Database System Performance
Authors: Le Gruenwald, YuWei Chen, Jing Huang
Venue: IEEE Transactions on Knowledge and Data Engineering (1998)

Update technique is an important issue related to database recovery. In a main memory database environment, transaction execution can be processed without any I/O, and all I/O operations involved are for recovery purposes. The efficiency of update techniques therefore has an important impact on the performance of main memory database systems. In this paper, we compared the techniques of immediate and deferred update based on a database machine, MARS. The simulation results showed that immediate update outperforms deferred update unless system failure is a frequent occurrence.
The TMS34010: An Embedded Microprocessor
Authors: Karl M. Guttag, Thomas M. Albers, Michael D. Asal, Kevin G. Rose
Venue: IEEE Micro (1988)

The authors discuss the TMS34010, a high-performance 32-bit microprocessor with special instructions and hardware for handling the bit-field data and address manipulations often associated with computer graphics. They give a history of embedded microprocessors and examine the wide range of processors and applications covered by that term. They provide an overview of the internal architecture of the TMS34010 and discuss the choice of feature set in its design. Although it is aimed at graphics systems, the processor's large address reach, bit-field processing, and DRAM (dynamic random-access memory) interface make it suitable for many other embedded processing applications.
Model reduction of variable-geometry interconnects using variational spectrally-weighted balanced truncation
Authors: Payam Heydari, Massoud Pedram
Venue: Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design (2001)

This paper presents a spectrally-weighted balanced truncation technique for RLC interconnects, a technique needed when the interconnect circuit parameters change as a result of variations in the manufacturing process. The salient features of this algorithm are the inclusion of parameter variations in the RLC interconnect, the guaranteed stability of the reduced transfer function, and the availability of provable frequency-weighted error bounds for the reduced-order system. This paper shows that the balanced truncation technique is an effective model-order reduction technique when variations in the circuit parameters are taken into consideration. Experimental results show that the new variational spectrally-weighted balanced truncation attains, on average, 20% more accuracy than the variational Krylov-subspace-based model-order reduction techniques while the run-time is also, on average, 5% faster.
Programming books
Authors: Richard Mateosian
Venue: IEEE Micro (2002)

This time, I look at books designed to help you program in Java and in Microsoft's C# language for the .NET framework.
A Performance Analysis of Pragmatic MPSK TCM
Authors: J. R. Farserotu
Venue: Wireless Personal Communications: An International Journal (1998)

The performance of 8-PSK, 16-PSK and 32-PSK TCM are examined in the additive white gaussian noise (AWGN), Rician fading and Rayleigh fading channels. The TCM is implemented using the &rsquo;&rsquo;Pragmatic Approach&lsquo;&lsquo; to TCM based on the common rate &frac12;, constraint length 7, 64-state convolutional code. The analytic performance model has been enhanced to account for the unencoded bit(s) resulting from implementation of TCM using the &rsquo;&rsquo;Pragmatic Approach&lsquo;&lsquo;. Averaging of the Euclidean error weight profiles is also employed. The results provide an improved upper bound on published data from simulations and measurements. The results are then employed to facilitate the evaluation of a concatenated Reed-Solomon (RS) MPSK TCM code, as well as, TCM with diversity in the form of symbol repetition.
A compiler-directed cache coherence scheme with improved intertask locality
Authors: Lynn Choi, Pen Chung Yew
Venue: Proceedings of the 1994 ACM/IEEE conference on Supercomputing (1994)

In this paper, we introduce a compiler-directed coherence scheme which can exploit most of the temporal and spatial locality across task boundaries. It requires only an extended tag field per cache word, one modified memory access instruction, and a counter called the epoch counter in each processor. By using the epoch counter as a system-wide version number, the scheme simplifies the cache hardware of previous version control [5] or timestamp-based schemes [12], but still exploits most of the temporal and spatial locality across task boundaries. We present a compiler algorithm to generate the appropriate memory access instructions for the proposed scheme. The algorithm is based on a data flow analysis technique. It identifies potential stale references by examining memory reference patterns in a source program.
Estimating the Economic Benefits of DFT
Authors: Kenneth M. Butler
Venue: IEEE Design Test (1999)

Some people involved in the design and manufacturing of integrated circuits might argue that testability features should not be added to complex or high volume products. These arguments are based on economic analyses which are believed to show that the costs incurred when incorporating design for testability are not recouped in the manufacturing process. However, there are a number of cost avoidance and benefit terms that are often neglected in such calculations. In this artic;e, methods are suggested to estimate values for several of those additional terms. We give as an example the results of the application of the model to the TI TMS320C80, also known as the MVP.
Applying Testability Analysis for Integrated Diagnostics
Authors: John W. Sheppard, William R. Simpson
Venue: IEEE Design Test (1992)

The use of measures that evaluate system testability at a specific time during system design is demonstrated. The measures were detailed in a previous article (see ibid., vol.9, no.1, p.40-54 (1992)). The measures improve testability as part of an interactive process. The objective in applying the testability measures is to minimize ambiguity in replaceable unit groups while minimizing the amount of testing and the number of tests. The problems of excess information provided by a test set, ambiguity arising from deficiencies in the test set, multiple failure, and the test set's effect on false-alarm tolerance are examined. The analysis techniques are applied to a specific example, the antitank missile launcher, and the ways in which the testability of that system might be improved are discussed.
The Challenge of Building Process-Control Software
Authors: Nancy G. Leveson
Venue: IEEE Software (1990)

Process control is explained, and it is shown why trying to build process-control software using the same approaches developed and used for data-processing and information-system software will lead to failure. Rather than offering solutions to the problems inherent in developing process-control software, the author identifies the aspects of the problem on which to focus attention and the tasks that are ripe for solution. In particular, modeling and analysis, human-computer interaction, and risk evaluation are discussed.
Interleaved Memory Function Interpolators with Application to an Accurate LNS Arithmetic Unit
Authors: D. M. Lewis
Venue: IEEE Transactions on Computers (1994)

This paper describes a new method for polynomial interpolation in hardware, with advantages demonstrated by its application to an accurate logarithmic number system (LNS) arithmetic unit. The use of an interleaved memory reduces storage requirements by allowing each stored function value to be used in interpolation across several segments. This strategy can be shown to always use fewer words of memory than an optimized polynomial with stored polynomial coefficients. Interleaved memory function interpolators are then applied to the specific goal of an accurate logarithmic number system arithmetic unit. Many accuracy requirements for the LNS arithmetic unit are possible. Although a round to nearest would be desirable, it cannot be easily achieved. The goal suggested is to insure that the worst case LNS relative error is smaller than the worst case floating point (FP) relative error. Using the interleaved memory interpolator, the detailed design of an LNS arithmetic unit is performed using a second order polynomial interpolator including approximately 91K bits of ROM. This arithmetic unit has better accuracy and less complexity than previous LNS units.
Comparing, Contrasting ISO 9001 and the SEI Capability Maturity Model
Authors: R. C. Bamford, W. J. Deibler,  II
Venue: Computer (1993)

The Carnegie Mellon University Software Engineering Institutes's (SEI's) five-level framework for engineering practices in a successful software development organization and the International Organization for Standardization's ISO 9000 series of standards, which describes the key requirements for companies and organizations doing business in the European Community, are reviewed. The origins of the models are discussed, and the two models are compared and contrasted.
Fighting Complexity in Computer Systems
Authors: Alexander D. Stoyen
Venue: Computer (1997)

From the earliest hardware and software through the latest, complexity has been something computer engineers, scientists and programmers have had to fight. Important fields of research and technology have originated, developed, or matured as side-effects of this fight. Some of these fields, such as computational complexity and planar graphs, address fundamental theories of broad significance. Others, such as reduced instruction set architectures, compiler-compilers, and high-level languages, are more applied. Other advances have actually contributed to complexity. In the area of building predictable real-time systems, for example, advances in computer performance (direct memory access, hierarchical storage, multiprocessing, and so on1) have led only to statistical performance improvements. But predictable, deterministic performance is still elusive. Some would argue that the easy availability of generic OS services may be responsible for a very significant increase in application complexity, not to mention a decrease in program robustness and correctness. Fighting complexity is not a futile task. Despite chronic lack of attention (and thus funding), much-needed complexity-fighting methods and tools will emerge. Eventually, a new generation of computer scientists, engineers, and programmers will emerge who are skilled at using these methods and tools. One day, the invention of a supertool will be as well-received as the construction of a supercomputer. Until that day, we have quite a bit of work to do. rom forest to finished product, wood moves through a series of stages that are little changed from sawmill practices of a hundred years ago. Many of the subjective decisions workers make along the way directly affect the quality and yield of the wood products. Wood grows more valuable and labor more expensive every day. At the same time, technology now exists to provide more complete information to decision makers.
Acquisition of Symbolic Description from Flow Fields: A New Approach Based on a Fluid Model
Authors: Hiroki Nogawa, Yoshikazu Nakajima, Yoshinobu Sato, Shin'ichi Tamura
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1997)

We propose a new model and new algorithm for acquiring symbolic description from a flow field. Our model is derived from physical data, and our algorithm is based on holomorphic complex function theory. Application of this method enables both qualitative and quantitative information to be obtained from a flow field. We also demonstrate the robustness of our method using a simulated flow field and a real image sequence.
Arise: Operating PCTE Over a Wide-Area Network
Authors: Chris W. Loftus, David R. Pugh, Edel M. Sherratt
Venue: IEEE Software (1993)

A case study in which the feasibility of operating the Portable Common Tools Environment (PCTE) across a wide-area network was determined as part of the Arise project is discussed. Simple benchmarks and experiments with a configuration-management application indicate that a wide-area PCTE is feasible, provided there is a suitable data-distribution strategy.