ppxscal/embedding_network huggingface dataset:
Identifying project scope
Authors: Philip Lelle
Venue: ACM SIGDOC Asterisk Journal of Computer Documentation (1977)

After the initial two months of gathering documents and identifying sources, determination of the scope of the project was begun. The BLS/OWS (Bureau of Labor Statistics, Occupational Wage Survey) System involves several hundred people, distributed in Washington and eight Regional Offices. However, only a few dozen people are totally involved with the OWS System. There are many other Surveys conducted by BLS and the greater portion of time of those peripherally involved in OWS is spent on non-OWS matters. In terms or information flow, between the authors/producers of the OWS System and the users, the direction had been a "pull" by the user's from the Systems group. One of the volumes to be developed had to change this situation, turn it around to "push" the information out to the user. Another volume was defined to be directed towards people in management positions both in BLS and other agencies, and would contain general information about the OWS System. Finally, the System's documentation required for maintenance and running production would be a volume each. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
Spam Detection Using Text Clustering
Authors: Minoru Sasaki, Hiroyuki Shinnou
Venue: Proceedings of the 2005 International Conference on Cyberworlds (2005)

We propose a new spam detection technique using the text clustering based on vector space model. Our method computes disjoint clusters automatically using a spherical k-means algorithm for all spam/non-spam mails and obtains centroid vectors of the clusters for extracting the cluster description. For each centroid vectors, the label('spam' or 'non-spam') is assigned by calculating the number of spam email in the cluster.When new mail arrives, the cosine similarity between the new mail vector and centroid vector is calculated. Finally, the label of the most relevant cluster is assigned to the new mail. By using our method, we can extract many kinds of topics in spam/non-spam email and detect the spam email efficiently. In this paper, we describe the our spam detection system and show the result of our experiments using the Ling-Spam test collection.
CHRONOS: an authenticated dictionary based on skip lists for timestamping systems
Authors: Kaouthar Blibech, Alban Gabillon
Venue: Proceedings of the 2005 workshop on Secure web services (2005)

Skip Lists were first used as data structures for their simple implementation and optimal update and search time. Goodrich [7][8] was the first to propose an authenticated dictionary based on skip lists. More recently, Maniatis and Baker [10][11][12] have proposed an authenticated append only dictionary based on perfect skip lists. In this paper, we propose an authenticated append only dictionary which offers better performances than the previous proposals. Moreover this dictionary allows comparing the relative order of elements. Such a dictionary could be used for timestamping purposes.
Combination and generation of parallel feature streams for improved speech recognition
Authors: Xiang Li
Venue:  (2005)

The combination of information from parallel features that provide complementary information about the speech signal generally improves speech recognition accuracy. There are two issues associated with parallel feature combination: the specific method of combining the parallel features, and the nature of the parallel features themselves. These two issues jointly determine the performance of an information combination system. While a great deal of work has already been expended in the area of information combination, the techniques developed in previous studies are not without their drawbacks and could be further improved. First, most prior activity has focused on the combination method itself, with relatively little attention paid to the issue of designing parallel features for optimal combination performance. Because the benefit of combination ultimately derives from the different information provided by the parallel features, a more judicious way of designing parallel features that specifically tailors them to suit the type of combination procedure used should improve the combined recognition accuracy. In addition, conventional information combination methods can be further refined to better utilize the information that is contained in the parallel features. The work in this thesis addressed the two issues cited above. We describe two new information combination schemes, lattice combination, which operates on the outputs of the individual recognition systems, and weighted probability combination, which operates at an earlier stage where recognition probabilities are evaluated. We also describe a new way to combine directly the probabilities of untied HMM states. Both the lattice combination method and the two new probability combination methods are shown to be effective in providing consistent improvements over conventional combination methods for various speech recognition tasks. The second part of this thesis concerns a new way of generating parallel linearly-derived features that directly optimizes their performance when combined. These features are designed in a way that maximizes the normalized acoustic likelihood of the observed speech in the combined system, which can be directly related to speech recognition accuracy. Our new parallel feature generation algorithm consistently outperform conventional parallel feature sets in various speech recognition tasks. In addition, we can achieve even further improvement when apply multiple techniques developed in this thesis simultaneously.
Design and Optimization of Low-Voltage Low-Power Quasi-Floating Gate Digital Circuits
Authors: Kenneth A. Townsend, James W. Haslett, Krzysztof Iniewski
Venue: Proceedings of the Fifth International Workshop on System-on-Chip for Real-Time Applications (2005)

This paper explores the design and optimization of Quasi-Floating Gate MOS techniques to low-voltage/low-powerdigital circuitry. The simulated power consumption of standard CMOS gates is compared to that of QFGMOS implementations in a 0.18µm process for different supply voltages and device sizes. A 0.4V VDD full-adder biased for propagation delay similar to that of 0.8V CMOS is simulated and shown to consume 1.2µW for a 50MHz input, representing more than a 50% power reduction over the CMOS equivalent. A divide-by-16 circuit designed for operation at a maximum frequency of 400MHz uses 25µW, 45µW, and 75µW for supplies of 0.4V, 0.6V and 0.8V.
AUTO-MA-TIC WORD DI-VI-SION
Authors: Steven L. Huyser
Venue: ACM SIGDOC Asterisk Journal of Computer Documentation (1976)

In a computerized word processing environment it is common to find the software performing pseudo-editorial tasks, the most prevalent of which is the automatic division of words at the end of justified lines. The purpose of such automatic word division is the minimization of white space in the copy while still maintaining a high degree of readability. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
"Flea-flicker" Multipass Pipelining: An Alternative to the High-Power Out-of-Order Offense
Authors: Ronald D. Barnes, Shane Ryoo, Wen-mei W. Hwu
Venue: Proceedings of the 38th annual IEEE/ACM International Symposium on Microarchitecture (2005)

As microprocessor designs become increasingly powerand complexity-conscious, future microarchitectures must decrease their reliance on expensive dynamic scheduling structures. While compilers have generally proven adept at planning useful static instruction-level parallelism, relying solely on the compiler¿s instruction execution arrangement performs poorly when cache misses occur, because variable latency is not well tolerated. This paper proposes a new microarchitectural model, multipass pipelining, that exploits meticulous compile-time scheduling on simple in-order hardware while achieving excellent cache miss tolerance through persistent advance preexecution beyond otherwise stalled instructions. The pipeline systematically makes multiple passes through instructions that follow a stalled instruction. Each pass increases the speed and energy efficiency of the subsequent ones by preserving computed results. The concept of multiple passes and successive improvement of efficiency across passes in a single pipeline distinguishes multipass pipelining from other runahead schemes. Simulation results show that the multipass technique achieves 77% of the cycle reduction of aggressive out-of-order execution relative to in-order execution. In addition, microarchitectural-level power simulation indicates that benefits of multipass are achieved at a fraction of the power overhead of full dynamic scheduling.
Pre-service teachers' beliefs and experiences with computing technology and male centered computing culture
Authors: Hank Bromley
Venue:  (2005)

This dissertation examines White female pre-service teachers' perceptions and experiences in relation to computers and male-centered computing culture. The data collected in this study came through the methodological lens of qualitative research. During the fall 2002 and spring 2003 terms, I conducted in-depth individual interviews and focus group interviews with twenty White female pre-service teachers at Border College, a small independent coeducational institution of higher learning. The study was informed by feminist research methods, as gender was put at the forefront of the research process. The data reveal that the majority of participants hold a non-critical view of computing technology and its male-centered culture as well as lack the confidence to utilize computers within elementary classrooms. Their stories suggest they have internalized technocentric discourses, which position computing technology as an omnipotent artifact, allegedly having the power in and of itself to improve society as well as the power to wash away pervasive social ills, such as poverty, racism and sexism. Moreover, the participants' narratives establish that their lack of confidence and critical insight vis-&agrave;-vis technology is mediated by the lack of educative experiences at Border College, within elementary classrooms, and in their social worlds. In juxtaposition, several participants held a more critical, informed view of technology and its masculine culture. By reflecting upon their lived experiences in the business world, their friends' and families' computing practices, and their own computing use, the participants determined that corporate entities are the main beneficiaries of computing in today's society. For several future teachers, the research process itself served as an educative site. By the end of this study, they garnered newfound insights in relation to the entrenched nature of gender inequity in today's schools and society. These women seem to posses the critical insight needed to create symmetrical computing relationships in the classroom, to inform youth of the social and economic processes which influence how computers are used in various social contexts, and to dismantle systemic barriers and unjust practices that fuel social and educational inequalities across the globe.
A framework for the design, synthesis and cycle-accurate simulation of multiprocessor networks
Authors: Raymond R. Hoare, Zhu Ding, Shenchih Tung, Rami Melhem, Alex K. Jones
Venue: Journal of Parallel and Distributed Computing (2005)

This paper introduces a framework for the design, synthesis and cycle-accurate simulation for parallel computing networks of 128+ processors. In order to accurately characterize the network, we present a bottom-up design methodology in which each of the components are designed using a hardware description language and synthesized to an FPGA for performance estimation of the final ASIC implementation. The components are then integrated to form a parallel computing network and simulated using a cycle-accurate simulator with network traffic described by command files. This enabled us to simulate various switching techniques, three of which are presented in this paper: wormhole switching, circuit switching and a newly introduced technique called predictive circuit switching. In our experiments, four different representational traffics are generated for our simulation and, to show the flexibility of this model, we vary the cable lengths and thus their latency for all four test cases. Our results show that this hardware design, synthesis and cycle-accurate simulation methodology provides a useful method for evaluating design tradeoffs in parallel networks. A non-blocking queue, with up to 128 internal queues, and a real-time bandwidth scheduler, for up to 128 ports, were designed in hardware with hardware synthesis results presented. From our network simulation results, we conclude that predictive circuit switching exceeds the performance of packet switching for highly predictable traffic, like collective communications, and for heavily loaded unpredictable traffic with small packet sizes. As expected, predictive circuit switching significantly underperforms both packet and circuit switching for unpredictable traffic.
The Cut Delay Fault Model for Guiding the Generation of n-Detection Test Sets for Transition Faults
Authors: Irith Pomeranz, Sudhakar M. Reddy
Venue: Proceedings of the 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (2006)

We define a new transition fault model to guide the generation of n -detection test sets for transition faults. The model is referred to as the cut delay fault model. Under a cut delay fault, a transition fault on a line c 0 is detected while certain other lines in the circuit assume specific values. The lines involved in a cut delay fault form a cut or a subset of a cut. Each transition fault is associated with several combinations of values on the cut, and it is thus detected by several different tests.
Camera-Marker Alignment Framework and Comparison with Hand-Eye Calibration for Augmented Reality Applications
Authors: Gerald Bianchi, Christian Wengert, Matthias Harders, Philippe Cattin, Gabor Szekely
Venue: Proceedings of the 4th IEEE/ACM International Symposium on Mixed and Augmented Reality (2005)

An integral part of every augmented reality system is the calibration between camera and camera-mounted tracking markers. Accuracy and robustness of the AR overlay process is greatly influenced by the quality of this step. In order to meet the very high precision requirements of medical skill training applications, we have set up a calibration environment based on direct sensing of LED markers. A simulation framework has been developed to predict and study the achievable accuracy of the backprojection needed for the scene augmentation process. We demonstrate, that the simulation is in good agreement with experimental results. Even if a slight improvement of the precision has been observed compared to well-known hand-eye calibration methods, the subpixel accuracy required by our application cannot be achieved even when using commercial tracking systems providing marker positions within very low error limits.
Calculation of Lossy Dielectric Multilayer Filter Response
Authors: P. A. Reiser
Venue: Journal of Scientific Computing (2005)

An algorithm for calculating the response of a multilayer optical filter to monochromatic plane wave radiation at arbitrary angles of incidence is developed and implemented. The layered media are assumed to be arranged in a planar stack, and each medium is assumed to be a scalar, linear, isotropic, homogeneous lossy dielectric characterized by generally complex values of the electrical permittivity, magnetic permeability and conductivity. Previously described techniques are less general, or are sometimes not clear about the degree of generality allowed in the parameters describing the wave and the media. Other descriptions focus on special cases which actually serve to complicate the mathematics and generate unwieldy mathematical expressions. This paper presents a more general derivation of the expressions for the total reflectance and transmittance of a multilayer optical filter, emphasizing the constraints placed upon the various parameters as a result of simplifying assumptions, and describing the algorithm in a simple and well-known 2× 2 matrix formulation. An implementation of the algorithm in the IDL programming language is provided.
Application-oriented Context Modeling and Reasoning in Pervasive Computing
Authors: Xin Lin, Shanping Li, Zhaohui Yang, Wei Shi
Venue: Proceedings of the The Fifth International Conference on Computer and Information Technology (2005)

Context-awareness is considered as a key problem in designing more adaptive applications in pervasive computing community. Context modeling and reasoning, which deal with high-level abstraction and inference of pervasive contextual information, are important research areas of context-awareness computing. Efforts have been put into these two areas and several prototype systems have been proposed. However, the huge amounts of contextual information in pervasive environment make existing systems inefficient, even useless. In this paper, we propose Enhanced Application-oriented Context Modeling and Reasoning (EACMR) system to deal with this problem. In EACMR system, we develop a context ontology (ACMRONT) to model the contexts in the pervasive computing. Different from previous researches, a context filter is designed to classify contexts by their importance. To promote the performance of the system, the reasoner in EACMR only deals with the applicationrelated contextual information rather than all the available contextual information. Experiments about EACMR system demonstrate its higher performance than those of previous systems.
Web-based Application Services Composition for e-Business
Authors: Mei Yi, Chen Zi-chen, Zhang Fei
Venue: Proceedings of the IEEE International Conference on e-Business Engineering (2005)

Web Service is becoming an important approach for enterprises to implement their business applications on Internet. However, most of Web services are built based on special business function, they are isolated and do not address the information communication for integrating the business processes. In this paper, we propose a new composition framework, which comprises the web-based semantic definition for business messages, the methodology of constructing visualized integrated processes based on Business Process Execution Language (BPEL), and the strategy of vocabulary-based business rules for e- Business. In addition, we present a case study that demonstrates the way of composing different kind of application services to a uniform service.
A Utility-based Distributed Maximum Lifetime Routing Algorithm forWireless Networks
Authors: Yuan Xue, Yi Cui, Klara Nahrstedt
Venue: Proceedings of the Second International Conference on Quality of Service in Heterogeneous Wired/Wireless Networks (2005)

Energy efficient routing is a critical problem in multihop wireless networks due to the severe power constraint of wireless nodes. Despite its importance and many research efforts towards it, a distributed routing algorithm that maximizes network lifetime is still missing. To address this problem, we propose a novel utility-based nonlinear optimization formulation to the maximum lifetime routing problem. Based on this formulation, we further present a fully distributed, localized routing algorithm, which is proved to converge to the optimal point, where the network lifetime is maximized. Solid theoretical analysis and simulation results are presented to validate our solution.
Incorporating with Recursive Model Training in Time Series Clustering
Authors: Jiangjiao Duan, Wei Wang, Bing Liu, Yongsheng Xue, Haofeng Zhou, Baile Shi
Venue: Proceedings of the The Fifth International Conference on Computer and Information Technology (2005)

Model-based clustering is one of the most important ways for time series data mining. However, the process of clustering may encounter several problems. In this paper, a novel clustering algorithm of time-series which incorporates recursive Hidden Markov Model(HMM) training is proposed. Our contributions are as follows: 1) We recursively train models and use these model information in the process agglomerative hierarchical clustering. 2) We built HMM of timeseries clusters to describe clusters. To evaluate the effectiveness of the algorithm, several experiments are conducted on both synthetic data and real world data. The result shows that the proposed approach can achieve better performance in correctness rate than the traditional HMM-based clustering algorithm.
Architecture Recovery and Abstraction from the Perspective of Processes
Authors: Li Qingshan, Chu Hua, Hu Shengming, Chen Ping, Zhao Yun
Venue: Proceedings of the 12th Working Conference on Reverse Engineering (2005)

For the increasing complexity of software systems, the main work of software development, maintenance and evolution has been focused on the comprehension of the existing systems. In order to help users comprehend at all aspects and levels of a target system, it is necessary to reversely recover and abstract its high-level architecture, which can reflect the framework and holistic behavioral features of the software system. This paper deals with the problems of architecture recovery from the perspective of process. An approach of extracting Process Structure Graph (PSG) from a target system is presented based on the features of the relations among processes on UNIX platform. First, the static code fragment of a dynamic process can be recognized, then a mapping algorithm that can identify the correspondence between the dynamic process ID and the static process module is given. On the basis of the algorithm, an incremental construction algorithm of PSG and a slicing algorithm for class structure in a process module are implemented respectively. The experimental results show that the extracted PSG is correct, effective and can reflect the high-level structure of the target system in detail at the process level.
QCA-Based Majority Gate Design under Radius of Effect-Induced Faults
Authors: Zachary D. Patitz, Nohpill Park, Minsu Choi, Fred J. Meyer
Venue: Proceedings of the 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (2005)

This paper presents reliable QCA cell structures for designing single clock-controlled majority gates with a tolerance to radius of effect-induced faults, for use as a basic building component for carry look-ahead adder. Realizable quantum computing is still well in the future due to the complexity of the quantum mechanics that govern them. In this regard, QCA-based system design is a challenging task since each cell¿s state must interact with all the cells that are in its energy-effective range in its clocking zone, referred to as its radius of effect. This paper proposes a design approach for majority gates to overcome the constraints imposed by the radius of effect of each cell with respect to clock controls. Radius of effect induces faults that lead to constraints on the clocking scheme of majority gates. We will show majority gate structures that will operate with multiple radius of effect-induced faults under a single clock control. The proposed design approach to a single clock controlled majority gate will ultimately facilitate more efficient and flexible clocking schemes for complex QCA designs.