ppxscal/embedding_network huggingface dataset:
Computer-generated design of electric circuits
Authors: Kwa-Sur Tam, Michael Besso, Renuka Racha
Venue: Proceedings of the 1st international conference on Industrial and engineering applications of artificial intelligence and expert systems - Volume 1 (1988)

An artificial intelligence-based design automation methodology for computer-generated design of electric circuit is proposed. Given the requirements of the circuit to be designed, a program using this approach can generate a set of candidate circuits, evaluate them according to the specified requirements, and recommend the most suitable circuit(s). A PROLOG program (called VMD) implementing this approach has been developed for the design of voltage multiplier circuits. Issues pertaining to the usage of this approach are discussed in this paper.
Computational fluid dynamic-current capabilities and directions for the future
Authors: P. Kutler
Venue: Proceedings of the 1989 ACM/IEEE conference on Supercomputing (1989)

Computational fluid dynamics (CFD) has made great strides in the detailed simulation of complex fluid flows, including some of those not before understood. It is now being routinely applied to some rather complicated problems, and starting to impact the design cycle of aerospace flight vehicles and their components. It is being used to complement and is being complemented by experimental studies. Several examples are presented in the paper to illustrate the current state-of-the-art. Included in this paper is a discussion of the barriers to accomplishing the basic objective of numerical simulation. In addition, the directions for the future in the discipline of computational fluid dynamics are addressed.
Scale-Space for Discrete Signals
Authors: T. Lindeberg
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1990)

A basic and extensive treatment of discrete aspects of the scale-space theory is presented. A genuinely discrete scale-space theory is developed and its connection to the continuous scale-space theory is explained. Special attention is given to discretization effects, which occur when results from the continuous scale-space theory are to be implemented computationally. The 1D problem is solved completely in an axiomatic manner. For the 2D problem, the author discusses how the 2D discrete scale space should be constructed. The main results are as follows: the proper way to apply the scale-space theory to discrete signals and discrete images is by discretization of the diffusion equation, not the convolution integral; the discrete scale space obtained in this way can be described by convolution with the kernel, which is the discrete analog of the Gaussian kernel, a scale-space implementation based on the sampled Gaussian kernel might lead to undesirable effects and computational problems, especially at fine levels of scale; the 1D discrete smoothing transformations can be characterized exactly and a complete catalogue is given; all finite support 1D discrete smoothing transformations arise from repeated averaging over two adjacent elements (the limit case of such an averaging process is described); and the symmetric 1D discrete smoothing kernels are nonnegative and unimodal, in both the spatial and the frequency domain.
Programming expert systems at the K-tree level
Authors: G. Kiernam, A. Koltun, E. Schwartz
Venue: Issue 109 (July 1989) (1989)

In working with the construction of expert systems over the past several years we have had two main goals: the development of useful expert system applications and the development of general methods for designing and implementing expert system applications. We have described how K-Trees were used to construct an expert system for advising mathematics and computer science majors about course selection. [1] More recent work on a new expert system has shown that the K-Tree method is a general design and programming technique that can be extended to work with applications involving reasoning with uncertainty.
The database group at ISS, National University of Singapore
Authors: D. Narasimhalu
Venue: ACM SIGMOD Record (1989)

The database group is headed by Dr. A Desai Narasimhalu. It comprises nine staff members, together with a collaborative member and three undergraduate students from the Department of Information Systems and Computer Science. The group's main research areas are listed below.
Real quantifier elimination is doubly exponential
Authors: James H. Davenport, Joos Heintz
Venue: Journal of Symbolic Computation (1988)

We show that quantifier elimination over real closed fields can require doubly exponential space (and hence time). This is done by explicitly constructing a sequence of expressions whose length is linear in the number of quantifiers, but whose quantifier-free expression has length doubly exponential in the number of quantifiers. The results can be applied to cylindrical algebraic decomposition, showing that this can be doubly exponential. The double exponents of our lower bounds are about one fifth of the double exponents of the best-known upper bounds.
A parallel spline collocation-capacitance method for elliptic partial differential equations
Authors: C. C. Christara, E. N. Houstis, J. R. Rice
Venue: Proceedings of the 2nd international conference on Supercomputing (1988)

We consider the integration of a domain decomposition technique with a new quadratic spline collocation discretization scheme for solving second order elliptic boundary value problems on rectangles. The domain decomposition method is based on the capacitance matrix technique. Due to the limitations of existing methods for solving the corresponding capacitance problem, we develop and analyze iterative methods for its solution. The optimum partitioning and mapping of the underlying computation is studied on hypercube architectures. A numerical realization of this method is presented on NCUBE/7 (128 processors) and its comparative efficiency is measured. The resulting parallel quadratic spline collocation-capacitance method is seen to be efficient in achieving accurate solutions and in using parallel architectures.
Performance tradeoffs in cache design
Authors: S. Prybylski, M. Horowitz, J. Hennessy
Venue: ACM SIGARCH Computer Architecture News (1988)

Cache memories have become common across a wide range of computer implementations. To date, most analyses of cache performance have concentrated on time independent metrics, such as miss rate and traffic ratio. This paper presents a series of simulations that explore the interactions between various organizational decisions and program execution time. We investigate the tradeoffs between cache size and CPU/Cache cycle time, set associativity and cycle time, and between block size and main memory speed. The results indicate that neither cycle time nor cache size dominates the other across the entire design space. For common implementation technologies, performance is maximized when the size is increased to the 32KB to 128KB range with modest penalties to the cycle time. If set associativity impacts the cycle time by more than a few nanoseconds, it increases overall execution time. Since the block size and memory transfer rate combine to affect the cache miss penalty, the optimum block size is substantially smaller than that which minimizes the miss rate. Finally, the interdependence between optimal cache configuration and the main memory speed necessitates multi-level cache hierarchies for high performance uniprocessors.
Reducing Null Messages in Misra's Distributed Discrete Event Simulation Method
Authors: Ronald C. De Vries
Venue: IEEE Transactions on Software Engineering (1990)

Consideration is given to the implementation of distributed discrete-event simulation (DDES) using what has been commonly called the Misra approach, after one of its inventors. A major problem with DDES is that deadlock can occur. Therefore, DDES algorithms must either avoid deadlock in the first place, or detect the existence of deadlock when it does occur and eliminate it. J. Misra (1986) proposes the use of null messages as one way to circumvent the deadlock problem. However the number of null messages can become quite large. Methods are presented for reducing the number of null messages through the prediction of channel times. A framework is presented on the basis of which distributed discrete-event simulation can be built for applications that can be decomposed into feedforward and feedback networks.
Queueing analysis of finite buffer token networks
Authors: A. Ganz, I. Chlamtac
Venue: ACM SIGMETRICS Performance Evaluation Review (1988)

This paper introduces analytic models for evaluating demand assignment protocols in realistic finite buffer/finite station network configurations. We present a solution for implicit and explicit token passing systems enabling us to model local area networks, such as Token Bus. We provide, for the first time, a tractable approximate solution by using an approach based on restricted occupancy urn models. The presented approximation involves the solving of linear equations whose number is linear and equal only to the number of buffers in the system. It is demonstrated that in addition to its simplicity, the presented approximation is also highly accurate.
EXAPL (Expert System Based on APL) and its application to chemical analysis
Authors: T. Nishikawa
Venue: ACM SIGAPL APL Quote Quad (1987)

EXAPL (EXpert system based on APL) is described and its application to chemical analysis is presented. The system supports two types of production rule, the if-then-structure and the case-structure. The main advantage of EXAPL resides in its compactness and easiness to use. EXAPL uses no specific inference engine, because it directly uses the APL facility via functions corresponding to the EXAPL keywords, &ldquo;IF&rdquo;, &ldquo;AND&rdquo;, &ldquo;THEN&rdquo;, &ldquo;CASE&rdquo;, etc. Consequently, the system nucleus is quite small in contrast with that of LISP or PROLOG. EXAPL is shown to be potent and practical in application to a chemical analytical data system, ARTHUR, and our plans to develop further a simple APL-based version, EASYARTHUR, for use by novices, are outlined.
A transition from bubble to shell sort
Authors: Joseph B. Klerlein, Curtis Fullbright
Venue: ACM SIGCSE Bulletin (1988)

This paper describes a sorting method obtained by modifying bubble sort. This new sort, while still inefficient, sets the stage for Shell sort. It also raises some interesting questions which students can investigate.
WATMIMS JIT/KANBAN benchmark summary and recommendations
Authors: K. N. McKay, M. Rooks
Venue: Proceedings of the 21st conference on Winter simulation (1989)

Just-In-Time/KANBAN manufacturing concepts result in models that must simulate pre-process inventories at each stage, delayed processing until downstream operations indicate work should be performed, and comprehensive analysis on production orders (make/move Kanbans) versus inventory and production activities. This style of manufacture is different from the normal push environment where machines will work on anything in the work queue, send the finished parts to the next stage, and keep working until the pre-process inventory queue is exhausted; the material arriving is itself an order to make parts. The two styles imply different control logic and statistics. Many packages support push production directly, and easily provide the necessary controls and information, but there are no packages known to the authors that directly support JIT-pull. It is the purpose of this paper to report on a JIT-pull benchmark comparison of eight simulation tools and the resulting methodological recommendations.
AGM: a dataflow database machine
Authors: Lubomir Bic, Robert L. Hartmann
Venue: ACM Transactions on Database Systems (TODS) (1989)

In recent years, a number of database machines consisting of large numbers of parallel processing elements have been proposed. Unfortunately, there are two main limitations in database processing that prevent a high degree of parallelism; these are the available I/O bandwidth of the underlying storage devices and the concurrency control mechanisms necessary to guarantee data integrity. The main problem with conventional approaches is the lack of a computational model capable of utilizing the potential of any significant number of processing elements and storage devices and, at the same time, preserving the integrity of the database. This paper presents a database model and its associated architecture, which is based on the principles of data-driven computation. According to this model, the database is represented as a network in which each node is conceptually an independent, asynchronous processing element, capable of communicating with other nodes by exchanging messages along the network arcs. To answer a query, one or more such messages, called tokens, are created and injected into the network. These then propagate asynchronously through the network in search of results satisfying the given query. The asynchronous nature of processing permits the model to be mapped onto a computer architecture consisting of large numbers of independent disk units and processing elements. This increases both the available I/O bandwidth as well as the processing potential of the machine. At the same time, new concurrency control and error recovery mechanisms are necessary to cope with the resulting parallelism.
An algorithm for microcode compaction of VHDL behavioral descriptions
Authors: Jayaram Bhasker
Venue: ACM SIGMICRO Newsletter (1988)

We present as algorithm to transform a sequential (vertical microcode) VHDL (VHSIC Hardware Description Language) behavioral description of a digital system design into a parallel (horizontal microcode) VHDL description. Data dependency analysis is performed on the sequential code to identify the parallelism within the code. This parallel VHDL code is targeted for synthesis by the MIMOLA synthesis system.
Preserving and using context information in interprocess communication
Authors: Larry L. Peterson, Nick C. Buchholz, Richard D. Schlichting
Venue: ACM Transactions on Computer Systems (TOCS) (1989)

When processes in a network communicate, the messages they exchange define a partial ordering of externally visible events. While the significance of this partial order in distributed computing is well understood, it has not been made an explicit part of the communication substrate upon which distributed programs are implemented. This paper describes a new interprocess communication mechanism, called Psync, that explicitly encodes this partial ordering with each message. The paper shows how Psync can be efficiently implemented on an unreliable communications network, and it demonstrates how conversations serve as an elegant foundation for ordering messages exchanged in a distributed computation and for recovering from processor failures.
Drama and personality in user interface design
Authors: S. J. Mountford, B. Buxton, M. Krueger, B. Laurel L. Vertelney
Venue: ACM SIGCHI Bulletin (1989)

The title of this panel immediately leaps out as being out of place. Of all the things that come to mind when one thinks of computers and user interfaces, drama and personality are among the last. The point here is not to make using computers more dramatic, per se, but to learn and borrow from the performing arts about techniques that could improve main stream interface design. The contributions described in this panel are borrowed from the theatrical world, film producing and music. In all the panelists work, the user is at the very center of creating the actual user interface experience, either through direct user participation or via engaging the individual viewer's personality. The panelists' pioneering research has produced and created several examples of new user interface experiences and designs. The discussion will focus on what techniques offer the most promise for facilitating the design of really new experiential user interfaces.
Using a knowledge analysis to predict conceptual errors in text-editor usage
Authors: Richard M. Young, Joyce Whittington
Venue: Proceedings of the SIGCHI conference on Human factors in computing systems: Empowering people (1990)

The knowledge analysis of a device and a task, when written in an external Instruction Language and translated into rules for a programmable cognitive architecture, enables a designer to predict conceptual errors in device usage. This kind of prediction lies outside the scope of GOMS-based models. The cognitive architecture, which is referred to as a &ldquo;Programmable User Model&rdquo; (PUM), incorporates a limited problem-solving capability based upon means-ends analysis and multiple problem spaces. The example presented, concerning a simple text editor, illustrates the application of a PUM and demonstrates that a correct description of local knowledge does not necessarily lead to correct behaviour. This can serve to alert the designer to difficulties with the usability of a proposed interface.
Highly vectorized algorithm for transient simulation of space reactor systems
Authors: B. Nassersharif, J. S. Peery, M. D. DeHart
Venue: Proceedings of the 1988 ACM/IEEE conference on Supercomputing (1988)

Current interest in the application of nuclear reactor driven power systems to space missions has generated a need for an accurate systems model which is capable of handling the nonlinear transient simulation of such systems [1],[2]. A project to develop a code specifically designed to model and analyze space reactor systems is currently ongoing at Texas A M. This code, named CENTAR (Code for Extended Nonlinear Transient Analysis of Extraterrestrial Reactors [3],[4]), is written especially for space systems and is highly vectorizable and machine-independent. Timing tests of the code have been run on VAX, CRAY, NEC, CONVEX and SUN systems. These tests demonstrate that CENTAR executes approximately seven times faster in vector mode than scalar mode on a CRAY X-MP. A one-loop model of a thermoelectric-based space reactor system (SP-100-like) was developed to demonstrate the code's capabilities. The SP-100-like model consisted of 24 components containing a total of 67 computational cells. Using a constant time step, this model ran two times faster than real time on a CRAY X-MP. A code assessment plan is currently under development.
Using assembly language to teach concepts in the introductory course
Authors: Barry Donahue
Venue: ACM SIGCSE Bulletin (1988)

While current trends in the teaching of the introductory course are very positive, several problems still remain to be faced. Among these are: A basic understanding of the operation of a computer. An emphasis on concept development rather than skill development. A proper historical perspective of computer science. To help remove these deficiencies, a very simple virtual machine is introduced. Beginning students learn to program on this machine with a very limited instruction set. Many topics related to software engineering, data structures, algorithm design, etc. are introduced in a top down fashion with details being developed with the aid of the virtual machine. When a high level language is introduced, students progress more rapidly and with a greater understanding of what is taking place in the machine. Students also develop a feel for computer science as a dynamic field and tend not to think of a particular language as being what computer science is.
Running a campus bulletin board system
Authors: Glenn Zwinger
Venue: Proceedings of the 16th annual ACM SIGUCCS Conference on User Services (1988)

The Academic Computing Services Department at the California State University, Long Beach (CSULB) has been operating a Bulletin Board System (BBS or &ldquo;board&rdquo;) for approximately two years. In this time, the CSULB BBS has changed and progressed in several ways. Three different BBS software program, four different computers, and two different modems have been used. In addition, has changed hard disk drives, floppy disk drives, printers, video boards and monitors several times. Some of these changes have been by design while others were due to hardware or software incompatibilities or failures. Despite all this, it could be easily argued that the largest department expenditure has been the hundreds of man-hours devoted to setting up and running the BBS. Yet, the CSULB BBS has proven to be an invaluable resource to its users and probably worth the investment made. This paper will attempt to outline some of the considerations that should be made before and after setting up a campus bulletin board system.
A Functional Testing Method for Microprocessors
Authors: L. Shen, S. Y. H. Su
Venue: IEEE Transactions on Computers (1988)

A method is presented for functional testing of microprocessors. First, a control fault model at the RTL (register transfer language) level is developed. Based on this model, the authors establish testing requirements for control faults. They present two test procedures to verify the write and read sequences, and use the write and read sequences to test each instruction in the microprocessor. By utilizing k-out-of-m codes, they use fewer tests to cover more faults, thereby reducing the test generation time.
Software design documentation approach for a DOD-STD 2167A Ada project
Authors: M. Springman
Venue: Proceedings of the conference on Tri-Ada '89: Ada technology in context: application, development, and deployment (1989)

DOD-STD-2167A and its predecessor DOD-STD-2167 impose significant documentation requirements on software development projects. The 2167 documentation set, particularly for documenting the software design through the life cycle, contained a significant, amount of redundancy. Also, for Ada development projects, 2167 did not adequately recognize the benefits achievable from using Ada as a uniform representation of the design and code products throughout the software life cycle. DOD-STD-2167A is an improvement over 2167, but a contractor and the customer must still be conscious of the possibility of generating documents with limited utility to document producers and reviewers. This paper describes a software design documentation approach being used on the Command Center Processing and Display System Replacement (CCPDS-R) project that uses heavily tailored 2167 Data Item Descriptions (because 2167A was still in the formulation stage when CCPDS-R began) to: (1) provide reviewers with appropriate design information during the software development process; (2) provide the system user with the documentation needed to maintain the delivered software; (3) eliminate redundancy; and (4) streamline the generation of the deliverable documents through reliance on information already contained in the Software Development Files (SDFs). The resulting design document set satisfies DOD-STD-2167A requirements.