ppxscal/embedding_network huggingface dataset:
The jump behavior and stability analysis for 2-D singular systems
Authors: Yun Zou, S. L. Campbell
Venue: Multidimensional Systems and Signal Processing (2000)

In this paper, we discuss the jump behavior and stability problems for 2-D linear shift-invariant singular systems under the standard boundary conditions. It is shown that once a boundary condition or the input is inadmissible in the classical sense, a group of non-causal or backward jumps of the system states will be incited. This interpretation releases the conventional admissibility constraints on the boundary conditions and inputs. Based on this observation, a systematic stability theory is developed for 2-D singular systems. The well-known basic stability theorem for the 1-D singular systems or 2-D regular systems is thus extended to the 2-D singular case.
Two languages for estimating program efficiency
Authors: Jacques Cohen, Carl Zuckerman
Venue: Communications of the ACM (1974)

Two languages enabling their users to estimate the efficiency of computer programs are presented. The program whose efficiency one wishes to estimate is written in the first language, a go-to-less programming language which includes most of the features of Algol 60. The second language consists of interactive commands enabling its users to provide additional information about the program written in the first language and to output results estimating its efficiency. Processors for the two languages are also described. The first processor is a syntax-directed translator which compiles a program into a symbolic formula representing the execution time for that program. The second processor is a set of procedures for algebraic manipulation which can be called by the user to operate on the formula produced by the first processor. Examples of the usage of the two languages are included. The limitations of the present system, its relation to Knuth's work on the analysis of algorithms, and some of the directions for further research are also discussed.
Automatic segmentation of cyclic program structures based on connectivity and processor timing
Authors: Thomas C. Lowe
Venue: Communications of the ACM (1970)

Time-shared, multiprogrammed, and overlayed batch systems frequently require segmentation of computer programs into discrete portions. These program portions are transferred between executable and peripheral storage whenever necessary; segmentation of programs in a manner that reduces the frequency of such transfers is the subject of this paper. Segmentation techniques proposed by C. V. Ramamoorthy are subject to limitations that arise when the preferred segment size is not compatible with the physical restrictions imposed by the available computing equipment. A generalization of Ramamoorthy's suggestions is made in order to allow their application when circumstances are other than ideal.
Problems in comprehending recursion and suggested solutions
Authors: Raja Sooriamurthi
Venue: Proceedings of the 6th annual conference on Innovation and technology in computer science education (2001)

Recursion is a very powerful and useful problem solving strategy. But, along with pointers and dynamic data structures, many beginning programmers consider recursion to be a difficult concept to master. This paper reports on a study of upper-division undergraduate students on their difficulty in comprehending the ideas behind recursion. Three issues emerged as the points of difficulty for the students: (1) insufficient exposure to declarative thinking in a programming context (2) inadequate appreciation of the concept of functional abstraction (3) lack of a proper methodology to express a recursive solution. The paper concludes with a discussion of our approach to teaching recursion, which addresses these issues. Classroom experience indicates this approach effectively aids students' comprehension of recursion.
The role of scientific discovery in teaching and learning of computer science
Authors: Amos O. Olagunju
Venue: ACM SIGCSE Bulletin (2000)

The importance of the roles of mathematics and engineering in the use of computers for solving real world problems cannot be over emphasized. This paper advocates the engagement of professors with diversified experiences of the applications of computers in the real world in teaching lower level computer science courses such as experiments designed to characterize Fibonacci and higher order similar sequences. With the goal of illustrating how scientific discovery experiments are designed, the paper shows certain connections between different areas of mathematics and computer science.
Metric operations on fuzzy spatial objects in databases
Authors: Markus Schneider
Venue: Proceedings of the 8th ACM international symposium on Advances in geographic information systems (2000)

Uncertainty management for geometric data is currently an important problem for (extensible) databases in general and for spatial databases, image databases, and GIS in particular. In these systems, spatial data are traditionally kept as determinate and sharply bounded objects; the aspect of spatial vagueness is not and cannot be treated by these systems. However, in many geometric and geographical database applications there is a need to model spatial phenomena rather through vague concepts due to indeterminate and blurred boundaries. Following previous work, we first describe a data model for fuzzy spatial objects including data types for fuzzy regions and fuzzy lines. We then, in particular, study the important class of metric operations on these objects.
Performance Evaluation of the Nearest Feature Line Method in Image Classification and Retrieval
Authors: Stan Z. Li, Kap Luk Chan, Changliang Wang
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (2000)

A new method, the nearest feature line (NFL) method, is used in image classification and retrieval and its performance is evaluated and compared with other methods by extensive experiments. The NFL method is demonstrated to make efficient use of knowledge about multiple prototypes of a class to represent that class.
Loader standardization for overlay programs
Authors: Bernadine C. Lanzano
Venue: Communications of the ACM (1969)

The overlay capability is described for four of the third generation computer systems: CDC-6000, GE-635, IBM-360, and UNIVAC-1108. A critique of the first three sytems is based on actual experience with a large overlaid trajectory simulation program; a short history and description of this program is presented. A standardization of minimum capabilities for loaders is recommended so that programs which must operate under more than one computer system may be easily converted and maintained. A proposal that overlay software incorporates a memory occupation specification concept instead of the conventional tree structure is delineated. This concept provides more efficient and cost-effective utilization of the memory as well as increasd flexibility in program structure.
Human factors guidelines for terminal interface design
Authors: D. Verne Morland
Venue: Communications of the ACM (1983)

This paper provides a set of guidelines for the design of software interfaces for video terminals. It describes how to optimize screen layouts, interactive data entry, and error handling, as well as many practical techniques for improving man-machine interaction. Emphasis is placed on factors relating to perceptual and cognitive psychology rather than on gross physiological concerns. Ways in which interfaces can be evaluated to improve their user friendliness are also suggested. The author summarizes many ideas that can be found in other, more comprehensive texts on the subject. These guidelines will provide practicing software designers with useful insights into some of today's principal terminal interface design considerations.
Image-driven simplification
Authors: Peter Lindstrom, Greg Turk
Venue: ACM Transactions on Graphics (TOG) (2000)

We introduce the notion of image-driven simplification, a framework that uses images to decide which portions of a model to simplify. This is a departure from approaches that make polygonal simplification decisions based on geometry. As with many methods, we use the edge collapse operator to make incremental changes to a model. Unique to our approach, however, is the use at comparisons between images of the original model against those of a simplified model to determine the cost of an ease collapse. We use common graphics rendering hardware to accelerate the creation of the required images. As expected, this method produces models that are close to the original model according to image differences. Perhaps more surprising, however, is that the method yields models that have high geometric fidelity as well. Our approach also solves the quandary of how to weight the geometric distance versus appearance properties such as normals, color, and texture. All of these trade-offs are balanced by the image metric. Benefits of this approach include high fidelity silhouettes, extreme simplification of hidden portions of a model, attention to shading interpolation effects, and simplification that is sensitive to the content of a texture. In order to better preserve the appearance of textured models, we introduce a novel technique for assigning texture coordinates to the new vertices of the mesh. This method is based on a geometric heuristic that can be integrated with any edge collapse algorithm to produce high quality textured surfaces.
Performance engineering case study: heap construction
Authors: Jesper Bojesen, Jyrki Katajainen, Maz Spork
Venue: Journal of Experimental Algorithmics (JEA) (2000)

The behaviour of three methods for constructing a binary heap on a computer with a hierarchical memory is studied. The methods considered are the original one proposed by Williams [1964], in which elements are repeatedly inserted into a single heap; the improvement by Floyd [1964], in which small heaps are repeatedly merged to bigger heaps; and a recent method proposed, e.g., by Fadel et al. [1999] in which a heap is built layerwise. Both the worst-case number of instructions and that of cache misses are analysed. It is well-known that Floyd's method has the best instruction count. Let <i>N</i> denote the size of the heap to be constructed, <i>B</i> the number of elements that fit into a cache line, and let <i>c</i> and <i>d</i> be some positive constants. Our analysis shows that, under reasonable assumptions, repeated insertion and layerwise construction both incur at most <i>cN/B</i> cache misses, whereas repeated merging, as programmed by Floyd, can incur more than (<i>dN</i> log<inf>2</inf> <i>B</i>)/<i>B</i> cache misses. However, for our memory-tuned versions of repeated insertion and repeated merging the number of cache misses incurred is close to the optimal bound <i>N</i>/<i>B</i>. In addition to these theoretical findings, we communicate many practical experiences which we hope to be valuable for others doing experimental algorithmic work.
A Small Area Charge Sensitive Readout Chain with a Dual Mode of Operation
Authors: Charalampos Kapnistis, Konstantinos Misiakos, Nikos Haralabidis
Venue: Analog Integrated Circuits and Signal Processing (2001)

A charge sensitive readout chain has been designed and fabricated in a commercially available 0.8 &mu;m CMOS technology. The readout chain is optimized for pixel detectors measuring soft X-ray energies up to 20 KeV. In the first mode an analog signal proportional to input charge is generated and processed in real time. In the second mode a peak-and-hold operation is enabled and the relevant signal is processed in later time. This dual mode of operation is controlled by an external digital signal. The readout chain consists of a charge amplifier, a shaper, an operational amplifier which can either operate as a voltage amplifier or a peak detector and an output buffer. Its area is 270 \mu m\times 150 \mu m. The gain at the shaper output is 378 mv/fC, the ENC is 16 e^{-} rms at 160 nsec shaping time. The overall gain is 557 mV/fC, the ENC is 13 e^{-} rms with 240 nsec peaking time and 1.4 &mu;sec recovery time. The overall power dissipation is 1.5 mWatt with a load capacitance of 25 pF.
Retargetable compiled simulation of embedded processors using a machine description language
Authors: Stefan Pees, Andreas Hoffmann, Heinrich Meyr
Venue: ACM Transactions on Design Automation of Electronic Systems (TODAES) (2000)

Fast processor simulators are needed for the software development of embedded processors, for HW/SW cosimulation systems, and for profiling and design of application-specific processors. Such fast simulators can be generated based on the machine description language LISA. Using this language to model processor architectures enables the generation of compiled simulators on various abstraction levels, assemblers, and compiler back ends. The article discusses the requirements of software development tools on processor models and presents the approach based on the LISA language. Furthermore, the implementation of a retargetable environment consisting of compiled simulator, debugger, and assembler is presented. Measurements for a verified, cycle-based LISA model of the TI TMS320C62&times; DSP show that that this approach achieves between 37&times; and 170&times; higher simulation speed compared to a commercial simulator using a standard technique and the same accuracy level.
Waveform Relaxation with Fast Direct Methods as Preconditioner
Authors: Jo Simoens, Stefan Vandewalle
Venue: SIAM Journal on Scientific Computing (1999)

For a restricted class of parabolic PDEs one can devise a practical numerical solver with a parallel complexity that is theoretically optimal. The method uses a multidimensional FFT to decouple the unknowns in the spatial domain into independent scalar ODEs. These are discretized to give recurrence relations in the time dimension solved by parallel cyclic reduction. This is the FFT/CR algorithm. We discuss the use of FFT/CR as a preconditioner to iteratively solve more general parabolic PDEs. This approach naturally leads to a waveform relaxation scheme. Waveform relaxation was developed as an iterative method for solving large systems of ODEs. It is the continuous-in-time analogue of stationary iterative methods for linear algebraic equations. Using the FFT/CR solver as a preconditioner preserves most of the potential for concurrency that accounts for the attractiveness of waveform relaxation with simple preconditioners like Jacobi or red-black Gauss--Seidel, while showing an important advantage: the convergence rate of the resulting iteration is independent of the mesh size used in the spatial discretization. The method can be accelerated by applying an appropriate scaling of the system before preconditioning.
Construction of a hierarchical classifier schema using a combination of text-based and image-based approaches
Authors: Cheng Lu, Mark S. Drew
Venue: Proceedings of the 24th annual international ACM SIGIR conference on Research and development in information retrieval (2001)

Web document hierarchical classification approaches often rely on textual features alone even though web pages include multimedia data. We propose a new hierarchical integrated web classification approach that combines image-based and text-based approaches. Instead of using a flat classifier to combine text and image classification, we perform classification on a hierarchy differently on different levels of the tree, using text for branches and images only at leaves. The results of our experiments show that the use of the hierarchical structure improved web document classification performance significantly.
Pictorial pattern recognition and the phase problem of x-ray crystallography
Authors: Arthur M. Lesk
Venue: Communications of the ACM (1972)

The availability of interactive, three-dimensional, computer graphics systems coupled to powerful digital computers encourages the development of algorithms adapted to this environment. Pictorial pattern recognition techniques make possible a number of approaches to X-ray structure determination based on molecular model building, i.e. the use of chemical information to frame &ldquo;structural hypotheses&rdquo; which can computationally be tested and refined by reference to the experimental data. Application of standard pattern recognition algorithms is hindered by the fact that the cross-correlation between a model and the correct structure cannot be computed because of a fundamental incompleteness in the measured data. However, it is possible to compute an upper bound to such a cross-correlation. A simple example demonstrates that this information can be the basis of a technique for structure determination that can make effective use of an interactive graphics system. Model building by cross-correlations has intrinsic advantages over usual crystallographic techniques based on the autocorrelation or Patterson function, especially for large structures. This is significant, for crystallography of biological macromolecules has been and will continue to be a field of intense interest.
TCP-real: improving real-time capabilities of TCP over heterogeneous networks
Authors: C. Zhang, V. Tsaoussidis
Venue: Proceedings of the 11th international workshop on Network and operating systems support for digital audio and video (2001)

We present a TCP-compatible and -friendly protocol which abolishes thr ee major shortfalls of TCP for reliable multimedia applications over heterogeneous networks: (i) ineffective bandwidth utilization, (ii) unnecessary congestion-oriented responses to wireless link errors (e.g., fading channels) and operations (e.g. handoffs), and (iii) wasteful window adjustments over asymmetric, low-bandwidth reverse paths. We propose TCP-Real, a high-throughput transport protocol that minimizes transmission-rate gaps, thereby enabling better performance and reasonable playback timers. In TCP-Real, the receiver decides with better accuracy about the appropriate size of the congestion window. Slow Start and timeout adjustments are used whenever congestion avoidance fails; however, rate and timeout adjustments are cancelled whenever the receiving rate indicates sufficient availability of bandwidth. We detail the protocol design and we report significant improvement on the performance of the protocol with time-constrained traffic, wireless link errors and asymmetric paths.
Anaysis of interleaved memory systems using blockage buffers
Authors: G. J. Burnett, E. G. Coffman,  Jr.
Venue: Communications of the ACM (1975)

A model of interleaved memory systems is presented, and the analysis of the model by Monte Carlo simulation is discussed. The simulations investigate the performance of various system structures, i.e. schemes for sending instruction and data requests to the memory system. Performance is measured by determining the distribution of the number of memory modules in operation during a memory cycle. An important observation from these investigations is that separately grouping instruction and data requests for memory can substantially increase the average number of memory modules in operation during a memory cycle. Results of the simulations and an analytical study are displayed for various system structures.
Approximation algorithms for the metric labeling problem via a new linear programming formulation
Authors: Chandra Chekuri, Sanjeev Khanna, Joseph (Seffi) Naor, Leonid Zosin
Venue: Proceedings of the twelfth annual ACM-SIAM symposium on Discrete algorithms (2001)

We consider approximation algorithms for the metric labeling problem. This problem was introduced in a recent paper by Kleinberg and Tardos [20], and captures many classification problems that arise in computer vision and related fields. They gave an &Ogr;(log k log log k) approximation for the general case where k is the number of labels and a 2-approximation for the uniform metric case. More recently, Gupta and Tardos [15] gave a 4-approximation for the truncated linear metric, a natural non-uniform metric motivated by practical applications to image restoration and visual correspondence. In this paper we introduce a natural integer programming formulation and show that the integrality gap of its linear relaxation either matches or improves the ratios known for several cases of the metric labeling problem studied until now, providing a unified approach to solving them. In particular, we show that the integrality gap of our LP is bounded by &Ogr;(log k log log k) for general metric and 2 for the uniform metric thus matching the ratios in [20]. We also develop an algorithm based on our LP that achieves a ratio of 2 + &radic;2 &sime; 3.414 for the truncated linear metric improving the ratio given in [15]. Our algorithm uses the fact that the integrality gap of our LP is 1 on a linear metric. We believe that our formulation has the potential to provide improved approximation algorithms for the general case and other useful special cases. Finally, our formulation admits general non-metric distance functions. This leads to a non-trivial approximation guarantee for a non-metric case that arises in practice [21], namely the truncated quadratic distance function. We note here that there are non-metric distance functions for which no bounded approximation ratio is achievable.
Design technology productivity in the DSM era (invited talk)
Authors: Andrew B. Kahng
Venue: Proceedings of the 2001 Asia and South Pacific Design Automation Conference (2001)

Future requirements for design technology are always uncertain due to changes in process technology, system implementation platforms, and applications markets. To correctly identify the design technology need, and to deliver this technology at the right time, the design technology community - commercial vendors, captive CAD organizations, and academic researchers - must focus on improving design technology time-to-market and quality-of-result. Put another way, we must address the well-known Design Productivity Gap by addressing the Design Technology Productivity Gap. The future of design technology is most uncertain in the physical implementation space, where many complexities must be managed without sacrificing system value or turnaround time. This talk will begin with examples of changes in methodology and design tool infrastructure needed to support future physical implementation. Then, recent initiatives in the MARCO Gigascale Silicon Research Center (GSRC) are described which support the design technology and designer communities in creating the right design technology when it is needed.
Semi-dynamic breadth-first search in digraphs
Authors: Paolo Giulio Franciosa, Daniele Frigionia, Roberto Giaccioa
Venue: Theoretical Computer Science (2001)

When creating a family of systems, i.e. several systems of similar type which differ within some aspects, it is desirable to be able to express these differences already at the level of the specification, and to automatically obtain systems from it which are ready to run. The use of generic methods may lead to substantial progress in this area. This report explores two aspects: parameterization concepts at the specification level, which can be used to describe variants of a system, and generator programs, which produce runnable systems from prefabricated components.
Computing logic-stage delays using circuit simulation and symbolic elmore analysis
Authors: Clayton B. McDonald, Randal E. Bryant
Venue: Proceedings of the 38th annual Design Automation Conference (2001)

The computation of logic-stage delays is a fundamental sub-problem for many EDA tasks. Although accurate delays can be obtained via circuit simulation, we must estimate the input assignments that will maximize the delay. With conventional methods, it is not feasible to estimate the delay for all input assignments on large sub-networks, so previous approaches have relied on heuristics. We present a symbolic algorithm that enables efficient computation of the Elmore delay under all input assignments and delay refinement using circuit-simulation. We analyze the Elmore estimate with three metrics using data extracted from symbolic timing simulations of industrial circuits.