ppxscal/embedding_network huggingface dataset:
Fail-Awareness: An Approach to Construct Fail-Safe Systems
Authors: Christof Fetzer, Flaviu Cristian
Venue: Real-Time Systems (2003)

We present a framework for building fail-safe hard real-time applications in timed asynchronous distributed systems subject to communication partitions and performance, omission, and crash failures. Most distributed systems built from commercial-off-the-shelf (COTS) processor and communication services are subject to such partitions because their COTS components do not provide hard real-time guarantees. Also custom designed systems can be subject to partitions due to unmaskable link or router failures. The basic assumption behind our approach is that each processor has a local hardware clock that proceeds within a linear envelope of real-time. This allows one to compute an upper bound on the actual delays incurred by a particular processing sequence or message transmission. Services and applications can use these computed bounds to detect when they cannot guarantee all their standard properties because of excessive delays. This allows an application to be fail-aware, that is, to detect when it cannot guarantee all its safety properties and in particular, to detect when to switch to a fail-safe mode.
An Interleaving Technique for Reducing Peak Power in Multiple-Chain Scan Circuits During Test Application
Authors: Kuen-Jong Lee, Tsung-Chu Huang
Venue: Journal of Electronic Testing: Theory and Applications (2002)

This paper proposes a novel method to reduce the peak power of multiple scan chain based circuits during testing. The peak periodicity and the peak width of the power waveforms for scan-based circuits are analyzed. An interleaving scan architecture based on adding delay buffers among the scan chains is developed which can significantly reduce the peak power. This method can be efficiently integrated with a recently proposed broadcast multiple scan architecture due to the sharing of scan patterns. The effects of the interleaving scan technique applied to the conventional multiple scan and the broadcast multiple scan with 10 scan chains are investigated. Up to 51% peak power reduction can be achieved when the data output of a scan cell is affected by the scan path during scan. When the data output is disabled during scan, up to 76% of peak-power reduction is observed.
A Persistent Store for Large Shared Knowledge Bases
Authors: E. Mays, S. Lanka, B. Dionne, R. Weida
Venue: IEEE Transactions on Knowledge and Data Engineering (1991)

A knowledge-base management system (KBMS) with the following goals is proposed: (1) to allow a knowledge engineer to update a knowledge base and have these updates persist on secondary storage, (2) to allow multiple knowledge engineers to have shared access to a knowledge base and modify the knowledge base concurrently, and (3) to maintain consistency of the shared knowledge base as it evolves. At the heart of the KBMS is the version store, which is a persistent storage structure that maintains multiple versions of a knowledge base. Retrieve and update operations are defined on the version store to efficiently access and modify any version. Objects in the version store are clustered to support efficient access of an entire version or some subparts of it. To store the effects of an update requires space proportional to the size of the update and which is independent of the size of the knowledge base. The additional cost of maintaining multiple versions is within a small constant factor of maintaining a single version.
Evaluation of a multimodal interface for 3D terrain visualization
Authors: David M. Krum, Olugbenga Omoteso, William Ribarsky, Thad Starner, Larry F. Hodges
Venue: Proceedings of the conference on Visualization '02 (2002)

Novel speech and/or gesture interfaces are candidates for use in future mobile or ubiquitous applications. This paper describes an evaluation of various interfaces for visual navigation of a whole Earth 3D terrain model. A mouse driven interface, a speech interface, a gesture interface, and a multimodal speech and gesture interface were used to navigate to targets placed at various points on the Earth. This study measured each participant's recall of target identity, order, and location as a measure of cognitive load. Timing information as well as a variety of subjective measures including discomfort and user preference were taken. While the familiar and mature mouse interface scored best by most measures, the speech interface also performed well. The gesture and multimodal interface suffered from weaknesses in the gesture modality. Weaknesses in the speech and multimodal modalities are identified and areas for improvement are discussed.
Human Activity Recognition Using Multidimensional Indexing
Authors: Jezekiel Ben-Arie, Zhiqian Wang, Purvin Pandit, Shyamsundar Rajaram
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (2002)

In this paper, we develop a novel method for view-based recognition of human action/activity from videos. By observing just a few frames, we can identify the activity that takes place in a video sequence. The basic idea of our method is that activities can be positively identified from a sparsely sampled sequence of a few body poses acquired from videos. In our approach, an activity is represented by a set of pose and velocity vectors for the major body parts (hands, legs, and torso) and stored in a set of multidimensional hash tables. We develop a theoretical foundation that shows that robust recognition of a sequence of body pose vectors can be achieved by a method of indexing and sequencing and it requires only a few pose vectors (i.e., sampled body poses in video frames). We find that the probability of false alarm drops exponentially with the increased number of sampled body poses. So, matching only a few body poses guarantees high probability for correct recognition. Our approach is parallel, i.e., all possible model activities are examined at one indexing operation since all of the model activities are stored in the same set of hash tables. In addition, our method is robust to partial occlusion since each body part is indexed separately. We use a sequence-based voting approach to recognize the activity invariant to the activity speed. Experiments performed with videos having eight different activities show robust recognition with our method. The method is also robust in conditions of varying view angle in the range of \pm 30 degrees.
Interpolation Using Wavelet Bases
Authors: A. P. Pentland
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1994)

Efficient solutions to regularization problems can be obtained using orthogonal wavelet bases for preconditioning. Good approximate solutions can be obtained in only two or three iterations, with each iteration requiring only O(n) operations and O(n) storage locations. Two- and three-dimensional examples are shown using both synthetic and real range data.
Secure multicast in wireless networks of mobile hosts: protocols and issues
Authors: Danilo Bruschi, Emilia Rosti
Venue: Mobile Networks and Applications (2002)

Multicast services and wireless interconnection networks are among the emerging technologies of the last decade. A significant amount of research has been separately performed in the areas of secure multicast and wireless interconnection networks. In this paper we investigate the issues of designing secure multicast services in wireless mobile environments for dynamic groups and propose protocols for key management for a variety of scenarios. Our solution decouples mobility management from group dynamics management, by taking into account the level of trust in the support stations. In particular, we show that protocol efficiency on the mobile host side can be traded-off with the level of trust in the support stations.
On Recursive, O(N) Partitioning of a Digitized Curve into Digital Straight Segments
Authors: M. Lindenbaum, A. Bruckstein
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1993)

A simple online algorithm for partitioning of a digital curve into digital straight-line segments of maximal length is given. The algorithm requires O(N) time and O(1) space and is therefore optimal. Efficient representations of the digital segments are obtained as byproducts. The algorithm also solves a number-theoretical problem concerning nonhomogeneous spectra of numbers.
Baring It All to Software: Raw Machines
Authors: Elliot Waingold, Michael Taylor, Devabhaktuni Srikrishna, Vivek Sarkar, Walter Lee, Victor Lee, Jang Kim, Matthew Frank, Peter Finch, Rajeev Barua, Jonathan Babb, Saman Amarasinghe, Anant Agarwal
Venue: Computer (1997)

The most radical of the architectures that appear in this issue are Raw processors-highly parallel architectures with hundreds of very simple processors coupled to a small portion of the on-chip memory. Each processor, or tile, also contains a small bank of configurable logic, allowing synthesis of complex operations directly in configurable hardware. Unlike the others, this architecture does not use a traditional instruction set architecture. Instead, programs are compiled directly onto the Raw hardware, with all units told explicitly what to do by the compiler. The compiler even schedules most of the intertile communication. The real limitation to this architecture is the efficacy of the compiler. The authors demonstrate impressive speedups for simple algorithms that lend themselves well to this architectural model, but whether this architecture will be effective for future workloads is an open question.
Detection of Weak Unstable Predicates in Distributed Programs
Authors: V. K. Garg, B. Waldecker
Venue: IEEE Transactions on Parallel and Distributed Systems (1994)

This paper discusses detection of global predicates in a distributed program. Earlieralgorithms for detection of global predicates proposed by Chandy and Lamport (1985)work only for stable predicates. A predicate is stable if it does not turn false once itbecomes true. Our algorithms detect even unstable predicates, without excessiveoverhead. In the past, such predicates have been regarded as too difficult to detect.The predicates are specified by using a logic described formally in this paper. We discussdetection of weak conjunctive predicates that are formed by conjunction of predicateslocal to processes in the system. Our detection methods will detect whether such apredicate is true for any interleaving of events in the system, regardless of whether thepredicate is stable. Also, any predicate that can be reduced to a set of weak conjunctivepredicates is detectable. This class of predicates captures many global predicates thatare of interest to a programmer. The message complexity of our algorithm is bounded bythe number of messages used by the program. The main applications of our results are indebugging and testing of distributed programs. Our algorithms have been incorporated ina distributed debugger that runs on a network of Sun workstations in UNIX.
Throughput Advantages of Asynchronous Prober Control
Authors: Robert J. Powers
Venue: IEEE Design Test (1988)

Parallel testing of memories at the wafer-sort stage can offer significant throughput advantages. Accepted methods at this state involve synchronous prober control. A model is presented that shows how asynchronous prober control can increase throughput 36% over that possible with synchronous control.
Transaction Processing in Mobile, Heterogeneous Database Systems
Authors: James B. Lim, A. R. Hurson
Venue: IEEE Transactions on Knowledge and Data Engineering (2002)

As technological advances are made in software and hardware, the feasibility of accessing information "any time, anywhere" is becoming a reality. Furthermore, the diversity and amount of information available to a given user is increasing at a rapid rate. In a mobile computing environment, a potentially large number of users may simultaneously access the global data; therefore, there is a need to provide a means to allow concurrent management of transactions. Current multidatabase concurrency control schemes do not address the limited bandwidth and frequent disconnection associated with wireless networks. This paper proposes a new hierarchical concurrency control algorithm. The proposed concurrency control algorithm¿v-lock¿uses global locking tables created with semantic information contained within the hierarchy. The locking tables are used to serialize global transactions, detect and remove global deadlocks. Additionally, data replication, at the mobile unit, is used to limit the effects of the restrictions imposed by a mobile environment. The replicated data provides additional availability in case of a weak connection or disconnection. Current research has concentrated on page and file-based caching or replication schemes to address the availability and consistency issues in a mobile environment. In a mobile, multidatabase environment, local autonomy restrictions prevent the use of a page or file-based data replication scheme. This paper proposes a new data replication scheme to address the limited bandwidth and local autonomy restrictions. Queries and the associated data are cached at the mobile unit as a complete object. Consistency is maintained by using a parity-based invalidation scheme. A simple prefetching scheme is used in conjunction with caching to further improve the effectiveness of the proposed scheme. Finally, a simulator was developed to evaluate the performance of the proposed algorithms. The simulation results are presented and discussed.
Training Reinforcement Neurocontrollers Using the Polytope Algorithm
Authors: Aristidis Likas, Isaac E. Lagaris
Venue: Neural Processing Letters (1999)

A new training algorithm is presented for delayed reinforcement learning problems that does not assume the existence of a critic model and employs the polytope optimization algorithm to adjust the weights of the action network so that a simple direct measure of the training performance is maximized. Experimental results from the application of the method to the pole balancing problem indicate improved training performance compared with critic-based and genetic reinforcement approaches.
ASIC Challenges: Emerging from a Primordial Soup
Authors: Wilfred Corrigan
Venue: IEEE Design Test (1998)

In his keynote speech given at the International Verilog-VHDL Conference (March 1998), Wilf Corrigan, the chair and CEO of LSI Logic, described some of the challenges facing the ASIC industry today and in the future. Corrigan, one of Silicon Valley's pioneers, has helmed several major companies over the past 30 years. Here, he summarizes his major points. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
Database lexicography
Authors: Gary Coen
Venue: Data Knowledge Engineering (2002)

This paper introduces database lexicography, a metadata analysis discipline that applies lexical graph theory to data design. Database lexicography proposes a formal design criterion for data dependencies, and it provides metrics to evaluate the conformance of designs to this criterion. It treats the data dictionary as a first class object encoding design concepts, and its benefits include identification of database dependency architecture; quantification of interdependent data elements' sensitivity to change; categorization of core and peripheral data elements; model integration; and figures of merit by which to fortify data architectures to withstand design fossilization and guide their evolution amidst changing requirements.
Local search for final placement in VLSI design
Authors: Oluf Faroe, David Pisinger, Martin Zachariasen
Venue: Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design (2001)

A new heuristic is presented for the general cell placement problem where the objective is to minimize total bounding box netlength. The heuristic is based on the Guided Local Search (GLS) metaheuristic. GLS modifies the objective function in a constructive way to escape local minima. Previous attempts to use local search on final (or detailed) placement problems have often failed as the neighborhood quickly becomes too excessive for large circuits. Nevertheless, by combining GLS with Fast Local Search it is possible to focus the search on appropriate sub-neighborhoods, thus reducing the time complexity considerably.Comprehensive computational experiments with the developed algorithm are reported on small, medium and large industrial circuits, and for standard cell and general cell variants of the problem. The experiments demonstrate that the developed algorithm is able to improve the estimated routing length of large-sized general cell layouts with as much as 20 percent.The general nature of the proposed method makes it easy to incorporate other goals, such as routability and timing constraints, into the objective function. Current layout algorithms use a feedback approach in which a placement is evaluated by performing (partial) routing and timing analysis; the output of this analysis is then used to construct an improved placement. This iterative nature of the design process calls for placement algorithms that take an existing placement and construct an improved placement that resembles the original one, but in which the information from the routing/timing analysis is taken into account.
Client-Server Computing on Shrimp
Authors: Stefanos N. Damianakis, Angelos Bilas, Cezary Dubnicki, Edward W. Felten
Venue: IEEE Micro (1997)

The SHRIMP project at Princeton University supports user-level communication between processes by mapping memory pages between virtual address spaces. This virtual memory-mapped network interface seems to have many advantages including flexible user-level communication, and very low overhead to initiate data transfers. In this work we examine two implementations of RPC and sockets for the SHRIMP multicomputer that deliver to user applications almost raw hardware performance. We achieve high performance by taking advantage of the features of the underlying SHRIMP architecture. SHRIMP provides low-latency, user-level communication, without imposing any buffer management semantics, and without requiring an interrupt for each message. This allows packages like our RPC and sockets libraries to customize their buffer management and control transfer strategies to optimize performance.
An Efficient, Protected Message Interface
Authors: Whay Sing Lee, William J. Dally, Stephen W. Keckler, Nicholas P. Carter, Andrew Chang
Venue: Computer (1998)

With increasing demand for computing power, multiprocessing computers will become more common in the future. In these systems, the growing discrepancy between processor and memory technologies will cause tightly integrated message interfaces to be essential for achieving the necessary efficiency, which is especially important in light of the growing interest in software-distributed, shared-memory systems. In traditional message interfaces, high latency and processor occupancy inhibit the exploitation of large-scale parallelism. Newer designs address this problem by removing OS layers from the interface, but the remaining overhead is still large. To amortize this overhead, programmers use messages that are hundreds to thousands of words in size. Consequently, threads run for thousands of cycles between communications, which precludes much parallelization. When designers incorporate multiple hardware thread slots onto each node, this overhead is exacerbated if primitive support for fair and protected resource allocation is lacking. Much of the communication overhead can be removed by carefully making complementary design choices in primitive messaging mechanisms in order to facilitate messages as short as several words in size and to enable fine-grain parallelism. The authors conduct a performance evaluation of several primitive messaging mechanisms-dispatch mechanisms (how the processor reacts to message arrivals), memory-mapped versus register-mapped interfaces, and streaming versus buffered interfaces-baselining these results against the MIT M-Machine and its tightly integrated message interfaces. They find that a message can be dispatched up to 18 times faster by reserving a hardware thread context for message reception instead of an interrupt- driven interface. They also find that the mapping decision is important, with integrated register-mapped interfaces as much as 3.5 times more efficient than conventional systems. To meet the challenges and exploit the opportunities presented by emerging multithreaded processor architectures, low overhead mechanisms for protection against message corruption, interception, and starvation must be integral to the message system design. The authors hope that the simple messaging mechanisms described in this article can help provide a solution to these challenges.
Implication and Referential Constraints: A New Formal Reasoning
Authors: Xubo Zhang, Z. Meral Ozsoyoglu
Venue: IEEE Transactions on Knowledge and Data Engineering (1997)

In this paper, we address the issue of reasoning with two classes of commonly used semantic integrity constraints in database and knowledge-base systems: implication constraints and referential constraints. We first consider a central problem in this respect, the IRC-refuting problem, which is to decide whether a conjunctive query always produces an empty relation on (finite) database instances satisfying a given set of implication and referential constraints. Since the general problem is undecidable, we only consider acyclic referential constraints. Under this assumption, we prove that the IRC-refuting problem is decidable, and give a novel necessary and sufficient condition for it. Under the same assumption, we also study several other problems encountered in semantic query optimization, such as the semantics-based query containment problem, redundant join problem, and redundant selection-condition problem, and show that they are polynomially equivalent or reducible to the IRC-refuting problem. Moreover, we give results on reducing the complexity for some special cases of the IRC-refuting problem.
A Maximum-Likelihood Surface Estimator for Dense Range Data
Authors: Ross T. Whitaker, Jens Gregor
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (2002)

This paper describes how to estimate 3D surface models from dense sets of noisy range data taken from different points of view, i.e., multiple range maps. The proposed method uses a sensor model to develop an expression for the likelihood of a 3D surface, conditional on a set of noisy range measurements. Optimizing this likelihood with respect to the model parameters provides an unbiased and efficient estimator. The proposed numerical algorithms make this estimation computationally practical for a wide variety of circumstances. The results from this method compare favorably with state-of-the-art approaches that rely on the closest-point or perpendicular distance metric, a convenient heuristic that produces biased solutions and fails completely when surfaces are not sufficiently smooth, as in the case of complex scenes or noisy range measurements. Empirical results on both simulated and real ladar data demonstrate the effectiveness of the proposed method for several different types of problems. Furthermore, the proposed method offers a general framework that can accommodate extensions to include surface priors (i.e., maximum a posteriori), more sophisticated noise models, and other sensing modalities, such as sonar or synthetic aperture radar.