ppxscal/embedding_network huggingface dataset:
The European networks and information security agency: ENISA
Authors: Konstantinos Voudouris
Venue: Proceedings of the 9th WSEAS International Conference on Systems (2005)

This paper presents the scope objectives and tasks of the recently established European Networks and Information Security Agency - ENISA. ENISA's mission is to create a platform for a culture of network and information security in Europe, in order to facilitate stakeholders, including EU Institutions and Member States, promote secure solutions in using eNetworks and eInformation. Awareness raising as well as promotion of best practices, are among the initial tasks that ENISA will perform, aiming to become a centre of excellence in the area of eSecurity in EU.
Column-matching based mixed-mode test pattern generator design technique for BIST
Authors: Petr Fišer, Hana Kubátová
Venue: Microprocessors Microsystems (2008)

A novel test-per-clock built-in self-test (BIST) equipment design method for combinational or full-scan sequential circuits is proposed in this paper. Particularly, the test pattern generator is being designed. The method is based on similar principles as are well known test pattern generator design methods, like bit-fixing and bit-flipping. The novelty comprises in proposing a brand new algorithm to synthesize the test pattern generator. In principle, we synthesize a combinational block - the decoder, transforming pseudo-random code words into deterministic test patterns pre-computed by an ATPG tool. The column-matching algorithm to design the decoder is proposed. Here the maximum of output variables of the decoder is tried to be matched with the decoder inputs, yielding the outputs be implemented as mere wires, thus without any logic. No memory elements are needed to store the test patterns, which reduces the BIST area overhead. Our BIST exploits mixed-mode testing principles. The BIST execution is divided into two disjoint phases - the pseudorandom phase and the deterministic phase. This enables to reach high fault coverage in a short test time and with a low area overhead. The choice of the lengths of the two phases directly influences the test time, BIST design time and BIST area overhead. A big effort has been put to a capability of trading-off the design criteria. The method allows for scaling the test time, BIST area overhead, BIST design time, etc. The time complexity of the algorithm is studied and experimentally evaluated.
Qualitative search algorithms for partner selection and task allocation in the formulation of virtual enterprise
Authors: Q. X. Chen, X. Chen, W. B. Lee
Venue: International Journal of Computer Integrated Manufacturing (2007)

In the formation of dynamic virtual enterprise (VE), partner search is of prime importance. Finding potential partners in a directory is the first step of the process that might involve several interactions between the VE initiator and these potential partners in order to gather additional information and to reach agreements on the forms and terms of cooperation (Camarinha-Matos and Afsarmanesh, 1999, pp. 493). Given the manufacturing requirements, the initiator or coordinator of dynamic VE should first prepare several alternative schemes that can satisfy the requirements. Next, the coordinator should evaluate these alternative schemes by means of some multi-objective analysis methodologies, such as multi-objective decision-making (MODM), data envelopment analysis (EDA), analytic hierarchy process (AHP) or fuzzy analytic hierarchy process (FAHP), fuzzy comprehensive evaluation (FCE), or statistical analysis, multi-attribute utility theory (MAUT). Then the coordinator should determine the formation scheme. The present paper deals with the search procedure of alternative schemes to form VE for the coordinator. In this paper, a logic model is first put forward to describe the relationships among the manufacturing capabilities of enterprises and the manufacturing requirements of clients within the range of the applied industry. It will suffer little change in a considerable long period because of its qualitative nature. This advantage will make it easy to maintain. Next, the procedures for the manufacturing enterprises seeking partners with this logic qualitative model are expressed mathematically. Based upon this logic model, three search algorithms are brought about for three different optimal goals, respectively: minimizing the number of enterprises, minimizing the number of redundant basic capability units in the dynamic enterprise alliances and minimizing the number of basic capability units useful to the manufacturing requirement of each enterprise. After that, theoretical analyses are made for these algorithms. It is demonstrated that these three search algorithms are all polynomial with respect to the number of enterprises belonging to a particular industry. This number is usually fairly large and represents the size of the search problem. In the end, it is shown that these three algorithms are effective and reliable with an example.
Structure compilation: trading structure for features
Authors: Percy Liang, Hal Daumé,  III, Dan Klein
Venue: Proceedings of the 25th international conference on Machine learning (2008)

Structured models often achieve excellent performance but can be slow at test time. We investigate structure compilation, where we replace structure with features, which are often computationally simpler but unfortunately statistically more complex. We analyze this tradeoff theoretically and empirically on three natural language processing tasks. We also introduce a simple method to transfer predictive power from structure to features via unlabeled data, while incurring a minimal statistical penalty.
Object flow analysis: taking an object-centric view on dynamic analysis
Authors: Adrian Lienhard, Stéphane Ducasse, Tudor Gîrba
Venue: Proceedings of the 2007 international conference on Dynamic languages: in conjunction with the 15th International Smalltalk Joint Conference 2007 (2007)

To extract abstract views of the behavior of an object-oriented system for reverse engineering, a body of research exists that analyzes a system's runtime execution. Those approaches primarily analyze the control flow by tracing method execution events. However, they do not capture information flows. We address this problem by proposing a novel dynamic analysis technique named Object Flow Analysis, which complements method execution tracing with an accurate analysis of the runtime flow of objects. To exemplify the usefulness of our analysis we present a visual approach that allows a system engineer to study classes and components in terms of how they exchange objects at runtime. We illustrate and validate our approach on two case studies.
Efficient system design space exploration using machine learning techniques
Authors: Berkin Ozisikyilmaz, Gokhan Memik, Alok Choudhary
Venue: Proceedings of the 45th annual Design Automation Conference (2008)

Computer manufacturers spend a huge amount of time, resources, and money in designing new systems and newer configurations, and their ability to reduce costs, charge competitive prices and gain market share depends on how good these systems perform. In this work, we develop predictive models for estimating the performance of systems by using performance numbers from only a small fraction of the overall design space. Specifically, we first develop three models, two based on artificial neural networks and another based on linear regression. Using these models, we analyze the published Standard Performance Evaluation Corporation (SPEC) benchmark results and show that by using the performance numbers of only 2% and 5% of the machines in the design space, we can estimate the performance of all the systems within 9.1% and 4.6% on average, respectively. Then, we show that the performance of future systems can be estimated with less than 2.2% error rate on average by using the data of systems from a previous year. We believe that these tools can accelerate the design space exploration significantly and aid in reducing the corresponding research/development cost and time-to-market.
Parametric Yield Modeling and Simulations of FPGA Circuits Considering Within-Die Delay Variations
Authors: Pete Sedcole, Peter Y. K. Cheung
Venue: ACM Transactions on Reconfigurable Technology and Systems (TRETS) (2008)

Variations in the semiconductor fabrication process results in differences in parameters between transistors on the same die, a problem exacerbated by lithographic scaling. Field-Programmable Gate Arrays may be able to compensate for within-die delay variability, by judicious use of reconfigurability. This article presents two strategies for compensating within-die stochastic delay variability by using reconfiguration: reconfiguring the entire FPGA, and relocating subcircuits within an FPGA. Analytical models for the theoretical bounds on the achievable gains are derived for both strategies and compared to models for worst-case design as well as statistical static timing analysis (SSTA). All models are validated by comparison to circuit-level Monte Carlo simulations. It is demonstrated that significant improvements in circuit yield and timing are possible using SSTA alone, and these improvements can be enhanced by employing reconfiguration-based techniques.
On Pseudorandom Generators with Linear Stretch in NC0
Authors: Benny Applebaum, Yuval Ishai, Eyal Kushilevitz
Venue: Computational Complexity (2008)

We consider the question of constructing cryptographic pseudorandom generators (PRGs) in NC0, namely ones in which each bit of the output depends on just a constant number of input bits. Previous constructions of such PRGs were limited to stretching a seed of n bits to n +¿o(n) bits. This leaves open the existence of a PRG with a linear (let alone superlinear) stretch in NC0. In this work we study this question and obtain the following main results: We show that the existence of a linear-stretch PRG in NC0¿implies non-trivial hardness of approximation results without relying on PCP machinery. In particular, it implies that Max3SAT is hard to approximate to within some multiplicative constant. We construct a linear-stretch PRG in NC0¿under a specific intractability assumption related to the hardness of decoding "sparsely generated" linear codes. Such an assumption was previously conjectured by Alekhnovich (FOCS 2003).
An hybrid approach to load forecasting using MARS and Kohonen maps
Authors: F. Ortega, N. Roqueñí, C. Menéndez, M. T. Rodríguez
Venue: Proceedings of the 4th WSEAS International Conference on Applied Informatics and Communications (2004)

This paper presents the analysis of load forecasting for the electric system of Slovakia in January 1999. Due to the small quantity of available data, the predictor is designed after a decomposition of the different variables of influence, using a hybrid methodology with Unsupervised Kohonen Neural Networks and Multidimensional Adaptive Regression Splines. Temperature is modeled with piecewise linear interpolation and forecasting is compensated with the influence of holidays on the days after and before. Results were tested with real data from Dec. 1998 with a very promising level of success.
Expected system energy consumption minimization in leakage-aware DVS systems
Authors: Jian-Jia Chen, Lothar Thiele
Venue: Proceeding of the 13th international symposium on Low power electronics and design (2008)

The pursuit of energy efficiency is becoming more and more important in hardware and software designs. This research explores energy-efficient scheduling for a periodic real-time task with uncertain execution time in dynamic voltage scaling (DVS) systems with non-negligible leakage/static power consumption. Distinct from the assumption of non-reducible static power consumption in the literature, this paper considers the possibility to reduce it by turning a processor to a dormant mode. We propose an algorithm to derive an optimal frequency assignment to minimize the expected energy consumption without procrastination, while another extended algorithm is developed to apply procrastination scheduling for further energy reduction. Experimental results show that the proposed algorithms can effectively minimize the expected energy consumption.
Distributing workflows over a ubiquitous P2P network
Authors: Eddie Al-Shakarchi, Pasquale Cozza, Andrew Harrison, Carlo Mastroianni, Matthew Shields, Domenico Talia, Ian Taylor
Venue: Scientific Programming (2007)

This paper discusses issues in the distribution of bundled workflows across ubiquitous peer-to-peer networks for the application of music information retrieval. The underlying motivation for this work is provided by the DART project, which aims to develop a novel music recommendation system by gathering statistical data using collaborative filtering techniques and the analysis of the audio itsel, in order to create a reliable and comprehensive database of the music that people own and which they listen to. To achieve this, the DART scientists creating the algorithms need the ability to distribute the Triana workflows they create, representing the analysis to be performed, across the network on a regular basis (perhaps even daily) in order to update the network as a whole with new workflows to be executed for the analysis. DART uses a similar approach to BOINC but differs in that the workers receive input data in the form of a bundled Triana workflow, which is executed in order to process any MP3 files that they own on their machine. Once analysed, the results are returned to DART's distributed database that collects and aggregates the resulting information. DART employs the use of package repositories to decentralise the distribution of such workflow bundles and this approach is validated in this paper through simulations that show that suitable scalability is maintained through the system as the number of participants increases. The results clearly illustrate the effectiveness of the approach.
A simple method of computing the sample size for Chi-square test for the equality of multinomial distributions
Authors: Jeffrey A. Nisen, Neil C. Schwertman
Venue: Computational Statistics Data Analysis (2008)

Computing the appropriate sample size is one of the most important aspects of designing an experiment. For the Chi-square test of the equality of multinomial populations a very simple method is proposed for calculating the sample size to satisfy specified significance level and power. This method is especially understandable and does not require software nor the non-central Chi-square tables. Simulations are used to verify the accuracy of the new method.
Latency and bandwidth efficient communication through system customization for embedded multiprocessors
Authors: Chenjie Yu, Peter Petrov
Venue: Proceedings of the 45th annual Design Automation Conference (2008)

We present a cross-layer customization methodology for latency and bandwidth efficient inter-core communication in embedded multiprocessors. The methodology integrates compiler, operating system, and hardware support to achieve a bandwidth efficient, snoop-free, and coherence cache miss-free shared memory communication between synchronized producer and consumers cores. A compiler-driven code transformation is introduced that utilizes a simple ISA support in the form of a special write-through store instruction. It ensures that producer writes are propagated to the consumers with a single bus transaction per cache block when the producer performs the last write to that cache line before exiting its synchronization region. Information regarding the shared buffers involved in the communications is captured by the OS and provided to the cores with the purpose of filtering bus traffic and performing remote updates when necessary. The end result of the proposed methodology is a single bus transaction per shared cache block and snoop-free communication between a producer and a set of consumers with no intervening coherence misses on the consumer caches. Our experiments demonstrate the significant reductions in both bus traffic and cache misses for a set of multiprocessor benchmarks.
Dynamic visualisation of ski data: a context aware mobile piste map
Authors: Mark D Dunlop, Brian Elsey, Michelle Montgomery Masters
Venue: Proceedings of the 9th international conference on Human computer interaction with mobile devices and services (2007)

Tourism has been a key driver for mobile applications. This short paper presents the design and initial evaluation of a mobile phone based visualisation to support skiers. Paper piste maps often prove difficult for skiers and provide no natural way of assessing the mountain conditions while on the slope. They are physically large and difficult to manipulate in wind, they provide no information on which runs are currently open, no indication of which runs the user may find most enjoyable, and no information about the snow and weather conditions on each run. All this information is available at resorts, usually on notice boards or screens at central meeting points. The visualisation and personalisation approaches presented here combine this information and a map overview on a mobile phone screen. Initial trials showed significantly better performance for some tasks on the mobile condition (both in terms of accuracy and time), with no clear result for other tasks.
Studying the stability of a four rotor helicopter prototype using the lifting operators
Authors: L. Acosta, J. Toledo, M. Sigut, G. N. Marichal, J. A. Mendez, S. Torres
Venue: Proceedings of the 4th WSEAS International Conference on Systems Theory and Scientific Computation (2004)

In this paper, a study of a four rotor helicopter prototype control is presented. Firstly, the different aspects of the prototype construction are described, making a special emphasis in the mechanics, the design of the sensorial and actuation systems and the prototype control. Next, the formalism of the lifting and inverse lifting operators is presented. As it will be shown, they can be applied to this multifrequency system in order to allow using a simple lineal method to analytically determine the closed-loop system stability.
Spectral Regrowth Reduction for Digital Audio Broadcasting Using EER Amplifiers
Authors: Brian William Walker, Jacek Ilow
Venue: Proceedings of the Communication Networks and Services Research Conference (2008)

For the amplitude modulation (AM) radio broadcast band, there are several standards being considered for digital audio broadcast (DAB), all using orthogonal frequency-division multiplexing (OFDM). One of the main challenges to implementing digital audio broadcasting is that existing broadcast equipment was not designed for it. Unlike analog AM, which is a low bandwidth amplitude modulated signal, OFDM is a noise-like signal with significant amplitude and phase modulation. Most AM transmitters use an envelope elimination and restoration (EER) amplifier architecture, where the amplitude and phase components of the signal are amplified separately then recombined at the high power stage. The magnitude and phase component bandwidths are several times that of the input signal, and any filtering in the amplifier will result in spectral regrowth due to poor cancellation of this high frequency content. This paper develops the concept of using time-domain preprocessing on the signal to reduce the bandwidth expansion in EER amplifiers. The processing exploits the localization of the bandwidth expansion and its correlation with spectral regrowth at the output. The proposed algorithm identifies distortion-causing signal sections and replaces each one with an alternative signal trajectory. Using the processing, out of band emissions are reduced at the expense of increased computational complexity and error vector magnitude. Promising results are shown for the DRM signal, with reductions in spectral regrowth of up to 10 dB.
Stochastic DVS-based dynamic power management for soft real-time systems
Authors: Mehdi Kargahi, Ali Movaghar
Venue: Microprocessors Microsystems (2008)

This paper introduces a stochastic dynamic power management policy for soft real-time systems. Such a system comprises a single processor with the capability of dynamic voltage scaling (DVS). The policy uses DVS to consume less power in the processor while satisfying some performance constraints. The idea is based on a Markovian model of the system, which presents an analytical technique for tuning the system parameters and evaluating the effectiveness of the policy. Real-time jobs arrive according to a Poisson process and have exponentially distributed service times and relative deadlines. The power management policy is designed to reduce the long-run power consumption of the system while guaranteeing an upper bound on the fraction of jobs missing their deadlines. It is also shown that the method can be applied to non-Markovian systems using a hybrid analytical-simulation method. Moreover, the method can improve the tradeoff between power and performance when jitters are introduced in the traffic intensity or on the average service time. To satisfy the desired performance constraints of the system, a number of population-dependent speeds are required. Such speeds are extracted from the model of an ideal system with continuous speeds and no speed switching overhead. Since the speed levels in real processors are not continuous, each required speed is approximated in a probabilistic manner by switching between its two immediate neighbors. The time and energy overheads of the switchings are also taken into account. The analytical and simulation results illustrate that the long-run power consumption of the resulting system is close to that of the ideal system, while the performance constraints are completely satisfied.
A Secure Virtualized Logging Scheme for Digital Forensics in Comparison with Kernel Module Approach
Authors: Bin-Hui Chou, Kohei Tatara, Taketoshi Sakuraba, Yoshiaki Hori, Kouichi Sakurai
Venue: Proceedings of the 2008 International Conference on Information Security and Assurance (isa 2008) (2008)

Digital forensics encompasses the process of identifying the perpetrator and the criminal method by analyzing the logs generated in the computer. Log files record the activities of the computer and by reading them one can know what kind of event happened at a certain time. Therefore, secure logs with the integrity property are essential. In this paper, we discuss two approaches to achieve the integrity of logs- the kernel module and virtualization, and compare them. Although virtualization is more inefficient in performance than the kernel module, it provides more security properties for logs. Thus, we then focus on the virtualization approach with a detailed proposal, which describes ways to preserve logs without tampering and deletion.
Q-adic transform revisited
Authors: Jean-Guillaume Dumas
Venue: Proceedings of the twenty-first international symposium on Symbolic and algebraic computation (2008)

We present an algorithm to perform a simultaneous modular reduction of several residues. This enables to compress polynomials into integers and perform several modular operations with machine integer arithmetic. The idea is to convert the X-adic representation of modular polynomials, with X an indeterminate, to a q-adic representation where q is an integer larger than the field characteristic. With some control on the different involved sizes it is then possible to perform some of the q-adic arithmetic directly with machine integers or floating points. Depending also on the number of performed numerical operations one can then convert back to the q-adic or X-adic representation and eventually mod out high residues. In this note we present a new version of both conversions: more tabulations and a way to reduce the number of divisions involved in the process are presented. The polynomial multiplication is then applied to arithmetic and linear algebra in small finite field extensions.
Jim Gray at Berkeley
Authors: Michael A. Harrison
Venue: ACM SIGMOD Record (2008)

Jim Gray spent a decade as a student and researcher at Berkeley. In action, he is remembered for his breadth, his depth, and his generosity.