ppxscal/embedding_network huggingface dataset:
Electronic Implementation of Biologically Inspired Neuromorphic Vision Sensor
Authors: Dheerendra Singh Gangwar, Tarun Tiwari, Baldev Singh
Venue: Proceedings of the 2008 Second Asia International Conference on Modelling & Simulation (AMS) (2008)

Neuromophic vision sensor is an electronic implementation of vision algorithm on semiconductor. Neuromophic systems are biologically inspired artificial neural systems that mimic algorithmic behavior of biological systems. The focus of this paper is to highlight photo transduction operation and conversion of optical information into the neuronal signal in the similar fashion as it takes place in biological retina. These systems have efficient adaptive and intelligent control techniques resembling with biological nervous system based on optical and electronic signal processing properties of semiconductor materials. Proposed electronic model contains adaptive photoreceptors as light sensors and other circuit components such as averaging circuits; circuits representing ganglion cells; neuronal firing circuits etc these entire elements junction to sense brightness, size, shape and orientation to distinguish objects in closer proximity. Neuromophic vision chip can lead towards development of sensory based artificial systems having parallel collective computation, adaptation, learning and memory implemented locally at each stage of processing of information.
Robust chip-level clock tree synthesis for SOC designs
Authors: Anand Rajaram, David Z. Pan
Venue: Proceedings of the 45th annual Design Automation Conference (2008)

A key problem that arises in System-on-a-Chip (SOC) designs of today is the Chip-level Clock Tree Synthesis (CCTS). CCTS is done by merging all the clock trees belonging to different IPs per chip specifications. A primary requirement of CCTS is to balance the sub-clock-trees belonging to different IPs such that the entire tree has a small skew across all process corners. This helps in timing closure across all the design corners. Another important requirement of CCTS is to reduce clock divergence between IPs that have critical timing paths between them, thereby reducing maximum possible clock skew in the critical paths and thus improves yield. In this work, we propose effective CCTS algorithms to simultaneously reduce multi-corner skew and clock divergence. To the best of our knowledge, this is the first work that attempts to solve this practically important problem. Experimental results on several testcases indicate that our methods achieve 10%-31%(20% on average) clock divergence reduction and between 16--64ps skew reduction (1.6%-6.4% of cycle time for a 1GHz clock) with less than 0.5% increase in buffer area/wirelength compared to existing CTS algorithms.
A quasi-Newton approach to non-smooth convex optimization
Authors: Jin Yu, S. V. N. Vishwanathan, Simon Günter, Nicol N. Schraudolph
Venue: Proceedings of the 25th international conference on Machine learning (2008)

We extend the well-known BFGS quasi-Newton method and its limited-memory variant LBFGS to the optimization of non-smooth convex objectives. This is done in a rigorous fashion by generalizing three components of BFGS to subdifferentials: The local quadratic model, the identification of a descent direction, and the Wolfe line search conditions. We apply the resulting subLBFGS algorithm to L2-regularized risk minimization with binary hinge loss, and its direction-finding component to L1-regularized risk minimization with logistic loss. In both settings our generic algorithms perform comparable to or better than their counterparts in specialized state-of-the-art solvers.
Fuzzy Online Risk Assessment for Distributed Intrusion Prediction and Prevention Systems
Authors: Kjetil Haslum, Ajith Abraham, Svein Knapskog
Venue: Proceedings of the Tenth International Conference on Computer Modeling and Simulation (2008)

A Distributed Intrusion Prediction and Prevention Systems (DIPPS) not only detects and prevents possible intrusions but also possesses the capability to predict possible intrusions in a distributed network. Based on the DIPS sensors, instead of merely preventing the attackers or blocking traffic, we propose a fuzzy logic based online risk assessment scheme. The key idea of DIPPS is to protect the network(s) linked to assets, which are considered to be very risky. To implement DIPPS we used a Distributed Intrusion Detection System (DIDS) with extended real time traffic surveillance and online risk assessment. To model and predict the next step of an attacker, we used a Hidden Markov Model (HMM) that captures the interaction between the attacker and the network. The interaction between various DIDS and integration of their output are achieved through a HMM. The novelty of this paper is the detailed development of Fuzzy Logic Controllers to estimate the various risk(s) that are dependent on several other variables based on the inputs from HMM modules and the DIDS agents. To develop the fuzzy risk expert system, if-then fuzzy rules were formulated based on interviews with security experts and network administrators. Preliminary results indicate that such a system is very practical for protecting assets which are prone to attacks or misuse, i.e. highly at risk.
Functional link neural network cascaded with Chebyshev orthogonal polynomial for nonlinear channel equalization
Authors: Haiquan Zhao, Jiashu Zhang
Venue: Signal Processing (2008)

Nonlinear intersymbol interference (ISI) leads to significant error rate in nonlinear communication and digital storage channel. In this paper, therefore, a novel computationally efficient functional link neural network cascaded with Chebyshev orthogonal polynomial is proposed to combat nonlinear ISI. The equalizer has a simple structure in which the nonlinearity is introduced by functional expansion of the input pattern by trigonometric polynomial and Chebyshev orthogonal polynomial. Due to the input pattern and nonlinear approximation enhancement, the proposed structure can approximate arbitrarily nonlinear decision boundaries. It has been utilized for nonlinear channel equalization. The performance of the proposed adaptive nonlinear equalizer is compared with functional link neural network (FLNN) equalizer, multilayer perceptron (MLP) network and radial basis function (RBF) along with conventional normalized least-mean-square algorithms (NLMS) for different linear and nonlinear channel models. The comparison of convergence rate, bit error rate (BER) and steady state error performance, and computational complexity involved for neural network equalizers is provided.
Kuka: An Architecture for Associating an Augmented Artefact with Its User Using Wearable Sensors
Authors: Kaori Fujinami, Susanna Pirttikangas
Venue: Proceedings of the 2008 IEEE International Conference on Sensor Networks, Ubiquitous, and Trustworthy Computing (sutc 2008) (2008)

In this paper, we present an architecture for associating a person and an artefact (a daily object) utilized by him/her in an ad-hoc and extensible manner. The proximity of the acceleration signal patterns from wearable sensors on different parts of the body and sensor augmented artefacts are utilized for making an association. The proposed architecture also provides a filtering facility to reduce the possibility of miss-association between an artefact and a person who is using a different artefact in a similar way but just exists in close vicinity. With the association information, a system can provide a more reliable context-aware service as the particular role of an artefact and the proprietary nature of such an accessory gives additional knowledge for the system. A distributed architecture and a correlation coefficient based approach is realized. We describe the design, a prototype implementation and a basic experiment.
Toughness, trees, and walks
Authors: M. N. Ellingham, Xiaoya Zha
Venue: Journal of Graph Theory (2000)

A graph is t-tough if the number of components of G\S is at most |S|-t for every cutset S &sube; V (G). A k-walk in a graph is a spanning closed walk using each vertex at most k times. When k = 1, a 1-walk is a Hamilton cycle, and a longstanding conjecture by Chv&aacute;tal is that every sufficiently tough graph has a 1-walk. When k &ge; 3, Jackson and Wormald used a result of Win to show that every sufficiently tough graph has a k-walk. We fill in the gap between k = 1 and k &ge; 3 by showing that, when k = 2, every sufficiently tough (specifically, 4-tough) graph has a 2-walk. To do this we first provide a new proof for and generalize a result by Win on the existence of a k-tree, a spanning tree with every vertex of degree at most k. We also provide new examples of tough graphs with no k-walk for k &ge; 2. &copy; 2000 John Wiley Sons, Inc. J Graph Theory 33:125137, 2000
Visibility of control in adaptive systems
Authors: Hausi Müller, Mauro Pezzè, Mary Shaw
Venue: Proceedings of the 2nd international workshop on Ultra-large-scale software-intensive systems (2008)

Adaptive systems respond to changes in their internal state or external environment with guidance from an underlying control system. ULS systems are particularly likely to require dynamic adaptation because of their decentralized control and the large number of independent stakeholders whose actions are integral to the system's behavior. Adaptation may take various forms, but the system structure will almost inevitably include one or more closed feedback loops. We argue that adaptability is a characteristic of a solution, not of a problem, and that the feedback loop governing control of adaptability should be explicit in design and analysis and either explicit or clearly traceable in implementation.
Front-end PPA architecture for three input multiplier
Authors: Christopher C. Doss
Venue: Proceedings of the 10th WSEAS International Conference on APPLIED MATHEMATICS (2006)

We introduce a new implementation of a three-input multiplier. This multiplier is capable of accepting three binary inputs, and producing the product, a*b*c. Although this implementation requires more space, it reduces the number of clock cycles required to multiply three numbers. In this paper, we present the front end 4-bit partial product array that can be incorporated into a typical multiplier to extend the multiplication to three inputs.
A synchronization algorithm based on cyclostationarity in a pilot-embedded OFDM system
Authors: Liting Guo
Venue: Proceedings of the 4th international conference on mobile technology, applications, and systems and the 1st international symposium on Computer human interaction in mobile technology (2007)

In this paper, the cyclostationarity property of the OFDM signal which contains pilots is first proved. Then an algorithm for estimating the carrier frequency offset based on the cyclic autocorrelation function of the cyclostationary signal is proposed. Compared with those algorithms using pilots directly, this new algorithm can get larger frequency offset estimation up to half of the bandwidth of the OFDM system, and the symbol timing can be estimated as well.
Voice activity detection applied to hands-free spoken dialogue robot based on decoding using acoustic and language model
Authors: Hiroyuki Sakai, Tobias Cincarek, Hiromichi Kawanami, Hiroshi Saruwatari, Kiyohiro Shikano, Akinobu Lee
Venue: Proceedings of the 1st international conference on Robot communication and coordination (2007)

Speech recognition and speech-based dialogue are means for realizing communication between humans and robots. In case of conventional system setup a headset or a directional microphone is used to collect speech with high signal-to-noise ratio (SNR). However, the user must wear a microphone or has to approach the system closely for interaction. Therefore it's preferable to develop a hands-free speech recognition system which enables the user to speak to the system from a distant point. To collect speech from distant speakers a microphone array is usually employed. However, the SNR will degrade in a real environment because of the presence of various kinds of background noise besides the user's utterance. This will most often decrease speech recognition performance and no reliable speech dialogue would be possible. Voice Activity Detection (VAD) is a method to detect the user utterance part in the input signal. If VAD fails, all following processing steps including speech recognition and dialogue will not work. Conventional VAD based on amplitude level and zero cross count is difficult to apply to hands-free speech recognition, because speech detection will most often fail due to low SNR. This paper proposes a VAD method based on the acoustic model (AM) for background noise and the speech recognition algorithm applied to hands-free speech recognition. There will always be non-speech segments at the beginning and end of each user utterance. The proposed VAD approach compares the likelihood of phoneme and silence segments in the top recognition hypotheses during decoding. We implemented the proposed method for the open-source speech recognition engine Julius. Experimental results for various SNRs conditions show that the proposed method attains a higher VAD accuracy and higher recognition rate than conventional VAD.
A self-training semi-supervised SVM algorithm and its application in an EEG-based brain computer interface speller system
Authors: Yuanqing Li, Cuntai Guan, Huiqi Li, Zhengyang Chin
Venue: Pattern Recognition Letters (2008)

In this paper, we first present a self-training semi-supervised support vector machine (SVM) algorithm and its corresponding model selection method, which are designed to train a classifier with small training data. Next, we prove the convergence of this algorithm. Two examples are presented to demonstrate the validity of our algorithm with model selection. Finally, we apply our algorithm to a data set collected from a P300-based brain computer interface (BCI) speller. This algorithm is shown to be able to significantly reduce training effort of the P300-based BCI speller.
Further Classification of Bluetooth-Enabled Ad-Hoc Networks Depending on a Risk Analysis within Each Classified Group
Authors: Keijo M. J. Haataja
Venue: Proceedings of the Seventh International Conference on Networking (2008)

Since ad-hoc networks have no fixed infrastructure, there are many different kinds of Bluetooth-enabled ad-hoc networks with various security procedures and security requirements. In this paper, we make further classification of Bluetooth-enabled ad-hoc networks and their security procedures/requirements depending on a risk analysis within each classified group. In addition, we evaluate possible breaches and damage that can be inflicted by various attacks in such scenarios. Moreover, we devise security procedures to prevent malicious Bluetooth devices from stealing information from other Bluetooth devices.
ROBOTRAK: a centralized real-time monitoring, control, and coordination system for robot swarms
Authors: Ming Li, Anthony Alvarez, Francesco De Pellegrini, B. Prabhakaran, Imrich Chlamtac
Venue: Proceedings of the 1st international conference on Robot communication and coordination (2007)

Robotic swarm has been a hot topic in recent years. In robotic swarms, a team of network enabled bots are dispatched to some areas to fulfill certain tasks, such as military actions and chemical substance tracking. However, how to monitor, control, and coordinate swarms in a real-time manner such that robots can collaborate efficiently and effectively is a challenging issue. In this paper, a real-time software on enforcing the monitoring, control, and coordination of intelligent robotic swarms (ROBOTRAK) has been developed. All the designed features and functionalities have been successfully implemented with user friendly graphical user interfaces (GUI) and extensively tested in various scenarios such as multiple robots and multiple servers running the ROBOTRAK software. Results show that ROBOTRAK is user friendly and can help monitor, control, and coordinate robotic swarms timely, effectively, and efficiently.
EVEY: enhancing privacy of service discovery in pervasive computing
Authors: Roberto Speicys Cardoso, Sonia Ben-Mokhtar, Aitor Urbieta, Valérie Issarny
Venue: Proceedings of the 2007 ACM/IFIP/USENIX international conference on Middleware companion (2007)

Service discovery is critical to the privacy of service clients and providers. Personal information can be disclosed when looking for services or deduced from historical service discovery data, and must hence be protected from illegitimate access. Privacy-aware service discovery protocols, however, must still be flexible and scalable, in particular to support the requirements of service-oriented pervasive computing. In this paper we present EVEY, a privacy-aware service discovery protocol that supports syntactic match and semantic match of service requests and advertisements. Private information related to service discovery is protected by introducing ambiguity in both service advertisements and service requests so that they can possibly represent a group of services instead of a single specific service instance. We detail the protocol and based on a prototype we present a preliminary performance evaluation.
Low power chips: a fabless asic perspective
Authors: Shashank Bhonge, Vamsi Boppana
Venue: Proceeding of the 13th international symposium on Low power electronics and design (2008)

The fabless ASIC model has changed the landscape of ASIC design by offering a high-quality, cost-effective and open alternative to realizing ASICs. The very nature of this model (because of its reliance on the third-party foundry, IP ecosystem) offers unique challenges and opportunities for implementing low power chips. This tutorial presents an overview of the exciting low power challenges, opportunities and solutions available in a fabless ASIC model. We review state-of-the-art low power IC solutions and case studies from varied markets, including processor-based, wired, wireless, consumer and multi-core chips. We start with a discussion on technology trends and low power challenges. We next review the spectrum of low power solutions and identify the appropriate opportunities that are applicable to the fabless ASIC model. We also discuss unique technology solutions that employ the use of transistor-level transformations that extend the solutions typically available in the ASIC model. Next, we discuss how these solutions are deployed in the model. We finally present detailed case studies of ICs. The low power techniques employed in the ICs include selection of technology node/process, selection of macros, multi-voltage design, power gating, custom transistor-level circuits, clocking, selection and optimization of standard cell libraries, design/architecture and power planning, advanced timing and power optimization, low power design closure, innovative packaging and power impact on variability-tolerance. The tutorial arms the audience with the best techniques, tools and methodologies to achieve the lowest power Silicon for state-of-the-art ASICs.
Sharp embeddings of Besov spaces involving only logarithmic smoothness
Authors: António M. Caetano, Amiran Gogatishvili, Bohumir Opic
Venue: Journal of Approximation Theory (2008)

We use Kolyada's inequality and its converse form to prove sharp embeddings of Besov spaces B"p","r^0^,^@b (involving the zero classical smoothness and a logarithmic smoothness with the exponent @b) into Lorentz-Zygmund spaces. We also determine growth envelopes of spaces B"p","r^0^,^@b. In distinction to the case when the classical smoothness is positive, we show that we cannot describe all embeddings in question in terms of growth envelopes.
SQUARE: A New TCP Variant for Future High Speed and Long Delay Environments
Authors: Yansheng Qu, Junzhou Luo, Wei Li, Bo Liu, Laurence T. Yang
Venue: Proceedings of the 22nd International Conference on Advanced Information Networking and Applications (2008)

The increasing diversity of Internet application requirements has spurred recent interest in transport protocol for high speed delay product connectivity. Addressing the deficiency of previous protocols, this paper presents a spectrum of time based odd function congestion control protocols for deployment in high speed and long distance networks. Through extensive analysis we focus on SQUARE, one of the protocols in odd function congestion control. Without the need to revise the current end-to-end architecture, SQUARE is shown to be efficient when there is bandwidth available, to be fair when many flows compete with each other for the same bottleneck, to be friendly when deployed with the conventional TCP, to be robust when there are oscillations in the network.
Taxonomy and analysis of IP micro-mobility protocols in single and simultaneous movements scenarios
Authors: G. De Marco, L. Barolli, Salvatore Loreto
Venue: Mobile Information Systems (2007)

The micro-mobility is an important aspect in mobile communications, where the applications are anywhere and used anytime. One of the problems of micro-mobility is the hand-off latency. In this paper, we analyse two solutions for IP micro-mobility by means of a general taxonomy. The first one is based on the Stream Control Transmission Protocol (SCTP), which allows the dynamic address configuration of an association. The second one is based on the Session Initiation Protocol (SIP), which is the most popular protocol for multimedia communications over IP networks. We show that for the SCTP solution, there is room for further optimisations of the hand-off latency by adding slight changes to the protocol. However, as full end-to-end solution, SCTP is not able to handle simultaneous movement of hosts, whose probability in general cannot be neglected. On the other hand, the SIP can handle both single and simultaneous movements cases, although the hand-off latency can increase with respect to the SCTP solution. We show that for a correct and fast hand-off, the SIP server should be statefull.
Multi-layer perspectives and spaces in SOA
Authors: Adrian Mos, Alain Boulze, Samuel Quaireau, Claude Meynier
Venue: Proceedings of the 2nd international workshop on Systems development in SOA environments (2008)

This paper presents a multi-layered vision for Service Oriented Architectures and highlights outstanding research challenges in meeting this vision. In particular, we focus on business process and architecture modelling and give an overview of relevant Eclipse tooling for the SOA design space, while discussing missing pieces. We present how several SOA-related standards such as BPMN, BPEL, SCA and JBI can interoperate and introduce some cross-cutting monitoring concepts that are essential for achieving business flexibility.