ppxscal/embedding_network huggingface dataset:
Strategy for expert system literacy
Authors: J Steve Davis, Charles W McNichols
Venue: Proceedings of the conference on The 1987 ACM SIGBDP-SIGCPR Conference (1987)

The growing business community interest and activity in implementing expert systems creates a need for relevant business school educational activity at undergraduate, graduate, and professional development levels. In some cases, expert systems concepts will have to be integrated into existing courses. In other situations new courses will be developed to present the material. Because of the scarcity of appropriately educated faculty, the material will often be presented by instructors with no formal academic background in artificial intelligence or expert system concepts. Thus, there is a need for a flexible, integrated set of educational support materials to allow business schools to update their curricula. The market for such materials is significant. All 230 business schools accredited by the American Assembly of Collegiate Schools of Business (the AACSB), re required to include information systems content in their curricula. This paper describes a set of educational modules that provide a basis for a brief introduction to the topic, a major course, and an entire quarter/semester presentation. We discuss our experience with educational software and provide recommendations on using it effectively in expert system courses.
A language for music printing
Authors: John S. Gourlay
Venue: Communications of the ACM (1986)

A music-description language designed to facilitate both electronic communication and publication-quality printing of musical scores incorporates a syntax for expressing concurrency and two-dimensionality and places new demands on text formatters.
Handling redundancy in the processing of recursive database queries
Authors: Jiawei Han, Lawrence J. Henschen
Venue: ACM SIGMOD Record (1987)

Redundancy may exist in the processing of recursive database queries at four different levels precompilation level, iteration level, tuple processing level and file accessing level. Techniques for reducing redundant work at each level are studied. In the precompilation level, the optimization techniques include removing redundant parts in a rule cluster, simplifying recursive clusters and sharing common subexpressions among rules. At the iteration level, the techniques discussed are the use of frontier relations and the counting method. At the tuple processing level, we use merging and filtering methods to exclude processed drivers from database reaccessing. Finally, at the file accessing level, I/O cost can be further reduced by level relaxation. We conclude that even for complex recursion, redundant database processing can be considerably reduced or eliminated by developing appropriate algorithms.
The implementation of a state machine compiler
Authors: C. Kingsley
Venue: Proceedings of the 24th ACM/IEEE Design Automation Conference (1987)

This paper describes VTIstate, VLSI Technology's state machine compiler. The compiler derives combinational logic and registers to make a state machine, and synthesizes the combinational logic with three optimization steps. The 1986 Design Automation conference synthesis benchmark set is used to compare the results with previously reported logic synthesis programs.
Efficient algorithms for finding maximum matching in graphs
Authors: Zvi Galil
Venue: ACM Computing Surveys (CSUR) (1986)

This paper surveys the techniques used for designing the most efficient algorithms for finding a maximum cardinality or weighted matching in (general or bipartite) graphs. It also lists some open problems concerning possible improvements in existing algorithms and the existence of fast parallel algorithms for these problems.
Project Nick: meetings augmentation and analysis
Authors: Peter Cook, Clarence Ellis, Mike Graf, Gail Rein, Tom Smith
Venue: ACM Transactions on Information Systems (TOIS) (1987)

The Software Technology Program of MCC is investigating the early part of the design process, before requirements are established, for large-scale distributed systems. Face-to-face meetings are an important activity during this phase of a project since they provide a medium for direction, exploration, and consensus building. Project Nick is attempting to apply automated facilities to the process, conduct, and semantic capture of design meetings. Primary topics covered in this paper are meeting analysis, meeting augmentation, and a model of meeting progression that serves as the framework for our work.
Design and implementation of a C-based language for distributed real-time systems
Authors: A Rizk, F Halsall
Venue: ACM SIGPLAN Notices (1987)

This paper describes the design and implementation of a concurrent programming language suitable for use with real-time distributed systems. The language, MC, is an extension of the language C with some of the concrrency features of ADA. The implementation provides portability and simplicity by assuming a basic C compiler for its compilation and a minimal semaphore-based run-time support kernel.
Automated learning of rules for heuristic classification systems
Authors: A Kent Spackman
Venue: ACM SIGBIO Newsletter (1986)

New methods for automated construction of knowledge bases for expert classification systems are being developed using a logic-based language and inductive inference techniques. This research addresses deficiencies of currently available methods for deriving classification rules from empiric data. Unate boolean functions are proposed as a useful language for logical classification rules. An example is given showing the use of an algorithm for converting unate functions to a "criteria table" knowledge representation.
The Evolution of Wang Institute's Master of Software Engineering Program
Authors: Mark A. Ardis
Venue: IEEE Transactions on Software Engineering (1987)

Master of Software Engineering (MSE) programs are relatively new. Starting such a program is expensive in terms of human and capital resources. Some of the costs are: preparation of new course materials, acquisition of sophisticated equipment and software, and maintenance of a low student/faculty ratio. In addition, MSE students and faculty have special needs, such as technical background and familiarity with current industrial practices.
The duality of memory and communication in the implementation of a multiprocessor operating system
Authors: M. Young, A. Tevanian, R. Rashid, D. Golub, J. Eppinger
Venue: ACM SIGOPS Operating Systems Review (1987)

Mach is a multiprocessor operating system being implemented at Carnegie-Mellon University. An important component of the Mach design is the use of memory objects which can be managed either by the kernel or by user programs through a message interface. This feature allows applications such as transaction management systems to participate in decisions regarding secondary storage management and page replacement.This paper explores the goals, design and implementation of Mach and its external memory management facility. The relationship between memory and communication in Mach is examined as it relates to overall performance, applicability of Mach to new multiprocessor architectures, and the structure of application programs.
Partitioning Problems in Parallel, Pipeline, and Distributed Computing
Authors: S. H. Bokhari
Venue: IEEE Transactions on Computers (1988)

The problem of optimally assigning the modules of a parallel program over the processors of a multiple-computer system is addressed. A sum-bottleneck path algorithm is developed that permits the efficient solution of many variants of this problem under some constraints on the structure of the partitions. In particular, the following problems are solved optimally for a single-host, multiple-satellite system: partitioning multiple chain-structures parallel programs, multiple arbitrarily structured serial programs, and single-tree structured parallel programs. In addition, the problem of partitioning chain-structured parallel programs across chain-connected systems is solved under certain constraints. All solutions for parallel programs are equally applicable to pipelined programs.
SOAR: Smalltalk without bytecodes
Authors: A. Dain Samples, David Ungar, Paul Hilfinger
Venue: Conference proceedings on Object-oriented programming systems, languages and applications (1986)

We have implemented Smalltalk-80 on an instruction-level simulator for a RISC microcomputer called SOAR. Measurements suggest that even a conventional computer can provide high performance for Smalltalk-80 by abandoning the 'Smalltalk Virtual Machine' in favor of compiling Smalltalk directly to SOAR machine code, linearizing the activation records on the machine stack, eliminating the object table, and replacing reference counting with a new technique called Generation Scavenging. In order to implement these techniques, we had to find new ways of hashing objects, accessing often-used objects, invoking blocks, referencing activation records, managing activation record stacks, and converting the virtual machine images.
Performance Analysis of Parallel Processing Systems
Authors: Randolph Nelson Don Towsley
Venue: IEEE Transactions on Software Engineering (1988)

A bulk arrival M^x/M/c queueing system is used to model a centralized parallel processing system with job splitting. In such a system, jobs wait in a central queue, which is accessible by all the processors, and are split into independent tasks that can be executed on separate processors. The job response time consists of three components: queueing delay, service time, and synchronization delay. An expression for the mean job response time is obtained for this centralized parallel processing system. Centralized and distributed parallel processing systems (with and without job splitting) are considered and their performances compared. Furthermore, the effects of parallelism and overheads due to job splitting are investigated.
Legal liability for malfunction and misuse of expert systems
Authors: Richard M Lucash
Venue: ACM SIGCHI Bulletin (1986)

The expert system represents the evolution of the computer from a tool to manipulate data to one which applies attributes of humans - reasoning, judgment, experience and "intelligence" - to the data, or at least appears to do so. Questions are thus raised about whether this evolution requires a concomitant evolution in the law governing liability for malfunction or misuse of computer systems. Historically, malfunctions of a computer system have been viewed as ultimately traceable to human error, usually in engineering or programming. The ability of an expert system to mimic a human expert has suggested that the humans involved in the creation or use of the system might be less liable than in the case of the nonexpert system, or that some form of liability should attach to the system itself. This article will explore how existing law would apply to expert systems, and consider whether new legal developments are required to deal with such systems.
VLSI circuit testing using and adaptive optimization model
Authors: P. S. Yu, C. M. Krishna, Y.-H. Lee
Venue: Proceedings of the 24th ACM/IEEE Design Automation Conference (1987)

The purpose of testing is to determine the correctness of the unit under test in come optimal way. One difficulty in meeting the optimality requirement is that the stochastic properties of the unit are usually unknown a priori. For instance, one might not know exactly the yield of a VLSI production line before one tests the chips made as a result. Given the probability of unit failure and the coverage of a test, the optimal test period is easy to obtain. However, the probability of failure is not usually known a priori. We there- fore develop an optimal sequential testing strategy which estimates the production yield based on ongoing test results, and then use it to determine the optimal test period.
Realizing Fault-Tolerant Interconnection Networks Via Chaining
Authors: Nian-Feng Tzeng, Pen-Chung Yew, Chuan-Qi Zhu
Venue: IEEE Transactions on Computers (1988)

A scheme applicable to a wide class of multistage interconnection networks to enhance their fault-tolerant capability is proposed. Multiple paths between each input-output pair of a network are created by connecting switching elements within the same stage. This scheme provides a network with alternative paths at every stage, requires a simple self-routing algorithm, and allows a network to become more robust as its size increases. An analysis is performed to obtain a quantitative measurement of the reliability improvement of the scheme.
Special-purpose processors in theoretical physics
Authors: Robert B. Pearson, John L. Richardson, Doug Toussaint
Venue: Communications of the ACM (1985)

Specially designed processors can provide a method for attacking some of the difficult computational problems facing theoretical physicists.
PALMINI&mdash;fast Boolean minimizer for personal computers
Authors: L. B. Nguyen, M. A. Perkowdki, N. B. Goldstein
Venue: Proceedings of the 24th ACM/IEEE Design Automation Conference (1987)

This paper describes a fast and efficient method for minimization of two level single output Boolean functions. The minimization problem is reduced to that of coloring of the graph of incompatibility of implicants. The program permits also to remove static hazards and allows inversion of output's polarity which proves to be very convenient when designing with PAL's. It gives solutions within a very reasonable amount of time. On small industrial examples its speed is slightly better than Espresso and it occupies 6 times less memory.
Toward the domestication of microelectronics
Authors: Joel S. Birnbaum
Venue: Communications of the ACM (1985)

The great challenge for computer science in this decade is to make computers usable by everyone. Computers, long viewed as a dehumanizing force, will become the most powerful means of personal creative expression and communication ever known.
A failure analysis of the limitation of suffixing in an online environment
Authors: D. Harman
Venue: Proceedings of the 10th annual international ACM SIGIR conference on Research and development in information retrieval (1987)

The interaction of suffixing algorithms and ranking techniques in retrieval performance, particularly in an online environment, was investigated. Three general purpose suffixing algorithms were used for retrieval on the Cranfield 1400, Medlars, and CACM collections, and the results analysed with several standard evaluation measures. An examination of the retrieval performance using suffixing suggested two modifications to ranking techniques: variable weighting of word variants and selective stemming depending on query length. The experimental data is presented, and the limitations of suffixing in an online environment is discussed.
Two bit/pixel full color encoding
Authors: Graham Campbell, Thomas A. DeFanti, Jeff Frederiksen, Stephen A. Joyce, Lawrence A. Leske
Venue: ACM SIGGRAPH Computer Graphics (1986)

Realism in computer graphics typically requires using 24 or more bits/pixel to generate an image. This paper describes a method developed by the authors called "Color Cell Compression" or "CCC" that preserves at least a limited animation and local update capability yet yields extraordinary-looking color images in approximately two bits/pixel independent of image complexity. Three intermediate methods of compressing images to six, four and three bits/pixel respectively are also described. The CCC encoding process for a 640 times; 480 image averages 11 seconds on a VAX 11/750, however, the CCC method does permit real-time decoding of these images using software look-up tables and conventional display hardware. The three intermediate methods may also be decoded in real time but have the added advantage of requiring only 3-4 seconds for encoding on a VAX 11/750.
Approximate Analysis of Fork/Join Synchronization in Parallel Queues
Authors: R. Nelson, A. N. Tantawi
Venue: IEEE Transactions on Computers (1988)

An approximation technique, called scaling approximation, is introduced and applied to the analysis of homogeneous fork/join queuing systems consisting of Kor=32.
Electing a leader in a synchronous ring
Authors: Greg N. Frederickson, Nancy A. Lynch
Venue: Journal of the ACM (JACM) (1987)

The problem of electing a leader in a synchronous ring of n processors is considered. Both positive and negative results are obtained. On the one hand, if processor IDS are chosen from some countable set, then there is an algorithm that uses only O(n) messages in the worst case. On the other hand, any algorithm that is restricted to use only comparisons of IDs requires &OHgr;(n log n) messages in the worst case. Alternatively, if the number of rounds is required to be bounded by some t in the worst case, and IDs are chosen from any set having at least &fnof;(n, t) elements, for a certain very fast-growing function &fnof;, then any algorithm requires &OHgr;(n log n) messages in the worst case.
The application accelerator illustration system
Authors: Michael S. Miller, Howard Cunningham, Chan Lee, Steven R. Vegdahl
Venue: ACM SIGPLAN Notices (1986)

The Application Accelerator Illustration System is a prototype of an integrated CAD environment that supports the development of application-specific integrated circuits. The current implementation features a hardware description language compiler, timing analyzer, functional simulator, waveform tracer, and data path place and route facility. The system is implemented in Smalltalk-80&trade;.
System Testing Aided by Structured Analysis: A Practical Experience
Authors: Thomas J. McCabe, G. G. Schulmeyer
Venue: IEEE Transactions on Software Engineering (1985)

This paper deals with the use of Structured Analysis just prior to system acceptance testing. Specifically, the drawing of data flow diagrams (DFD) was done after integration testing. The DFD's provided a picture of the logical flow through the integrated system for thorough system acceptance testing. System test sets, were derived from the flows in the DFD's. System test repeatability was enhanced by the matrix which flowed from the test sets.
Optimal Graph Algorithms on a Fixed-Size Linear Array
Authors: K. A. Doshi, P. J. Varman
Venue: IEEE Transactions on Computers (1987)

Parallel algorithms for computing the minimum spanning tree of a weighted undirected graph, and the bridges and articulation points of an undirected graphs on a fixed-size linear array of processors are presented. For a graph of n vertices, the algorithms operate on a linear array of p processors and require O(n2/p) time for all p, 1 = p = n. In particular, using n processors the algorithms require O(n) time which is optimal on this model. The paper describes two approaches to limit the communication requirements for solving the problems. The first is a divide-and-conquer strategy applied to Sollin's algorithm for finding the minimum spanning tree of a graph. The second uses a novel data-reduction technique that constructs an auxiliary graph with no more than 2n - 2 edges, whose bridges and articulation points are the bridges and articulation points of the original graph.
GL&mdash;a denotational testbed with continuations and partial continuations as first-class objects
Authors: G. F. Johnson
Venue: Papers of the Symposium on Interpreters and interpretive techniques (1987)

In this paper we describe GL, a language designed to support interactive experimentation with denotational semantics of programming languages, and the novel features of its interpreter. GL is an expressional language that might best be described as an implementation of lambda calculus augmented with several useful basic data types including 1-values.A unique aspect of the GL environment is that it presents a visible, user-accessible implementation of the continuation semantics of GL. The user is expected to understand a denotational definition of GL, and to interact with the system in terms of that definition. In particular, if a computation is temporarily halted the expression continuation extant at that point can be interactively captured and later applied to other values and stores. The implementation of this feature is via a pair of routines called setjmpup and longjmpup that provide what might be called a partial continuation facility. A partial continuation is a function over stores or store/value pairs that represents execution of a partially executed program from its current state to some later state possibly before its half state. The semantics of partial continuations is interesting, and an extension of GL is presented that contains continuations and partial continuations as first-class objects.The GL environment is fairly complete; it has an experimental polymorphic type inference mechanism that supports self-application and report likely sources of user error in a robust manner, and it has a flexible breakpoint and trace facility that permits program execution to be observed and controlled at a variety of levels of granularity. Moreover, it has been used successfully to teach a graduate course in Theory of Programming Languages.
Parallel computers for graphics applications
Authors: Adam Levinthal, Pat Hanrahan, Mike Paquette, Jim Lawson
Venue: ACM SIGARCH Computer Architecture News (1987)

Specialized computer architectures can provide better price/performance for executing image processing and graphics applications than general purpose designs. Two processors are presented that use parallel SIMD data paths to support common graphics data structures as primitive operands in arithmetic expressions. A variant of the C language has been implemented to allow high level language coding of user applications on these processors. High level programming support is designed into the processor architecture that implements parallel object data typing and parallel conditional evaluation in hardware.
On Image Analysis by the Methods of Moments
Authors: Cho-Huak Teh, Roland T. Chin
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1988)

Various types of moments have been used to recognize image patterns in a number of applications. A number of moments are evaluated and some fundamental questions are addressed, such as image-representation ability, noise sensitivity, and information redundancy. Moments considered include regular moments, Legendre moments, Zernike moments, pseudo-Zernike moments, rotational moments, and complex moments. Properties of these moments are examined in detail and the interrelationships among them are discussed. Both theoretical and experimental results are presented.
Fast Constant Division Routines
Authors: Shuo-Yen R. Li
Venue: IEEE Transactions on Computers (1985)

When there is no division circuit available, the arithmetical function of division is normally performed by a library subroutine. The library subroutine normally allows both the divisor and the dividend to be variables, and requires the execution of hundreds of assembly instructions. This correspondence provides a fast algorithm for performing the integer division of a variable by a predetermined divisor. Based upon this algorithm, an efficient division routine has been constructed for each odd divisor up to 55. These routines may be implemented in assembly languages, in microcodes, and in special-purpose circuits.