ppxscal/embedding_network huggingface dataset:
Distributed, Synchronized Implementation of an Algorithm for the Maximum Flow Problem
Authors: Jesper Larsson Traff
Venue: Proceedings of the 1994 International Conference on Parallel Processing - Volume 03 (1994)

We present an implementation of the maximum flow algorithm of Shiloach and Vishkin (1982) on a distributed system without shared memory. This algorithm is a clever variation of Karzanov's algorithm, has a clear parallel orientation, and possesses features which make it an interesting candidate for distributed implementation also. The paper briefly describes the algorithm and discusses implementation issues which are relevant regardless of the specifics of the distributed system at hand: distribution of data structures (graph, queue, stacks) and reduction of communication volume. Experiments with the distributed algorithm on a 16 processor transputer system indicate that speed-up is indeed possible in practice: absolute speed-up of 2 to 3 on 8 processors have been consistently achieved on random graphs. But first and foremost the experiments pinpoint problems inherent in a synchronized implementation. Possible improvements are discussed.
Macro Programming through Bayesian Networks: Distributed Inference and Anomaly Detection
Authors: Marco Mamei, Radhika Nagpal
Venue: Proceedings of the Fifth IEEE International Conference on Pervasive Computing and Communications (2007)

Macro programming a distributed system, such as a sensor network, is the ability to specify application tasks at a global level while relying on compiler-like software to translate the global tasks into the individual component activities. Bayesian networks can be regarded as a powerful tool for macro programming a distributed system in a variety of data analysis applications. In this paper we present our architecture to program a sensor network by means of Bayesian networks. We also present some applications developed on a microphone-sensor network, that demonstrate calibration, classification and anomaly detection.
Performing Advanced Bit Manipulations Efficiently in General-Purpose Processors
Authors: Yedidya Hilewitz, Ruby B. Lee
Venue: Proceedings of the 18th IEEE Symposium on Computer Arithmetic (2007)

This paper describes a new basis for the implementation of a shifter functional unit. We present a design based on the inverse butterfly and butterfly datapath circuits that performs the standard shift and rotate operations, as well as more advanced extract, deposit and mix operations found in some processors. Additionally, it also supports important new classes of even more advanced bit manipulation instructions recently proposed: these include arbitrary bit permutations, bit scatter and bit gather instructions. The new functional unit's datapath is comparable in latency to that of the classic barrel shifter. It replaces two existing functional units - shifter and mix - with a much more powerful one.
Conformance Validation between Choreography and Orchestration
Authors: Jing Li, Huibiao Zhu, Geguang Pu
Venue: Proceedings of the First Joint IEEE/IFIP Symposium on Theoretical Aspects of Software Engineering (2007)

Referring to the design and implementation of large service oriented systems, two different approaches, choreography and orchestration, need to be concerned and studied. Choreography is a specification protocol defining a global picture of the way services interact with each other. Whereas orchestration is a local view focusing on the behavior of a single service. A critical issue, the so called conformance problem, is to validate whether a specific orchestration can play as a participant whose observable behavior is required by a given choreography. In this paper, we introduce two languages for describing choreography and orchestration respectively. Based on the two languages, we give a definition of endpoint projection which is used for automatic generation of orchestrations. Therefore, conformance validation is reduced to verification of process refinement between two orchestrations. Further, we mention that not all choreography models can be locally implementable. In other words, some global models cannot be translated into sets of orchestrations satisfying the global behavioral rules. To ensure that a choreography model is locally implementable, some conditions are required to be satisfied. As a consequence of our work, the skeleton codes for service implementations can be automatically generated, on the other hand, the interoperability between collaborating services is guaranteed.
MT evaluation: human-like vs. human acceptable
Authors: Enrique Amigó, Jesús Giménez, Julio Gonzalo, Lluís Màrquez
Venue: Proceedings of the COLING/ACL on Main conference poster sessions (2006)

We present a comparative study on Machine Translation Evaluation according to two different criteria: Human Likeness and Human Acceptability. We provide empirical evidence that there is a relationship between these two kinds of evaluation: Human Likeness implies Human Acceptability but the reverse is not true. From the point of view of automatic evaluation this implies that metrics based on Human Likeness are more reliable for system tuning. Our results also show that current evaluation metrics are not always able to distinguish between automatic and human translations. In order to improve the descriptive power of current metrics we propose the use of additional syntax-based metrics, and metric combinations inside the QARLA Framework.
Large Scale Distributed Disaster Information System based on MANET and Overlay Network
Authors: Yoshitaka Shibata, Hiroaki Yuze, Tsuyoshi Hoshikawa, Kazuo Takahata, Nobuhiro Sawano
Venue: Proceedings of the 27th International Conference on Distributed Computing Systems Workshops (2007)

In the case of large scale disaster, such as earthquake, volcanic explosion, sea wave, more robust and flexible nation-wide disaster information network is required not only for governmental supporters but also residents and volunteers than business oriented network to communicate each other even though some parts of the network and information system are destroyed and disconnected. In this paper, we introduce a larger scale distributed disaster information network system based on Movile Adhoc network (MANET) and overlay network. MANET is used for the access network for residents and volunteers around the disaster area and evacuation places. The evacuated residents and volunteers can flexibly communicate with others though MANET using IP based terminals, wireless IP telephones and Mobile PCs. On the other hand, overlay network is applied for national wide government and local government network to provide robust and redundant large scale disaster information network. By combining with both MANET access network and overlay network, more robust and flexible, and large scale disaster information network system can be realized provide even some of network lines and nodes are damaged and destroyed when the disaster happened.
Improving software quality with static analysis
Authors: Jeffrey S. Foster, Michael W. Hicks, William Pugh
Venue: Proceedings of the 7th ACM SIGPLAN-SIGSOFT workshop on Program analysis for software tools and engineering (2007)

At the University of Maryland, we have been working to improve the reliability and security of software by developing new, effective static analysis tools. These tools scan software for bug patterns or show that the software is free from a particular class of defects. There are two themes common to our different projects: 1. Our ultimate focus is on utility: can a programmer actually improve the quality of his or her software using an analysis tool? The important first step toward answering this question is to engineer tools so that they can analyze existing, nontrivial programs, and to carefully report the results of such analyses experimentally. The desire to better understand a more human-centered notion of utility underlies much of our future work. 2. We release all of our tools open source. This allows other researchers to verify our results, and to reuse some or all of our implementations, which often required significant effort to engineer. We believe that releasing source code is important for accelerating the pace of research results software quality, and just as importantly allows feedback from the wider community. In this research group presentation, we summarize some recent work and sketch future directions.
Fast backward congestion notification mechanism for TCP congestion control
Authors: Fei Peng
Venue: Proceedings of the Performance, Computing, and Communications Conference, 2002. on 21st IEEE International (2002)

The novel mechanism proposed uses a simple implementation to inform the traffic source at a very early stage that the network is becoming overloaded or congested and ask the source to slow down its transmission rate. Since TCP uses acknowledgments (ACKs) to adjust the number of packets sent over the network, the basic idea of our scheme is to control (or delay) TCP ACKs in the access node where its forward connection through the network is congested. To shorten the control loop, the congested network node generates ICMP (Internet control message protocol) source quench to initiate ACK control at the access node at the onset of congestion. By theoretical analysis and simulations, the mechanism is proven to be very effective in improving TCP throughput and fairness performance and reducing buffer occupancy. In particular, formulae for buffer occupancy and average throughput are derived relative to the distance between the congested node and the source terminal. It is important to note that TCP behavior does not have to be amended in any way.
An integrated hardware-software approach to flexible transactional memory
Authors: Arrvindh Shriraman, Michael F. Spear, Hemayet Hossain, Virendra J. Marathe, Sandhya Dwarkadas, Michael L. Scott
Venue: ACM SIGARCH Computer Architecture News (2007)

There has been considerable recent interest in both hardware andsoftware transactional memory (TM). We present an intermediateapproach, in which hardware serves to accelerate a TM implementation controlled fundamentally by software. Specifically, we describe an alert on update mechanism (AOU) that allows a thread to receive fast, asynchronous notification when previously-identified lines are written by other threads, and a programmable data isolation mechanism (PDI) that allows a thread to hide its speculative writes from other threads, ignoring conflicts, until software decides to make them visible. These mechanisms reduce bookkeeping, validation, and copying overheads without constraining software policy on a host of design decisions. We have used AOU and PDI to implement a hardwareacceleratedsoftware transactional memory system we call RTM. We have also used AOU alone to create a simpler "RTM-Lite". Across a range of microbenchmarks, RTM outperforms RSTM, a publicly available software transactional memory system, by as much as 8.7x (geometric mean of 3.5x) in single-thread mode. At 16 threads, it outperforms RSTM by as much as 5x, with an average speedup of 2x. Performance degrades gracefully when transactions overflow hardware structures. RTM-Lite is slightly faster than RTM for transactions that modify only small objects; full RTM is significantly faster when objects are large. In a strongargument for policy flexibility, we find that the choice between eager (first-access) and lazy (commit-time) conflict detection can lead to significant performance differences in both directions, depending on application characteristics.
Adaptive spectrum exchange and modification using multirate filters
Authors: S. Wada
Venue: Proceedings of the Acoustics, Speech, and Signal Processing, 1996. on Conference Proceedings., 1996 IEEE International Conference - Volume 03 (1996)

This paper presents adaptive spectrum exchange and modification methods using multirate filters. An input signal may be decomposed into a number of subsignals, and their spectrum may be exchanged and modified on a specified time-frequency plane in real time processing. The multirate filters are constructed based on well-known QMF bank structures. In our structure, once QMF banks are designed, adaptive processing may be realized with a simpler procedure. In a design, by introducing bifrequency maps, we formulate the multirate filters design completely. Design examples and experimental simulations are shown. One example includes an adaptive spectrum scrambling filter which can be applied in vehicle telephones for more secure communication.
Opinion search in web logs
Authors: Deanna J. Osman, John L. Yearwood
Venue: Proceedings of the eighteenth conference on Australasian database - Volume 63 (2007)

Web logs (blogs) are a fast growing forum for people of all ages to express their feelings and opinions on topics of interest. The entries are often written in informal language without the structure found in newswire or published articles. One blog entry may contain many topics, these topics may express an opinion or a fact on a particular topic. This research is in contrast to work on opinion detection which has been carried out on more formally authored texts and on segments that are either whole documents or sentences. Whole web logs are divided into topics using a simple text segmentation approach. Similarity scores are used to distinguish where topic changes occur. The results are compared to human-evaluated topic changes and the most accurate algorithm is used in the remainder of the research. Words within each topic-block are allocated weightings depending on their opinion-bearing strength. Two approaches of using these weights, the sum and the maximum, are used to determine whether the topic-block is opinion-bearing or non-opinion-bearing. The opinion-bearing topic-blocks are rated by human evaluators as either opinion-bearing or non-opinion-bearing with precision of 67% for approach A and 70% for approach B. These results are compared with two approaches on published text to identify the difference between web logs and published articles.
A High Throughput Packet-Switching Network with Neural Network Controlled Bypass Queueing and Multiplexing
Authors: Young-Keun Park, Gyungho Lee
Venue: Proceedings of the 1994 International Conference on Parallel Processing - Volume 01 (1994)

This paper proposes a high throughput packet switching network with bypass queues based on a MIN. We improve the switch throughput by partitioning the input buffers into disjoint buffer sets and multiplexing several sets of nonblocking packets within a time slot. A neural network model is presented as a controller for packet scheduling and multiplexing in the switch.
Extending the participatory learning paradigm to include source credibility
Authors: Ronald R. Yager
Venue: Fuzzy Optimization and Decision Making (2007)

We provide an overview of the participatory learning paradigm (PLP) and discuss the importance of the acceptance function in determining which observations are used for learning. We introduce a formal model that uses this (PLP) We then extend this model in two directions. First, we consider situations in which we have incomplete observations, we only have observations about a subset of the variables of interest. Next we extend this model to allow for the inclusion in the learning process of information about the learning agents belief about the credibility of the source of the learning experience. Here we distinguish between the content of a learning experience and the source of the experience. We provide a means to allow the learning agents belief about the credibility of the source to determine the effect of the content. Furthermore we suggest a method to allow the modification of agents belief about the credibility of the source to also be part of the learning process.
A simple and efficient algorithm for cycle collection
Authors: Chin-Yang Lin, Ting-Wei Hou
Venue: ACM SIGPLAN Notices (2007)

The lack of collecting cyclic garbage is generally considered the major weakness of reference counting. Reference counted systems handle this problem by incorporating either a global tracing collector, or a "partial" tracing collector that considers only the cycle candidates but needs several traces on them. In particular, the latter has become a preferred one as it has better scalability and locality (no need to scan the entire heap). This paper presents a new "lightweight" cyclic reference counting algorithm, which is based on partial tracing and deals with the cycle problem in a simpler and more efficient way. By exploiting the lightweight hypothesis that considers a single sub-graph, instead of individual cycles, as the basic unit of cycle collection, the algorithm can detect garbage cycles in a single trace. In addition, we propose a technique for eliminating redundant scans over garbage objects, thus improving the efficiency of the algorithm. The pseudocode and its correctness proof are also presented. Finally, an implementation based on Jikes Research Virtual Machine is provided to demonstrate the effectiveness of the new algorithm.
GISE: A Data Access and Integration Service of Epidemiological Data for a Grid-Based Monitoring and Simulation System.
Authors: Eduardo Gallo, Henrique Fabricio Gagliardi, Fabricio Alves Barbosa da Silva, Virgilio Cavicchioli Neto, Domingos Alves
Venue: Proceedings of the 40th Annual Simulation Symposium (2007)

This work presents the architecture of a data access and integration service dedicated to epidemic monitoring and execution of epidemic simulations dubbed Grid Integration SErvice (GISE). GISE is a flexible service built on Globus 4 grid infrastructure. Its architecture uses mediators, wrappers and Canonic Data Models to perform queries on geographically distributed heterogeneous data sources in an integrated way, solving syntactic and semantic conflicts. This service is composed of a set of components arranged on several layers: Client, Metadata Service, Integration Services, Globus Toolkit Services, Data Source Access Services and Data Sources. In the case study presented in this work, GISE was tested in an epidemic monitoring and surveillance system dubbed Integra-EPI.
Dynamic Scheduling of Skippable Periodic Tasks in Weakly-Hard Real-Time Systems
Authors: Maryline Chetto, Audrey Marchand
Venue: Proceedings of the 14th Annual IEEE International Conference and Workshops on the Engineering of Computer-Based Systems (2007)

This paper deals with dynamic scheduling in real-time systems that have Quality of Service requirements. We assume that tasks are periodic and may miss their deadlines, occasionally, as defined by the so-called Skip- Over model. In this paper, we present a dynamic scheduling algorithm, called RLP (Red as Late as possible), a variant of Earliest Deadline to make slack stealing and get better performance in terms of ratio of periodic task instances which complete before their deadline. Simulation results show that RLP outperforms the two conventional skip-over algorithms, namely RTO (Red Tasks Only) and BWP (Blue When Possible), introduced about ten years ago. Finally, we present the integration of these QoS scheduling services into CLEOPATRE1, a free open-source library which offers selectable real-time facilities on shelves.
Unified Inter-Communication Architecture for Systems-on-Chip
Authors: F. Rincon, J. Barba, F. Moya, F. J. Villanueva, D. Villa, J. Dondo, J. C. Lopez
Venue: Proceedings of the 18th IEEE/IFIP International Workshop on Rapid System Prototyping (2007)

System-On-Chip (SoC) architectures are called to be the platform for an ever increasing number of interactive applications. One of the most timeconsuming tasks is to define communication interfaces between the different components through a number of scattered heterogeneous processing nodes. That is not only a complex task, but also very specific to a certain implementation, which may limit the flexibility of the system, and makes the solutions difficult to reuse. In this paper, we describe how the distributed systems paradigm can be extended to provide a unified abstraction for both hardware and software components. Moreover, based on that abstraction, we define a low-overhead system-wide communication architecture that offers communication transparency between all kinds of components. Since the architecture is highly compatible with standard distributed object software systems, it also allows seamless interaction with any other kind of external network.
Interactive presentation: Capturing the interaction of the communication, memory and I/O subsystems in memory-centric industrial MPSoC platforms
Authors: Simone Medardoni, Martino Ruggiero, Davide Bertozzi, Luca Benini, Giovanni Strano, Carlo Pistritto
Venue: Proceedings of the conference on Design, automation and test in Europe (2007)

Industrial MPSoC platforms exhibit increasing communication needs while not yet reverting to revolutionary solutions such as networks-on-chip. On one hand, the limited scalability of shared busses is being overcome by means of multi-layer communication architectures, which are stressing the role of bridges as key contributors to system performance. On the other hand, technology limitations, data footprint and cost constraints lead to platform instantiations with only few on-chip memory devices and with a global performance bottleneck: the memory controller for access to the off-chip SDRAM memory. The complex interaction among system components and the dependency of macroscopic performance metrics on fine-grain architectural features stress the importance of highly accurate modelling and analysis tools. This paper takes its steps from an extensive modelling effort of a complete industrial MPSoC platform for consumer electronics, including the off-chip memory sub-system. Based on this, relevant design issues concerning the communication, memory and I/O architecture and their interaction are addressed, resulting in guidelines for designers of industry-relevant MPSoCs.
Structural models for large software systems
Authors: James W. Fawcett
Venue:  (2006)

Today, software is found in almost all systems, vehicles, communication devices, medical equipments, and entertainment, for example. The size and complexity of these systems has grown continuously over the last forty years---the time span for modern competing. The latest release of the Windows operating system, called Vista, is expected to he more than fifty million lines of code, about 4% bigger than the previous version. Some of the reasons for this are numerous feature demands and the neck to support multiple platforms, and need for compatibility with legacy software and hardware. Each line of code, in these large systems, requires perhaps several technical decisions, often, but not simple. The sheer volume of this decision making process is daunting. No single human can fully understand a system of high complexity. To help ameliorate this problem, systems are decomposed into subsystems, libraries, modules, and classes. Most of these components have interdependencies, in order to provide services, one to another. However, in systems of great size, the dependencies often become a dense web of relationships. It is exactly this problem on which we focus in this research. We propose that static dependency structure is an important element to understand the state of large software system. We conduct various analyses using well-known existing open source, commercial and expert developed projects, including our own projects to evaluate the overall effectiveness of our approaches. We detect structural problems in large software development projects, and present a structure metric to rank software tiles according to their risk contribution to the software system. Additionally, we present a model that indexes software components according to their potential for reuse. We design and conduct experiment to investigate the impact of change in one file on other files. Furthermore, we provide tools needed to support analysis, project visualization and monitoring. Finally, the investigate corrective procedures and simulate their application, monitoring improvements in observed defects.