ppxscal/embedding_network huggingface dataset:
Lee Distance and Topological Properties of k-ary n-cubes
Authors: Bob Broeg, Bella Bose, Younggeun Kwon, Yaagoub Ashir
Venue: IEEE Transactions on Computers (1995)

In this paper, we consider various topological properties of a k-ary n-cube $(Q^k_n)$ using Lee distance. We feel that Lee distance is a natural metric for defining and studying a $Q^k_n$.After defining a $Q^k_n$ graph using Lee distance, we show how to find all disjoint paths between any two nodes. Given a sequence of radix k numbers, a function mapping the sequence to a Gray code sequence is presented, and this function is used to generate a Hamiltonian cycle.Embedding the graph of a mesh and the graph of a binary hypercube into the graph of a $Q^k_n$ is considered. Using a k-ary Gray code, we show the embedding of a $k^{n_1}\times k^{n_2}\times \,\,\ldots \,\,\times k^{n_m}-$ dimensional mesh into a $Q^k_n$ where $n\,\,=\,\,\sum\nolimits_{i=1}^m {n_i}$. Then using a single digit, 4-ary reflective Gray code, we demonstrate embedding a Qn into a $Q^4_{\lceil {n\over 2}\rceil}$.We look at how Lee distance may be applied to the problem of resource placement in a $Q^k_n$ by using a Lee distance error-correcting code. Although the results in this paper are only preliminary, Lee distance error-correcting codes have not been applied previously to this problem.Finally, we consider how Lee distance can be applied to message routing and single-node broadcasting in a $Q^k_n$. In this section we present two single-node broadcasting algorithms that are optimal when single-port and multi-port I/O is used.
Clinical Process Analysis and Activity-Based Costing at a Heart Center
Authors: Lisa Ridderstolpe, Andreas Johansson, Tommy Skau, Hans Rutberg, Hans Åhlfeldt
Venue: Journal of Medical Systems (2002)

Cost studies, productivity, efficiency, and quality of care measures, the links between resources and patient outcomes, are fundamental issues for hospital management today. This paper describes the implementation of a model for process analysis and activity-based costing (ABC)/management at a Heart Center in Sweden as a tool for administrative cost information, strategic decision-making, quality improvement, and cost reduction. A commercial software package (QPR&reg;) containing two interrelated parts, &ldquo;ProcessGuide and CostControl,&rdquo; was used. All processes at the Heart Center were mapped and graphically outlined. Processes and activities such as health care procedures, research, and education were identified together with their causal relationship to costs and products/services. The construction of the ABC model in CostControl was time-consuming. However, after the ABC/management system was created, it opened the way for new possibilities including process and activity analysis, simulation, and price calculations. Cost analysis showed large variations in the cost obtained for individual patients undergoing coronary artery bypass grafting (CABG) surgery. We conclude that a process-based costing system is applicable and has the potential to be useful in hospital management.
Component Management in a Dynamic Architecture
Authors: Marie-Claude Pellegrini, Michel Riveill
Venue: The Journal of Supercomputing (2003)

Modern distributed programming environments commonly restrict programmers to a single form of inter-component configuration of an application. However, these distributed applications are prone to evolve drastically during their lifetime, to take into account the new users requirements, the technological evolution, or to improve the performance of the application. Evolution involves changes related to the application architecture, the software implementation, or the physical location of software components in a distributed environment during the application execution. In this paper, we describe an original approach for the dynamic application management which fulfills the above requirements with minimal perturbation. In order to prove the advantage of our approach, we have implemented a prototype of this service by extending a CORBA environment.
Input Multiplexing in Artificial Neurons Employing Stochastic Arithmetic
Authors: Howard C. Card
Venue: Neural Processing Letters (2002)

Artificial neural networks employing stochastic arithmetic can under certain conditions outperform those based upon conventional radix arithmetic in reduced power dissipation, silicon area and improved fault tolerance. This paper describes limitations due to the inherent variance in the stochastic signals. We introduce and compare two stochastic multiplexing schemes, inter-count and intra-count multiplexing, for accumulating the total inputs to the artificial neurons.
Bijection for ternary trees and non-crossing trees
Authors: Alios Panholzer, Helmut Prodinger
Venue: Discrete Mathematics (2002)

The number Nn of non-crossing trees of size n satisfies Nn+1 = Tn, where Tn enumerates ternary trees of size n. We constuct a new bijection to establish that fact. Since Tn = (1/(2n + 1))(3nn), it follows that 3(3n - 1)(3n - 2)Tn-1 =2n(2n + 1)Tn. We construct two bijections "explaining" this recursion; one of them easily extends to the case of t-ary trees.
A Recurrent Cooperative/Competitive Field for Segmentation of Magnetic Resonance Brain Images
Authors: A. J. Worth, S. Lehar, D. N. Kennedy
Venue: IEEE Transactions on Knowledge and Data Engineering (1992)

The gray-white decision network is introduced as an application of a recurrent cooperative/competitive network for segmentation of magnetic resonance (MR) brain images. The three-layer dynamical system relaxes into a solution where each pixel is labeled as either gray matter, white matter, or other matter by considering raw input intensity, edge information, and neighbor interactions. This network is presented as an example of applying a neurally inspired recurrent cooperative/competitive field (RCCF) to a problem with multiple conflicting constraints. Applications of the network and its phase plane analysis are presented.
Small vertex-transitive directed strongly regular graphs
Authors: Frank Fiedler, Mikhail H. Klin, Mikhail Muzychuk
Venue: Discrete Mathematics (2002)

We consider directed strongly regular graphs defined in 1988 by Duval. All such graphs with n vertices, n ≤ 20, having a vertex-transitive automorphism group, are determined with the aid of a computer. As a consequence, we prove the existence of directed strongly regular graphs for three feasible parameter sets listed by Duval. For one parameter set a computer-free proof of the nonexistence is presented. This, together with a recent result by Jørgensen, gives a complete answer on Duval's question about the existence of directed strongly regular graphs with n ≤ 20. The paper includes catalogues of all generated graphs and certain theoretical generalizations based on some known and new graphs.
High Speed 4-Symbol Arithmetic Encoder Architecture for Embedded Zero Tree-Based Compression
Authors: Roberto R. Osorio, Bart Vanhoof
Venue: Journal of VLSI Signal Processing Systems (2003)

In state-of-the-art multimedia compression standards, arithmetic coding is widely used as a powerful entropy compression method. In the MPEG-4 standard a specific 4-symbol, multiple-context arithmetic coder is used for wavelet based image compression. In this paper we present a first-of-a-kind architecture capable of processing close to 1 symbol per cycle, managing multiple context in a simple, yet cost-efficient manner. We explain the need for such an architecture, develop the algorithm and propose an efficient implementation. The characteristics of the architecture are detailed and a comparison with other alternatives is presented. This architecture has been synthesized achieving a maximum speed of 170 MHz, equivalent to 340 Mbits/s.
New Order Preserving Access Methods for Very Large Files Derived from Linear Hashing
Authors: N. I. Hachem, P. B. Berra
Venue: IEEE Transactions on Knowledge and Data Engineering (1992)

A class of order-preserving dynamic hashing structures is introduced and analyzed. The access method is referred to as the dynamic random-sequential access method (DRSAM) and is derived from linear hashing. A new logical to physical mapping that is based on sequential bucket allocations in hash order is proposed. With respect to previous methods, this allocation technique has the following characteristics: (1) the structure captures the hashed order in consecutive storage areas so that order preserving (OPH) schemes should result in performance improvements for range queries and sequential processing; and (2) it adapts elastic buckets for the control of file growth. Under specific conditions, this approach outperforms the partial expansion method previously proposed by P.-A. Larson (1982).
A Case for NOW (Networks of Workstations)
Authors: Thomas E. Anderson, David E. Culler, David A. Patterson, and the NOW team
Venue: IEEE Micro (1995)

In this paper, we argue that because of recent technology advances, networks of workstations (NOWs) are poised to become the primary computing infrastructure for science and engineering, from low end interactive computing to demanding sequential and parallel applications. We identify three opportunities for NOWs that will benefit end-users: dramatically improving virtual memory and file system performance by using the aggregate DRAM of a NOW as a giant cache for disk; achieving cheap, highly available, and scalable file storage by using redundant arrays of workstation disks, using the LAN as the I/O backplane; and finally, multiple CPUs for parallel computing. We describe the technical challenges in exploiting these opportunities namely, efficient communication hardware and software, global coordination of multiple workstation operating systems, and enterprise-scale network file systems. We are currently building a 100-node NOW prototype to demonstrate that practical solutions exist to these technical challenges.
Congestion reduction during placement based on integer programming
Authors: Xiaojian Yang, Ryan Kastner, Majid Sarrafzadeh
Venue: Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design (2001)

This paper presents a novel method to reduce routing congestion during placement stage. The proposed approach is used as a post-processing step in placement. Congestion reduction is based on local improvement on the existing layout. However, the approach has a global view of the congestion over the entire design. It uses integer linear programming (ILP) to formulate the conflicts between multiple congested regions, and performs local improvement according to the solution of ILP. Experiments show that the proposed approach can effectively reduce the total overflow of global routing result. The short running time of the algorithm indicates good scalability on large designs.
Lessons Learned from Building a Terabyte Digital Video Library
Authors: Howard D. Wactlar, Michael G. Christel, Yihong Gong, Alexander G. Hauptmann
Venue: Computer (1999)

The Informedia Project at Carnegie Mellon University has created a terabyte digital video library in which automatically derived descriptors for the video are used for indexing, segmenting, and accessing the library contents. Begun in 1994, the project presented numerous challenges for library creation and deployment, valuable information covered in this article. The authors, developers of the project at Carnegie Mellon University, addressed these challenges by automatically extracting information from digitized video, creating interfaces that allowed users to search for and retrieve videos based on extracted information, and validating the system through user testbeds. Through speech, image, and natural language processing, the Informedia Project has demonstrated that previously inaccessible data can be derived automatically and used to describe and index video segments.
Scalable Parallel Data Mining for Association Rules
Authors: Eui-Hong (Sam) Han, George Karypis, Vipin Kumar
Venue: IEEE Transactions on Knowledge and Data Engineering (2000)

In this paper, we propose two new parallel formulations of the Apriori algorithm that is used for computing association rules. These new formulations, IDD and HD, address the shortcomings of two previously proposed parallel formulations CD and DD. Unlike the CD algorithm, the IDD algorithm partitions the candidate set intelligently among processors to efficiently parallelize the step of building the hash tree. The IDD algorithm also eliminates the redundant work inherent in DD, and requires substantially smaller communication overhead than DD. But IDD suffers from the added cost due to communication of transactions among processors. HD is a hybrid algorithm that combines the advantages of CD and DD. Experimental results on a 128-processor Cray T3E show that HD scales just as well as the CD algorithm with respect to the number of transactions, and scales as well as IDD with respect to increasing candidate set size.
Self-Checking Design in Eastern Europe
Authors: Stanislaw J. Piestrak
Venue: IEEE Design Test (1996)

This article surveys research activities in on-line hardware-checking techniques developed in Eastern Europe including the former Soviet Union. It presents some interesting results on self-checking circuit design, many of which are unknown to Western researchers as they appeared in not-so-widely known journals and conference proceedings. Much of the work is new and is judged to be a significant contribution to the field. Among the traditional designs intended for synchronous circuits are some state-of-the-art self-testing checkers, new error detecting unordered codes that are an extension of Berger codes, self-checking combinational circuits using parity, and several designs of totally self-checking synchronous sequential circuits. Included also are the first-ever design concepts of totally self-checking asynchronous circuits.
Positional Strategy of Forming the Investment Portfolio
Authors: A. I. Kibzun, E. A. Kuznetsov
Venue: Automation and Remote Control (2003)

The problem of optimal control of a multiplicative system modeling capital investments in securities of two kinds was considered. The stock market paradox was discussed. The logarithmic and quantile strategies belonging to the class of program strategies and aimed at overcoming this paradox were compared. A distinction of the logarithmic strategy was analyzed. A new positional strategy based on the confidence method was proposed.
AnyBoard: An FPGA-Based, Reconfigurable System
Authors: David E. Van den Bout, Joseph N. Morris, Douglas Thomae, Scott Labrozzi, Scot Wingo, Peter Hallman
Venue: IEEE Design Test (1992)

AnyBoard, a low-cost, field programmable gate array (FPGA)-based, reconfigurable rapid-prototyping system is described. The system hardware organization and software tools that help users automatically map designs to the FPGAs and manage the design process are discussed. The implementation of a pattern generator design is presented to illustrate the system's effectiveness.
Defect-Causal Analysis Drives Down Error Rates
Venue: IEEE Software (1993)

Defect-causal analysis (DCA), a low-cost technique for driving down error rates in software, is discussed. The learning method used in DCA is described, and its benefits are discussed. The effect of DCA on maturity (as in the Capability Maturity model) is considered. Possible pitfalls in using DCA are pointed out.
A Systolic Redundant Residue Arithmetic Error Correction Circuit
Authors: E. D. Di Claudio, G. Orlandi, F. Piazza
Venue: IEEE Transactions on Computers (1993)

In highly integrated processors, a concurrent fault tolerance capability is particularly important, especially for real-time applications. In fact, in these systems, transient errors are often present, but are difficult to correct online. Error recovery procedures applied for each processing or memory element require large amount of hardware and can reduce throughput. Residue arithmetic has intrinsic fault tolerance capability and requires less complex hardware. A single error correction procedure based on the use of a redundant residue number system (RRNS) and the base extension operation is proposed. The method uses a very small decision table and works in parallel mode; therefore it is suitable for high speed VLSI circuit realization. A parallel systolic architecture which realizes the algorithm is introduced.
A Note on the Number of Solutions of the Noncoplanar P4P Problem
Authors: Z. Y. Hu, F. C. Wu
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (2002)

In the literature, the PnP problem is indistinguishably defined as either to determine the distances of the control points from the camera's optical center or to determine the transformation matrices from the object-centered frame to the camera-centered frame. In this paper, we show that these two definitions are generally not equivalent. In particular, we prove that, if the four control points are not coplanar, the upper bound of the P4P problem under the distance-based definition is 5 and also attainable, whereas the upper bound of the P4P problem under the transformation-based definition is only 4. Finally, we study the conditions under which at least two, three, four, and five different positive solutions exist in the distance based noncoplanar P4P problem.
Finding Interesting Associations without Support Pruning
Authors: Edith Cohen, Mayur Datar, Shinji Fujiwara, Aristides Gionis, Piotr Indyk, Rajeev Motwani, Jeffrey D. Ullman, Cheng Yang
Venue: IEEE Transactions on Knowledge and Data Engineering (2001)

Association-rule mining has heretofore relied on the condition of high support to do its work efficiently. In particular, the well-known a priori algorithm is only effective when the only rules of interest are relationships that occur very frequently. However, there are a number of applications, such as data mining, identification of similar web documents, clustering, and collaborative filtering, where the rules of interest have comparatively few instances in the data. In these cases, we must look for highly correlated items, or possibly even causal relationships between infrequent items. We develop a family of algorithms for solving this problem, employing a combination of random sampling and hashing techniques. We provide analysis of the algorithms developed and conduct experiments on real and synthetic data to obtain a comparative performance analysis.
Demodulation with a Multichannel Estimation Method Using a Reduced Rank Constraint
Authors: H. Kassem, P. Forster
Venue: Analog Integrated Circuits and Signal Processing (2003)

This paper deals with the Maximum Likelihood Estimation of the multichannel impulse response in a mobile communication system whose base stations are equipped with antennas arrays. The following problem is solved: using the training sequence, find the maximum likelihood multichannel impulse response from one mobile to the base station under a reduced rank constraint in the presence of gaussian noise and jammers with unknown covariance matrix. This method finds applications in demodulation (the reduced rank channel estimate can be used in a Viterbi Algorithm), and experimental results using real signals demonstrate its high performance compared with the standard Minimum Mean Square Error (MMSE) multichannel estimate.
Text Retrieval Using Self-Organized Document Maps
Authors: Krista Lagus
Venue: Neural Processing Letters (2002)

A map of text documents arranged using the Self-Organizing Map (SOM) algorithm (1) is organized in a meaningful manner so that items with similar content appear at nearby locations of the 2-dimensional map display, and (2) clusters the data, resulting in an approximate model of the data distribution in the high-dimensional document space. This article describes how a document map that is automatically organized for browsing and visualization can be successfully utilized also in speeding up document retrieval. Furthermore, experiments on the well-known CISI collection &lsqb;3&rsqb; show significantly improved performance compared to Salton's vector space model, measured by average precision (AP) when retrieving a small, fixed number of best documents. Regarding comparison with Latent Semantic Indexing the results are inconclusive.
Accurate and real-time image processing on a new PC-compatible board
Authors: Mahmoud Meribout, Mamoru Nakanishi, Takeshi Ogura
Venue: Real-Time Imaging (2002)

The aim of this paper is to present a parallel hardware architecture well dedicated for complex two-dimensional (2D) and three-dimensional (3D) video processing. It is composed of a mixture of Digital Signal Processing (DSP) and Field Programmable Gate Array (FPGA) technologies and uses the Content Addressable Memory (CAM) as a main processing unit. Some applications ranging from accurate 2D segment extraction to 3D segment reconstruction have been successfully implemented. Their common characteristic is to use the Hough Transform (HT) as the basic concept, augmented with some modifications in order to make them well adapted to the hardware, and in addition to resolve some of their classical problems. This may include quantization errors, huge memory-processing requirements of the parameter space, and occlusion. Experimental results indicate that a small amount of hardware, mounted on a PC board, can deliver real-time performance and high accuracy. This is an improvement over previous systems, where execution time of the second-order using a greater amount of hardware has been proposed.
SCALPS: Smart Card for Limited Payment Systems
Authors: Jean-François Dhem, Daniel Veithen, Jean-Jacques Quisquater
Venue: IEEE Micro (1996)

Today, many smart card processors are able to perform a 512-bit RSA signature in less than 100 ms. This power is not always necessary. We may reduce the costs (die size) by conceiving a standalone working crypto-processor well suited for some kinds of applications. We chose, as example of feasibility, to implement the GQ scheme to authenticate the card and to guarantee the integrity of the amount to pay in a prepaid token application. A chip complying with the smart card specifications and able to perform the whole protocol, in less than one second, was build.
Statistical Bias of Conic Fitting and Renormalization
Authors: K. Kanatani
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1994)

Introducing a statistical model of noise in terms of the covariance matrix of the N-vector, we point out that the least-squares conic fitting is statistically biased. We present a new fitting scheme called renormalization for computing an unbiased estimate by automatically adjusting to noise. Relationships to existing methods are discussed, and our method is tested using real and synthetic data.