ppxscal/embedding_network huggingface dataset:
Managers who personally use information technology frequently: a profile of some invisible computer personnel
Authors: T. W. Ferratt, E. J. Dunne, S. Young
Venue: Proceedings of the ACM SIGCPR conference on Management of information systems personnel (1988)

This paper develops a profile of managers who use information technology frequently in accomplishing their managerial tasks. While controversy exists regarding whether managers should or should not use personal computers (PCs) in their work environment, this study describes 49 managers who directly use PCs at work. These managers come from nine quite different Midwest business organizations. Included in the profile are the following items: personal and professional demographics, the value of their computer support in various managerial roles, software tools they have used, hardware features they have found useful, and organizational support for their use of IS technology in their jobs.
Efficient evaluation of circular attribute grammars
Authors: Larry G. Jones
Venue: ACM Transactions on Programming Languages and Systems (TOPLAS) (1990)

We present efficient algorithms for exhaustive and incremental evaluation of circular attributes under any conditions that guarantee finite convergence. The algorithms are derived from those for noncircular attribute grammars by partitioning the underlying attribute dependency graph into its strongly connected components and by ordering the evaluations to follow a topological sort of the resulting directed acyclic graph. The algorithms are efficient in the sense that their worst-case running time is proportional to the cost of computing the fixed points of only those strongly connected components containing affected attributes or attributes directly dependent on affected attributes. When the attribute grammar is noncircular or the specific dependency graph under consideration is acyclic, both algorithms reduce to the standard optimal algorithms for noncircular attribute evaluation.
Inside risks: insecurity about security?
Authors: Peter G. Neumann
Venue: Communications of the ACM (1990)

Background A few highly visible cases of computer system exploitations have raised general awareness of existing vulnerabilities and the considerable risks they entail.
The iPSC/2 direct-connect communications technology
Authors: S. F. Nugent
Venue: Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1 (1988)

This paper describes the hardware architecture and protocol of the message routing system used in the iPSC&reg;/2 concurrent computer. The Direct-Connect router was developed by Intel Scientific Computers to replace the store-and-forward message passing mechanism used in the original iPSC system. The router enhances the performance of the iPSC/2 system by reducing the message passing latency, increasing the node-to-node channel bandwidth and allowing simultaneous bi-directional message traffic between any two nodes. The new communication system has nearly equal performance between any pair of processing nodes, making the network topology more transparent to the user. The Direct-Connect router is a specialized self-contained hardware module attached to each hypercube node. The router is implemented in CMOS programmable gate-arrays with advanced CMOS buffering. Routers are connected by full-duplex bit-serial channels to form a Boolean n-cube network. The router also provides a high performance interface between the node memory bus and the network.
An improved protocol test generation procedure based on UIOS
Authors: W. Y. L. Chan, C. T. Vuong, M. R. Otp
Venue: ACM SIGCOMM Computer Communication Review (1989)

This paper shows the Unique Input/Output, UIO, approach and the Distinguishing Sequence, DS, approach for the conformance testing of protocol implementations do not always produce identical fault converges, contrary to a previous claim. In the UIO approach, when UIO sequences and signatures are not unique in an implementation, they may not be able to detect erroneous states in the implementation. The UIO approach is revised here with the addition of a verification procedure to ensure that the UIO sequences are all unique in an implementation. Since signatures are generally not unique, this revision requires substituting the use of a signature for a state, S, with a set of input/output sequences, IO(S,K)s, unique to S, each of which distinguishes S from at least one other state, K. Verification is then applied to the IO(S,K)s. Fault coverage in the revised UIO, UIOv, approach is better than that in the original approach. A uniqueness criterion is discussed here to capture a desirable fault coverage for finite-state machine, FSM, test sequences. This criterion ensures the detection of any faulty FSM implementation provided that its set of states does not exceed that in the specified FSM. It is shown that test sequences generated by the UIOv approach and the DS approach always satisfy the uniqueness criterion. In fact, the DS approach is a special case of the UIOv approach; however, the UIOv approach has wider applicability and is generally applicable to k-distinguishable FSMs.
Japan's view of EC '92
Authors: Eiichi Ono
Venue: Communications of the ACM (1990)

Delivered at the Armed Forces Communication and Electronics Association's EC '92 Symposium in December 1989, this speech focuses on the European semiconductor industry-where Japan ranks as the second largest exporter-and technology transfer of dual-use products from Japan.
An amazing exercise in recursion for CS1 and CS2
Authors: Ivan B. Liss, Thomas C. McMillan
Venue: ACM SIGCSE Bulletin (1988)

This paper describes an exercise which has been used in both CS1 and CS2 courses for the purpose of introducing the concepts of recursion and stacks, and for illustrating the benefits of procedural abstraction. The problem is to write a program which finds a path through a rectangular maze. The exercise is used in CS1 as part of an introduction to recursion. In CS2, it is used to illustrate and employ the abstract data type &ldquo;stack.&rdquo; In both exercises, the ideas are presented so as to reinforce the concepts of top-down design, and procedural and data abstraction.
Meager and replete failures of relative completeness
Authors: Daniel Leivant, Tim Fernando
Venue: Journal of the ACM (JACM) (1988)

The nature of programming languages that fail to have a relatively complete proof formalism is discussed. First, it is shown that such failures may be due to the meagerness of the programming language, rather than to the presence of complex control structures as in the cases studied so far. The failure of relative completeness is then derived for two languages with a rich control structure, using simple simulations of general recursive functions by procedure call mechanisms.
Object database support for a software project management environment
Authors: Lung-Chun Liu, Ellis Horowitz
Venue: Proceedings of the third ACM SIGSOFT/SIGPLAN software engineering symposium on Practical software development environments (1989)

The recent development of object-oriented database models, which combine the power of object programming and the efficient management of data, provides a feasible solution for the construction of a computer-aided software engineering environment or CASE. However, an object oriented database provides only a kernel set of capabilities. This paper identifies the data management requirements related to software project management and shows how they are represented in the model called Design-Net. Then it is shown how the concepts of the work breakdown structure, project history, event monitoring, and re-initiation of tasks are realized in a specific object-oriented system. Limitations of existing object oriented database systems are identified, with respect to implementing these concepts. Based upon an actual prototype, recommendations are made for enhancing future object-oriented systems.
Crossing Minimization in Linear Embeddings of Graphs
Authors: Sumio Masuda, Kazuo Nakajima, Toshinobu Kashiwabara, Toshio Fujisawa
Venue: IEEE Transactions on Computers (1990)

The problem of embedding a graph in the plane with the minimum number of edge crossings arises in some circuit layout problems. It has been known to be NP-hard in general. Recently, in the area of book embedding, this problem was shown to be NP-hard even when the vertices are placed on a straight line l. The authors show that the problem remains NP-hard even if, in addition to these constraints, the positions of the vertices on l are predetermined.
The IC model of parallel computation and programming environment
Authors: E. J. Cameron, D. M. Cohen, B. Gopinath, W. M. Keese,  II, L. Ness, P. Uppaluru, J. R. Vollaro
Venue: ACM SIGCOMM Computer Communication Review (1988)

The IC* project is an effort to create an environment for the design, specification and development of complex systems such as communication protocols, parallel machines and distributed systems. The basis of this work is the IC* model of parallel computation. In this model a system is specified by a set of invariant expressions which describe its behavior in time. The novel features of the model include: temporal and structural constraints, inherent parallelism, explicit modeling of time, nondeterministic evolution and dynamic activation. The project also includes the construction of a parallel computer specifically designed to support the model of computation. The model of computation, the status of the project and the user environment is the content of this paper.
Splitting-Shooting Methods for Nonlinear Transformations of Digitized Patterns
Authors: Z. C. Li, D. Bui, C. Y. Shen, Y. Y. Tang
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1990)

New splitting-shooting methods are presented for nonlinear transformations T: ( xi , eta ) to (x,y) where x=x( xi , eta ), y=y( xi , eta ). These transformations are important in computer vision, image processing, pattern recognition, and shape transformations in computer graphics. The methods can eliminate superfluous holes or blanks, leading to better images while requiring only modest computer storage and CPU time. The implementation of the proposed algorithms is simple and straightforward. Moreover, these methods can be extended to images with gray levels, to color images, and to three dimensions. They can also be implemented on parallel computers or VLSI circuits. A theoretical analysis proving the convergence of the algorithms and providing error bounds for the resulting images is presented. The complexity of the algorithms is linear. Graphical and numerical experiments are presented to verify the analytical results and to demonstrate the effectiveness of the methods.
The volume common to two congruent circular cones whose axes intersect symmetrically
Authors: W. A. Beyer, L. R. Fawcett, R. D. Mauldin, B. K. Swartz
Venue: Journal of Symbolic Computation (1987)

The axes of two congruent right circular cones intersect at a point equidistant from the cones' vertices. We derive a formula for the volume of the set of points common to the interiors of both cones. Some of the work was done on the symbol manipulator MACSYMA.
Design and analysis aid for evaluating aircraft structures
Authors: Diana C. Fischer, Tu D. Nguyen
Venue: Proceedings of the 2nd international conference on Industrial and engineering applications of artificial intelligence and expert systems - Volume 1 (1989)

A prototype system was developed during the definition of the Structural Design Evaluator methodology. The system includes three modules: Structural Integrity Analysis; Cost/Producibility; and Reliability, Maintainability, and Supportability (RM S). The Structural Integrity Analysis module provides design prediction through stress analysis, fatigue and fracture analysis, and fastening recommendations. The Cost/Producibility Analysis module estimates product cost based on the material cost, the manufacturing process and the design producibility factors. The RM S Analysis module, on the other hand, assists design engineers to identify potential RM S weaknesses then provides recommendations. The expert design knowledge in the existing prototype system focuses on a machined parts family composed of functional features such as webs, flanges, stiffeners, and circular holes.
On-Line Recognition of Handwritten Arabic Characters
Authors: S. Al-Emami, M. Usher
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1990)

Arabic characters are always in cursive script. Handwritten words were entered into an IBM PC via a graphics tablet and a segmentation process applied to the points; the length and the slope of each segment was then found, and the slope categorized into one of four directions. In the learning process, specifications on the strokes of each character are fed to the computer. In the recognition process, the parameters of each stroke are found and special rules applied to select the collection of strokes which best matches the features of one of the stored characters. The results are promising, and suggestions for improvements leading to 100% recognition are proposed.
On the Beginnings of Computer Development in Poland
Authors: Leon Lukaszenwicz
Venue: IEEE Annals of the History of Computing (1990)

Development of computers in Poland began at the end of 1948 with the formation of the Group for Mathematical Apparatus of the Mathematical Institute in Warsaw. The beginning was not easy because at that time Warsaw was still rebuilding after the destruction of World War II. The first analogue computer, called the "Analyzer of Differential Equations, " was completed in 1954 and then regularly used for several years. The first successful digital computer, called XYZ, was completed in 1958. It performed about 800 operations per second and became a milestone in the development of Polish computers. Soon the XYZ computer was improved and, under the name ZAM 2, was manufactured and installed in many places in Poland and abroad. As asset of XYZ and ZAM 2 was the system of Automatic Coding, introduced in 1960 and often called a Polish FORTRAN.
ACE: a color expert system for user interface design
Authors: Barbara J. Meier
Venue: Proceedings of the 1st annual ACM SIGGRAPH symposium on User Interface Software (1988)

Color is used in computer graphics to code information, to call attention to items, to signal a user, and to enhance display aesthetics, but using color effectively and tastefully is often beyond the abilities of application programmers because the study of color crosses many disciplines, and many aspects, such as human color vision, are not completely understood. We compiled a comprehensive set of guidelines for the proper use of color, but even these guidelines cannot provide all of the aesthetic and human factors knowledge necessary for making good color selections. Furthermore, programmers may misinterpret or ignore the guidelines. To alleviate some of these problems, we have implemented ACE, A Color Expert system which embodies the color rules and applies them to user interface design. The goal of the implementation was to test whether an automated mechanism would be a viable solution to the problem of choosing effective and tasteful colors. Our implementation is written in OPS5, a production system programming language, which allowed us encode rules in a similar fashion to our existing set of guidelines. ACE takes a user interface specification and uses our color rules as constraints to determine the best colors for particular items. While ACE is only a prototype, we learned that an expert system is a viable method for choosing an initial set of colors that can be &ldquo;tweaked&rdquo; by a human expert. We also learned that much more research needs to be performed in the areas of visual color relationships and how they can be used to provide the most effective user interface.
Expressing Boolean cube matrix algorithms in shared memory primitives
Authors: S. L. Johnsson, C-T. Ho
Venue: Proceedings of the third conference on Hypercube concurrent computers and applications - Volume 2 (1989)

The multiplication of (large) matrices allocated evenly on Boolean cube configured multiprocessors poses several interesting trade-offs with respect to communication time, processor utilization, and storage requirement. In [7] we investigated several algorithms for different degrees of parallelization, and showed how the choice of algorithm with respect to performance depends on the matrix shape, and the multiprocessor parameters, and how processors should be allocated optimally to the different loops. In this paper the focus is on expressing the algorithms in shared memory type primitives. We assume that all processors share the same global address space, and present communication primitives both for nearest-neighbor communication, and global operations such as broadcasting from one processor to a set of processors, the reverse operation of plus-reduction, and matrix transposition (dimension permutation). We consider both the case where communication is restricted to one processor port at a time, or concurrent communication on all processor ports. The communication algorithms are provably optimal within a factor of two. We describe both constant storage algorithms, and algorithms with reduced communication time, but a storage need proportional to the number of processors and the matrix sizes (for a one-dimensional partitioning of the matrices).
Mathematical modeling and simulation of an algorithm for optimistic concurrency control in centralized database systems
Authors: Lieh-san Lin, James Calhoun
Venue: Proceedings of the 21st annual symposium on Simulation (1988)

This paper presents the analysis of an algorithm for optimistic concurrency control in centralized database systems. The effectiveness of optimistic concurrency control in a centralized database system depends on the probability of transaction conflict being low. When conflict does occur, it is resolved by aborting the older transaction and allowing resubmission. The concern here is to examine the probability that a transaction is able to avoid conflict and commit. Specifically, a set of probabilistic formulas which provide an analysis of this probability is examined. Furthermore, a report of two simulation studies, the design and implementation of a GPSS simulation and the design of a simulation for the IBM token-ring network, is given.
On the Computational Aspects of Performability Models of Fault-Tolerant Computer Systems
Authors: K. R. Pattipati, S. A. Shah
Venue: IEEE Transactions on Computers (1990)

It is shown that the (scaled) conditional moments of performability in Markov models are the states of a cascaded, linear, continuous-time dynamic system with identical system matrices in each stage. This interpretation leads to a simple method of computing the first moment for nonhomogeneous Markov models with finite mission time. In addition, the cascaded system representation leads to the derivation of a set of two stable algorithms for propagating the conditional moments of performability in homogeneous Markov models. In particular, a very fast doubling algorithm using diagonal Pade approximation to compute the matrix exponential and repeated squaring is derived. The algorithms are widely recognized, to be superior to those based on eigenvalue analysis in terms of both the computational efficiency and stability. The algorithms have obvious implications in solving reliability/availability models with large mission times.
Designing software for one-dimensional partial differential equations
Authors: N. L. Schryer
Venue: ACM Transactions on Mathematical Software (TOMS) (1990)

Users of software for solving partial differential equations are often surprised by its inability to formulate their problems. Computer scientists speak of partial differential equations (PDEs) as canonical coupled systems, typically in divergence form. Physicists, chemists, and engineers start with the same description, but then add real-world things like &ldquo;Rankine-Hugoniot&rdquo; conditions, integro-differential operators, and Eulerian (moving) coordinate systems. This paper describes a generalization of the classical PDE formulation that allows users to formulate virtually any pde problem. The extended formulation has been used successfully on a wide range of nontrivial problems in the physical sciences that cannot even be written down in the classical form.
Distributed Hierarchical Control for Parallel Processing
Authors: Dror G. Feitelson
Venue: Computer (1990)

A description is given of a novel design, using a hierarchy of controllers, that effectively controls a multiuser, multiprogrammed parallel system. Such a structure allows dynamic repartitioning according to changing job requirements. The design goals are examined, and the principles of distributed hierarchical control are presented. Control over processors is discussed. Mapping and load balancing with distributed hierarchical control are considered. Support for gang scheduling as well as availability and fault tolerance is addressed. The use of distributed hierarchical control in memory management and I/O is discussed.
Anatomy of a hardware compiler
Authors: K. Keutzer, W. Wolf
Venue: Proceedings of the ACM SIGPLAN 1988 conference on Programming Language design and Implementation (1988)

Programming-language compilers generate code targeted to machines with fixed architectures, either parallel or serial. Compiler techniques can also be used to generate the hardware on which these programming languages are executed. In this paper we demonstrate that many compilation techniques developed for programming languages are applicable to compilation of register-transfer hardware designs. Our approach uses a typical syntax-directed translation &rarr; global optimization &rarr; local optimization &rarr; code generation &rarr; peephole optimization method. In this paper we will describe ways in which we have both followed and diverged from traditional compiler approaches to these problems and compare our approach to other compiler oriented approaches to hardware compilation.
A study of scalar compilation techniques for pipelined supercomputers
Authors: Shlomo Weiss, James E. Smith
Venue: ACM Transactions on Mathematical Software (TOMS) (1990)

This paper studies two compilation techniques for enhancing scalar performance in high-speed scientific processors: software pipelining and loop unrolling. We study the impact of the architecture (size of the register file) and of the hardware (size of instruction buffer) on the efficiency of loop unrolling. We also develop a methodology for classifying software pipelining techniques. For loop unrolling, a straightforward scheduling algorithm is shown to produce near-optimal results when not inhibited by recurrences or memory hazards. Our study indicates that the performance produced with a modified CRAY-1S scalar architecture and a code scheduler utilizing loop unrolling is comparable to the performance achieved by the CRAY-1S with a vector unit and the CFT vectorizing compiler. Finally, we show that the combination of loop unrolling and dynamic software pipelining, as implemented by a decoupled computer, substantially outperforms the vector CRAY-1S.
Partial-record input and output
Authors: Loren P. Meissner
Venue: ACM SIGPLAN Fortran Forum (1989)

The record-oriented nature of Fortran I/O has long been recognized as an anachronism. Most other programming languages permit processing to stop in the middle of an input or output record, and to continue later with the remainder of the same record. "Stream access" appeared in the public review draft of the Fortran 77 standard, but was finally removed because of inconsistencies. A partial-record input and output facility was added to the Fortran 88 draft at X3J3 meeting 111 (February 1989) and was further refined at meeting 112 (May 1989).