ppxscal/embedding_network huggingface dataset:
Giving expression to multimedia performance
Authors: Leonello Tarabella, Graziano Bertini
Venue: Proceedings of the 2000 ACM workshops on Multimedia (2000)

In this paper we describe the experience of researchers and artists involved in the activities of the &ldquo;computer ART lab&rdquo; (cART lab) of the italian National Council of Research (C.N.R.) in Pisa, regarding the &ldquo;wireless technology&rdquo; developed for controlling in real-time and giving expression to interactive multimedia performances. Due to the daily increase in computers power and electronics systems able to sense the presence, the shape, the distance and the position of objects, a new field of investigation and implementation has been started in the last few years: computer recognition of human gesture [1][2]. As a result, the human body itself can now be considered as a natural and powerful expressive &ldquo;interface&rdquo; to give feeling to performances based on computer generated electro-acoustic music and computer generated visual-art. Modern human computer interfaces are extremely rich, incorporating traditional interface devices such as keyboard and mouse and a wealth of advanced media types: sound, video, animated graphics. The term multi-modal is often associated with such interfaces to emphasize that the combined use of multiple modes of perception is relevant to the user's interface [3][4]. The most relevant devices and systems developed at cART lab for gesture recognition to be used in interactive multimedia performances are here reported.
A method of syntax specification
Authors: Kenneth E. Iverson
Venue: Communications of the ACM (1964)

The addition of a few simple conventions to the Backus Normal Form specification of a language provides a mode of description which is more compact and easier to prepare and use than either the standard BNF description [1] or the corresponding syntactical chart [2].
A meta-learning approach for text categorization
Authors: Wai Lam, Kwok-Yin Lai
Venue: Proceedings of the 24th annual international ACM SIGIR conference on Research and development in information retrieval (2001)

We investigate a meta-model approach, called Meta-learning Using Document Feature characteristics (MUDOF), for the task of automatic textual document categorization. It employs a meta-learning phase using document feature characteristics. Document feature characteristics, derived from the training document set, capture some inherent category-specific properties of a particular category. Different from existing categorization methods, MUDOF can automatically recommend a suitable algorithm for each category based on the category-specific statistical characteristics. Hence, different algorithms may be employed for different categories. Experiments have been conducted on a real-world document collection demonstrating the effectiveness of our approach. The results confirm that our meta-model approach can exploit the advantage of its component algorithms, and demonstrate a better performance than existing algorithms.
A simple guide to five normal forms in relational database theory
Authors: William Kent
Venue: Communications of the ACM (1983)

The concepts behind the five principal normal forms in relational database theory are presented in simple terms.
Frequent value locality and value-centric data cache design
Authors: Youtao Zhang, Jun Yang, Rajiv Gupta
Venue: ACM SIGPLAN Notices (2000)

By studying the behavior of programs in the SPECint95 suite we observed that six out of eight programs exhibit a new kind of value locality, the frequent value locality, according to which a few values appear very frequently in memory locations and are therefore involved in a large fraction of memory accesses. In these six programs ten distinct values occupy over 50% of all memory locations and on an average account for nearly 50% of all memory accesses during program execution. This observation holds for smaller blocks of consecutive memory locations and the set of frequent values remains quite stable over the execution of the program.In the six benchmarks with frequent value locality, on an average 50% of all cache misses occur during the reading or writing of the ten most frequently accessed values. We propose a new data cache structure, the frequent value cache (FVC), which employs a value-centric approach to caching data locations for exploiting the frequent value locality phenomenon. FVC is a small direct-mapped cache which is dedicated to holding only frequently occurring values. The value-centric nature of FVC enables us to store data in a compressed form where the compression is achieved by encoding the frequent values using a few bits. Moreover this simple compression scheme preserves the random access to data values in a cache line.Our experiments demonstrate that by augmenting a direct mapped cache (DMC) with a direct mapped FVC of size no more than 3 Kbytes we can obtain reductions in miss rates ranging from 1% to 68%. In fact we observed that higher reductions in miss rates can be achieved by augmenting a DMC with a small FVC as opposed to doubling the size of DMC for the 124.m88ksim and 134.perl benchmarks.
Beneath the surface of organizational processes: a social representation framework for business process redesign
Authors: Gary Katzenstein, F. Javier Lerch
Venue: ACM Transactions on Information Systems (TOIS) (2000)

This paper raises the question, &ldquo;What is an effective representation framework for organizational process design?&rdquo; By combining our knowledge of existing process models with data from a field study, the paper develops criteria for an effective process representation. Using these criteria and the case study, the paper integrates the process redesign and information system literatures to develop a representation framework that captures a process' social context. The paper argues that this social context framework, which represents people's motivations, social relationships, and social constraints, gives redesigners a richer sense of the process and allows process redesigners to simultaneously change social and logistic systems. The paper demonstrates the framework and some of its benefits and limitations.
Process algebra and non-interference
Authors: P. Y. A. Ryan, S. A. Schneider
Venue: Journal of Computer Security (2001)

Various formulations of non-interference have been proposed to try to characterise the absence of information flows in system or network. There is still no consensus in the information security community as to which of these accurately captures our intuition of the notion of secrecy. We argue that non-interference is closely related to the characterisation of process equivalence. What constitutes process equivalence is itself a fundamental question in computer science with several distinct definitions proposed in the literature. We illustrate how several of the definitions of non-interference mirror notions of process equivalence. Casting these security concepts in a process algebraic framework clarifies, for example, the role of non-determinism and allows results to be carried over regarding composition and the completeness of unwinding rules. We also discuss some natural generalisations of the approach.
The Use of the B Formal Method for the Design and the Validation of the Transaction Mechanism for Smart Card Applications
Authors: Denis Sabatier, Pierre Lartigue
Venue: Formal Methods in System Design (2000)

This document describes an industrial application of the B method in smart card applications. In smart card memory, data modification may be interrupted due to a card withdrawal or a power loss. The EEPROM memory may result in an unstable state and the values subsequently read may be erroneous. The transaction mechanism provides a secure means for modifying data located in the EEPROM. As the security in smart card applications is paramount, the use of the B formal method brings high confidence and provides mathematical proof that the design of the transaction mechanism fulfills the security requirements.
Technology support for authentic assessment in the new millennia: a case study on implementing digital portfolios
Authors: Paul Worthington
Venue: Proceedings of the Australasian conference on Computing education (2000)

Education faces multiple challenges in the new millennia. Educational Institutions are broadening the range of instructional methods and approaches; increased attention is being given to effective use of technology in the learning process. Traditional teaching methods are often used by default, in situations where the possibility of more effective alternatives either have no been considered or involve too much time and effort to establish. Traditional teaching marks, tests, and assesses the output of student at a single moment in time, which provides us with only a snapshot of performance. We need methods much closer to narrative that shows where a student stands with respect to the long arc of learning. This case study describes a creative technology-supported approach taken within an undergraduate course at Curtin University, Perth, Western Australia as a strategy to enhance extend and improve student learning and assist with measurement in using authentic assessment necessary for education reform. The author uses the technology to create a learning environment where students develop a digital or electronic portfolio to demonstrate their communication skills.
An Architecture-Independent Graphical Tool for Automatic Contention-Free Process-to-Processor Mapping
Authors: Hong Shen, Sam Lor, Piyush Maheshwari
Venue: The Journal of Supercomputing (2001)

Mapping of parallel programs onto parallel computers for efficient execution is a fundamental problem of great significance in parallel processing. This paper presents an architecture-independent software tool for contention-free mapping of arbitrary parallel programs onto parallel computers with arbitrary configurations. This mapping tool is based on an efficient heuristic algorithm that runs in time O(n3+m4) in the worst case for mapping n tasks onto m processors, where m &Lt; n in most practical cases. It is fully implemented and incorporated into a graph editing system to produce a graphical mapping tool which enables its user to monitor and control the mapping process. The user can assist the mapping process or employ the algorithm to map automatically. Our mapping tool has been tested and its performance evaluated extensively. Experimental results show that our tool combines user intuition and mapping heuristics effectively to make it a powerful mapping tool which is practical to use. Our mapping tool can be easily extended for use in the more general case when the link contention-degree is bounded to a fixed system-specified value without increasing its complexity.
Families of Optimal Fault-Tolerant Multiple-Bus Networks
Authors: Huan-Yu Tu, Lois W. Hawkes
Venue: IEEE Transactions on Parallel and Distributed Systems (2001)

Optimally fault-tolerant partial-connection multiple-bus networks and their fault-tolerant routing algorithms are presented in this paper. The proposed networks are scalable and provide flexibility in the choice of network parameters determining construction cost, system performance, and fault tolerance, given a fixed number of processors. In this design, when performance begins to fall due to contention, the simple addition of a bus can improve performance without adding costly processors or changing the whole topology, as required for other multiple-bus designs. Also, in situations requiring high reliability, for a fixed number of processors, excellent fault tolerance can be obtained.
Performance analysis and optimization on the UCLA parallel atmospheric general circulation model code
Authors: John Lou, John Farrara
Venue: Proceedings of the 1996 ACM/IEEE conference on Supercomputing (CDROM) (1996)

An analysis is presented of several factors influencing the performance of a parallel implementation of the UCLA atmospheric general circulation model(AGCM) on massively parallel computer systems. Several modifications to the parallel AGCM code aimed at improving its numerical efficiency, interprocessor communication cost, load-balance and cache efficiency are discussed. The impact of some of the optimization strategies on the performance of the AGCM code as we implemented on several state-of-the-art parallel computers, including the Intel Paragon, Cray T3D and IBM SP2, is presented and analyzed.
Retargetable compilation for low power
Authors: Wen-Tsong Shiue
Venue: Proceedings of the ninth international symposium on Hardware/software codesign (2001)

Most research to date on energy minimization in DSP processors has focuses on hardware solution. This paper examines the software-based factors affecting performance and energy consumption for architecture-aware compilation. In this paper, we focus on providing support for one architectural feature of DSPs that makes code generation difficult, namely the use of multiple data memory banks. This feature increases memory bandwidth by permitting multiple data memory accesses to occur in parallel when the referenced variables belong to different data memory banks and the registers involved conform to a strict set of conditions. We present novel instruction scheduling algorithms that attempt to maximize the performance, minimize the energy, and therefore, maximize the benefit of this architectural feature. Experimental results demonstrate that our algorithms generate high performance, low energy codes for the DPS architectural features with multiple data memory banks. Our algorithm led to improvements in performance and energy consumption of 48.3% and 66.6% respectively in our benchmark examples.
A tool for teaching advanced data structures to computer science students: an overview of the BDP system
Authors: Katrin Becker, Melissa Beacham
Venue: Proceedings of the second annual CCSC on Computing in Small Colleges Northwestern conference (2000)

In order to design and write effective, robust code using advanced data structures, it is crucial to achieve a thorough understanding of the algorithms used to manipulate these structures. One means of accomplishing the task is to provide students with a graphical, animated system that allows users to observe changes that the structure undergoes while it is being used. One such system has been developed which demonstrates B-Trees. Some preliminary testing is complete and some initial reactions of the students who have tried the system are outlined.
A note on data base deadlocks
Authors: H. D. Baecker
Venue: Communications of the ACM (1970)

In &ldquo;Synchronization in a Parallel-Accessed Data Base&rdquo; [Comm. ACM 12, 11 (Nov. 1969), 604-607] A. Shoshani and A. J. Bernstein have given a very lucid synthesis of diverse techniques to assure the integrity of a data base. But it appears that one of the factors in the synthesis, the entry hold count, will prevent the return of a node to the free list in precisely those circumstances for which they invoked the facility.
Invariant Solutions of Differential Games and Hamilton--Jacobi--Isaacs Equations for Time-Measurable Hamiltonians
Authors: Pierre Cardaliaguet, Slawomir Plaskacz
Venue: SIAM Journal on Control and Optimization (2000)

We characterize invariance of time-varying domains with respect to differential games with time-measurable dynamics. We deduce from this result a new definition of viscosity solutions to some first order Hamilton--Jacobi equations with time-measurable Hamiltonians.
Routing without flow control
Authors: Costas Busch, Maurice Herlihy, Roger Wattenhofer
Venue: Proceedings of the thirteenth annual ACM symposium on Parallel algorithms and architectures (2001)

We present the first dynamic hot-potato routing algorithm that does not require any form of explicit flow control: a node may inject a message into the network (n &times; n mesh) whenever a link is free. In the worst case, a node may have to wait an expected &Ogr;(n) time before it has a free link. If destinations are chosen uniformly at random, this algorithm guarantees delivery in an expected &Ogr;(n) time steps. Both measures are optimal up to a constant factor.
Task Allocation on a Network of Processors
Authors: Tsan-Sheng Hsu, Joseph C. Lee, Dian Rae Lopez, William A. Royce
Venue: IEEE Transactions on Computers (2000)

This paper studies the scheduling of tasks on a pool of identical workstations in a network where message passing is used for data transfer and communication between processors and where the precedence relations among tasks form a send-receive graph. Our parallel computation model differs from previous models by including all of the following practical considerations: 1) The sending and receiving of multiple messages from one processor to another is performed sequentially, 2) communication overhead is proportional to the message size, and 3) the starting and ending task must be performed on the same machine. These factors are crucial when performing parallel task execution using a pool of workstations whose communication primitives are provided by off-the-shelf packages, such as PVM, and whose message sizes are nontrivial. Although our model is new, using reduction from other well-known scheduling results shows that finding a scheduling with the optimal makespan is NP-hard. Our focus, therefore, is on developing and analyzing approximation algorithms for this problem. When the number of workstations in the network is abundant, a linear approximation algorithm is given with a proven performance bound of two times the optimal. When the number of available workstations is a fixed constant $k$ that is greater than $2$, we show an $O(n log n){\hbox{-}}{\rm time}$ approximation algorithm which always performs better than $(3+{\frac{k-2}{k}})$ times the optimal. Simulation results show that, on the average, both of our approximation algorithms perform much better than the worst case analysis and both generate schedulings whose makespans are very close to optimal.
A strategic view for the development of E&hyphen;Business
Authors: Saad Haj Bakry, Fahed Haj Bakry
Venue: International Journal of Network Management (2001)

E&hyphen;business is becoming increasingly important for countries, organizations and individuals, as it gives them efficiency, and as it integrates them together, and with the world at large. This paper aims at providing a strategic view for the development of e&hyphen;business. Copyright &copy; 2001 John Wiley Sons, Ltd.
Performance statistics of a time sharing network at a small university
Authors: Paul O'Neill, Avis O'Neill
Venue: Communications of the ACM (1980)

The purpose of the study was to characterize the input traffic on the interactive terminal facility (ITF) at Jackson State University by mathematical distributions. Five traffic measures were extracted from a week's job accounting records: arrival time (time of day of log on), interarrival time (time between successive arrivals), active central processing unit (CPU) time (user's time slice), inactive CPU time (swapping time), and connect time (duration of a user session). To facilitate analysis, four user groups were formed. An analysis of variance established that the group category largely determined the volume of arrivals. Since a normal distribution could not be fitted to the data, it was concluded that the pattern of daily arrivals was best treated as an empirical distribution. Using the method of moments to estimate parameters, it was found that interarrival times could best be characterized by a gamma distribution, while connect, inactive CPU, and active CPU times approximated exponential distributions.
WYLBUR: an interactive text editing and remote job entry system
Authors: Roger Fajman, John Borgelt
Venue: Communications of the ACM (1973)

WYLBUR is a comprehensive system for manipulating all kinds of text, such as computer programs, letters, and manuscripts, using typewriter terminals connected to a computer. It has facilities for remote job entry and retrieval as well as facilities for text alignment and justification. A powerful method for addressing text by content is provided. This paper describes the external appearance of WYLBUR as well as its internal structure. A short description of the major features of ORVYL, a general purpose time-sharing system which operates in conjunction with WYLBUR, is also included.
On reversible subroutines and computers that run backwards
Authors: E. D. Reilly,  Jr., F. D. Federighi
Venue: Communications of the ACM (1965)

A computer design is described which permits subroutines to be executed backward as well as forward, either with their instructions unchanged or replaced with conjugate instructions. It is shown that using this concept a number of new subroutine types can be developed with rather unusual properties. Since these properties are analogous to certain matrix operations, a arallel nomenclature is suggested for their classification.
Current status of IPL-V for the Philco 2000 computer (June 1962)
Authors: Stuart S. Shaffer
Venue: Communications of the ACM (1962)

The initial version of IPL-V for the Philco 2000 has been completed and is now operating on the computer. This model, IPLT-1, contains the loader, interpreter, output, housekeeping functions, and some of the primitives of the 7090 version. This system was written mainly in JOVIAL, a procedure-oriented language, and was compiled to produce a Philco TAC binary operating deck. Certain portions were written in Philco TAC language to speed up the operation of the system during execution and to facilitate handling of primitives which in JOVIAL would have been uneconomical. These assembly-language coded sections constitute less than 3 percent of the system. The present model assembles IPL program cards at the rate of 500 per minute in the listing mode. This compares favorably with the 7090 model, since System Development Corporation's configuration of the Philco computer operates at approximately one-fifth the speed of the 7090. Interpretation time also compares favorably with the 7090 model taking into account the difference in speeds of the two computers. The package of J primitives produced by H. A. Simon is being used and assembled with the IPL program. With listing suppressed, assembly time of these routines is only a few seconds. Input to the Philco 2000 is by card, and the system operates as a program executed in phase three of the SL Philco operating system. The J165, J166 dump and reload features are working, and this technique can be used to save an assembled IPL program on tape for later use. Unused region assignments are not returned to available space; therefore additional routines may be added with new data for reload and run from a dump tape. However, card input is extremely fast (2000 cards per minute) and normal operating procedure at SDC is card input.
Algorithm 803: a simpler macro processor
Authors: William A. Ward,  Jr.
Venue: ACM Transactions on Mathematical Software (TOMS) (2000)

Macro processors have been in the computing tool chest since the late 1950's. Their use, though perhaps not what it was in the heyday of assembly language programming, is still widespread. In the past, producing a full-featured macro processor has required significant effort, similar to that required to implement the front-end to a compiler augmented by appropriate text substitution capabilities. The tool described here adopts a different approach. The text containing macro definitions and substitutions is, in a sense, &ldquo;compiled&rdquo; to produce a program, and this program must then be executed to produce the final output.