ppxscal/embedding_network huggingface dataset:
A Benchmark Tutorial
Authors: Walter J. Price
Venue: IEEE Micro (1989)

The author describes benchmarking and discusses some of the specific benchmark tests for computer systems that are in use today. He examines some of the pitfalls involved with benchmark comparison and analysis and points out how to avoid, or at least minimize the impact of, such problems. The goal is to learn how to gather and interpret meaningful comparison data. Benchmark test results are tabulated for the Dhrystone 1.1, Digital Review, Dodec, Khornerstone, Linpack, Livermore Fortran Kernel, SPICE, Stanford, and single-precision Whetstone benchmarks.
Dicaf: A Distributed Architecture for Intelligent Transportation
Authors: Noppanunt Utamaphethai, Sumit Ghosh
Venue: Computer (1998)

The solution to increasing traffic congestion is not to simply build new roads. Instead, researchers hope to use technology to make more efficient use of the highway network that already exists. Key efforts to date have fallen into two categories. One set of studies has looked at the use of a centralized traffic management center that collects traffic congestion information at a single point and relays it to on-board computers in vehicles or directly to the drivers. Another set of studies has looked at systems that would prescribe the routes for vehicles. The authors describe their Dicaf (distributed scalable architecture for IVHS using a continuous-function congestion measure) system, which envisions a network of distributed, independent traffic management centers that provide congestion and other information to on-board navigation systems in the automobiles themselves. The navigation system uses that information to help drivers avoid slower traffic and thus find the fastest route home or anywhere.
Geometric Reasoning for Recognition of Three-Dimensional Object Features
Authors: M. Marefat, R. L. Kashyap
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1990)

A method for extracting manufacturing shape features from the boundary representation of a polyhedral object is presented. In this approach, the depressions of the part are represented as cavity graphs, which are in turn used as a basis for hypothesis generation-elimination. The proposed cavity graphs are an extended representation in which the links reflect the concavity of the intersection between two faces, and the node labels reflect the relative orientation of the faces comprising the depression. Because previous methods have limited success in handling interactions, emphasis is put on automatic analysis of depressions which are formed by the interactions of primitive features. It is shown that although there is a unique subgraph for each primitive feature, every cavity graph does not correspond to a unique set of primitive features. Consequently, since the cavity graph of a depression may not be the union of the representations for the involved primitives, the concept of virtual links for the formal analysis of the depressions based on cavity graphs is introduced. Finally, a suitable method for automatic determination of the virtual links is presented. This method is based on combining topologic and geometric evidences, and uses a combination of Dempster-Shafer decision theory and clustering techniques to reach its conclusions. Experimental results are presented for a number of examples.
Transit oriented sustainable urban developments: enhancing community consultation through web based virtual environments
Authors: Sam Bucolo, Simon Ginn, Dale Gilbert, John Hayes
Venue: Proceedings of the 1st international conference on Computer graphics and interactive techniques in Australasia and South East Asia (2003)

This paper will present a project in progress on the use of computer graphics to enhance the communication of an emerging Urban Design concept -- Transit Oriented Sustainable Urban Design (TOSUD). Two detailed virtual environments have been created relating to hypothetical TOSUD developments within an Australian and Chinese context. The process of development and resultant virtual environment will initially be discussed within the paper. Following this, the development of a unique computer interface, which facilitates community consultation within these virtual environments, will be presented. The case study and interface development provides a framework for the future application of such tools within the Built Environment disciplines.
Forging a New Simulation Technology at the ICT
Authors: Richard Lindheim, William Swartout
Venue: Computer (2001)

Under the auspices of the US Army Simulation, Training, and Instrumentation Command, USC's Institute for Creative Technologies (ICT) focuses on developing the art and technology for providing compelling yet synthetic experiences so participants react as if the simulations are real. ICT will bring verisimilitude--the quality or state of appearing to be true--to synthetic experiences. The Mission Rehearsal Exercise project seeks to create a virtual reality-training environment in which soldiers confront dilemmas that impel them to decide in real time under stressful circumstances. By using a simulator so that soldiers see the consequences of their actions and decision-making skills, the Army expects to better prepare its troops for dealing with similar dilemmas in the real world. ICT's objective is to build a special partnership with the entertainment industry and academia. With the Experience Learning System, the authors plan to develop a simulation training system for the Army that overcomes current simulation shortcomings while playing a complementary role with its legacy simulation systems. Ultimately, the Army seeks to implement a net-worked, immersive system benefiting from the creativity of entertainment industry artists and virtual reality technology.
The Iris Architecture and Implementation
Authors: K. Wilkinson, P. Lyngbæk, W. Hasan
Venue: IEEE Transactions on Knowledge and Data Engineering (1990)

The goals of the Iris database management system are to enhance database programmer productivity and to provide generalized database support for the integration of future applications. Iris is based on an object and function model. Iris objects are typed but unlike other object systems, they contain no state. Attribute values, relationships and behavior of objects are modeled by functions. The Iris architecture efficiently supports the evaluation of functional expressions. The goal of the architecture is to provide a database system that is powerful enough to support the definition of functions and procedures that implement the semantics of the data model. An overview of the data model is provided, the architecture is described in detail, and implementation experience and usage of the system are discussed.
Integrating role graphs: a tool for security integration
Authors: Sylvia Osborn
Venue: Data Knowledge Engineering (2002)

Role-based access control provides a very flexible set of mechanisms for managing the access control of a complex system with many users, objects and applications. The role graph model of Nyanchama and Osborn is one example of how role administration algorithms can be implemented. In our previous research, we have also shown how the access control information of existing systems can be extracted and represented as a role graph. In this paper, we extend this research by showing how, when two systems are being integrated, their role graphs can also be integrated.
Geometric Probing of Dense Range Data
Authors: M. Greenspan
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (2002)

A new method is presented for the efficient and reliable pose determination of 3D objects in dense range image data. The method is based upon a minimalistic Geometric Probing strategy that hypothesizes the intersection of the object with some selected image point, and searches for additional surface data at locations relative to that point. The strategy is implemented in the discrete domain as a binary decision tree classifier. The tree leaf nodes represent individual voxel templates of the model, with one template per distinct model pose. The internal nodes represent the union of the templates of their descendant leaf nodes. The union of all leaf node templates is the complete template set of the model over its discrete pose space. Each internal node also encodes a single voxel which is the most common element of its child node templates. Traversing the tree is equivalent to efficiently matching the large set of templates at a selected image seed location. The method was implemented and extensive experiments were conducted for a variety of combinations of tree designs and traversals under isolated, cluttered, and occluded scene conditions. The results demonstrated a trade-off between efficiency and reliability. It was concluded that there exist combinations of tree design and traversal which are both highly efficient and reliable.
Destructors, finalizers, and synchronization
Authors: Hans-J. Boehm
Venue: Proceedings of the 30th ACM SIGPLAN-SIGACT symposium on Principles of programming languages (2003)

We compare two different facilities for running cleanup actions for objects that are about to reach the end of their life.Destructors, such as we find in C++, are invoked synchronously when an object goes out of scope. They make it easier to implement cleanup actions for objects of well-known lifetime, especially in the presence of exceptions.Languages like Java[8], Modula-3[12], and C\#[6] provide a different kind of "finalization" facility: Cleanup methods may be run when the garbage collector discovers a heap object to be otherwise inaccessible. Unlike C++ destructors, such methods run in a separate thread at some much less well-defined time.Languages like Java[8], Modula-3[12], and C\#[6] provide a different kind of "finalization" facility: Cleanup methods may be run when the garbage collector discovers a heap object to be otherwise inaccessible. Unlike C++ destructors, such methods run in a separate thread at some much less well-defined time.We argue that these are fundamentally different, and potentially complementary, language facilities. We also try to resolve some common misunderstandings about finalization in the process. In particular: The asynchronous nature of finalizers is not just an accident of implementation or a shortcoming of tracing collectors; it is necessary for correctness of client code, fundamentally affects how finalizers must be written, and how finalization facilities should be presented to the user. An object may legitimately be finalized while one of its methods are still running. This should and can be addressed by the language specification amd client code.
Dimensional Analysis with C++
Authors: Robert F. Cmelik, Narain H. Gehani
Venue: IEEE Software (1988)

Incorporating dimensional-analysis facilities in a language lets an environment detect an additional class of errors, but at the expense of requiring a change to the language you used. However, if the language you used has suitable data-abstraction facilities, most of the benefits of dimensional analysis can be had without changing the language. To demonstrate how to get these benefits, the authors use the data-abstraction facilities of C++ to implement dimensional analysis. C++ is an upwardly compatible extension of C that provides data-abstraction facilities called classes. The authors define a set of classes that allows the writing of programs with automatic checking of units (i.e. dimensional analysis) and automatic conversion between consistent (compatible or equivalent) units. They discuss the pros and cons of this approach and compare the advantage C++ has over Ada for implementing dimensional analysis.
Accuracy and nonoscillatory properties of enslaved difference schemes
Authors: Don A. Jones, Len G. Margolin, Andrew C. Poje
Venue: Journal of Computational Physics (2002)

We describe a general method for modifying a given finite-difference scheme by representing the effects of the subgrid scales in terms of the resolved scales through enslaving. The new scheme is more accurate in certain parameter regimes while retaining the time-step stability of the original scheme. We consider two general enslaving relations: an approximate enslaving based on truncation analysis and an exact enslaving based on the dynamics of the governing equation. We find that the modified schemes based on the exact enslaving eliminate unphysical oscillations, producing monotone solutions even when the original difference schemes do not, have this property. We offer a truncation analysis to justify this property. We apply our enslaving technique to advection-diffusion equations in both one and two spatial dimensions.
J-Coupling and chemical-shift evolution during I-spin irradiation of ImSn systems: product operator solutions and applications
Authors: Thomas E. Skinner, M. Robin Bendall
Venue: Concepts in Magnetic Resonance: an Educational Journal (2002)

We previously obtained exact solutions for the time dependence of the density operator in weakly coupled spin-½ImSn systems during arbitrary RF irradiation of the I spins. The solutions for the density operator were written as explicit linear combinations of its product operator components (i.e., the operator basis set consisting of direct products of the I- and S-spin operators). Other solutions for the product-operator evolution of the density matrix have considered either evolution in the absence of RF irradiation or the case where the RF is sufficiently strong that J-coupling effects can be ignored. The present solutions therefore extend the range of applications that are accessible to the product-operator formalism and vector pictures of nuclear spin evolution. Here, we derive the solutions for an IS system in detail to illustrate the simplicity of the formalism and supplement our previous, but more general, abstract treatment of the subject. We then outline how the formalism is applied to the ImSn case. We also briefly discuss the rigorous vector picture that can be associated with the states of the system at each time. The solutions provide new insight into the combined effects of RF irradiation and J-coupling. Applications include (1) novel methods for calibrating an RF channel for insensitive I spins by observing large signals from multiple quantum coherences with the S-spin channel, and (2) new RF pulses for achieving selective coherence transfer.
Dynamic and Transparent Binary Translation
Authors: Michael Gschwind, Erik R. Altman, Sumedh Sathaye, Paul Ledak, David Appenzeller
Venue: Computer (2000)

High-frequency design and instruction-level parallelism (ILP) are important for high-performance microprocessor implementations. The Binary-translation Optimized Architecture (BOA), an implementation of the IBM PowerPC family, combines binary translation with dynamic optimization. The authors use these techniques to simplify the hardware by bridging a semantic gap between the PowerPC's reduced instruction set and even simpler hardware primitives.Processors like the Pentium Pro and Power4 have tried to achieve high frequency and ILP by implementing a cracking scheme in hardware: An instruction decoder in the pipeline generates multiple micro-operations that can then be scheduled out of order. BOA relies on an alternative software approach to decompose complex operations and to generate schedules, and thus offers significant advantages over purely static compilation approaches. This article explains BOA's translation strategy, detailing system issues and architecture implementation.
Generating Image Filters for Target Recognition by Genetic Learning
Authors: A. J. Katz, P. R. Thrift
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1994)

Describes results obtained from applying genetic algorithms to the problem of detecting targets in image data. The method described is a two-layered approach, with the first layer providing a focus-of-attention function for the second layer. The first layer is called a Screener and selects subimages from the original image data to be processed by the second layer, called the Classifier. The Screener reduces the computational load of the system. Each layer consists of a set of linear operators (filters) applied directly to the image data. A genetic algorithm is applied to populations of filters based on fitness criteria. The authors note that the statistical classifier chosen for the Classifier stage drives the evolution of filters that are useful for that classifier to make good discriminations.
Getting Started on Software Metrics
Venue: IEEE Software (1993)

The principles on which the Software Management Metrics system is based are discussed. The system collects metrics at regular intervals and represents current estimates of the work to be done, the work accomplished, the resources used, and the status of products being generated. The lessons learned in the eight years since Software Management Metrics were first imposed on the US Air Force's software contractors are reviewed.
Finite-Element Analysis on a PC
Authors: Jon Flower, Adam Kolawa, Timothy Liang, Victor Weingarten
Venue: IEEE Software (1991)

The authors describe how they achieved mainframe performance by coding the Cosmos/M finite-element analysis system, a commercial product, for a PC enhanced with a parallel-processing board. The discussion covers design goals, algorithm design, implementation and debugging, performance optimization, and scalability. They focus on financial, algorithmic, and numerical issues, with almost no reference to the numerical principles involved in solving stress-analysis equations.
Avoiding congestion collapse on the internet using TCP Tunnels
Authors: B. P. Lee, R. K. Balan, L. Jacob, W. K. G. Seah, A. L. Ananda
Venue: Computer Networks: The International Journal of Computer and Telecommunications Networking (2002)

This paper discusses the application of TCP tunnels on the Internet and how Internet traffic can benefit from the congestion control mechanism of the tunnels. Primarily, we show the TCP tunnels offer TCP-friendly flows protection from TCP-unfriendly traffic. TCP tunnels also reduce the many flows situation on the Internet to that of a few flows. In addition, TCP tunnels eliminate unnecessary packet loss in the core routers of the congested backbones, which waste precious bandwidth leading to congestion collapse due to unresponsive UDP flows. We finally highlight that the use of TCP tunnels can, in principle, help prevent certain forms of congestion collapse described by Floyd and Fall [IEEE/ ACM Trans Networking 7 (4) (1999) 458].The deployment of TCP tunnels on the Internet and the issues involved are also discussed and we conclude that with the recent RFC2309 recommendation of using random early drop as the default packet-drop policy in Internet routers, coupled with the implementation of a pure tunnel environment on backbone networks makes the deployment of TCP tunnels a feasible endeavour worthy of further investigation.
BDD-based logic synthesis for LUT-based FPGAs
Authors: Navin Vemuri, Priyank Kalla, Russell Tessier
Venue: ACM Transactions on Design Automation of Electronic Systems (TODAES) (2002)

Contemporary FPGA synthesis is a multiphase process that involves technology-independent logic optimization followed by FPGA-specific mapping to a target FPGA technology. Conventional technology-independent transformations target standard cells and are unable to optimize circuits with constraints and goals specific to FPGA architectures. This article describes an FPGA-specific logic synthesis approach, which unites multilevel logic transformation, decomposition, and optimization techniques into a single synthesis framework. This system performs network transformation, decomposition, and optimization at an early stage to generate a network that can be directly mapped onto FPGAs. Our techniques are built upon a BDD-based logic decomposition system. With this system, both AND-OR decompositions and AND-XOR decompositions can be identified, resulting in large area savings for synthesized XOR-intensive circuits. To induce good decompositions, a maximum fanout free cone (MFFC) -based partial clustering and collapsing technique is used. This step is followed by an area-minimizing variable partitioning heuristic that decomposes collapsed nodes into LUT-feasible subfunctions. As a postprocessing step, a performance-driven resynthesis phase is performed to alleviate increased delay caused by excessive logic sharing. We compare the quality of results obtained using our techniques with those of academic (BoolMap, SIS) and industry (Altera Quartus) FPGA synthesis tools. Experimental results indicate that the circuits generated by our techniques are not only smaller, but are also significantly faster than those synthesized by conventional FPGA synthesis tools. Furthermore, the computation times required by our techniques are significantly smaller than those of previous techniques.
Epitaxial CoSi2-nanostructures: an approach to Si nanoelectronics
Authors: P. Kluth, Q. T. Zhao, S. Winnerl, S. Lenk, S. Mantl
Venue: Microelectronic Engineering (2002)

CoSi2-nanostructures were fabricated using a self-assembly process involving local oxidation of silicides (LOCOSI). The nanostructures are generated along the edge of a mask consisting of SiO2 and Si3N4, deposited by plasma enhanced chemical vapor deposition (PECVD) and patterned with conventional optical lithography. The mask induces a stress field near its edges into the underlying CoSi2/Si-heterostructure. Rapid thermal oxidation (RTO) leads to the separation of the CoSi2 layer in this region due to the concomitant anisotropic diffusion of the cobalt atoms in the stress field. Using this method, uniform gaps and narrow wires were produced from 20-30 nm-thick single-crystalline, epitaxial CoSi2-layers grown by molecular beam allotaxy (MBA) on conventional Si(100) and silicon-on-insulator (SOI) substrates. These structures with dimensions down to 40 nm can be used as building blocks for nanoscale metal-oxide-semiconductor field effect transistor (MOSFET) devices. We produced 70 nm gate-length Schottky barrier MOSFETs (SBMOSFETs) on SOI using the silicide nanostructures. These devices can be driven as both p-channel and n-channel MOSFETs without complementary substrate doping and show good I-V characteristics.
Efficient Algorithms for System Diagnosis with Both Processor and Comparator Faults
Authors: Y. Chen, W. Bücken, K. Echtle
Venue: IEEE Transactions on Parallel and Distributed Systems (1993)

For the comparison-based self-diagnosis of multiprocessor systems, an extended modelthat considers both processor and comparator faults is presented. It is shown that in thismodel the system diagnosability is t>or=Z delta /2Z, where delta is the minimum vertexdegree of the system graph. However, if the number of faulty comparators is assumednot to exceed the number of faulty processors, the diagnosability of the model reachest>or= delta . An optimal O( mod E mod ) algorithm, where E is the set of comparators, isgiven for identifying all faulty processors and comparators, provided that the total number of faulty components does not exceed the system diagnosability, and an O(mod E mod)/sup 2/ algorithm for the case t>or= delta is also presented. These efficient algorithms determine the faulty processors by calculating each processor's weight, which is mainly defined by the number of adjacent relative tests stating 'agreement'. After sorting the processors according to their weights, the algorithms determine all faulty components by separating the sorted processor list.