ppxscal/embedding_network huggingface dataset:
Hypertext and &ldquo;the hyperreal&rdquo;
Authors: S. Moulthrop
Venue: Proceedings of the second annual ACM conference on Hypertext (1989)

As the technology of hypertext matures and becomes widespread, the changes it brings to textuality will affect all fields of writing, including those associated with literature. Using an important recent work of hypertextual fiction as a focal point, this paper offers a perspective on hypertext informed by literary and social criticism. It invokes Jean Baudrillards distinction between technologies of displacement (the robot) and technologies of augmentation (the automaton) to argue for the design of texts and systems that are accessible and enabling rather than opaque and objectifying.
Why good engineers (sometimes) create bad interfaces
Authors: Donald R. Gentner, Jonathan Grudin
Venue: Proceedings of the SIGCHI conference on Human factors in computing systems: Empowering people (1990)

This paper presents a view of system design that shows how good engineering practice can lead to poor user interfaces. From the engineer's perspective, the ideal interface reflects the underlying mechanism and affords direct access to the control points of the mechanism. The designer of the user interface is often also the designer of the mechanism (or at least is very familiar with the mechanism), and thus has a strong bias toward basing the interface on the engineering model. The user, however, wants to complete a task, and an interface that is based on the task is often more appropriate than one based on the system mechanism. We discuss these issues, and also discuss where to position the user interface between the poles of the engineering model and the task model.
A random base change algorithm for permutation groups
Authors: G. Cooperman, L. Finkelstein, N. Sarawagi
Venue: Proceedings of the international symposium on Symbolic and algebraic computation (1990)

A new random base change algorithm is presented for a permutation group G acting on n points whose worst case asymptotic running time is better for groups with a small to moderate size base than any known deterministic algorithm. To achieve this time bound, the algorithm requires a random generator Rand(G) producing a random element of G with the uniform distribution and so that each call to Rand(G) takes time &Ogr;(log(|G|)n). The random base change algorithm has probability 1 -- 1/|G|2 of completing in time &Ogr;(log2(|G|)n) and outputting a data structure for representing the point stabilizer sequence relative to the new ordering which requires &Ogr;(log(|G|)n) space and which can be used to test group membership in time &Ogr;,(log(|G|)n). The time to build a data structure for computing a Rand(G) with the above properties from a strong generating set for G is dominated by the time to construct the strong generating set from the original set of generators.
A Globally Convergent Algorithm for Minimizing Over the Rotation Group of Quadratic Forms
Authors: C. Gurwitz, M. L. Overton
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1989)

The authors describe a numerical procedure for solving problems involving minimization over the rotation group of quadratic forms which arise in connection with problems of computer vision. The algorithm presented is a sequential quadratic programming method which takes advantage of the special structure of the problem constraints. It is demonstrate that the method is globally convergent.
An annotated bibliography on user interface design
Authors: P. Fraser, D. A. Lamb
Venue: ACM SIGCHI Bulletin (1989)

This report is an annotated bibliography of material on user interface design literature, covering work available to us up to about May 1987. For each work there is a reference, a description of the work, and possibly a statement of the work's purpose. The description gives a summary of the work's content; the statement of purpose, or "goal," describes the intent of the work, and thus its overall tone. Some works do not have a "goal" paragraph. This is either because they build upon previous work (such as [Anson82] and [Anson80]) and have the same goal, or because they are purely expository (such as [Backus59]).
Comparing production system architectures
Authors: Mark Lease, Mac Lively
Venue: ACM SIGARCH Computer Architecture News (1988)

Expert systems have become very popular in recent years. But the forward-chaining production systems (PS) driving the expert systems have severe limitations when run on general-purpose computers. The Match phase of the Match-Act-Select cycle production systems execute is computationally expensive and creates a limitation in the performance the PS's can deliver. This paper examines the architecture of three computers (DADO2, NON-VON, and Production System Machine) designed to speed up the Match process by pattern matching many facts and rules in parallel. The speeds of the designs are compared and the systems are analyzed to determine how suitable they are for use in the commercial environment.
The VMP network adapter board (NAB): high-performance network communication for multiprocessors
Authors: H. Kanakia, D. Cheriton
Venue: Symposium proceedings on Communications architectures and protocols (1988)

High performance computer communication between multiprocessor nodes requires significant improvements over conventional host-to-network adapters. Current host-to-network adapter interfaces impose excessive processing, system bus and interrupt overhead on a multiprocessor host. Current network adapters are either limited in function, wasting key host resources such as the system bus and the processors, or else intelligent but too slow, because of complex transport protocols and because of an inadequate internal memory architecture. Conventional transport protocols are too complex for hardware implementation and too slow without it. In this paper, we describe the design of a network adapter board for the VMP multiprocessor machine that addresses these issues. The adapter uses a host interface that is designed for minimal latency, minimal interrupt processing overhead and minimal system bus and memory access overhead. The network adapter itself has a novel internal memory and processing architecture that implements some of the key performance-critical transport layer functions in hardware. This design is integrated with VMTP, a new transport protocol specifically designed for efficient implementation on an intelligent high-performance network adapter. Although targeted for the VMP system, the design is applicable to other multiprocessors as well as uni-processors.
The Computer Spectrum: A Perspective on the Evolution of Computing
Venue: Computer (1989)

A report from the IEEE Scientific Supercomputer Subcommittee traces and analyzes the evolution of computer classes and offers near-term projections. It examines business and scientific computers, the emergence of new classes, the supercomputer and the minicomputer, the evolution of the supercomputer, the emergence of the minisupercomputer, and the personal computer and the applications workstation. It provides a historical analysis of these trends and discusses the lack of comparable software developments.
An integrated toolset for engineering software configurations
Authors: Axel Mahler, Andreas Lampen
Venue: Proceedings of the third ACM SIGSOFT/SIGPLAN software engineering symposium on Practical software development environments (1989)

Configuration management in toolkit oriented software development environments (SDE), such as the UNIX system, is a long standing nuisance. Mostly, one has to face the choice between poorly or not at all integrated, independent tools, or highly integrated, most specialized, and often language dependent environments. The first choice offers very limited support for a complex task that needs a broad informational basis. The second choice often takes away the programmers' most cherished tools, forces him to adopt some different work discipline, and thereby eventually restricts his creativity. The toolset described in this paper integrates a dedicated version control system and shape, a significantly enhanced Make [Feld79a] program, on the basis of a common object model. This object model comprises multiple versions of software objects as well as conventional file system objects. Taking this approach made it possible to have a sufficiently integrated toolsystem for engineering software configurations while retaining the flexibility of the basic toolbox philosophy, permitting the use of 'off-the-shelf' tools, e.g. editors or compilers.
Calibrating a Cartesian Robot with Eye-on-Hand Configuration Independent of Eye-to-Hand Relationship
Authors: R. K. Lenz, R. Y. Tsai
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1989)

A new approach is described for geometric calibration of Cartesian robots. This is part of a set of procedures for real-time 3-D robotics eye, eye-to-hand, and hand calibration which uses a common setup and calibration object, common coordinate systems, matrices, vectors, symbols, and operations and is especially suited to machine vision systems. The robot makes a series of automatically planned movement with a camera rigidly mounted at the gripper. At the end of each move, it takes a total of 90 ms to grab an image, extract image feature coordinates, and perform camera-extrinsic calibration. After the robot finishes all the movements, it takes only a few milliseconds to do the calibration. The key of this technique is that only one rotary joint is moving for each movement. This allows the calibration parameters to be fully decoupled, and converts a multidimensional problem into a series of one-dimensional problems. Another key is that eye-to-hand transformation is not needed at all during the computation.
Special purpose architecture for accelerating Bitmap DRC
Authors: N. B. Bhat, S. K. Nandy
Venue: Proceedings of the 26th ACM/IEEE Design Automation Conference (1989)

In this paper we propose algorithms for performing DRC on a bitmapped layout and develop special purpose architecture for its implementation. We use window scan method, with flexible window size, reduce redundant pixel processing in a window unlike that in [5].
Multiparty unconditionally secure protocols
Authors: David Chaum, Claude Crépeau, Ivan Damgard
Venue: Proceedings of the twentieth annual ACM symposium on Theory of computing (1988)

Under the assumption that each pair of participants can communicate secretly, we show that any reasonable multiparty protocol can be achieved if at least 2n/3 of the participants are honest. The secrecy achieved is unconditional. It does not rely on any assumption about computational intractability.
A Checkpointing Page Store for Write-Once Optical Disk
Authors: Jason Gait
Venue: IEEE Transactions on Computers (1990)

A model paging system is described for write-once optical disk. The paging system checkpoints pages on a nonerasable, failure-resistant medium as a side effect of virtual memory operation. Most pages are already checkpointed at any given time. It is practicable to checkpoint the global state periodically by forcing the write-out of pages that have been modified since their last checkpoint, together with the page tables. The proposed checkpointing algorithm was simulated to evaluate the performance of paging and checkpoint to write-once optical disk. There are plausible values for the operating parameters that make the overhead of checkpointing negligible compared to paging. The lifetime of 1-GB write-once optical disk media used for paging and checkpointing can range up to three months under plausible operating conditions.
Temporal Petri Nets and Their Application to Modeling and Analysis of a Handshake Daisy Chain Arbiter
Authors: Ichiro Suzuki, Harngdar Lu
Venue: IEEE Transactions on Computers (1989)

A class of Petri nets called temporal Petri nets is introduced, in which timing constraints are represented by the operators of temporal logic. Due to the versatility of the temporal logic operations to express temporal assertions, temporal Petri nets can describe clearly and compactly causal and temporal relationships between the events of a system, including eventuality and fairness. The use of temporal Petri nets is illustrated with a nontrivial example of modeling and analysis of a handshake daisy-chain arbiter.
Dino: summary and examples
Authors: M. Rosing, R. B. Schnabel, R. Weaver
Venue: Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1 (1988)

Dino is a new language, consisting of high level modifications to C, for writing numerical programs on distributed memory multiprocessors. Our intent is to raise interprocess communication and process control to a higher and more natural level than using messages. We achieve this by allowing the user to define a virtual machine onto which data structures can be distributed. Interprocess communication is implicitly invoked by reading and writing the distributed data. Parallelism is achieved by making concurrent procedure calls. This paper provides a summary of the syntax and semantics of Dino, and illustrates its features through several sample programs. We also briefly discuss a prototype of the language we have developed using C++.
Affect-chaining and dependency oriented flow analysis applied to queries of programs
Authors: Mariam Kamkar, Nahid Shahmehri, Peter Fritzson
Venue: Proceedings of the 1988 ACM SIGSMALL/PC symposium on ACTES (1988)

Most of the work on static program flow analysis has been done in the context of code optimization. The situation is different for an application such as an interactive query tool for programmer support. Primarily this is because the information wanted is different from what is needed for optimization, but also because incremental flow analysis algorithms are much more relevant in this context. In this paper we introduce the concept of affect-chaining, which is the process of analysing flow of data between variables in a program. The objective is to help the user to better understand data flow and data dependencies in programs not only during design and coding but also during test, debugging and maintenance. We present both forward- and backward- versions of affect-chaining analysis together with efficient algorithms. A long term goal of the work presented in this paper is to combine results from static analysis of a program and information from the run-time state during execution of the same program. The idea is, that this combination will enable an interactive query tool to answer questions about possible reasons for unexpected program behavior, and also to inform about possible consequences of a program change which may be considered. Another goal is to develop better estimates of software complexity based on affect-chaining dependencies.
Flexi-View: a multi-dimensional data modeling system
Authors: E. S. Friis, J. A. Goldberg
Venue: ACM SIGAPL APL Quote Quad (1987)

This paper addresses the basic components of a system which facilitates the modeling of multi-dimensional data in terms of a relational database table. The name of the system is FLEXI-VIEW (XVU). FLEXI-VIEW is implemented in APL2 and runs on the IBM Virtual Machine/System Product (VM/SP) operating system. FLEXI-VIEW interfaces, via the auxiliary processors AP126 and AP127, to the Graphical Data Display Manager (GDDM) and the Structured Query Language Data System (SQL/DS). SQL is the centerpiece of the FLEXI-VIEW architecture. It was chosen in February of 1985 by the American National Standards Institute (ANSI) as the standard language for relational Data Base Management Systems (DBMS). In addition, IBM has chosen SQL as its strategic relational DBMS product. The Interactive Chart Utility (ICU) is invoked by FLEXI-VIEW to deliver full-screen graphics and business charts. ICU is a component of GDDM which is responsible for creating, managing, and delivering the system's full-screen panels. Each panel is programmed function (PF) key and window driven. VM/SP, APL2, SQL/DS, and GDDM/ICU are IBM Program Products.
Introduction to SIMAN
Authors: D. T. Sturrock, C. D. Pegden
Venue: Proceedings of the 21st conference on Winter simulation (1989)

This paper discusses the concepts and methods for simulating manufacturing systems using the SIMAN simulation language. SIMAN is a general purpose simulation language which incorporates special purpose features to greatly simplify and enhance the modeling of material handling components in a manufacturing system.
Approximate Throughput Analysis of Cyclic Queueing Networks with Finite Buffers
Authors: Raif O. Onvural, H. G. Perros
Venue: IEEE Transactions on Software Engineering (1989)

An approximation method for obtaining the throughput of cyclic queueing networks with blocking as a function of the number of customers in it is presented. The approximation method was developed for two different blocking mechanisms. It was also extended to the case of the central server model with blocking. Validation tests show that the algorithm is fairly accurate.
Combining Static Concurrency Analysis with Symbolic Execution
Authors: M. Young, R. M. Taylor
Venue: IEEE Transactions on Software Engineering (1988)

Static concurrency analysis detects anomalous synchronization patterns in concurrent programs, but may also report spurious errors involving infeasible execution paths. Integrated application of static concurrency analysis and symbolic execution sharpens the results of the former without incurring the full costs of the latter when applied in isolation. Concurrency analysis acts as a path selection mechanism for symbolic execution, while symbolic execution acts as a pruning mechanism for concurrency analysis. Methods of combining the techniques follow naturally from explicit characterization and comparison of the state spaces explored by each, suggesting a general approach for integrating state-based program analysis techniques in a software development environment.
Knowledge based system to diagnose faults in discrete event systems
Authors: Muralidhar Sitaram, George Ernst, John Marcuse
Venue: Proceedings of the 2nd international conference on Industrial and engineering applications of artificial intelligence and expert systems - Volume 1 (1989)

This paper describes a Fault Explanation System (FES) that aids in the diagnosis of failures in discrete event systems such as certain manufacturing processes. These systems are characterized by the use of programmable logic controllers (PLC) to control the systems. In addition PLC's also perform event logging. The event log (fault log) records exceptions which may be alarms, warnings or status reports. A major difficulty is that most of the alarms do not indicate real faults in the system; for example, a fault may cause an exception which indicates what the fault is, but this exception may also give rise to a number of other exceptions which are just side-effects. FES interprets and explains faults in the log based on a model provided by the ladder logic diagrams of the PLC. These explanations separate real exceptions from the kind of side-effects described above. Finally FES ranks explanations according to their plausibility.
Parametric Fourier image characterization toolkit
Authors: J. R. F. Alonso
Venue: ACM SIGAPL APL Quote Quad (1987)

A suite of APL programs is described for characterization of bounded images for on-line process control or for artificial intelligence recognition functions. Beginning with an acquired threshold and edge enhanced image, the programs: detect the edges and close all bounded areas in the image produce arrays with the (x,y) locations of the boundaries of each object (bounded area) in the field, allowing for touching, segmented, perforated, embedded objects (all reported as separate arrays of sequenced coordinate pairs) compress the image using a quad tree procedure for archival or legal purposes fit parametric polynomial, conventional Fourier or inner product-outer product - matrix inversion Fourier equations to the object boundaries, to any desired number of coefficient terms or number of boundary pixel points. displays results and analyses of degree of fit in a windowed environment performs accept-reject-identify checks by comparison of the calculated Fourier coefficients from &ldquo;perfect&rdquo; objects or from a CAD system database. The system is written in 500 lines of IBM APL/PC Version 2 for a PC/AT with 80287 co-processor, and it is presently being interfaced to Data Translation image grabber hardware and software, with 512x512 acquisition resolution. Parameterization fitting accuracy is increased by considering not pixel center coordinates but intersection of boundary regression lines with pixel boundaries. The user interface makes the suite of programs manageable by a competent technical user without programming or APL knowledge.
A proper extension of ML with an effective type-assignment
Authors: A. J. Kfoury, J. Tiuryn, P. Urzyczyn
Venue: Proceedings of the 15th ACM SIGPLAN-SIGACT symposium on Principles of programming languages (1988)

We extend the functional language ML by allowing the recursive calls to a function F on the right-hand side of its definition to be at different types, all generic instances of the (derived) type of F on the left-hand side of its definition. The original definition of ML does not allow this feature. This extension does not produce new types beyond the usual universal polymorphic types of ML and satisfies the properties already enjoyed by ML: the principal-type property and the effective type-assignment property.
Reconfiguration of VLSI/WSI Mesh Array Processors with Two-Level Redundancy
Authors: M. Wang, M. Cutler, S. Y. H. Su
Venue: IEEE Transactions on Computers (1989)

Reconfiguration schemes for replacing faulty cells (processing elements) with spare cells are introduced for massive parallel rectangular mesh array processors with fine-grained cells. The authors introduce the concept of two-level redundancy as an effective way of using redundant units to reduce the complexity of reconfiguration control circuitry, to limit the length of connecting wires after reconfiguration, and to increase the manufacturing yield and the operation reliability. An optimization technique for allocating the redundant cells into both levels is presented. The operational reliability and manufacturing yield of arrays with two-level redundancy are presented. The yield estimation problem is modeled by an occupancy problem in classical combinatorial analysis. Both distributed and clustered defects are taken into consideration in the yield estimation.
Interpolating polynomials from their values
Authors: Richard Zippel
Venue: Journal of Symbolic Computation (1990)

A fundamental technique used by many algorithms in computer algebrais interpolating polynomials from their values. This paper discusses two algorithms for solving this problem for sparse multivariate polynomials, an updated version of a probabilistic one and a new deterministic technique that uses some ideas due to Ben-Or and Tiwari (1988). In addition algorithms are presented for quickly finding points that are not zeroes of sparse multivariate polynomials-the zero avoidance problem.
A three-port/three-access register file for concurrent processing and I/O communication in a RISC-like graphics engine
Authors: M. L. Anido, D. J. Allerton, E. J. Zaluska
Venue: ACM SIGARCH Computer Architecture News (1989)

A novel method that provides extremely fast Input/Output (I/O) data transfer to a RISC-like graphics engine is presented. This method employs a combined two-port / two-access and a three-port / three-access register file used for concurrent processing and I/O data transfer. The three-port cell employed is only 25 % larger than the two-port cell, offering considerable advantages over alternative approaches, such as FIFOs or register banks. This paper discusses some methods that can provide highly fast I/O data transfer in parallel with execution and focuses on the design and implementation of the CMOS-2um register file employed. Index Terms - Computer Architecture, Reduced Instruction Set Computers, VLSI Design, Computer Image Generation, Interprocessor Communication.