ppxscal/embedding_network huggingface dataset:
Neural network simulation on shared-memory vector multiprocessors
Authors: C.-J. Wang, C.-H. Wu, S. Sivasindaram
Venue: Proceedings of the 1989 ACM/IEEE conference on Supercomputing (1989)

We simulate three neural networks on a vector multiprocrssor. The training time can be reduced significantly especially when the training data size is large. These three neural networks are: 1) the feedforward network, 2) the recurrent network and 3) the Hopfield network. The training algorithms are programmed in such a way to best utilize 1) the inherent parallelism in neural computing, and 2) the vector and concurrent operations available on the parallel machine. To prove the correctness of parallelized training algorithms, each neural network is trained to perform a specific function. The feedforward network is trained to perform the Fourier transform, the recurrent network is trained to predict the solution of a delay differential equation, the Hopfield network is trained to solve the traveling salesman problem. The machine we experiment with is the Alliant FX/80.
Higher-order unification revisited: Complete sets of transformations
Authors: Wayne Snyder, Jean Gallier
Venue: Journal of Symbolic Computation (1989)

In this paper, we reexamine the problem of general higher-order unification and develop an approach based on the method of transformations on systems of terms which has its roots in Herbrand's thesis, and which was developed by Martelli and Montanari in the context of first-order unification. This method provides an abstract and mathematically elegant means of analyzing the invariant properties of unification in various settings by providing a clean separation of the logical issues from the specification of procedural information. Our major contribution is three-fold. First, we have extended the Herbrand-Martelli-Montanari method of transformations on systems to higher-order unification and pre-unification; second, we have used this formalism to provide a more direct proof of the completeness of a method for higher-order unification than has previously been available; and, finally, we have shown the completeness of the strategy of eager variable elimination. In addition, this analysis provides another justification of the design of Huet's procedure, and shows how its basic principles work in a more general setting. Finally, it is hoped that this presentation might form a good introduction to higher-order unification for those readers unfamiliar with the field.
Effective group interactions: some aspects of group projects in computer science courses
Authors: G. L. Van Meer, C. D. Sigwart
Venue: ACM SIGCSE Bulletin (1989)

Having students work in groups in a computer science course is excellent preparation for the realities of the jobs thestudents are likely to be doing upon graduation. Most software systems are of a large enough size that it is not reasonable for one person to do. Hence team formation is the usual response to a problem that cannot be solved by one person.We have taught a number of group project courses in software engineering and systems analysis and design, and have discovered that an understanding of the specific interactions that occur in a group environment can be immeasurably helpful. The principles that follow [4, 5, 9, 10, 11, 12] apply to group projects generally.
Acyclic fork-join queuing networks
Authors: François Baccelli, William A. Massey, Don Towsley
Venue: Journal of the ACM (JACM) (1989)

In this paper the class of acyclic fork-join queuing networks that arise in various applications, including parallel processing and flexible manufacturing are studied. In such queuing networks, a fork describes the simultaneous creation of several new customers, which are sent to different queues. The corresponding join occurs when the services of all these new customers are completed. The evolution equations that govern the behavior of such networks are derived. From this, the stability conditions are obtained and upper and lower bounds on the network response times are developed. These bounds are based on various stochastic ordering principles and on the notion of association of random variables.
Language Constructs for Specifying Concurrency in CDL
Authors: R. K. Shyamsundar, J. W. Thatcher
Venue: IEEE Transactions on Software Engineering (1989)

A description is given of language constructs for specifying concurrency in CDL*. The main goals in designing the language have been: modular specification, data integrity, and expressiveness. The language constructs are presented, and it is shown through examples how the constructs mirror the goals. The major advantages of the constructs are as follows: (1) data integrity is achieved without resorting to mutual exclusion unnecessarily, (2) dynamic resource management is achieved safely guaranteeing the anonymity of the dynamically allocating resources, and (3) similar components can be packaged together without resorting to sequential access. Various features of the language are illustrated through examples. In short, the language provides a step towards integrating abstraction mechanisms and specification techniques. Some of the features in CDL* are compared to some of the features available in other languages, including distributed programming languages.
Node autonomy in distributed systems
Authors: H. Garcia Molina, B. Kogan
Venue: Proceedings of the first international symposium on Databases in parallel and distributed systems (2000)

The goal of this paper is to explore the notion of node autonomy in distributed computer systems. Some motivations for autonomy are exposed. Different facets of autonomy as well as relationships among them are discussed. Finally, we look into how autonomy affects other aspects of distributed computing, including timeliness, correctness, load sharing, data sharing, and data replication.
The program dependence web: a representation supporting control-, data-, and demand-driven interpretation of imperative languages
Authors: Karl J. Ottenstein, Robert A. Ballance, Arthur B. MacCabe
Venue: ACM SIGPLAN Notices (1990)

The Program Dependence Web (PDW) is a program representation that can be directly interpreted using control-, data-, or demand-driven models of execution. A PDW combines a single-assignment version of the program with explicit operators that manage the flow of data values. The PDW can be viewed as an augmented Program Dependence Graph. Translation to the PDW representation provides the basis for projects to compile Fortran onto dynamic dataflow architectures and simulators. A second application of the PDW is the construction of various compositional semantics for program dependence graphs.
CHI '88 Workshop on Real Time, decision support computer-human interaction
Authors: S. M. Jacobs
Venue: ACM SIGCHI Bulletin (1989)

The purpose of the CHI '88 Workshop on Real-Time, Decision Support Computer-Human Interaction was to cover issues facing users of crucial real-time, decision support computer systems such as air traffic control computers, tactical command and control systems, and missile warning computers.
Implementing functional programs on a hypercube multiprocessor
Authors: B. Goldberg, P. Hudak
Venue: Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1 (1988)

Alfalfa is an implementation of a functional language on the Intel iPSC multiprocessor. It is based on a heterogeneous abstract machine model consisting of both graph reduction and stack oriented execution. Alfalfa has two major components, a compiler and a run-time system. The source language, ALFL, contains no constructs that allow the programmer to specify parallelism or synchronization; thus it is the task of the compiler to detect the exploitable parallelism in a program. The run-time system supports dynamic scheduling, interprocessor communication, and storage management. A number of statistics gathered during execution are presented.
The Cydra 5 Departmental Supercomputer: Design Philosophies, Decisions, and Trade-Offs
Authors: B. Ramakrishna Rau, David W. L. Yen, Wei Yen, Ross A. Towie
Venue: Computer (1989)

The Cydra 5 is a heterogeneous multiprocessor system that targets small work groups or departments of scientists and engineers. The two types of processors are functionally specialized for the different components of the work load found in a departmental setting. The Cydra 5 numeric processor, based on a directed-data-flow architecture, provides consistently high performance on a broader class of numerical computations. The interactive processors offload all nonnumeric work from the numeric processor, leaving it free to spend all its time on the numeric application. The I/O processors permit high-bandwidth I/O transitions with minimal involvement from the interactive or numeric processors. The system architecture and data-flow architecture are described. The numeric processor decisions and tradeoffs are examined, and the main memory system is discussed. Some reflections on the design issues are offered.
The reconfigurable arithmetic processor
Authors: S. Fiske, W. J. Dally
Venue: Proceedings of the 15th Annual International Symposium on Computer architecture (1988)

The Reconfigurable Arithmetic Processor (RAP) is an arithmetic processing node for a message-passing, MIMD concurrent computer. It incorporates on one chip several serial, 64 bit floating point arithmetic units connected by a switching network. By sequencing the switch through different patterns, the RAP chip calculates complete arithmetic formulas. By chaining together its arithmetic units the RAP reduces the amount of off chip data transfer: in the examples we have simulated off chip I/O can often be reduced to 30% or 40% of that required by a conventional arithmetic chip. Simulations predict a peak performance of 20M Flops with 800Mbit/sec off chip bandwidth in a 2&mgr;m CMOS process.
On the nature and fuction of explanation in intelligent information retrieval
Authors: N. J. Belkin
Venue: Proceedings of the 11th annual international ACM SIGIR conference on Research and development in information retrieval (1988)

We discuss the complexity of explanation activity in human-human goal-directed dialogue, and suggest that this complexity ought to be taken account of in the design of explanation in human-computer interaction. We propose a general model of clarity in human-computer systems, of which explanation is one component. On the bases of: this model; of a model of human-intermediary interaction in the document retrieval situation as one of cooperative model-building for the purpose of developing an appropriate search formulation; and, on the results of empirical observation of human user-human intermediary interaction in information systems, we propose a model for explanation by the computer intermediary in information retrieval.
The performance of an object-oriented threads package
Authors: John E. Faust, Henry M. Levy
Venue: ACM SIGPLAN Notices (1990)

Presto is an object-oriented threads package for writing parallel programs on a shared-memory multiprocessor. The system adds thread objects and synchronization objects to C++ to allow programmers to create and control parallelism. Presto's object-oriented structure, along with its user-level thread implementation, simplifies customization of thread management primitives to meet application-specific needs. The performance of thread primitives is crucial for parallel programs with fine-grained structure; therefore, the principal objective of this effort was to substantially improve Presto's performance under heavy loads without sacrificing the benefits of its object-oriented interface. We discuss design and implementation issues for shared-memory multiprocessors, and the performance impact of various designs is shown through measurements on a 20-processor Sequent Symmetry multiprocessor.
Limits to the mechanization of the detailing step paradigm
Authors: C. J. Koomen
Venue: Proceedings of the 4th international software process workshop on Representing and enacting the software process (1988)

In this paper it is argued that complete formalization of design processes is impossible under the assumption of fully deterministic models of such design processes. It is argued that non-determinism is needed to allow the designer to come up with solutions for problems which could not have been derived from the initial assumptions using a deterministic problem solving method. Hence, views on the design process should be based on two principles: (1) the use of a formalism to enable a systematic capture and usage of design knowledge, and (2) the assumption of an underlying `noisy` mechanism.
GRASP: a grammar-based schematic parser
Authors: C. Bamji, J. Allen
Venue: Proceedings of the 26th ACM/IEEE Design Automation Conference (1989)

The process of verifying that a circuit's schematic netlist obeys a particular design methodology is formalized. Circuit correctness is tied to a rigorous set of context free grammar composition rules. These rules define how a small set of module symbols may be combined for circuits adhering to the design methodology. Schematic netlists are represented as graphs, and composition rules are defined as graph transformations akin to grammatical productions. Starting with a circuit netlist, a hierarchical parse tree that can demonstrate the wellformedness of the circuit is constructed. The procedure is hierarchical, incremental, and fast. GRASP operates one to two orders of magnitude faster than previous approaches.
The document management component of a multimedia data model
Authors: C. Damier, B. Defude
Venue: Proceedings of the 11th annual international ACM SIGIR conference on Research and development in information retrieval (1988)

We describe ESTRELLA a multimedia object oriented data model developed by MATRA. This model is based upon objects, classes (organized in a lattice) and functions (allow to dynamically implement operations on data and new data types). The valid states of the data base are described by a set of integrity constraints. We propose a document model capable to manage structured documents and to index them with a superimposed codes method. We present as well the associated data manipulation language with a navigational interface and content search operators
Strategies for decentralized resource management
Authors: M. Stumm
Venue: ACM SIGCOMM Computer Communication Review (1987)

Decentralized resource management in distributed systems has become more practical with the availability of communication facilities that support multicasting. In this paper we present several example solutions for managing resources in a decentralized fashion, using multicasting facilities. We review the properties of these solutions in terms of scalability, fault tolerance and efficiency. We conclude that decentralized solutions compare favorably to centralized solutions with respect to all three criteria.
Integrating desktop publishing into a systems analysis and design course
Authors: Donald L. Jordan
Venue: ACM SIGCSE Bulletin (1989)

This paper describes an experiment to incorporate the new Desktop Publishing technology into our traditional Systems Analysis and Design course. The experiment was first conducted during the Fall 1987 semester and is being repeated and expanded in the Spring 1988 term. The course is considered to be a Junior level Computer Science course. Desktop Publishing systems are sometimes hard to learn and use but are very powerful and flexible tools for developing system reference manuals that contain text, graphics, line art and images. It was difficult to determine the amount of time to spend on this topic and to place this material in its proper place in the course curriculum. Some of our experiences, both positive and negative, are reported for those responsible for conducting similar courses and may be interested in implementing this new technology.
Loop optimization in register-transfer scheduling for DSP-systems
Authors: G. Goossens, J. Vandewlle, H. De Man
Venue: Proceedings of the 26th ACM/IEEE Design Automation Conference (1989)

In this paper, we discuss a control-flow transformation called loop folding, during the scheduling of register-transfer code for DSP-systems. Loop folding is functionally equivalent to data-path pipelining. An iterative loop-folding procedure, implemented in the CATHEDRAL II compiler, is presented. This technique may significantly improve the utilization of parallel hardware, available in a data path.
A model for predicting and evaluating computer resource consumption
Authors: Niv Ahituv, Magid Igbaria
Venue: Communications of the ACM (1988)

Evaluation and prediction of computer resource consumption can aid in the determination of computer selection and configuration planning as well as in the usefulness and maintenance of existing systems. The model presented can be used in a "What If" mode to make these determinations.
A Data-Driven Intermediate Level Feature Extraction Algorithm
Authors: D. S. Chen
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1989)

An algorithm is presented that is based on the regression updating theory for fitting linearly parameterizable curves without prior classification of edge data. An initial estimate of a hypothesized curve is first obtained by a statistical windowing technique. A search region is determined and iteratively grown. Edge points in the search region are tested for their goodness-of-fit to the previous estimate. The estimate is iteratively updated with the edge points that have favorable goodness-of-fit measures. The edge points having poor goodness-of-fit measures are rejected as outliers. The algorithm drives the estimate to converge to a final solution. By repeatedly applying this procedure to the edge data excluded from the previous fitting, all the underlying curves are reconstructed. The major feature that distinguishes this approach from that of others is that classifying the edge data prior to fitting is not required. Advantages of this algorithm are: (1) the fitting procedure achieves higher robustness and accuracy by dynamically analyzing the data consistency; (2) the computational complexity increases only linearly with the number of edge data; (3) the algorithm readily extends to reconstruct surfaces from range data. Thus the algorithm provides a powerful technique enabling a data-driven intermediate-level vision module to extract parametric features needed for higher-level processing.
High level knowledge sources in usable speech recognition systems
Authors: S. L. Young, A. G. Hauptmann, W. H. Ward, E. T. Smith, P. Werner
Venue: Communications of the ACM (1989)

The authors detail an integrated system which combines natural language processing with speech understanding in the context of a problem solving dialogue. The MINDS system uses a variety of pragmatic knowledge sources to dynamically generate expectations of what a user is likely to say.
Simulation of a market model for distributed control
Authors: Ross A. Gagliano, Martin D. Fraser, Mark E. Schaefer
Venue: Proceedings of the 21st annual symposium on Simulation (1988)

Decentralized control in the allocation of computing resources to tasks in a multiprocessing environment is designed using a general concept of a market. Two different market models are developed: auction and barter. In both cases, the tasks compete among themselves for computing resources rather than having them assigned by a host. Definite relationships between market strategy and system performance were found. Moreover, the results varied with machine configuration and appear applicable to systems of distributed control.
High-level graphical user interface management in the FACE synthesis environment
Authors: M. Dragomirecky, E. P. Glinert, J. R. Jasica, D. A. Duff, W. D. Smith, Manuel A. d'Abreu
Venue: Proceedings of the 26th ACM/IEEE Design Automation Conference (1989)

We discuss the design and implementation of VISAGE, an object-oriented user interface framework that is part of GE's FACE Flexible Architecture Compiler Environment [1]. High-level services include a domain-independent graph editor that provides standard methods for viewing and editing hierarchical graphs, including graph layout. Editors that are customized to a specific application are built by inheritance of the domain-independent graph editor's functionality and overloading of the display, selection and editing methods. At a lower layer, presentation objects are responsible for parsing user input, displaying application output, providing mouse sensitivity and command dialogue execution. These presentation objects separate the application from its user interface, and thus promote system modularity.
The real-time operating system of MARS
Authors: A. Damm, J. Reisinger, W. Schwabl, H. Kopetz
Venue: ACM SIGOPS Operating Systems Review (1989)

This paper gives a short overview of the architecture of the distributed real-time system MARS (MAintainable Real-Time System) and describes the design and implementation of its operating system. The main purpose of the MARS kernel is to achieve a timely execution of hard real-time tasks and to provide an efficient communication mechanism suitable for distributed real-time systems.
A framework for construction and evaluation of high-level specifications for program analysis techniques
Authors: G. A. Venkatesh
Venue: ACM SIGPLAN Notices (1989)

Abstract interpretation introduced the notion of formal specification of program analyses. Denotational frameworks are convenient for reasoning about such specifications. However, implementation considerations make denotational specifications complex and hard to develop. We present a framework that facilitates the construction and understanding of denotational specifications for program analysis techniques. The framework is exemplified by specifications for program analysis techniques from the literature and from our own research. This approach allows program analysis techniques to be incorporated into automatically generated program synthesizers by including their specifications with the language definition.
On the synthesis of a reactive module
Authors: A. Pnueli, R. Rosner
Venue: Proceedings of the 16th ACM SIGPLAN-SIGACT symposium on Principles of programming languages (1989)

We consider the synthesis of a reactive module with input x and output y, which is specified by the linear temporal formula @@@@(x, y). We show that there exists a program satisfying @@@@ iff the branching time formula (&forall;x) (&exist;y) A@@@@(x, y) is valid over all tree models. For the restricted case that all variables range over finite domains, the validity problem is decidable, and we present an algorithm for constructing the program whenever it exists. The algorithm is based on a new procedure for checking the emptiness of Rabin automata on infinite trees in time exponential in the number of pairs, but only polynomial in the number of states. This leads to a synthesis algorithm whose complexity is double exponential in the length of the given specification.
On the isomorphism problem for finite-dimensional binomial algebras
Authors: K. Shirayanagi
Venue: Proceedings of the international symposium on Symbolic and algebraic computation (1990)

Binomial algebras are finitely presented algebras defined by monomials or binomials. Given two binomial algebras, one important problem is to decide whether or not they are isomorphic as algebras. We study an algorithm for solving this problem, when both algebras are finite-dimensional over a field. In particular, when they are monomial algebras (i.e. binomial algebras defined by monomials only), the problem has already been completely solved by the presentation uniqueness. In this paper, we provide some necessary conditions in terms of partially ordered sets for two certain binomial algebras to be isomorphic. In other words, invariants of the binomial algebras are presented. These conditions together serve as an effective procedure for solving the isomorphism problem.