ppxscal/embedding_network huggingface dataset:
Study on the Simulation Method for Universal Serial Bus 2.0 Hard Design Based on SmartModel
Authors: BAI Xiaoping, CHEN Guican, WEI Yuanfeng
Venue: Proceedings of the Second International Conference on Systems (2007)

Universal Serial Bus 2.0 is a kind of new interface technology. It has virtues of high speed, using easily, hot Plug and Play, low-cost, and etc. So it was widely used in all kind of instrumentations and devices, which include personal computers, digital cameras, scanners, joysticks, magnetic tapes, floppy drives, image devises, printers, keyboards, mice, and etc. Universal Serial Bus 2.0 systems consist of USB host control chip and equipment interface control chip, i.e. peripheral device chip. The host control chip was usually integrated in the chip groups of personal computer, its function is single, and some large chip group manufacturers often control its technologies. Therefore the traditional USB developing is only to develop USB peripheral devices, USB peripheral device chips are involved with FIFO and FIFO controller, Direct Memory Access Controller (DMAC), Serial Interface Engine (SIE), USB2.0 Transceiver Macrocell Interface (UTMI), and etc. These peripheral devices are connected with USB host to achieve all kinds of transactions disposing of USB 2.0. On developing USB2.0 peripheral device IP core, how to test and verify the correctness of verilog HDL codes of these designed peripheral device chips is a problem that must be solved. Combining with actual project, this paper presents a set of detailed methods which make use of SmartModel tool and some developed tasks to design a test and simulation system for USB2.0 peripheral devices IP core, proponed methods were involved with circumstance setup, command use, test module design, all kinds of transactions disposing such as IN type, OUT type, SETUP type, SOF type, additional tasks developing, and etc. Simulation results show these methods are valid, so can offer the reference for development of USB2.0 system in all kinds of instrumentations and devices.
Bridging local and wide area networks for overlay distributed file systems
Authors: Michael Closson, Paul Lu
Venue: Proceedings of the 2nd conference on Real, Large Distributed Systems - Volume 2 (2005)

In metacomputing and grid computing, a computational job may execute on a node that is geographically far away from its data files. In such a situation, some of the issues to be resolved are: First, how can the job access its data? Second, how can the high latency and low bandwidth bottlenecks of typical wide-area networks (WANs) be tolerated? Third, how can the deployment of distributed file systems be made easier? The Trellis Network File System (Trellis NFS) uses a simple, global namespace to provide basic remote data access. Data from any node accessible by Secure Copy can be opened like a file. Aggressive caching strategies for file data and metadata can greatly improve performance across WANs. And, by using a bridging strategy between the well-known Network File System (NFS) and wide-area protocols, the deployment is greatly simplified. As part of the Third Canadian Internetworked Scientific Supercomputer (CISS-3) experiment, Trellis NFS was used as a distributed file system between high-performance computing (HPC) sites across Canada. CISS-3 ramped up over several months, ran in production mode for over 48 hours, and at its peak, had over 4,000 jobs running concurrently. Typically, there were about 180 concurrent jobs using Trellis NFS. We discuss the functionality, scalability, and benchmarked performance of Trellis NFS. Our hands-on experience with CISS and Trellis NFS has reinforced our design philosophy of layering, overlaying, and bridging systems to provide new functionality.
A Certified Thread Library for Multithreaded User Programs
Authors: Yu Guo, Xinyu Jiang, Yiyun Chen, Chunxiao Lin
Venue: Proceedings of the First Joint IEEE/IFIP Symposium on Theoretical Aspects of Software Engineering (2007)

Ensuring the safety of multithreaded software is a task both important and challenging. Currently, most ap- proaches focus on the safety of multithreaded programs rather than the runtime based on which those concurrent programs run. In order to fundamentally solve this problem, a method of ensuring the safety of the runtime should be de- veloped. Such a runtime could be organized as a thread library typically. This paper presents the development and certification of a simple but realistic thread library. The thread library provides common multi-threading features such as dynamic thread creation, termination and joining as well. This li- brary also carries machine-checkable proof which guaran- tees the library does not violate the safety policies. This paper also presents an approach to link the library to exist- ing certified multithreaded user programs to form an inte- grated foundational proof-carrying code (FPCC) package. Comparing with the uncertified libraries, our work makes multithreaded applications much more reliable.
Optimal communication scheduling based on collision graph model
Authors: D. R. Surma
Venue: Proceedings of the Acoustics, Speech, and Signal Processing, 1996. on Conference Proceedings., 1996 IEEE International Conference - Volume 06 (1996)

While research on the static scheduling of computational tasks for parallel systems has been ongoing for years, most work does not consider the communication costs nor does it consider the network congestion. A new static scheduling technique is presented which focuses on the communication overhead inherent in parallel processing systems. This paper builds a framework based on a newly developed graph model called a collision graph to study this problem. Using this model, algorithms are developed which can be embedded into existing static scheduling methods to improve their performance. The scheduling of cyclic data flow graphs was shown to be improved significantly as this technique was applied to the cyclo-compaction scheduling algorithm.
Channel Adaptive Multi-User Scalable Video Streaming with Unequal Erasure Protection
Authors: Hassan Mansour, Vikram Krishnamurthy, Panos Nasiopoulos
Venue: Proceedings of the Eight International Workshop on Image Analysis for Multimedia Interactive Services (2007)

In this paper, we propose a solution to the problem of streaming multiple video sequences in a capacity constrained, error-prone network. This scenario arises in situations such as multiple mobile computers accessing streamed video through a single access point, or multiple cell phone users serviced by a single base-station. Our approach constitutes a rate-constrained distortion-minimized streaming scheme to allocate the appropriate rate for each video stream that achieves minimal distortion without violating the capacity constraint. Moreover, we developed an unequal erasure protection (UXP) scheme that minimizes the protected bitstream rate and the expected packet loss probability for each video frame. Performance evaluations show that this approach delivers an improved decoded video quality and fairer rate-allocation when compared with standard UXP and rateallocation schemes, specifically in limited capacity and congested channels.
Wireless mac layer flexibility for extending effective system lifetime
Authors: Carla Schlatter Ellis
Venue:  (2006)

The scenario of wireless devices deployed in an ad hoc network is a compelling one. For the system to support its assigned tasks, nodes must cooperate to forward data packets through the network. The act of forwarding, however, is directly linked to node lifetime. The more a node forwards data packets, the sooner it depletes its battery through use of its high energy-consuming radio. Once forwarding nodes deplete their batteries, the network may partition and fail to provide its designated services. To reduce the burden on nodes maintaining network connectivity, we propose to balance energy consumption among all participating networked nodes, so they all fail at approximately the same time. We do this through our Medium Access Control (MAC) layer protocol, SEESAW, which offloads communication control overhead from heavily loaded nodes to more lightly loaded neighbors. SEESAW's unique combination of asynchrony, asymmetry and batching allow probabilistic communication with reliable delivery, while both reducing and balancing energy consumption. We present SEESAW and an accompanying online, distributed, self-tuning algorithm. We evaluate SEESAW through simulation using our detailed energy modeling simulator, SENSIM , and implementation on Mica2 Motes in TinyOS. Our results show S EESAW is competitive in terms of energy consumption and delivery performance with related protocols, despite additional overhead needed for an asynchronous and asymmetric protocol. Additionally, we show SEESAW successfully balances consumption among networked nodes while providing acceptable delivery performance with static random topologies and static, random, and bursty application workloads.
Corona: a high performance publish-subscribe system for the world wide web
Authors: Venugopalan Ramasubramanian, Ryan Peterson, Emin Gün Sirer
Venue: Proceedings of the 3rd conference on Networked Systems Design & Implementation - Volume 3 (2006)

Despite the abundance of frequently changing information, the Web lacks a publish-subscribe interface for delivering updates to clients. The use of naïve polling for detecting updates leads to poor performance and limited scalability as clients do not detect updates quickly and servers face high loads imposed by active polling. This paper describes a novel publish-subscribe system for the Web called Corona, which provides high performance and scalability through optimal resource allocation. Users register interest in Web pages through existing instant messaging services. Corona monitors the subscribed Web pages, detects updates efficiently by allocating polling load among cooperating peers, and disseminates updates quickly to users. Allocation of resources for polling is driven by a distributed optimization engine that achieves the best update performance without exceeding load limits on content servers. Large-scale simulations and measurements from PlanetLab deployment demonstrate that Corona achieves orders of magnitude improvement in update performance at a modest cost.
Sequence analysis on a 216-processor beowulf cluster
Authors: Katerina Michalickova, Moyez Dharsee, Christopher W. V. Hogue
Venue: Proceedings of the 4th annual Linux Showcase & Conference - Volume 4 (2000)

In this work we describe the implementation of a 216-processor Beowulf cluster with switched gigabit Ethernet networking. This design includes the use of a 8-CPU high performance midrange computer with 8 gigabit ports as a cluster head, a design that limits I/O contention. We have been developing applications software for bioinformatics research in protein folding, as well as the MoBiDiCK system for managing cluster applications that is extensible to general purpose distributed computing. In addition to the cluster architecture, we present a new cluster application for bioinformatics, a variant of the BLAST family of sequence comparison programs. MOBLAST performs the BLAST algorithm in an exhaustive manner, avoiding its initial heuristic approach to finding hits. This effectively slows BLAST down to approach the speed of other comprehensive search methods such as a Smith-Waterman alignment. MOBLAST requires a sizeable cluster to run. We describe the development of MOBLAST and its use in making an exhaustive M×N database of alignments where M is the set of protein sequences with known 3-D structures, and N is the set of all protein sequences. This M×N database of protein alignments will facilitate further research in protein folding, the ultimate aim of our work with Beowulf cluster technology. Furthermore, we describe a general algorithm for partitioning M×N problems and implement this in the MoBiDiCK computing model.
Minitack Introduction: Cross-cultural Issues in Collaboration Technology
Authors: Dongsong Zhang, Doug Vogel, Paul Benjamin Lowry
Venue: Proceedings of the 40th Annual Hawaii International Conference on System Sciences (2007)

As globalization increases, firms that rely on intellectual assets have realized that their competitive advantage depends on the development and effective use of collaboration technologies. Today, teams within or across organizations often consist of individuals with diverse cultural backgrounds and skills, creating a pressing need to better understand how the interplay of culture and collaboration technology can influence group processes and outcomes. At its most basic level, culture is conceptualized as shared symbols, norms, and values in a social collectivity. Culture plays an important role in group interaction and collaboration because it has direct impact on individual behavior and cultural manifestations. Culture directly affects interpersonal communication, influencing situational factors of communication, self-conception, verbal and nonverbal communication, and interpersonal relationships, as well as affects how people use products and information technologies. Prior studies on culture and technology have shown that the beliefs and values shared by group members affect their behavior in a variety of ways that can either accelerate or retard the implementation and adoption of technology.
A new approach for block-floating-point arithmetic
Authors: S. Kobayashi
Venue: Proceedings of the Acoustics, Speech, and Signal Processing, 1999. on 1999 IEEE International Conference - Volume 04 (1999)

A new approach for implementing block-floating-point arithmetic is proposed. This approach intends to preserve the least-significant-bits (LSBs) to improve signal processing quality. The preservation of LSBs is automatically and perfectly done by hardware. Several simulation results of the proposed block-floating-point implementation have shown improved SNRs over conventional block-floating-point implementation as expected. For the same number of bits for each data representation in the memory, the SNRs better than floating-point are also observed.
Modular Multiplication using Redundant Digit Division
Authors: Ping Tak Peter Tang
Venue: Proceedings of the 18th IEEE Symposium on Computer Arithmetic (2007)

Most implementations of the modular exponentiation, ME mod N, computation in cryptographic algorithms employ Montgomery multiplication, ABR-1 mod N, instead of modular multiplication, AB mod N, even the former requires some transformational overheads. This is so because a state-of-the-art Montgomery multiplication implementation has a performance advantage over direct modular multiplication based on the Barrett algorithm that more than compensates for the overhead. In this paper, we present a direct modular multiplication method that is comparable in speed to Montgomery multiplication. One consequence is that when the exponent in small, direct computation (which does not incur the transformational overhead) using the modular multiplication algorithm presented here results in practical performance gain. For the exponent 17, for instance, which requires five modular multiplication, a saving of up to 40% can be achieved.
Discriminative semi-parametric trajectory model for speech recognition
Authors: K. C. Sim, M. J. F. Gales
Venue: Computer Speech and Language (2007)

Hidden Markov models (HMMs) are the most commonly used acoustic model for speech recognition. In HMMs, the probability of successive observations is assumed independent given the state sequence. This is known as the conditional independence assumption. Consequently, the temporal (inter-frame) correlations are poorly modelled. This limitation may be reduced by incorporating some form of trajectory modelling. In this paper, a general perspective on trajectory modelling is provided, where time-varying model parameters are used for the Gaussian components. A discriminative semi-parametric trajectory model is then described where the Gaussian mean vector and covariance matrix parameters vary with time. The time variation is modelled as a semi-parametric function of the observation sequence via a set of centroids in the acoustic space. The model parameters are estimated discriminatively using the minimum phone error (MPE) criterion. The performance of these models is investigated and benchmarked against a state-of-the-art CUHTK Mandarin evaluation systems.
Some advances in cognitive informatics
Authors: W. Kinsner
Venue: Proceedings of the Fourth IEEE International Conference on Cognitive Informatics (2005)

This paper summarizes a few recent developments in cognitive informatics, with special emphasis on signal processing for autonomic computing and its metrics.
New directions in sampling and multi-rate A-D conversion via number theoretic methods
Authors: S. D. Casey
Venue: Proceedings of the Acoustics, Speech, and Signal Processing, 2000. on IEEE International Conference - Volume 01 (2000)

Number theoretic methods have been used in the study of harmonic analysis to extend existing theories and develop new approaches to both theoretical and applied problems. A specific example of this approach is in the development of sampling theory on non-commensurate lattices. We will construct examples of these lattices, and use a generalization of B.Ya. Levin's (1996) sine-type functions to develop interpolating formulae on these lattices. We then consider application of these new sampling results to multi-rate A-D conversion.
Recfec: a reconfigurable forward error correction engine
Authors: Nader Bagherzadeh
Venue:  (2006)

Reconfigurable architectures customize the same piece of silicon for multiple applications. While general purpose processors could not meet the high processing requirements of many new applications, traditional custom ASIC dominates the design space. In wireless communication a DSP processor is typically responsible for low data rate signal processing and is coupled with customized silicon to perform the medium and high data rate processing. The main drawback of a custom design is its long and costly design cycle which requires high initial investment. Typically the time-to-market of custom designs are slow and lack flexibility and programmability resulting in frequent design changes and tape-outs for emerging and developing standards. Reconfigurable architectures, on the other hand, are flexible and convenient, factors that could significantly shorten the design cycle of new products and even extend the life cycle of existing technologies. Tracking new standards is simplified to software upgrades which could even be performed on-the-fly. One of the challenging applications of a reconfigurable architecture is channel coding. Almost any digital communication system benefits from at least one form of Forward Error Correction (FEC) codes. There are four types of coding typically employed in wireless and wired communications: Convolutional, Turbo, Reed-Solomon and LDPC coding. However, multiple variations and configurations of coding algorithms are mandated in different standards. For example, the Turbo code used in W-CDMA standard has a different polynomial, block size, rate and termination scheme from that used in WiMAX. Furthermore, the data rate and performance requirements are not the same. In practice, this translates to having a plurality of coding accelerators for different coding algorithms and configurations which is very common in industry. In traditional approach a separate coprocessor is employed for every FEC algorithm which results in having a number of accelerators for different FEC codes in a multi-standard mobile device. Unfortunately no single coprocessor is programmable enough to cover all existing configurations of even one FEC algorithm mandated in wireless standards. In this work we introduce RECFEC, a REConfigurable engine optimized for FEC algorithms. RECFEC combines the programmability of a DSP processor with the performance of dedicated hardware and is architected to enable effective software implementation of multiple FEC algorithms and swift switching between them. In this research the design of RECFEC architecture is presented and the implementation of four FEC decoders, Viterbi, Turbo, Reed-Solomon and LDPC is explored. Then a reconfigurable DSP processor called M2 is presented and its coupling with RECFEC to a proposed heterogeneous reconfigurable system as a Software Defined Ratio (SDR) platform is studied and case studies are made for implementation of W-LAN and DVB-T on this platform.
Adaptive threshold nonlinear algorithm for adaptive filters with robustness against impulse noise
Authors: S. Koike
Venue: Proceedings of the Acoustics, Speech, and Signal Processing, 1996. on Conference Proceedings., 1996 IEEE International Conference - Volume 03 (1996)

A new adaptation algorithm for adaptive filters is proposed, introducing "adaptive threshold" in the nonlinear correlation function. The adaptive threshold varies according to the long-term average of the error signal plus the additive noise, which makes the adaptive filtering system highly robust against sharp increase in the noise yet maintains the fast convergence and low residual error properties. Results of simulation and theoretical calculation prove the effectiveness of the proposed algorithm and its superiority to the conventional LMS algorithm in an impulse noise environment. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
Learning lessons from the common cold: How reducing parasite virulence improves coevolutionary optimization
Authors: J. Cartlidge, S. Bullock
Venue: Proceedings of the Evolutionary Computation on 2002. CEC '02. Proceedings of the 2002 Congress - Volume 02 (2002)

Inspired by the virulence of natural parasites, a novel approach is developed to tackle disengagement, a detrimental phenomenon coevolutionary systems sometimes experience. After demonstrating beneficial results in a simple model, minimum comparison sorting networks are coevolved, with results suggesting that moderating parasite virulence can help in practical problem domains.
A broadband application of memoryless narrowband GSC/NLMS adaptive beamformers
Authors: D. Peters
Venue: Proceedings of the Acoustics, Speech, and Signal Processing, 1999. on 1999 IEEE International Conference - Volume 05 (1999)

The adaptive performance of the normalized least mean-squares algorithm in the context of the generalized sidelobe canceller beamformer is considered. The implications of both the convergence behaviour and the misadjustment on various beamforming applications are discussed. In particular, an important case is identified for which there is near-instantaneous convergence. A misadjustment limit for which coherent post-processing is viable is also derived. Finally, a novel approach to coherent broadband beamforming is introduced and then tested via simulation. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
Evaluation of student design processes
Authors: J. B. Brockman
Venue: Proceedings of the 26th Annual Frontiers in Education - Volume 01 (1996)

In order to better understand how students design, a set of techniques have been developed for analyzing and criticizing design processes. As students complete design projects, data is collected on the methodologies that they follow. Using a variety of statistical and graphical tools, the data is then analyzed to profile how students spend their time during design and to identify those design practices that are most likely to be either problematic or successful. Results are provided from a series of experiments using these techniques in an introductory computer programming class.