ppxscal/embedding_network huggingface dataset:
Is Sometimes Ever Better Than Always?
Authors: David Gries
Venue:  (1978)

The "intermittent assertion" method for proving programs correct is explained and compared to the conventional axiomatic method. Simple axiomatic proofs of iterative algorithms that compute recursively defined functions, including Ackermann''s function, are given. A critical examination of the two methods leads to the opinion that the axiomatic method is preferable. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
An Argument for Simple COMA
Authors: Ashley Saulsbury, Tim Wilkinson, John Carter
Venue:  (1994)

We present design details and some initial performance results of a novel scalable shared memory multiprocessor architecture that incorporates the major strengths of several contemporary multiprocessor architectures while avoiding their most serious weaknesses. Specifically, our architecture design incorporates the automatic data migration and replication features of cache-only memory architecture (COMA) machines, but replaces much of the complex hardware of COMA with a software layer that manages page-grained cache space allocation, as found in distributed virtual shared memory (DVSM) systems. Unlike DVSM however, pages are sub-divided into cache-line sized blocks, and for shared pages the coherence of these blocks is maintained by hardware. Moving much of COMA''s hardware functionality to software simplifies the machine design and reduces development time, while supporting fine-grain coherence in hardware greatly decreases the impact of DVSM software overheads. We call the resulting hybrid hardware and software multiprocessor architecture Simple COMA. By allowing shared data to be replicated in a node''s main memory (in addition to its caches), the number of remote memory accesses is greatly reduced compared to a traditional cache coherent non-uniform memory access (CC-NUMA) architecture. Preliminary results indicate that despite the reduced hardware complexity and the need to handle allocation page faults in software, the performance of Simple COMA is comparable to that of more complex all-hardware designs.
Comments on a Draft Pascal Standard
Authors: Jorgen Steensgaard-Madsen
Venue:  (1979)

NO SUPPLIED
Performance of multistage ATM switch architectures under nonuniform bursty traffic
Authors: B. R. Collier, H. S. Kim
Venue: Proceedings of the Fourteenth Annual Joint Conference of the IEEE Computer and Communication Societies (Vol. 2)-Volume - Volume 2 (1995)

A technique for the efficient analysis of multistage ATM switch architectures is presented. It is flexible in that it permits arbitrary switching element sizes, a full range of hardware speedup and backpressure between stages. The arriving traffic is assumed to be bursty and the authors do not assume homogeneity of all traffic sources. The flow of cells through the network is approximated as a fluid process, yielding computational complexity that depends only on the representation of the arrival and departure processes of a queue, independent of the number of buffers. Simulation results verify the accuracy of this approach. Finally, the analysis is used to examine the effect of nonhomogeneous traffic, as well as to present a comparison of the various modes of operation and implementation parameters of the multistage switch, providing insights on design trade-offs.
Dreamweaver MX: Advanced PHP Web Development, 1 edition
Authors: Friends of Ed
Venue:  (2003)

:This book takes you from basic syntax through to developing full applications. Teaching you the basic functionality, then showing you how to use it in real-world examples. Two practical case studies are included: An on-line training log and a complete content management system
Finite element simulation of the cyclic behaviour of end-plate joints
Authors: S. Ádány, L. Dunai
Venue: Proceedings of the sixth conference on Computational structures technology (2002)

This paper deals with the finite element modelling and analysis of end-plate joints in steel frames, under monotonic and cyclic loading conditions. In the first part of the paper the main characteristics of possible computational models are summarised and discussed, including remarks on finitization possibilities, the applicable material models, non-linear solution algorithms, necessary verification procedure. The second part of the paper presents a set of numerical examples, demonstrating the process of systematic model verification on a shell finite element model for the cyclic analysis of bolted end-plate joints.
Specification of Performance Problems in MPI Programs with ASL
Authors: Thomas Fahringer, Michael Gerndt, Graham Riley Jesper, Larsson Träff
Venue: Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing (2000)

Performance analysis is an important step in tuning performance critical applications. It is a cyclic process of measuring and analyzing performance data, which is driven by the programmer's hypotheses on potential performance problems. Currently the programmer controls this process manually. The implicit knowledge applied in this cyclic process must be formalized in order to be reused in the automation of performance analysis tools. This article describes the performance property specification language ASL developed in the APART Esprit IV working group. ASL allows the specification of performance data via an object model and of performance properties via a specially designed notation. Performance bottlenecks can then be identified based on the specification since bottlenecks are viewed as performance properties with a huge negative impact. We present the ASL language in the context of MPI applications.
Performance of PVM with the MOSIX preemptive process migration scheme
Authors: A. Barak, A. Braverman, I. Gilderman, O. Laden
Venue: Proceedings of the 7th Israeli Conference on Computer-Based Systems and Software Engineering (1996)

With the increased interest in workstation networks for parallel and high performance computing it is necessary to reexamine the use of process migration algorithms, to improve the overall utilization of the system, to achieve high performance and to allow flexible use of idle workstations. Currently, almost all programming environments for parallel systems do not use process migration for task assignments. Instead, a static process assignment is used, with sub-optimal performance, especially when several users execute multiple processes simultaneously. The paper highlights the advantages of a process migration scheme for better utilization of the computing resources as well as to gain substantial speedups in the execution of parallel and multi-tasking applications. The authors executed several CPU and communication bound benchmarks under PVM, a popular programming environment for parallel computing that uses static process assignment. These benchmarks were executed under the MOSIX multicomputer operating system, with and without its preemptive process migration scheme. The results of these benchmarks prove the advantages of using preemptive process migrations. The paper begins with an overview of MOSIX, a multicomputer enhancement of UNIX that supports transparent process migration for load-balancing, and PVM. They then present the performance of the executions of the benchmarks. Their results show that in some cases the improvements in the performance of PVM with the MOSIX process migration can reach tens or even hundreds of percents.
The Coach''s Playbook
Authors: Jeffry M. Pickering, Dom Bhuphaibool, Joseph J. LaViola,  Jr., Nancy S. Pollard
Venue:  (1999)

This paper presents an electronic playbook (COACH) for football. COACH combines gestural input, two-dimensional (2D) simulation, and nivtnivhree-dimensional (3D) animation to help coaches instruct players in an effective manner before they take the field. This part of the football coaching process is well-suited for non-traditional interface technology, because it requires coaches to discuss dynamic, 3D scenarios while within a classroom setting. We present a 2D gestural interface that allows coaches to use standard diagrams and gestures to set up a play, modify that play, and display a 2D animation. In addition, we demonstrate a virtual environment that allows coaches and players to view a play from any point of view, including the first-person perspective of one of the players. We present the results of a formative user evaluation given to the Brown University football team''s coaching staff, and discuss what we have learned in developing an application to address this specific problem. Although the application focuses on football, we believe that the techniques described in this paper can be used to develop electronic playbooks for other team sports as well.
Tracking Frequent Traversal Areas in a Web Site via Log Analysis
Authors: Yuh-Chi Lin, Paul Hadingham
Venue: Proceedings of the Seventh International Conference on Parallel and Distributed Systems: Workshops (2000)

In this paper, we explore the problem of analyzing frequently traversed spots in a Web site. We first construct a support knowledge base from Web logs and formulate the problem of tracking frequent traversal areas as a problem of finding strongly connected components in a digraph. We successfully incorporated the tracking features into our test Web site. Our experiments show that our approach can be useful in the innovative applications such as Web promotion, banner ads, and Web content design in the electronic commerce.
Automatic Synthesis of Dynamic Fault Trees from UML System Models
Authors: Ganesh J. Pai, Joanne Bechta Dugan
Venue: Proceedings of the 13th International Symposium on Software Reliability Engineering (2002)

The reliability of a computer-based system may be as importantas its performance and its correctness of computation.It is worthwhile to estimate system reliability at theconceptual design stage, since reliability can influence thesubsequent design decisions and may often be pivotal formaking trade-offs or in establishing system cost. In thispaper we describe a framework for modeling computer-basedsystems, based on the Unified Modeling Language(UML), that facilitates automated dependability analysisduring design. An algorithm to automatically synthesizedynamic fault trees (DFTs) from the UML system model isdeveloped. We succeed both in embedding informationneeded for reliability analysis within the system model andin generating the DFT. Thereafter, we evaluate our approachusing examples of real systems. We analyticallycompute system unreliability from the algorithmically developedDFT and we compare our results with the analyticalsolution of manually developed DFTs. Our solutionsproduce the same results as manually generated DFTs.Keywords: Dynamic fault trees, Fault tree synthesis, Reliabilityanalysis, UML
On the Fractal Nature of WWW and Its Application to Cache Modeling
Authors: Virgilio Almeida, Adriana Oliveira
Venue:  (1996)

Abstract The World Wide Web (WWW or Web) is growing rapidly on the Internet. Web users want fast response time and easy access to a enormous variety of information across the world. Thus, performance is becoming a main issue in the Web. Fractals have been used to study fluctuating phenomena in many different disciplines, from the distribution of galaxies in astronomy to complex physiological control systems. The Web is also a complex, irregular, and random system. In this paper, we look at the document reference pattern at Internet Web servers and use fractal-based models to understand aspects (e.g. caching schemes) that affect the Web performance.
A Methodology for Architectural-Level Risk Assessment Using Dynamic Metrics
Authors: Sherif M. Yacoub, Hany H. Ammar, Tom Robinson
Venue: Proceedings of the 11th International Symposium on Software Reliability Engineering (2000)

Risk assessment is an essential process of every software risk management plan. Several risk assessment techniques are based on the subjective judgment of domain experts. Subjective risk assessment techniques are human intensive and error-prone. Risk assessment should be based on product attributes that we can quantitatively measure using product metrics.This paper presents a methodology for risk assessment at the early stages of the development lifecycle, namely the architecture level. We describe a heuristic risk assessment methodology that is based on dynamic metrics obtained from UML specifications. The methodology uses dynamic complexity and dynamic coupling metrics to define complexity factors for the architecture elements (components and connectors). Severity analysis is performed using Failure Mode and Effect Analysis (FMEA) as applied to the architecture simulation models.We combine severity and complexity factors to develop heuristic risk factors for the architecture components and connectors. Based on component dependency graphs - that were developed earlier for reliability analysis - and using analysis scenarios, we develop a risk assessment model and a risk analysis algorithm that aggregates risk factors of components and connectors to the architectural level.We show how to analyze the overall risk factor of the architecture as the function of the risk factors of its constituting components and connectors. A case study of a pacemaker is used to illustrate the application of the methodology.
Fast Algorithm for Computing Spectral Transforms of Boolean and Multiple-Valued Functions on Circuit Representation
Authors: René Krenz, Elena Dubrova, Andreas Kuehlmann
Venue: Proceedings of the 33rd International Symposium on Multiple-Valued Logic (2003)

In this paper we present a fast algorithm for computingthe value of a spectral transform of Boolean or multiple-valuedfunctions for a given assignment of input variables.Our current implementation is for arithmetic transform, becauseour work is primarily aimed at optimizing the performanceof probabilistic verification methods. However, thepresented technique is equally applicable for other discretetransforms, e.g. Walsh or Reed-Muller transforms. Previousmethods for computing spectral transforms used truthtables, sum-of-product expressions, or various derivativesof decision diagrams. They were fundamentally limited bythe excessive memory requirements of these data structures.We present a new algorithm that partitions the computationof the spectral transform based on the dominator relationsof the circuit graph representing the function to be transformed.As a result, the presented algorithm can handlelarger functions than previously possible.
Concrete Impact of Formal Verification on Quality in IP Design and Implementation
Venue: Proceedings of the 2nd International Symposium on Quality Electronic Design (2001)

The application of formal methods to the logic verification of electronic circuits is meant for increasing the coverage obtained by the traditional verification techniques. This concept is quite popular in the design community but requires some guidelines in order to be implemented. The purpose of this work is to show that the advantage of Equivalence Checking and Model Checking, by far the two more important techniques in Logic Formal Verification, resides in the capability of powerful and concise modeling of the environment driving the verification process and in the capability of concise description of the expected behavior; such characteristics often achieve exhaustiveness which is difficult to reach with other verification techniques. A unified vision of environment modeling in the combinational and sequential worlds is proposed; results of application of the underlying ideas are reported on real industrial cases. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
Automatic Test Generation using Checkpoint Encoding and Antirandom Testing
Authors: Huifang Yin, Zemen Lebne-Dengel, Yashwant K. Malaiya
Venue: Proceedings of the Eighth International Symposium on Software Reliability Engineering (1997)

The implementation of an efficient automatic test generation scheme for black-box testing is discussed. It uses checkpoint encoding and antirandom testing schemes. Checkpoint encoding converts test generation to a binary problem. The checkpoints are selected as the boundary and illegal cases in addition to valid cases to probe the input space. Antirandom testing selects each test case such that it is as different as possible from all the previous tests. The implementation is illustrated using benchmark examples that have been used in the literature. Use of random testing both with checkpoint encoding and without is also reported. Comparison and evaluation of the effectiveness of these methods is also presented. Implications of the observations for larger software systems are noted. Overall, antirandom testing gives higher code coverage than encoding random testing, which gives higher code coverage than pure random testing.
A cooperative congestion management scheme for switched high-speed networks
Authors: A. F. Lobo, A. S. Sethi
Venue: Proceedings of the 1996 International Conference on Network Protocols (ICNP '96) (1996)

In a wide-area network with high-speed links, congestion may lead to poor utilization and the degradation of the service provided to the users. This paper presents a cooperative congestion management scheme in which the intermediate nodes in the vicinity of a congested link share their resources to offload this link before packets are discarded. The scheme uses a progression of proactive control mechanisms on selected traffic bursts: from local rerouting, through upstream rerouting and quenching, to packet discarding. It complements existing open-loop mechanisms by allowing a more liberal packet admission while preserving the underlying switching architecture. The performance evaluation results obtained via simulation show that its implementation reduces the probability of packet discarding by an order of magnitude.
file di prova
Authors: enrico fisoni
Venue:  (1998)

prova, prova, prova, prova The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
Lecture notes on geometric evolution problems, distance function and viscosity solutions
Authors: Luigi Ambrosio
Venue:  (1997)

These notes are aimed to a self contained presentation of the applications of viscosity theory to geometric evolution problems. In particular, the notes are concerned with flow by mean curvature problems for surfaces of any dimension and codimension. In codimension one, several approches to this problem are compared: the level set approach, the barrier approach, the distance approach, the approximation by solutions of the reaction diffusion equation. A crucial role in the analysis of these connections is played by the distance function, the signed distance function and the squared distance functions, whose properties are analyzed with particular attention. EMAIL:: ian@microian.ian.pv.cnr.it
Formal derivation of concurrent assignements from scheduled single
Authors: Bjorn Lisper
Venue:  (1991)

Concurrent assignments are commonly used to describe synchronous parallel computations. We show how a sequence of concurrent assignments can be formally derived from the schedule of an acyclic single assignment task graph and a memory allocation. In order to do this we develop a formal model of memory allocation in synchronous systems. We use weakest precondition semantics to show that the sequence of concurrent assignments computes the same values as the scheduled single assignments. We give a lower bound on the memory requirements of memory allocations for a given schedule. This bound is tight: we define a class of memory allocations whose memory requirements always meets the bound. This class corresponds to conventional register allocation for DAGs and is suitable when memory access times are uniform. We furthermore define a class of simple ``shift register'''' memory allocation. These allocations have the advantage of a minimum of explicit storage control and they yield local or nearest-neighbour accesses in distributed systems whenever the schedule allows this. Thus, this class of allocations is suitable when designing parallel special-purpose hardware, like systolic arrays.
A Modified BFGS Method
Authors: Ai Liao
Venue:  (1993)

In this paper, we study the global convergence property of the modified BFGS update method proposed by Liao. We show that under certain circumstances this modified BFGS method corrects the eigenvalues better than BFGS does. Our numerical results support this claim and also indicate that the modified BFGS method may be competitive with the BFGS method in general. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
Automatic Sensor Configuration for Task-Directed Planning
Authors: Amy Briggs, Bruce R Donald
Venue:  (1994)

We consider the problem of planning the configuration of a sensor within the context of a robotic task. In this paper, we focus on geometrically specified tasks in the plane, and give algorithms for computing the regions from which an idealized point-and-shoot sensor can detect a polygonal robot. Our main algorithm allows sensor configurations from which the robot may be partially obstructed, and computes the regions from which the robot can be detected as it translates through the goal at a known orientation. This algorithm runs in time $O(kmn^{3}(n+m))$ for an environment of complexity $n$, a robot of complexity $m$, and a goal of complexity $k$. The regions constructed can be used by an active sensing system to configure sensors that are guaranteed to observe the robot as it enters the goal.
Self-Adaptive TDMA Protocols: A Learning-Automata-Based Approach
Authors: Georgios I. Papadimitriou, Andreas S. Pomportsis
Venue: Proceedings of the 7th IEEE International Conference on Networks (1999)

Due to its fixed assignment nature, the well-known TDMA protocol suffers from poor performance when the offered traffic is bursty. In this paper, a Learning-Automata-Based Time Division Multiple Access protocol, which is capable of operating efficiently under bursty traffic conditions, is introduced. According to the proposed protocol, the station which grants permission to transmit at each time slot is selected by means of learning automata. The choice probability of the selected station is updated by taking into account the network feedback information. The system which consists of the automata and the network is analyzed and it is proved that the choice probability of each station asymptotically tends to be proportional to the probability that this station is not idle. Thus, although there is no centralized control of the stations and the traffic characteristics are unknown and time-variable, each station tends to take a fraction of the bandwidth proportional to its needs. Furthermore, extensive simulation results are presented which indicate that the proposed protocol achieves a significantly higher performance than other well-known time division multiple access protocols when operating under bursty traffic conditions.
Flexible performance visualization of parallel and distributed applications
Authors: J. Chassin de Kergommeaux, B. de Oliveira Stein
Venue: Future Generation Computer Systems (2003)

Performance debugging of parallel and distributed applications can benefit from behavioral visualization tools helping to capture the dynamics of the executions of applications. The Pajé generic tool presented in this article provides interactive and scalable behavioral visualizations; because of its genericity, it can be used unchanged in a large variety of contexts.