ppxscal/embedding_network huggingface dataset:
Collocation software for second-order elliptic partial differential equations
Authors: E. N. Houstis, W. F. Mitchell, J. R. Rice
Venue: ACM Transactions on Mathematical Software (TOMS) (1985)

We consider the collocation method for linear, second-order elliptic problems on rectangular and general two-dimensional domains. An overview of the method is given for general domains, followed by a discussion of the improved efficiencies and simplifications possible for rectangular domains. A very-high-level description is given of three specific collocation algorithms that use Hermite bicubic basic functions, (1) GENCOL (collocation on general two-dimensional domains), (2) HERMCOL (collocation on rectangular domains with general linear boundary conditions), and (3) INTCOL (collocation on rectangular domains with uncoupled boundary conditions). The linear system resulting from INTCOL has half the bandwidth of that from HERMCOL, which provides substantial benefit in solving the system. We provide some examples showing the range of applicability of the algorithms and some performance profiles illustrating their efficiency. Fortran implementations of these algorithms are given in the companion papers [10, 11].
Development of a portable software product for library automation
Authors: A. M. Barnaud, Y. Le Borgne, B. Mailhol
Venue: Proceedings of the international conference on APL (1986)

This paper will demonstrate APL at work in the development of a major industrial software product designed for public library management. LIBRA was designed and developed to run on various computers under both VM/CMS and UNIX. Advanced software engineering methods were employed to facilitate short development time of a quality product. As a result, tight control over the future development and maintenance of the package was assured.
Using TEX for electronic publishing at I.P. Sharp Associates
Authors: David Manson
Venue: ACM SIGDOC Asterisk Journal of Computer Documentation (1987)

I.P. Sharp Associates has, for several years, been researching and developing systems for electronic publishing to meet needs internally as well as to provide the results to our customers, normally as part of a software system whose main function would be to do something other than text processing per se. We were seeking a system which had to:support a variety of input devices and output devices, from different vendors, and connected to different computers running under different operating systems, in different parts of the world---yet ensure that the output looked the same wherever it was produced. This is, incidentally, a non-trivial problem.
Refinement Methodology for Ada
Authors: V. Rajlich
Venue: IEEE Transactions on Software Engineering (1987)

This paper presents Refinement Methodology (RM) for the design of Ada® programs. The methodology combines stepwise refinement and the information hiding principle. The steps of the methodology are explained and illustrated by an example. A part of the methodology is a collection of rules by which procedures acquire parameters (called first and second rules for parameters).
The impact of VLSI on microprogramming
Authors: N. Tredennick
Venue: Proceedings of the 19th annual workshop on Microprogramming (1986)

There are four &ldquo;cultures&rdquo; of microprogramming: the Bit-Slice Culture, the Commercial Processor Culture, the Microprogrammable Processor Culture, and the Single-Chip Culture. The effect of trends in VLSI (Very Large Scale Integration) on microprogramming can be assessed by looking the effect on each culture. The Bit-Slice Culture will be affected because levels of integration in bipolar have reached 32-bit slices and the performance of CMOS is improving to compete with the dominant bipolar technologies in these applications. The Commercial Processor Culture and the Microprogrammable Processor Culture will be least affected by changes in Technology and integration levels. The Single-Chip Culture will be most affected. There are about two more microprocessor generations to go before chips contain an essentially complete CPU. After that, designs will diversify. Microprogramming still has a good future.
The Arpanet and computer networks
Authors: Larry Roberts
Venue: Proceedings of the ACM Conference on The history of personal workstations (1986)

In 1964 only large mainframe computers existed, each with its own separate set of users. If you were lucky the computer was timeshared, but even then you could not go far away since the terminals were hardwired to it or connected by local phone line. Moreover, if you wanted data from another computer you moved it by tape and you could forget wanting software from a different type of computer. Thus, most users were tied by their computer and terminal to a very restricted enviornment. Today, in 1985, your terminal could well be a microcomputer networked with a very large, worldwide collection of other computers. You can obtain data and software from all these computers relatively easily with room for improvement) or, where convenient, use the software and data on its home computer by remote access, computer to computer. This change, which has occurred over the past 20 years, is in part a massive and evolutionary change in computer technology, and in part a modest and revolutionary change in communications technology. The revolution in communications started with an experiment in computer networking, the ARPANET, and grew into a communications revolution called packet switching. Today virtually all the world is linked by packet switched communications service so that any terminal can access almost any computer in the world. This packet switched data network has grown up independent of the telephone network, but over the next 20 years the basic fabric supporting all switched services (data, telephone and video) appear likely to become converted to packet switching, completing the revolution.
NOOBIE: the animal design playstation
Authors: Allison Druin
Venue: ACM SIGCHI Bulletin (1988)

For a year and a half, I lead a group of researchers in building an alternative to the traditional computer terminal. Instead of building a design workstation complete with keyboard and mouse, we built an animal design playstation complete with fur, feathers, and an irridescent fish tail. We used the tools of puppetry, animation, and computer electronics, to build what is now called Noobie (short for "New Beast"). By sitting or standing in the lap of this computer creature, a child can build fantasy or real animals. When one squeezes a part on Noobie, the selected animal part can be seen on the screen in Noobie's stomach, and a sound can be heard.This paper documents the ideas behind the conception and creation of Noobie, along with how it fits into the short history of the Vivarium research group. This group is a collection of people, ideas, and projects that focus on creating a multi-media environment for children to learn about animal behavior.
Synchronizing clocks in the presence of faults
Authors: Leslie Lamport, P. M. Melliar-Smith
Venue: Journal of the ACM (JACM) (1985)

Algorithms are described for maintaining clock synchrony in a distributed multiprocess system where each process has its own clock. These algorithms work in the presence of arbitrary clock or process failures, including &ldquo;two-faced clocks&rdquo; that present different values to different processes. Two of the algorithms require that fewer than one-third of the processes be faulty. A third algorithm works if fewer than half the processes are faulty, but requires digital signatures.
Secure office management system: the first commodity application on a trusted system
Authors: L. J. Fraim
Venue: Proceedings of the 1987 Fall Joint Computer Conference on Exploring technology: today and tomorrow (1987)

The technology of trusted systems has advanced very rapidly during the past five years. The development of standards and product evaluations has raised industries awareness of the governments needs for trusted systems. A major weakness of trusted systems is the lack of application capabilities. The Honeywell SCOMP system is the only one to achieve the highest rating from the National Computer Security Center. Honeywell Federal Systems Inc. has implemented an integrated office management system called the Secure Office Management System. This system provides an effective solution for an office which requires processing information of various security aspects. The security and office capabilities of the system are presented along with a scenario for its use.
Cycle Structure of the DES for Keys Having Palindromic (or Antipalindromic) Sequences of Round Keys
Authors: Judy H. Moore, Gustavus J. Simmons
Venue: IEEE Transactions on Software Engineering (1987)

Certain DES keys have been called weak or semiweak based upon the number of distinct round keys which they produce. For the weak keys, all 16 round keys are identical and encryption is the same as decryption. For the semiweak keys, there are only two distinct round keys but no specific weakness of the DES with these keys has been demonstrated.
A sufficient condition for backtrack-bounded search
Authors: Eugene C. Freuder
Venue: Journal of the ACM (JACM) (1985)

Backtrack search is often used to solve constraint satisfaction problems. A relationship involving the structure of the constraints is described that provides a bound on the backtracking required to advance deeper into the backtrack tree. This analysis leads to upper bounds on the effort required for solution of a class of constraint satisfaction problems. The solutions involve a combination of relaxation preprocessing and backtrack search. The bounds are expressed in terms of the structure of the constraint connections. Specifically, the effort is shown to have a bound exponential in the size of the largest biconnected component of the constraint graph, as opposed to the size of the graph as a whole.
A computer-aided benchmarking system for parallel and expandable database computers
Authors: S. A. Demurjian, G. P. Fenton, D. K. Hsiao, J. R. Vincent
Venue: Proceedings of the 1987 Fall Joint Computer Conference on Exploring technology: today and tomorrow (1987)

In this paper a computer-aided benchmarking methodology for a new kind of database computers is introduced. The emergence of this new kind of parallel database computers (known as the multiple-backend database computers) in the research community and in the commercial world, where each computer system is configured with two or more identical processors and their associated stores for concurrent execution of transactions and for parallel processing of a centralized database spread over separate stores, is evident. The need and lack of a methodology for benchmarking the new database computer with a variable number of backends for the same database or with a fixed number of backends for different database capacities is pronounced. The measures (benchmarks) of the new database computer are articulated and established and the design of the methodology for conducting the measurements is then given in this paper. The computer-aided benchmarking system (CABS), which computerizes the benchmarking methodology for systematically assisting the design of test databases and test-transaction mixes, for automatically tallying the design data and workloads, and for completely generating the test databases and test-transaction mixes, is reported also herein.
A unified resource management and execution control mechanism for data flow machines
Authors: M. Takesue
Venue: Proceedings of the 14th annual international symposium on Computer architecture (1987)

This paper presents a unified resource management and execution control mechanism for data flow machines. The mechanism integrates load control, depth-first execution control, cache memory control and a load balancing mechanism. All of these mechanisms are controlled by such basic information as the number of active state processes, Na. In data flow machines, synchronization among processes is an essential hardware function. Hence, Na can easily be detected by the hardware. Load control and depth-first execution control make it possible to execute a program with a designated degree of parallelism, and depth-first order. A cache memory of data flow processors in multiprocessing environments can be realized by using load and depth-first execution controls together with a deterministic replacement algorithm, i.e. replacement of only waiting state processes. A new load balancing method called group load balancing is also presented to evaluate the above mentioned mechanisms in multiprocessor environments. These unified control mechanisms are evaluated on a register transfer level simulator for a list-processing oriented data flow machine.
Algebraic methods in the theory of lower bounds for Boolean circuit complexity
Authors: R. Smolensky
Venue: Proceedings of the nineteenth annual ACM symposium on Theory of computing (1987)

We use algebraic methods to get lower bounds for complexity of different functions based on constant depth unbounded fan-in circuits with the given set of basic operations. In particular, we prove that depth k circuits with gates NOT, OR and MODp where p is a prime require Exp(&Ogr;(n1/2k)) gates to calculate MODr functions for any r &ne; pm. This statement contains as special cases Yao's PARITY result [ Ya 85 ] and Razborov's new MAJORITY result [Ra 86] (MODm gate is an oracle which outputs zero, if the number of ones is divisible by m).
Compiling Prolog into microcode: a case study using the NCR/32-000
Authors: B. Fagin, Y. N. Patt, V. Srini, A. Despain
Venue: Proceedings of the 18th annual workshop on Microprogramming (1985)

A proven method of obtaining high performance for Prolog programs is to first translate them into the instruction set of Warren's Abstract Machine, or W-code [1]. From that point, there are several models of execution available. This paper describes one of them:- the compilation of W-code directly into the vertical microcode of a general purpose host processor, the NCR/32-000. The result is the fastest functioning Prolog system known to the authors. We describe the implementation, provide benchmark measurements, and analyze our results.
An improved parallel thinning algorithm
Authors: Christopher M. Holt, Alan Stewart, Maurice Clint, Ronald H. Perrott
Venue: Communications of the ACM (1987)

An iterative thinning algorithm reduces a two-dimensional pattern of strokes to its skeleton by removing layers of edge elements until each stroke has unit thickness. A parallel solution requires the independent calculation of new values for each iteration, using a window of nearest neighbors for each element. The traditional need for at least two subiterations can be avoided by modifying the window to permit the availability of intermediate calculations. Timings on an ICL DAP (an array processor) indicate an improvement of over 40 percent. Additional refinements are suggested to reduce noise in the final skeleton.
Adaptive exact-fit storage management
Authors: Rodney R. Oldehoeft, Stephen J. Allan
Venue: Communications of the ACM (1985)

Tested against extremes in the characteristics of arrival patterns to dynamic allocation software, the working-set approach outperforms the FIFO method except in the case of completely random request patterns&mdash;where the working-set method performs as well as the FIFO method.
On yield consideration for the design of redundant programmable logic arrays
Authors: C.-L. Wey
Venue: Proceedings of the 24th ACM/IEEE Design Automation Conference (1987)

This paper presents the design of a programmable logic array with redundancy. The design allows for the repair of a defective chip by including the redundancy circuits to a conventional PLA. When the redundancy technique is implemented into the VLSI or WSI chip design, the increased cost is proportional to the increased chip silicon area. Indeed, the additional spare lines may increase the silicon area and propagation delay. However, if the provided redundancy can be efficiently utilized to repair the defective chip, then the additional spare lines may increase rather decrease the chip yields. The objective of the present paper is to analyze the possibility of yield enhancement through redundant design.
GRAPE: An environment to build display processes
Authors: Tom Nadas, Alain Fournier
Venue: Proceedings of the 14th annual conference on Computer graphics and interactive techniques (1987)

New modelling primitives and new rendering techniques are appearing at a rapid rate. To be able to implement and evaluate them easily, we need a very flexible display environment. We describe an environment which allows experimenting both with the basic modelling and rendering operations and with the process structure of the display system.The desired operations are implemented in nodes, coded in a traditional programming language, which can then be structured into arbitrary directed acyclic graphs. These nodes are all "plug compatible", and pass streams of appels, which are generalized pixels, that is data structures containing information necessary for pixel evaluation. In addition, synchronization parameters are used to allow the expansion or the reduction of the stream of appels.This approach allows the assembly of new display systems from existing modules without coding, making it easy to experiment with different architectures and display processes. Algorithm designers are also able to test an algorithm at any point of the display process with a minimum of new coding.We describe an implementation of the scheme with a library of nodes written in C and the assembly of the graphs made through the use of the directory manipulation tools provided under UNIX trade;. We give examples of the uses of the implementation to build basic nodes, variations in compositing and texture mapping and special-purpose display systems.
Firefly: a multiprocessor workstation
Authors: Charles P. Thacker, Lawrence C. Stewart
Venue: ACM SIGARCH Computer Architecture News (1987)

Firefly is a shared-memory multiprocessor workstation that contains from one to seven MicroVAX 78032 processors, each with a floating point unit and a sixteen kilobyte cache. The caches are coherent, so that all processors see a consistent view of main memory. A system may contain from four to sixteen megabytes of storage. Input-output is done via a standard DEC QBus. Input-output devices are an Ethernet controller, fixed disks, and a monochrome 1024 x 768 display with keyboard and mouse. Optional hardware includes a high resolution color display and a controller for high capacity disks. Figure 1 is a system block diagram.The Firefly runs a software system that emulates the Ultrix system call interface. It also supports medium- and coarse-grained multiprocessing through multiple threads of control in a single address space. Communications are implemented uniformly through the use of remote procedure calls.This paper describes the goals, architecture, implementation and performance analysis of the Firefly. It then presents some measurements of hardware performance, and discusses the degree to which SRC has been successful in producing software to take advantage of multiprocessing.
REAL: a program for REgister ALlocation
Authors: F. J. Kurdahi, A. C. Parker
Venue: Proceedings of the 24th ACM/IEEE Design Automation Conference (1987)

This paper describes the REAL REgister ALlocation program. REAL uses a track assignment algorithm taken from channel routing called the Left Edge algorithm. REAL is optimal for non-pipelined designs with no conditional branches. It is thought that REAL is also optimal for designs with conditional branches, pipelined or not. Experimental results are included in the report, which illustrate the optimal solutions found by REAL. REAL is part of the ADAM Advanced Design AutoMation system, and will be used to process designs output from MAHA and Sehwa.
Processor Control Flow Monitoring Using Signatured Instruction Streams
Authors: Michael A. Schuette, John Paul Shen
Venue: IEEE Transactions on Computers (1987)

This paper presents an innovative approach, called signatured instruction streams (SIS), to the on-line detection of control flow errors caused by transient and intermittent faults. At compile time an application program is appropriately partitioned into smaller subprograms, and cyclic codes, or signatures, characterizing the control flow of each subprogram are generated and embedded in the object code. At runtime, special built-in hardware regenerates these signatures using runtime information and compares them to the precomputed signatures. A mismatch indicates the detection of an error. A demonstration system, based on the MC68000 processor, has been designed and built. Fault insertion experiments have been performed using the demonstration system. The demonstration system, using 17 percent hardware overhead, is able to detect 98 percent of faults affecting the control flow and 82 percent of all randomly inserted faults.
An exemplary approach to the education of rule-based languages
Authors: Erich Schikuta
Venue: ACM SIGCSE Bulletin (1987)

In this paper an exemplary approach to the education of rule-oriented languages will be presented and a method will be proposed to organize lectures on rule-oriented languages.The author of this paper developed the SIEGER-System, which serves as an assistance for such lectures. It is the implementation of a practical rule-based system using PROLOG, a rule-based language.The system is excellently suitable to show the analogy of the metalingual rule-system description and the formal PROLOG definition, and the equality of the natural way of the system usage and the automatic PROLOG-backtracking algorithm.For this reason the above mentioned exemplary approach in connection with this system is outstandingly appropriate for the education of computer science students.
Knowledge based document classification supporting integrated document handling
Authors: Helmut Eirund, Klaus Kreplin
Venue: Proceedings of the ACM SIGOIS and IEEECS TC-OA 1988 conference on Office information systems (1988)

An experimental office system currently being developed at Olivetti research integrates two major requirements of office work: content based document retrieval and mail distribution. In this system documents are described and classified by their semantic structure that provides access to abstract concepts contained in the document. The derivation of the semantic structure of a document supports both an efficient retrieval by content and an intelligent mail filtering through document semantics. A knowledge based classification system automatically generates the conceptual description of a document to be inserted into the system by means of content analysis, and associates the document to an appropriate predefined type. The classification system closes the gap between electronic document entry systems and processing of (semi-) structured document content.
Integrating code generation and optimization
Authors: Christopher W. Fraser, Alan L. Wendt
Venue: ACM SIGPLAN Notices (1986)

This paper describes a compiler with a code generator and machine-directed peephole optimizer that are tightly integrated. Both functions are performed by a single rule-based rewriting system that matches and replaces patterns. This organization helps make the compiler simple, fast, and retargetable. It also corrects certain phase-ordering problems.