ppxscal/embedding_network huggingface dataset:
Signed Area of Sectors Between Spline Curves and the Origin
Venue: Proceedings of the 1999 International Conference on Information Visualisation (1999)

Formulas for representing the signed area of sectors between Bezier and B-spline curve segments and the origin are presented. The area is expressed by using the coordinates of the control points and coefficients calculated with the basis functions of the spline curves. Area-preserving deformations of the spline curves by moving the control points are also investigated. The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc. Terms of Usage Privacy Policy Code of Ethics Contact Us Useful downloads: Adobe Acrobat QuickTime Windows Media Player Real Player
Nordhaus--Gaddum bounds for independent domination
Authors: Wayne Goddard, Michael A. Henning
Venue: Discrete Mathematics (2003)

We establish sharp bonds on the sum and product of the independent domination numbers of a graph and its complement.
Low Voltage Class AB Output Stage for CMOS Op-Amps Using Multiple Input Floating Gate Transistors
Authors: R. G. Carvajal, A. Torralba, J. Tombs, F. Muñoz, J. Ramírez-Angulo
Venue: Analog Integrated Circuits and Signal Processing (2003)

A new class AB output stage for CMOS op-amps is proposed with simple and accurate quiescent current control using floating gate transistors. The proposed stage can be operated with a supply voltage close to a transistor's threshold voltage. Experimental results are provided showing a 15 MHz gain-bandwidth product when it is used as the second stage of an op-amp with 1.5 V supply voltage in a standard 0.8 &mu;m CMOS technology.
Using SADTs to Support Irregular Computational Problems
Authors: Jonathan Nash
Venue: Proceedings of the 1999 International Symposium on Parallel Architectures, Algorithms and Networks (1999)

There are well defined methods for supporting regular problems with scalable performance, typified by the HPF language and the BSP model. Less well understood is the solution of more irregular problems, supporting complex shared data structures and task dependencies, and typically requiring dynamic load balancing to sustain high performance. It is demonstrated how the use of Shared Abstract Data Types (SADTs), together with an extended BSP cost model, can support irregular problems in a structured manner. An SADT is an extension of a serial ADT which allows the concurrent invocation of its methods. A number of SADTs are used to implement a solution of the travelling salesman problem on the Cray T3D machine, and a description of the restructuringof a parallel CFD code using SADTs is provided, with initial results given for the Cray T3E.
Design and Implementation of MPEG-4 Authoring Tool
Authors: Kwang-Yong Kim, Hyum-Cheol Kim, Won-Sik Cheong, Kyuheon Kim
Venue: Proceedings of the Fourth International Conference on Computational Intelligence and Multimedia Applications (2001)

Under an interactive broadcasting environment, viewers have been requesting additionaland linked information of individual contents in TV programs.In order to satisfy thesedemands from viewers, first of all, it is required to develop a new authoring tool that can editAV(Audio Visual) contents as independent objects and add related information of the contents.In this paper, we propose an MPEG-4 based authoring tool.The characteristics of our authoring tool are that it generates an XMT file for an object and a scene description, which is then coded into an mp4 file according to the MPEG-4 specification.In order to show the usefulness of the proposed authoring tool, we show the authored AV contents using thereference software ( IM1 2Dplayer) provided by MPEG.
10 Minute Guide to Lotus Notes 6
Authors: Jane Calabria, Dorothy Burke
Venue:  (2002)

:10 Minute Guide to Lotus Notes 6 offers simple, practical help for busy people who need results fast. Through goal-oriented, 10-minute lessons, you'll learn all the essential tasks for getting productive with the latest version of Lotus Notes.
Verification and Validation of the Seal Software Assessment Tool
Authors: L. Li, A. Walker
Venue: Proceedings of the 3rd International Software Engineering Standards Symposium (ISESS '97) (1997)

Software verification and validation is an aid in determining that developed software meets customer requirements, performs its intended functions correctly, and provides information about its quality and reliability. The emerging ISO 15504 international standard for software process assessment has prepared normative and informative requirements which are intended to be used to support assessments compliant to this new standard. The SEAL has prepared a tool which supports the capture of assessment data and prepares visual indications (profiles) of the assessment output. The activity of software verification and validation has been integrated into each phase of the software life cycle of the SEAL Assessment Tool. This paper reviews the software verification and validation tasks supporting each activity in the SEAL Assessment Tool development, and the techniques that were used to accomplish specific software verification and validation tasks. An ISO 9001-compliant quality management system was used to support the documentation of software verification and validation activity performed on the Tool.
Pipeline damping: a microarchitectural technique to reduce inductive noise in supply voltage
Authors: Michael D. Powell, T. N. Vijaykumar
Venue: ACM SIGARCH Computer Architecture News (2003)

Scaling of CMOS technology causes the power supply voltages to fall and supply currents to rise at the same time as operating speeds are increasing. Falling supply voltages cause noise margins to decrease, while increasing current and frequency makes supply noise injection larger, especially noise caused by inductance in the supply lines. Creating power distribution systems is one of the key challenges in modern chip design. Decoupling capacitance helps reduce inductance effects, but there is often a peak in the supply impedance that occurs at a resonant frequency caused roughly by the package inductance and the chip decoupling capacitors. This frequency is on the order of 100MHz, which is much lower than the operating frequency of the processor. We propose pipeline damping, an architectural technique which controls instruction issue to guarantee bounds on current variation around the frequency of the supply resonance, thus reducing the resulting supply noise. Damping is a cheaper alternative to expensive, circuit-based noise-reduction techniques. We make the fundamental observation that limiting the current flow change (di) within resonant time period (dt) controls di/dt without large performance loss. Damping guarantees bounds on current variation while allowing processor current to increase or decrease to the magnitude required to maintain performance. Our results show that a damped processor guarantees a 33% reduction in the worst-case current variation with an average performance degradation of 7% and average energy delay of 1.09 compared to an undamped processor.
Safety through Security
Authors: Andrew Simpson, Jim Woodcock, Jim Davies
Venue: Proceedings of the 9th international workshop on Software specification and design (1998)

This paper illustrates that the concept of non-interference, used in theories of security, may also be used to reason about safety. It presents a technique for modelling safety properties in terms of communicating processes, and develops a practical theory of system protection from failures. A simple example is presented to illustrate the application of this technique to different classes of safety property.
A Citation Study of the Computer Science Literature
Authors: Gerard Salton, D. Bergmark
Venue:  (1979)

The bibliographic references and citations which exist between documents in a given collection environment can be used to study the history and scope of particular subject areas and to assess the importance of individual authors, documents, and journals. A clustering study of the computer science literature is described using bibliographic citations as a clustering criterion, and conclusions are drawn regarding the scope of computer science, and the characteristics of individual documents in the area.
A Template-Matching Approach to Free-Form Feature Recognition
Venue: Proceedings of the International Conference on Information Visualisation (2000)

Feature recognition has been an active research area in the past two decades. While many techniques have been developed, most of them are limited to the detection of features that are of regular shapes. Examples include holes, slots, pockets and steps that are commonly used in engineering parts. This paper reports our investigation on a method that is able to detect free-form features. A template matching approach is used where the template represents the shape of the free-from feature to be detected. The feature recognition method works on a two-dimensional parametric space, which represents all possible configurations of the template. A match between the template and the object from which the features are to be detected corresponds to a match-curve in the parametric space. Feature recognition is achieved by first searching the rough location of the match-curve, followed by searching a precise location of a point on the match-curve. A program has been implemented to verify the feasibility of the approach, and examples are given to demonstrate the major steps in the method. The use of the method in computer graphics applications such as shape Blending is demonstrated. The application of the technique in industrial applications such as injection mould design is also discussed.
Embedding Graphs in Books: A Layout Problem with Applications to VLSI Design
Authors: R F K Chang., Thomson F Leighton, L A Rosenberg
Venue:  (1986)

We study the graph-theoretic problem of embedding a graph in a book with its vertices in a line along the spine of the book and its edges on the pages in such a way that edges residing on the same page do not cross. This problem abstracts layout problems arising in the routing of multilayer printed circuit boards and in the design of fault-tolerant processor arrays. In devising an embedding, one strives to minimize both the number of pages used and the ``cutwidth'''' of the edges on each page. Our main results (1) present optimal embeddings of a variety of families of graphs; (2) exhibit situations where one can achieve small pagenumber only at the expense of large cutwidth; and (3) establish bounds on the minimum pagenumber of a graph based on various structural properties of the graph. Notable in the last category are proofs that (a) every $n$-vertex $d$-valent graph can be embedded using $O(dn ^ {1/2} )$ pages, and (b) for every $d < 2$ and all large $n$, there are $n$-vertex $d$-valent graphs whose pagenumber is at least \[ \Omega \left ( \frac {n ^ {1/2-1/d}} {log ^ 2 n} \right ) . \]
Lightweight Impact Analysis using Island Grammars
Authors: Leon Moonen
Venue: Proceedings of the 10th International Workshop on Program Comprehension (2002)

Impact analysis is needed for the planning and estimation of software maintenance projects. Traditional impact analysis techniques tend to be too expensive for this phase, so there is need for more lightweight approaches.In this paper, we present a technique for the generation of lightweight impact analyzers from island grammars. We demonstrate this technique using a real-world case study in which we describe how island grammars can be used to find account numbers in the software portfolio of a large bank. We show how we have implemented this analysis and achieved lightweightness using a reusable generative framework for impact analyzers.
A Lazy Divide and Conquer Approach to Constraint Solving
Authors: Saswat Anand, Wei-Ngan Chin, Siau-Cheng Khoo
Venue: Proceedings of the 14th IEEE International Conference on Tools with Artificial Intelligence (2002)

Divide and conquer strategy enables a problem to be divided into subproblems, which are solved independently and later combined to form the solutions of the original problem. In solving constraint satisfaction problems, however, divide and conquer technique has not been shown to be effective. Because, it is not possible to cleanly divide a problem into independent subproblems in the presence of constraints that involve variables belonging to different sub-problems. Consequently, solutions of one subproblem may prune some solutions of another subproblem, making those solutions of the latter subproblem redundant. In this paper,we propose a divide and conquer approach to constraint solving in a lazy evaluation framework. In this framework, a subproblem is solved on demand, which eliminates redundantconsistency checks. Moreover, once solved, the solutions of a subproblem can be reused in the satisfaction of various global constraints connecting this subproblem with others, thus reducing the search space. We also demonstrate the effectiveness of our algorithm in solving a practical problem: finding all instances of a user-defined pattern in stock market price charts.
Mastering Microsoft Project 2002, 1 edition
Authors: Gini Courter, Michael Miller, Annette Marquis
Venue:  (2002)

:Don't fear its complexity. Microsoft Project 2002 is more adaptable than ever. Mastering Microsoft Project 2002 shows you how to make Project really work for you, whether you're managing a sprawling, enterprise-wide project or something much smaller. Learn basic tasks and quickly move on to more advanced features, choosing the path that will make you and your organization efficient and successful.
Speedup of Lockout-Free Mutual Exclusion Algorithms
Authors: Yoshihide Igarashi, Yasuaki Nishitani
Venue: Proceedings of the 1999 International Symposium on Parallel Architectures, Algorithms and Networks (1999)

We propose three lockout-free mutual exclusion algorithms for the asynchronous multi-writer/reader shared memory model. The first two algorithms are modifications of the $n$-process algorithm by Peterson, and the third algorithm is a modification of the tournament algorithm by Peterson and Fischer. The correctness and efficiency of these modified algorithms are shown. By these modifications we can speed up the original algorithms. The running times for the trying regions of the first algorithm and the second algorithm are (2n-3)c+O(n^3l) and (n-1)c+O(n^3l), respectively, where $n$ is the number of processes, l is an upper bound on the time between successive two steps, and c is is an upper bound on the time that any user spends in the critical region. The running time for the trying region of the third algorithm is (n-1)c+O(nl).
Validating software architectures for high reliability
Authors: W. K. Ehrlich, R. Chan, W. J. Donnelly, H. H. Park, M. B. Saltzman, VermaP
Venue: Proceedings of the The Seventh International Symposium on Software Reliability Engineering (1996)

In this paper, we present a generic approach for quantitatively evaluating the performance implications of a software architecture using the concept of operational profile from software reliability engineering. In our approach, the System Under Development (SUD) modes of operation are analyzed to specify a mode's rate of arrivals of external events. The requests' process flow (i.e., the rate of arrival of internal requests at server processes) is then derived from the software architecture. Finally, the product of the internal arrival rates and the amount of server resources to service a request is used to calculate a mode's server resource utilization. Application of this technique to an actual AT&T telecommunications operations system, together with implications for engineering software architectures that are robust under variation in modes of operation are discussed.
Software Engineering Standards and the Development of Multimedia-Based Systems
Authors: Terence P. Rout, Cathie Sherwood
Venue: Proceedings of the 4th IEEE International Symposium and Forum on Software Engineering Standards (1999)

A structured methodology for the development of multimedia systems has been developed, based upon a coherent and disciplined process model drawn from the framework of software engineering standards concerned with the software life cycle. The methodology incorporates effective management and control into a staged view of a product life cycle. Preliminary validation of the approach has confirmed the usefulness of a process focussed approach and has identified a number of areas for further improvement and evolution. The applicability of software engineering standards to this purpose is evidence of their value in their designated domain and in other related areas. The synergy observed is an indication that models of software life cycle processes may have more general applicability.
An Interleaved File System for the Butterfly
Authors: Carla Ellis, Peter Dibble
Venue:  (1987)

It is widely recognized that significant advances in computational power require some form of parallel processing. This has led to a range of proposals for multiprocessor architectures. It seems that traditional file access is one issue that has been deferred in the development of many of these new parallel machines and the software programming environments designed to make them usable. The project described in this paper is a first attempt to investigate the architectural considerations involved in providing a file system and its potential role for applications in the context of the BBN Butterfly multiprocessor. We have implemented a prototype called Bridge that distributes file data in an interleaved fashion over the secondary memories of multiple processor nodes. We discuss the design choices we have made, some preliminary experiences with the implementation, and opportunities this kind of file structure presents for algorithm design.
An Alternative Characterization of Disjunctive Logic Programs
Authors: W D Reed, W D Loveland, T B Smith
Venue:  (1991)

\indent We present an alternative characterization of disjunctive logic programs. We first review Inheritance near-Horn Prolog (InH-Prolog), an intuitive and computationally effective procedure that extends Prolog using case-analysis. We then describe a fixpoint characterization of disjunctive logic programs that is similarly based on case-analysis. This fixpoint characterization closely corresponds to the InH-Prolog procedure, and so gives needed insight into the difficult problem of recognizing the minimal disjunctive answers obtainable from the procedure. Due to its case-analysis nature, this characterization maintains a natural and close relationship to the standard characterization of Horn program. It also gives added insight into the role of definite answers for disjunctive programs and enables one to neatly focus attention on the interesting class of definite (single atom) consequences.
Accurate Exchange-correlation Potentials and Total Energy Components for the Helium Iso-electronic Series
Authors: Cyrus J. Umrigar, Xavier Gonze
Venue:  (1994)

Starting from exceedingly accurate many-body wavefunctions, we have constructed essentially exact densities, exchange-correlation potentials and components of the total energy for helium and twoelectron ions. These density functional results are compared to the corresponding quantities obtained from a variety of commonly used approximate density functionals, namely the local density approximation and various generalized gradient approximations in order to test the accuracy of the approximate functionals. Although the generalized gradient approximations yield improved energies compared to the local density approximation, the exchange and correlation potentials (especially the latter) obtained from the generalized gradient approximations are in poor agreement with the corresponding exact potentials. The large-distance asymptotic behavior of the exact exchange-correlation potential to O(1/r4) is found to agree with theoretical predictions. The short range behaviour of the exchangecorrelation potential is very close to quadratic. The prospects for the improved generalized gradient approximations are discussed. Keywords: density functional theory, exchange-correlation potential, generalized gradient approximation
Scalable Parallel Electronic Structure Calculations on the IBM SP2
Authors: Stefan Goedecker, Adolfy Hoisie
Venue:  (1996)

We have developed a highly efficient and scalable electronic structure code for parallel computers using message passing. The algorithm takes advantages of the natural parallelism in quantum chemistry problems to obtain very high performance even on a large number of processors. Most of the terms which scale cubically with respect to the number of atoms have been eliminated allowing the treatment of very large systems. It uses one of the most precise versions of Density Functional Theory, namely Self-Interaction Corrected Density Functional Theory.
Software reuse introduction requires a process perspective
Authors: S. Bandinelli, S. Rementeria
Venue: Proceedings of the 10th International Software Process Workshop (1996)

This paper looks at reuse from a process standpoint. Reuse-based processes have significant differences from traditional product development processes. The general tendency is to structure reuse-based processes into two separate sub-processes: one at the domain level to develop a standard product family and one at the application level, to derive individual products. In addition, it is important to distinguish between the (target) reuse-based process and the reuse adoption process that manages reuse introduction. The paper considers how business objectives drive the reuse adoption process and reports how this issue is being experimentally addressed in an on-going process improvement project.
A Unified Model for the Analysis of Job Completion Time and Performability Measures in Fault-Tolerant Systems
Authors: G V Kulkarni, F V Nicola, S K Trivedi, M R Smith
Venue:  (1985)

This paper deals with the analysis of job completion time and performability measures in degradable/repairable fault-tolerant computer systems. These systems change their performance (e.g., mode of operation or service rate) in response to different events such as failure or repair. We allow different types of service-preemption interactions due to changes in the system operation. When all service preemptions are of the preemptive-resume type then the completion time of a given job and the accumulated service (or reward) until a given time are dual measures. In this case we derive and relate different performance and reliability measures that have been proposed for the analysis of fault-tolerant computer systems. Numerical methods are employed to evaluate these measures and examples are used to demonstrate the use of the techniques developed.
Process Visualization with Levels of Detail
Authors: Kre"imir Matkovic, Helwig Hauser, Reinhard Sainitzer, M. Eduard Gröller
Venue: Proceedings of the IEEE Symposium on Information Visualization (InfoVis'02) (2002)

In this paper we demonstrate how we apply information visualization techniques to process monitoring. Virtual instruments are enhanced using history encoding ¿ instruments are capable of displaying the current value and the value from the near past. Multi-instruments are capable of displaying several data sources simultaneously. Levels of detail for virtual instruments are introduced where the screen area is inversely proportional to the informationamount displayed. Furthermore the monitoring system is enhanced by using: 3D anchoring ¿ attachment of instruments to positions on a 3D model ¿, collision avoidance ¿ a physically based spring model prevents instruments from overlapping ¿, and focus+context rendering ¿ giving the user a possibility to examine particular instruments in detail without loosing the context information.