ppxscal/embedding_network huggingface dataset:
The RESTART/LRE method for rare event simulation
Authors: Carmelita Görg, Friedrich Schreiber
Venue: Proceedings of the 28th conference on Winter simulation (1996)

Using the LRE-algorithm (LRE: Limited Relative Error) for the evaluation of simulated data yields the sta tionary distribution function of an investigated random sequence and additionally the so-called local correlation coefficient, which represents relevant correlation evidence to be included in the error measure for controlling the simulation run time. In this paper a simplified LRE-algorithm is used to evaluate discrete sequences like the occupancy of finite buffer queueing systems G/G/1/N. It is shown how this algorithm is combined with the RESTART-method for an efficient rare event simulation. A multi-stage RESTART/LRE-algorithm has been implemented as part of a stochastic simulation system and its performance has been verified by extensive simulations of the reference system M/M/1/N, whose properties including the local correlation coefficient can be described by analytical formulas. Approximate formulas for the optimal number of stages and number of trials are given. The new algorithm has been successfully applied to several finite buffer queueing systems, including the SSMP(2)/D/1/N system with a correlated input stream, in order to gain by simulation the distribution function of the occupancy including very low loss probabilities in the order of 10/sup -9/ and even 10/sup -21/, which are relevant for the performance of switching nodes in the ATM broadband network.
Automatic functional test program generation for microprocessors
Authors: Chen-Shang Lin, Hong-Fa Ho
Venue: Proceedings of the 25th ACM/IEEE Design Automation Conference (1988)

A new algorithm, O-algorithm, for automatic test program generation of microprocessors in a user environment is presented. Specifically, to eliminate the redundant tests, a weighted-digraph model is used to model the signal flow of the general microprocessors. Improved functional fault models of microprocessors are derived from Turing machine model. The O-algorithm is then constructed based on the signal flow model and functional fault models. The complexity of our algorithm is better than [6]. Moreover, the simulation had shown that the fault coverage is better than 97%.
Combinatorial Problems in Infinite Spaces
Authors: Giuseppe Tallini
Venue: Designs, Codes and Cryptography (1996)

Several combinatorial problems in finite projective spaces which are rather hard to be solved, are unexpectedly easy in infinite spaces. In this paper, we deal with this question and more generally in linear spaces.
Design and realization of an interactive multimedia server in education
Authors: K. Coninx, B. Daems, F. Van Reeth, E. Flerackers
Venue: Proceedings of the 2nd conference on Integrating technology into computer science education (1997)

The European project ELECTRA is concerned with the introduction of multimedia / telematics support to enhance the accessibility (local, regional and international) of learning material and to promote collaborative work. For the purpose of this paper we concentrate on two workpackages in the Limburg University Centre. The Interactive Multimedia Server workpackage focuses on the design of a generic platform for the integration of different types of information related to the learning process. Special attention is given to management, integration and accessibility of study material in an electronic environment. The other workpackage investigates the use of the interactive multimedia server in Medicine education.
Decision Support for Target-Based Resource Allocation of Public Services in Multiunit and Multilevel Systems
Authors: Antreas D. Athanassopoulos
Venue: Management Science (1998)

This paper is concerned with the problem of resource allocationand target setting in the provision of public services. The paper develops a network-based representation of multilevel resource management with equity, efficiency, and effectiveness being recognised as the fundamental objectives of the system. On the modelling side, the proposed method combines data envelopment analysis and goal programming formulations integrated within an interactive planning framework. An illustrative application on fire departments is used to show the applicability of the method developed to assist the resource allocation process.
The SimpleScalar tool set, version 2.0
Authors: Doug Burger, Todd M. Austin
Venue: ACM SIGARCH Computer Architecture News (1997)

This document describes release 2.0 of the SimpleScalar tool set, a suite of free, publicly available simulation tools that offer both detailed and high-performance simulation of modern microprocessors. The new release offers more tools and capabilities, precompiled binaries, cleaner interfaces, better documentation, easier installation, improved portability, and higher performance. This paper contains a complete description of the tool set, including retrieval and installation instructions, a description of how to use the tools, a description of the target SimpleScalar architecture, and many details about the internals of the tools and how to customize them. With this guide, the tool set can be brought up and generating results in under an hour (on supported platforms).
FPGA routing and routability estimation via Boolean satisfiability
Authors: R. Glenn Wood, Rob A. Rutenbar
Venue: Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays (1997)

Guaranteeing or even estimating the routability of a portion of a placed FPGA remains difficult or impossible in most practical applications. In this paper we develop a novel formulation of both routing and routability estimation that relies on a rendering of the routing constraints as a single large Boolean equation. Any satisfying assignment to this equation specifies a complete detailed routing. By representing the equation as a Binary Decision Diagram (BDD), we represent all possible routes for allnets simultaneously. Routability estimation is transformed to Boolean satisfiability, which is trivial for BDDs. We use the technique in the context of a perfect routability estimator for a global router. Experimental results from a standard FPGA benchmark suite suggest the technique is feasible for realistic circuits, but refinements are needed for very large designs.
Bofors 9LV Mk3 system&mdash;developing for maximum software reuse
Authors: Ulf Olsson
Venue: Proceedings of the conference on TRI-ADA '90 (1990)

Technical, management, and political decisions made in the design phase of this shipboard command and weapons control system (more than 1 million LOC), have led to a significant percentage of reuse on subsequent projects. The practical issues and lessons learned in trying to design for massive software reuse will be discussed.
Aggressive inlining
Authors: Andrew Ayers, Richard Schooler, Robert Gottlieb
Venue: ACM SIGPLAN Notices (1997)

Existing research understates the benefits that can be obtained from inlining and cloning, especially when guided by profile information. Our implementation of inlining and cloning yields excellent results on average and very rarely lowers performance. We believe our good results can be explained by a number of factors: inlining at the intermediate-code level removes most technical restrictions on what can be inlined; the ability to inline across files and incorporate profile information enables us to choose better inline candidates; a high-quality back end can exploit the scheduling and register allocation opportunities presented by larger subroutines; an aggressive processor architecture benefits from more predictable branch behavior; and a large instruction cache mitigates the impact of code expansion. We describe the often dramatic impact of our inlining and cloning on performance: for example, the implementations of our inlining and cloning algorithms in the HP-UX 10.20 compilers boost SPECint95 performance on a PA8000-based workstation by a factor of 1.32.
PAC Learning Axis-aligned Rectangles with Respect toProduct Distributions from Multiple-Instance Examples
Authors: Philip M. Long, Lei Tan
Venue: Machine Learning (1998)

We describe a polynomial-time algorithm for learning axis-aligned rectangles in Q^d with respect to product distributions from multiple-instance examples in the PAC model. Here, each example consists of n elements of Q^d together with a label indicating whether any of the n points is in the rectangle to be learned. We assume that there is an unknown product distribution D over Q^d such that all instances are independently drawn according to D. The accuracy of a hypothesis is measured by the probability that it would incorrectly predict whether one of n more points drawn from D was in the rectangle to be learned. Our algorithm achieves accuracy &epsi; with probability 1-&delta; in O\left(\frac{d^5n^{12}}{\epsilon^{20}} \log^2 \frac{nd}{\epsilon\delta}\right) time.
A defect-tolerant and fully testable PLA
Authors: N. Wehn, M. Glesner, K. Caesar, P. Mann, A. roth
Venue: Proceedings of the 25th ACM/IEEE Design Automation Conference (1988)

This paper presents a defect-tolerant and fully testable PLA allowing for the repair of a defective chip. The repair process is described. Special emphasis is devoted to the location of defects inside a PLA. The defect location mechanism is completely topological and circuit independent and therefore easy to adapt to existing PLA generators. Yield considerations for this type of PLAs are presented.
The Extended Euler--Lagrange Condition for Nonconvex Variational Problems
Authors: Richard Vinter, Harry Zheng
Venue: SIAM Journal on Control and Optimization (1997)

This paper provides necessary conditions of optimality for a general variational problem for which the dynamic constraint is a differential inclusion with a possibly nonconvex right side. They take the form of an Euler--Lagrange inclusion involving convexification in only one coordinate, supplemented by the transversality and Weierstrass conditions. It is also shown that for time-invariant, free time problems, the adjoint arc can be chosen so that the Hamiltonian function is constant along the minimizing state arc. The methods used here, based on simple "finite dimensional" nonsmooth calculus, Clarke decoupling, and a rudimentary version of the maximum principle, offer an alternative, and somewhat simpler, derivation of such results to those used by Ioffe and Rockafellar in concurrent research.
Reasoning about Java classes: preliminary report
Authors: Bart Jacobs, Joachim van den Berg, Marieke Huisman, Martijn van Berkum, U. Hensel, H. Tews
Venue: ACM SIGPLAN Notices (1998)

We present the first results of a project called LOOP, on formal methods for the object-oriented language Java. It aims at verification of program properties, with support of modern tools. We use our own front-end tool (which is still partly under construction) for translating Java classes into higher order logic, and a back-end theorem prover (namely PVS, developed at SRI) for reasoning. In several examples we demonstrate how non-trivial properties of Java programs and classes can be proven following this two-step approach.
Computing Maximum Likelihood Estimators of Convex Density Functions
Authors: T. Terlaky, J.-Ph. Vial
Venue: SIAM Journal on Scientific Computing (1998)

We consider the problem of estimating a density function that is known in advance to be convex. The maximum likelihood estimator is then the solution of a linearly constrained convex minimization problem. This problem turns out to be numerically difficult. We show that interior point algorithms perform well on this class of optimization problem, though for large samples numerical difficulties are still encountered. To eliminate those difficulties, we propose a clustering scheme that is reasonable from a statistical point of view. We display results for problems with up to 40000 observations. We also give a typical picture of the estimated density: a piecewise linear function, with only very few pieces.
Power optimization using divide-and-conquer techniques for minimization of the number of operations
Authors: Inki Hong, Miodrag Potkonjak, Ramesh Karri
Venue: Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design (1997)

We develop an approach to minimizing power consumption of portable wireless DSP applications using a set of compilation and architectural techniques. The key technical innovation is a novel divide-and-conquer compilation technique to minimize the number of operations for general DSP computations. Our technique optimizes not only a significantly wider set of computations than the previously published techniques, but also outperforms (or performs at least as well as other techniques) on all examples. Along the architectural dimension, we investigate coordinated impact of compilation techniques on the number of processors which provide optimal trade-off between cost and power. We demonstrate that proper compilation techniques can significantly reduce power with bounded hardware cost. The effectiveness of all techniques and algorithms is documented on numerous real-life designs.
A Smoothly Constrained Kalman Filter
Authors: Jan De Geeter, Hendrik Van Brussel, Joris De Schutter, Marc Decréton
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1997)

This paper presents the Smoothly Constrained Kalman Filter (SCKF) for nonlinear constraints. A constraint is any relation that exists between the state variables. Constraints can be treated as perfect observations. But, linearization errors can prevent the estimate from converging to the true value. Therefore, the SCKF iteratively applies nonlinear constraints as nearly perfect observations, or, equivalently, weakened constraints. Integration of new measurements is interlaced with these iterations, which reduces linearization errors and, hence, improves convergence compared to other iterative methods. The weakening is achieved by artificially increasing the variance of the nonlinear constraint. The paper explains how to choose the weakening values, and when to start and stop the iterative application of the constraint.
A memory-efficient real-time non-copying garbage collector
Authors: Tian F. Lim, Przemysław Pardyak, Brian N. Bershad
Venue: Proceedings of the 1st international symposium on Memory management (1998)

Garbage collectors used in embedded systems such as Personal Java and Inferno or in operating systems such as SPIN must operate with limited resources and minimize their impact on application performance. Consequently, they must maintain short real-time pauses, low overhead, and a small memory footprint. Most garbage collectors, including the Treadmill algorithm, are inadequate because they sacrifice space for time. We have implemented a new Treadmill variant that provides good memory utilization by using real-time page-level management techniques that reduce fragmentation. A page-wise collection is used to locate pages of free memory, which are then dynamically reassigned between free lists as needed. Virtual memory is used to dynamically remap free pages into continuous ranges, and objects are allocated from under-utilized pages when needed. Finally, the use of header compaction and arbitrary free-list sizes reduces internal fragmentation. Our experiments demonstrate that we have substantially improved memory utilization without compromising latency or overhead, and that the new collector performs very well for SPIN's workloads and regular Modula-3 programs.
Using HTML linking to help novice programmers to reuse components
Authors: Bohdan Nebash, Michael B. Feldman
Venue: ACM SIGCSE Bulletin (1997)

Software reuse needs to be taught early in the computer science curriculum. One of the major obstacles that students face when reusing software is the difficulty in learning how to use components from a software library. To aid in understanding components we built a tool that automatically embeds Hypertext Markup Language (HTML) links in Ada 95 specification files. Derived types are linked to their parent types, child packages are linked to their parents, and all subprogram parameter and return types are linked to their declarations. We conducted a controlled experiment to determine if these links help novice programmers to learn to use library components. Researchers have not formally investigated which comprehension techniques are effective and which are not. Our results indicate that our techniques are effective in aiding novice programmers to learn to use a reusable component.
The Validity of Cognitive Testing in Screening for Dementia
Authors: Patricia Stockton, Jiska Cohen-Mansfield, Nathan Billig
Venue: Journal of Medical Systems (1998)

The concept of &ldquo;cognitive impairment,&rdquo; as an indicator of dementia, defined in 1980 as a loss of intellectual abilities of sufficient severity to interfere with social or occupational functioning, is the model which has been adopted for a condition, which has recently been reclassified from an &ldquo;organic&rdquo; to a &ldquo;cognitive disorder.&rdquo; Data derived from the assessment of a sample of older people demonstrated the extreme sensitivity of a widely employed cognitive assessment instrument to all levels of educational experience, and educational correlates, notably level of physical disability, were identified as other independent predictors of test performance. The analyses raise questions with regard to the reinterpretation of &ldquo;lack of education,&rdquo; from a confounding factor in prevalence estimates of cognitive impairment to a &ldquo;risk factor&rdquo; for dementia, and support those who have questioned the validity of the one-dimensional &ldquo;cognitive paradigm,&rdquo; and the trend to diagnosis based upon objective assessment with standardized instruments.
Concurrency and recovery in generalized search trees
Authors: Marcel Kornacker, C. Mohan, Joseph M. Hellerstein
Venue: ACM SIGMOD Record (1997)

This paper presents general algorithms for concurrency control in tree-based access methods as well as a recovery protocol and a mechanism for ensuring repeatable read. The algorithms are developed in the context of the Generalized Search Tree (GiST) data structure, an index structure supporting an extensible set of queries and data types. Although developed in a GiST context, the algorithms are generally applicable to many tree-based access methods. The concurrency control protocol is based on an extension of the link technique originally developed for B-trees, and completely avoids holding node locks during I/Os. Repeatable read isolation is achieved with a novel combination of predicate locks and two-phase locking of data records. To our knowledge, this is the first time that isolation issues have been addressed outside the context of B-trees. A discussion of the fundamental structural differences between B-trees and more general tree structures like GiSTs explains why the algorithms developed here deviate from their B-tree counterparts. An implementation of GiSTs emulating B-trees in DB2/Common Server is underway.
Potential-driven statistical ordering of transformations
Authors: Inki Hong, Darko Kirovski, Miodrag Potkonjak
Venue: Proceedings of the 34th annual Design Automation Conference (1997)

Successive, well organized application of transformations has beenwidely recognized as an exceptionally effective, but complex anddifficult CAD task. We introduce a new potential-driven statisticalapproach for ordering transformations. Two new synthesis ideasare the backbone of the approach. The first idea is to quantifythe characteristics of all transformations and the relationship betweenthem based on their potential to reorganize a computationsuch that the complexity of the corresponding implementation isreduced. The second one is based on the observation that transformationsmay disable each other not only because they prevent theapplication of the other transformation, but also because both transformationstarget the same potential of the computation. These twoobservations drastically reduce the search space to find efficient andeffective scripts for ordering transformations. A key algorithmicnovelty is that both conceptual and optimization insights as well asall optimization algorithms are automatically derived by organizedexperimentation and statistical methods. On a large set of diversereal-life examples improvements in throughput, area, and power bylarge factors have been obtained. Both qualitative and quantitativestatistical analysis indicate effectiveness, high robustness, and consistencyof the new approach for ordering transformations.
Smooth invariant interpolation of rotations
Authors: F. C. Park, Bahram Ravani
Venue: ACM Transactions on Graphics (TOG) (1997)

We present an algorithm for generating a twice-differentiable curve on the rotation group SO(3) that interpolated a given ordered set of rotation matrices at their specified knot times. In our approach we regard SO(3) as a Lie group with a bi-invariant Riemannian metriac, and apply the coordinate-invariant methods of Riemannian geometry. The resulting rotation curve is easy to compute, invariant with respect to fixed and moving reference frames, and also approximately minimizes angular acceleration.
Planar Integer Linear Programming is NC Equivalent to Euclidean GCD
Authors: D. F. Shallcross, V. Y. Pan, Y. Lin-Kriz
Venue: SIAM Journal on Computing (1998)

It is not known if planar integer linear programming is P-complete or if it is in NC, and the same can be said about the computation of the remainder sequence of the Euclidean algorithm applied to two integers. However, both computations are NC equivalent. The latter computational problem was reduced in NC to the former one by Deng [Mathematical Programming: Complexity and Application, Ph. D. dissertation, Stanford University, Stanford, CA, 1989; Proc. ACM Symp. on Parallel Algorithms and Architectures, 1989, pp. 110--116]. We now prove the converse NC-reduction.
A Combinatorial Proof for Stockhausen's Problem
Authors: Lily Yen
Venue: SIAM Journal on Discrete Mathematics (1997)

We consider problems in the enumeration of sequences suggested by the problem of determining the number of ways of performing a piano composition (Klavierstück XI) by Karlheinz Stockhausen. An explicit formula and a combinatorial proof for the general problem are given.
A high packing density module generator for CMOS logic cells
Authors: Yoichi Shiraishi, Jun'ya Sakemi, Makoto Kutsuwada, Akira Tsukizoe, Takashi Satoh
Venue: Proceedings of the 25th ACM/IEEE Design Automation Conference (1988)

This paper presents new algorithms for cell pattern generation. The evaluated cell areas are based on measurements which are independent of production process technology. The placement algorithm recognizes logic gates from an unconstrained CMOS circuit diagram and places them in a pattern which minimizes the total wiring length. The generated cell pattern has bent gates and is grid-free. This generator has been applied to more than 60 cell designs used for industrial chips without the need of manual intervention.