ppxscal/embedding_network huggingface dataset:
Fast and scalable layer four switching
Authors: V. Srinivasan, G. Varghese, S. Suri, M. Waldvogel
Venue: ACM SIGCOMM Computer Communication Review (1998)

In Layer Four switching, the route and resources allocated to a packet are determined by the destination address as well as other header fields of the packet such as source address, TCP and UDP port numbers. Layer Four switching unifies firewall processing, RSVP style resource reservation filters, QoS Routing, and normal unicast and multicast forwarding into a single framework. In this framework, the forwarding database of a router consists of a potentially large number of filters on key header fields. A given packet header can match multiple filters, so each filter is given a cost, and the packet is forwarded using the least cost matching filter.In this paper, we describe two new algorithms for solving the least cost matching filter problem at high speeds. Our first algorithm is based on a grid-of-tries construction and works optimally for processing filters consisting of two prefix fields (such as destination-source filters) using linear space. Our second algorithm, cross-producting, provides fast lookup times for arbitrary filters but potentially requires large storage. We describe a combination scheme that combines the advantages of both schemes. The combination scheme can be optimized to handle pure destination prefix filters in 4 memory accesses, destination-source filters in 8 memory accesses worst case, and all other filters in 11 memory accesses in the typical case.
Procedure placement using temporal ordering information
Authors: Nikolas Gloy, Trevor Blackwell, Michael D. Smith, Brad Calder
Venue: Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture (1997)

Instruction cache performance is very important to instruction fetch efficiency and overall processor performance. The layout of an executable has a substantial effect on the cache miss rate during execution. This means that the performance of an executable can be improved significantly by applying a code-placement algorithm that minimizes instruction cache conflicts. We describe an algorithm for procedure placement, one type of code-placement algorithm, that significantly differs from previous approaches in the type of information used to drive the placement algorithm. In particular, we gather temporal ordering information that summarizes the interleaving of procedures in a program trace. Our algorithm uses this information along with cache configuration and procedure size information to better estimate the conflict cost of a potential procedure ordering. We compare the performance of our algorithm with previously published procedure-placement algorithms and show noticeable improvements in the instruction cache behavior.
Convergence of Polynomially Bounded Semigroups of Matrices
Authors: Leonid Gurvits, Leiba Rodman
Venue: SIAM Journal on Matrix Analysis and Applications (1997)

It is proved that for polynomially bounded sets of matrices the notions of pointwise convergence and uniform convergence coincide. This result is also proved for certain sets of nonlinear maps on finite-dimensional real or complex vector spaces.
Efficient Distributed Selection with Bounded Messages
Authors: Alberto Negro, Nicola Santoro, Jorge Urrutia
Venue: IEEE Transactions on Parallel and Distributed Systems (1997)

We consider the problem of selecting the Kth smallest element of a set distributed among the sites of a communication network when the size of messages is bounded; that is, each message is a packet which contains at most c bits, where c¿ 1 is a constant.A general selection algorithm using packets is presented and its packet complexity is analyzed. Its complexity is shown to be a significant improvement for a large range of packet sizes over the existing bounds. The proposed technique is then instanciated for specific classes of network topologies; the resulting bounds either match or improve the ones of existing solutions for a large range of values of the packet size. Furthermore, it is bit optimal in star networks.
Load Balancing in Quorum Systems
Authors: Ron Holzman, Yosi Marcus, David Peleg
Venue: SIAM Journal on Discrete Mathematics (1997)

This paper introduces and studies the question of balancing the load on processors participating in a given quorum system. Our proposed measure for the degree of balancing is the ratio between the load on the least frequently referenced element and on the most frequently used one.We give some simple sufficient and necessary conditions for perfect balancing. We then look at the balancing properties of the common class of voting systems and prove that every voting system with odd total weight is perfectly balanced. (This holds, in fact, for the more general class of ordered systems.)We also give some characterizations for the balancing ratio in the worst case. It is shown that for any quorum system with a universe of size $n$, the balancing ratio is no smaller than $1/(n-1)$, and this bound is the best possible. When restricting attention to nondominated coteries (NDCs), the bound becomes $2/\bigl(n-\log_2 n+o(\log n)\bigr)$, and there exists an NDC with ratio $2/\bigl(n-\log_2 n-o(\log n)\bigr)$.Next, we study the interrelations between the two basic parameters of load balancing and quorum size. It turns out that the two size parameters suitable for our investigation are the size of the largest quorum and the optimally weighted average quorum size(OWAQS) of the system. For the class of ordered NDCs (for which perfect balancing is guaranteed), it is shown that over a universe of size $n$, some quorums of size $\lceil(n+1)/2\rceil$ or more must exist (and this bound is the best possible). A similar lower bound holds for the OWAQS measure if we restrict attention to voting systems. For nonordered systems, perfect balancing can sometimes be achieved with much smaller quorums. A lower bound of $\Omega(\sqrt{n})$ is established for the maximal quorum size and the OWAQS of any perfectly balanced quorum system over $n$ elements, and this bound is the best possible.Finally, we turn to quorum systems that cannot be perfectly balanced, but have some balancing ratio $0
From theory to practice or how not to fail in developing information systems
Authors: Offer Drori
Venue: ACM SIGSOFT Software Engineering Notes (1997)

The development of information systems consists of a wide variety of activities and processes, which come together to create a product designed for a specific purpose. We often encounter products that do not serve the purpose they were intended for, and the question asked is: How does it happen that a process that has been defined and structured in principle, has such a high failure ratio? The purpose of this article is to attempt to clarify the problematic points or subjects that exist in the process of developing information systems and to supply the tools to help reduce the problem.
Using rotational mirrored declustering for replica placement in a disk-array-based video server
Authors: Ming-Syan Chen, Hui-I Hsiao, Chung-Sheng Li, Philip S. Yu
Venue: Multimedia Systems (1997)

In a video-on-demand (VOD) environment, diskarrays are often used to support the disk bandwidth requirement. This can pose serious problems on available disk bandwidth upon disk failure. In this paper, we explore the approach of replicating frequently accessed movies to providehigh data bandwidth and fault tolerance required in a disk-array-based video server. An isochronous continuous videostream imposes different requirements from a random accesspattern on databases or files. Explicitly, we propose a newreplica placement method, called <i>rotational mirrored declustering</i> (RMD), to support high data availability for disk arrays in a VOD environment. In essence, RMD is similar tothe conventional mirrored declustering in that replicas arestored in different disk arrays. However, it is different fromthe latter in that the replica placements in different disk arrays under RMD are properly rotated. Combining the meritsof prior chained and mirrored declustering methods, RMD isparticularly suitable for storing multiple movie copies to support VOD applications. To assess the performance of RMD,we conduct a series of experiments by emulating the storage and delivery of movies in a VOD system. Our resultsshow that RMD consistently outperforms the conventionalmethods in terms of load-balancing and fault-tolerance capability after disk failure, and is deemed a viable approachto supporting replica placement in a disk-array-based videoserver.
Conservative synchronization in object-oriented parallel battlefield discrete event simulations
Authors: James B. Hiller, Thomas C. Hartrum
Venue: ACM SIGSIM Simulation Digest (1997)

We present a conservative strategy for spatially decomposed parallel discrete event battlefield simulation. The traditional null message algorithm provides a foundation from which a mapping to generic simulation attributes can be made. We informally discuss preservation of logical correctness and freedom from deadlock. Experimental results demonstrate the potential execution time savings when load imbalance is not dominant; more importantly, they highlight improvement opportunities in spite of potential load imbalance. The net result is that a very reasonable performance gain can be delivered for little effort in a way that supports good simulation system design principles. The approach is straightforward and can be easily implemented as part of a more general sequential or parallel simulation support environment. While the approach is expressed in terms of battlefield simulation, its essence applies to many simulation applications.
LocusRoute: a parallel global router for standard cells
Authors: Jonathan Rose
Venue: Proceedings of the 25th ACM/IEEE Design Automation Conference (1988)

A fast and easily parallelizable global routing algorithm for standard cells and its parallel implementation is presented. LocusRoute is meant to be used as the cost function for a placement algorithm and so this context constrains the structure of the global routing algorithm and its parallel implementation. The router is based on enumerating a subset of all two-bend routes between two points, and results in 16% to 37% fewer total number of tracks than the TimberWolf global router for standard cells [Sech85]. It is comparable in quality to a maze router and an industrial router, but is factor of 10 times or more faster. Three approaches to parallelizing the router are implemented: wire-by-wire parallelism, segment-by-segment and route-by-route. Two of these approaches achieve significant speedup - route-by-route achieves up to 4.6 using eight processors, and wire-by-wire achieves from 5.8 to 7.6 on eight processors.
Resolvable Balanced Incomplete Block Designs with BlockSize 8
Authors: Malcolm Greig, Julian Abel
Venue: Designs, Codes and Cryptography (1997)

The necessary condition for the existence of a resolvable balanced incomplete block design on v points, with &lgr; = 1 and k = 8, is that v &equiv; 8 mod 56. With the exception of 66 values of v, this condition is shown to be sufficient. The largest exceptional value of v is 24480.
Known Good Die
Authors: Larry Gilg
Venue: Journal of Electronic Testing: Theory and Applications (1997)

Advances in reducing size and increasing functionality of electronics have been due primarily to the shrinking geometries and increasing performance of integrated circuit technologies. Recently, development efforts aimed at reducing size and increasing functionality have focused on the first level of the electronic package. The result has been the development of multichip packaging, technologies in which bare IC chips are mounted on a single high density substrate that serves to &ldquo;package&rdquo; the chips, as well as interconnect them. A number of benefits accrue because of multichip packaging, namely, increased chip density, space savings, higher performance, and less weight. Therefore, these technologies are attractive for today&lsquo;s light weight, portable, high performance electronic equipment and devices.In spite of these benefits, multichip packaging has not shown the kind of explosive growth and expansion that was predicted[1]. A major inhibitor for these technologies has been the availability of fully tested and conditioned bare die, or &ldquo;known good die&rdquo;. This paper reviews the issues and technologies associated with test and burn-in of bare or minimally packaged IC products.
A Grounded-Resistor Current Conveyor-Based Active-R Multiphase Sinusoidal Oscillator
Authors: Muhammad Taher Abuelma’atti, Muhammad Ali Al-Qahtani
Venue: Analog Integrated Circuits and Signal Processing (1998)

A multiphase active-R sinusoidal oscillator circuit is presented. The oscillator can produce M signals (M being even or odd) equally spaced in phase. The circuit has low component count, uses grounded resistors and enjoys low active and passive sensitivities. The feasibility of converting the circuit into a voltage controlled multiphase oscillator is studied. Simulation results are included.
On-Line Testing for VLSI&mdash;A Compendium of Approaches
Authors: M. Nicolaidis, Y. Zorian
Venue: Journal of Electronic Testing: Theory and Applications (1998)

This paper presents an overview of a comprehensive collection of on-line testing techniques for VLSI. Such techniques are for instance: self-checking design, allowing high quality concurrent checking by means of hardware cost drastically lower than duplication; signature monitoring, allowing low cost concurrent error detection for FSMs; on-line monitoring of reliability relevant parameters such as current, temperature, abnormal delay, signal activity during steady state, radiation dose, clock waveforms, etc.; exploitation of standard BIST, or implementation of BIST techniques specific to on-line testing (Transparent BIST, Built-In Concurrent Self-Test,...); exploitation of scan paths to transfer internal states for performing various tasks for on-line testing or fault tolerance; fail-safe techniques for VLSI, avoiding complex fail-safe interfaces using discrete components; radiation hardened designs, avoiding expensive fabrication process such as SOI, etc.
Gr&ouml;bner Bases and Multidimensional FIR Multirate Systems
Authors: Hyungju Park, Ton Kalker, Martin Vetterli
Venue: Multidimensional Systems and Signal Processing (1997)

The polyphase representation with respect to sampling lattices in multidimensional (M-D) multirate signal processing allows us to identify perfect reconstruction (PR) filter banks with unimodular Laurent polynomial matrices, and various problems in the design and analysis of invertible MD multirate systems can be algebraically formulated with the aid of this representation. While the resulting algebraic problems can be solved in one dimension (1-D) by the Euclidean Division Algorithm, we show that Gr&ouml;bner bases offers an effective solution to them in the M-D case.
A new optimization technique for improving resource exploitation and critical path minization
Authors: Birger Landwehr, Peter Marwedel
Venue: Proceedings of the 10th international symposium on System synthesis (1997)

This paper presents a novel approach for algebraic optimization of data-flow graphs in the domain of computationally intensive applications. The presented approach is based upon the paradigm of simulated evolution which has been proven to be a powerful method for solving large non-linear optimization problems. We introduce a genetic algorithm with a new chromosomal representation of data-flow graphs that serves as a basis for preserving the correctness of algebraic transformations and allows an efficient implementation of the genetic operators. Furthermore, we introduce a new class of hardware-related transformation rules which for the first time allow to take existing component libraries into account. The efficiency of our method is demonstrated by encouraging experimental results for several standard benchmarks.
Bandwidth-Optimal Complete Exchange on Wormhole-Routed 2D/3D Torus Networks: A Diagonal-Propagation Approach
Authors: Yu-Chee Tseng, Ting-Hsien Lin, Dhabaleswar K. Panda, Sandeep K. S. Gupta
Venue: IEEE Transactions on Parallel and Distributed Systems (1997)

All-to-all personalized communication, or complete exchange, is at the heart of numerous applications in parallel computing. Several complete exchange algorithms have been proposed in the literature for wormhole meshes. However, these algorithms, when applied to tori, cannot take advantage of wrap-around interconnections to implement complete exchange with reduced latency. In this paper, a new diagonal-propagation approach is proposed to develop a set of complete exchange algorithms for 2D and 3D tori. This approach exploits the symmetric interconnections of tori and allows to develop a communication schedule consisting of several contention-free phases. These algorithms are indirect in nature and they use message combining to reduce the number of phases (message start-ups). It is shown that these algorithms effectively use the bisection bandwidth of a torus which is twice that for an equal sized mesh, to achieve complete exchange in time which is almost half of the best known complete exchange time on an equal sized mesh. The effectiveness of these algorithms is verified through simulation studies for varying system and technological parameters. It is also demonstrated that synchronous implementations of these algorithms (by introducing barriers between phases) lead to reduced latency for complete exchange with large messages, while the asynchronous ones are better for smaller messages.
A lambda calculus of objects with self-inflicted extension
Authors: Pietro Di Gianantonio, Furio Honsell, Luigi Liquori
Venue: ACM SIGPLAN Notices (1998)

In this paper we investigate, in the context of functional prototype-based languages, objects which might extend themselves upon receiving a message. The possibility for an object of extending its own "self", referred to by Cardelli, as a self-inflicted operation, is novel in the context of typed object-based languages. We present a sound type system for this calculus which guarantees that evaluating a well-typed expression will never yield a message-not-found run-time error. We give several examples which illustrate the increased expressive power of our system with respect to existing calculi of objects. The new type system allows also for a flexible width-subtyping, still permitting sound method override, and a limited form of object extension. The resulting calculus appears to be a good starting point for a rigorous mathematical analysis of class-based languages.
The M-Matrix Group Generalized Inverse Problem for Weighted Trees
Authors: Stephen J. Kirkland, Michael Neumann
Venue: SIAM Journal on Matrix Analysis and Applications (1998)

We characterize all weighted trees whose Laplacian has a group inverse which is an M-matrix. Actually, only a very narrow set of weighted trees yields such Laplacians. Our investigation involves analyzing circumstances under which a certain Z-matrix, derived from the tree and whose order is one less than the number of vertices in the tree, is an M-matrix. Our work here is motivated by a recent paper of Styan and Subak-Sharpe [ Linear Algebra Appl., 250 (1997), pp. 349--370] and by an earlier question of Deutsch and Neumann [ J. Math. Anal. Appl., 102 (1984), pp. 1--29].
Highly Continuous Interpolants for One-Step ODE Solvers and their Application to Runge--Kutta Methods
Authors: S. N. Papakostas, Ch. Tsitouras
Venue: SIAM Journal on Numerical Analysis (1997)

We suggest a general method for the construction of highly continuous interpolants for one-step methods applied to the numerical solution of initial value problems of ODEs of arbitrary order. For the construction of these interpolants one uses, along with the numerical data of the discrete solution of a problem provided by a typical one-step method at endstep points, high-order derivative approximations of this solution. This approach has two main advantages. It allows an easy way of construction of high-order Runge--Kutta and Nystrom interpolants with reduced cost in additional function evaluations that also preserve the one-step nature of the underlying discrete ODE solver. Moreover, for problems which are known to possess a solution of high smoothness, the approximating interpolant resembles this characteristic, a property that on occasion might be desirable. An analysis of the stability behavior of such interpolatory processes is carried out in the general case. A new numerical technique concerning the accurate determination of the stability behavior of numerical schemes involving higher order derivatives and/or approximations of the solution from previous grid-points over nonequidistant meshes is presented. This technique actually turns out to be of a wider interest, as it allows us to infer, in certain cases, more accurate results concerning the stability of, for example, the BDF formulas over variable stepsize grids. Moreover it may be used as a framework for analyzing more complex (and supposedly more promising) types of methods, as they are the general linear methods for first- and second-order differential equations. Many particular variants of the new method for first-order differential equations that have good prospects of finding a practical implementation are fully analyzed with respect to their stability characteristics. A detailed application concerning the construction of $C^2$ and $C^3$ continuous extensions for some fifth- and sixth-order Runge--Kutta pairs, supplemented by a detailed study of the local truncation error characteristics of a class of interpolants of this type, is also provided. Various numerical examples show, in these cases, several advantages of the newly proposed technique with respect to function evaluation cost and global error behavior, in comparison with others currently in use.
STAMPS: a state-machine based processor simulator
Authors: Mike Livesey
Venue: ACM SIGCSE Bulletin (1997)

This paper describes the STAMPS software workbench that supports Honours level computer architecture teaching. STAMPS was developed in response to a need perceived from experience of such teaching. It is a hierarchically structured CPU simulator that can be customised to any architecture and implementation of that architecture.STAMPS is written as a Tcl/wish application. Tcl facilitates interaction with the file system, simple naming conventions and highly flexible user interaction. STAMPS runs on any Unix platform.
Achieving bounded fairness for multicast and TCP traffic in the Internet
Authors: Huayan Amy Wang, Mischa Schwartz
Venue: ACM SIGCOMM Computer Communication Review (1998)

There is an urgent need for effective multicast congestion control algorithms which enable reasonably fair share of network resources between multicast and unicast TCP traffic under the current Internet infrastructure. In this paper, we propose a quantitative definition of a type of bounded fairness between multicast and unicast best-effort traffic, termed "essentially fair". We also propose a window-based Random Listening Algorithm (RLA) for multicast congestion control. The algorithm is proven to be essentially fair to TCP connections under a restricted topology with equal round-trip times and with phase effects eliminated. The algorithm is also fair to multiple multicast sessions. This paper provides the theoretical proofs and some simulation results to demonstrate that the RLA achieves good performance under various network topologies. These include the performance of a generalization of the RLA algorithm for topologies with different round-trip times.