ppxscal/embedding_network huggingface dataset:
Evaluating video as a technology for informal communication
Authors: Robert S. Fish, Robert E. Kraut, Robert W. Root, Ronald E. Rice
Venue: Proceedings of the SIGCHI conference on Human factors in computing systems (1992)

Collaborations in organizations thrive on communication that is informal because informal communication is frequent, interactive, and expressive. Informal communication is crucial for the coordination of work, learning an organization's culture, the perpetuation of the social relations that underlie collaboration, and, in general, any situation that requires communication to resolve ambiguity. Informal communication is traditionally mediated by physical proximity, but physical proximity cannot mediate in geographically distributed organizations. The research described here evaluates the adequacy of a version of a desktop video/audio conferencing system for supporting informal communication in a research and development laboratory. The evaluation took place during a trial in which the system was used by summer employees and their supervisor-mentors. While the system was used frequently, the most common uses and users' assessments suggest that it was used more like a telephone or electronic mail than like physically mediated face-to-face communication. However, some features of its use transcended traditional media and allowed users to gain awareness of their work environment. The paper concludes with a discussion of requirements for successful technology to support informal communication.
Improving instruction cache behavior by reducing cache pollution
Authors: Rajiv Gupta, Chi-Hung Chi
Venue: Proceedings of the 1990 ACM/IEEE conference on Supercomputing (1990)

In this paper we describe compiler techniques for improving instruction cache performance. Through repositioning of the code in main memory, leaving memory locations unused, code duplication, and code propagation, the effectiveness of the cache can be improved due to reduced cache pollution and fewer cache misses. Results of experiments indicate that significant reduction in bus traffic results from the use of these techniques. Since memory bandwidth is a critical resource in shared memory multiprocessors, such systems can benefit from the techniques described. The notion of control dependence is used to decide when instructions belonging to different basic blocks can be allowed to share the same cache line without increasing cache pollution.
A transistor reordering technique for gate matrix layout
Authors: Uminder Singh, C. Y. Roger Chen
Venue: Proceedings of the 27th ACM/IEEE Design Automation Conference (1991)

An algorithm is introduced which uses logic equations to determine a gate sequence and a set of nets which optimize the gate matrix layout area. Using logic equations allows the reordering of transistors in a completely general manner. Previous works using net-lists and the concept of delayed binding performed only a small subset of the reordering possible with the proposed algorithm. The algorithm has a time complexity of &Ogr;(E log E) for a design with E equations. The experimental results show a considerable reduction in layout area.
On Piecewise-Linear Classification
Authors: Gabor T. Herman, K. T. Daniel Yeung
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1992)

The authors make use of a real data set containing 9-D measurements of fine needle aspirates of a patient's breast for the purpose of classifying a tumor's malignancy for which early stopping in the generation of the separating hyperplanes is not appropriate. They compare a piecewise-linear classification method with classification based on a single linear separator. A precise methodology for comparing the relative efficacy of two classification methods for a particular task is described and is applied to the comparison on the breast cancer data of the relative performances of the two versions of the piecewise-linear classifier and the classification based on an optimal linear separator. It is found that for this data set, the piecewise-linear classifier that uses all the hyperplanes needed to separate the training set outperforms the other two methods and that these differences in performance are significant at the 0.001 level. There is no statistically significant difference between the performance of the other two methods. The authors discuss the relevance of these results for this and other applications.
A multi-level parallelism architecture
Authors: Theo Ungerer, Eberhard Zehendner
Venue: ACM SIGARCH Computer Architecture News (1991)

This paper describes a parallel programming language and a multi-level parallelism computer architecture, which have been developed by an integrated design process.The ASTOR language is an imperative intermediate language that combines parallel control constructs with a concise module concept. The ASTOR architecture is directed towards reliable execution of programs written in the ASTOR language, utilizing five levels of parallelism expressed by the language constructs. Structure preservation has been applied as a major design principle. The architecture can be characterized as a message passing multiprocessor whose nodes consist of decoupled program flow control and data object processing parts, executing by token-passing similar to large-grain data flow architectures.
Facilitating the exploration of interface design alternatives: the HUMANOID model of interface design
Authors: Pedro Szekely, Ping Luo, Robert Neches
Venue: Proceedings of the SIGCHI conference on Human factors in computing systems (1992)

HUMANOID is a user interface design tool that lets designers express abstract conceptualizations of an interface in an executable form, allowing designers to experiment with scenarios and dialogues even before the application model is completely worked out. Three properties of the HUMANOID approach allow it to do so: a modularization of design issues into independent dimensions, support for multiple levels of specificity in mapping application models to user interface constructs, and mechanisms for constructing executable default user interface implementations from whatever level of specificity has been provided by the designer.
Interactive problem solving and dialogue in the ATIS domain
Authors: Stephanie Seneff, Lynette Hirschman, Victor W. Zue
Venue: Proceedings of the workshop on Speech and Natural Language (1991)

This paper describes the present status of the discourse and dialogue models within the MIT ATIS system, extended to support the notion of booking a flight. The discourse model includes not only the resolution of explicit anaphoric references, but also indirect and direct references to information mentioned earlier in the conversation, such as a direct reference to an entry in a previously displayed table or an indirect reference to a date, as in "the following Thursday." The system keeps a history table containing objects such as flights and dates, represented as semantic frames, as well as the active ticket, previously booked tickets, and previously displayed tables. During flight reservations scenarios, the system monitors the state of the ticket (which is displayed to the user), making sure that all information is complete (by querying the user) before allowing a booking. It may even initiate calls to the database to provide additional unsolicited information as appropriate. We have collected several dialogues of subjects using the system to make reservations, and from these, we are learning how to design better dialogue models.
Digital media and the law
Authors: Pamela Samuelson
Venue: Communications of the ACM (1991)

Over the past two years, I have written seven &ldquo;Legally Speaking&rdquo; columns and one feature article for Communications about legal issues affecting computing professionals. These writings have covered an array of legal topics including: criminal and civil liability for hackers who breach computer security systems; first amendment issues arising in computing or electronic publishing markets; intellectual property issues, such as patent protection for computer program algorithms; copyright protection for look and feel of user interfaces; what the user interface design field thinks about such protection, and various theories by which a firm might claim to own interface specification information for software systems.
Rigel: An Inductive Learning System
Authors: Roberto Gemello, Franco Mana, Lorenza Saitta
Venue: Machine Learning (1991)

This paper is aimed at showing the benefits obtained by explicitly introducing a priori control knowledge into the inductive process. The starting point is Michalski's Induce system, which has been modified and augmented. Although the basic philosophy has been changed as little as possible, Induce has been radically modified from the algorithmic point of view, resulting in the new learning system Rigel. The main ideas taken from Induce are the sequential learning of descriptions of each concept against all the others, the Covering algorithm, the Star definition, and the VL2 representation language. The modifications consist of a new way of computing the Star, the use of a separate body of heuristic knowledge to strongly direct the search, the implementation of a larger subset of the VL2 language, a reasoned way of selecting the seed, and the use of rules to evaluate the worthiness of the inductive assertions. The effectiveness of Rigel has been tested both on artificial and on real-world case studies.
An iconic description language: programming support for data structure visualization
Authors: Kudang B. Seminar, Robert N. Robson
Venue: ACM SIGCHI Bulletin (1990)

An icon description language, named DSIL (Data Structure Iconic Language), is described which facilitates the design of icons depicting data structures and accelerates the development of iconic interfacing tools for program visualization and debugging. By using the DSIL, different users can define or redefine their own icons to satisfy their needs. The DSIL has features of modern programming languages. It is hierarchical, modular, and provides adoption (inheritance). The design of the DSIL is based on the features of data structures in MODULA-2. The implementation of the DSIL in a data structure editor is presented.
On computing per-session performance bounds in high-speed multi-hop computer networks
Authors: Jim Kurose
Venue: Proceedings of the 1992 ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems (1992)

We present a technique for computing upper bounds on the distribution of individual per-session performance measures such as delay and buffer occupancy for networks in which sessions may be routed over several &ldquo;hops.&rdquo; Our approach is based on first stochastically bounding the distribution of the number of packets (or cells) which can be generated by each traffic source over various lengths of time and then &ldquo;pushing&rdquo; these bounds (which are then shown to hold over new time interval lengths at various network queues) through the network on a per-session basis. Session performance bounds can then be computed once the stochastic bounds on the arrival process have been characterized for each session at all network nodes. A numerical example is presented and the resulting distributional bounds compared with simulation as well as with a point-valued worst-case performance bound.
Architectural Support for Goal Management in Flat Concurrent Prolog
Authors: Leon Alkalaj, Tomás Lang, Milǒs D. Ercegovac
Venue: Computer (1992)

A special-purpose architectural support that reduces the goal-management execution time in flat concurrent Prolog (FCP) is described. The architectural support consists of a dedicated goal-management unit that executes high-level goal-management operations concurrently with goal-reduction operations. The efficient execution of goal-management instructions is realized using a goal cache that stores recently spawned goals. It is shown that operations such as goal-switching, spawning, and halting are efficiently performed by changing their status in the goal cache. More complex operations, such as goal suspension and activation are decoupled from goal reduction by using two suspension tables and activation queues. Using an analytic performance model, it is shown that, for the systems development workload, which consists of large FCP programs, the overhead of software-implemented goal management is 50% of the program execution time. This is reduced up to 3% using the goal-management unit and the goal cache, resulting in a speedup of almost 2. The results are generalized for other workloads that exhibit different goal-management complexities.
The impact of time on the session problem
Authors: Injong Rhee, Jennifer L. Welch
Venue: Proceedings of the eleventh annual ACM symposium on Principles of distributed computing (1992)

The session problem is an abstraction of synchronization problems in distributed systems. It has been used as a test-case to demonstrate the differences in the time needed to solve problems in various timing models, for both shared memory (SM) systems [2] and message-passing (MP) systems [4]. In this paper, the session problem continues to be used to compare timing models quantitatively. The session problem is studied in two new timing models, the periodic and sporadic. Both SM and MP systems are considered. In the periodic model, each process takes steps at a constant unknown rate; different processes can have different rates. In the sporadic model, there exists a lower bound but no upper bound one step time, and message delay is bounded. We show upper and lower bounds on the time complexity of the session problem for these models. In addition, upper and lower bounds on running time are presented for the semi-synchronous SM model, closing an open problem from [4]. Our results suggest a hierarchy of various timing models in terms of time complexity for the session problem.
Vote Assignments in Weighted Voting Mechanisms
Authors: Zhijun Tong, Richard Y. Kain
Venue: IEEE Transactions on Computers (1991)

It is shown that voting can provide the maximum reliability if all nodes have reliability p¿0.5. Thus, a system designer only needs to consider vote assignments in implementing mutual exclusion mechanisms. Some effective vote assignment algorithms are proposed. Neglecting link failures, it is found that the voting weight for each node can be determined by computing a logarithmic function of local information. Voting operations are formally defined, and an optimization objection function is formulated. A sufficient condition for optimal vote assignment and optimal sets of groups is presented, and it is shown that predefining a set of groups to achieve mutual exclusion is not feasible for a large system. Some algorithms generating optimal or suboptimal assignments for systems with perfect links are proposed. Some variations for systems with imperfect links are discussed, along with some comparisons of the new algorithms against previous algorithms proposed for the problem.
ConstraintLisp: an object-oriented constraint programming language
Authors: Bing Liu, Yuen-Wah Ku
Venue: ACM SIGPLAN Notices (1992)

ConstraintLisp is an object-oriented constraint programming language. It is based on the constraint satisfaction problem (CSP) model in Artificial Intelligence and the object-oriented technology. This integration provides both the declarative representation and efficiency of constraint solving of constraint programming, and the powerful problem modelling capability, maintainability, reusability and extensibility of the object-oriented technology. ConstraintLisp is aimed at providing practical solutions to real life constrained search problems such as scheduling, resource allocation, etc. It is also designed and implemented in an object-oriented approach.
Architectural and implementation tradeoffs in the design of multiple-context processors (abstract)
Authors: James Laudon, Anoop Gupta, Mark Horowitz
Venue: ACM SIGARCH Computer Architecture News (1992)

We examine two multiple-context schemes in the context of scalable shared-memory multiprocessors. The blocked scheme switches between contexts at cache misses. The proposed interleaved scheme switches between available contexts on a cycle-by-cycle basis, while providing full pipeline interlocks for good single-context performance. We show the interleaved scheme to have a performance advantage over the blocked scheme due to its ability to hide pipeline dependencies and reduce the context switch cost. We also show that, while the implementation of the interleaved scheme is more complex, this complexity is not overwhelming.
L-one-two-three (L1:..L2:..L3:) considered harmful
Authors: F. H. D. van Batenburg
Venue: ACM SIGAPL APL Quote Quad (1991)

It is said by non-APL-programmers that APL code is hard to read and that it is unstructured. Here we argue that APL-programmers may refute this assertion by pointing out some misunderstandings, but admittedly a final analysis will show a deeper truth in these criticisms. We will show that APL gives ample opportunity for unstructured code. Two proposals are presented to address this problem.The first rejects the developed convention for labelling and suggests the adoption of a proper style of programming enforced by a new standard of labelling. This standard will abolish unstructured code. Both negative and positive aspects of this proposal are discussed.The second proposal revives an old idea of introducing one single proper control structure into the language. This would make the current jump ( rarr;) superfluous and enforce structured code.
Analysis of the generalized clock buffer replacement scheme for database transaction processing
Authors: Victor F. Nicola, Asit Dan, Daniel M. Dias
Venue: Proceedings of the 1992 ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems (1992)

The CLOCK algorithm is a popular buffer replacement algorithm because of its simplicity and its ability to approximate the performance of the Least Recently Used (LRU) replacement policy. The Generalized Clock (GCLOCK) buffer replacement policy uses a circular buffer and a weight associated with each page brought in buffer to decide on which page to replace. We develop an approximate analysis for the GCLOCK policy under the Independent Reference Model (IRM) that applies to many database transaction processing workloads. We validate the analysis for various workloads with data access skew. Comparison with simulations shows that in all cases examined the error is extremely small (less than 1%). To show the usefulness of the model we apply it to a Transaction Processing Council benchmark A (TPC-A) like workload. If knowledge of the different data partitions in this workload is assumed, the analysis shows that, with appropriate choice of weights, the performance of the GCLOCK algorithm can be better than the LRU policy. Performance very close to that for optimal (static) buffer allocation can be achieved by assigning sufficiently high weights, and can be implemented with a reasonably low overhead. Finally, we outline how the model can be extended to capture the effect of page invalidation in a multinode system.
The ATIS spoken language systems pilot corpus
Authors: Charles T. Hemphill, John J. Godfrey, George R. Doddington
Venue: Proceedings of the workshop on Speech and Natural Language (1990)

Speech research has made tremendous progress in the past using the following paradigm: bull; define the research problem, bull; collect a corpus to objectively measure progress, and bull; solve the research problem.Natural language research, on the other hand, has typically progressed without the benefit of any corpus of data with which to test research hypotheses. We describe the Air Travel Information System (ATIS) pilot corpus, a corpus designed to measure progress in Spoken Language Systems that include both a speech and natural language component. This pilot marks the first full-scale attempt to collect such a corpus and provides guidelines for future efforts.
Analyzing algorithms by simulation: variance reduction techniques and simulation speedups
Authors: Catherine McGeoch
Venue: ACM Computing Surveys (CSUR) (1992)

Although experimental studies have been widely applied to the investigation of algorithm performance, very little attention has been given to experimental method in this area. This is unfortunate, since much can be done to improve the quality of the data obtained; often, much improvement may be needed for the data to be useful. This paper gives a tutorial discussion of two aspects of good experimental technique: the use of variance reduction techniques and simulation speedups in algorithm studies. In an illustrative study, application of variance reduction techniques produces a decrease in variance by a factor 1000 in one case, giving a dramatic improvement in the precision of experimental results. Furthermore, the complexity of the simulation program is improved from &THgr;mn/Hn) to &THgr;(m + n log n) (where m is typically much larger than n), giving a much faster simulation program and therefore more data per unit of computation time. The general application of variance reduction techniques is also discussed for a variety of algorithm problem domains.
A performance study of memory consistency models
Authors: Richard N. Zucker, Jean-Loup Baer
Venue: Proceedings of the 19th annual international symposium on Computer architecture (1992)

Recent advances in technology are such that the speed of processors is increasing faster than memory latency is decreasing. Therefore the relative cost of a cache miss is becoming more important. However, the full cost of a cache miss need not be paid every time in a multiprocessor. The frequency with which the processor must stall on a cache miss can be reduced by using a relaxed model of memory consistency. In this paper, we present the results of instruction-level simulation studies on the relative performance benefits of using different models of memory consistency. Our vehicle of study is a shared-memory multiprocessor with processors and associated write-back caches connected to global memory modules via an Omega network. The benefits of the relaxed models, and their increasing hardware complexity, are assessed with varying cache size, line size, and number of processors. We find that substantial benefits can be accrued by using relaxed models but the magnitudes of the benefits depend on the architecture being modeled, the benchmarks, and how the code is scheduled. We did not find any major difference in levels of improvement among the various relaxed models.
Distributed Database Systems: Where Are We Now?
Authors: M. Tamer Özsu, Patrick Valduriez
Venue: Computer (1991)

The authors explain what is meant by a distributed database system and discuss its characteristics. They survey the state of distributed database technology, focusing on how well products meet the goals of transparent management of distributed and replicated data, reliability through distributed transactions, better performance, and easier, more economical system expansion. They then consider unsolved problems with regard to network scaling, distribution design, distributed query processing, distributed transaction processing, integration with distributed operating systems, and distributed multidatabase systems.
Errors in computerized office work: differences between novice and expert users
Authors: Jochen Prümper, Michael Frese, Dieter Zapf, Felix C. Brodbeck
Venue: ACM SIGCHI Bulletin (1991)

This paper deals with errors by novices and experts when interacting with the computer in normal office work. Three criteria are discussed to determine the level of expertise: a) total length of time that the user has worked computers, b) number of programs known, and c) length of daily work-time with the computer. In contrast to widespread assumptions, experts did not make less errors than novices (except knowledge errors). On the other hand, experts spent less time handling the errors than novices. A cluster analysis produced groups of Occasional-, Frequent-, Beginning- and General Users in the work force.