ppxscal/embedding_network huggingface dataset:
Improving the Reliability of Artificial Intelligence Planning Systems by Analyzing their Failure Recovery
Authors: Adele E. Howe
Venue: IEEE Transactions on Knowledge and Data Engineering (1995)

As planning technology improves, Artificial Intelligence planners are being embedded in increasingly complicated environments: ones that are particularly challenging even for human experts. Consequently, failure is becoming both increasingly likely for these systems (due to the difficult and dynamic nature of the new environments) and increasingly important to address (due to the systems¿ potential use on real world applications). This paper describes the development of a failure recovery component for a planner in a complex simulated environment and a procedure (called Failure Recovery Analysis) for assisting programmers in debugging that planner. The failure recovery design is iteratively enhanced and evaluated in a series of experiments. Failure Recovery Analysis is described and demonstrated on an example from the Phoenix planner. The primary advantage of these approaches over existing approaches is that they are based on only a weak model of the planner and its environment, which makes them most suitable when the planner is being developed. By integrating them, failure recovery and Failure Recovery Analysis improve the reliability of the planner by repairing failures during execution and identifying failures due to bugs in the planner and failure recovery itself.
Sperner theory in a difference of boolean lattices
Authors: Mark L. Logan
Venue: Discrete Mathematics (2002)

Consider any sets x ⊆ y ⊆ {1,...,n}. Remove the interval [x, y] = {z ⊆ y|x ⊆ z} from the Boolean lattice of all subsets of {1,...,n}. We show that the resulting poset, ordered by inclusion, has a nested chain decomposition and has the normalized matching property. We also classify the largest antichains in this poset. This generalizes results of Griggs, who resolved these questions in the special case x = θ.
Closed Form Solutions for Bus and Tree Networks of Processors Load Sharing a Divisible Job
Authors: S. Bataineh, Te-Yu Hsiung, T. G. Robertazzi
Venue: IEEE Transactions on Computers (1994)

Optimal load allocation for load sharing a divisible job over processors interconnected in either a bus or a tree network is considered. The processors are either equipped with front-end processors or not so equipped. Closed form solutions for the minimum finish time and the optimal data allocation for each processor are obtained. The performance of large symmetric tree networks is examined by aggregating the component links and processors into a single equivalent processor. This allows an easy examination of large tree networks. In addition, it becomes possible to find a closed form solution for the optimal amount of data that is to be assigned to each processor in the tree network in order to achieve the minimum finish time.
Categorization and Analysis of Pain and Activity in Patients with Low Back Pain Using a Neural Network Technique
Authors: John J. Liszka-Hackzell, David P. Martin
Venue: Journal of Medical Systems (2002)

Low back pain represents a significant medical problem, both in its prevalence and its cost to society. Most episodes of acute low back pain resolve without significant long-term functional impact. However, a minority of patients experience extended chronic pain and disability. In this paper, we have explored new techniques of patient assessment that may prospectively identify this minority of patients at risk of developing poor outcomes. We studied 15 patients with acute low back pain and 25 patients with chronic low back pain over 4 month's time. Patients monitored their pain and activity levels continuously over the first 3 weeks. Pain and functional status were assessed at baseline and at 3 weeks following enrollment. Follow-up assessment of functional status and progress were performed at 2 and 4 months. The pain and activity levels were categorized using a self-organizing-map neural network. A back-propagation neural network was trained with the categorization and outcome data. There was a good correlation between the true and predicted values for general health (r &equals; 0.96, p < 0.01) and mental health (r &equals;0.80, p < 0.01). No significant correlation was found if activity and pain data were not entered into the analysis. Our results show that neural network techniques can be applied effectively to categorizing patients with acute and chronic low back pain. It is our hope that future research will allow these categorizations to be tied to prognostic and therapeutic decisions in patients who present with episodes of back pain.
Agent Communication Languages: Rethinking the Principles
Authors: Munindar P. Singh
Venue: Computer (1998)

In the true sense of the word, an agent is a persistent computation that can perceive its environment and reason and act both alone and with other agents. The key concepts in this definition are interoperability and autonomy. These concepts set agents apart from conventional objects, which always fulfill any methods invoked on them. Agents, in contrast, should be able to refuse an action. Thus, agents must be able to talk to each other to decide what information to retrieve or what physical action to take, such as shutting down an assembly line. The mechanism for this exchange is the agent communication language (ACL). Theoretically, an ACL should let heterogeneous agents communicate. None currently do: Although ACLs are being used in proprietary multiagent applications, nonproprietary agents cannot interoperate. The author agrees with those who lay the fault for this on the lack of a formal semantics. However, he is not convinced that the existing work on ACL semantics is heading in the right direction. Current work, he argues, is repeating the past mistake of emphasizing mental agency-the supposition that agents should be understood primarily in terms of mental concepts, such as beliefs and intentions. This approach supposes, in essence, that agents can read each other's minds. This supposition has never held for people, and for the same reason, it will not hold for agents. In this article, the author explains why an ACL's formal semantics should emphasize social agency. This approach recognizes that communication is inherently public, and thus depends on the agent's social context.
Predicting and Precluding Problems with Memory Latency
Authors: Keith Boland, Apostolos Dollas
Venue: IEEE Micro (1994)

By examining the rate at which successive generations of processor and DRAM cycle times have been diverging over time, we can track the latency problem of computer memory systems. Our research survey starts with the fundamentals of single-level caches and moves to the need for multilevel cache hierarchies. We look at some of the current techniques for boosting cache performance, especially compiler-based methods for code restructuring and instruction and data prefetching. These two areas will likely yield improvements for a much larger domain of applications in the future.
Relative Debugging of Automatically Parallelized Programs
Authors: Gabriele Jost, Robert Hood
Venue: Automated Software Engineering (2003)

We describe a system that simplifies the process of debugging programs produced by computer-aided parallelization tools. The system uses relative debugging techniques to compare serial and parallel executions in order to show where the computations begin to differ. If the original serial code is correct, errors due to parallelization will be isolated by the comparison.One of the primary goals of the system is to minimize the effort required of the user. To that end, the debugging system uses information produced by the parallelization tool to drive the comparison process. In particular, the debugging system relies on the parallelization tool to provide information about where variables may have been modified and how arrays are distributed across multiple processes. User effort is also reduced through the use of dynamic instrumentation. This allows us to modify the program execution without changing the way the user builds the executable. The use of dynamic instrumentation also permits us to compare the executions in a fine-grained fashion and only involve the debugger when a difference has been detected. This reduces the overhead of executing instrumentation.
A Spanning Multichannel Linked Hypercube: A Gradually Scalable Optical Interconnection Network for Massively Parallel Computing
Authors: Ahmed Louri, Brent Weech, Costas Neocleous
Venue: IEEE Transactions on Parallel and Distributed Systems (1998)

A new, scalable interconnection topology called the Spanning Multichannel Linked Hypercube (SMLH) is proposed. This proposed network is very suitable to massively parallel systems and is highly amenable to optical implementation. The SMLH uses the hypercube topology as a basic building block and connects such building blocks using two-dimensional multichannel links (similar to spanning buses). In doing so, the SMLH combines positive features of both the hypercube (small diameter, high connectivity, symmetry, simple routing, and fault tolerance) and the spanning bus hypercube (SBH) (constant node degree, scalability, and ease of physical implementation), while at the same time circumventing their disadvantages. The SMLH topology supports many communication patterns found in different classes of computation, such as bus-based, mesh-based, and tree-based problems, as well as hypercube-based problems. A very attractive feature of the SMLH network is its ability to support a large number of processors with the possibility of maintaining a constant degree and a constant diameter. Other positive features include symmetry, incremental scalability, and fault tolerance. It is shown that the SMLH network provides better average message distance, average traffic density, and queuing delay than many similar networks, including the binary hypercube, the SBH, etc. Additionally, the SMLH has comparable performance to other high-performance hypercubic networks, including the Generalized Hypercube and the Hypermesh. An optical implementation methodology is proposed for SMLH. The implementation methodology combines both the advantages of free space optics with those of wavelength division multiplexing techniques. A detailed analysis of the feasibility of the proposed network is also presented.
Boundary-Scan Update: IEEE P1149.2 Description and Status Report
Authors: Bulent Dervisoglu
Venue: IEEE Design Test (1992)

The IEEE P1149.2 Working Group is developing a standard that supports boundary scan for board-level interconnect testing and supports internal scan for device- or board-level component testing. The group's overall objective is to establish minimal mandatory features that are adaptable to individual applications. P1149.2's current status and the most recent proposals being considered for the standard are described.
Leveraging Resources in Global Software Development
Authors: Robert D. Battin, Ron Crocker, Joe Kreidler, K. Subramanian
Venue: IEEE Software (2001)

When a team of Motorola engineers from six countries developed software for a business-critical project, they were faced with global development issues they had to resolve to successfully deliver the product to their customer. The authors discuss their experiences resolving these issues and provide recommendations to others facing similar challenges.
Information Appliances: Gadget Netopia
Authors: Ted Lewis
Venue: Computer (1998)

With the convergence of so many disparate technologies over the past few years, it makes sense that we are now seeing PC descendants emerge as a breed of entirely new products that use their inherited technologies in innovative ways. These inherited technologies include wireless connectivity, Internet access, and ultraportability. The combination of these and other technologies is forming a new class of devices known as Information Appliances (IAs). IAs-a class of products that also includes Web-enabled TVs-are related to desktop computers, but unlike network computers (NCs), IAs aren't crippled PCs. IAs are a separate class of devices defining new sets of applications. In fact, they are defining several new categories of computing. Initially, these devices will add functionality to the two killer apps of consumer electronics: television and e-mail. Eventually, however, they will pull away from the more obvious extensions-like wireless handhelds and e-mail-enabled cellular phones-and find their way into cars, wristwatches, kitchen appliances, and just about anything else that can be made more useful by extending typical capabilities with new technology. Will everything-television, telephone, wristwatch, car, VCR, and pocketbook- become an IA? Yes, but not as soon as some people think. The challenge for vendors is how to design and manufacture extremely easy-to-use yet sophisticated devices at price points that will attract the masses. The technical hurdles are great and the market risks are clear, but the rewards will be huge. This tension is perfect for fomenting the next revolution in computing.
Design Verification of FPGA Implementations
Authors: Xiao-Tao Chen, Wei-Kang Huang, Nohpill Park, Fred J. Meyer, Fabrizio Lombardi
Venue: IEEE Design Test (1999)

This paper presents an approach to design verification of digital circuits implemented with field programmable gate arrays (FPGAs). This approach is based on the criterion of an equivalent class to establish the equivalence between two circuits and designs. This objective is achieved using simulation and automatic test pattern generation (ATPG) and it exploits similarities among designs to assess logical equivalence in a fast and reliable manner. Initially, design information is used for establishing the location of the nodes (internal as well as primary inputs and outputs) from which dynamic signatures are then obtained using simulation. Nodes with the same signature make up a so-called equivalent class, which is updated using the simulation results as well as the outcome of the verification process. A dynamic modification of the signatures and an appropriate data structure for taking into account the outcome of each simulation run, are presented. The complexity of the proposed approach is O(n) ATPG time (with circuit simulation) or O (nk)ATPG time (without circuit simulation), where n is the number of nodes in the circuit and k is the maximum size of the equivalent class (usually a constant and k ! n). This compares favourably with [1] which has a complexity of O (n2)ATPG time. \par It is shown that equivalent nodes must remain in the same equivalent class, else equivalence in design is not possible. The proposed approach has been evaluated using industrial circuits and has been shown to yield excellent results for verifying circuits implemented using various FPGA families by Actel.
Virtual Organization: The New Feudalism
Authors: Abbe Mowshowitz
Venue: Computer (2001)

Computing professionals are uniquely positioned to play a pivotal role in shaping the engine that will drive the move to a new feudalism.
Cooperative Robust Estimation Using Layers of Support
Authors: Trevor Darrell, Alex P. Pentland
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1995)

We present an approach to the problem of representing images that contain multiple objects or surfaces. Rather than use an edge-based approach to represent the segmentation of a scene, we propose a multilayer estimation framework which uses support maps to represent the segmentation of the image into homogeneous chunks. This support-based approach can represent objects that are split into disjoint regions, or have surfaces that are transparently interleaved. Our framework is based on an extension of robust estimation methods that provide a theoretical basis for support-based estimation. We use a selection criteria derived from the Minimum Description Length principle to decide how many support maps to use in describing an image. Our method has been applied to a number of different domains, including the decomposition of range images into constituent objects, the segmentation of image sequences into homogeneous higher-order motion fields, and the separation of tracked motion features into distinct rigid-body motions.
Effect of annealing on the microstructure of ultrathin tungsten nitride diffusion barriers for copper metallization
Authors: M. Hecker, R. Hübner, R. Ecke, S. Schulz, H.-J. Engelmann, H. Stegmann, V. Hoffmann, N. Mattern, T. Gessner, E. Zschech
Venue: Microelectronic Engineering (2002)

Microstructure, phase composition and interface properties of 10- and 50-mm thick CVD-deposited W-N layers covered with Cu were investigated. Phase formation and structural changes of the layer stacks occurring at elevated temperatures (450-600 °C) were correlated. The initially amorphous barriers undergo an abrupt crystallization between 550 °C/1 h and 600 °C/1 h anneals in vacuum. Further annealing at 600 °C up to 16 h leads to changes in the layer configuration such as N redistribution and Cu agglomeration. No signs of significant Cu diffusion through the barriers were observed for the performed anneals up to 600 °C/16 h.
1994 Gordon Bell Prize Winners
Authors: Alan H. Karp, Michael Heath, Don Heller, Horst Simon
Venue: Computer (1995)

The Gordon Bell Prize recognizes outstanding achievements in the application of parallel processing to practical scientific and engineering problems. In 1994, finalists were named for work in two categories: performance, which recognizes those who solved a real problem in less elapsed time than anyone else, and price/performance, which encourages the development of cost- effective supercomputing. For the first time in the competition, performance numbers in fractions of a teraflop were reported. Gordon Bell, a former National Science Foundation division director and now an independent consultant who sponsors the prize, was so pleased that he doubled the performance awards. This article describes the work of the finalists and explains the problems that were solved, obstacles that were overcome, and methods that were used. The prizes are intended to spur the transition of parallel processing from computer science research to useful applications.
The AT&T WE32200 Design Challenge
Authors: Victor K. L. Huang, James W. Seery, William S. Wu, Saul K. Altabet, Michael J. Killian, Simeon Aymeloglu, Thaddeus J. Gabara, Aaron L. Fisher, Inseok S. Hwang, David W. Thompson
Venue: IEEE Micro (1989)

The authors describe the performance features of the 32-bit WE32200 microprocessor and the approach they used to meet the performance goals. They then discuss the following: functional partitioning; the expanded register set; the extended instruction set; operating system support; addressing modes; arbitrary byte alignment; dynamic bus sizing; circuits; and timing and analysis.
Component Assembly for OO Distributed Systems
Authors: Guijun Wang, Liz Ungar, Dan Klawitter
Venue: Computer (1999)

Software development that assembles prefabricated components faces different challenges than development that starts from scratch with programming constructs. For example, it is often impossible, or at least not economical, to change the source code of components from independent suppliers. But how do you assemble the components without doing that? How do you link them with the services they require? And how do you build a distributed system and ensure system-wide security, performance, and fault tolerance without breaking the system? These are just some of the issues that designers face when using prefabricated components in a distributed system. Object-oriented distributed systems pose some specific problems. Objects communicate by invoking methods on other objects, so they must maintain static information, such as class or interface names. Thus, objects may have strong dependencies, not only on each other but also on outside services. Distributed systems built from prefabricated components require an assembly approach that separates architecture, component, and distributed object infra-structure concerns.
Database Reusability in Intelligent Medical Systems
Authors: Tatjana Welzer, Ivan Rozman, Marjan Družovec, Romana Vajde Horvat, Iztok Takač, Boštjan Brumen
Venue: Journal of Medical Systems (2001)

Reuse or reusability is not a specific, algorithmic, heuristic or only a simple set of guidelines. Database reuse means the use of an existing component&mdash;a database entity&mdash;in a new context, either elsewhere in the same system or in another system. According to different definitions, an intelligent system is a &ldquo;power tool for thinking&rdquo;&semi; but on the other side it is only a kind of information system with built-in knowledge to support decisions made by human experts. Similar conclusions could be made for intelligent medical systems and introduce the database reusability in this environment with a purpose to increase the quality of an intelligent medical system. In the paper the problem of the database reusability will be presented more in detail, especially its integration in an intelligent medical system. Finally, the results of such integration and the benefits for the medicine will be discussed.
Visual Inspection in Industrial Manufacturing
Authors: Andreas König, Peter Windirsch, Michael Gasteier, Manfred Glesner
Venue: IEEE Micro (1995)

Visual quality control is a demanding task of increasing importance in industrial manufacturing. Both speed and flexibility are of paramount importance for viable and competitive inspection systems. In our work we developed a dedicated neural network architecture for anomaly detection that can easily be trained by a single presentation of examples and is amenable to massively parallel VLSI implementation. Our focus is on our ASIC and prototype system design effort for this network. Keywords: Neural networks, VLSI, novelty filter, anomaly detection, automated visual industrial quality control.
Properties of composite of closure operations and choice functions
Authors: Nghia D. Vu, Bina Ramamurthy
Venue: Acta Cybernetica (2002)

The equivalence of the family of FDs is among many hottest topics that get a lot of attention and consideration currently. There are many equivalent descriptions of the family of FDs. The closure operation and choice function are two of them. Major results of this paper are the properties of the composite function of the choice functions and closure operations. The first parts of this paper address the theories of the composite function of two choice functions and the sufficient and necessary condition of a composite function of two choice functions to be a choice function. Rest of the paper addresses the sufficient and necessary condition of a composite function of more than two choice functions to be a choice function and a composite function of more than two closure operations to be a closure operation.
A Wigner equation with quantum electron-phonon interaction
Authors: M. Nedjalkov, H. Kosina, R. Kosik, S. Selberherr
Venue: Microelectronic Engineering (2002)

We present a kinetic equation which is obtained after a hierarchy of approximations from the generalized electron-phonon Wigner function. The equation accounts for quantum effects in the electron-phonon interaction which are investigated by numerical experiments. An analysis shows that in contrast to the potential term, which is non local in momentum but local in space, the interaction term is non local also in the real space.