ppxscal/embedding_network huggingface dataset:
A visual simulation model of a workstation in a rolling mill facility
Authors: P. Lefrancois, M.-H. Jobin, M.-C. Roy, G. Gamache
Venue: Proceedings of the 21st conference on Winter simulation (1989)

The objective of this research is to develop a visual simulation model to evaluate the performance of a workstation in a rolling mill facility by analyzing the interactions between the jobs to be processed and the scheduling rules used. The model has been developped using the CINEMA software and executes on a IBM PC/AT microcomputer. The simulation model is currently used to design job scheduling rules and compare their performance in reducing setups, work-in-process inventories and flow time.
PVDaCS: a prototype knowledge-based expert system for certification of spacecraft data
Authors: Cathleen Wharton, Patricia J. Shiroma, Karen E. Simmons
Venue: Proceedings of the 2nd international conference on Industrial and engineering applications of artificial intelligence and expert systems - Volume 1 (1989)

On line data management techniques to certify spacecraft information are mandated by increasing telemetry rates [SiC87]. Knowledge-based expert systems offer the ability to certify data electronically without the need for time consuming human interaction. We have explored issues of automatic certification by designing a knowledge-based expert system to certify data from a scientific instrument, the Orbiter Ultraviolet Spectrometer (OUVS), on an operating NASA planetary spacecraft, Pioneer Venus (PV) [Ste80]. The resulting rule-based system, called PVDaCS (Pioneer Venus Data Certification System), is a functional prototype demonstrating the concepts of a larger system design. A key element of the system design is the representation of an expert's knowledge through the usage of well ordered sequences. PVDaCS produces a certification value derived from expert knowledge and an analysis of the instrument's operation. Results of system performance are presented.
Smart game board and go explorer: a study in software and knowledge engineering
Authors: Anders Kierulf, Ken Chen, Jurg Nievergelt
Venue: Communications of the ACM (1990)

Software engineering is an established discipline that has accumulated and codified more than two decades worth of know-how. Knowledge engineering, on the other hand, is an emerging discipline with lots of issues but, at least so far, little structure. Despite its lack of maturity the practice of knowledge engineering promises to have a noticeable impact on software engineering doctrine. The experimental nature of knowledge engineering goes hand-in-hand with a style of software development best characterized as &lsquo;exploratory,&rsquo; which has not been much studied in traditional software engineering.
Characteristics of performance-optimal multi-level cache hierarchies
Authors: S. Przybylski, M. Horowitz, J. Hennessy
Venue: ACM SIGARCH Computer Architecture News (1989)

The increasing speed of new generation processors will exacerbate the already large difference between CPU cycle times and main memory access times. As this difference grows, it will be increasingly difficult to build single-level caches that are both fast enough to match these fast cycle times and large enough to effectively hide the slow main memory access times. One solution to this problem is to use a multi-level cache hierarchy. This paper examines the relationship between cache organization and program execution time for multi-level caches. We show that a first-level cache dramatically reduces the number of references seen by a second-level cache, without having a large effect on the number of second-level cache misses. This reduction in the number of second-level cache hits changes the optimal design point by decreasing the importance of the cycle-time of the second-level cache relative to its size. The lower the first-level cache miss rate, the less important the second-level cycle time becomes. This change in relative importance of cycle time and miss rate makes associativity more attractive and increases the optimal cache size for second-level caches over what they would be for an equivalent single-level cache system.
The Complexity of Generating Minimum Test Sets for PLA's and Monotone Combinational Circuits
Authors: H. B. Hunt, S. S. Ravi, D. J. Rosenkrantz, A. Chakravarty
Venue: IEEE Transactions on Computers (1989)

The authors show that the problem of obtaining a minimum complete test set is NP-complete for monotone PLAs even when each product term of the PLA contains at most two literals. Using the ideas developed in the proof of this result, they resolve an open question due to B. Krishnamurthy and S.B. Akers (1984). The authors also show that given a complete test set T, the problem of obtaining a minimum test set contained in T is NP-complete even for two-level monotone circuits.
Integrating APL with symbol manipulation, numerical software and graphics
Authors: Heikki Apiola, Pirkka Peltola
Venue: ACM SIGAPL APL Quote Quad (1990)

Our presentation deals with the idea of combining symbol manipulation, numerical computation and graphics into a high level environment for solving problems in scientific computing. The basic building blocks are FORTRAN subroutine libraries, a symbol manipulation system (MACSYMA) and a vector-matrix language (APL). Thus we have chosen two different high level host systems which are suitably connected to the FORTRAN-world. We shall try to give an overall idea of the structure and construction principles of some parts of the system. Our emphasis will be on illustrations of various kinds of possibilities of high-level problem solving in scientific computing.
On curve matching
Authors: H. J. Wolfson
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1990)

Two algorithms to find the longest common subcurve of two 2D curves are presented. These algorithms are based on conversion of the curves into shape signature strings and application of string matching techniques to find long matching substrings, followed by direct curve matching of the corresponding candidate subcurves to find the longest matching subcurve. The first algorithm is of complexity O(n), where n is the number of sample points on the curves. The second one, while being theoretically somewhat less efficient, proved to be robust and efficient in practical applications. Both algorithms solve the problem of general curves without being dependent on some set of special points on the curves. The algorithms have industrial applications to problems of object assembly and object recognition. Experimental results are included. The algorithms can be easily extended to the 3D case.
On the theory of average case complexity
Authors: S. Ben-David, B. Chor, O. Goldreich
Venue: Proceedings of the twenty-first annual ACM symposium on Theory of computing (1989)

This paper takes the next step in developing the theory of average case complexity initiated by Leonid A. Levin. Previous works [Levin 84, Gurevich 87, Venkatesan and Levin 88] have focused on the existence of complete problems. We widen the scope to other basic questions in computational complexity. Our results include: the equivalence of search and decision problems in the context of average case complexity; an initial analysis of the structure of distributional-NP under reductions which preserve average polynomial-time; a proof that if all distributional-NP is in average polynomial-time then non-deterministic exponential-time equals deterministic exponential time (i.e., a collapse in the worst case hierarchy); definitions and basic theorems regarding other complexity classes such as average log-space.
Computing the Singular Value Decomposition on the Connection Machine
Authors: L. M. Ewerbring, F. T. Luk
Venue: IEEE Transactions on Computers (1990)

Consideration is given to the computation of the singular value decomposition (SVD) on the Connection Machine (CM). Brief descriptions of the Lisp language and some typical matrix manipulating functions are given. Implementation details of various Jacobi-SVD algorithms on an 8192-processor CM are presented. For n*n matrices, where n>or=64, the decomposition is computed in time O(n) per sweep.
Exploring the benefits of multiple hardware contexts in a multiprocessor architecture: preliminary results
Authors: W.-D. Weber, A. Gupta
Venue: ACM SIGARCH Computer Architecture News (1989)

A fundamental problem that any scalable multiprocessor must address is the ability to tolerate high latency memory operations. This paper explores the extent to which multiple hardware contexts per processor can help to mitigate the negative effects of high latency. In particular, we evaluate the performance of a directory-based cache coherent multiprocessor using memory reference traces obtained from three parallel applications. We explore the case where there are a small fixed number (2-4) of hardware contexts per processor and the context switch overhead is low. In contrast to previously proposed approaches, we also use a very simple context switch criterion, namely a cache miss or a write-hit to shared data. Our results show that the effectiveness of multiple contexts depends on the nature of the applications, the context switch overhead, and the inherent latency of the machine architecture. Given reasonably low overhead hardware context switches, we show that two or four contexts can achieve substantial performance gains over a single context. For one application, the processor utilization increased by about 46% with two contexts and by about 80% with four contexts.
Polynomial time designs toward both BCNF and efficient data manipulation
Authors: Ke Wang
Venue: ACM SIGMOD Record (1990)

We define the independence-reducibility based on a modification of key dependencies, which has better computational properties and is more practically useful than the original one based on key dependencies. Using this modification as a tool, we design BCNF databases that are highly desirable with respect to updates and/or query answering. In particular, given a set U of attributes and a set F of functional dependencies over U, we characterize when F can be embedded in a database scheme over U that is independent and is BCNF with respect to F, a polynomial time algorithm that tests this characterization and produces such a database scheme whenever possible is presented. The produced database scheme contains the fewest possible number of relation schemes. Then we show that designs of embedding constant-time-maintainable BCNF schemes and of embedding independence-reducible schemes share exactly the same method with the above design. Finally, a simple modification of this method yields a polynomial time algorithm for designing embedding separable BCNF schemes.
RSF: A Formalism for Executable Requirement Specifications
Authors: Michela Degl'Innocenti, Gian Luigi Ferrari, Giuliano Pacini, Franco Turini
Venue: IEEE Transactions on Software Engineering (1990)

RSF is a formalism for specifying and prototyping systems with time constraints. Specifications are given via a set of transition rules. The application of a transition rule is dependent upon certain events. The occurrence times of the events and the data associated with them must satisfy given properties. As a consequence of the application of a rule, some events are generated and others are scheduled to occur in the future, after given intervals of time. Specifications can be queried, and the computation of answers to queries provides a generalized form of rapid prototyping. Executability is obtained by mapping the RSF rules into logic programming. The rationale, a definition of the formalism, the execution techniques which support the general notion of rapid prototyping and a few examples of its use are presented.
Performance measurements on a commercial multiprocessor running parallel code
Authors: M. Annaratone, R. Rühl
Venue: ACM SIGARCH Computer Architecture News (1989)

The multiprocessor Sequent Symmetry was first delivered to customers with write-through caches. Later on each machine was upgraded with copy-back caches. Because all the other architectural parameters were unchanged (main memory, bus, cache organization and size, and so on), this made it possible to measure the performance of a multiprocessor with no caches, write-through caches, and copy-back caches. We also study the impact that the language (FORTRAN and C) has on the performance of the machine.
An initial report on the design of Ariel DBMS with an integrated production rule system
Authors: E. N. Hanson
Venue: ACM SIGMOD Record (1989)

The design and implementation strategy for Ariel, A DBMS with a built-in production rule system (a trigger system), is described. Ariel is being built with the EXODUS database tool kit. The query language of Ariel is a subset of POSTQUEL extended with a new rule language. Effort is focussed on integrating the rule system with transaction processing, and making the rule system powerful and efficient. The current implementation of the rule condition-testing mechanism in Ariel is based on a variation of the Rete network, a type of discrimination network used widely in rule-based systems tools for artificial intelligence programming. The standard Rete algorithm has been extended to improve performance in a database environment.
Improved bounds for rectangular and guillotine partitions
Authors: Teofilo Gonzalez, Si-Qing Zheng
Venue: Journal of Symbolic Computation (1989)

We study the problem of partitioning a rectangle S with a set of interior points Q intorectangles by introducing a set of line segments of least total length. The set of partitioning line segments must include every point in Q. Since this problem is computationally intractable (NP-hard), several approximation algorithms for its solution have been developed. In this paper we show that the legnth of an optimal guillotine partition is not greater than 1.75 times the length of an optimal rectangular partition. Since an optimal guillotine partition can be obtained on O(n^5) time, we have a polynomial time approximation algorithm for finding near-optimal rectangular partitions.
Self-timing programs and the quantum scheduler
Authors: S. B. Guthery
Venue: Communications of the ACM (1988)

Using an internally generated program clock in conjunction with a quantum scheduler creates self-timing programs that are useful in building deterministic computer systems.
Information detective: a workstation for exploring three dimensional information space
Authors: K. Kojima
Venue: ACM SIGCHI Bulletin (1989)

Artificial reality is used to simulate two different kinds of space. One is the physical world. The other is a conceptual data model. A head mounted display can simulate the former. In this paper, we propose a system, Information Detective, to simulate the latter. Information Detective is a workstation for browsing complex information spaces. It consists of a small flat display and two tracking sensors. It behaves like a magnifying glass in three dimensional space and can show object details in a natural way. It is being developed to keep users from losing themselves in large and complex information spaces.
Executing a Program on the MIT Tagged-Token Dataflow Architecture
Authors: K. Arvind Rishiyur S. Nikhil
Venue: IEEE Transactions on Computers (1990)

The MIT Tagged-Token Dataflow Project has an unconventional, but integrated approach to general-purpose high-performance parallel computing. Rather than extending conventional sequential languages, Id, a high-level language with fine-grained parallelism and determinacy implicit in its operational semantics, is used. Id programs are compiled to dynamic dataflow graphs, which constitute a parallel machine language. Dataflow graphs are directly executed on the MIT tagged-token dataglow architecture (TTDA), a multiprocessor architecture. An overview of current thinking on dataflow architecture is provided by describing example Id programs, their compilation to dataflow graphs, and their execution on the TTDA. Related work and the status of the project are described.
Performance experiments for the performance course
Authors: C. M. Shub
Venue: ACM SIGCSE Bulletin (1989)

This paper describes a newly instituted laboratory in the Computer Science Department at the University of Colorado at Colorado Springs. The reasons for developing the laboratory are delineated. The equipment is then described. This is followed by a brief description of initial experience with the laboratory. A collection of experiments performed within the laboratory is delineated in detail. Finally some brief thoughts on the future use of the laboratory and the conclusions drawn at this point in the lab's history are presented.
On the Design of Combinational Totally Self-Checking 1-out-of-3 Code Checkers
Authors: Jien-Chung Lo, Suchai Thanawastien
Venue: IEEE Transactions on Computers (1990)

The authors present the design of an 11-transistor combinational NMOS 1-out-of-3 code checker. The checker is totally self-checking (TSC) with respect to 36 faults out of a total of 58 faults defined at the NMOS switch and layout geometrical levels, and achieves the TSC goal of a checker for most of the fault sequences. The minimum fault sequences under which the TSC goal is lost are composed of at least three faults. This might be considered as a sufficient level of safety for some implementations.
Performance of Firefly RPC
Authors: M. Schroeder, M. Burrows
Venue: ACM SIGOPS Operating Systems Review (1989)

In this paper, we report on the performance of the remote procedure call implementation for the Firefly multiprocessor and analyze the implementation to account precisely for all measured latency. From the analysis and measurements, we estimate how much faster RPC could be if certain improvements were made. The elapsed time for an inter-machine call to a remote procedure that accepts no arguments and produces no results is 2.66 milliseconds. The elapsed time for an RPC that has a single 1440-byte result (the maximum result that will fit in a single packet) is 6.35 milliseconds. Maximum inter-machine throughput of application program data using RPC is 4.65 megabits/second, achieved with 4 threads making parallel RPCs that return the maximum sized result that fits in a single RPC result packet. CPU utilization at maximum throughput is about 1.2 CPU seconds per second on the calling machine and a little less on the server. These measurements are for RPCs from user space on one machine to user space on another, using the installed system and a 10 megabit/second Ethernet. The RPC packet exchange protocol is built on IP/UDP, and the times include calculating and verifying UDP checksums. The Fireflies used in the tests had 5 Micro VAX II processors and a DEQNA Ethernet controller.
Departmentalization in software development and maintenance
Authors: E. Burton Swanson, Cynthia Mathis Beath
Venue: Communications of the ACM (1990)

Exploring the strengths and weaknesses of three alternative bases for systems staff departmentalization suggests the benefits of an organizational form in which maintenance is separate from new system development.
Learning and transfer of measurement tasks
Authors: A. Y. Lee, P. G. Polson, W. A. Bailey
Venue: Proceedings of the SIGCHI conference on Human factors in computing systems: Wings for the mind (1989)

This study presents a theoretically motivated analysis of learning and performance on a micro-processor based oscilloscope. An analysis of the knowledge required to make basic measurements was done using the GOMS model and Cognitive Complexity Theory (CCT). From these analyses and the criterion used in Polson, Muncher, and Engelbeck (1986), tasks were selected for an experiment evaluating training order manipulations using naive users of oscilloscopes. Production system models for each training task were derived from CCT. The models successfully predicted transfer between tasks and training order effects. Implications for the design of systems with embedded micro-processors are discussed.
Simulation system for the control of manufacturing lines
Authors: J. Beaudoin, G. Feldmann, P. Massotte
Venue: Proceedings of the 21st conference on Winter simulation (1989)

LMA (Line Manager Advisor) is a hybrid application to perform process control and scheduling in a manufacturing system. It combines both procedural and declarative approaches. The simulation model embedded in LMA enables to study the behavior of the target system and to determine the different critical parameters. It is used for the design of the target system as well as for the evaluation of the decision actions. This paper describes the concepts and the features used in the simulation model and how they have been implemented.
A distributed debugger for Amoeba
Authors: I. J. P. Elshoff
Venue: ACM SIGPLAN Notices (1989)

We describe a debugger that is being developed for distributed programs in Amoeba. A major goal in our work is to make the debugger independent of the Amoeba kernel. Our design integrates many facilities found in other debuggers, such as execution replay, breakpointing, and an event-based view of the execution of the target program. This paper discusses the influence of Amoeba's architecture on the attainability of our goals and the desired functionality of the debugger. We also consider such problems as how to deal with timeouts and interactions between the target program and its environment.
Program complexity: a tutorial
Authors: David Finkel, Gary Haggard
Venue: ACM SIGCSE Bulletin (1988)

How does a programmer decide which of two different algorithms to use to solve a problem? This is a particularly difficult question because one finds that often one part of the solution of a problem &ldquo;dominates&rdquo; the running time of the solution, i.e. uses a large fraction of the execution time. Further, this special part of the solution requires the programmer to choose an algorithm for its solution from a large number of alternatives. This tutorial describes one approach used in computer science to measure the complexity of a program by modeling programs with mathematical functions that describe their execution time. We break the solution of this problem into three parts. We first discuss the notion of how two functions are compared. We then show how algorithms can have their execution time modeled by functions. Finally, we see how to compare algorithms by comparing the functions that describe them.
A Schwarz splitting variant of cubic spline collocation methods for elliptic PDEs
Authors: E. N. Houstis, J. R. Rice, E. A. Vavalis
Venue: Proceedings of the third conference on Hypercube concurrent computers and applications - Volume 2 (1989)

We consider the formulation of the Schwarz alternating method for a new class of elliptic cubic spline collocation discretization schemes. The convergence of the method is studied using Jacobi and Gauss-Seidel iterative methods for implementing the interaction among subdomains. The Schwarz Cubic Spline Collocation (SCSC) method is formulated for hypercube architectures and implemented on the NCUBE (128 processors) machine. The performance and convergence of the hypercube SCSC algorithm is studied with respect to domain partition and subdomain overlapping area. The numerical results indicate that the partition and mapping of the SCSC on the NCUBE is almost optimal while the speedup obtained is similar to other domain decomposition techniques.
Performance Analysis of k-ary n-cube Interconnection Networks
Authors: William J. Dally
Venue: IEEE Transactions on Computers (1990)

VLSI communication networks are wire-limited, i.e. the cost of a network is not a function of the number of switches required, but rather a function of the wiring density required to construct the network. Communication networks of varying dimensions are analyzed under the assumption of constant wire bisection. Expressions for the latency, average case throughput, and hot-spot throughput of k-ary n-cube networks with constant bisection that agree closely with experimental measurements are derived. It is shown that low-dimensional networks (e.g. tori) have lower latency and higher hot-spot throughput than high-dimensional networks (e.g. binary n-cubes) with the same bisection width.