ppxscal/embedding_network huggingface dataset:
New Decidability Results Concerning Two-Way Counter Machines
Authors: Oscar H. Ibarra, Tao Jiang, Nicholas Tran, Hui Wang
Venue: SIAM Journal on Computing (1995)

The authors study some decision questions concerning two-way counter machines and obtain the strongest decidable results to date concerning these machines. In particular, it is shown that the emptiness, containment, and equivalence (ECE, for short) problems are decidable for two-way counter machines whose counter is reversal-bounded (i.e., the counter alternates between increasing and decreasing modes at most a fixed number of times). This result is used to give a simpler proof of a recent result in which the ECE problems for two-way reversal-bounded pushdown automata accepting bounded languages (i.e., subsets of $w_1^*\ldots w_k^*$ for some nonnull words $w_1,\ldots,w_k$) are decidable. Other applications concern decision questions about simple programs. Finally, it is shown that nondeterministic two-way reversal-bounded multicounter machines are effectively equivalent to finite automata on unary languages, and hence their ECE problems are decidable also.
Automatic referent resolution of deictic and anaphoric expressions
Authors: Carla Huls, Wim Claassen, Edwin Bos
Venue: Computational Linguistics (1995)

Deictic and anaphoric expressions frequently cause problems for natural language analysis. In this paper we present a single model that accounts for referent resolution of deictic and anaphoric expressions in a research prototype of a multimodal user interface called EDWARD. The linguistic expressions are keyed in by a user and are possibly accompanied by pointing gestures. The proposed model for reference resolution elaborates on Alshawi's (1987) notions of context factors and salience and integrates both linguistic and perceptual context effects. The model is contrasted with two alternative referent resolution models, namely, a simplistic one and the more sophisticated model proposed by Grosz and Sidner (1986). Based on empirical and analytical grounds, we conclude that the model we propose is preferable from a computational and engineering point of view.
Measured capacity of an Ethernet: myths and reality
Authors: D. R. Boggs, J. C. Mogul, C. A. Kent
Venue: ACM SIGCOMM Computer Communication Review (1995)

Ethernet, a 10 Mbit/sec CSMA/CD network, is one of the most successful LAN technologies. Considerable confusion exists as to the actual capacity of an Ethernet, especially since some theoretical studies have examined operating regimes that are not characteristic of actual networks. Based on measurements of an actual implementation, we show that for a wide class of applications, Ethernet is capable of carrying its nominal bandwidth of useful traffic, and allocates the bandwidth fairly. We discuss how implementations can achieve this performance, describe some problems that have arisen in existing implementations, and suggest ways to avoid future problems.
Object oriented modeling with SIMPLE++
Authors: Dietmar F. Geuder
Venue: Proceedings of the 27th conference on Winter simulation (1995)

Object orientation has become a major competitive factor in information technology. Reasons for this are the control of complexity, increased quality and possible reuse of modules. The discrete event simulation system SIMPLE++ being presented in this paper brings these advantages to the simulation user. SLMPLE++ is a general purpose system for the object oriented, graphical, and integrated modeling, simulation, and animation of systems and business processes. Models are built with objects from a class library containing predefined building blocks. User defined classes can be created in an integrated way, allowing the modeling environment to be tailored to different application areas. The class structure, inheritance and unlimited number of hierarchical levels lead to a significant increase of productivity in building, changing, and maintaining models. The concept and benefits of object oriented modeling will be illustrated in the following. In addition to the modeling environment, the support for validation, simulation, and evaluation of results is covered. Also, the integration of simulation models into existing IT solutions as well as application specific object libraries are explained.
Hardware assists for high performance computing using a mathematics of arrays
Authors: H. Pottinger, W. Eatherton, J. Kelly, T. Schiefelbein, L. R. Mullin, R. Ziegler
Venue: Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays (1995)

Work in progress at the University of Missouri-Rolla on hardware assists for high performance computing is presented. This research consists of a novel field programmable gate array (FPGA) based reconfigurable coprocessor board (the Chameleon Coprocessor) being used to evaluate hardware architectures for speedup of array computation algorithms. These algorithms are developed using a Mathematics of Arrays (MOA). They provide a means to generate addresses for data transfers that require less data movement than more traditional algorithms. In this manner, the address generation algorithms are acting as an intelligent data prefetching mechanism or special purpose cache controller. Software implementations have been used to provide speedups on the order of 100% over classical methods to the solution of heat transfer equations on a uniprocessor. We extend these methods to application designs for the Chameleon Coprocessor.
An Entropy Formula for Time-Varying Discrete-Time Control Systems
Authors: Pablo A. Iglesias
Venue: SIAM Journal on Control and Optimization (1996)

The results of this paper generalize the formula for the entropy of a transfer function to time-varying systems. This is done through the use of some results on spectral factorizations due to Arveson and properties of the $\cW$-transform which generalizes the usual $\cZ$-transform for time-varying systems. Using the formula defined, it is shown that for linear fractional transformations like those that arise in time-varying $f$ control, there exists a unique, bounded contraction which maximizes the entropy. This generalizes known results in the time-invariant case. Possible extensions are discussed, along with state-space formulae.
An online video placement policy based on bandwidth to space ratio (BSR)
Authors: Asit Dan, Dinkar Sitaram
Venue: Proceedings of the 1995 ACM SIGMOD international conference on Management of data (1995)

In a video-on-demand server, resource reservation is required to guarantee continuous delivery. Hence any given storage device (or a striping group treated as a single logical device) can serve only up to a fixed number of client access streams. Each storage device is also limited by the number of video files it can store. For the reasons of availability, incremental growth, and heterogeneity, there may be multiple storage devices in a video server environment. Hence, one or more copies of a particular video may be placed on different storage devices. Since the access rates to different videos are not uniform, there may be load imbalance among the devices. In this paper, we propose a dynamic placement policy (called the Bandwidth to Space Ratio (BSR) Policy) that creates and/or deletes replica of a video, and mixes hot and cold videos so as to make the best use of bandwidth and space of a storage device. The proposed policy is evaluated using a simulation study.
An efficient probabilistic context-free parsing algorithm that computes prefix probabilities
Authors: Andreas Stolcke
Venue: Computational Linguistics (1995)

We describe an extension of Earley's parser for stochastic context-free grammars that computes the following quantities given a stochastic context-free grammar and an input string: a) probabilities of successive prefixes being generated by the grammar; b) probabilities of substrings being generated by the nonterminals, including the entire string being generated by the grammar; c) most likely (Viterbi) parse of the string; d) posterior expected number of applications of each grammar production, as required for reestimating rule probabilities. Probabilities (a) and (b) are computed incrementally in a single left-to-right pass over the input. Our algorithm compares favorably to standard bottom-up parsing methods for SCFGs in that it works efficiently on sparse grammars by making use of Earley's top-down control structure. It can process any context-free rule format without conversion to some normal form, and combines computations for (a) through (d) in a single algorithm. Finally, the algorithm has simple extensions for processing partially bracketed inputs, and for finding partial parses and their likelihoods on ungrammatical inputs.
Design-World: a testbed of communicative action and resource limits
Authors: Marilyn A. Walker, Pamela W. Jordan
Venue: ACM SIGART Bulletin (1995)

Design-World is a simulation testbed developed in order to support experiments on the relationship of communicative action to agents' processing limitations. This testbed can be used as a tool for teaching both technical and methodological concepts in AI.
Using visual texture for information display
Authors: Colin Ware, William Knight
Venue: ACM Transactions on Graphics (TOG) (1995)

Results from vision research are applied to the synthesis of visual texture for the purposes of information display. The literature surveyed suggests that the human visual system processes spatial information by means of parallel arrays of neurons that can be modeled by Gabor functions. Based on the Gabor model, it is argued that the fundamental dimensions of texture for human perception are orientation, size (1/frequency), and contrast. It is shown that there are a number of trade-offs in the density with which information can be displayed using texture. Two of these are (1) a trade-off between the size of the texture elements and the precision with which the location can be specified, and (2) the precision with which texture orientation can be specified and the precision with which texture size can be specified. Two algorithms for generating texture are included.
Simulation run length planning for stochastic loss models
Authors: Rayadurgam Srikant, Ward Whitt
Venue: Proceedings of the 27th conference on Winter simulation (1995)

We derive approximate formulas for the asymptotic variance of estimators of the steady-state blocking probability in a multi-server loss system. These formulas can be used to predict simulation run lengths required to obtain desired statistical precision before the simulation has been run, which can aid in the design of simulation experiments. It is natural to delete an initial portion of the simulation run to allow the system to approach steady state when it starts out empty. As the system size increases, the time to approach steady state becomes a greater portion of the overall simulation time as system size increases.
Exploring issues of operating systems structuring: from microkernel to extensible systems
Authors: W. H. Cheung, Anthony H. S. Loong
Venue: ACM SIGOPS Operating Systems Review (1995)

The microkernel concept has once been the most advocated approach for operating system development. Unfortunately, before its publicized advantages have been fully realized in an operating system implementation, current operating system researchers claim its weaknesses and make their ways to develop "extensible" operating systems. New operating systems like SPIN, Ageis, Cache Kernel, Apertos and Scout, employ new concepts to support application specific customization and optimal allocation of system resource, in order to boost up the performance of certain applications. The microkernel concept in itself never contradicts with this purpose, as it is to provide basic efficient primitives for construction of system services. Probably, the crucial problem is that the OS architecture of most current microkernel implementations cannot suitably meet with the new requirements of extensibility. In this paper, we try to explore issues in developing a better OS architecture that can fully enhance OS extensibility. Moreover, we investigate how microkernel abstraction can be remodeled to support better reconfiguration in operating systems. To cope with the conflicting issues of efficiency, flexibility and ease of reconfiguration, we suggest and discuss an approach of structuring operating systems. The approach is characteristed by lightweight meta-abstraction mechanism and progressive reflective reconfiguration.
Optimizing memory system performance for communication in parallel computers
Authors: T. Stricker, T. Gross
Venue: ACM SIGARCH Computer Architecture News (1995)

Communication in a parallel system frequently involves moving data from the memory of one node to the memory of another; this is the standard communication model employed in message passing systems. Depending on the application, we observe a variety of patterns as part of communication steps, e.g., regular (i.e. blocks of data), strided, or irregular (indexed) memory accesses. The effective speed of these communication steps is determined by the network bandwidth and the memory bandwidth, and measurements on current parallel supercomputers indicate that the performance is limited by the memory bandwidth rather than the network bandwidth.Current systems provide a wealth of options to perform communication, and a compiler or user is faced with the difficulty of finding the communication operations that best use the available memory and network bandwidth. This paper provides a framework to evaluate different solutions for inter-node communication and presents the copy-transfer model; this model captures the contributions of the memory system to inter-node communication. We demonstrate the usefulness of this simple model by applying it to two commercial parallel systems, the Cray T3D and the Intel Paragon.In particular we identify two methods to transfer data between nodes in these two machines. In buffer-packing transfers, a contiguous block of data is transferred across the network. If the data are not stored contiguously, they are copied to (gathering) or from (scattering) buffers in local memory before and after the transfer. Chained transfers perform gathering, transfer and scattering in one step, reading the data elements with some non-sequential pattern and immediately transferring them on to the destination.Our model and measurements indicate that chaining of the gather, transfer, and scatter operations results in better performance than buffer packing for many important access patterns. Most standard message passing libraries (like MPI, PVM or NX) force the parallelizing compiler (or the programmer) to employ the buffer-packing communication operations. However, the addition of hardware support dedicated to communication (e.g., DMAs, line-transfer units) now gives the compiler a wider range of options.
The Disturbance Decoupling Problem for Systems Over a Ring
Authors: G. Conte, A. M. Perdon
Venue: SIAM Journal on Control and Optimization (1995)

Up to now the use of geometric methods in the study of disturbance decoupling problems (DDPs) for systems over a ring has provided only necessary conditions for the existence of solutions. In this paper we study such problems, considering separately the case in which only static feedback solutions are allowed, and the one in which dynamic feedback solutions are admitted. In the first case, we give a complete geometric characterization of the solvability conditions of such problems for injective systems with coefficients in a commutative ring. Practical procedures for testing the solvability conditions and for constructing solutions, if any exist, are given in the case of systems with coefficients in a principal ideal domain (PID). In the second case, we give a complete geometric characterization of the solvability conditions for systems with coefficients in a PID.
Reviewing the risks archives
Authors: Peter G. Neumann
Venue: Communications of the ACM (1995)

Ok, you expect your shrink-wrapped software to work properly, without annoying reliability bugs and security holes. Or maybe you would like the systems you develop to work properly, without serious risks to their users. But those systems don't quite work the way they are supposed to. So, what's new? Perusal of the Risks archives [1] suggests that startlingly few real success stories are recorded, and that perhaps we might as well just learn to live with almost every system having bugs&mdash;some even colossal in scope [2].
A Fortran 90-based multiprecision system
Authors: David H. Bailey
Venue: ACM Transactions on Mathematical Software (TOMS) (1995)

A new version of a Fortran multiprecision computation system, based on the Fortran 90 language, is described. With this new approach, a translator program is not required&mdash;translation of Fortran code for multiprecision is accomplished by merely utilizing advanced features of Fortran 90, such as derived data types and operator extensions. This approach results in more-reliable translation and permits programmers of multiprecision applications to utilize the full power of Fortran 90. Three multiprecision data types are supported in this system: multiprecision integer, real, and complex. All the usual Fortran conventions for mixed-mode operations are supported, and many of the Fortran intrinsics, such as SIN, EXP, and MOD, are supported with multiprecision arguments. An interesting application of this software, wherein new number-theoretic identities have been discovered by means of multiprecision computations, is included also.
Superfast parallel discrete event simulations
Authors: Albert G. Greenberg, Boris D. Lubachevsky, Isi Mitrani
Venue: ACM Transactions on Modeling and Computer Simulation (TOMACS) (1996)

Nonconventional parallel simulations methods are presented, wherein speed-ups are not limited by the number of simulated components. The methods capitalize on Chandy and Sherman's space-time relaxation paradigm, and incorporate fast algorithms for solving recurrences. Special attention is paid to implementing these algorithms on currently available massively parallel SIMD computers. As examples, &ldquo;superfast&rdquo; simulations for open and closed queuing networks and for the slotted ALOHA communication protocol are discussed. Several of the simulations are implemented and show impressive computational speeds. This paper summarizes previous results of the authors and presents some new experiments and simulations.
Supervisory Control of Nondeterministic Systems with Driven Events via Prioritized Synchronization and Trajectory Models
Authors: Mark A. Shayman, Ratnesh Kumar
Venue: SIAM Journal on Control and Optimization (1995)

The supervisory control of nondeterministic discrete event dynamical systems (DEDSs) with driven events in the setting of prioritized synchronization and trajectory models introduced by Heymann are studied. Prioritized synchronization captures the notions of controllable, uncontrollable, and driven events in a natural way, and the authors use it for constructing supervisory controllers. The trajectory model is used for characterizing the behavior of nondeterministic DEDSs since it is a sufficiently detailed model (in contrast to the less detailed language or failures models), and serves as a language congruence with respect to the operation of prioritized synchronization. Results concerning controllability and observability in this general setting are obtained.
Artificial intelligence as the liberal arts of computer science
Authors: Lee Spector
Venue: ACM SIGART Bulletin (1995)

I suggest that artificial intelligence be presented as a broad, interdisciplinary, humanistic area of study taught through several courses. I suggest avoiding problem sets, examinations, and other elements of engineering pedagogy; I advocate curriculum structures that encourage original student research, self-directed programming projects, and the development of connections between diverse topic areas. This short paper describes a "liberal arts" approach to introductory artificial intelligence education and the implementation of this approach in the cognitive science program at Hampshire College.
Microparallelism and high-performance protein matching
Authors: Bowen Alpern, Larry Carter, Kang Su Gatlin
Venue: Proceedings of the 1995 ACM/IEEE conference on Supercomputing (CDROM) (1995)

The Smith-Waterman algorithm is a computationally-intensive string-matching operation that is fundamental to the analysis of proteins and genes. In this paper, we explore the use of some standard and novel techniques for improving its performance. We begin by tuning the algorithm using conventional techniques. These make modest performance improvements by providing efficient cache usage and inner-loop code. One novel technique uses the z-buffer operations of the Intel i860 architecture to perform 4 independent computations in parallel. This achieves a five-fold speedup over the optimized code (six-fold over the original). We also describe a related technique that could be used by processors that have 64-bit integer operations, but no z-buffer. Another new technique uses floating-point multiplies and adds in place of the standard algorithm's integer additions and maximum operations. This gains more than a three-fold speedup on the IBM POWER2 processor. This method doesn't give the identical answers as the original program, but experimental evidence shows that the inaccuracies are small and do not affect which strings are chosen as good matches by the algorithm.
Little engines that could: computing in small energetic countries
Authors: J. L. Dedrick, S. E. Goodman, K. L. Kraemer
Venue: Communications of the ACM (1995)

How do very small countries, here defined as having fewer than 10 million people, find places for themselves in the information technologies (IT) arena? Does success require accommodation in the global IT regime that often seems dominated by the U.S. and Japan? Do the little countries scurry around, like birds among the lions and other predators looking for scraps? Are they relegated to second tier &ldquo;appropriate technologies,&rdquo; or do they operate in the mainstream?
CMW information labels: a DBMS perspective
Authors: David Sidwell, Tim Ehrsam
Venue: ACM SIGSAC Review (1995)

Today, most major operating system vendors and OEMs are providing multilevel secure (MLS) operating systems. Many of these vendors, including Digital Equipment Corporation, Sun Microsystems, Hewlett Packard, and others, also incorporate Compartmented Mode Workstation (CMW) functionality [1]. CMW incorporates labeled security protection (e.g., U.S. Class B1 [2]) labeled X-windows, trusted networking, and many other important features that are critical to environments where automatic, high assurance data separation is required. In addition to the mandatory access control (MAC) sensitivity labels described in [2], CMWs also provide a second label component called the information label.
Properties of Generalized Branch and Combine Clock Networks
Authors: Ahmed El-Amawy, Priyalal Kulasinghe
Venue: IEEE Transactions on Parallel and Distributed Systems (1995)

In a recent development a new clock distribution scheme has been introduced. The scheme called Branch-and-Combine or BaC, is the first to guarantee constant skew bound regardless of network size. In this paper we generalize and extend the work on BaC networks. Our study takes the approach of defining a general graph theoretic model which is then utilized to define a general network model taking into account node function. We use the models to establish some interesting results on clocking paths, node input sequences, node inputs' relative timings, and skew bound. We prove that a network adhering to our general model is stable (will not oscillate) despite its cyclic nature. We also prove that no tree of any kind can be used to distribute the clock in two or more dimensions such that skew bound is constant. The paper then exploits the derived properties to describe the inherent interplay between topology, timing, node function, and skew bound.Index Terms¿Branch-and-combine network, clock distribution, skew bound, synchronous system, VLSI, large system, network stability, cyclic clock networks.