ppxscal/embedding_network huggingface dataset:
Representation-burden Conservation Network Applied to Learning VQ (NPL270)
Authors: Juang-Hua Wang, Chih-Ping Hsiao
Venue: Neural Processing Letters (1997)

A self-creating network effective in learning vector quantization, called RCN (Representation-burden Conservation Network) is developed. Each neuron in RCN is characterized by a measure of representation-burden. Conservation is achieved by bounding the summed representation-burden of all neurons at constant 1, as representation-burden values of all neurons are updated after each input presentation. We show that RCN effectively fulfills the conscience principle [1] and achieves biologically plausible self-development capability. In addition, conservation in representation-burden facilitates systematic derivations of learning parameters, including the adaptive learning rate control useful in accelerating the convergence as well as in improving node-utilization. Because it is smooth and incremental, RCN can overcome the stability-plasticity dilemma. Simulation results show that RCN displays superior performance over other competitive learning networks in minimizing the quantization error.
A New Algorithm Based on Givens Rotations for Solving Linear Equations on Fault-Tolerant Mesh-Connected Processors
Authors: K.N. Balasubramanya Murthy, K. Bhuvaneswari, C. Siva Ram Murthy
Venue: IEEE Transactions on Parallel and Distributed Systems (1998)

In this paper, we propose a new I/O overhead free Givens rotations based parallel algorithm for solving a system of linear equations. The algorithm uses a new technique called two-sided elimination and requires an N× (N + 1) mesh-connected processor array to solve N linear equations in (5N$-$log N$-$ 4) time steps. The array is well suited for VLSI implementation as identical processors with simple and regular interconnection pattern are required. We also describe a fault-tolerant scheme based on an algorithm based fault tolerance (ABFT) approach. This scheme has small hardware and time overhead and can tolerate up to N processor failures.
Clock-tree routing realizing a clock-schedule for semi-synchronous circuits
Authors: Atsushi Takahashi, Kazunori Inoue, Yoji Kajitani
Venue: Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design (1997)

It is known that the clock-period can be shorter than the maximum of signal-delays between registers if the clock arrival time to each register is properly scheduled. The algorithm to design an optimal clock-schedule was given. In this paper, we propose a clock-tree routing algorithm that realizes a given clock-schedule using the Elmore-delay model. Following the deferred-merge-embedding (DME) framework, the algorithm generates a topology of the clock-tree and determines the locations and sizes of intermediate buffers simultaneously. The experimental results show that this method constructs clock-trees with moderate wire length compared with that of zero-skew clock-trees.
Global Minimum for Active Contour Models: A Minimal Path Approach
Authors: Laurent D. Cohen, Ron Kimmel
Venue: International Journal of Computer Vision (1997)

A new boundary detection approach for shape modeling is presented. It detects the global minimum of an active contour model&lsquo;s energy between two end points. Initialization is made easier and the curve is not trapped at a local minimum by spurious edges. We modify the &ldquo;snake&rdquo; energy by including the internal regularization term in the external potential term. Our method is based on finding a path of minimal length in a Riemannian metric. We then make use of a new efficient numerical method to find this shortest path.It is shown that the proposed energy, though based only on a potential integrated along the curve, imposes a regularization effect like snakes. We explore the relation between the maximum curvature along the resulting contour and the potential generated from the image.The method is capable to close contours, given only one point on the objects&lsquo; boundary by using a topology-based saddle search routine.We show examples of our method applied to real aerial and medical images.
Using visualisation to improve object-oriented thinking (poster)
Authors: Alejandro Fernández, Gustavo Rossi
Venue: ACM SIGCSE Bulletin (1998)

In this paper we describe a learning environment that combines usual features of object oriented programming environments with visualisation and animation of object-oriented applications. The purpose of this learning tool is to improve students' mental models of object-oriented systems.
A Fast Parallel Cholesky Decomposition Algorithm for Tridiagonal Symmetric Matrices
Authors: Ilan Bar-On, Bruno Codenotti, Mauro Leoncini
Venue: SIAM Journal on Matrix Analysis and Applications (1997)

In this paper we present a new parallel algorithm for computing the $LL^T$ decomposition of real symmetric positive-definite tridiagonal matrices. The algorithm consists of a preprocessing and a factoring stage. In the preprocessing stage it determines a rank-($p-1$) correction to the original matrix ($p=$ number of processors) by precomputing selected components $x_k$ of the $L$ factor, $k=1\dt p-1$. In the factoring stage it performs independent factorizations of $p$ matrices of order $n/p$. The algorithm is especially suited for machines with both vector and processor parallelism, as confirmed by the experiments carried out on a Connection Machine CM5 with 32 nodes. Let $\hat{x}_k$ and $\hat{x}'_k$ denote the components computed in the preprocessing stage and the corresponding values (re)computed in the factorization stage, respectively. Assuming that $\abs{\hat{x}_k/\hat{x}'_k}$ is small, $k=1\dt p-1$, we are able to prove that the algorithm is stable in the backward sense. The above assumption is justified both experimentally and theoretically. In fact, we have found experimentally that $\abs{\hat{x}_k/\hat{x}'_k}$ is small even for ill-conditioned matrices, and we have proven by an a priori analysis that the above ratios are small provided that preprocessing is performed with suitably larger precision.
Adaptive methods for netlist partitioning
Authors: Wray L. Buntine, Lixin Su, A. Richard Newton, Andrew Mayer
Venue: Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design (1997)

An algorithm that remains in use at the core of many partitioning systems is the Kernighan-Lin algorithm and a variant the Fidducia-Matheysses (FM) algorithm. To understand the FM algorithm we applied principles of data engineering where visualization and statistical analysis are used to analyze the run-time behavior. We identified two improvements to the algorithm which, without clustering or an improved heuristic function, bring the performance of the algorithm near that of more sophisticated algorithms. One improvement is based on the observation, explored empirically, that the full passes in the FM algorithm appear comparable to a stochastic local restart in the search. We motivate this observation with a discussion of recent improvements in Monte Carlo Markov Chain methods in statistics. The other improvement is based on the observation that when an FM-like algorithm is run 20 times and the best run chosen, the performance trace of the algorithm on earlier runs is useful data for learning when to abort a later run. These improvements, implemented with a simple adaptive scheme, are orthogonal to techniques used in state-of-the-art implementations, and should therefore be applicable to other VLSI optimization algorithms.
Teaching the fundamentals of simulation in a very short time
Authors: Ingolf Ståhl
Venue: Proceedings of the 28th conference on Winter simulation (1996)

This paper informs about the development of the micro GPSS system on the basis of feed-back ftom some 5000 students during a period of two decades, providing a stream-lined simulation system which within ten class room hours of teaching make students prepared to write fairly advanced simulation programs of practical interest.
Commutativity analysis: a new analysis technique for parallelizing compilers
Authors: Pedro C. Diniz
Venue: ACM Transactions on Programming Languages and Systems (TOPLAS) (1997)

This article presents a new analysis technique, commutativity analysis, for automatically parallelizing computations that manipulate dynamic, pointer-based data structures. Commutativity analysis views the computation as composed of operations on objects. It then analyzes the program at this granularity to discover when operations commute (i.e., generate the same final result regardless of the order in which they execute). If all of the operations required to perform a given computation commute, the compiler can automatically generate parallel code. We have implemented a prototype compilation system that uses commutativity analysis as its primary analysis technique. We have used this system to automatically parallelize three complete scientific computations: the Barnes-Hut N-body solver, the Water liquid simulation code, and the String seismic simulation code. This article presents performance results for the generated parallel code running on the Stanford DASH machine. These results provide encouraging evidence that commutativity analysis can serve as the basis for a successful parallelizing compiler.
Global Dissipativity for A-Stable Methods
Authors: A. T. Hill
Venue: SIAM Journal on Numerical Analysis (1997)

This paper concerns the discretization of the initial value problem $u_{t}=f(u)$ under the three structural conditions:\\ (i) $f:{\Bbb C}^{N}\longrightarrow {\Bbb C}^{N},\;\;\;$ $\Re e\langle f(u),\, u\rangle\leq a-b|u|^{2},\;\;\;\;a\geq 0,\;b>0$ for all $u\in {\Bbb C}^{N}$; \\ (ii) $f:{\Bbb C}^{N}\longrightarrow {\Bbb C}^{N},\;\;\;$ $\Re e\langle f(u),\,u\rangle 0$;\\ (iii) $f:W\longrightarrow H,\;\;\;$ $\Re e\langle f(w),\,w\rangle_{H} \leq a -b|w|_{H}^{2},\;\;\;\;a\geq 0,\,b>0$ for all $w\in W$\\ for complex Hilbert spaces $W\subseteq H$.Dahlquist's G-stability theory is used to show that linear multistep and one-leg methods yield dissipative discretizations for all $f$ satisfying (i) if and only if the method $(\rho, \sigma)$ is A-stable. Extensions of G-stability theory are made to find necessary and sufficient conditions on $(\rho,\,\sigma)$ for similar properties to hold in cases (ii) and (iii). In every case, conditions are found for the strict contractivity of solutions for large initial data, and bounds for the asymptotic rate of decay are calculated in cases (i) and (iii).
Circuit compilers don't have to be slow
Authors: William C. Diss
Venue: Proceedings of the 25th ACM/IEEE Design Automation Conference (1988)

This paper describes a method for efficient compilation of circuits which is used in a commercially available fault grader. Data structures and algorithms are presented which can be used in processing circuits in a textural or schematic format. Performance is documented showing the results of various circuits.
Learning Local Languages and Their Application to DNA Sequence Analysis
Authors: Takashi Yokomori, Satoshi Kobayashi
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1998)

This paper concerns an efficient algorithm for learning in the limit a special type of regular languages called strictly locally testable languages from positive data, and its application to identifying the protein ¿-chain region in amino acid sequences. First, we present a linear time algorithm that, given a strictly locally testable language, learns (identifies) its deterministic finite state automaton in the limit from only positive data. This provides us with a practical and efficient method for learning a specific concept domain of sequence analysis. We then describe several experimental results using the learning algorithm developed above. Following a theoretical observation which strongly suggests that a certain type of amino acid sequences can be expressed by a locally testable language, we apply the learning algorithm to identifying the protein ¿-chain region in amino acid sequences for hemoglobin. Experimental scores show an overall success rate of 95 percent correct identification for positive data, and 96 percent for negative data.
Analysis of RC interconnections under ramp input
Authors: Andrew B. Kahng, Sudhakar Muddu
Venue: ACM Transactions on Design Automation of Electronic Systems (TODAES) (1997)

We give new methods for calculating the time-domain response for a finite-length distributed RC line that is stimulated by a ramp input. The following are our contributions. First, we obtain the solution of the diffusion equation for a seminfinite distributed RC line with ramp input. We then present a general and, in the limit, exact approach to compute the time-domain response for finite-length RC lines under ramp input by summing distinct diffusions starting at either end of the line. Next, we obtain analytical expressions for the finite time-domain voltage response for an open-ended finite RC line and for a finite RC line with capacitive load. The delay estimates using this method are very close to SPICE-computing delays. Finally, we present a general recursive equation for computing the higher-order diffusion components due to reflections at the source and load ends. Future work extends our method to response computations in general interconnection trees by modeling both reflection and transmission coefficients at discontinuities.
CINEMA tutorial
Authors: Kevin J. Healy
Venue: Proceedings of the 17th conference on Winter simulation (1985)

CINEMA is a general purpose, micro-computer based animation system designed to work with the SIMAN simulation language. A sophisticated yet easy to use graphical interface allows users with little or no programming skills to build highly detailed animations of any SIMAN simulation model.
Semimodular Lattices and Semibuildings
Authors: David Samuel Herscovici
Venue: Journal of Algebraic Combinatorics: An International Journal (1998)

In a ranked lattice, we consider two maximal chains, or &ldquo;flags&rdquo; to be i-adjacent if they are equal except possibly on rank i. Thus, a finite rank lattice is a chamber system. If the lattice is semimodular, as noted in [9], there is a &ldquo;Jordan-H&ouml;lder permutation&rdquo; between any two flags. This permutation has the properties of an S_n-distance function on the chamber system of flags. Using these notions, we define a W-semibuilding as a chamber system with certain additional properties similar to properties Tits used to characterize buildings. We show that finite rank semimodular lattices form an S_n-semibuilding, and develop a flag-based axiomatization of semimodular lattices. We refine these properties to axiomatize geometric, modular and distributive lattices as well, and to reprove Tits&lsquo; result that S_n-buildings correspond to relatively complemented modular lattices (see [16], Section 6.1.5).
An ROI Search Method for Still Images Based on Set Descriptions
Authors: Taek Mu Kwon, Pankaj Agrawal, Donald B. Crouch
Venue: Multidimensional Systems and Signal Processing (1998)

Detecting a Region of Interest (ROI) from a digitized image is an important step towards highly efficient image communication. Although a significant amount of work has been done for time varying images, in which the ROI is expressed in terms of the differences between sequential frames, only limited work has been done for analyzing still images. In this paper, we present an ROI search algorithm for still images based on a description of the objects in the image. The proposed approach uses no matching techniques, but rather uses a set descriptor of the pattern. Experimental results obtained by applying this technique to facial images show that the proposed methodology is robust with regard to variations in scale and angle as well as stray variations in the image.
On the accuracy of predicting rate monotonic scheduling performance
Authors: Steve Vestal
Venue: Proceedings of the conference on TRI-ADA '90 (1990)

Rate monotonic scheduling provides analytic techniques that allow the feasibility and processor utilization of a set of periodically scheduled tasks to be computed. However, the scheduling model must be adapted to take into account specific implementation details. Moreover, a model is not the same thing as the actual system; the accuracy and reliability of a model must be verified. This paper presents an Ada coding template for rate monotonic scheduling and models for that template. A series of experiments is described whose purpose was to compare the analytic predictions and measured performance for some sample task sets. Predicted and measured values differed by less than about 3% in all cases.
Dynamic Verification of C++ Generic Algorithms
Authors: Changqing Wang, David R. Musser
Venue: IEEE Transactions on Software Engineering (1997)

Dynamic verification is a new approach to formal verification, applicable to generic algorithms such as those found in the Standard Template Library (STL, part of the Draft ANSI/ISO C++ Standard Library). Using behavioral abstraction and symbolic execution techniques, verifications are carried out at an abstract level such that the results can be used in a variety of instances of the generic algorithms without repeating the proofs. This is achieved by substituting for type parameters of generic algorithms special data types that model generic concepts by accepting symbolic inputs and deducing outputs using inference methods. By itself, this symbolic execution technique supports testing of programs with symbolic values at an abstract level. For formal verification we also need to generate multiple program execution paths and use assertions (to handle while loops, for example), but we show how this can be achieved via directives to a conventional debugger program and an analysis database. The assertions must still be supplied, but they can be packaged separately and evaluated as needed by appropriate transfers of control orchestrated via the debugger. Unlike all previous verification methods, the dynamic verification method thus works without having to transform source code or process it with special interpreters. We include an example of the formal verification of an STL generic algorithm.
Design and implementation of a parallel pipe
Authors: Jonathan Karges, Otto Ritter, Sándor Suhai
Venue: ACM SIGOPS Operating Systems Review (1997)

The parallel pipe PAR_PIPE is a communication mechanism. Data which are written to the PAR_PIPE by a single process can be read by multiple processes concurrently in first-in-first-out manner, where all reading processes read the entire data stream. We use a dynamic partitioned buffer limited in size only by available hardware resources to ensure that the writing process cannot be blocked because of slow reading processes. In a further step we examine how far caching with an optimized saving policy on top of the file based buffer can improve the performance of the PAR_PIPE. Design and implementation of two versions of the PAR_PIPE (one without caching, one with caching) are described. We outline the general advantages of the PAR_PIPE over conventional UNIX shell script solutions and evaluate the results of performance measurements done for both PAR_PIPE versions.
Overview of microelectromechanical systems and design processes
Authors: William C. Tang
Venue: Proceedings of the 34th annual Design Automation Conference (1997)

New design tools and automation strategies are neededto create robust, cost-effective, and manufacturable micro-machineddevices and systems. Some of the design automationissues include mixed-technology simulation, materialproperty prediction in the micron-size regime, self-consistencyin coupled electromechanical devices, integratedmodeling environment, micro-fluid modeling, and synthesisof device geometries and process flows. Advancement inthese areas will path the way to full-scale maturity of theMEMS field.
High Speed Externally Asynchronous/ Internally Clocked Systems
Authors: W. S. VanScheik, R. F. Tinder
Venue: IEEE Transactions on Computers (1997)

Externally asynchronous/internally clocked (EAIC) systems provide a means of reliable controller design and operation, and incorporate many advantages of both synchronous and fully asynchronous methodologies. The basic memory module of an internally-clocked system is the DFLOP, the outputs of which are fully protected from metastability-generated anomalies. As a result, the only input constraint on an internally clocked system is a minimum pulse width corresponding to the frequency of the internal clock. In an internally clocked system, a clock event is not generated until all DFLOPs have resolved into a logically defined state. Because the period of the internal clock depends only on propagation delay through the components of the system, the clock always operates at a maximum possible frequency. Several internally clocked systems, involving both static and dynamic logic, are analyzed by using PSPICE simulations and the results of some real time tests are reported for comparison purposes. The operation characteristics of the DFLOP are analyzed at the component level, and system level comparisons are made with previous work. With submicron CMOS designs using dynamic logic, the internal frequencies of EAIC systems are predicted to exceed 300 MHz with throughputs of less than four ns.
The Illumination-Invariant Matching of Deterministic Local Structure in Color Images
Authors: David Slater, Glenn Healey
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1997)

The availability of multiple spectral measurements at each pixel in an image provides important additional information for recognition. Spectral information is of particular importance for applications where spatial information is limited. Such applications include the recognition of small objects or the recognition of small features on partially occluded objects. We introduce a feature matrix representation for deterministic local structure in color images. Although feature matrices are useful for recognition, this representation depends on the spectral properties of the scene illumination. Using a linear model for surface spectral reflectance with the same number of parameters as the number of color bands, we show that changes in the spectral content of the illumination correspond to linear transformations of the feature matrices, and that image plane rotations correspond to circular shifts of the matrices. From these relationships, we derive an algorithm for the recognition of local surface structure which is invariant to these scene transformations. We demonstrate the algorithm with a series of experiments on images of real objects.
Economic Analysis of Test Process Flows for Multichip ModulesUsing Known Good Die
Authors: Cynthia F. Murphy, Magdy S. Abadir, Peter A. Sandborn
Venue: Journal of Electronic Testing: Theory and Applications (1997)

The cost and quality of a multichip assembly is highly dependent upon the cost and quality of the incoming die. In the case of a bare die assembly, it is often highly desirable to use either Known Good Die (KGD) or die that have been burned-in and tested to the same level of quality and reliability as their packaged die equivalents. However, performing full bare die burn-in and test may not always be cost-effective. This paper examines the question of whether it is always necessary to use KGD to produce a cost-effective multichip module (MCM) of acceptable quality. A process-flow based cost model is used to compare the cost and quality of MCMs assembled with KGD to MCMs assembled with die that have received wafer-level test only. In addition to test effectiveness at the wafer, die, and module level, factors that are considered include die complexity (size and I/O), number of die per MCM, the cost of producing the KGD, and rework costs and effectiveness. The cost model captures inputs from wafer fabrication through MCM assembly and rework. Monte Carlo simulation is used to account for uncertainty in the input data. The resulting sensitivity analyses give final MCM cost and quality as a function of the various factors for both KGD and die that have received wafer-level test only.