ppxscal/embedding_network huggingface dataset:
Amortized efficiency of list update and paging rules
Authors: Daniel D. Sleator, Robert E. Tarjan
Venue: Communications of the ACM (1985)

In this article we study the amortized efficiency of the &ldquo;move-to-front&rdquo; and similar rules for dynamically maintaining a linear list. Under the assumption that accessing the ith element from the front of the list takes &thgr;(i) time, we show that move-to-front is within a constant factor of optimum among a wide class of list maintenance rules. Other natural heuristics, such as the transpose and frequency count rules, do not share this property. We generalize our results to show that move-to-front is within a constant factor of optimum as long as the access cost is a convex function. We also study paging, a setting in which the access cost is not convex. The paging rule corresponding to move-to-front is the &ldquo;least recently used&rdquo; (LRU) replacement rule. We analyze the amortized complexity of LRU, showing that its efficiency differs from that of the off-line paging rule (Belady's MIN algorithm) by a factor that depends on the size of fast memory. No on-line paging algorithm has better amortized performance.
Key factors in knowledge acquisition
Authors: Jack Fellers
Venue: ACM SIGCPR Computer Personnel (1987)

In recent years there has been a tremendous increase in the development of Expert Systems (ESs) in organizations. This increased development is straining the already limited supply of qualified ES developers. These ES developers have come to be know as Knowledge Engineers (KEs), and their job as Knowledge Engineering. The process of Knowledge Engineering is divided into two tasks: Knowledge Acquisition (KA) and ES construction. KA has been defined as "The process of extracting, structuring, and organizing Knowledge from several sources, usually human experts, so it can be used in a program." (Waterman, 1986; p. 392) This process of KA has been identified as the "bottleneck" that currently constrains the development of ESs.This paper summarizes what is known about the KA process in an effort to identify what the key factors are that influence the success of the KA phase of the Knowledge Engineering process. Due to the similarities that exist between ESs and traditional systems development, the literature that pertains to traditional Information Requirements Determination and to Systems Analysts will be utilized to guide this exploration. Case study reports of actual ES development projects and the practitioner literature from this highly applied field will also be referenced. A model of the knowledge Engineering process has been developed and will be used to help determine and discuss the key factors that influence the KA process.Five key factors have been identified and will be discussed in detail. These factors are: the attributes of the participants in the ES development process; elicitation techniques utilized in the process; the development of external representations; representation selection problems; and the verification of the ES by the Domain Expert who participates in its continued development via the user-system interface. These factors are presented, key issues identified, and research questions suggested for each area.It is hoped that the analysis of the key factors in KA will lead to the identification of the skills and techniques necessary to successfully perform the KA process. Once these skills have been identified, training programs can be developed to help reduce the shortage of qualified KEs and, ultimately, facilitate the increased development of ESs in organizations.
On the use of formal methods in software development
Authors: D. Bjorner
Venue: Proceedings of the 9th international conference on Software Engineering (1987)

We propose a total framework for the software development stages of specification (definition), design and coding. This framework is based on three cornerstones: (a) the concept of software development graphs which specify all the stages and steps of development; (b) the use of formal methods, in our case VDM, the Vienna Software Development Method, in all stages and steps of development; and (c) the clearly separate r&ocirc;les of theoretical computer scientists, programmers, software engineers, and development managers in all aspects of software development. Thus not only programming is formalised (ie. programs considered formal objects), but also development, its engineering and management (ie. the entire programming itself is also considered a formal object about which to reason).
Managing stored voice in the Etherphone system
Authors: Douglas B. Terry, Daniel C. Swinehart
Venue: ACM Transactions on Computer Systems (TOCS) (1988)

The voice manager in the Etherphone system provides facilities for recording, editing, and playing stored voice in a distributed personal-computing environment. It provides the basis for applications such as voice mail, annotation of multimedia documents, and voice editing using standard text-editing techniques. To facilitate sharing, the voice manager stores voice on a special voice file server that is accessible via the local internet. Operations for editing a passage of recorded voice simply build persistent data structures to represent the edited voice. These data structures, implementing an abstraction called voice ropes, are stored in a server database and consist of lists of intervals within voice files. Clients refer to voice ropes solely by reference. Interests, additional persistent data structures maintained by the server, serve two purposes: First, they provide a sort of directory service for managing the voice ropes that have been created. More importantly, they provide a reliable reference-counting mechanism, permitting the garbage collection of voice ropes that are no longer needed. These interests are grouped into classes; for some important classes, obsolete interests can be detected and deleted by a class-specific algorithm that runs periodically.
Semantic parallelization: a practical exercise in abstract interpretation
Authors: P. Jouvelot
Venue: Proceedings of the 14th ACM SIGACT-SIGPLAN symposium on Principles of programming languages (1987)

The parallelization of sequential programs is an adequate approach for the easy use of architectural features provided on parallel computers. We propose to enhance this technique with the notion of semantic parallelization. The principle is to consider the transformations of programs induced by parallelization as non-standard denotational semantics of the source programming language. We show how to apply this concept to detect, in a toy language ALL, parallelizable complex commands and to deal with some type of programs using indirections. Thanks to results in domain theory and abstract interpretation, we give correctness proofs for these transformations with respect to ALL standard semantic. A byproduct of our approach is that a denotational specification is also an executable prototype ;hence, we were able to implement a semantic parallelizer in the ML functional language. Running examples are supplied.
Modeling california earthquakes and earth structures
Authors: Michael R. Raugh
Venue: Communications of the ACM (1985)

Seismology has burgeoned into a modern science&mdash;force-fed by federal funding to advance technology for detecting underground nuclear explosions and predicting earthquakes, and by industry to improve tools for gas and oil exploration. Computers, seismic instrument systems, telemetry, and data reduction have played key roles in this growth.
The precedence-assignment model for distributed databases concurrency control algorithms
Authors: C. P. Wang, V. O. K. Li
Venue: Proceedings of the sixth ACM SIGACT-SIGMOD-SIGART symposium on Principles of database systems (1987)

We have developed a unified model, called the precedence-assignment model (PAM), of concurrency control algorithms in distributed database. It is shown that two-phase locking timestamp-ordering and other existing concurrency control algorithms may be modeled by PAM. We have also developed a new concurrency control algorithm under the PAM modeling framework, which is free from deadlocks and transaction restarts. Finally, a unified concurrency control subsystem for precedence-assignment algorithms is developed. By using this subsystem, different transactions may be executed under different concurrency control algorithms simultaneously.
Fast printed circuit board routing
Authors: J. Dion
Venue: Proceedings of the 24th ACM/IEEE Design Automation Conference (1987)

This paper describes the algorithms in a printed circuit board router used for fully automatic routing of high-density circuit boards. Completely automatic routing and running times of a few minutes have resulted from a new data structure for efficient representation of the routing grid, quick searches for optimal solutions, and generalizations of Lee's algorithm.
An efficient I/O interface for optical disks
Authors: Jeffrey S. Vitter
Venue: ACM Transactions on Database Systems (TODS) (1985)

We introduce the notion of an I/O interface for optical digital (write-once) disks, which is quite different from earlier research. The purpose of an I/O interface is to allow existing operating systems and application programs that use magnetic disks to use optical disks instead, with minimal change. We define what it means for an I/O interface to be disk-efficient. We demonstrate a practical disk- efficient I/O interface and show that its I/O performance in many cases is optimum, up to a constant factor, among all disk-efficient interfaces. The interface is most effective for applications that are not update-intensive. An additional capability is a built-in history mechanism that provides software support for accessing previous versions of records. Even if not implemented, the I/O interface can be used as a programming tool to develop efficient special purpose applications for use with optical disks.
Ray tracing deformed surfaces
Authors: Alan H. Barr
Venue: ACM SIGGRAPH Computer Graphics (1986)

A collection of new methods for ray tracing differentiable surfaces is developed. The methods are general, and extend the set of "ray-traceable" surfaces suitable for use in geometric modeling. We intersect a ray l = at + b, t gt; 0 with a parametric surface x = f(u, v), and with implicit surfaces f(x,y,z) = 0. A smooth surface is treated as a deformation of a flat sheet; the intersection problem is converted to a new coordinate system in which the surfaces are flat, and the rays are bent. We develop methods for providing good initial estimates of the parametric intersection values, and a "closeness criterion," to reduce computation. These same criteria help us substitute a set of simpler surfaces for the more complex surface. The parametric method produces the intersection values of u, v, and t. These are suitable for shading calculations and for mapping textures onto the surface; they can also produce the local coordinate frame values, suitable for anisotropic lighting models.
Optimistic recovery in distributed systems
Authors: Rob Strom, Shaula Yemini
Venue: ACM Transactions on Computer Systems (TOCS) (1985)

Optimistic Recovery is a new technique supporting application-independent transparent recovery from processor failures in distributed systems. In optimistic recovery communication, computation and checkpointing proceed asynchronously. Synchronization is replaced by causal dependency tracking, which enables a posteriori reconstruction of a consistent distributed system state following a failure using process rollback and message replay. Because there is no synchronization among computation, communication, and checkpointing, optimistic recovery can tolerate the failure of an arbitrary number of processors and yields better throughput and response time than other general recovery techniques whenever failures are infrequent.
Algorithm animator: a tool for programming learning
Authors: Elena Giannotti
Venue: ACM SIGCSE Bulletin (1987)

A primary and most important problem in computer science education at the undergraduate level lies in providing students with interactive tools to favor learning, to stimulate a more effective laboratory activity, and to facilitate the development and debugging of programs. Toward this end, we have designed VISAL, a tool for animating the execution of a program, and a library of fundamental algorithms instrumented for visualization. Visualizing the execution of a given program should enable the students to better understand the dynamic aspects of programming. We also describe the experimental work carried out by undergraduates of a programming course, in order to verify both the effectiveness of VISAL implementation and the role played by VISAL as an aid in learning activities.
Modeling concepts for VLSI CAD objects
Authors: D. S. Batory, Won Kim
Venue: ACM Transactions on Database Systems (TODS) (1985)

VLSI CAD applications deal with design objects that have an interface description and an implementation description. Versions of design objects have a common interface but differ in their implementations. A molecular object is a modeling construct which enables a database entity to be represented by two sets of heterogeneous records, one set describes the object's interface and the other describes its implementation. Thus a reasonable starting point for modeling design objects is to begin with the concept of molecular objects. In this paper, we identify modeling concepts that are fundamental to capturing the semantics of VLSI CAD design objects and versions in terms of molecular objects. A provisional set of user operations on design objects, consistent with these modeling concepts, is also defined. The modeling framework that we present has been found useful for investigating physical storage techniques and change notification problems in version control.
Parlog86 and the dining logicians
Authors: G. A. Ringwood
Venue: Communications of the ACM (1988)

A classic problem in concurrent programming is that of the "dining philosophers" which challenges the power of any aspiring concurrent program language. Recently, a growing number of logic programming languages have been refined to handle concurrent programming, one in particular is Parlog86.
Equilibrium states of Runge-Kutta schemes: part II
Authors: George Hall
Venue: ACM Transactions on Mathematical Software (TOMS) (1986)

A theory is given that accounts for the observed behavior of Runge-Kutta codes when the stepsize is restricted by stability. The theory deals with the general case when the dominant eigenvalues of the Jacobian may be a complex conjugate pair. This extends and generalizes the results of Part I of this paper, which deal with the real case. Familiarity with Part I is assumed, but not essential.
A hierarchical approach test vector generation
Authors: S. J. Chandra, J. H. Patel
Venue: Proceedings of the 24th ACM/IEEE Design Automation Conference (1987)

Given a combinational network and a specific stuck-at fault to be detected, there are several approaches to generating a test vector. However, most of these approaches fail to exploit the hierarchy inherent in any complex digital design. This paper presents a hierarchical approach to test vector generation. HIPODEM: A test generation system based on this approach is presented. General procedures to perform forward implication and backtracing in a hierarchical framework are discussed in detail. Experimental results obtained from test runs on both flat-level and hierarchical circuits are compared. For the circuits tried, generating tests from a hierarchical description proved to be faster than doing it from a flat level description of the circuit.
A Rule Based Approach for Visual Pattern Inspection
Authors: A. M. Darwish, A. Jain
Venue: IEEE Transactions on Pattern Analysis and Machine Intelligence (1988)

The authors investigate the use of a priori knowledge about a scene to coordinate and control bilevel image segmentation, interpretation, and shape inspection of different objects in the scene. The approach is composed of two main steps. The first step consists of proper segmentation and labeling of individual regions in the image for subsequent ease in interpretation. General as well as scene-specific knowledge is used to improve the segmentation and interpretation processes. Once every region in the image has been identified, the second step proceeds by testing different regions to ensure they meet the design requirements, which are formalized by a set of rules. Morphological techniques are used to extract certain features from the previously processed image for rule verification purposes. As a specific example, results for detecting defects in printed circuit boards are presented.
An input-output model of interactive systems
Authors: M. Shaw
Venue: ACM SIGCHI Bulletin (1986)

Interactive user interfaces depend critically on underlying computing system facilities for input and output. However, most computing systems still have input-output facilities designed for batch processing. These facilities are not adequate for interfaces that rely on graphical output, interactive input, or software constructed with modern methodologies. This paper details the deficiencies of batch-style input-output for modern interactive systems, presents a new model for input-output that overcomes these deficiencies, and suggests software organizations to take advantage of the new model.
Coons Award Lecture
Authors: Donald P. Greenberg
Venue: Communications of the ACM (1988)

The 1987 recipient of the Steven A. Coons Award speaks out on the state of the art in computer graphics and what the future can bring the industry under the right influences.
An instruction fetch unit for a graph reduction machine
Authors: S. S. Thakkar, W. E. Hostmann
Venue: ACM SIGARCH Computer Architecture News (1986)

The G-machine provides architecture support for the evaluation of functional programming languages by graph reduction. This paper describes an instruction fetch unit for such an architecture that provides a high throughput of instructions, low latency and adequate elasticity in the instruction pipeline. This performance is achieved by a hybrid instruction set and a decoupled RISC architecture. The hybrid instruction set consists of complex instructions that reflect the abstract architecture and simple instructions that reflect the hardware implementation. The instruction fetch unit performs translation from complex instruction to a sequence of simple instructions which can be executed rapidly. A suitable mix of techniques, including cache, buffers and the translation scheme, provide the memory bandwidth required to feed a RISC execution unit. The simulation results identify the performance gains, maximum throughput and minimum latency achieved by various techniques. Results achieved here are in general applicable to von Neumann architectures.
A multiple, virtual-workspace interface to support user task switching
Authors: Stuart K. Card, Austin Henderson,  Jr.
Venue: ACM SIGCHI Bulletin (1986)

An interface is presented that is designed to help users switch among tasks on which they are concurrently working. Nine desirable properties for such an interface are derived. It is argued that a key constraint to building interfaces that support task switching is that low user-overhead switching among tasks requires a large amount of display space, whereas actual display space is limited. A virtual workspace design is presented that greatly speeds the inevitable task-switching induced window faulting. The resulting interface is presented as a study in theory-based human-interface design. It is shown how in this case theory is important in inspiring a design, but design entailments outside the theory raise new issues that must be faced to make the design viable. These design experiences, in turn, help inspire new theory.
Some simple pretty-print facilities for REDUCE
Authors: P van den Heuvel, B J A Hulshof, J A van Hulzen
Venue: ACM SIGSAM Bulletin (1987)

Some simple REDUCE facilities are presented for pretty-printing quotients, formal derivatives and subscripted variables. The package, an extension of previously published possibilities, is completely written in RLisp and can be considered as an addition to the output repertoire of the Algebraic Mode.
Systolic algorithms to examine all pairs of elements
Authors: Zen-Cheung Shih, Gen-Huey Chen, R. C. T. Lee
Venue: Communications of the ACM (1987)

Four methods to solve the all pairs examination problem are presented. The first two methods are based on the fold-over scheme. The remaining two methods are adopted from some parallel sorting algorithms. All of these approaches can be implemented on a linear systolic array.
Generation of a Precise Binary Logarithm with Difference Grouping Programmable Logic Array
Authors: Hao-Yung Lo, Yoshinao Aoki
Venue: IEEE Transactions on Computers (1985)

The design algorithm of a differential group programmable logic array (DGPLA) to generate the precise binary logarithm function is suggested. It can reach an optimal condition such that the number of bits in a PLA is minimized, while the error is still kept as small as possible. Thus, the space in the PLA is saved, estimated at only 15.94 percent of the space for a readonly memory (ROM) counterpart.
Exploring the knowledge-based society: industry/education partnership to promote technological learning at the secondary level
Authors: I. L. Bruning, J. B. Reedy
Venue: Proceedings of the 1987 Fall Joint Computer Conference on Exploring technology: today and tomorrow (1987)

This paper takes the position that high school/industry/university partnerships are mutually beneficial. The experiences of Troy Tech, a high tech magnet program, are offered to justify this position. Results show that these partnerships foster a set of curricular goals and objectives that provide industry/universities with well-qualified applicants for employment and/or higher education. Students benefit from this rigorous and challenging curriculum that prepares them to meet their goals for the future.
Concert: design of a multiprocessor development system
Authors: R. R. Halstead,  Jr., T. L. Anderson, R. B. Osborne, T. L. Sterling
Venue: ACM SIGARCH Computer Architecture News (1986)

Concert is a shared-memory multiprocessor testbed intended to facilitate experimentation with parallel programs and programming languages. It consists of up to eight clusters, with 4-8 processors in each cluster. The processors in each cluster communicate using a shared bus, but each processor also has a private path to some memory. The novel feature of Concert is the RingBus, a segmented bus in the shape of a ring that permits communication between clusters at relatively low cost. Efficient arbitration among requests to use the RingBus is a major challenge, which is met by a novel hardware organization, the criss-cross arbiter. Simulation of the Concert RingBus and arbiter show their performance to lie between that of a crossbar switch and a simple shared intercluster bus.
Grobner bases of ideals of convergent power series
Authors: H. Kobayashi, A. Furukawa, T. Sasaki
Venue: Proceedings of the fifth ACM symposium on Symbolic and algebraic computation (1986)

In extending Buchberger's theory[1.2] of Gr&ouml;bner basis of polynomial ideals, Gr&ouml;bner basis (standard basis in the notion of Hironaka[3]) of ideals containing power series has been discussed by several authors: Galligo[4] discussed reduction procedure of power series w.r.t. a given Gr&ouml;bner basis, and Mora[5] derived a construction procedure of Gr&ouml;bner basis in a local ring. In this paper, we formulate the Gr&ouml;bner basis theory of convergent power series via truncated power series. In this formulation, finiteness and construction of Gr&ouml;bner basis is proved quite simply. However, the termination of construction procedure remains an open problem although we have several results on this problem.