aaron arena
Applications Engineer at Intel Corporation
application engineer intel psg
application engineer intel psg . hands-on project orientated person , strive create innovate . continually trying learn expanded technical background . technical skill : - specialty : fpga configuration , partial reconfiguration ( pr ) , video protocol ( e.g . displayport , hdmi ) , xcvr's - tool : quartus , unity - hdl : verilog , vhdl - programming : python , c , c # , c++ , assembly , javascript , html , cs - framework : electron , sfml
Intel Corporation
https://www.linkedin.com/company/intel-corporation
Applications Engineer
MAG Team (Nov. 2019 - Present)
- Provide customer support regarding FPGA Design and Debug Tools, IP, I/O, and Documentation
   - Specialty Support Areas: Configuration, Partial Reconfiguration (PR), Video (i.e. DisplayPort)
- Mentor Interns and Emerging Professionals in Rotation Program to develop technical capabilities and offer guidance along career path
 

Rotation Program (Jun. 2018 - Oct. 2019)
* New User Experience Group
   - Organized Training Material and Workshop
   - Created an Intro to Video Workshop using VGA on a Terasic DE10-Lite w/ MAX 10 FPGA
   - TA'ed and taught workshops to local universities
   - Revamped the upload process the Intel Design Store (Intel's online repository for FPGA Designs)

* Regional Applications Engineering (RAE)
   - Provided technical support related Quartus and Design Tools, Configuration, I/O and Documentation for customers

* Native PHY (Design) Programmable IP Engineering (PIPE)
   - Built a CSV translation tool in Python to accelerate IP development in Perforce
San Jose, CA
https://media-exp1.licdn.com/dms/image/C560BAQGpvWtEtj9oTQ/company-logo_100_100/0/1625151708870?e=1655942400&v=beta&t=YbTpo542j3uT4TXjQcy__Jwz_PgLpCyYJIyYBd0acT8
Hewlett Packard Enterprise
https://www.linkedin.com/company/hewlett-packard-enterprise
R&D Hardware Design Engineer
American multinational enterprise information technology company that focuses on providing businesses with server, storage, and networking solutions

Job Duties:
•	Setup a test to evaluate the signal integrity and performance of a PCIe Ethernet switch 
•	Compiled and updated guides to use a cross-referencing tool within Cadence
•	Designed a net name symbol parser to aid in building custom symbol blocks inside of 
        Cadence schematics
Roseville,CA
https://media-exp1.licdn.com/dms/image/C4E0BAQH6qdm7VJ5BPA/company-logo_100_100/0/1593697162881?e=1655942400&v=beta&t=nfWKAePFfhlchhCtfjX-IPzN5Jdvn6x5iaJ5CCTI5Ls
Kipkay Kits
Lead Hardware Engineer
Online-based company that designs do-it-yourself (DIY) projects to educated and expanded people’s knowledge about engineering and electronics while yielding valuable hands-on experience

Job Duties:
•	Designed, prototyped, and built small DIY electronic projects for kids and hobbyists  
•	Developed assembly instructions and customer service protocols for each project
Culver City, CA
Electrical Engineering
Master of Science - MS
California Polytechnic State University-San Luis Obispo
https://www.linkedin.com/school/california-polytechnic-state-university-san-luis-o/
https://media-exp1.licdn.com/dms/image/C560BAQE6Ud53o_AMJw/company-logo_100_100/0/1568413511511?e=1655942400&v=beta&t=7slFKHWlxzgpgBJQ3yW4lK2c3WNE4VycuNI14bMZQiQ
Electrical Engineering
Bachelor of Science - BS
California Polytechnic State University-San Luis Obispo
https://www.linkedin.com/school/california-polytechnic-state-university-san-luis-o/
https://media-exp1.licdn.com/dms/image/C560BAQE6Ud53o_AMJw/company-logo_100_100/0/1568413511511?e=1655942400&v=beta&t=7slFKHWlxzgpgBJQ3yW4lK2c3WNE4VycuNI14bMZQiQ
Cal Poly Rugby Club
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Consumer Electronics Society
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IEEE
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Radio Waves, Microwaves, and Photonics
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Fun with Physics
Causal 3D Physics-based Puzzle Platformer

Built in one week using Unity
https://aaron7eleven.itch.io/fun-with-physics
Speed
Video game submission for GMTK Game Jam 2020

Built in 3 days using Unity
https://aaron7eleven.itch.io/speed
Heterogeneous Compiler
A compiler that accepts software (e.g. C) and returns a combination of software and HDL (e.g. C and Verilog) that represents a fully functional SoC Design

•	Integrated the Tabu Search + Simulated Annealing (TSSA) and Genetic Search (GS) partitioning algorithms into a Cal Poly Designed Heterogeneous Compiler: Twill

•	Implemented resulting SoC design with Xilinx ISE and Xilinx SDK on a Virtex 5 FPGA with a Microblaze softcore processor

•	When using a Sobel Filter as the stimulus with a problem size ranging from 49 to 32,400 and comparing the SoC design with the original partitioning algorithm (Knapsack 0-1),
o	the TSSA partitioned SoC designs gained a performance boost between 38.3 % and 56.5 % while using between 2.4 % and 8.8 % less energy
o	the GS partitioned SoC designs gained a performance boost between 46.6 % and 113.6 % while using between 10.3 % and 46.8 % less energy
Portable Phone Charger
Designed, prototype, and built a portable USB phone charger using a pre-designed boost converter and Lipo battery charger module and a 3.7 V Lipo Battery
RAT CPU
A CPU designed in VHDL to run assembly programs on a Diligent Nexys 2 board and Digilent Basys 3 board

•	Improved processor by changing architecture into 5 stage pipeline MIPS architecture to improve performance and parallelism 

•	Added a 2-bit saturated counter branch predictor to improve performance and decrease branch stalls

•	Added a 176B four way set associative cache to emulate real world scenarios
Sobel Filter Hardware Accelerator
A filter that contains an edge detection algorithm that applies a 2D convolution on an image or video

•	The filter was implemented on Digilent Basys 3 FPGA using Vivado IDE

•	The goal was to compare the Sobel filter runtime using a hardware (Verilog) and software (C) implementation

•	The hardware provided a 35 % speed up compared to the software
Net Name Symbol Parser
Aimed to aid in building custom symbol blocks inside of Cadence schematics
Arduino Specifications Checker
Labview designed automated system to check given specs (such as PWM) of an Arduino Uno
Audio Feeler & Visualizer
Allows user to see and feel music they are listening to

● This system was composed of the Digilent Zybo board, coin cell motors, LED's and a RTOS (freeRTOS) using Vivado and Xilinx SDK as the dev tools

● The user inputted a music (via headphone jack) to an on-board audio codec on Zybo board and send the audio data (via I2C) to the RTOS

● Inside of the RTOS, a FFT and Peak Detection were done on the audio to gather the peak frequency data

● The frequency data was sent back to the FPGA to output to the external LED's and motor to blink and vibrate, respectively, with each LED and motor combo corresponding to a certain frequency
Luxmeter
Measures the lights brightness, light brightness information is transmitted to Arduino Uno and displayed onto an LCD screen
Snore Detector
Listens for ambient noise in a quiet setting, detects loud noises (e.g. snoring), and triggers an alarm to wake the person snoring

● The snore detector was comprised of an Arduino Uno, a Sparkfun microphone, an Adafruit 8 x 8 LED Matrix, a buzzer, and a DC motor

● The microphone would gather the raw audio data and send it Arduino to see if the audio is loud enough to be snoring

● The Arduino would send the audio data (via I2C) to the LED Matrix to visualize the audio data

● Once the Ardunio detected three instances of snoring, it would trigger the buzzer to sound, the motor to vibrate and the LED matrix to blink in order to wake the person up
DC Power Supply
A dual 20 V (30 W) power supply. Assembled as a part of the class: IME 156.
Education
Intel Innovators
Treasurer
Intel Innovators is a chapter of Toastmaster International based in San Jose

- Manage membership dues
- Set up bank account for club
- Volunteer Roles in Speaking Contests
Education
Intel Latinx Network (ILN)
Professional Development
- Lead events to help develop skill, such as Leadership and Networking, in career
- Get feedback on where and how people want to grow
- Volunteer to help with internal development conferences
Education
IEEE Consumer Electronics Society
https://www.linkedin.com/company/ieee-consumer-electronics-society
Project Head
o	Designed, prototyped, and built a portable USB phone charger
	Allow club members to build project that supplemented existing technology
	Created a source of income for the club

o	Marketed and planned hands-on workshops
	Posted flyers, sent event invites via email and posted on Facebook
	Provided tools and personal expertise to help club members build the phone charger or teach them how to solder
Cal Poly Rugby
Vice President of Away Games
Processed paperwork for team eligibility and travel
Radio Waves, Microwaves, and Photonics
Social Coordinator
Planned external social events and booth for Cal Poly's EE Open House
https://www.linkedin.com/in/marjorie-catt-b749b511
Marjorie Catt
High Speed Analog Applications Engineer at Intel Corporation
San Jose, CA
https://www.linkedin.com/in/yucheng-wang-a25607a3
yucheng wang
Intel - Application Engineer
Milpitas, CA
https://www.linkedin.com/in/benjamin-reynolds-666a28b7
Benjamin Reynolds
Application Engineer at Intel Corporation - Programmable Solutions Group
San Jose, CA
https://www.linkedin.com/in/bret-gustafson-695368173
Bret Gustafson
Application Engineer at Intel Corporation
San Francisco Bay Area
https://www.linkedin.com/in/joel-hernandez-ba3397197
Joel Hernandez
Applications Engineer at Intel Corporation
McAllen, TX
https://www.linkedin.com/in/mathias-berglund-592b30132
Mathias Berglund
Application Engineer at Intel Corporation
San Jose, CA
https://www.linkedin.com/in/aracelymejia
Aracely Mejia
PSG Application Engineer at Intel Corporation
San Jose, CA
https://www.linkedin.com/in/shawnnac
Shawnna Cabanday
Application Engineer at Intel Corporation
Greater Seattle Area
https://www.linkedin.com/in/jaewon-seo-2517a56
JaeWon Seo
IP Design Engineer at Altera
Dublin, CA
https://www.linkedin.com/in/deepika-ganju-67436789
Deepika Ganju
Application Engineering Manager at Intel
Austin, Texas Metropolitan Area
https://www.linkedin.com/in/neehar-jandhyala-6034284
Neehar Jandhyala
Physical Design Engineer at Intel Corporation
San Jose, CA
https://www.linkedin.com/in/susan-cohen-977560177
Susan Cohen
Application Engineer, Acceleration at Intel Corporation
Austin, Texas Metropolitan Area
https://www.linkedin.com/in/cathy-nguyen-b0b9711b0
CATHY NGUYEN
Server Validation Engineer at Intel Corporation
Austin, TX
https://www.linkedin.com/in/anil-godbole-76ab555
Anil Godbole
FPGA IP Marketing Manager at Intel Corporation
Cupertino, CA
https://www.linkedin.com/in/prasad-reddy-5197553
Prasad Reddy
Field Applications Engineering Management - Intel Corporation
San Jose, CA
https://www.linkedin.com/in/djnielsen
Daniel Nielsen
PSG Rotation Program at Intel Corporation
San Francisco Bay Area
https://www.linkedin.com/in/janpreet
Janpreet Singh
DevOps Engineer at Unqork
New York City Metropolitan Area
https://www.linkedin.com/in/apurva-gandole-887aa775
Apurva Gandole
Applications Engineer Sr l at Synopsys Inc
Mountain View, CA
https://www.linkedin.com/in/prasadmayank
Max Prasad
Entrepreneur & Computer Engineer
Tempe, AZ
https://www.linkedin.com/in/niletronics
Nilesh Dattani
Senior Hardware Engineer at Microsoft
Redmond, WA
Aaron Arenas
https://www.linkedin.com/in/aaron-arenas-a3a119b8
general manager at Emergency Restoration specialist Corp.
United States
Aaron Arenas
https://pa.linkedin.com/in/aaron-arenas-501ab473
Mecánico y operador de Grúas Porticas en Manzanillo International Terminal
Panama
Aaron A. Arenas
https://aw.linkedin.com/in/aaron-arenas-a73b091b4
Senior student at Colegio E.P.I. unit Economia in specialisation Tourism Administration
Oranjestad
Julio Aarón Arenas Leon
https://cl.linkedin.com/in/julio-aar%C3%B3n-arenas-leon-934524b0
Asesor Ssoma   en Incolur
Valparaíso