Arunvenkatesh A.
Analog Design Engineer at Apple
Analog Design Engineer at Apple
Highly motivated and enthusiastic mixed signal IC designer.
With solid background in analog IC  design and sound understanding of signal processing concepts, I can comfortably play across areas to improve my circuit design.
Apple
https://www.linkedin.com/company/apple
Analog Design Engineer
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Broadcom Inc.
https://www.linkedin.com/company/broadcom
Staff Design Engineer
High precision analog and mixed-signal circuit design for analog sensor ASICs.
Orange County, California Area
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Linear Technology
https://www.linkedin.com/company/linear-technology
Analog Design Intern
Signal Conditioning group. Design of DT-Delta Sigma ADC
Dallas/Fort Worth Area
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Texas A&M University
https://www.linkedin.com/company/texas-a&m-university
Teaching Assistant
ECEN 214 Circuit Theory
Bryan/College Station, Texas Area
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Electrical Engineering
Master's degree
Texas A&M University
https://www.linkedin.com/school/texas-a&m-university/
Analog and Mixed Signal design
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Electronics and Communications Engineering
Bachelor of Engineering (B.E.)
College of Engineering, Guindy
https://www.linkedin.com/school/college-of-engineering-guindy/
Undergrad student member @ Integrated Systems Laboratory
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Clock harmonic distortion reduction technique for full tunable range in switched-R-MOSFET-C filters
Analog Integrated Circuits and Signal Processing
http://www.springer.com/-/1/AVRFOx5u2brxj7RS3BSO
Reduced clock harmonic distortion technique in maximum tunable switched-R-MOSFET-C filters
Circuits and Systems (MWSCAS), 2014 IEEE 57th International Midwest Symposium on
http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6908595
Advanced Analog Design
ECEN 607
Applied partial differential equations
MATH 602
Mixed Signal Interface
ECEN 610
Solid State Devices
ECEN 671
mm- wave IC Design
ECEN 625
Communication System Design
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Data Converters
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Digital Signal Processing
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RF Microelectronics
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Transmission Lines
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Introduction to Corporate Finance
Coursera
Introduction to Financial Accounting
Coursera
Sub-Nyquist sampling ADC for sparse wide-band signals
Implemented the Modulated Wideband Converter (MWC). The MWC consists of PRBS generator, mixer, low Pass filter followed by low sampling rate ADC. The output of the ADC is stored in memory. The signal processing block built onto cyclone II FPGA, accesses the data stored and reconstructs the entire received signal with appreciable Signal to Error ratio. This architecture enables direct downconversion of multiple message bands simultaneously without any kind of carrier synchronization required.
Hardware Simulator for Cochlear Implant Device
Developed the entire system model in MATLAB.  
Interfaced various ICs with the Cyclone II FPGA and coded for the filter bank in VHDL. Integrated the entire testbed using FPGA and off-the-shelf components. The testbed consists of pre-emphasis filter, filter bank, envelope detector, integrator, nonlinear amplitude mapping, amplitude quantizer, and frame generator.
Cochlear Implant IC design
This chip designed includes the complete implant - power recovery - Clock and Data recovery - reference generator - Current steering D/A
https://www.linkedin.com/in/sizhao-y-37b955128
Sizhao Y.
Design Verification Engineer at Apple
College Station, TX
https://www.linkedin.com/in/amith-vikram-pai-b9934b34
Amith Vikram Pai
Design Verification Engineer at Apple
Santa Clara, CA
https://www.linkedin.com/in/mtm19910101
Tianming Ma
ASIC Engineer at Apple
San Francisco Bay Area
https://www.linkedin.com/in/lingke-zhang-239231a4
Lingke Zhang
Physical Design Engineer at Apple
Santa Clara, CA
https://www.linkedin.com/in/aman-arora-62856b54
Aman Arora
CPU Implementation Engineer at Apple
Austin, TX
https://www.linkedin.com/in/si-yafei-0711
Si Yafei
Hardware Design Engineer at Apple
Santa Clara, CA
https://www.linkedin.com/in/yanliutamu
Yan Liu
Hardware Validation Engineer at Apple
San Francisco Bay Area
https://www.linkedin.com/in/lin-zhou-69251664
Lin Zhou
ASIC Design Engineer at Apple
San Francisco Bay Area
https://www.linkedin.com/in/shashanknaphade
Shashank Naphade
Design Verification Engineer at Apple
San Francisco Bay Area
https://www.linkedin.com/in/swapnilreddy
Swapnil Reddy Mamidi
Design Verification Engineer at Apple
Austin, TX
https://www.linkedin.com/in/srinivas-ambati-venkatesh-14124a4a
Srinivas Ambati Venkatesh
Chip Design Engineer at Apple
San Francisco Bay Area
https://www.linkedin.com/in/amirtahmasbi
Amir Tahmasbi
Senior Software Engineer, Core OS at Apple
San Diego, CA
https://www.linkedin.com/in/shwetaanugu
Shweta Anugu
Sr RTL Design Engineer at Apple
Santa Clara, CA
https://www.linkedin.com/in/luyangli
Luyang Li
Senior Mixed Signal Engineer at NVIDIA
Sunnyvale, CA
https://www.linkedin.com/in/bhavikparekh51
Bhavik Parekh
Analog and PMIC Design Engineer at Dialog Semiconductor
San Francisco Bay Area
https://www.linkedin.com/in/anuj-panwar
Anuj Panwar
Circuit Design Engineer at Apple
San Francisco Bay Area
https://www.linkedin.com/in/nityanand-balkrishna-anchan-705ba7153
Nityanand Balkrishna Anchan
Hardware Design Engineer at Apple
Cupertino, CA
Jim Douglass
      
          



            
              
        
              
  

    
        Arun did excellent work for Linear Technology during his internship.  He quickly ramped up on topics in which he had no prior experience.  His solid fundamentals allowed him to understand and then extend concepts he analyzed.  He works hard, and he has a good attitude and pleasant disposition.

We are confident that Arun will be an effective, efficient, and valuable professional.
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Analog Mixed-Signal and RF (AMS/RF) IC Design and Development Group
https://www.linkedin.com/groups/27032
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ANALOG MIXED SIGNAL
https://www.linkedin.com/groups/98379