For the given job description << Job Title : Fullstack Java EngineerJob Location: RemoteDuration: Long Term Contract About Edify Technologies:Transforming Businesses with Innovative Digital Solutions!  Headquartered in Naperville, IL, we are a dynamic team with over two decades of industry expertise, dedicated to delivering robust business solutions, staff augmentation, and a comprehensive range of application and web services. As a former recipient of INC. Magazine's prestigious '5000 Fastest Growing Private Companies' award, we take immense pride in our proven track record of success.At Edify Technologies, we partner with both small and large customers globally, empowering them to enhance their technology footprint, reduce unnecessary costs, develop sustainable IT solutions, and gain a competitive edge in today's digital world. We believe in creating an impact through innovation, driving tangible results that propel businesses forward. Join our passionate team and make a difference in the ever-evolving tech landscape!  Join Our Team:Are you a Fullstack Java Engineer, looking for a dynamic opportunity to accelerate your career?  JOB REQUIREMENTS:Required Skills: Minimum 8 years experience in Fullstack Java Engineer (application, integration, solution). 2+ years with event driven architecture, 3+ years with Microservices architecture 4+ years with legacy monolithic architectures. 4+ years hands on experience migrating from one framework to another. Developing scalable, secure, access-controlled Java SOAP and REST service APIs and implementations. Historical and proven knowledge and practical application of Java 8 and above, Spring (Framework, Data JPA, Security, Scheduler), Hibernate (JPA, Validator), JSF (Primefaces), J2EE (EJB and JSP), Oracle 12C and higher, Junit Framework, JMeter, Web Services, slf4j, JavaScript, PERL, XML, and HTML. Understanding and the ability to code in event driven, microservices, and SOA architectures. Court case management experience. Education: B.S. in Computer Science or related field.  We Believe in Diversity & Inclusion:As a minority-owned company, we deeply value and prioritize inclusion and diversity within our organization. We believe that a diverse and inclusive workforce fosters innovation, creativity, and empathy, leading to a richer and more rewarding work environment. We are committed to cultivating a workplace where every team member feels valued, respected, and empowered to contribute their unique perspectives and talents. Join us and be a part of a team that celebrates diversity, cherishes different perspectives, and fosters a collaborative and supportive community.  #InclusionAndDiversity #Empowerment #EdifyTechnologies #JoinOurTeam #Hiring
>> the resume: <<Professional SummaryResults-oriented Embedded Software Engineer with three years' experience in analysis, design, development, testing and implementation of various embedded software systems. Strong desire to obtain a responsible and challenging Embedded Software Developer's position where my education and work experience will have valuable application
SkillsProgramming Languages:  C, C++, Java, VHDL,Scripting: Shell, Python, Perl MATLAB, HTML, C#Tools: Microsoft Visual Studio, ADB, QXDM, Trace32, LTE. ModelSimPeripherals: I2C, SPI, QSPI, UART
Work History04/2017toCurrentEmbedded Software EngineerFlowserve Corporation|Emeryville,CA,Design and development on Qualcomm multiprocessor mobile computing platforms.Work closely with the hardware team developing low-level device driver software for solid-state storage devices.Optimize the storage drivers and boot loaders for performance and power consumption across multiple processors.Support the team with failure triage, system debug and customer support to implement and support new features in the storage driver.04/2014to03/2017C, C++ Embedded System Test EngineerEntegris, Inc.|Chandler,AZ,RF system Level Performance Verification and validation: RF system validation through statistical performance assessment, SW and Hardware Build Verification Testing and stability testing.Setting up the test environment to have comparable RF data with specified accuracy and tolerance and measuring various performance parameters for Wireless Transceivers such as Tx Max Power, WFQ, ACLR, EVM, SEM, Sensitivity, ACLR, Rx intermod, etc.at system level.Interfacing with cross functional teams for correlating the RF parametric data correlation, debugging and triaging Tools: QPST, QXDM, QSPR, Call Box, Spectrum analyzer, Signal generator.Test Automation and Scripting and production deployment: Developing and automating tests cases and scripts for large scale production testing of processor chips.Validation included modem and apps processor functional verification and performance measurement.Tools: Trace32, ADB, C#, Microsoft Visual Studio, Perl, Perforce.07/2010to07/2011Development EngineerSciaky Automation Â€“ Pune, Maharashtra India|,,Development of an extensive mechatronic design for a complete automatic assembly of an electric toggle switch to increase production efficiency Tools: PLC, pneumatic actuators, electronic circuit design, ladder programming, optical sensors Academic Projects Gait analysis using low power wireless module: (Graduate Final Project) Implementation of rotation-based routing protocol among on-body sensors to reduce the overall power consumption of the system for accumulating the motion data.Dynamic time Warping algorithm is applied as a feature classification technique to differentiate between human movements based on the motion data.An offline analysis is performed to corroborate the hypothesis and then an on-chip implementation is done for deployment.Tools: Arduino programming, NRF24l01+, C, Java, MATLAB 16 Bit RISC Processor using VHDL: Created a fully synthesizable VHDL model of a 16-bit RISC processor which included designing Registers, ALU, Instruction memory, Data memory, Scratch pad memory and Instruction Set Architecture of 27 instructions with 4 addressing modes and 4 stage pipelining and Interrupt handling features Parametric Cache Simulator Design: Implementation of a parametric cache simulator modelling a memory hierarchy to calculate hit and miss rate for data and victim cache for data cache size, associativity, block size, write policy, victim cache changes.Measuring the tardiness of real-time video workload under LITMUS-RT: Patching of the Linux with LITMUS-RT and using shell and python scripts to measure the average tardiness of the video application to compare the performance of the real time GSN EDF scheduler algorithm to the Linux CFS scheduler for soft real-time video applications.Device Driver Development: Development of modules for Linux based character-device driver capable of echoing the received character and converting the letters to uppercase for communication on UART.The driver was emulated using QEMU emulator for a Bare-metal ARM processor and is a loadable kernel module.Courses Analog and Digital Communication, Analog Integrated Circuit Design and Networks, Embedded Systems, Real Time Operating Systems, Computer Architecture, Introduction to VHDL, Digital signal processing, Advanced Embedded systems.Wireless Sensor networks, Wireless Communications.
EducationExpected in2010totoBachelor of Engineering|Electronics and TelecommunicationUniversity of Pune,,GPA:Electronics and TelecommunicationExpected in2013totoMaster of Science|Electrical EngineeringUniversity of North Carolina at Charlotte,Charlotte,NCGPA:Electrical Engineering
SkillsAcademic, Automation, C, C++, Circuit Design, Hardware, customer support, debugging, designing, Digital signal processing, drivers, Embedded systems, features, flash, functional, GSM, HTML, Instruction, Java, Languages, letters, Linux, MATLAB, Max, memory, C#, modem, Networks, Operating
Systems, Peripherals, Perl, PLC, processors, Programming, Protocols, Python, real-time, Real Time, routing, scripts, Scripting, Shell, Spectrum analyzer, switch, TCP/IP, Validation, VHDL, video, Microsoft Visual Studio>>. The result is, Potential Fit

Fit assessment: Potential Fit