For the given job description <<Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Sunnyvale, CA, USA; Seattle, WA, USA.Minimum qualifications:

Bachelor's degree or equivalent practical experience. 8 years of experience in software development, and with data structuresalgorithms. 5 years of experience testing, and launching software products, and 3 years of experience with software design and architecture. 5 years of experience building and developing large-scale infrastructure, distributed systems or networks, andor experience with compute technologies, storage, andor hardware architecture.

Preferred qualifications:

Masters degree or PhD in Engineering, Computer Science, or a related technical field. 3 years of experience in a technical leadership role leading project teams and setting technical direction.3 years of experience working in a complex, matrixed organization involving cross-functional, andor cross-business projects. 

About The Job

Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Googles needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.

With your technical expertise you will manage project priorities, deadlines, and deliverables. You will design, develop, test, deploy, maintain, and enhance software solutions.

Google Cloud accelerates organizations ability to digitally transform their business with the best infrastructure, platform, industry solutions and expertise. We deliver enterprise-grade solutions that leverage Googles cutting-edge technology  all on the cleanest cloud in the industry. Customers in more than 200 countries and territories turn to Google Cloud as their trusted partner to enable growth and solve their most critical business problems.

The US base salary range for this full-time position is $185,000-$283,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target for new hire salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google .

Responsibilities

Provide technical leadership on high-impact projects.Influence and coach a distributed team of engineers.Facilitate alignment and clarity across teams on goals, outcomes, and timelines.Manage project priorities, deadlines, and deliverables.Design, develop, test, deploy, maintain, and enhance large scale software solutions.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .>> the resume: <<Electrical EngineerElectrical Design Engineer with 2 years experience working on 14-bit imaging systems and motion control systems.  Emphasis on design for test using boundary scan.  Uniquely strong project management and programming skills due to 4 years of corporate IT work and management experience.  Project lead on Senior Capstone judged Best Project by unanimous vote of industry and faculty, UCSB ECE 188 Senior Capstone, 2015.
Core QualificationsDC/DC Power Supply DesignLow Noise Mixed Analog and Digital DomainCircuit Board Design LeadJTAG Boundary Scan with CorelisLTSpiceMentor Graphics DxDesigner/PADS FlowCadence Orcad/AllegroCadsoft Eagle Schematic Capture and Layout
ExperienceElectrical Design Engineer,05/2015-CurrentRockwell Automation, Inc.–Mequon,WI,Market segments for projects worked on:high volume commercial,maritime,security,mil-aeroTechnologies worked on:Video pipeline (DAC, ADC),Gimbal stabilization (three-axis gyro, three-axis accelerometer stabilization),Digital communication busses (I2C, SPI),Boundary scan testing with JTAG (Corelis ScanExpress),Uncooled infrared cameras,Cooled infrared camerasProducts worked on:FLIR Lepton,FLIR Muon,FLIR M400,FLIR M400XR,Undisclosed Mil-Aero Cooled productThings worked with recently:Boundary Scan Test Development in Corelis, DAC with op-amp buffering,Diff Amp to ADC design (with LTSpice simulation),Analog and digital power supplies,Schematic capture/symbol creation in DxDesigner and OrCAD,Board layout in PADS and Allegro​Electrical Engineering Intern,05/2014-05/2015Dlr Group–Phoenix,AZ,Transitioned 4 PCBs on FLIR M400 from engineering to production, refined document control process, hosted several design reviews, independently selected components on new and sustaining assemblies, main interface between engineering and contract manufacturer on M400, established relationships vendors (TI, LT), established relationships with CMs, qualified power consumption by power rail on FLIR Muon over temperature, qualified FLIR Lepton and shuttered Lepton over temperature with varying supply voltages, participated in Corelis Boundary Scan training, updated JTAG tests in production when silicon revs change, designed test fixtures and test procedures, ESD certified.Wrote PHP based application for finding DigiKey Part numbers from manufacturer part numbers, calculate quantity to buy based on number of boards being built and price breaks (e.g. round-up to next price break if it's cheaper).Systems Engineer/Electrical Engineer (Academic),07/2014-05/2015Andritz–Novi,MI,Worked on inferno, a hands-free thermal imager for Firefighters.UCSB EE Capstone Project Sponsored by FLIR and based on the FLIR Lepton and Intel Edison, the Inferno is a joint product of an Electrical and Mechanical team at UCSB, winning Best Project for Electrical and recognized as Most Outstanding for Mechanical.Defined specifications for system, orientation of PCBs, electrical components, software packages, etc.Designed Lepton mounting board and created all footprints from scratch, as well as layout in CadSoft EAGLE.Designed the power delivery/LiPo charging system for both PCBsArchitected the software loop that grabbed frames, applied custom false color maps, and streamed video using MJPG Streamer.Rate/Systems Specialist,03/2009-06/2009St. Bernards Healthcare–Jonesboro,AR,In charge of writing reports that coalesced sales team rates quoted with rates billed for Classified Ad sales using SQL reporting tools.  Discovered bug in classified ad export that saved paper ~$3000 per month.Business Applications Manager,04/2007-08/2008Select Staffing–City,STATE,Managed programming team of four working chiefly on financial reporting software.Created Helpdesk dashboard by querying Sharepoint SQL server; used to motivate helpdesk team to close open IT tickets.Helpdesk II,08/2005-04/2007Select Staffing–City,STATE,Tech support for 1400 colleagues.  Won award for Outstanding Information Systems (IS) Operations.
EducationBachelor of Science:Electrical Engineering,Expected in2015-University of California, Santa Barbara-Santa Barbara,CAGPA:Status-3.2GPARelevant Courses: Power Electronics, Intro to Computer Vision, Intro to Digital Image and Video Processing, Signal Analysis and Processing, Digital Design with VHDL and Synthesis, Probability and Stochastic Processes, Senior EE Capstone (inferno - Winner of Best Project)
SkillsCircuit Board Design, DxDesigner, PADS Layout, Orcad, Cadence Allegro, Embedded Systems, Linux, Eagle PCB, Bash, C++, HTML/CSS/PHP/MYSQL, PHP, SQL, LTSpice, JTAG, Matlab, Switching Power Supply Design, Verilog, Linux, SQLite, ESP8266, Arduino, Raspberry Pi>>. The result is, No Fit

Fit assessment: No Fit