For the given job description <<Calling all innovators  find your future at Fiserv.
Were Fiserv, a global leader in Fintech and payments, and we move money and information in a way that moves the world. We connect financial institutions, corporations, merchants, and consumers to one another millions of times a day  quickly, reliably, and securely. Any time you swipe your credit card, pay through a mobile app, or withdraw money from the bank, were involved. If you want to make an impact on a global scale, come make a difference at Fiserv.
What does a successful Software Engineering Manager do at Fiserv?Fiserv is looking for a Software Engineering Manager to join our Core Acquiring Front End engineering group within Fiservs Global Business Solutions (Payment Acceptance) business.You will be joining an organization responsible for mission critical platforms that support our payments acquiring business. We process over 350 million payment transactions per day with a peak throughput of over 8,000 transactions per second all while maintaining millisecond fast response time. All this is done for some of the largest merchants in the US.This fast-paced online transaction processing environment requires a passionate critical problem solver who can balance platform stability and resiliency along with modern engineering practices and solutions.
What you will do:Manage cross-functional engineering teamsHands-on engineer  pickup stories, code reviews, and support production End-to end platform owner and engineer: design, build, and support resilient services  solutionsPartner with business owners to define platform roadmaps and scope for initiatives  featuresDrive prioritization of technical investment on in-scope platformsDesign performant, efficient, effective, and reusable technical solutions (partnering with architecture)Provide thought leadership across acquiring enginesPartner effectively with DevOps, Production Support, and peer platform teams
What you will need to have: 15+ years of experience in software engineering roles using C and Java10+ years of experience leading high-performing software engineering teams5+ years of experience in financial services or payments processingAbility to clearly communicate with executive leadership
What would be great to have:Bachelor's degree in computer science, engineering, or equivalent work experienceExperience in AIXExperience building solutions in public cloud (AWS, Azure, GCP)
Perks at work:Were #FiservProud of our commitment to your overall well-being with a growing offering of physical, mental, emotional, and financial benefits from day one.Maintain a healthy work-life balance with paid holidays, generous time off policies, including Unlimited Recharge & Refuel for qualifying associates, and free counseling through our EAP.Plan for your future with competitive salaries, the Fiserv 401(k) Savings Plan, and our Employee Stock Purchase Plan.Recognize and be recognized by colleagues with our Living Proof program where you can exchange points for a variety of rewards.Prioritize your health with a variety of medical, dental, vision, life, and disability insurance options and a range of well-being resources through our Fuel Your Life program.Advance your career with training, development, certification, and internal mobility opportunities.Join Employee Resource Groups that promote our diverse and inclusive culture where associates can share perspectives, exchange ideas, and elevate careers.
What you should know about us:Fiserv is a global fintech leader with 40,000-plus (and growing) associates proudly serving clients in more than 100 countries. As a FORTUNE 500 company, one of Fast Companys Most Innovative Companies, and a top scorer on Bloombergs Gender-Equality Index, we are committed to excellence and purposeful innovation.
Our commitment to Diversity and Inclusion:Fiserv is an Equal Opportunity Employer, and we welcome and encourage diversity in our workforce that reflects our world. All qualified applicants will receive consideration for employment without regard to race, color, religion, sexual orientation, gender identity, national origin, disability, protected veteran status, or any other category protected by law.
We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.
Warning about fake job posts:Please be aware of fraudulent job postings that are not affiliated with Fiserv. Fraudulent job postings may be used by cyber criminals to target your personally identifiable information andor to steal money or financial information.
Any communications from a Fiserv representative will come from a legitimate business email address. We will not hire through text message, social media, or email alone, and any interviews will be conducted in person or through a secure video call. We wont ask you for sensitive information nor will we ask you to pay anything during the hiring process. We also wont send you a check to cash on Fiservs behalf.
If you see suspicious activity or believe that you have been the victim of a job posting scam, you should report it to your local FBI field office or to the FBIs Internet Crime Complaint Center.>> the resume: <<SummaryI am a Principal Electrical Engineer and Engineering Project Manager with over 30 years of research and development experience; including 10 years of medical device design and manufacturing experience. My career focus is real-time firmware development and ultra-high reliability embedded systems hardware design. As a principal / senior engineer I am effective in overseeing all technical and management aspects of a design project from product requirements through to product release. Other areas of expertise include supply chain management and regulatory compliance testing. My technical experience covers a wide area including programmable logic device design, fiber optic systems, high speed circuit board design, electronics design and manufacturing, as well as systems integration and manufacturing test design. As a project manager, I have full life-cycle experience.
HighlightsMultiple degrees: MSEE, BSCS, BSEESenior Engineer with Fermi National Accelerator Laboratory, US-Department of Energy, for ten years, with three (3) promotionsSenior Engineer with General Electric for twelve years.Highest engineering productivity ratings, and concurrently enable other engineers team to higher efficiencyHighly experienced embedded systems designer including firmware, FPGAs, and high speed electronics designSupplier Quality Engineer traveling world-wide, auditing electronic manufacturing service and circuit board suppliersSuccessful fiber optics systems consultant
EducationUniversity of WisconsinMadison,WIExpected in––Master of Science:Electrical Engineering; GPA 4.0/4.0-GPA:Computer Control System and Electronics DesignUniversity of WisconsinMadison,WIExpected in––Master of Science:Electrical Engineering-GPA:Computer Control System and Electronics DesignUniversity of Wisconsin, Business SchoolMadison,WIExpected in––Master Certificate:Project Management; GPA 3.6/4.0-GPA:University of WisconsinMadison,WIExpected in––Bachelor of Science:Computer Science; GPA 3.6/3.6-GPA:Computer Architecture and ProgrammingSix Sigma Green BeltMadison,WIExpected in––Certification:Quality-GPA:
ExperiencePremier System Integrators-Senior Embedded Software Developer, Senior Embedded System EngineerDecatur,AL,2013-CurrentCurrently I am doing work for three (3) Rockwell Automation Division, LV Drives Division, in Mequon, WI doing new platform fiber optic hardware and test development, MV Drives Division, Cambridge, ON doing Integrity RTOS application support, and SST Division, in Middleton, WI doing advance R&D.Recent SST projects include, Multi-core ARM Circuit Board Design, Programmable Chip Design (Actel and Xilinx), embedded software design for both ARM, ColdFire, C6000 DSP, and Microchip processors, and Windows Embedded Standard operating system design and development.Additional projects included software upgrades, including design verification and system validation, on existing products as well as test fixture development for manufacturing.Responsible for all associated Engineering Change documentation including development of any required manufacturing procedures.I have completed all assigned projects on, or ahead, of expected delivery schedules.Children's National Medical Center-Lead Supplier Quality Engineer, Lead Software Engineer, Lead Electronics EngineerSilver Spring,MD,2001-2012A global manufacturer of medical electronics equipment, including anesthesia and respiratory equipment, x-ray and ultrasonic bone densitometers.GEHC Datex / Ohmeda Division (anesthesia and respiratory equipment), FY07-FY12, Specializing in electronic assembly quality, I was responsible for quickly resolving critical supplier and design related manufacturing issues.I worked as key/lead resource coordinating with supplier staff and GE manufacturing, sourcing, production, install base engineering and regulatory teams.I worked extensively with the Supplier Quality Engineering, Electronics Center of Excellence (COE), Waukesha, WI, supporting other GE Healthcare businesses including Maternal Infant Care in Laurel, Maryland.I qualified electronic suppliers, both domestic and international, and audited numerous suppliers to FDA and ISO medical regulatory requirements, as well as GEHC and industry manufacturing standards.In my first 2.5 years, I was able to improve Circuit Board (PWA) quality by 1000%, which saved GEHC over $2M; regularly I was able to quickly address supplier issues ensuring receipt of essential quarterly revenues.Training received during my five years as a supplier quality engineer included: PWA and PWB process auditor training, auditor training for FDA CFR / GMP and ISO13485 medical standards, and ISO9001 manufacturing standards.In addition I received IEC-60601 training, and hands-on training for IPC 610 and 620 manufacturing standards.  I also received my IPC Trainer Certificate for IPC 600.GEHC Lunar Division (X-ray and ultrasound bone densitometry), FY01-FY07, I was a key R&D contributor designing electronic hardware, firmware and embedded DSP software design for two new FDA approved high-performance bone mineral density (BMD) measurement instruments for use in hospitals, clinics and medical research.Also I provided technical assistance / support with design reviews, system trouble-shooting and manufacturing test development.I was able to improve quality and base cost for a new ultrasonic BMD device, which saved GEHC over $1.5M.Training received included: MatLab training, TI DSP training.  I also received Real-Time Operating Systems (RTOS) development training for Linux, embedded Linux (uClinux) and embedded VxWorks.Successfully completed GEHC Six Sigma Green Belt training.At&T-Engineering Project ManagerEvansville,IN,2000-2001Manager for several telecommunication standard product development projects and also responsible for project quotations for custom build to order products.PM business responsibilities covered a variety of areas: hands-on leadership of technical teams (10 - 15 people), review of regulatory and engineering verification testing, and creating budgets and schedules.Regularly presented project reviews directly to CEO and other senior management.Training received includes: Telecommunications design requirements and regulatory requirements, MS Project, and PWA manufacturing and testing processes.FERMI NATIONAL ACCELERATOR LABORATORY-Electrical Engineer I, Electrical Engineer II, Electrical Engineer III Engineering Group Leader and Assistant Department HeadCity,STATE,1991-2000United States Department of Energy, high energy physics research laboratory.Accelerator Division, RF Controls Group, FY99 - FY00, Engineer III (promotion) Implemented several Digital Signal Processor (DSP) based control system upgrades; including a novel project for anti-matter energy dispersion control (anti-abatic counter-phasing system).Designed and supervised the deployment and testing of hardware and software for use in RF System required for new accelerator facility.Training received includes: RF systems design and test, Sharc DSP development training and UNIX software revision management.Computing Division, Collider Detector Facility (CDF) Development, FY95- 98, Engineer II, Senior Electrical Engineer responsible for the specification, design, implementation and testing of new data acquisition and control system hardware, which was an integral part of a multi-year project to create a new detector for the Fermilab Tevatron atomic accelerator (SVX-II).Project completed on time and within budget.Required experience in high-speed digital integrated circuits and circuit board design, Field Programmable Gate Arrays (FPGAs) and Electrically Programmable Logic Devices (EPLDs).Training received includes: StateCAD and VHDL and Altera FPGA training, Windows software development and hands-on high-speed circuit board design.Member of the VME-P standards group.Accelerator Division, FY91-95, Engineer I, Group Leader, Engineer II (promotion) and Assistant department Head (promotion).As an Electronics Engineer and Group Leader I developed of a number of new circuit board designs, for accelerator instrumentation and control.All successfully deployed and in service for over a decade.I was responsible for all base signaling and electronic control systems, in the anti-proton storage ring (Accumulator).Also, as the Assistant Department Head, I was responsible for daily operations reporting for the and long range project planning and reviews.Training received includes: formal management training, radiation worker training, electrical safety training, extensive Altera / Actel / QuickLogic FPGA and Altera EPLD training, hands-on high-speed circuit board design, LabView, and a variety of schematic capture packages.Received special training as an OSHA safety inspector, and performed periodic safety inspections for our department.WISCONSIN CENTER FOR X-RAY LITHOGRAPHY-Research AssistantCity,STATE,1988-1991I designed and implemented number of automated beam-line computer control systems for x-ray lithography and material studies.My responsibilities included computer programming, electronics design and construction, training of technical staff, project planning and supervising electronics assembly and testing.UNIVERSITY OF WISCONSIN MEDICAL SCHOOL-Associate Instrumentation InnovatorCity,STATE,1986-1991I worked for both the Departments of Anatomy and Neurology, their research programs were focused on epilepsy and neuro-anatomical research.Successfully completed multiple, extensive software and hardware projects, designing multi-purpose data acquisition systems with wide based application for both inter-cellular and intra-cellular data collection.SPERRY UNIVAC CORPORATION-Engineering AssistantCity,STATE,1983-1986Worked in multiple Research and Development groups with the Univac Computing Division, and designed a number of engineering design and analysis software tools, used in product development.
Skillsassembly, Automation, budgets, budget, hardware, consultant, data acquisition, data collection, delivery, designing, product development, DSP, documentation, electronic hardware, Electronics, Engineer II, Engineer III, Engineer I, Engineer, senior management, GMP, VME, ISO, ISO9001, LabView, leadership, Linux, Logic, management training, MatLab, MS Project, Windows, 98, networks, novel, operating systems, operating system, physics, processes, processors, computer programming, Project Management, project planning, promotion, Quality, reporting, Research, safety, Six Sigma, software design, software development, specification, supervising, systems design, technical assistance, telecommunication, Trainer, trouble-shooting, UNIX, upgrades, validation, VHDL, VxWorks>>. The result is, Good Fit

Fit assessment: Good Fit