For the given job description <<Calling all innovators  find your future at Fiserv.
Were Fiserv, a global leader in Fintech and payments, and we move money and information in a way that moves the world. We connect financial institutions, corporations, merchants, and consumers to one another millions of times a day  quickly, reliably, and securely. Any time you swipe your credit card, pay through a mobile app, or withdraw money from the bank, were involved. If you want to make an impact on a global scale, come make a difference at Fiserv.
What does a successful Software Engineering Manager do at Fiserv?Fiserv is looking for a Software Engineering Manager to join our Core Acquiring Front End engineering group within Fiservs Global Business Solutions (Payment Acceptance) business.You will be joining an organization responsible for mission critical platforms that support our payments acquiring business. We process over 350 million payment transactions per day with a peak throughput of over 8,000 transactions per second all while maintaining millisecond fast response time. All this is done for some of the largest merchants in the US.This fast-paced online transaction processing environment requires a passionate critical problem solver who can balance platform stability and resiliency along with modern engineering practices and solutions.
What you will do:Manage cross-functional engineering teamsHands-on engineer  pickup stories, code reviews, and support production End-to end platform owner and engineer: design, build, and support resilient services  solutionsPartner with business owners to define platform roadmaps and scope for initiatives  featuresDrive prioritization of technical investment on in-scope platformsDesign performant, efficient, effective, and reusable technical solutions (partnering with architecture)Provide thought leadership across acquiring enginesPartner effectively with DevOps, Production Support, and peer platform teams
What you will need to have: 15+ years of experience in software engineering roles using C and Java10+ years of experience leading high-performing software engineering teams5+ years of experience in financial services or payments processingAbility to clearly communicate with executive leadership
What would be great to have:Bachelor's degree in computer science, engineering, or equivalent work experienceExperience in AIXExperience building solutions in public cloud (AWS, Azure, GCP)
Perks at work:Were #FiservProud of our commitment to your overall well-being with a growing offering of physical, mental, emotional, and financial benefits from day one.Maintain a healthy work-life balance with paid holidays, generous time off policies, including Unlimited Recharge & Refuel for qualifying associates, and free counseling through our EAP.Plan for your future with competitive salaries, the Fiserv 401(k) Savings Plan, and our Employee Stock Purchase Plan.Recognize and be recognized by colleagues with our Living Proof program where you can exchange points for a variety of rewards.Prioritize your health with a variety of medical, dental, vision, life, and disability insurance options and a range of well-being resources through our Fuel Your Life program.Advance your career with training, development, certification, and internal mobility opportunities.Join Employee Resource Groups that promote our diverse and inclusive culture where associates can share perspectives, exchange ideas, and elevate careers.
What you should know about us:Fiserv is a global fintech leader with 40,000-plus (and growing) associates proudly serving clients in more than 100 countries. As a FORTUNE 500 company, one of Fast Companys Most Innovative Companies, and a top scorer on Bloombergs Gender-Equality Index, we are committed to excellence and purposeful innovation.
Our commitment to Diversity and Inclusion:Fiserv is an Equal Opportunity Employer, and we welcome and encourage diversity in our workforce that reflects our world. All qualified applicants will receive consideration for employment without regard to race, color, religion, sexual orientation, gender identity, national origin, disability, protected veteran status, or any other category protected by law.
We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.
Warning about fake job posts:Please be aware of fraudulent job postings that are not affiliated with Fiserv. Fraudulent job postings may be used by cyber criminals to target your personally identifiable information andor to steal money or financial information.
Any communications from a Fiserv representative will come from a legitimate business email address. We will not hire through text message, social media, or email alone, and any interviews will be conducted in person or through a secure video call. We wont ask you for sensitive information nor will we ask you to pay anything during the hiring process. We also wont send you a check to cash on Fiservs behalf.
If you see suspicious activity or believe that you have been the victim of a job posting scam, you should report it to your local FBI field office or to the FBIs Internet Crime Complaint Center.>> the resume: <<Professional SummaryResults-oriented Embedded Software Engineer with three years' experience in analysis, design, development, testing and implementation of various embedded software systems. Strong desire to obtain a responsible and challenging Embedded Software Developer's position where my education and work experience will have valuable application
SkillsProgramming Languages:  C, C++, Java, VHDL,Scripting: Shell, Python, Perl MATLAB, HTML, C#Tools: Microsoft Visual Studio, ADB, QXDM, Trace32, LTE. ModelSimPeripherals: I2C, SPI, QSPI, UART
Work History04/2017toCurrentEmbedded Software EngineerFlowserve Corporation|Emeryville,CA,Design and development on Qualcomm multiprocessor mobile computing platforms.Work closely with the hardware team developing low-level device driver software for solid-state storage devices.Optimize the storage drivers and boot loaders for performance and power consumption across multiple processors.Support the team with failure triage, system debug and customer support to implement and support new features in the storage driver.04/2014to03/2017C, C++ Embedded System Test EngineerEntegris, Inc.|Chandler,AZ,RF system Level Performance Verification and validation: RF system validation through statistical performance assessment, SW and Hardware Build Verification Testing and stability testing.Setting up the test environment to have comparable RF data with specified accuracy and tolerance and measuring various performance parameters for Wireless Transceivers such as Tx Max Power, WFQ, ACLR, EVM, SEM, Sensitivity, ACLR, Rx intermod, etc.at system level.Interfacing with cross functional teams for correlating the RF parametric data correlation, debugging and triaging Tools: QPST, QXDM, QSPR, Call Box, Spectrum analyzer, Signal generator.Test Automation and Scripting and production deployment: Developing and automating tests cases and scripts for large scale production testing of processor chips.Validation included modem and apps processor functional verification and performance measurement.Tools: Trace32, ADB, C#, Microsoft Visual Studio, Perl, Perforce.07/2010to07/2011Development EngineerSciaky Automation Â€“ Pune, Maharashtra India|,,Development of an extensive mechatronic design for a complete automatic assembly of an electric toggle switch to increase production efficiency Tools: PLC, pneumatic actuators, electronic circuit design, ladder programming, optical sensors Academic Projects Gait analysis using low power wireless module: (Graduate Final Project) Implementation of rotation-based routing protocol among on-body sensors to reduce the overall power consumption of the system for accumulating the motion data.Dynamic time Warping algorithm is applied as a feature classification technique to differentiate between human movements based on the motion data.An offline analysis is performed to corroborate the hypothesis and then an on-chip implementation is done for deployment.Tools: Arduino programming, NRF24l01+, C, Java, MATLAB 16 Bit RISC Processor using VHDL: Created a fully synthesizable VHDL model of a 16-bit RISC processor which included designing Registers, ALU, Instruction memory, Data memory, Scratch pad memory and Instruction Set Architecture of 27 instructions with 4 addressing modes and 4 stage pipelining and Interrupt handling features Parametric Cache Simulator Design: Implementation of a parametric cache simulator modelling a memory hierarchy to calculate hit and miss rate for data and victim cache for data cache size, associativity, block size, write policy, victim cache changes.Measuring the tardiness of real-time video workload under LITMUS-RT: Patching of the Linux with LITMUS-RT and using shell and python scripts to measure the average tardiness of the video application to compare the performance of the real time GSN EDF scheduler algorithm to the Linux CFS scheduler for soft real-time video applications.Device Driver Development: Development of modules for Linux based character-device driver capable of echoing the received character and converting the letters to uppercase for communication on UART.The driver was emulated using QEMU emulator for a Bare-metal ARM processor and is a loadable kernel module.Courses Analog and Digital Communication, Analog Integrated Circuit Design and Networks, Embedded Systems, Real Time Operating Systems, Computer Architecture, Introduction to VHDL, Digital signal processing, Advanced Embedded systems.Wireless Sensor networks, Wireless Communications.
EducationExpected in2010totoBachelor of Engineering|Electronics and TelecommunicationUniversity of Pune,,GPA:Electronics and TelecommunicationExpected in2013totoMaster of Science|Electrical EngineeringUniversity of North Carolina at Charlotte,Charlotte,NCGPA:Electrical Engineering
SkillsAcademic, Automation, C, C++, Circuit Design, Hardware, customer support, debugging, designing, Digital signal processing, drivers, Embedded systems, features, flash, functional, GSM, HTML, Instruction, Java, Languages, letters, Linux, MATLAB, Max, memory, C#, modem, Networks, Operating
Systems, Peripherals, Perl, PLC, processors, Programming, Protocols, Python, real-time, Real Time, routing, scripts, Scripting, Shell, Spectrum analyzer, switch, TCP/IP, Validation, VHDL, video, Microsoft Visual Studio>>. The result is, No Fit

Fit assessment: No Fit