For the given job description <<The Opportunity
QuidelOrtho unites the strengths of Quidel Corporation and Ortho Clinical Diagnostics, creating a world-leading in vitro diagnostics company with award-winning expertise in immunoassay and molecular testing, clinical chemistry and transfusion medicine. We are more than 6,000 strong and do business in over 130 countries, providing answers with fast, accurate and consistent testing where and when they are needed most  home to hospital, lab to clinic.
Our culture puts our team members first and prioritizes actions that support happiness, inspiration and engagement. We strive to build meaningful connections with each other as we believe that employee happiness and business success are linked. Join us in our mission to transform the power of diagnostics into a healthier future for all.
The Role
As we continue to grow as QuidelOrtho, we are seeking a self-driven, proactive Staff Electrical Engineer to join our R&D Instrument Platforms organization to provide technical responsibility for Sustaining Engineering (lifecycle management) activities and improvement of our portfolio of products. The individual should have an eye for creating custom engineering solutions and be well-versed in all of the R&D change control processes while driving results within the project constraints of schedule, cost, performance, quality, and reliability objectives under guidance of senior staff. This position is located in Rochester, NY.
The Responsibilities
Support existing product field issues through root cause analysis and continuous improvement.Support existing products and their production line via obsolescence resolution from standard drop-in replacements to board, harness, and other electrical redesigns.Drive projects through our change control process, ensuring completion of all activities within compliance i.e., formal design reviews, FMECA reviews, design verification, EMCSafety Testing, etc.ManageDrive multiple projects in parallel, driving results in a timely manner to maintain the production line and customer satisfaction.Performs other work-related duties as assigned.
The Individual
Required
Minimum of 7-9 years of experience with a Bachelors degree in Electrical Engineering or equivalent combination of education and experience.Demonstrated ability in technical analysis including evaluation of multiple candidate solutions and evaluation of intangibles.Demonstrated ability to assess and manage incoming workloads.Ability to propose methods, techniques, and evaluation criteria to realize product functionality.Ability to work well in a team environment.Excellent organizational skills.Excellent communication, influencing and conflict resolution skills.Experience with technical writing and English fluency.Ability to triage product issues and perform root cause investigations.Adapt quickly to obstacles and changing demands.
Preferred
Experience with design tools such as OrCAD and Altium.Design and implementation of digital and analog circuits.Design for and testing of EMIEMC requirements.Experience with optical systems.DesignKnowledge of stepper motor driver circuits and servo controllers.
The Key Working Relationships
Internal: QualityRegulatory, Operations, Marketing, Manufacturing, Service, Valuemetric, Clinical Medical Affairs, Project Management Office.
External: Development and Manufacturing partners, Customers, Manufacturing.
Key Supervisory Responsibilities
Reviews work quality and quantity of others.May Plan work for Electrical Engineer level III andor Technicians.Mentoring of Electrical Engineer level III andor Technicians.Recommends budget amounts.
The Work Environment
Office & Lab environment including a BL2 Lab (Biohazard).Physical Demands  Light (walking, crouching, lifting up to 50lb, etc.).Travel  Up to 10%.
Salary Transparency
Salary range for this position takes into account a wide range of factors including: education, experience, knowledge, skills, geography, and abilities of the candidate, in addition to internal equity and alignment with market data. At QuidelOrtho, it is not typical for an individual to be hired at or near the top range for their role and compensation decisions are dependent on that facts and circumstances of each case. Salary range for this position is $82,000 to $148,000 and is bonus eligible. QuidelOrtho offers a comprehensive benefits package including medical, dental, vision, life, and disability insurance, along with a 401(k) plan, employee assistance program, Employee Stock Purchase Plan, paid time off (including sick time) and paid Holidays. All benefits are non-contractual, and QuidelOrtho may amend, terminate, or enhance the benefits provided, as it deems appropriate.
Equal Opportunity
QuidelOrtho believes in Equal Opportunity for all and is committed to ensuring all individuals, including individuals with disabilities, have an opportunity to apply for those positions that they are interested in and qualify for without regard to race, religion, color, national origin, citizenship, sex, sexual orientation, gender identity, age, veteran status, disability, genetic information, or any other protected characteristic. QuidelOrtho is also committed to providing reasonable accommodations to qualified individuals so that an individual can perform their duties. If you are interested in applying for an employment opportunity and require special assistance or an accommodation to apply due to a disability, please contact us at orthorecruiting@orthoclinicaldiagnostics.com
>> the resume: <<ProfileActively seeking full time opportunities in computer engineering to build a career in engineering industry and to work with a leading corporate hi-tech environment along with a team of committed & dedicated people.
Core QualificationsProgramming skills: C/C++, MATLAB, Java. Verilog, MIPS, Python,Linux
Software skills: Eclipse, Net Beans, E-Tap, AutoCAD, Quartus, Open stack, Open Nebula, Open MP, Putty, Docker, Mininet, MS Office.
Equipment used:  Oscillator, Logic analyze, Signal generator, Ubuntu, Virtual Box, VMware.
Networking Protocols:- TCP/IP, UDP,IPv4,Ipv6,EIGR,DNS,VPN,SDN,MPLS,BGP,OSPF,ARP,DHCP,MPLS,SNMP,.
EducationSouthern Methodist UniversityDallas,TXExpected inMay 2017––Bobby B. Lyle school of Engineering          Grad:-GPA:,Expected in––M.S:Computer Engineering-GPA:Computer Engineering 3.72/4.00Mumbai University,Expected inMay 2014––B.E:Electrical Engineering-GPA:Electrical Engineering
Professional ExperienceOshkosh Corp.-Lab/Student monitor Student Assistant,,08/2017-PresentActively monitor students.Organize schedules.Provide technical assistance for lab devices.Maintain order in study hall.Technical presenter in national -level competition Nirman 2014          February-2014          
Paper Title: 'Medium Voltage Circuit Breaker Simulator'.Secretary of Electrical Engineers Students Association (EESA)          Aug 12- May- 13.Led a team in planning executing the entire departmental fest 'Vidyut' organized by EESA.A Member of Creative and the sponsorship committee for the college technical fest "Vectors" in the year 2012-2013.Was a Member of the organizing committee for blood donation camp organized in college by BOMBAY Hospital.Power Consultants-Trainee Electrical Engineer,,08/2017-02/2017Was responsible for relay settings for Electrical Equipment's used in the Substations and preparation of electrical drawing  
Using AutoCAD-2010 which includes one-line diagram, area classification, layout drawings, schematic, interconnection 
Diagram, detailed installation drawings, etc.for 200KV, 33KV, 11KV, 6.6KV, 3.3KV and 415V systems.Siemens LTD-Intern,,06/2017-07/2017Build a Medium Voltage Circuit Breaker Simulator which was used for testing of the Panels in the absence of an
actual Circuit Breaker.Engineering project:.Process and Memory Management for an Operating System: - Designed and implemented a simulated OS using Java for general process and memory management which included designing a Process Control Block (PCB) using doubly linked list and the scheduling algorithm scheduled the processes according to Shortest Job First, Non-preemptive Priority scheduling, First Cum First Serve and Round Robin algorithms.Memory management for the processes were implemented where each process was assigned a memory on the basis of first fit, best fit & worst fit algorithms.Literature review on Comparison of various Encryption Algorithms for security of smart Cards: -
Presented a paper focusing on the security and reliability of smart card and the role of various encryption algorithms symmetric as well as the asymmetric algorithms and a comparison was made to determine which algorithm is better for data security in a constrained environment.Matrix Multiplication using Verilog: - Implemented a circuit that will multiply a 3x4 matrix with its transpose using Verilog coding.Optimizing performance and security in Mobile Cloud Computing using ZKP and Two Fish: Presented a paper which included Zero knowledge protocol as an authentication technique and analysis of two fish & blowfish algorithms in terms of its speed of encryption and security when used in clone cloud.Current Challenges and Solutions in SDN Security and Traffic Measurement: - Presented a paper on different methods to overcome security issues in SDN and analyzed different methods to measure traffic parameters with limited utilization of resources, high accuracy and low latency.Integer Multiplication: - Using Verilog coding expanded the basic ALU to handle integer multiplication.Two 32 bits two complement numbers were chosen which on multiplication would provide a 64-bit output.Comparative Study for Denoising of Various Medical Image (MATLAB)s: - Designed and presented a paper for image acquisition process.Noised images were considered for noise detection and the performance of each image were evaluated.
SkillsAutoCAD, basic, BGP, C, C++, Computer Networks, Encryption, Cryptography, designing, DHCP, DNS, Eclipse, drawing, Image Processing, Image, Java, Beans, layout, Linux, Logic, MATLAB, memory, Microprocessor, MS Office, Networking, OS, Operating System, organizing, OSPF, presenter, Process Control, processes, coding, Programming, Protocols, Python, scheduling, smart Cards, SNMP, System Design, TCP/IP, technical assistance, Verilog, VPN>>. The result is, 

Fit assessment: No Fit