For the given job description <<The Opportunity
QuidelOrtho unites the strengths of Quidel Corporation and Ortho Clinical Diagnostics, creating a world-leading in vitro diagnostics company with award-winning expertise in immunoassay and molecular testing, clinical chemistry and transfusion medicine. We are more than 6,000 strong and do business in over 130 countries, providing answers with fast, accurate and consistent testing where and when they are needed most  home to hospital, lab to clinic.
Our culture puts our team members first and prioritizes actions that support happiness, inspiration and engagement. We strive to build meaningful connections with each other as we believe that employee happiness and business success are linked. Join us in our mission to transform the power of diagnostics into a healthier future for all.
The Role
As we continue to grow as QuidelOrtho, we are seeking a self-driven, proactive Staff Electrical Engineer to join our R&D Instrument Platforms organization to provide technical responsibility for Sustaining Engineering (lifecycle management) activities and improvement of our portfolio of products. The individual should have an eye for creating custom engineering solutions and be well-versed in all of the R&D change control processes while driving results within the project constraints of schedule, cost, performance, quality, and reliability objectives under guidance of senior staff. This position is located in Rochester, NY.
The Responsibilities
Support existing product field issues through root cause analysis and continuous improvement.Support existing products and their production line via obsolescence resolution from standard drop-in replacements to board, harness, and other electrical redesigns.Drive projects through our change control process, ensuring completion of all activities within compliance i.e., formal design reviews, FMECA reviews, design verification, EMCSafety Testing, etc.ManageDrive multiple projects in parallel, driving results in a timely manner to maintain the production line and customer satisfaction.Performs other work-related duties as assigned.
The Individual
Required
Minimum of 7-9 years of experience with a Bachelors degree in Electrical Engineering or equivalent combination of education and experience.Demonstrated ability in technical analysis including evaluation of multiple candidate solutions and evaluation of intangibles.Demonstrated ability to assess and manage incoming workloads.Ability to propose methods, techniques, and evaluation criteria to realize product functionality.Ability to work well in a team environment.Excellent organizational skills.Excellent communication, influencing and conflict resolution skills.Experience with technical writing and English fluency.Ability to triage product issues and perform root cause investigations.Adapt quickly to obstacles and changing demands.
Preferred
Experience with design tools such as OrCAD and Altium.Design and implementation of digital and analog circuits.Design for and testing of EMIEMC requirements.Experience with optical systems.DesignKnowledge of stepper motor driver circuits and servo controllers.
The Key Working Relationships
Internal: QualityRegulatory, Operations, Marketing, Manufacturing, Service, Valuemetric, Clinical Medical Affairs, Project Management Office.
External: Development and Manufacturing partners, Customers, Manufacturing.
Key Supervisory Responsibilities
Reviews work quality and quantity of others.May Plan work for Electrical Engineer level III andor Technicians.Mentoring of Electrical Engineer level III andor Technicians.Recommends budget amounts.
The Work Environment
Office & Lab environment including a BL2 Lab (Biohazard).Physical Demands  Light (walking, crouching, lifting up to 50lb, etc.).Travel  Up to 10%.
Salary Transparency
Salary range for this position takes into account a wide range of factors including: education, experience, knowledge, skills, geography, and abilities of the candidate, in addition to internal equity and alignment with market data. At QuidelOrtho, it is not typical for an individual to be hired at or near the top range for their role and compensation decisions are dependent on that facts and circumstances of each case. Salary range for this position is $82,000 to $148,000 and is bonus eligible. QuidelOrtho offers a comprehensive benefits package including medical, dental, vision, life, and disability insurance, along with a 401(k) plan, employee assistance program, Employee Stock Purchase Plan, paid time off (including sick time) and paid Holidays. All benefits are non-contractual, and QuidelOrtho may amend, terminate, or enhance the benefits provided, as it deems appropriate.
Equal Opportunity
QuidelOrtho believes in Equal Opportunity for all and is committed to ensuring all individuals, including individuals with disabilities, have an opportunity to apply for those positions that they are interested in and qualify for without regard to race, religion, color, national origin, citizenship, sex, sexual orientation, gender identity, age, veteran status, disability, genetic information, or any other protected characteristic. QuidelOrtho is also committed to providing reasonable accommodations to qualified individuals so that an individual can perform their duties. If you are interested in applying for an employment opportunity and require special assistance or an accommodation to apply due to a disability, please contact us at orthorecruiting@orthoclinicaldiagnostics.com
>> the resume: <<Electrical EngineerElectrical Design Engineer with 2 years experience working on 14-bit imaging systems and motion control systems.  Emphasis on design for test using boundary scan.  Uniquely strong project management and programming skills due to 4 years of corporate IT work and management experience.  Project lead on Senior Capstone judged Best Project by unanimous vote of industry and faculty, UCSB ECE 188 Senior Capstone, 2015.
Core QualificationsDC/DC Power Supply DesignLow Noise Mixed Analog and Digital DomainCircuit Board Design LeadJTAG Boundary Scan with CorelisLTSpiceMentor Graphics DxDesigner/PADS FlowCadence Orcad/AllegroCadsoft Eagle Schematic Capture and Layout
ExperienceElectrical Design Engineer,05/2015-CurrentRockwell Automation, Inc.–Mequon,WI,Market segments for projects worked on:high volume commercial,maritime,security,mil-aeroTechnologies worked on:Video pipeline (DAC, ADC),Gimbal stabilization (three-axis gyro, three-axis accelerometer stabilization),Digital communication busses (I2C, SPI),Boundary scan testing with JTAG (Corelis ScanExpress),Uncooled infrared cameras,Cooled infrared camerasProducts worked on:FLIR Lepton,FLIR Muon,FLIR M400,FLIR M400XR,Undisclosed Mil-Aero Cooled productThings worked with recently:Boundary Scan Test Development in Corelis, DAC with op-amp buffering,Diff Amp to ADC design (with LTSpice simulation),Analog and digital power supplies,Schematic capture/symbol creation in DxDesigner and OrCAD,Board layout in PADS and Allegro​Electrical Engineering Intern,05/2014-05/2015Dlr Group–Phoenix,AZ,Transitioned 4 PCBs on FLIR M400 from engineering to production, refined document control process, hosted several design reviews, independently selected components on new and sustaining assemblies, main interface between engineering and contract manufacturer on M400, established relationships vendors (TI, LT), established relationships with CMs, qualified power consumption by power rail on FLIR Muon over temperature, qualified FLIR Lepton and shuttered Lepton over temperature with varying supply voltages, participated in Corelis Boundary Scan training, updated JTAG tests in production when silicon revs change, designed test fixtures and test procedures, ESD certified.Wrote PHP based application for finding DigiKey Part numbers from manufacturer part numbers, calculate quantity to buy based on number of boards being built and price breaks (e.g. round-up to next price break if it's cheaper).Systems Engineer/Electrical Engineer (Academic),07/2014-05/2015Andritz–Novi,MI,Worked on inferno, a hands-free thermal imager for Firefighters.UCSB EE Capstone Project Sponsored by FLIR and based on the FLIR Lepton and Intel Edison, the Inferno is a joint product of an Electrical and Mechanical team at UCSB, winning Best Project for Electrical and recognized as Most Outstanding for Mechanical.Defined specifications for system, orientation of PCBs, electrical components, software packages, etc.Designed Lepton mounting board and created all footprints from scratch, as well as layout in CadSoft EAGLE.Designed the power delivery/LiPo charging system for both PCBsArchitected the software loop that grabbed frames, applied custom false color maps, and streamed video using MJPG Streamer.Rate/Systems Specialist,03/2009-06/2009St. Bernards Healthcare–Jonesboro,AR,In charge of writing reports that coalesced sales team rates quoted with rates billed for Classified Ad sales using SQL reporting tools.  Discovered bug in classified ad export that saved paper ~$3000 per month.Business Applications Manager,04/2007-08/2008Select Staffing–City,STATE,Managed programming team of four working chiefly on financial reporting software.Created Helpdesk dashboard by querying Sharepoint SQL server; used to motivate helpdesk team to close open IT tickets.Helpdesk II,08/2005-04/2007Select Staffing–City,STATE,Tech support for 1400 colleagues.  Won award for Outstanding Information Systems (IS) Operations.
EducationBachelor of Science:Electrical Engineering,Expected in2015-University of California, Santa Barbara-Santa Barbara,CAGPA:Status-3.2GPARelevant Courses: Power Electronics, Intro to Computer Vision, Intro to Digital Image and Video Processing, Signal Analysis and Processing, Digital Design with VHDL and Synthesis, Probability and Stochastic Processes, Senior EE Capstone (inferno - Winner of Best Project)
SkillsCircuit Board Design, DxDesigner, PADS Layout, Orcad, Cadence Allegro, Embedded Systems, Linux, Eagle PCB, Bash, C++, HTML/CSS/PHP/MYSQL, PHP, SQL, LTSpice, JTAG, Matlab, Switching Power Supply Design, Verilog, Linux, SQLite, ESP8266, Arduino, Raspberry Pi>>. The result is, 

Fit assessment: Potential Fit