Community | Find in-depth technical information in our Forums Cadence Members Login with a Cadence account. LOG IN Not a member yet? Register | Membership benefits All Blog Categories Breakfast Bytes Cadence Academic Network Cadence Support Computational Fluid Dynamics CFD（数値流体力学) 中文技术专区 Custom IC Design カスタムIC／ミックスシグナル 定制IC芯片设计 Digital Implementation Functional Verification IC Packaging and SiP Design Life at Cadence Mixed-Signal Design PCB Design PCB設計／ICパッケージ設計 PCB、IC封装：设计与仿真分析 PCB解析／ICパッケージ解析 RF Design RF /マイクロ波設計 Signal and Power Integrity (PCB/IC Packaging) Silicon Signoff Solutions Spotlight Taiwan System Design and Verification Tensilica and Design IP The India Circuit Whiteboard Wednesdays Archive (P)SpiceITUp: How to Use Measurements to Optimize Your Design By mrigashira | 23 Nov 2021 Your products must perform well in terms of their requirements. For a product to perform well, you must ensure the design parameters are tuned for the best performance possible. For example, you might need the output voltage to hover around 20V or th... Tags: OrCAD Capture | PSpiceA/D | PSpice Advanced Analysis μWaveRiders: Cadence AWR Design Environment Schematic/System Diagram Tips & Tricks By TeamAWR | 22 Nov 2021 The second in the series of AWR Design Environment Tips and Tricks, this blog highlights element placement in RF schematics and system diagrams for novice users, with actions to speed design creation and optimize use of AWR software. Tags: RF Simulation | Circuit simulation | AWR Design Environment | awr | Tips/Tricks | RF design | microwave office | Visual System Simulator (VSS) Sunday Brunch Video for 21st November 2021 By Paul McLellan | 21 Nov 2021 https://youtu.be/c-6FEIsz1Qk Made in Sam's Chowder House, HMB (camera Ziyue Zhang) Monday: Cadence and Intel Demonstrate CXL 1.1/2.0 Interoperability Tuesday: KT Moore on More than Moore at iMAPS Wednesday: Samsung Foundry Fab Road... Tags: sunday brunch This Week in CFD By John Chawner | 19 Nov 2021 Many of us, especially folks in the U.S. of A., have their eyes on next week because it's the week of the Thanksgiving holiday. My new pal and fellow blogger, Paul McLellan, not only has his eyes on next week but also his stomach as evidenced by ... Tags: CFD | Computational Fluid Dynamics | fluid dynamics Offtopic: Food, Especially Italian By Paul McLellan | 19 Nov 2021 We are coming up to Thanksgiving and so a break. Thanksgiving is built around food, so I thought my offtopic post before I go away until the Monday after the holiday should be about food. If you are thirty or forty maybe food doesn't seem mu... Tags: offtopic | foood Renault and Cadence at the Automotive Aerodynamics and Thermal Management Conference By AnneMarie CFD | 18 Nov 2021 The International Automotive Aerodynamics & Thermal Management Conference 2021 is taking place online on November 29-30 and Cadence is thrilled to be its main sponsor. Everyone is welcome to register and it's a great opportunity to hear stra... Tags: CFD | Automotive | Computational Fluid Dynamics | fluid dynamics | CFD Applications | simulation software Jasper User Group: Ziyad's State of the Formal Union By Paul McLellan | 18 Nov 2021 Last week was the Jasper User Group where we announced the Jasper C2RTL App. It was actually announced during Ziyad Hanna's presentation which opened the meeting. Ziyad wrote about the big picture state of formal verification. At the end of the m... Tags: Jasper User Group | JUG | formal | Formal verification Empower Your Power with Joules Power Calculator By MJ Cad | 17 Nov 2021 Are you interested in learning low power concepts? Are you looking for solutions to power challenges? Are you searching for the most efficient way to implement RTL power analysis and optimization for your design? If the answer is yes, Cadence has you... Tags: digital badge | blended training | training bytes | online training | Cadence Support Portal | Cadence support | cadence learning and support Cadence獲經濟部頒贈IPO Awards之「軟性價值夥伴獎」 By candyyu | 17 Nov 2021 肯定Cadence設計軟體對台灣資通訊及半導體產業發展的卓越貢獻 全球電子設計創新領導廠商益華電腦(Cadence Design Systems, Inc.)宣布獲經濟部頒贈2021年電子資訊國際夥伴績優廠商獎(International Partner Office Award)之「軟性價值夥伴獎」，讚許Cadence在軟體技術創新，持續協助臺灣資通訊與半導體產業提升戰略價值，鏈結全球產業生態系，對促進台灣高科技產業在全球的地位具有卓越貢獻。這項由經濟部舉辦的「2021經濟部電子資訊國際夥伴績... Tags: IPO Awards | taiwanese blog | intelligent system design Samsung Foundry Fab Roadmap By Paul McLellan | 17 Nov 2021 At the recent Samsung Foundry Forum, GH Choi presented Manufacturing Excellence: The Best Gift Ever. He is the Head of Manufacturing Technology Center at Samsung Foundry. His presentation took a look at the fab construction roadmap. As he o... Tags: 3nm | Samsung | samsung foundry forum | 2nm KT Moore on More than Moore at iMAPS By Paul McLellan | 16 Nov 2021 San Diego recently hosted the 54th International Symposium on Microelectronics. That's a very generic title, so you should know that it is run by iMAPS, the International Microelectronics Assembly and Packaging Society. Generally, the conference ... Tags: system in package | more than Moore | integrity 3d-ic | heterogeneous integration Solutions for an Era of "Hyperlatives" By fschirrmeister | 15 Nov 2021 We use the prefix "hyper" quite a bit these days. "Hyperconnectivity," "hyperscale computing," "hyperscalers," and "hyperconverged infrastructure" are just some of the related terms flying around. And... BoardSurfers: Training Insights: Tips to Zoom and Pan Efficiently in Allegro PCB Editor By Taanya | 15 Nov 2021 While designing a layout within Allegro® PCB Editor, designers zoom in and out or pan in the design canvas to take a closer look at a component’s placement and connectivity. Because they frequently zoom or pan when creating or edi... Tags: PCB | 17.4 | BoardSurfers | PCB Editor | 17.4-2019 | PCB design | Training Insights | Allegro PCB Editor | Allegro Cadence and Intel Demonstrate CXL 1.1/2.0 Interoperability By Paul McLellan | 15 Nov 2021 This weekend, timed to coincide with SC21, Cadence and Intel published a white paper on CXL interoperability (interop) testing titled Interop Shift Left: Using Pre-Silicon Simulation for Emerging Standards. The SC in SC21 stands for SuperComputing, ... Tags: CXL | Intel | interoparability | cxl 2.0 | interop 详解有限元模型在系统分析中的应用 By SpbChina | 13 Nov 2021 本文要点: 有限元分析是在复杂几何中为微分方程求解的一种基本的数值计算方法。 这些复杂的系统可能无法人工求解，而且可能存在不同物理现象之间的耦合，特别是在电子领域。 顶尖的有限元系统将直接从 PCB Layout 中获取数据，并使用标准的数值算法创建多物理场仿真。 space 微分方程是用来描述物理现象的主要数学工具。从牛顿定律到薛定谔方程，任何物理系统都有一个可控制其行为的微分方程。常微分方程和偏微分方程求解是应用数学研究的一个长期课题，为此已开发出许多计算软件。 高度精确的数值计算方法可... Tags: Chinese blog | FEM | 多物理场 | 中文 | 电磁仿真 | 系统分析 | 多物理场仿真 | EM | 有限元 | 智能系统设计 | Clarity 3D Solver | 场求解器 | clarity This Week in CFD By John Chawner | 12 Nov 2021 As we stand on the precipice of another weekend (the weekend just means there are still two more days to work), we can take stock of recent happenings in the world of CFD. What does this week's roundup include? Coffee and espresso. Formula-1, el... Tags: CFD | Marine Engineering | Pointwise | Computational Fluid Dynamics | Omnis Datapath Formal Verification 101: Technology and Technique By Paul McLellan | 12 Nov 2021 Earlier this week, Cadence announced the Jasper C2RTL App, which I covered in my post Announcing Jasper C2RTL App: Formal for Algorithmic Designs . At the Jasper User Group, Disha Puri presented Datapath Formal Verification 101: Technology + Tech... Tags: Jasper User Group | JUG | c2rtl | formal | datapath | Formal verification BoardSurfers: How to Map CAD Models in 3D Canvas By Siddharth Makkar | 12 Nov 2021 In the world of PCB design, shorter delivery deadlines have less scope of re-spin cycles. Before manufacturing the board, every designer wants to see what the manufactured board would look like. Allegro 3D Canvas , enabled within Allegro® PCB Edi... Tags: PCB | 17.4 | BoardSurfers | MCAD | 3D Canvas | PCB Editor | 17.4-2019 | PCB design | CAD | Allegro PCB Editor | Allegro Virtuosity: Virtuoso Design Intent Notes Now Speak Many Languages By Mate Zamori | 11 Nov 2021 Starting with ICADVM20.1 ISR20, you can write Design Intent notes in languages that use non-Latin character sets, for example, Mandarin Chinese, Japanese, and Hindi. Tags: Virtuoso Design Intent | Virtuoso Schematic XL | Virtuoso Analog Design Environment | Virtuoso | Virtuosity | ICADVM20.1 | Constraints | design intent | Custom IC Design | Custom IC | Virtuoso Layout Suite XL Happy 10th Birthday ISO 26262 By Paul McLellan | 11 Nov 2021 Today is the 10th anniversary of ISO 26262. It was first published on 11th November 2011. ISO 26262, titled Road vehicles – Functional safety is...err...about the functional safety of road vehicles. Cadence recently announced our own ... Tags: Automotive | functional safety | midas | ISO 26262 Announcing Jasper C2RTL App: Formal for Algorithmic Designs By Paul McLellan | 10 Nov 2021 Today is the first day of the Jasper User Group (unofficially known as JUG to attendees). All being well, Ziyad should be on stage (well, on the video stream) opening the meeting and he will introduce the Jasper C2RTL App. You can read my preview of ... Tags: Jasper User Group | c2rtl | formal | Jasper | JasperGold Virtuoso Meets Maxwell: 标准库组件的定义 By Tyler | 10 Nov 2021 The Allegro Package Designer 产品线提供IC 封装从创意到生产所需的一切，它可以从Virtuoso环境通过Virtuoso MultiTech Framework调用。 Tags: Libimport | Unified Library | JEDEC | Virtuoso Layout EXL | Virtuoso Meets Maxwell | Virtuoso RF Solution | Virtuoso RF | Virtuoso MultiTech | Package Design in Virtuoso | Allegro Package Designer Plus | Allegro Package Designer | die | Virtuoso | ICADVM20.1 | Cadence SiP Layout | Custom IC Design | Custom IC | Allegro | Chinese blogs | VMM BoardSurfers: Allegro PCB Editorを17.4-2019 Hotfix 019以上にバージョンアップするべき理由とは By SPB Japan | 10 Nov 2021 Cadence OrCAD and Allegro 17.4-2019 Hotfix 019（17.4-QIR3） は7月中旬にリリースされました。、現在は更に新しいHotfixがダウンロード可能です。今回のアップデートでは、複数の技術分野にわたり、多くの新機能や強化機能、お客様から報告されたバグの修正、パフォーマンスの向上を実現しています。ここでは、Allegro® PCB Editorでの追加、改善、修正内容をご紹介します。 NVIDIA GPUのサポートによるグラフィックの改善 GP... Tags: PCB | 17.4 | BoardSurfers | PCB Editor | 17.4-2019 | 17.4-2021 | japanese blog | Allegro PCB Editor | 17.4-QIR3 | Allegro Last-Mover Advantage By Paul McLellan | 9 Nov 2021 I was reminded recently of a video/transcript that I remember coming across when it was fresh, five or six years ago. This was one lecture at Sam Altman's Stanford Startup Class where Peter Thiel was the guest lecturer. His central thesis was tha... Tags: startups | tesla | peter thiel System Analysis Knowledge Bytes: Sigrity X the Next-Generation Signal and Power Integrity Solution By deeptik | 8 Nov 2021 Explore how Sigrity X, the next-generation signal and power integrity (SI/PI) solution, can help you solve system-level analysis problems with unprecedented speed and accuracy. Tags: Sigrity and Systems Analysis | Celsius Thermal Solver | SPEEDEM | XcitePI | Sigrity X | Voltus IC Power Integrity Solution | IBIS Modeling | Sigrity PowerSI | Power Integrity | Sigrity OptimizePI | IBIS-AMI | Signal Integrity | Sigrity SystemSI | Sigrity XtractIM | Sigrity PowerDC | Clarity 3D Solver | T2B | Allegro PCB Designer