Products > Design Software > RGMII to GMII Bridge RGMII to GMII Bridge Reference Design Bi-directional bridge function for transferring data between RGMII and GMII GMII (Gigabit Media Independent Interface) is an Ethernet interface standard, and RGMII (Reduced Gigabit Media Independent Interface) is intended to be an alternative to GMII. The principal objective of RGMII is to reduce the number of pins from 22 to 12 in a cost-effective and technology-independent manner. This reference design provides a bi-directional bridge function for transferring data between RGMII and GMII. Features Data bridging from GMII to RGMII Data bridging from RGMII to GMII Works at >125 MHz Uses the HSTL I/Os with no additional HSTL buffers required Contact Us Jump to Block Diagram Performance and Size Documentation Block Diagram Performance and Size Device Family Tested Devices* Performance I/O Pins Design Size Revision ECP5™ 4 LFE5UM-85F-8MG756C >125 MHz 33 4 LUTs 2.2 LatticeECP3™ 1 LFE3-95EA-7FN1156C >125 MHz 33 4 LUTs 2.2 LatticeECP™/ LatticeEC™ 2 LFEC20E-4F672C >125 MHz 33 3 LUTs 2.2 LatticeXP™ 3 LFXP10E-4F256C, >125 MHz 33 3 LUTs 2.2 1. Performance and utilization characteristics are generated using LFE3-95EA-7FN1156C, with Lattice Diamond 3.1 design software. 2. Performance and utilization characteristics are generated using LFEC20E-4F672C, with Lattice Diamond 3.1 design software. 3. Performance and utilization characteristics are generated using LFXP10E-4F256C, with Lattice Diamond 3.1 design software. 4. Performance and utilization characteristics are generated using LFE5UM-85F-8MG756C, with Lattice Diamond 3.1 design software with LSE (Lattice Synthesis Engine). * May work in other devices as well. Note: The performance and design sizes shown above are estimates only. The actual results may vary depending upon the chosen parameters, timing constraints, and device implementation. See the design's documentation for details. All coding and design work was done on a PC platform unless noted otherwise. Documentation Technical Resources Reference Design TITLE NUMBER VERSION DATE Select All RGMII to GMII Bridge Reference Design FPGA-RD-02136 2.5 6/23/2021 RGMII to GMII Bridge - Source Code FPGA-RD-02136 2.5 6/23/2021 *By clicking on the "Notify Me of Changes" button, you agree to receive notifications on changes to the document(s) you selected. Like most websites, we use cookies and similar technologies to enhance your user experience. We also allow third parties to place cookies on our website. By continuing to use this website you consent to the use of cookies as described in our Cookie Policy. About Us Contact Us Press Room Investor Relations Careers Subscribe Sales Americas Europe & Africa Asia Pacific Online Store Support Technical Support Software Licensing Services Legacy Devices & Software Training ©2021 Lattice Semiconductor | Legal Notices | Privacy Policy | Site Map | Use of Cookies