Forums | Subscribe for email delivery of all Cadence forum topics here All Forums Custom IC Design Custom IC SKILL Digital Implementation Functional Verification Functional Verification Shared Code Hardware/Software Co-Development, Verification and Integration High-Level Synthesis IC Packaging and SiP Design Implementation Logic Design Mixed-Signal Design PCB Design PCB SKILL PCell Designer RAVEL DRC Programming for IC Packaging and PCB RF Design Verification IP User Forum Name Topics Replies Last Post Custom IC Design Moderator: Andrew Beckett. 6924 22121 Issue in accessing PSF directory with ocean script. By dskang 11/23/2021 10:45:51 AM Custom IC SKILL Moderator: Andrew Beckett. 4847 16715 How to "mirror" child instance cdsTerm() display to parent instance? By Garrett Zhou 11/23/2021 10:09:11 PM Digital Implementation Design Planning, Place-and-Route, Low Power Implementation, Signoff Moderator: Bob, Kari, Vince Pham 2235 4255 Innovus short ports with cds_thru block causing LVS error By Nader Fathy 11/10/2021 1:49:43 PM Functional Verification Moderators: Adam Sherer, Steve Hobbs 1692 3605 how to merge coverage for each instances of the agents By mukukr 11/15/2021 1:24:36 AM Functional Verification Shared Code Upload your code here. Please give a brief summary of how to use it. 62 131 Create branches between two ports as an array in VerilogA By raghuramiitpkd 10/14/2021 12:45:59 PM Hardware/Software Co-Development, Verification and Integration Moderator: Frank Schirrmeister 296 315 xtensa download By ibrahim06 9/23/2021 9:12:45 AM High-Level Synthesis Moderator: Dave Pursley 38 28 How to launch Stratus GUI By gdnagendra 10/21/2021 1:02:52 PM IC Packaging and SiP Design Packaging solutions can make or break the cost budget. What design issues are you facing today? 179 312 How to define comment syntax for a language By Elizabeth Liam 10/11/2021 11:06:45 PM Implementation Board and package design enablement Moderator: Rishikesh Pawar, Atish Mukhopadhayay 7 0 uvm Error-[IND] Identifier not declared By rkaur9 11/11/2021 11:17:19 PM Logic Design Synthesis, Equivalence Checking, Low Power Validation, Test Moderator: Diego Hammerschlag, Vince Pham, Lisa 661 1129 How to interpret area reported by Genus in mm2 By abarajithan11 10/15/2021 2:11:53 AM Mixed-Signal Design This Forum is in place to cover and discuss cross functional topics you may encounter designing and layout a Mixed-Signal Design. Moderator: Andrew Beckett 542 1450 Annotate currents without adding the outputs to the ADE By AmarDas 11/23/2021 9:46:46 PM PCB Design From schematic to autorouting what are your challenges in producing high-speed designs? 9511 25779 How can I set reverse shape (postive to negative)? By ichliebedich 11/22/2021 10:12:46 PM PCB SKILL Upload your SKILL files here. Give a brief summary of how to best use the SKILL code. 1736 5263 Highlighting the NET By vimaldevlpr 11/22/2021 10:41:55 PM PCell Designer Questions about development of PCells, Module PCells and App Cells using the Cadence PCell Designer product as well as a place to share examples. Moderator: Andrew Beckett 8 31 How to redefine methods By Shweta K 9/3/2020 7:48:40 AM RAVEL DRC Programming for IC Packaging and PCB Everything related to ICP & PCB DRC rule programming in the RAVEL language. Topics concerning the RAVEL engine and compiler as well as RAVEL flows and integration are also appropriate. Moderator: Bjoern Lindberg 17 41 fiducial holes creation By babu pcb 12/17/2018 12:39:52 AM RF Design Moderator: Andrew Beckett. 932 3143 Error when editing RFTlinelib stackup cell with custom materials By ventari 10/27/2021 8:34:51 AM Verification IP 26 5 changing error severity of a vip error By anirudh25820 7/26/2021 3:44:46 AM Forum Name Topics Replies Last Post Announcements News, FAQs, and related info about how to best use the community. Moderators: Community Operations 81 7 International Journal of Embedded Systems and Applications (IJESA) By skareem29684 11/11/2019 7:50:22 AM Feedback, Suggestions, and Questions Provide feedback on the forums or any other part of the site. Questions and suggestions welcome. Moderator: Community Operations 360 479 Changing username By Dawud Beale 11/22/2021 7:32:55 AM Community Guidelines The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.