Virtuoso Variation Option Advanced statistical exploration of your design Virtuoso Variation Option Datasheet Accelerating Monte Carlo Analysis at Advanced Nodes White Paper Overview Videos News and Blogs Key Benefits Easily enables the appropriate analysis by letting you simply choose your task (e.g., yield verification) or statistical corner creation and specify your target sigma requirement Provides high-yield estimation capabilities for checking the outer boundaries of your design at the 4-, 5-, or 6-sigma level Delivers advanced statistical sample reordering that greatly improves the performance of the statistical simulation, with additional speed-up for FinFET technology at 16nm and below Provides mismatch contribution analysis and statistical sensitivity analysis to pinpoint most influential devices within a statistical simulation Features easy, one-step creation of worst-case corners as derived by 3-sigma statistical sampling The Cadence® Virtuoso® ADE Variation Option extends the statistical variation capabilities of Cadence’s Virtuoso ADE Assembler and Virtuoso ADE Verifier to allow for more sophisticated statistical analyses to be performed on any design. Specialized technology is also available for advanced-node designs. Statistical sample reordering Directly addresses the significant challenges associated with 3-sigma design, especially at an advanced process node or low Vdd. Virtuoso ADE Variation Option provides a statistical approach to verify circuit yield or create corners efficiently by reordering the samples to simulate the worst samples first. The method is co-developed with major foundries to provide with additional speedup for FinFET technology at 16nm and below. High-yield estimation for 4-, 5-, or 6-sigma analysis Parametric high-yield estimation is often required on devices that have extremely high volume (i.e., memory devices), or when testing the circuit limits is a must when failure of the part is not an option (i.e., automotive safety or medical devices). The Virtuoso ADE Variation Option provides two methods of simulation to meet and match your needs and conditions: Scaled-sigma sampling (SSS): This preferred statistical method generates samples where the standard deviation has been scaled up which is more accurate than WCD for nonlinear behavior and more efficient when there is a large number of statistical parameters and specifications. Worst-case distance (WCD): This statistical method defines the shortest distance from the nominal point to the specification boundary in the process/mismatch parameter space. WCD typically requires under 100 simulations for each spec and so is suitable for designs with a small number of specs/parameters that need to be monitored/changed. Automated yield improvement flow Virtuoso ADE Variation Option has an “Improve Yield” command that will return a design to a state where it meets all of the design criteria and has the highest possible yield. If no such point has been reached it will run iterative analyses on the current criteria and determine the conditions for highest possible yield for that design. Mismatch contribution analysis Virtuoso ADE Variation Option has a mismatch contribution analysis feature which is a Monte Carlo post-processing feature that helps in identifying the important contributors to mismatch variation. You can then modify the identified devices in the schematic and make the design less sensitive to mismatch variation REQUEST A DEMO Related Products Virtuoso ADE Assembler Virtuoso ADE Explorer Related Info Videos The New Sound of Analog Design: Simplify Design Verification with Virtuoso ADE Product Suite Celebrating 25 Years of Virtuoso Innovation Easily Explore and Analyze Your Design with Virtuoso ADE Product Suite News Releases VIEW ALL Cadence Unveils Next-Generation Virtuoso Platform Featuring Advanced Analog Verification Technologies and 10X Performance Improvements Across Platform 04/05/2016 Silicon Labs Significantly Reduces Design Time Using the Cadence Mixed-Signal Low-Power Flow 02/24/2016 Cadence Collaborates with Lumerical and PhoeniX Software to Offer Virtuoso Platform-Based Design Flow for Electronic /Photonic ICs 12/07/2015 Cadence Unveils Virtuoso Advanced-Node Platform for 10nm Processes 12/01/2015 Cadence and Intel Collaborate to Release 14nm Library Characterization Reference Flow for Customers of Intel Custom Foundry 03/17/2015 Blogs VIEW ALL Support Cadence is committed to keeping design teams highly productive. A range of support offerings and processes helps Cadence users focus on reducing time-to-market and achieving silicon success. Overview Cadence Online Support Details about online support Learn more Have an account already? Log in New to support? Sign up Online support overview Link to video Customer Support Support Process Software Downloads Computing Platform Support University Software Program Customer Support Contacts Training Get the most out of your investment in Cadence technologies through a wide range of training offerings. We offer instructor-led classes at our training centers, at your site, or through Virtual Classroom. We also offer self-paced online courses. Overview Course Delivery Methods Instructor-Led Training Online Training Virtual Classroom Regional Training Information China Europe, Middle East, and Africa India Japan Korea North America Singapore Taiwan Tools System Design and Verification Digital Design and Signoff Custom IC / Analog / RF Design IC Package Design and Analysis PCB Design and Analysis Tools A-Z IP Tensilica Processors Interface IP Denali Memory IP Analog IP Systems/Peripheral IP Verification IP Support Online Support Training Software Downloads University Software Program Resource Library News Press Releases Newsroom Blogs Forums Company Cadence Overview Investor Relations Alliances Executive Team Events Careers A Great Place to Do Great Work! Second year on the FORTUNE 100 list Our Culture Join the Team Contact Us General Inquiry Customer Support Media Relations Global Office Locator Subscribe to Monthly Newsletter Email * Worldwide Terms of Use Privacy Policy US Trademarks © 2016 Cadence Design Systems, Inc. All Rights Reserved. Connect with Us