Custom IC / Analog / RF Design Save time by automating simulation, routing, and library characterization Overview Resources Videos News and Blogs Customers Products A-Z Custom IC, Analog, RF Design Flows Legato Memory Solution Legato Reliability Solution Library Characterization Circuit Design Advanced Node Mixed-Signal Photonics Virtuoso System Design Platform Virtuoso RF Solution Library Characterization Circuit Design Circuit Simulation Layout Design Layout Verification RF Design Products A-Z Understand How Design Interdependencies Impact Circuit Performance For the builders of tomorrow, creating the electronic systems that enable smart living will require advanced design technologies on multiple levels—semiconductor, chip packaging, system interconnect, hardware-software integration, system verification, and more. Past approaches to design that address these levels disjointedly are inadequate for the increasing complexity, low-power requirements, and shorter time-to-market challenges that designers face today. Successful companies will thrive by collaborating with ecosystem leaders in electronic design automation, intellectual property, chip fabrication, and other parts of the value chain to create a comprehensive environment for System Design Enablement (SDE). Cadence® custom/analog/RF solutions are a key component of the SDE strategy. Selectively automating non-critical aspects of custom IC design allows engineers to focus on precision-crafting their designs. Cadence circuit design solutions, including the Virtuoso® Environment, Spectre® Simulation Solutions, and Liberate™ Characterization and Validation Solutions, as well as the specialized electrically aware design (EAD) and advanced-node flows, enable fast and accurate entry of design concepts, which includes managing design intent in a way that flows naturally in the schematic. Using this advanced, parasitic-aware environment, you can abstract and visualize the many interdependencies of an analog, RF, or mixed-signal design to understand and determine their effects on circuit performance. Virtuoso Custom IC, Analog, and RF Design Resource Library VIEW ALL Video (74) Datasheet (32) Customers Success (10) Webinar (4) Press Releases (37) White Paper (11) Success Story Video (9) Videos Celebrating 25 Years of Virtuoso Innovation Accurate and Faster SoC Signoff with Simulation-Based AMS Characterization Characterizing 22FDX Library at GLOBALFOUNDRIES News Releases VIEW ALL Cadence Launches Liberate Trio Characterization Suite Employing Machine Learning and Cloud Optimizations 06/25/2018 Cadence Design Systems and NI Announce Collaboration to Simplify Next-Generation Semiconductor and RF Development 05/22/2018 Cadence Debuts Industry’s First Analog IC Design-for-Reliability Solution 05/08/2018 Cadence Collaborates with TSMC to Advance 5nm and 7nm+ Mobile and HPC Design Innovation 05/01/2018 Cadence Supports New TSMC WoW Advanced Packaging Technology 05/01/2018 Blogs VIEW ALL Customers Electrically aware design can enable us to save several iterations on the design of each block sensitive to parasitic effects. Depending on block complexity, design time savings can range from half a day to several days per block. Martin Kejhar, Senior Technical Staff Engineer and Scientist, ON Semiconductor Read More or View All Customers Custom IC / Analog / RF Design Products A-Z L Liberate AMS Mixed-Signal Characterization Liberate Characterization Solution Liberate LV Library Validation Solution Liberate MX Memory Characterization Liberate Variety Statistical Characterization S Spectre Accelerated Parallel Simulator Spectre AMS Designer Spectre Circuit Simulator Spectre eXtensive Partitioning Simulator (XPS) Spectre RF Option T The Power of Cadence and MathWorks V Virtuoso ADE Assembler Virtuoso ADE Explorer Virtuoso ADE Product Suite Virtuoso ADE Verifier Virtuoso Analog Design Environment Virtuoso DFM Virtuoso Integrated Physical Verification System Virtuoso Layout Suite Virtuoso Layout Suite EAD Virtuoso Schematic Editor Virtuoso Space-Based Router W What's New in Virtuoso Tools System Design and Verification Digital Design and Signoff Custom IC / Analog / RF Design IC Package Design and Analysis PCB Design and Analysis Tools A-Z IP Tensilica Processors Interface IP Denali Memory IP Analog IP Systems/Peripheral IP Verification IP Support Online Support Training Software Downloads University Software Program Resource Library News Press Releases Newsroom Blogs Forums Company Cadence Overview Investor Relations Alliances Executive Team Events Careers A Great Place to Do Great Work! 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