Submit Products Solutions Services Partners News & Events Company R&D Projects JEOPARD Project The JEOPARD Project JEOPARD stands for Java EnvirOnment for PArallelRealtime Development. The JEOPARD project was established by leading European suppliers of real-time technologies, research institutes and industrial users to develop new real-time Java technologies for multi-core systems. About 3.3 million Euros have been invested in research and development for the project, which successfully completed in October 2010. The JEOPARD project was partially funded by the 7th framework program, an initiative of the European community to advance research and development of new technologies, applications and industries. Participants in the project were aicas, Cassidian Electronics, one of the three Business Units of Cassidian (formerly EADS Defense & Security), FZI, RadioLabs, GMV, Technical University of Cluj-Napoca, Technical University of Vienna, The Open Group, University of York, and SYSGO. The project objectives were to provide tools for platform-independent development of predictable systems that make use of hybrid platforms consisting of multi-core microprocessors and FPGAs. Three industrial use cases were implemented: An avionics application by GMV, implementing an AOC (Airline Operational Centre) involving IMA/ARINC-653 compliance and developed according to DO-178B/EC-12B Level C. A Software Defined Radio application by RadioLabs, designed to simulate the operations performed in a UMTS system at the physical layer. A Radar application by Cassidian, based on performance requirements typically related to Airport Surveillance Radar (ASR). The evaluation of the Radar use case demonstrated the benefits of a JEOPARD based system and identified the possible improvement of JEOPARD. The radar data processing oriented tracking application turned out to be not only quite stable with aicas’JamaicaVM on PikeOS but also faster than with OpenJDK on Linux. The evaluation results highlighted one crucial advantage of JEOPARD: it is possible to use the power of multi-core microprocessors for predictable, embedded systems without abandoning the merit of a platform-independent development. Parallelizing an algorithm on multiple cores increased the overall processing power without increasing the processor frequency or electrical power consumption. One noteworthy objective of JEOPARD was to enable developers to easily integrate FPGAs with microprocessors in one system and to communicate between both devices in a convenient way using Java. This objective was accomplished. In the radar use case, a microprocessor sent data to an FPGA via PCIe, the FPGA processed the data and sent back the results to the microprocessor. JEOPARD's HW-Methods encapsulate the platform-specific communication and provide a functional interface to the Java developer. For more information, please read the JEOPARD Press Release or visit the JEOPARD Website tweet share share Info Next Steps Request Information by E-Mail or by Phone DE +49.6136.9948-500 FR +33.1.300912-70 Useful Information About SYSGO (PDF) Related Information SYSGO Whitepapers Professional Articles SYSGO Aerospace & Defence Solutions SYSGO Railway Solutions SYSGO Automotive Solutions PikeOS Hypervisor SYSGO AG Am Pfaffenstein 14 D-55270 Klein-Winternheim Germany Contact PHONE: +49 6136 99480 FAX: +49 6136 994810 office( at )sysgo.com Support Product Support ELinOS Demoserver Legal Imprint General Terms and Conditions Privacy Policy