Patent Document ID: 9111151
Application ID: 13598665

Base Claim:
1. A NoC processor comprising: multiple cores, each of the cores is assigned with an addressing string with L based-D words, and the addressing string does not have two neighboring identical words, wherein L present of an addressing string length is an integer larger than 1, D present of a word selection is an integer larger than 2; and a Kautz NoC, wherein each of the cores is unidirectionally link to other (D−1) cores through the Kautz NoC, and in the two connected cores, the last (L−1) words associated with the addressing string of one core are same as the first (L−1) words associated with the addressing string of the other core.

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Claim 18:
18. A routing method, used in the NoC processor according to claim 1 , wherein the routing method comprises: sequentially left-shifting the addressing string of the core to find whether first n words of the left-shifted addressing string is equal to first n words of a target address in a packet, wherein n is an integer larger than or equal to 1, and the addressing string of the core and the first n words of the target address are respectively present of {S1˜SL} and {D1˜DL}; if the first n words of the left-shifted addressing string is equal to the first n words of the target address, generating a routing string R={R1˜RK}={S1˜SLDn+1˜DL}; if the first n words of the left-shifted addressing string is not equal to the first n words of the target address, generating the routing string R={R1˜RK}={S1˜SLD1˜DL}; and transmitting the packet to the next core with the addressing string present of {R2˜RL+1}.