Patent Document ID: 8881074
Application ID: 13123055

Base Claim:
1. A computer tool for rewriting hardware design language, HDL, code, wherein: said tool is arranged for receiving an original version of a HDL code expressing a hardware design of a digital circuit and comprising means for generating a representation of the syntax of said received original version of the HDL code, said representation containing a plurality of nodes, said tool further comprising: means for determining modifications to said representation of said syntax whereby at least one node is added to or removed from said representation, and computation means for generating a modified HDL code by computing a set of textual changes according to said modifications to said representation of said syntax, and applying said textual changes to said original version of said received HDL code.

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Claim 3:
3. The tool for rewriting HDL code according to claim 1 , wherein said received HDL code is in the VHDL, Verilog, SystemC, SystemVerilog Handle C or MyHDL language.