Patent Document ID: 9383977
Application ID: 14169010

Base Claim:
1. A computer implemented method of generating a compiler description from an architecture description, comprising: extracting, by a compiler description generator, information from an architecture description describing an architecture of an application specific instruction set processor (ASIP); receiving, by the compiler description generator via a source different than the architecture description, definitions for a plurality of abstract elements of a compiler that have no direct representative in the architecture description, the abstract elements comprising a non-terminal representing a data path in common with a plurality of compiler instructions; extracting, by the compiler description generator, a mapping of compiler rules to instructions included in the architecture description; and automatically generating, by the compiler description generator, a compiler description of the compiler for the architecture of the ASIP based on the extracted information, the received definitions for the plurality of abstract elements, and the extracted mapping, wherein a compiler generator generates the compiler based on the compiler description.

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Claim 10:
10. The method of claim 1 , further comprising: extracting additional information from the architecture description, the additional information describing a component of the of the ASIP; receiving, via a graphical user interface from a user, instructions to hide the component; and determining, based on the instructions, to not use the additional information in generating the compiler description.