Patent Document ID: 9704575
Application ID: 14990125

Base Claim:
1. A device comprising: content-addressable memory cells arranged in rows, two of the rows are timing reference rows and the remainder of the rows are data rows maintaining words of data, the data rows comprise individual matchlines, a first reference row of the reference rows comprises a precharge reference matchline, a second reference row of the reference rows comprises an evaluation reference matchline, the precharge reference matchline is hardwired to match all bits and timing for the individual matchlines to precharge is based on a time to precharge the precharge reference matchline, and the evaluation reference matchline is hardwired to a one-bit-miss word that has only one bit not producing a match and timing for the individual matchlines to evaluate a search word is based on a time for the evaluation reference matchline to evaluate the search word.

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Claim 5:
5. The device according to claim 1 , each of the rows maintains a single one of the words of data.