Patent Document ID: 8997073
Application ID: 14261897

Base Claim:
1. A computer implemented method comprising: identifying code regions in an application from which one or more offloadable tasks can be generated by a compiler for a heterogenous computing system including a processor and an accelerator memory, comprising: adding, by the processor, relaxed semantics to a directive based language in the heterogenous computing system for allowing a user to suggest rather than specify a parallel code region as an offloadable task candidate, wherein the offloadable task candidate is a sub-offload or a super-offload; and identifying, by the processor, one or more offloadable tasks in a neighborhood of code region marked by the directive based language.

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Claim 2:
2. The computer implemented method of claim 1 , wherein the sub-offload comprises only part of the neighborhood of code region marked by the directive based language is offloaded to the accelerator memory while the other part of the neighborhood of code region executes on the processor in parallel.