Patent Document ID: 10123028
Application ID: 15028717

Base Claim:
1. A syntax parsing apparatus comprising: a plurality of syntax parsing circuits, each having at least entropy decoding capability, wherein the syntax parsing circuits are arranged to generate a plurality of entropy decoding results of a plurality of image regions within a same frame, respectively; and a dispatcher, arranged to assign bitstream start points of the image regions to the syntax parsing circuits and trigger the syntax parsing circuits to start entropy decoding, respectively; wherein the syntax parsing circuits comprise: a first syntax parsing circuit, arranged to perform entropy decoding upon a first image region included in the image regions during a first processing time period; and a second syntax parsing circuit, arranged to perform entropy decoding upon a second image region included in the image regions during a second processing time period, wherein the second processing time period is overlapped with the first processing time period.

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Claim 3:
3. The syntax parsing apparatus of claim 1 , further comprising: a storage device, shared by the syntax parsing circuits, wherein the storage device is arranged to store the entropy decoding results of the image regions.