Patent Document ID: 8327315
Application ID: 12114530

Base Claim:
1. A method for graphically editing process rules for circuit designs, comprising: using a computer system to receive a selection of a circuit design object or a circuit design constraint, wherein the selection comes from a circuit design integrated design environment; using a computer system to query a circuit design object store based on the circuit design object or circuit design selected, wherein the circuit design object store contains a plurality of relationships between circuit design objects and circuit design constraint groups; using a computer system to receive a first list from the circuit design object store, wherein the first list comprises a plurality of circuit design constraint groups based on the selection; using a computer system to display in a graphical user interface the first list received, wherein each circuit design constraint group in the first list is selectable; and when a circuit design constraint group in the first list is selected, performing the operations of: (a) retrieving from a registry a second list, wherein the second list comprises a plurality of circuit design constraints applicable to the circuit design constraint group selected, (b) querying the design object store for circuit design constraints contained in the second list, (c) receiving a third list from the design object store, wherein the third list comprises the plurality of circuit design constraints from the second list and a plurality of data belonging to the circuit design constraints from the second list, and (d) displaying the third list in the graphical user interface.

---

Claim 2:
2. The method of claim 1 , wherein the first list displayed in the graphical user interface is presented in a browser tree having a plurality of entries and a plurality of subentries, the entries corresponding to different circuit design constraint groups in the first list.