Patent Document ID: 9507932
Application ID: 14484903

Base Claim:
1. An apparatus, comprising: a processor and a memory communicatively connected to the processor, the processor configured to: receive topology information describing a set of topology elements of a topology; determine, based on a set of topology abstraction policies configured to control abstraction of the topology information describing the set of topology elements of the topology, topology element abstraction information, wherein, to determine the topology element abstraction information, the processor is configured to assign respective classifications to the topology elements in the set of topology elements based on the set of topology abstraction policies; determine, based on the topology element abstraction information, abstracted topology information configured to provide an abstract representation of the topology, wherein, to determine the abstracted topology information, the processor is configured to: determine, for each of the topology elements of the set of topology elements based on the respective classifications of the topology elements, whether to select the topology element for inclusion in the abstracted topology information; and determine based on the respective classifications of the topology elements selected for inclusion in the abstracted topology information, topology element clustering information indicative of clustering of the topology elements selected for inclusion in the abstracted topology information; and propagate the abstracted topology information toward a topology exposure element.

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Claim 13:
13. The apparatus of claim 1 , wherein the processor is configured to: assign a label to one of the topology elements selected for inclusion in the abstracted topology information.