Patent Document ID: 9076441
Application ID: 13735091

Base Claim:
1. A speech recognition circuit comprising: a circuit for providing state identifiers which identify states corresponding to nodes or groups of adjacent nodes in a lexical tree, and for providing scores corresponding to said state identifiers, the lexical tree comprising a model of words; a memory structure for receiving and storing state identifiers identified by a node identifier identifying a node or group of adjacent nodes, said memory structure being adapted to allow lookup to identify particular state identifiers, reading of the scores corresponding to the state identifiers, and writing back of the scores to the memory structure after modification of the scores; an accumulator for receiving score updates corresponding to particular state identifiers from a score update generating circuit which generates the score updates using audio input, for receiving scores from the memory structure, and for modifying said scores by adding said score updates to said scores; and a selector circuit for selecting at least one node or group of adjacent nodes of the lexical tree according to said scores.

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Claim 7:
7. The speech recognition circuit of claim 1 , wherein the memory structure is configured to hold a record for each of a plurality of nodes in the lexical tree, the record including said states, a previous node identifier for identifying a previous node in the lexical tree, and information indicating whether said each node is a previous node for another node stored in said memory structure, the speech recognition circuit including a circuit to identify a first node which is not a previous node of another record, and to provide a new data record corresponding to a new node, the new node being the next node after the first node in the lexical tree, using a score associated with the first node.