Patent Document ID: 7823117
Application ID: 12004834

Base Claim:
1. A processor-implemented method for implementing a high-level programming language program in hardware and software components, comprising: compiling the high-level programming language program into a target language program that includes a plurality of functional elements; profiling execution of the target language program and storing profile data that specifies respective execution counts of the functional elements; selecting a subset of the functional elements for implementation in programmable resources of a programmable device based on the profile data and availability of the programmable resources to implement functions of the subset of functional elements; generating a bitstream that implements a first sub-circuit that performs functions of the subset of functional elements; wherein the generating the bitstream includes generating bits that implement a first soft processor and a second soft processor on the programmable device, wherein the first soft processor in executing a first part of the target language program provides input data to the first sub-circuit, and the second soft processor executing a second part of the target language program receives output data from the first sub-circuit; removing the subset of functional elements from the target language program; configuring the programmable device with the bitstream; and after the removing step, providing the target language program for execution by a processor.

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Claim 9:
9. The method of claim 1 , further comprising for each functional element, generating in the configuration bitstream configuration bits that implement an input FIFO buffer and an output FIFO buffer for input and output of data to and from the functional element.