Patent Document ID: 7565632
Application ID: 11615174

Base Claim:
1. A behavioral synthesis system for generating a circuit description at low abstractness from a behavioral-level description, said system comprising: language analyzing means for analyzing a behavioral-level description entered thereinto for conversion into an internal representation for behavioral synthesis, and for generating an internal representation indicative of a correspondence relationship between a pointer variable and a specific circuit entity when the pointer variable is converted into a specific circuit entity, based on a pointer type specification within the behavioral-level description; pointer-terminal converting means for converting a pointer variable in the internal representation generated by said language analyzing means into a set of a terminal and a condition section, based on a conversion rule; and behavioral synthesizing means for performing behavioral synthesis processing for the internal representation from which the pointer variable has been removed by said pointer-terminal converting means to generate and supply a circuit description at low abstractness; wherein the behavioral synthesis system includes providing a design flow which allows a caller function to be completely independent of the implementation of a callee function upon synthesis of the caller function.

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Claim 3:
3. The behavioral synthesis system according to claim 1 , further comprising pointer type analyzing means for determining a method of converting a pointer variable into a specific circuit entity based on the result of the analysis by said language analyzing means.