Patent Document ID: 4057849
Application ID: 05717000

Base Claim:
1. A unit for displaying characters including predetermined delimiter characters on a plurality of lines, said unit comprising: A. memory means for storing character codes in a plurality of addressable storage locations, the character codes representing the characters to be displayed, each character code designating whether it represents a delimiter character; B. display means for displaying characters at a predetermined number of consecutive display positions along a given line in a predetermined timing sequence in response to the character codes; C. timing means connected to said display means for establishing the predetermined timing sequence; D. transfer means connected to said memory means, said display means and said timing means for transferring the character codes from said memory means to said display means; E. address generator means connected to said timing means and said memory means for applying addresses to said memory means thereby to cause a retrieval of character codes from said memory means in a sequence corresponding to the consecutive display positions F. delimiter means connected to said transfer means and responsive to the retrieval of character codes from said memory means for indicating the transfer of a character code representing a delimiter character from said memory means, G. address recording means connected to said delimiter means and said address generator means for recording the storage location address from said address generator means when said transfer means receives the character code representing the last delimiter character that is to be displayed on a line, and H. address transfer means connected to said address recording means and said address generator means for transferring the contents of said address recording means to said address generator means as an updated character code address for the first character in a succeeding line of characters; and I. control means connected to said transfer means and said delimiter means for inhibiting the transfer from said transfer means to said display means of character codes succeeding the character code representing the last delimiter character for the given line.

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Claim 2:
2. A unit as recited in claim 1 wherein said address generator means includes counter means for generating address signals in sequence, said address transfer means being connected to said counter means for presetting said counter means with the value in said address recording means.