Patent Document ID: 20170359032
Application ID: 15604482
Patent Flag: 0

Claim One:
1. An amplifier comprising: a device package configured to be connected to a printed circuit board (PCB), wherein the device package includes first, second, third, and fourth input leads, first, second, third, and fourth output leads, a first amplifier path connected between the first input lead and the first output lead, wherein the first amplifier path includes a first input matching network coupled to the first input lead, and a first amplifier stage coupled between the first input matching network, and the first output lead, and wherein the first amplifier stage forms a portion of a main amplifier path of a Doherty amplifier, a second amplifier path connected between the second input lead and the second output lead, wherein the second amplifier path includes a second input matching network coupled to the second input lead, and a second amplifier stage coupled between the second input matching network, and the second output lead, and wherein the second amplifier stage forms a portion of a first peaking amplifier path of the Doherty amplifier, a third amplifier path connected between the third input lead and the third output lead, wherein the third amplifier path includes a third input matching network coupled to the third input lead, and a third amplifier stage coupled between the third input matching network, and the third output lead, and wherein the third amplifier stage forms a portion of a second peaking amplifier path of the Doherty amplifier, and a fourth amplifier path connected between the fourth input lead and the fourth output lead, wherein the fourth amplifier path includes a fourth input matching network coupled to the fourth input lead, and a fourth amplifier stage coupled between the fourth input matching network, and the fourth output lead, and wherein the fourth amplifier stage forms a portion of a third peaking amplifier path of the Doherty amplifier.