Patent Document ID: 20110088016
Application ID: 12576253
Patent Flag: 0

Claim One:
1. A method, implemented by a computer device, for validating a candidate trace produced by a Counter-Example Guided Abstraction Refinement (CEGAR) loop, the candidate trace associated with a potential error within a program, the method comprising: performing forward analysis in a forward direction along the candidate trace to collect information pertaining to the candidate trace; performing backward analysis in a backward direction along the candidate trace, on the basis of the information collected in the forward analysis, the forward analysis and the backward analysis identifying whether the candidate trace represents a feasible trace or an infeasible trace; and generating, for the case of an infeasible trace, at least one predicate for use in removing the infeasible trace from a subsequent iteration of the CEGAR loop if said at least one predicate can be discovered.