Patent Document ID: 7610523
Application ID: 11352085
Patent Flag: 1

Claim One:
1. A method for in-system memory testing comprising: probing a physical memory to determine the physical memory configuration including a base address of the physical memory the size of the entire physical memory; determining a size of a portion of physical memory to be tested in each iteration of testing of one or more iterations of testing to be performed to test the entire physical memory, the size of a portion of physical memory to be tested in each iteration of testing being determined by dividing the size of the entire physical memory by a total number of iterations to be performed to test the entire physical memory; selecting a first portion of physical memory for testing, thereby defining a selected first portion of physical memory, the selected first portion of physical memory being selected based on the iteration number associated with the testing of the selected first portion of physical memory, the size of a portion of physical memory to be tested in each iteration of testing and an allocated start address for the selected first portion of physical memory, the allocated start address for the selected first portion of physical memory being determined by adding the product of the size of a portion of physical memory to be tested in each iteration of testing and the iteration number associated with the testing of the selected first portion of physical memory to the base address of the physical memory; allocating a portion of virtual memory for testing, thereby defining an allocated portion of virtual memory; mapping the selected first portion of physical memory from the physical memory to the allocated portion of virtual memory; and executing a memory test algorithm on the selected first portion of physical memory mapped to the allocated portion of virtual memory, in the allocated portion of virtual memory.