Patent Document ID: 4207670
Application ID: 05946610
Patent Flag: 1

Claim One:
1. A method for making a semiconductor neuron comprising the process steps of: (a) selecting a body of semiconductor material having two opposed major surfaces, one of which has a preferred planar crystal orientation, a vertical axis perpendicular to the two opposed major surfaces, a first type conductivity, a predetermined level of resistivity and at least one first region of degenerative semiconductor material dispose in the body, extending entirely through the body and terminating in the opposed major surfaces of the body and having two opposed end surfaces, each end surface being coextensive with a respective one of the major surfaces of the body; (b) disposing at least one droplet of a selective material on a selective portion of one of the two opposed end surfaces of at least one of the first regions; (c) heating the body and each of the droplets to a temperature sufficient to form a melt of the droplet of material and the semiconductor material on the major surface of the body; (d) establishing a unidirectional thermal gradient substantially parallel to the vertical axis of the body and a preferred crystal axis of the material of the body; (e) migrating each alloy melt by temperature gradient zone melting processing through the solid material of the respective first region from the first major surface to, and terminating in, the other of the two major opposed surfaces to form a second region of degenerative semiconductor material having solid solubility of the selective material therein and a third and opposite type conductivity than the second type conductivity, as well as to form a P-N junction at the contiguous abutting surfaces of material of opposite type conductivity, the P-N junction extending between, and terminating in, the two opposed major surfaces of the body and having the electrical characteristics of a tunnel diode; (d) affixing a first ohmic electrical contact to one of the two opposed end surfaces of a first region; (e) affixing a second ohmic electrical contact to one of the two opposed end surfaces of the second region which is coextensive with the one end surface of the first region; (f) affixing a third ohmic electrical contact to the other of the two opposed end surfaces of the first region, and (g) affixing a fourth ohmic electrical contact to the other of the two opposed end surfaces of the second region.