Patent Document ID: 6026240
Application ID: 08609035
Patent Flag: 1

Claim One:
1. A computer system having a central processing unit (CPU) and a random access memory (RAM) coupled to said CPU, for use in compiling a target program for use with a target computer architecture, said computer system comprising: (a) a compiler system resident in said computer system having an optimization mechanism comprising: (b) a loop-invariant statement optimization mechanism configured to optimize a loop statement containing a loop-invariant statement, said loop statement representing an iterative construct and said loop statement having the characteristics of a single basic block natural loop and including a determinable number of iterations; (c) an omega-invariant statement detection mechanism configured to detect a statement that is variant for at least the first iteration of said loop statement but which becomes invariant before the completion of the execution of all iterations of said loop statement within said loop statement; (d) said omega-invariant statement determination mechanism being further configured to determine an omega such that after omega iterations said omega-invariant statement becomes invariant, said omega-invariant statement determination mechanism including i. a loop detection mechanism configured to duplicate said iterative construct leaving said iterative construct and a duplicated iterative construct having a kernel; ii. a loop peeling mechanism configured to unwind omega iterations from said kernel leaving one or more peeled iterative and said kernel having a stabilized omega-invariant operation; iii. a hoisting mechanism configured to hoist said stabilized omega-invarialit operation out of said kernel; said peeled iterations and said hoisted omega-invariant operation and said kernel comprising an optimized iterative construct; and (e) an omega-invariant statement optimization mechanism configured to optimize said iterative construct responsive to said omega.