Patent Document ID: 9471289
Application ID: 14667819
Patent Flag: 1

Claim One:
1. A method for source-to-source transformation for compiler optimization for one or more many integrated core (MIC) coprocessors, comprising: identifying data dependencies in one or more candidate loops and data elements used in each iteration for one or more arrays; profiling the one or more candidate loops to find a proper number m, wherein data transfer and computation for m iterations take an equal amount of time; creating an outer loop outside the candidate loop, wherein each iteration of the outer loop executes m iterations of the candidate loop; and performing data streaming, wherein the data streaming comprises: determining optimum buffer size for one or more arrays, and inserting code before the outer loop to create one or more optimum sized buffers; overlapping data transfer between one or more central processing units (CPUs) and the MICs with the computation to hide data transfer overload; reusing the buffers to reduce memory employed on the MICs during the data transfer; and reusing threads on the MICs to repeatedly launch kernels on the MICs for asynchronous data transfer.