Patent Document ID: 20070002966
Application ID: 11514459
Patent Flag: 0

Claim One:
1. A circuit comprising: a semiconductor chip; a transmitter circuit disposed on the chip, the transmitter circuit being operable to accept a digital input signal including a plurality of bits and send an output signal including a series of output bit signals, each bit of the digital input signal being represented by a single output bit signal, each output bit signal having a signal level which is a first function of the value represented by such output bit signal and the values of the bits represented by one or more preceding output bit signals, the transmitter circuit including an input signal circuit operable to accept bits of the digital input signal, a memory operable to store a plurality of data elements and to retrieve a particular data element responsive to an address which is a second function of a current bit and one or more preceding bits of the digital input signal, and a signal generator circuit operable to set the signal level of the output bit signal representing the current bit responsive to the retrieved data element.