Patent Document ID: 5440150
Application ID: 08305403
Patent Flag: 1

Claim One:
1. A non-crystalline silicon active device for processing electrical signals, said device comprising: a flexible substrate of large dimension; a plurality of non-crystalline silicon layers formed on said substrate, said silicon layers being electrically isolated from one another by dielectric layers interposed therebetween and each silicon layer having formed therein a plurality of semiconductor devices, at least one of said semiconductor devices comprising a multi-input thin-film summing transistor having a threshold voltage characteristic and a parallel array of weighted gate electrodes, said gate electrodes having binary-scaled widths for providing the corresponding weights thereto; and multiple interlayer and intralayer interconnections electrically connecting outputs of a preselected plurality of said semiconductor devices to variably weighted inputs of another preselected plurality of said semiconductor devices, thus providing a highly-connected morphology including neural network architectures.