Patent Document ID: 20170078173
Application ID: 15368846
Patent Flag: 0

Claim One:
1. A computer system comprising: a processor(s) set; a machine readable storage device; and computer code stored on the machine readable storage device, with the computer code including instructions for causing the processor(s) set to perform operations including the following: providing a plurality of message passing collectives algorithms, evaluating each algorithm of the plurality of message passing collectives algorithms for performance when subject to at least one type(s) of jitter to obtain jitter evaluations, ranking the plurality of message passing collectives algorithms relative to each other based upon the jitter evaluations to obtain a first ranking, selecting, at runtime, a first message passing collectives algorithm from the plurality of message passing collectives algorithm, where the selection is based, at least in part, on the first ranking, performing message passing using the first message passing collectives algorithm, and estimating a level of system jitter that will occur at runtime through performance data collected by benchmarks during offline calibration to obtain an estimated system jitter level, wherein: the selection of the first message passing collectives algorithms is further based, at least in part, upon a first non-jitter factor which is not related to any type of jitter, and the at least one type(s) of jitter includes both of the following types of jitter: operating system jitter and/or network jitter.