Patent Document ID: 8589138
Application ID: 12131294
Patent Flag: 1

Claim One:
1. A non-transitory, tangible computer-readable medium containing instructions, which when executed by a processor cause the processor to perform a method to analyze an electrical circuit design (ECD), the method comprising steps of: a) obtaining simulation data for multiple candidate designs of the ECD, the ECD having associated therewith at least one of circuit variables and circuit performance metrics; b) processing the simulation data in accordance with pre-determined rules to obtain characteristic data of the ECD and to determine a characteristic value of the ECD, the characteristic value of the ECD depending on the at least one of circuit variables and circuit performance metrics; c) processing the characteristic data of ECD to determine a statistical uncertainty of the characteristic value; d) determining if the statistical uncertainty of the characteristic value is outside a pre-determined range; e) only if the statistical uncertainty of the characteristic value is outside the pre-determined range, obtaining further simulation data for further candidate designs of the ECD to add to the simulation data and repeating steps (b) through (d); and, f) while steps (a) through (e) are performed, and when the characteristic value and the statistical uncertainty of the characteristic value have been determined, providing runtime feedback by displaying, for assessment of the ECD, the characteristic value and the statistical uncertainty of the characteristic value, displaying the characteristic value and the statistical uncertainty of the characteristic value including at least one of: plotting the characteristic value and a confidence interval of the characteristic value; plotting the characteristic value and a confidence interval of the characteristic value as a function of runtime; plotting the characteristic value and a statistical p-value of the characteristic value; and plotting a relative impact and a confidence interval of the relative impact of some of the circuit variables on a yield of the ECD.