Patent Document ID: 9760533
Application ID: 14459577
Patent Flag: 1

Claim One:
1. A weighted sum system, comprising: an array of current source modules interconnected and arranged into rows and columns, where each current source module includes a field effect transistor and a charge receptacle electrically isolated but capacitively coupled to a channel region of the transistor, wherein, for each row of current source modules, one of a source terminal or a drain terminal for each current source module in the row of current source modules is electrically connected together at a select node and the other of the source terminal and the drain terminal for each current source module in the row of current source modules is electrically connected to one of a plurality of output nodes, such that current flowing through a given current source module is unaffected by operation of remainder of the current source modules in the array of current source modules; a control circuit electrically connected to each current source module and operates to selectively activate a given column of current source modules in the array of current source modules; an input circuit electrically connected to select node for each row of current source modules and operates to form a non-zero voltage across each current source module in a selected row of current source modules; a set of input transistors interposed between the input circuit and the array of current source modules, for each input transistor, a gate terminal is electrically coupled to the input circuit, one of a source terminal or a drain terminal for each input transistor in the set of input transistors is electrically coupled together and the other of the source terminal and the drain terminal for each input transistor in the set of input transistors is electrically connected to one of select nodes in the array of current source modules; and an output circuit electrically connected to the plurality of output nodes via a common output node, the output circuit operates, substantially independently from amount of current that is being sourced, to maintain voltage at the common output node at a reference voltage and generates an output which is correlated to current that is being sourced collectively by the array of current source modules.