Patent Document ID: 9195436
Application ID: 14257952
Patent Flag: 1

Claim One:
1. A system comprising: one or more hardware processing units; memory storing instructions that, when executed by the one or more hardware processing units, cause the system to perform operations comprising: determining at least a first stage that includes one or more sub-problems of a dynamic programming problem; determining a second stage includes one or more sub-problems of the dynamic programming problem, wherein solutions to the one or more sub-problems in the second stage depend on at least one solution produced by at least one sub-problem of the one or more sub-problems included in the first stage; determining a first group of stages that includes the first stage; determining a second group of stages that includes the second stage; generating a solution to be used instead of the at least one solution on which the one or more sub-problems of the second stage depend; and processing the first group of stages and the second group of stages in parallel via a first hardware processing unit and a second hardware processing unit, respectively, wherein the processing of the second group of stages uses the generated solution to compute solutions to the one or more sub-problems in the second stage, one or more of the computed solutions being parallel to a true solution.