Patent Document ID: 20080235641
Application ID: 12132714
Patent Flag: 0

Claim One:
1. A program storage device readable by machine, tangibly embodying a program of instructions executable by the machine to perform a method of determining critical areas associated with different types of fault mechanisms in an integrated circuit design, said method comprising: constructing individual Voronoi diagrams for critical areas of individual fault mechanisms in said integrated circuit design, wherein said individual fault mechanisms comprise different types of fault mechanism, wherein said individual fault mechanisms are independent; after said constructing of said individual from one another, and wherein each one of said individual fault mechanisms comprises a single fault mechanism Voronoi diagrams, constructing a composite Voronoi diagram based on at least two of said individual Voronoi diagrams; and computing a critical area for a composite fault mechanisms of said integrated circuit design based on said composite Voronoi diagram such that said composite fault mechanism is dependent on at least two of said individual fault mechanisms.