Patent Document ID: 20050093561
Application ID: 10979245
Patent Flag: 0

Claim One:
1. A semiconductor integrated circuit testing device, comprising: a plurality of resistors connected to a plurality of output terminals of a semiconductor integrated circuit; application means for applying a predetermined voltage to the plurality of resistors; input means for inputting a predetermined operation pattern signal to a plurality of input terminals of the semiconductor integrated circuit; measure means for measuring a total sum of amounts of currents which are caused to flow through the plurality of resistors, respectively, based on the predetermined operation pattern signal input with the input means; comparison means for comparing a total sum of amounts of currents which are measured in the semiconductor integrated circuit with the measure means with a normal value of a total sum of amounts of currents which are measured with the measure means in a non-defective sample which is used instead of the semiconductor integrated circuit and is verified in advance to normally operate based on the input predetermined operation pattern signal; and judgment means for judging, based on the comparison results obtained with the comparison means, whether or not the semiconductor integrated circuit is normal.