Patent Document ID: 7580823
Application ID: 11595358
Patent Flag: 1

Claim One:
1. A method of examination an integrated circuit (IC) structure formed on a semiconductor wafer, the method comprising: obtaining a measured diffraction signal of the IC structure, the measured diffraction signal having been measured using an optical metrology device; calculating diffraction signals using a metrology simulator; storing the calculated diffraction signals and corresponding device attributes in a simulation data store embodied in a computer-readable storage medium, the device attributes including electrical and/or thermal properties of devices to be formed on the semiconductor wafer; comparing the measured diffraction signal to the calculated diffraction signals stored in the simulation data store; obtaining a best matching calculated diffraction signal from the simulation data store based on the comparison of the measured diffraction signal and the calculated diffraction signals stored in the simulation data store; retrieving from the simulation data store the device attributes corresponding to the best matching calculated diffraction signal for examination the IC structure; and outputting the retrieved device attributes.