Patent Document ID: 6144932
Application ID: 09089163
Patent Flag: 1

Claim One:
1. A simulation device for simulating an operation of an electronic circuit, comprising: a data input means for receiving description data of an electronic circuit to be simulated; a data partitioning means for partitioning the description data of the electronic circuit received from said data input means to generate description data of partial circuits; a point deciding means for deciding a time point of the next stage for the description data of the partial circuits generated by said data partitioning means; an equation generating means for generating a simultaneous linear equation by application of an implicit integration formula and a Newton iteration method to the description data of the partial circuits at the time point of the next stage as decided by said point deciding means; a plurality of block ILU factorization means for performing incomplete LU factorization processing in parallel on each of several blocks in a bordered-block-diagonal coefficient matrix of the simultaneous linear equation generated by said equation generating means to produce a plurality of fill-ins, respectively; a plurality of fill-in adding means for respectively adding a fill-in generated by the corresponding ILU factorization means to a combined portion of coefficient matrices, in parallel; a plurality of line collection ILU factorization means for respectively ILU-factorizing a corresponding one of several line collections on the combined portion, in parallel; a convergent solution judging means for repeating a series of processing by said equation generating means, said block ILU factorization means, said fill-in adding means, and said line collection ILU factorization means until convergence of a solution in the simultaneous linear equation generated by said equation generating means is reached; an operation repeating means for repeating a series of iteration processing by said equation generating means, said block ILU factorization means, said fill-in adding means, said line collection ILU factorization means, and said convergent solution judging means at the time point decided by said point deciding means until the time point reaches a predetermined final time; and an output means for supplying a series of convergent solutions representing the operation of the electronic circuit over time.