Patent Document ID: 20010010083
Application ID: 09115652
Patent Flag: 0

Claim One:
1. An integrated circuit device comprising: a central processing unit for reading instruction codes and data to be processed and executing data processing tasks based on the read instruction codes and data to be processed; an external bus for being connected to an external information storage medium which stores instruction codes and data to be processed; an inspection information interface for detachable connection to an external circuit inspection device; an inspection control circuit connected to said inspection information interface and having a plurality of registers for temporarily storing instruction codes and data to be processed which are supplied from said external circuit inspection device; and a bus control unit for selectively connecting said external bus and said inspection control circuit to said central processing unit; said bus control unit having an operation mode switchable between a normal mode and an inspection mode, and means for connecting said external bus continuously to said central processing unit in the normal mode and switching a destination to be connected to said central processing unit from said external bus to said inspection control circuit in said inspection mode when the address of an access destination issued by said central processing unit agrees with the predetermined address of one of the registers of said inspection control circuit.