Patent Document ID: 6097886
Application ID: 09024762
Patent Flag: 1

Claim One:
1. A method for designing the architecture of an embedded system, comprising: (a) a pre-processing phase comprising the steps of: (1) parsing one or more task graphs, one or more system/task constraints, and a resource library for the embedded system; and (2) performing task clustering on the one or more task graphs to form one or more clusters for the embedded system, wherein, after each task in a task graph is grouped into a cluster, a critical path for the corresponding task graph is re-determined to account for any changes in the critical path; and (b) a synthesis phase, following the pre-processing phase, comprising the step of allocating the clusters to one or more processing elements (PEs) in the resource library and allocating one or more edges in the tasks graphs to one or more communication links in the resource library, based on performance evaluation of one or more possible allocations for each of the clusters and edges in light of the system/task constraints.