Patent Document ID: 20160005590
Application ID: 14625907
Patent Flag: 0

Claim One:
1. A method of fabricating a semiconductor device, the method comprising: obtaining first raw data by measuring an overlay of a semiconductor wafer of a first lot; generating a regression equation based on the first raw data; aligning a semiconductor wafer of a second lot based on a coefficient of the regression equation; obtaining second raw data by measuring an overlay of the aligned semiconductor wafer of the second lot; and correcting the regression equation based on the second raw data, wherein the correcting of the regression equation includes: dividing the regression equation into an initial equation and a residual equation excluding the initial equation from the regression equation; correcting a coefficient of the initial equation by performing a first regression analysis of the initial equation based on the second raw data; and correcting a coefficient of the residual equation by applying the coefficient of the initial equation to the regression equation and performing a second regression analysis of the regression equation having the coefficient of the initial equation.