Patent Document ID: 20060111884
Application ID: 10993687
Patent Flag: 0

Claim One:
1. A method for simulating a circuit having a hierarchical data structure, comprising: representing the circuit as a hierarchically-arranged set of branches, including a root branch and a plurality of other branches logically organized in a graph; the hierarchically-arranged set of branches including a first branch that includes a first electrical network and a second branch that includes a second electrical network; wherein the first and second branches are interconnected in the graph through a third branch at a higher hierarchical level in the graph than the first and second branches; determining whether the first and second electrical networks are electrically isomorphic networks; if the first and second electrical networks are determined to be electrically isomorphic networks, representing the first and second electrical networks with a single electrically isomorphic network; and simulating the first and second electrical networks using the single electrically isomorphic network.