Patent Document ID: 20140215424
Application ID: 13994882
Patent Flag: 0

Claim One:
1. A method for dynamically assigning coprocessor regions in a Field Programmable Gate Array (FPGA), the method comprising: executing a placement algorithm to determine at least one efficient arrangement of a plurality of coprocessor regions within the FPGA; executing a path finding algorithm to determine one or more path finding operations from a starting arrangement of coprocessor regions to the efficient arrangement of coprocessor regions, each path finding operation comprising: establishing a reconfiguration region of the FPGA, wherein at least one coprocessor region is outside the reconfiguration region, and wherein at least one coprocessor region is inside the reconfiguration region; disabling coprocessors having coprocessor regions in the reconfiguration region while allowing coprocessors having coprocessor regions outside the reconfiguration region to continue to operate; assigning one or more new coprocessor regions in the reconfiguration region; and loading coprocessors in each of the new coprocessor regions; and performing the one or more path finding operations to transition the FPGA from the starting arrangement of coprocessor regions to the efficient arrangement of coprocessor regions.