Patent Document ID: 8884646
Application ID: 14084050
Patent Flag: 1

Claim One:
1. An apparatus comprising: a first plurality of switching elements disposed in one or more signal paths between a first node and a second node of an integrated circuit (IC); a plurality of circuit sub-networks of like kind and measure, wherein the first plurality of switching elements include control inputs for selection among a first plurality of possible combinations of the circuit sub-networks to electrically connect between the first and second nodes, wherein different combinations of the circuit sub-networks have different observable results for at least one electrical characteristic of the IC; and a programmable memory having memory data stored therein, wherein the memory data is associated with a selected state of the control inputs of the first plurality of switching elements, wherein the IC is configured by the memory data to operate with the selected state during operation, wherein the selected state of the control inputs corresponds to a particular combination of the plurality of circuit sub-networks having a reduced variation of the at least one electrical characteristic as compared to at least a second state of the control inputs.