Patent Document ID: 20180075179
Application ID: 15344346
Patent Flag: 0

Claim One:
1. A method for fabricating a transistor meeting a leakage current specification at a plurality of operating temperatures, the method comprising: generating a third function, the third function being a function of a plurality of design parameters, the third function being configured to return a value of a first design parameter, the first design parameter not being one of the plurality of design parameters, the value returned by the third function being a value of the first design parameter for which a modeled leakage current equals the leakage current specification; generating a seventh function, the seventh function being a function of the plurality of design parameters, the seventh function being a model of a minimum, over the operating temperatures of the plurality of operating temperatures, of an effective drive current of the transistor: at a fast-fast process corner; and at a value of the first design parameter for which a modeled leakage current equals the leakage current specification; finding a first set of respective values for the plurality of design parameters for which the seventh function has the greatest value; and fabricating the transistor, the transistor having, as design parameters: the first set of respective values, for the plurality of design parameters; and a value returned by the third function evaluated at the first set of respective values for the plurality of design parameters, for the first design parameter.