Patent Document ID: 20020129298
Application ID: 09904507
Patent Flag: 0

Claim One:
1. A test apparatus of a CPU built-in RAM mixed LSI for self-testing a mixed RAM of a CPU built-in RAM mixed LSI mounted onto a test board using a tester, wherein a ROM in which a self test program for conducting a self test by means of access between a built-in CPU and the mixed RAM of the CPU built-in RAM mixed LSI is previously stored, and a switching unit for switching between a signal from the tester to the CPU built-in RAM mixed LSI and a signal from the ROM to the CPU built-in RAM mixed LSI and inputting the switched signal into predetermined signal terminals of the CPU built-in RAM mixed LSI, are mounted onto the test board; and after the ROM switching unit is switched to a ROM side by using the tester, the self test program is loaded from the ROM into a main memory connected to the built-in CPU so that the self test is conducted.