Patent Document ID: 20090265155
Application ID: 12385777
Patent Flag: 0

Claim One:
1. A method for predicting a reliability of a semiconductor device in which an early-life failure of the semiconductor device is predicted, the method comprising: calculating a defect density for each of wiring patterns; extracting a critical area for each of library elements composed of the wiring patterns based on the defect density for each of the wiring patterns; calculating a critical area value for each of the library elements from the critical area for each of the library elements; calculating an expected value of defect occurrence for each of the wiring patterns from the defect density for each of the wiring patterns; determining a failure probability for each of the wiring patterns from a result of a reliability test for each of the wiring patterns; forming a correlation model from the failure probability for each of the wiring patterns and the expected value of defect occurrence for each of the wiring patterns; calculating a failure probability for each of the library elements from the critical area value for each of the library elements and a function of the correlation model; designing a layout of the semiconductor device with a plurality of the library elements combined together; and calculating a reliability of the semiconductor device based on the failure probability for each of the library elements combined together.