Patent Document ID: 20120316858
Application ID: 13525240
Patent Flag: 0

Claim One:
1. A computer implemented method for implementing parallel execution of an independent parameterized measurement block, comprising: using at least one processor to perform a process, the process comprising: configuring a test fixture; specifying one or more stimuli for the test fixture; performing simulation or emulation upon the test fixture with the independent parameterized measurement block and at least some of the one or more stimuli in parallel by using a loop processing, wherein the act of performing the simulation or emulation by using the loop processing comprises: creating an independent processing environment for each of a plurality of iterates in the loop processing; performing independent parallel iterations of activities for the loop processing to simulate or emulate one or more activities of an electronic circuit over a range of parameter values without using serial looping constructs, wherein either an access to an index variable for the loop processing is removed, or the loop processing is performed without defining the index variable so the loop processing is performed without reference to the index variable during the loop processing; and analyzing results to compute a desired performance metric.