Patent Document ID: 20030154457
Application ID: 10075582
Patent Flag: 0

Claim One:
1. A method of simulating an electrical circuit that can be described by a layout with a multiplicity of cells having the following features: the cells have one or more networks described by geometrical data and subdivided into one or more models of electrical circuit elements; the cells have information about those layers on which the networks are present; the cells have references to further cells; and the method which comprises the following steps: a) extracting node information from a layout; b) determining and recording coupling capacitance values of the networks with isolated consideration of the cells; c) determining and recording environment-dependent coupling capacitance values of the networks for all of the cell entities; d) determining and recording intrinsic capacitance values of the networks for each cell; e) determining and recording intrinsic capacitance values of the networks for all of the cell entities; f) calculating a respective comparison capacitance value for each network with isolated consideration of the cells; g) calculating differential capacitance values of each network with respect to a respective comparison capacitance value for all of the cell entities; h) classifying the cell entities of each cell into different variants for all of the networks by using the differential capacitance values as a basis; and i) simulating a behavior of the electrical circuit using the variants of the cell entities determined in the preceding step.