Patent Document ID: 8249838
Application ID: 12657262
Patent Flag: 1

Claim One:
1. A method for producing a model of a memristor device for facilitating integrated circuit modeling and simulation, comprising the steps of: inputting a periodic signal into a memristor, said periodic signal having a minimum voltage amplitude, a maximum voltage amplitude, and a frequency; measuring and recording said memristor's output current at a plurality of discrete time intervals over at least one period of said periodic signal; plotting said output current versus input voltage over said at least one time period of said periodic signal; plotting said output current versus time over said at least one time period of said periodic signal; determining a high resistance state R on of said memristor from the slope of a high resistance portion of said plotted output current versus said input voltage; determining a low resistance state R off of said memristor from the slope of a low resistance portion of said plotted output current versus said input voltage; determining, from said plotted output current versus said input voltage a low threshold voltage T 1 at which said memristor transitions from a high resistance state to a low resistance state, and a high threshold voltage T h at which said memristor transitions from a low resistance state to a high resistance state; determining from said plot of output current versus time a value of a magnitude fitting parameter K h1 when said input voltage is positive; determining from said plot of output current versus time a value of a curvature fitting parameter K h2 when said input voltage is positive; determining from said plot of output current versus time a value of a magnitude fitting parameter K l1 when said input voltage is negative; determining from said plot of output current versus time a value of a curvature fitting parameter K l2 when said input voltage is negative; and WHEN input voltage V in is greater than said high threshold voltage T h , THEN generating a model of said memristor device according to the expression R mem ⁡ ( t ) = R mem ⁡ ( t - Δ ⁢ ⁢ t ) - Δ ⁢ ⁢ tK h ⁢ ⁢ 1 ⁢ ⅇ K h ⁢ ⁢ 2 ⁡ ( V in ⁡ ( t ) - T h ) ⁢ { if ⁢ ⁢ R mem ⁡ ( t ) < R on else ⁢ ⁢ R mem ⁡ ( t ) = R on WHEN input voltage V in is less than said low threshold voltage T 1 , THEN generating a model of said memristor device according to the expression R mem ⁡ ( t ) = R mem ⁡ ( t - Δ ⁢ ⁢ t ) - Δ ⁢ ⁢ tK l ⁢ ⁢ 1 ⁢ ⅇ K l ⁢ ⁢ 2 ⁡ ( V in ⁡ ( t ) - T l ) ⁢ { if ⁢ ⁢ R mem ⁡ ( t ) > R off else ⁢ ⁢ R mem ⁡ ( t ) = R off where R mem (t) is the resistance of said memristor at time t; R mem (t−Δt) is the resistance of said memristor at time t−Δt: R on is the resistance of said memristor in its high resistance state; R off is the resistance of the memristor in its low resistance state; V in is the voltage input to the memristor; T 1 is the low threshold voltage of said memristor; T h is the high threshold voltage of said memristor: K h1 is the magnitude fitting parameter when said input voltage is positive; K h2 is the curvature fitting parameter when said input voltage is positive; K l1 is the magnitude fitting parameter when said input voltage is negative; K l2 is the curvature fitting parameter when said input voltage is negative; and Δt is the minimum integral time step parameter between successive memristor resistance measurements.