Patent Document ID: 9344146
Application ID: 13793063
Patent Flag: 1

Claim One:
1. A method for facilitating link training for a high-speed link including multiple lanes, comprising: implementing a link training pattern comprising an 11-bit pseudo random bit sequence (PRBS) for each of the multiple lanes; and employing a different 11-bit PRBS polynomial to generate the PRBS for the link training pattern for each lane, wherein the multiple lanes comprise four lanes 0, 1, 2, and 3, and the PRBS polynomials comprise, 1+x 5 +x 6 +x 10 +x 11 for lane 0; 1+x 5 +x 6 +x 9 +x 11 for lane 1; 1+x 4 +x 6 +x 8 +x 11 for lane 2; and 1+x 4 +x 6 +x 7 +x 11 for lane 3.