Patent Document ID: 7698357
Application ID: 11165834
Patent Flag: 1

Claim One:
1. A hardware device for calculating a multiplication of a multiplier and a multiplicand with regard to a modulus using an iteration method comprising several iteration steps, comprising a preceding iteration step, a current iteration step and an iteration step following the current iteration step, comprising: a hardware calculating unit; a first hardware register configured to store the modulus, the first hardware register being coupled to the hardware calculating unit; a second hardware register configured to store the multiplicand, the second hardware register being coupled to the hardware calculating unit; a third hardware register configured to store an intermediate result, the third hardware register being coupled to the hardware calculating unit; wherein the hardware calculating unit is configured to: 1) perform an exact three operand addition in the preceding iteration step using a preceding intermediate result, the modulus and the multiplicand and using preceding look-ahead parameters to obtain an exact intermediate result for the current iteration step; 2) perform an approximated operand addition in the preceding iteration step using the preceding intermediate result and the modulus and at least one look-ahead parameter of the preceding look-ahead parameters in order to obtain an approximated intermediate result for the current iteration step; and 3) calculate current look-ahead parameters in the preceding iteration step using the approximated intermediate result and the multiplier, 4) perform an exact three operand addition in the current iteration step using the exact intermediate result for the current iteration step, the modulus, the multiplicand and the current look-ahead parameters calculated by the calculator, 5) perform an approximated operand addition in the current iteration step using the current intermediate result and the modulus and at least one look-ahead parameter of the current look-ahead parameters to obtain an approximated intermediate result for the iteration step following the current iteration step; and 6) obtain look-ahead parameters in the current iteration step for the iteration step following the current iteration step using the approximated intermediate result for the iteration step following the current iteration step and the multiplier, wherein the first and second steps are performed in parallel, and the fourth and fifth steps are performed in parallel, wherein the multiplication of the multiplier and the multiplicand with regard to the modulus is calculated within a cryptographic calculation, and wherein the multiplier, the multiplicand and the modulus are parameters of the cryptographic calculation.