Patent Document ID: 7920992
Application ID: 11370711
Patent Flag: 1

Claim One:
1. A computer implemented method for determining uncertainties in integrated circuits, systems and fabrication processes, comprising: defining by a computer system an interval representation for each uncertain component or parameter in a circuit or system; defining by the computer system a set of arithmetical interval operations, wherein the interval representation includes a basic affine interval and two enforced bounds asymmetric around a central point, the enforced bounds for an output of any arithmetic interval operation depending upon the two enforced bounds and the affine interval of at least one operand of the arithmetic interval operation; replacing scalar operations with interval operations in an algorithm; discontinuing interval operations in the algorithm in response to a predetermined condition; generating by the computer system a plurality of scalar samples from a plurality of intervals; and determining by the computer system a distribution of each uncertain component or parameter from the plurality of scalar samples of the intervals.