Patent Document ID: 5430390
Application ID: 08245309
Patent Flag: 1

Claim One:
1. A universal combinatorial logic module including: a first multiplexer having a first data input, a second data input, a select input, and an output; a second multiplexer having a first data input, a second data input, a select input, and an output; a third multiplexer having a first data input connected to the output of said first multiplexer, a second data input connected to the output of said second multiplexer, a select input, and an output; first means for performing a logic function, said first means having a first data input, a second data input, and a single output, said single output being connected to the select input of said first multiplexer, said first means comprising a first logic level and a second logic level; and second means for performing a logic function, said second means having a first data input, a second data input, and a single output, said single output being connected to the select input of said third multiplexer, said second means comprising a first logic level and a second logic level.