Patent Document ID: 5555270
Application ID: 08403332
Patent Flag: 1

Claim One:
1. A method for measuring an I/O Sequence Distinctness Measurement (DM) for an I/O Sequence associated with model state transitions in a Finite State Machine (FSM) model, the I/O Sequence being used in constructing a Verification Test Sequence (VTS) to test a Machine Under Test (MUT) for conformance against the FSM model, wherein: said FSM model has a plurality of Model States (ST) and a plurality of State Transitions (TR), each of the plurality of State Transitions (TR) is located between a First Model State (ST) and a Second Model State (ST) in the FSM model, each of the plurality of State Transitions (TR) has a corresponding I/O Sequence, and each I/O Sequence includes an Input Stimulus and an Output Response, said method comprising the steps of: (a) identifying all members of an Identified State Transition (TR) Set, wherein: each member of the Identified State Transition (TR) Set is an Identified State Transition (TR) Set Member, and all Identified State Transition (TR) Set Members are State Transitions (TR); (b) identifying all members of an Identified I/O Sequence Set, wherein: each member of the Identified I/O Sequence Set is an Identified I/O Sequence Set Member, each member of the Identified I/O Sequence Set is different from each other member of the Identified I/O Sequence Set, and the I/O Sequence corresponding to each Identified TR Set Member is equal to one member of the Identified I/O Sequence Set; (c) selecting one member of the Identified I/O Sequence Set as a Selected I/O Sequence; (d) identifying each member of a First Identified State Transition (TR) Subset, wherein: each member of the First Identified State Transition (TR) Subset is a First Identified State Transition (TR) Subset Member, said First identified State Transition (TR) Subset contains at least one First Identified TR Subset Member, each First Identified State Transition (TR) Subset Member is one of the Identified TR Set Members, the I/O Sequence corresponding to each First Identified State Transition (TR) Subset Member is equal to the Selected I/O Sequence, and all Identified State Transition (TR) Set Members with corresponding I/O Sequences equal to the Selected I/O Sequence are First Identified State Transition (TR) Subset Members; (e) providing control signals to direct a computer processor to calculate an I/O Sequence Distinctness Count by counting the First Identified State Transition (TR) Subset Members; (f) providing control signals to direct the computer processor to calculate the I/O Sequence Distinctness Measurement (DM) by applying a transformation to the I/O Sequence Distinctness Count; (g) providing said I/O Sequence Distinctness Measurement (DM) for storage in a memory; (h) associating the I/O Sequence Distinctness Measurement (DM) with every one of the First Identified State Transition (TR) Subset Members; (i) repeating steps (c)-(h) until each Identified I/O Sequence Set Member has been selected one time; and (j) utilizing at least one said I/O Sequence Distinctness Measurement (DM) in the generation of the Verification Test Sequence (VTS).