Patent Document ID: 5483620
Application ID: 08401330
Patent Flag: 1

Claim One:
1. A computer system apparatus having a neural synapse processor architecture comprising: a N neuron structure, where N is an integer greater than or equal to one, including a plurality of synapse processing units, a subset of which comprise input synapse processing units, including means for storing instructions and data, means for receiving said instructions and data coupled to said means for storing instructions and data, and means for executing said instructions coupled to said means for storing instructions and data; said N neuron structure further including communicating adder trees coupled to outputs of said synapse processing units, and neuron activation function units coupled to the communicating adder trees for generating neuron outputs; said communicating adder trees each including means for communicating said instructions, data, and said neuron outputs back to said input synapse processing units through said communicating adder trees; the N neuron structure including N.sup.2 synapse processing units, each of said processing units associated with a connection weight in a N neuron network to be emulated by the apparatus, said processing units placed in a form of a N by N matrix wherein symmetric synapse processing units are coupled to form general cells and the remaining synapse processing units form diagonal cells; said diagonal cells each include one said synapse processing unit and are associated with diagonal connection weights of the folded N by N matrix, and wherein said general cells each include a top synapse processing unit and a bottom synapse processing unit and are associated with symmetric connection weights of the folded N by N matrix; and means for directing instructions received from a top communicating adder tree to a bottom synapse processing unit's instruction storage unit and instructions received from a bottom communicating adder tree to a top synapse processing unit's instruction storage unit and data received from the top communicating adder tree to a bottom synapse processing unit's specified data storage unit and data received from a bottom communicating adder tree to a top synapse processing unit's specified data storage unit.