Patent Document ID: 20150074028
Application ID: 14176490
Patent Flag: 0

Claim One:
1. A processing device configured to process input data formed of a plurality of input digital values, the processing device comprising: a plurality of computation layers connected in series, each of the computation layers comprising a plurality of computation devices, wherein each of the plurality of computation devices in the computation layer of a first stage is configured to generate a digital value from the input digital values and weight coefficients defined in advance, the weight coefficients being applied to each of the input digital values, each of the plurality of computation devices of the computation layer of a second or subsequent stage is configured to generate a new digital value from the digital values generated by the computation devices of the computation layer of the previous stage and weight coefficients defined in advance, the weight coefficients being applied each of the digital values, the digital values generated by the computation devices of the computation layer of a final stage indicate an processing result, and at least one of the computation devices comprises: a plurality of digital-to-time conversion circuits connected in series, each of the plurality of digital-to-time conversion circuits generating a second time signal by delaying a first time signal by a time corresponding to an inputted digital value and the weight coefficient corresponding to the digital value, and the second time signal being inputted into the digital-to-time conversion circuit of a subsequent stage as the first time signal; and a time-to-digital conversion circuit configured to generate a digital signal by comparing the second time signal outputted from the digital-to-time conversion circuit of the final stage and a first time threshold signal.