Patent Document ID: 5495593
Application ID: 08254656
Patent Flag: 1

Claim One:
1. A data processing device implemented in a common integrated circuit which is programmable by way of a separate host computer, said device including: a central processing unit; a data bus associated with said central processing unit; communication port means for providing a communication channel between the host computer and said central processing unit, with the communication channel carrying commands originating from the host computer, said commands including write data information and write address information; a programmable nonvolatile first memory for storing application code to be processed by said central processing unit and which is coupled to said data bus, with said application code capable of being stored in the nonvolatile first memory within a range of nonvolatile first memory addresses; and control means, separate from said nonvolatile first memory, and including a control nonvolatile second memory in which a control program is stored, with the control means being a means for causing said central processing unit to execute the control program, with the central processing unit functioninq during execution of the control program to write data into the nonvolatile first memory based upon the command write data information of one of said commands received by the central processing unit at an address based upon the command write address information of one of said commands received by the central processing unit; whereby any selected address of the nonvolatile first memory can be programmed by way of said host computer with selected data.