Patent Document ID: 5467291
Application ID: 07802993
Patent Flag: 1

Claim One:
1. A modeling method for an active semiconductor device, comprising the steps of: providing dynamic equations which define a model of an active semiconductor device for a nonlinear circuit simulator, in terms of functions to be calculated from measured response data and a frequency parameter .omega..sub.t to be specified during simulation; providing branch equations for voltage re-referencing to the dynamic equations which define a large-signal model of the active semiconductor device for the nonlinear circuit simulator, defined in terms of functions to be measured; providing a measurement system for generating stimuli and measuring responses to applied stimuli; measuring series port resistances of the measurement system; connecting terminals of the active semiconductor device to the measurement system; measuring S-parameters versus frequency at the terminals of the active semiconductor device with the measurement system; calculating parasitic device resistances and parasitic device inductances for the active semiconductor device; measuring S-parameters versus applied, measured controlling bias voltages at at least one frequency and d.c. terminal transfer curves versus applied biases over a predetermined operating range of biases of the active semiconductor device with the measurement system; calculating an intrinsic Y-matrix of the active semiconductor device by linear de-embedding of the parasitic device resistances and inductances previously calculated; calculating state functions for the large-signal model, referenced to an applied, measured voltage space defined by the applied, measured controlling bias voltages; and writing a model file, containing tabulated state function values, measurement series port resistances, and calculated parasitic values.