Patent Document ID: 6166960
Application ID: 09405450
Patent Flag: 1

Claim One:
1. An electronic system having an electrically erasable programmable read only memory (EEPROM), said system comprising: a processor; an analog-to-digital converter (ADC); an EEPROM; EEPROM programming logic; and a charge pump for generating an EEPROM programming voltage; wherein the EEPROM programming voltage generated by said charge pump is converted from an analog value to a digital value by said ADC and the digital value of the EEPROM programming voltage is read by said processor to determine if the digital value is equal to or greater than a desired value; whereby, if the generated EEPROM programming voltage is equal to or greater than the desired value then said EEPROM programming logic is enabled to perform a programming operation on said EEPROM; and if the generated EEPROM programming voltage is less than the desired value then said EEPROM programming logic is inhibited from performing a programming operation on said EEPROM.