Patent Document ID: 9152691
Application ID: 14692477
Patent Flag: 1

Claim One:
1. A system comprising: a processor and a non-transitory memory comprising program logic, the program logic comprising: a value transformer that is configured to transform input variables into transformed values; an initial sketch generator that is configured to generate a plurality of sketches based on the transformed values, wherein each of the plurality of sketches is based on a different set of transformed values; a sketch operator that is configured to: identify a first minimum value in a first sketch of the plurality of sketches; identify a second minimum value in a second sketch of the plurality of sketches; determine that the second minimum is less than or equal to the first minimum; remove, from the second sketch, one or more transformed values that are less than or equal to the first minimum, to generate a second modified sketch; perform a set operation on the first sketch and the second modified sketch to generate a third sketch that is different than the first sketch, the second sketch, and the second modified sketch.