Patent Document ID: 8156289
Application ID: 12131974
Patent Flag: 1

Claim One:
1. A machine implemented system that effectuates utilization of fine-grained concurrency in parallel processing and efficient management of established memory structures, comprising: a general purpose memory that retains instructions related to initializing the general purpose memory to establish a memory structure, associating the memory structure with a first processor that is a member of a processor complex, utilizing an enqueue at head operation to add work descriptors to the memory structure associated with the first processor, based at least in part on a policy that utilizes at least a low watermark, the first processor utilizes a dequeue at tail operation to retrieve work descriptors from a second memory structure associated with a second processor that is a member of the processor complex, and based at least in part on the policy that employs at least a high watermark, the first processor initiates an enqueue at tail operation to transfer work descriptors from the memory structure associated with the first processor to the second memory structure associated with the second processor; and a processor, coupled to the general purpose memory, configured to execute the instructions retained in the general purpose memory.