Patent Document ID: 10164560
Application ID: 14762298
Patent Flag: 1

Claim One:
1. A modelling method for a memory sensor model of a switch reluctance motor, the method comprising: utilizing a hardware circuit comprising two current conveyors AD844, an operational amplifier AD826, and a memory resistor that are in operable communication with each other, wherein the terminal voltage of the input ports A-B of the memory sensor is U 1 , and the current flowing into the memory sensor from the input port A thereof is i 1 ; connecting the input port A of the memory sensor with an in-phase input port ( 3 ) of the current conveyor AD844-1 that is in turn connected with a port ( 5 ) of the current conveyor AD844-2; connecting an out-phase input port ( 2 ) of the current conveyor AD844-1 with one end of a resistor R i , the other end of which is connected with the ground; connecting the port ( 5 ) of the current conveyor AD844-1 with one end of a capacitor C i , the other end of which is connected with the ground; connecting the out-phase input port ( 2 ) of the current conveyor AD844-2 with one end of a resistor R x , the other end of which is connected with the ground; connecting the input port B of the memory sensor with the ground; connecting the output port ( 6 ) of the current conveyor AD844-1 with one end of a memory resistor R M , the other end of which is connected with the out-phase input port ( 2 ) of the operational amplifier AD826, wherein U 2 is a voltage drop on the memory resistor, and i 2 is a current in the memory resistor; connecting the out-phase input port ( 2 ) of the operational amplifier AD826 with one end of a resistor R d , the other end of which is connected with an output port ( 1 ) of the operational amplifier AD826; connecting the output port ( 1 ) of the operational amplifier AD826 with an in-phase input port ( 3 ) of the current conveyor AD844-2; connecting the in-phase input port ( 3 ) of the operational amplifier AD826 with the ground; and obtaining a memory sensor circuit model at the input ports A-B of the memory sensor, wherein the equivalent inductance L of the memory sensor circuit model is expressed as: L = C i ⁢ R i ⁢ R M ⁢ R x R d .