Patent Document ID: 20080133201
Application ID: 11795511
Patent Flag: 0

Claim One:
1. Simulation method of an electronic circuit or a printed circuit, represented in the form of masks and connections, comprising: a) the definition of, on one hand, inputs and outputs of circuit networks, and, on the other, internal components of each network, b) the formation of a reduced model of each network comprising: b1)•the formation of a conductance or resistance matrix, along with a capacitance, or susceptance, or susceptance and inductance, or susceptance, inductance and reluctance matrix of these inputs and internal components of the network, b2)•the reduction of the conductance or resistance matrix of the internal components, along with the capacitance, or susceptance, or susceptance and inductance, or susceptance, inductance and reluctance matrix of said internal components, c) the simulation of the network using this reduced, digital model, d) in the event of an unsatisfactory simulation result, the modification of part of the masks and/or connections of one or more networks, the formation of a second reduced model, and the simulation with said new reduced model, e) in the event of a satisfactory simulation result, the production of the circuit.