Patent Document ID: 20140266348
Application ID: 14205225
Patent Flag: 0

Claim One:
1. A method for operating a data interface circuit where a calibration controller controls both a mission path and a reference path that each capture a common data bit value, and wherein the mission path operates in conjunction with operation of a functional circuit, the method comprising: performing a first calibration operation for both reference and mission paths to establish optimal delay settings for each path, and determining a delta value between the optimal delay settings for the reference and mission paths; operating the data interface circuit including operation of the mission path to capture read data during a functional operation; from time to time and without interfering with operation of the functional circuit and the mission path, performing an additional calibration of the reference path to determine a new optimal delay setting for the reference path; if the new optimal delay setting for the reference data path differs from a previous delay setting by an amount greater than a change threshold value, setting the delay setting for the mission path to be equal to the new optimal delay setting for the reference path adjusted by the delta value; wherein each of the reference and mission paths include at least one programmable DLL controlled by the calibration controller; and wherein the mission path performs data capture solely for the functional circuit, and the reference path performs data capture solely for calibration purposes.