Patent Document ID: 5506852
Application ID: 08210122
Patent Flag: 1

Claim One:
1. A method of testing a VLSI circuit having p primary inputs and t outputs for defects comprising the steps of: forming a test vector by initializing each primary input to an initial value between 0 and 1; computing an approximate gradient .DELTA..sub.k F.sub.c /.DELTA.x.sub.k for the primary input values; determining a local optimum gradient direction and the distance along the gradient for determining new primary input values, and if a local optimum gradient does not result in setting each primary input value within a predetermined range of a discrete value, recompute an approximate gradient for the new primary input values and determine a local optimum gradient direction and distance along the gradient, or if a local optimum gradient is found resulting in each primary input value within a predetermined range of 0 or 1, rounding each respective primary input to the discrete value 0 or 1 to which the primary input value is within the predetermined range as values of the test vector; forming a test vector from the values for the primary inputs set to the discrete value; applying the formed test vector to the primary inputs of the VLSI circuit under test; and monitoring the outputs of the circuit to determine the presence or absence of any defect in the VLSI circuit under test.