Patent Document ID: 9098619
Application ID: 12949596
Patent Flag: 1

Claim One:
1. A method for automated error detection and verification of software, the method comprising: providing a model of the software, the model comprising one or more model inputs and one or more model outputs, and a plurality of blocks embedded within the model each with an associated block type, the block types each having a plurality of associated block-level requirements; topologically propagating from the model inputs, a range of signal values or variable values, and error bounds, across computational semantics of all the blocks to the model outputs with implementation-independent and implementation-dependent type information; identifying and examining each behavior pivot value for a given block to determine if modifying or extending the propagated range by the error bound will or may cause a signal value to fall on either side of the behavioral pivot value; and reporting all occurrences of the signal value that will or may fall on either side of the behavioral pivot value.