Patent Document ID: 20150302126
Application ID: 14689596
Patent Flag: 0

Claim One:
1. A method comprising: receiving a file describing a system-on-a-chip (SoC); parsing the file to determine one or more functions to be performed by one or more hardware components of the SoC, wherein the SoC is fabricated on a chip; receiving a desired output of the SoC; and generating a test scenario model based on the desired output of the SoC and the functions to be performed, the test scenario model including one or more module representations of the functions, the test scenario further including one or more connections between two of the module representations, each connection providing a direction of flow of data between the two module representations, wherein the desired output acts as a performance constraint for the test scenario model, the test scenario model further including an input of the SoC that is generated based on the desired output, the module representations, and the one or more connections, the test scenario model including a path from the input via the module representations and the connections to the desired output, wherein the method is executed by a processor.