Patent Document ID: 8015513
Application ID: 12130636
Patent Flag: 1

Claim One:
1. A method of forming an integrated circuit (IC), the method comprising the steps of: generating scalable two-dimensional (2D) optical proximity correction (OPC) model, including the steps of: laying out 2D test patterns of basic features occurring in IC layouts, wherein the 2D test pattern includes: a set of sloped lines with a plurality of slope angles; a set of curved lines with a plurality of curvatures; a set of necked lines with a plurality of neck widths; a set of right angle lines with a plurality of leg extension lengths; and a set of tee structures with a plurality of cross-member extension lengths; and generating the OPC model from measured contours of printed and etched features of the 2D test patterns; generating a reticle pattern file using the scalable 2D OPC model; generating a reticle using the reticle pattern file; and forming an IC using the reticle.