Patent Document ID: 5559502
Application ID: 08216192
Patent Flag: 1

Claim One:
1. A communication bus system having an extended addressability feature, comprising: a single clock wire and a single data wire each including logic means for enabling said wires to each assume a particular second voltage value and to enable each wire to be forced to a first voltage value; a plurality of stations interconnected by said clock wire and said data wire, wherein at least one of said stations includes means for forcing each of said wires to their respective first voltage values and means for allowing each of said wires to assume their respective second voltage values, and wherein a master station is one of said stations which has gained priority to said data wire for initiating transfer of information on said data wire, said system being arranged for transferring information between said stations on said data wire under the synchronization of the voltage levels of said clock wire, and wherein each of said stations is addressable by one of (i) a long-format slave address and (ii) a short-format slave address; arbitration means for selecting one of said stations as a master station upon more than one of said stations attempting to provide information on said data wire at the same time; said master station having protocol means for generating information on said data wire in synchronization with the voltage level of said clock wire, said master station further including message formatting means for enabling said master station to produce in an initial byte of information one of a) a short-format address and b)(i) a control signal indicating a forthcoming long-format address and (ii) a first significant portion of the long-format address, and if the control signal is present in the initial byte of data then in a second byte of data said message formatting means producing a second significant portion of the long-format address such that said master station does not address a station having a short-format address when addressing a station having a long-format address thereby enabling stations having both short-format and long-format addresses to communicate in said system.