Patent Document ID: 8774400
Application ID: 11969106
Patent Flag: 1

Claim One:
1. A system comprising: at least one processor: a memory communicatively coupled to the at least one processor, the memory having stored therein computer-executable instructions configured to implement the operating system including: a cryptographic component configured to employ a Rivest, Shamir, and Adleman cryptographic technique and a Chinese Remainder Theorem to facilitate modular exponentiation of a received message, wherein the cryptographic component is further configured to perform a first modular exponentiation and a second modular exponentiation of the received message, perform a Chinese Remainder Theorem calculation on the first modular exponentiation and the second modular exponentiation to recombine the first modular exponentiation and the second modular exponentiation to generate a result, calculate a first sub-exponent as an inverse function of a first exponent and a second sub-exponent as an inverse function of a second exponent, perform a first modular sub-exponentiation as a function of the first sub-exponent and the result, and perform a second modular sub-exponentiation as a function of the second sub-exponent and the result, and perform a Chinese Remainder Theorem calculation on the first modular sub-exponentiation and the second modular sub-exponentiation to recombine the first sub-exponent and the sub-exponent to generate a sub-result; and a verification component configured to compare the sub-result to the message to determine whether the sub-result matches the received message, present the result as an output if the sub-result equals the received message and present an error message as an output if the sub-result is not equal to the received message.