Patent Document ID: 8850437
Application ID: 13290299
Patent Flag: 1

Claim One:
1. A method for two-pass scheduling of a plurality of tasks, comprising the steps of: (A) assigning each of said tasks to a corresponding one or more of a plurality of processors in a first pass through said tasks using a circuit, wherein (i) said first pass is non-iterative and (ii) at least one of said tasks is assigned to run on two or more of said processors in parallel; (B) reassigning said tasks among said processors to shorten a respective load on one or more of said processors in a second pass through said tasks, wherein said second pass (i) is non-iterative and (ii) begins after said first pass has completed; and (C) generating a schedule in response to said assigning and said reassigning, wherein said schedule maps said tasks to said processors, wherein said reassigning of said tasks in said second pass changes at least one of said tasks from being mapped to a single one of said processors to being mapped to at least two of said processors.