Patent Document ID: 7650587
Application ID: 11564957
Patent Flag: 1

Claim One:
1. A method for making a mask which mask is used to fabricate an integrated circuit device, comprising the steps of: providing a design layout comprising an arrangement of a plurality of instances of a hierarchical design unit of shapes that include uncolored shapes to be colored, said design layout is selected from the group consisting of an alternating phase shift mask design, a double-exposure mask design and a double-exposure-etch mask design; verifying that said design layout has a clean coloring solution by globally coloring said design layout to form global coloring information prior to locally coloring; reconfiguring said design layout into sub-processing units each including a subset of said shapes; locally coloring said subset of shapes within said sub-processing units to form a locally colored design unit; performing optical proximity correction (OPC) on said locally colored design unit to form an OPC-modified design unit; discarding said local coloring of said OPC-modified design unit to form an uncolored OPC-modified hierarchical design unit; arranging said uncolored OPC-modified hierarchical design unit to form a modified design layout in accordance with said arrangement; globally coloring said modified design layout in accordance with said global coloring information; and making a mask comprising said modified design layout.