Patent Document ID: RE35311
Application ID: 08292606
Patent Flag: 1

Claim One:
1. In a computer architected for serial execution of a sequence of single scalar instructions in a succession of execution cycles, an apparatus for supporting parallel execution of a plurality of scalar instructions in a single instruction cycle, the apptratus comprising: an instruction means for receiving a plurality of scalar instructions, a first of the scalar instructions producing a calculation result used as an operand by a second of the scalar instructions; an operand means for substantially simultaneously providing a plurality of operands, at least two of said operands being used by the first and second scalar instructions; a control means connected to the instruction means for generating control signals to indicate operations which execute the plurality of scalar instructions; and an execution means connected to the operand means and to the control means and responsive to the control signals and to a plurality of operands including the two operands for producing, in a single execution cycle, a single result corresponding to the performance of said operations on said plurality of operands.