Patent Document ID: 20160180000
Application ID: 14574519
Patent Flag: 0

Claim One:
1. A method of non-invasive insertion of logic functions into a register-transfer level (‘RTL’) design, the method comprising: selecting a logic function to insert into an RTL design; identifying a connection, used to execute the logic function, between two or more components in the RTL design, wherein the connection is between an electronic component in a first hierarchical level and an electronic component in a second hierarchical level, wherein the first hierarchical level and the second hierarchical level are separated by one or more hierarchical levels that do not directly include electronic components that participate in executing at least a portion of the logic function; identifying a target hierarchical level for inserting a hierarchical reference defining the connection; and inserting the hierarchical reference defining the connection into a hardware description representation of the target hierarchical level, without modifying a hardware description representation of any other hierarchical levels.