Patent Document ID: 4038534
Application ID: 05553834
Patent Flag: 1

Claim One:
1. A system for testing operation of a digital computing circuit of the type in which input data in the form of an input pulse train is supplied to the circuit input and pulses are added to or removed from the input pulse train according to a relationship characteristic of said digital computing circuit so that the resulting output pulse train supplied to the circuit output is representative of the application of said characteristic relationship to the input data comprising: a. first and second counters; b. electrical circuit means for providing the input pulse train to said first counter and the output pulse train to said second counter so that the count accumulated by the first counter represents the number of pulses in the input pulse train during the counting interval for the first counter and the count accumulated by the second counter represents the number of pulses in the output pulse train during the counting interval for the second counter; c. grating means actuatable for simultaneously starting the counting operation of said first and second counters; and d. display means for displaying the accumulated counts in said first and second counters.