Patent Document ID: 5506801
Application ID: 08196295
Patent Flag: 1

Claim One:
1. A parallel analog processor for data compression, comprising: (a) an array of processor cells having N columns and M rows, each of said processor cells comprising, (a1) an input for inputting one of M components making up an input vector, (a2) memory means for providing one of M components making up one of N codebook vectors, and, (a3) processor means connected to the input and memory means for comparing an input vector component to a codebook vector component, and for outputting from an output of the processor cell a signal representative of the closeness between the compared vector components, and wherein, (a4) the inputs of each row of processor cells are connected together; (b) combination means for combining the signal output from each processor cell in each column of M processor cells and for outputting a combined signal for each column of processor cells; and, (c) closeness determination means for determining which codebook vector is closest to the input vector from the combined signals output by the combination means, and for outputting a codebook vector index indicating which of the N codebook vectors was the closest to the input vector.