Patent Document ID: 20120130654
Application ID: 13298210
Patent Flag: 0

Claim One:
1. A method of compensating for manufacturing variability of an integrated circuit (IC), the method comprising: during test of the IC using test equipment, measuring at least one electrical characteristic for each of a plurality of selected configurations of an electrical circuit of the IC over a plurality of operating conditions, wherein the IC comprises a plurality of sub-networks of like kind and measure, and wherein each of the plurality of selected configurations is associated with a different combination of the sub-networks, the selected configurations comprising at least a portion of all possible combinations of the sub-networks; choosing a particular combination of the sub-networks having a desirable characteristic for the at least one electrical characteristic across at least two or more operating conditions of the plurality of operating conditions; and in a programmable memory, storing data corresponding to the chosen combination such that an end-user of the IC uses the chosen combination.