Patent Document ID: 20150012896
Application ID: 13936910
Patent Flag: 0

Claim One:
1. A method for fabricating an integrated circuit comprising: generating a photomask for forming a DSA directing pattern on a semiconductor substrate, wherein the DSA directing pattern is configured to guide a self-assembly material deposited thereon that undergoes directed self-assembly (DSA) to form a DSA pattern, and wherein generating the photomask comprises: using a computing system, inputting a DSA target pattern; and using the computing system, a DSA model, an optical proximity correction (OPC) model, and a mask process/proximity correction (MPC) model, cooperatively running a DSA proximity correction (PC) algorithm, an OPC algorithm, and a MPC algorithm to produce an output MPCed pattern for a mask writer to write on the photomask, wherein using the DSA, OPC, and MPC models comprise running the DSA PC algorithm, the OPC algorithm, and the MPC algorithm sequentially in the order given to define a decoupled global flow sequence in which an output of each of the DSA PC and OPC algorithms is an input to a next algorithm in the decoupled global flow sequence with the MPC algorithm outputting the output MPCed pattern.