Patent Document ID: 5475795
Application ID: 07966028
Patent Flag: 1

Claim One:
1. A device for use in a neural processing network, comprising a memory having a plurality of storage locations at each of which a number representing a probability is stored; means for selectively addressing each storage location of said plurality of storage locations as an addressed storage location to cause the contents of the addressed storage location to be written to a comparator; a noise generator for inputting to the comparator a random number representing noise; means for causing to appear at an output of the comparator an output signal having a first or second value depending on the values of the numbers received from the addressed storage location and the noise generator, the probability of the output signal having a given one of the first and second values being determined by the number at the addressed storage location; and a plurality of trace counters each corresponding to a respective one of the storage locations, said trace counters each having contents that are subject to an increment on each occasion when both the corresponding storage location is accessed and the output signal of the comparator has the first value, the addressed storage locations storing values of numbers that are increased or decreased in dependence on the contents of said trace counters.