Patent Document ID: 9910953
Application ID: 14356551
Patent Flag: 1

Claim One:
1. An in-die metrology method comprising: identifying, with one or more processors, one or more candidate device structures from a plurality of device structures within a designed sample layout as candidate device metrology targets, wherein the one or more candidate device metrology targets satisfy one or more metrology design rules, wherein the one or more candidate device metrology targets are located within a die of the designed sample layout; determining, with one or more processors, one or more predicted metrology signals by simulating metrology measurements of the one or more candidate device metrology targets with at least one selected configuration of a metrology tool; filtering, with one or more processors, the one or more candidate device metrology targets to select one or more device metrology targets based on the one or more predicted metrology signals; and providing the one or more device metrology targets to the metrology tool for metrology measurements of the one or more device metrology targets on at least one sample produced according to the designed sample layout.