Patent Document ID: 20030131325
Application ID: 10210509
Patent Flag: 0

Claim One:
1. A method for facilitating debugging of a fabricated integrated circuit, said method comprising: (a) receiving a high level hardware description language (HDL) description or a representation derived therefrom for electronic circuitry to be produced within the fabricated integrated circuit; (b) displaying the high level HDL description for the electronic circuitry on a display device associated with a user; (c) determining aspects of the electronic circuitry to be examined or modified during debugging of the fabricated integrated circuit, said determining (c) operates to determine the aspects of the electronic circuitry through selections made with respect to the high level HDL description for the electronic circuitry; (d) displaying, on the display device, a visual indication of the selections that have been made with respect to the high level HDL description for the electronic circuitry; (e) determining design instrumentation circuitry based on the aspects of the electronic circuitry determined to be examined or modified; and (f) incorporating the design instrumentation circuitry into the electronic circuitry, thereby facilitating debugging of the fabricated integrated circuit.