Patent Document ID: 20070162788
Application ID: 10596856
Patent Flag: 0

Claim One:
1. A system for determining a bit error rate in a digital communication system, comprising: a transmitting station; a receiving station having a decoder; the transmitting station arranged for transmitting a bit sequence to a receiving station; the receiving station arranged for receiving the bit sequences; the decoder arranged for decoding one or more bits out of the received bit sequence; a plurality of look-up tables arranged for containing predetermined bit error rates related to ranges of soft output values; a quantizer being arranged for quantizing the received bit, a switch being arranged for selecting an outputs representing a Bit error Rate contribution, of one of the look up tables out of the plurality of look up tables, the selection being based on the quantized bit; a soft-output of the decoder being arranged as an index to the plurality of look up tables for retrieving a bit-wise bit error rate contribution to the bit error rate of a received bit sequence; and a summing and scaling device being arranged for accumulating and averaging the bit-wise BER.