Patent Document ID: 20100269077
Application ID: 12425095
Patent Flag: 0

Claim One:
1. A method, performed by execution of instructions loaded into a computer system, of identifying trace-containment over sequential circuitry design netlists n 1 and n 2 by using constraint-based uncorrelated equivalence checking, the method comprising: obtaining, by the execution of said instructions, candidate input sets i 1 and i 2 of the netlists n 1 and n 2 ; uncorrelating, by the execution of said instructions, the input set i 1 from the input set i 2 ; checking equivalence of the netlists n 1 and n 2 by the execution of said instructions to identify trace-containment; identifying, by the execution of said instructions, a mismatch between the netlists n 1 and n 2 ; and imposing, by the execution of said instructions, at least one constraint to avoid said mismatch.