Patent Document ID: 7711526
Application ID: 10891083
Patent Flag: 1

Claim One:
1. A simulation system, comprising a transistor characteristics calculation section calculating, from predetermined model equations, characteristics of a transistor including a gate section, a source section, and a drain section, the transistor having a drain current between the source section and the drain section controllable with a gate voltage applied to the gate section, the transistor including regions of mutually different impurity concentrations below the gate section providing a path for the drain current, wherein: one of the model equations represents a resistance between a source section electrode and a drain section electrode and has terms associated with each of the regions and representing resistance values of the regions; at least two of the terms each have a threshold parameter indicating a transition voltage at which a semiconductor element including the associated region and regions adjacent to the associated region changes from a first state where the element exhibits a lower conductance than a second state that a resistance of the associated region varies exponentially with the gate voltage to the second state where the element exhibits a higher conductance than the first state; the threshold parameters of the terms are specified independently from each other; the threshold parameter is included in the terms corresponding respectively to a region as a primary factor of resistance variations between the source section electrode and the drain section electrode of the transistor and to the other regions; and 
 the model equation is Vd/Id=fj+Σ[γ i /( Vg−Vt i )]+ R where Vd is a voltage between the source section electrode and the drain section electrode, Id is a current between the source section electrode and the drain section electrode, Vg is a voltage between a gate section electrode and the source section electrode, and R is a resistance of the source section and the drain section which are not below the gate section, and wherein the regions comprise n regions A identified with an index i running from 1 to n, L i is a length of one of the regions, A i , in a source-drain direction, W i is a width, μ i is a moving carrier mobility, Cox i is an oxide film capacitance density, γ i =L i /(W i ·μ i ·Cox i ), Vt i is a threshold parameter, fj is a function representing resistance characteristics of one of the regions, A j , which is a primary factor of resistance variations between the source section electrode and the drain section electrode, and Σ is a summation symbol with an index i from 1 to n, except for i=j, and wherein the characteristics of the transistor which are calculated from the model equations are outputted by an output section of the simulation system to a display where the characteristics of the transistor are displayed on the display.