Patent Document ID: 4755963
Application ID: 06851234
Patent Flag: 1

Claim One:
1. A highly parallel circuit for developing N simultaneous output signals which minimize an energy function that is characterized by said output signals in terms of products of different ones of said output signals, including product terms of degree greater than two, comprising: a plurality of M amplifiers where M is a number that is greater than the number N by the number of terms in said energy function whose order is greater than two, where each of said amplifiers, designated by a unique pair of indices i and j, comprises an input port and an output port that develops an output signal V.sub.ij,; and a feedback conductance matrix connecting the output of each of said amplifiers to the input of each of said amplifiers, forming M.sup.2 connections, with each of said connections being effected through a conductance T.sub.ijkl ; where each said conductance T.sub.ijkl connects the output of the amplifier designated by indices ij to the input of the amplifier designated by indices kl, spanning the range of indices i and j, with conductance values which are linear combinations of .lambda..sub.x and .delta..sub.z.sup.y terms, where .lambda..sub.x are predetermined penalty constants identified by index x and .delta..sub.z.sup.y is a function whose value is one when y=z, and zero otherwise, where y and z span the range of indices i, j, k and l.