Patent Document ID: 10024904
Application ID: 15666790
Patent Flag: 1

Claim One:
1. A method implemented in a computer infrastructure having computer executable code tangibly embodied on a computer readable storage medium having programming instructions operable to: separate random variation in a logarithm of a leakage current into a correlated random component and an uncorrelated random component; determine a first standard deviation of the correlated random component for an ensemble device; determine a second standard deviation of the uncorrelated random component for the ensemble device; generate a statistical model for electrical features of the ensemble device, based on a number m of individual devices within the ensemble device, a sub-threshold slope, an uplift factor, the first standard deviation, the second standard deviation, and statistical random variables; and during semiconductor manufacturing, fabricating integrated chips with minimal leakage and improved power optimization based on the generated statistical model for electrical features of the ensemble device.