Patent Document ID: 5383167
Application ID: 07777451
Patent Flag: 1

Claim One:
1. A method of analyzing on a computer a signal transition propagation through a component, said component being one of a plurality of components of a digital circuit, each of said components having an input signal, an output signal, and a signal propagation delay time, said signals having logic level transitions over time, said computer having memory, said method comprising the step of: associating said component with at least one input signal and at least one output signal; scheduling at least one event comprising an input signal transition propagating through said component, and for each such event performing the steps of a) storing in said memory the signal propagation delay time of the component as a segmented probability distribution; b) storing in said memory the input signal level transition time as a segmented probability distribution; c) determinately combining the input signal transition probability distribution with the propagation delay probability distribution to generate the output signal transition time represented as a segmented probability distribution; and d) storing in said memory said output signal transition time probability distribution.