Patent Document ID: 9779235
Application ID: 12250949
Patent Flag: 1

Claim One:
1. A computing system comprising: a first hardware processor configured to execute a program; first electronic resource coupled to the first hardware processor and configured to store or transport data or instructions used by the first hardware processor for execution of the program; programmable hardware probing circuitry coupled to the first hardware processor or the first electronic memory, the programmable hardware probing circuitry configured to: monitor execution of the program by the first hardware processor to detect at least a first value or event related to execution of the program, generate a signal as a result the detection; and processing circuitry that is separate from the first hardware processor and coupled to the programmable hardware probing circuitry, the processing circuitry programmed to: receive the signal of the detection of the first value or event by the programmable hardware probing circuitry, responsive to the signal of the detection of the first value or event, intervene in execution of the program by the first hardware processor, wherein each instruction of the executing program is monitored on an instruction by instruction basis at clock cycle granularity of the first hardware processor.