Patent Document ID: 8195439
Application ID: 12264246
Patent Flag: 1

Claim One:
1. A method for verifying a mixed-signal circuit design, the method comprising: identifying a plurality of regions for partitioning the circuit design; for each of a plurality of simulation iterations, computing an amount of state change in each region when transitioning from a previous simulation iteration to a current simulation iteration; and for each of the plurality of simulation iterations, selecting a set of active regions from the plurality of regions to adaptively simulate using a plurality of different simulation engines to generate simulation output that simulates behavior of the circuit design, said selecting the set of active regions based on the computed amount of state change in a region exceeding a first threshold, wherein adaptively simulating the set of active regions comprises, for each active region at the current simulation iteration, identifying one of the plurality of simulation engines to solve the active region based on the computed amount of state change occurring at the active region exceeding a second threshold, the second threshold being different than the first threshold, wherein each simulation engine of the plurality of simulation engines produces simulation output based on different accuracy and speed tradeoffs.