Patent Document ID: 20050134391
Application ID: 10739117
Patent Flag: 0

Claim One:
1. A semiconductor integrated circuit having a built-in PLL circuit, said PLL circuit comprising: a voltage controlled oscillator circuit; a phase comparator circuit for comparing an oscillating signal generated by said voltage controlled oscillator circuit with a reference signal in phase to generate a first signal and a second signal in accordance with a difference in phase between the oscillating signal and the reference signal; a first charge pump circuit and a second charge pump circuit configured to operate in response to the first signal and the second signal generated by said phase comparator circuit, each of said first and second charge pump circuits including a charging current source and a discharging current source, wherein said current sources included in said second charge pump circuit generate currents, the absolute values of which are smaller than the absolute values of currents generated by said current sources included in said first charge pump circuit; said charging current source of said first charge pump circuit and said discharging current source of said second charge pump circuit being controlled by said first signal, and said discharging current source of said first charge pump circuit and said charging current source of said second charge pump circuit being controlled by said second signal; and a loop filter including a first capacitive element connected to a charge/discharge node, and a second capacitive element connected to the charge/discharge node through a resistive element, wherein said first capacitive element is charged and discharged by said first charge pump circuit, and said second capacitive element is charged and discharged by said second charge pump circuit.