Patent Document ID: 7493586
Application ID: 11553076
Patent Flag: 1

Claim One:
1. A computer readable medium embodied with a computer program for directing operations of a computer to implement an integrated circuit, comprising: first computer program code enabling a user to specify an uncertainty in a least one circuit that comprises the integrated circuit, where said first computer program code specifies the uncertainty by an Uncertain Function that is used in place of a logic function or operator, where said Uncertain Function comprises at least one of an at least partly unspecified Boolean logic function with multiple inputs and multiple outputs, a selectable Boolean logic function having an uncertain value input used to select one of a plurality of fully specified logic functions, and a Boolean logic function having a set of input parameters used to determine a specific logic function to be implemented, where said first computer program code implements an Uncertain Function Assertion for imposing at least one constraint on the Uncertain Function, where said Uncertain Function Assertion comprises at least one of an Input Assertion that uses a Boolean expression to specify a constraint on an input value, an Output Assertion that uses a Boolean expression to specify a constraint on an output value, an Input/Output Assertion that uses a Boolean expression to specify a constraint on a relation between input and output values, and a Dependency Assertion for defining an output value in terms of at least one input value; second computer program code that automatically maps the specified uncertainty into a circuit network of at least one circuit; third computer program code that simplifies the circuit network obtained by operation of said second computer program code by using logic synthesis optimizations in accordance with the Uncertain Function Assertion to introduce constraints that simplify the circuit network to a simplified final circuit implementation, and the Dependency assertions to eliminate inputs from selected outputs of the simplified final circuit implementation; fourth computer program code that maps the simplified final circuit implementation to a specific hardware technology; and fifth computer code that optimizes the simplified final circuit implementation to meet performance constraints.