Patent Document ID: 9912533
Application ID: 14731370
Patent Flag: 1

Claim One:
1. A method, comprising: (a) selecting a test bit stream; (b) selecting a first transmitter configuration; (c) selecting a first receiver configuration; (d) configuring a first physical layer circuit with the first transmitter configuration; (e) configuring a second physical layer circuit with the first receiver configuration; (f) storing the test bit stream, the first transmitter configuration, and the first receiver configuration in a memory device; (g) transmitting the test bit stream from the first physical layer circuit via a channel to the second physical layer circuit; (h) measuring a characteristic of the test bit stream after passing through the channel, wherein the measuring of (h) is performed by the second physical layer circuit; and (i) generating a multidimensional array of measured characteristics, wherein the multidimensional array is organized by transmitter configuration and receiver configuration combinations, wherein the first physical layer circuit and the second physical layer circuit communicate via a bus to a host processor, and wherein steps (a) through (i) are performed without use of a JTAG communication, wherein the first receiver configuration includes a plurality of values that determine various settings for determining the value of each bit received by the second physical layer circuit, wherein the plurality of values include an equalizer bandwidth value, a differential termination value, a common-mode voltage value, an AC and DC coupling value, a signal threshold detection value, a continuous time linear equalization value, a DC gain value, an equalizer value, and an eye quality value, and wherein the plurality of values are programmed by writing to a register in the second physical layer circuit.