Patent Document ID: 8176296
Application ID: 10033027
Patent Flag: 1

Claim One:
1. A microprocessor circuit, comprising: a plurality of programmable analog circuit blocks wherein said analog circuit blocks are dynamically programmable and configurable to perform one or more of a plurality of various analog function and wherein said plurality of programmable analog circuit blocks comprises a matrix of n by m, n and m independently being an integer of at least two; each of said plurality of programmable analog circuit blocks is configured to provide one or more analog function and wherein said plurality of programmable analog circuit blocks are configured to be individually at different power levels; a plurality of programmable digital circuit blocks configured to provide at least one of a plurality of digital functions, wherein each programmable digital circuit block is configurable to perform any one of said digital functions upon being configured with a single register write operation; a routing matrix configured to couple a subset of said plurality of programmable analog circuit blocks to a first subset of said plurality of programmable digital circuit blocks, at least a first one of said programmable analog circuit blocks being coupled to at least a first one of said programmable digital circuit blocks; and a programmable non-volatile memory coupled directly or indirectly to said plurality of programmable digital circuit blocks and said plurality of programmable analog circuit blocks, said programmable memory comprising data for programming at least one of said programmable digital circuit blocks and at least one of said plurality of programmable analog circuit blocks.