Patent Document ID: 8705531
Application ID: 13480623
Patent Flag: 1

Claim One:
1. An apparatus for supporting multicast address learning for a packet to be sent to multiple destinations coupled to a network processor, the apparatus comprising: a task parameter decoder receiving the packet from a task ring interface of the network processor through a task start interface and determining at least one parameter of the packet including determining whether the packet corresponds to a multicast packet or a unicast packet; a plurality of unlearned address counters recording a number of the packets that is in a flow to be multicast and determining whether the packet is being sent out; a correlator determining destination addresses of the packet based on an output of a parsing and bridging logic for each packet to be generated and transmitted by the network processor; a multicast replicator receiving the destination addresses determined by the correlator and replicating the packet multiple times based on a number of the destination addresses corresponding to the packet; and a task generator generating a generated packet with a bitmap and sending out the generated packet to an I/O adaptor over the task ring interface, wherein the bitmap is analyzed in the I/O adaptor and multiple packets are created for transmitting to at least one processing module of the network processor for further processing based on the destination addresses determined by the correlator, wherein, if the task parameter decoder determines the packet is an unlearned packet, the unlearned address counter is incremented and the unlearned packet is sent back to a dedicated queue in the task start interface of the I/O adaptor over the task ring interface with an index to the bitmap for replicating by the multicast replicator, thereby reducing bandwidth for the replicating by replicating only header data of each multicast packet.