Lok Sabha Question No. 1513 (UNSTARRED), answered on 2024-12-04
Subject: Import to Meet Semiconductor Demand
Ministry: ELECTRONICS AND INFORMATION TECHNOLOGY
Asked by: Shri Chintamani Maharaj

## GOVERNMENT OF INDIA MINISTRY OF ELECTRONICS AND INFORMATION TECHNOLOGY

## LOK SABHA

## UNSTARRED QUESTION NO.1513

TO BE ANSWERED ON: 04.12.2024

## IMPORT TO MEET SEMICONDUCTOR DEMAND

## † 1513.   SHRI CHINTAMANI MAHARAJ:

Will the Minister of ELECTRONICS AND INFORMATION TECHNOLOGY be pleased to state:

- (a) the quantum of imports being made to meet country's semiconductor demand; and
- (b) the  measures  being  taken  by  the  Government  to  promote  the  semiconductor  manufacturing ecosystem to reduce the aforesaid said imports?

## ANSWER

## MINISTER OF STATE FOR ELECTRONICS AND INFORMATION TECHNOLOGY (SHRI JITIN PRASADA)

(a): As per the Directorate General of Commercial Intelligence & Statistics (DGCIS) portal, the import value  of  Semiconductor  chip  for  Harmonized  System  of  Nomenclature  (HSN)  codes  85423100 (Monolithic  integrated  circuits  -  digital),  85423200  (Memories),  85423300  (Amplifiers),  85423900 (Other) and 85429000 (Parts of electronic integrated circuits and micro assemblies) in FY 2023-24 is USD 20.7 Bn (~Rs 1,71,483crores).

- (b): Government has approved Semicon India programme with a total outlay of Rs 76,000 crore for the development of semiconductor and display manufacturing ecosystem in the country. This programme provides:
1. Fiscal  support  of  50%  of  the  project  cost  on pari-passu basis  for  setting  up  of  Silicon Complementary Metal-Oxide-Semiconductor (CMOS) based Semiconductor Fabs in India.
2. Fiscal support of 50% of Project Cost on pari-passu basis for setting up of Display Fabs in India.
3. Fiscal support of 50% of the Capital Expenditure on pari-passu basis for setting up of Compound Semiconductors  /  Silicon  Photonics (SiPh) / Sensors  (including Micro-Electro-Mechanical Systems) Fab/ Discrete Semiconductor Fab and Semiconductor Assembly, Testing, Marking and Packaging (ATMP) / Outsourced Semiconductor Assembly and Test (OSAT) facilities in India.
4. Product Design Linked Incentive of up to 50% of the eligible expenditure subject to a ceiling of ₹15  Crore  per  application  and  also  'Deployment  Linked  Incentive'  of  6%  to  4%  of  net  sales turnover  over  5  years  subject  to  a  ceiling  of  ₹30  Crore  per  application  for  incentivising  chip design.

Government  has  also  approved  modernisation  of  Semi-Conductor  Laboratory,  Mohali  to  enhance efficiency and cycle time.

Under Semicon India Programme, Government has already approved five (5) semiconductor projects with cumulative investment of around Rs. 1 lakh 52 thousand crore. Further,15 semiconductor design companies  have  also  been  approved  under  the  Design  Linked  Incentive  Scheme  to  design  chips  for Indian products. Additionally, 41 semiconductor design companies have been approved for access of the tools  required  for  designing  the  chips  (called  EDA  tools)  which  is  being  made  available  by  National EDA Tool Grid setup at ChipIN Centre at C-DAC Bengaluru.

To create the skilled manpower for chip design, Government has launched the Chips to Startup ('C2S') programme  which  plans  to  train  85  thousand  specialized  workforce  at  about  113  participating institutions in VLSI and Embedded System Design.

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