Title: Computer aided verification
Description: Computer Aided Verification: 12th International Conference, CAV 2000, Chicago, IL, USA, July 15-19, 2000. Proceedings<br />Author: E. Allen Emerson, Aravinda Prasad Sistla<br /> Published by Springer Berlin Heidelberg<br /> ISBN: 978-3-540-67770-3<br /> DOI: 10.1007/10722167<br /><br />Table of Contents:<p></p><ul><li>Keynote Address: Abstraction, Composition, Symmetry, and a Little Deduction: The Remedies to State Explosion
</li><li>Invited Address: Applying Formal Methods to Cryptographic Protocol Analysis
</li><li>Invited Tutorial: Boolean Satisfiability Algorithms and Applications in Electronic Design Automation
</li><li>Invited Tutorial: Verification of Infinite-state and Parameterized Systems
</li><li>An Abstraction Algorithm for the Verification of Generalized C-Slow Designs
</li><li>Achieving Scalability in Parallel Reachability Analysis of Very Large Circuits
</li><li>An Automata-Theoretic Approach to Reasoning about Infinite-State Systems
</li><li>Automatic Verification of Parameterized Cache Coherence Protocols
</li><li>Binary Reachability Analysis of Discrete Pushdown Timed Automata
</li><li>Boolean Satisfiability with Transitivity Constraints
</li><li>Bounded Model Construction for Monadic Second-Order Logics
</li><li>Building Circuits from Relations
</li><li>Combining Decision Diagrams and SAT Procedures for Efficient Symbolic Model Checking
</li><li>On the Completeness of Compositional Reasoning
</li><li>Counterexample-Guided Abstraction Refinement
</li><li>Decision Procedures for Inductive Boolean Functions Based on Alternating Automata
</li><li>Detecting Errors Before Reaching Them
</li><li>A Discrete Strategy Improvement Algorithm for Solving Parity Games
</li><li>Distributing Timed Model Checking — How the Search Order Matters
</li><li>Efficient Algorithms for Model Checking Pushdown Systems</li></ul>
Subjects: Logic design, Software engineering, Computer science, Artificial intelligence, Verifikation, Kongress, Chicago <Ill., 2000>, Computer software, Verification, Congresses, Integrated circuits