Arithmetic built-in self-test for embedded systems
By: Janusz Rajski, Jerzy Tyszer.
Contributors: Tyszer, Jerzy.
Publisher: Prentice Hall PTR
Published: 1998
Place of publication: Upper Saddle River, NJ
Language: eng
Number of pages: 268
Subjects: Embedded computer systems -- Testing.; Computer firmware.
Description: Arithmetic Built-In Self-Test for Embedded Systems offers a thorough treatment of the important issues in software-based built-in self-test for systems with embedded processors. Fundamental concepts are illustrated with practical scenarios for test generation, test application, and test response compaction.

Arithmetic Built-In Self-Test for Embedded Systems uses an approach to cutting-edge technology that will be of interest to hardware and embedded system designers, test and design engineers, and researchers working on IC/core testing. It is also appropriate for graduate-level design courses. An introductory chapter provides a comprehensive tutorial covering the most relevant DFT and BIST techniques.
Notes: Includes bibliographical references (p. [249]-263) and index.