Finite State Machine Logic Synthesis for Complex Programmable Logic Devices
By: by Robert Czerwinski, Dariusz Kania
Contributors: Kania, Dariusz; SpringerLink (Online service)
Series: Lecture Notes in Electrical Engineering -- 231
Publisher: Springer Berlin Heidelberg; Imprint: Springer
Published: 2013
Place of publication: Berlin, Heidelberg
Language: eng
Format: [electronic resource] /
Number of pages: 172
ISBN-13: 9783642361661
Subjects: Logic design; Systems engineering; Engineering; Engineering design; Circuits and Systems
Description: <p>This book is a monograph devoted to logic synthesis and optimization for CPLDs. CPLDs' macrocell can also be interpreted as programmable AND-fixed OR structure, well known as PAL-based structure. The question is: what should be done when the number of implicants representing function exceeds the number of product terms available in a logic block. The answer is ... in the book.</p><p>Logic synthesis and optimization methods dedicated for PAL-based structures are proposed. The methods strive to find the optimum fit for the combinational logic and finite state machines to the structure of the logic device and aim at area and speed optimization. The theoretical background and complete strategies are richly illustrated with examples and figures. <br></p>
Table of contents: title: Introduction; title: Definitions and Basic Properties; title: Synthesis of FSMs; title: State Assignment Algorithms; title: Theoretical Background of Technology-Dependent Optimization; title: The Algorithm of Area Optimization Based on Graphs of Outputs; title: Conclusions; title: Output File Format; title: Conclusion.