On the nature and effect of power distribution noise in CMOS digital integrated circuits
By: by Kevin Kennedy Johnstone.
Contributors: Middlesex Polytechnic. Faculty of Engineering, Science and Mathematics.
Publisher: Middlesex Polytechnic
Published: 1991
Place of publication: London
Language: eng
Format: PhD Thesis
Number of pages: 148
Notes: Thesis submitted to the Council for National Academic Awards in partial fulfilment of the requirements for the degree of Doctor of Philosophy.
Table of contents: title: This is a PhD level study into the nature and effect of power supply and ground return noise created in dense CMOS Logic circuits. It focusses on the development of a simulation model and formed part of the UK Alvey 073 Research Programme aimed at developing a design methodology for fault tolerant VLSI and WSI.