Microcomputer systems
By: Richard C. Seals.
Publisher: Stanley Thornes
Published: 1993
Place of publication: Cheltenham
Language: eng
Number of pages: 167
Subjects: Microcomputers.; System design.; Systems programming (Computer science)
Notes: Includes index.
Table of contents: title: Preface
pagenum: xi; title: Acknowledgements
pagenum: xii; title: Trade Marks
pagenum: xii; label: 1
title: Introduction
pagenum: 1; label: 1.1
title: The Aim of This Book
pagenum: 1; label: 1.2
title: Task-orientated Learning
pagenum: 2; title: Philosophy
pagenum: 2; title: System Design
pagenum: 2; label: 2
title: Design Considerations
pagenum: 3; label: 2.1
title: Introduction
pagenum: 3; label: 2.2
title: Design Influences
pagenum: 4; label: 2.3
title: The Software and Hardware
pagenum: 4; title: A Simple Case Study of the Hardware/Software Divide
pagenum: 5; title: A Mainly Software Solution
pagenum: 5; title: A Mostly Hardware Solution
pagenum: 6; label: 2.4
title: Real-time Programming
pagenum: 6; label: 2.5
title: Maximum Capability Versus Expandability
pagenum: 7; label: 2.6
title: Maximum Flexibility, Minimum Hardware
pagenum: 8; label: 2.7
title: Standard or Custom Components
pagenum: 9; title: The Advantages of Standard Components
pagenum: 10; title: The Disadvantages of Standard Components
pagenum: 10; title: The Advantages of Custom Components
pagenum: 10; title: The Disadvantages of Custom Components
pagenum: 11; label: 2.8
title: Designing for Maximum Reliability
pagenum: 12; title: Failure of a Product
pagenum: 12; title: Determining the Failure Rate
pagenum: 14; title: Failure Rate Comparison
pagenum: 14; label: 2.9
title: Optimising the Cost
pagenum: 15; label: 2.10
title: The Ideal Parameters
pagenum: 15; label: 3
title: Designing the Microcomputer
pagenum: 17; label: 3.1
title: Introduction
pagenum: 17; label: 3.2
title: Case Study: A Microcomputer Design
pagenum: 18; label: 3.3
title: The Functional Specification
pagenum: 18; label: 3.4
title: The Secondary Mass Storage
pagenum: 18; label: 3.5
title: The Floppy Disk Controller
pagenum: 19; title: The Intel 8272A Floppy Disk Controller
pagenum: 21; title: 8272A FDC Commands Available
pagenum: 21; label: 3.6
title: The Recalibrate Operation
pagenum: 22; label: 3.7
title: Sense Interrupt Status Command
pagenum: 23; label: 3.8
title: Positioning the Head Over the Track (SEEK)
pagenum: 23; label: 3.9
title: The Read and Write Commands
pagenum: 24; title: Full Programming Information
pagenum: 26; label: 3.10
title: A DMA Controller
pagenum: 26; title: Programmer's Model of a DMA Controller
pagenum: 29; label: 3.11
title: Writing to Base and Current Registers
pagenum: 29; label: 3.12
title: Reading from Base and Current Registers
pagenum: 30; title: High Byte Flip-flop
pagenum: 30; label: 3.13
title: Command Registers
pagenum: 30; title: The Command Register
pagenum: 30; title: The Request Register
pagenum: 31; title: The Mask Registers
pagenum: 31; title: The Mode Register
pagenum: 31; title: Register Commands
pagenum: 32; title: The Read Only Command Registers
pagenum: 32; title: The Temporary Register
pagenum: 32; title: The Status Register
pagenum: 33; label: 3.14
title: The Link to the Operating System
pagenum: 33; label: 3.15
title: Floppy Disk Operations and System Services
pagenum: 34; title: Definitions of Interfaces for File Operation
pagenum: 34; label: 3.16
title: The Processing Unit and Large Execution Memory
pagenum: 37; title: The Interface to Fast Transfer
pagenum: 38; title: The Interface to Operating System
pagenum: 38; title: A Flexible User Interface
pagenum: 39; title: The Interface to the VDU
pagenum: 39; label: 3.17
title: The Operating System
pagenum: 41; title: Memory Allocation
pagenum: 41; title: The DOS Boot Program
pagenum: 41; title: The Main DOS Program
pagenum: 42; title: Transferring Control Back to DOS
pagenum: 42; title: Loading a User Program and Transferring Control to It
pagenum: 42; label: 3.18
title: Real-time Clock
pagenum: 43; title: Interface to the Time Function
pagenum: 43; label: 3.19
title: The Complete Design
pagenum: 44; title: Summary
pagenum: 44; label: 4
title: State of the Art
pagenum: 46; label: 4.1
title: Introduction
pagenum: 46; label: 4.2
title: Bus Interconnections
pagenum: 46; title: Bus Functions
pagenum: 46; title: Write Transfer
pagenum: 48; title: Read Transfer
pagenum: 49; title: Round Trip Propagation Delay
pagenum: 50; title: Asynchronous Handshake
pagenum: 51; title: The Semi-synchronous Handshake
pagenum: 53; title: Arbitration Protocols
pagenum: 54; title: Daisy Chain Arbitration
pagenum: 55; title: The Safe Daisy Chain Arbitration Protocol
pagenum: 57; label: 4.3
title: Introduction to Multiprogramming
pagenum: 57; title: Process Management
pagenum: 59; title: The Ready Queue
pagenum: 59; title: Structure of a General Ready Queue
pagenum: 59; title: Assigning Priority
pagenum: 60; label: 4.4
title: Coprocessors
pagenum: 61; title: Mathematics Coprocessor
pagenum: 64; title: The Number System
pagenum: 64; title: Multiplication
pagenum: 65; title: Division
pagenum: 66; title: Adding and Subtracting
pagenum: 67; title: Stack-orientated Arithmetic Operations
pagenum: 69; title: Programmer's Model for the 8087 Mathematics Coprocessor
pagenum: 72; title: The Model of Infinity
pagenum: 72; title: Rounding Techniques
pagenum: 73; title: Precision
pagenum: 74; title: Interrupts
pagenum: 74; title: Interrupt Indicators
pagenum: 75; label: 5
title: Advanced Microprocessor Techniques
pagenum: 77; label: 5.1
title: Current Trends
pagenum: 77; title: More Memory
pagenum: 77; title: Memory Management Unit (MMU)
pagenum: 79; title: Multiple Virtual Memory Blocks
pagenum: 80; title: Swapping Segments
pagenum: 80; title: Prioritised Access
pagenum: 83; title: Faster Processing
pagenum: 83; title: Improvements in Internal Architecture
pagenum: 84; title: Memory Caches
pagenum: 85; title: Built-in Debugging Facilities
pagenum: 86; title: Higher Levels of Functional Integration
pagenum: 87; title: Parallel Processing
pagenum: 87; label: 5.2
title: The Transputer and Occam
pagenum: 88; title: Introduction to Block-structured Programming
pagenum: 88; title: The Occam-to-Computer Interface
pagenum: 89; title: Block-structured Programming Using Occam
pagenum: 89; title: Data Variables
pagenum: 90; title: Procedure Blocks
pagenum: 91; label: 5.3
title: The Occam Language
pagenum: 91; title: Programming
pagenum: 93; title: Occam Model
pagenum: 93; title: Language Constructs
pagenum: 93; title: Conditional Constructs
pagenum: 94; title: Data Types
pagenum: 95; title: Arrays
pagenum: 95; title: Named Processes
pagenum: 95; title: Timer
pagenum: 96; label: 5.4
title: Transputer Hardware
pagenum: 96; title: Communication Links
pagenum: 96; title: Memory-mapped Peripherals
pagenum: 96; title: Bootstrapping
pagenum: 97; title: The Internal Transputer Architecture
pagenum: 98; title: The Programmer's Model
pagenum: 98; title: The Scheduler
pagenum: 99; label: 5.5
title: Reduced Instruction Set Computers (RISC)
pagenum: 100; title: Complex Instruction Set Computers (CISC)
pagenum: 100; title: Increasing the MIPS Value
pagenum: 100; title: Reduced Instruction Set
pagenum: 101; title: Load/Store Architecture
pagenum: 103; title: Instruction Decoding
pagenum: 103; title: Simplified Programming Branch
pagenum: 103; title: An Ideal RISC Instruction Set
pagenum: 104; title: Methods of Optimising RISC Programs
pagenum: 104; title: Delayed Branching
pagenum: 105; title: Conditional Branches
pagenum: 105; title: Unrolling Loops
pagenum: 106; title: Software Interlock Checking
pagenum: 106; title: Architecture
pagenum: 106; title: Pipelining
pagenum: 106; title: Demultiplexed Bus Systems
pagenum: 107; title: Burst-mode Memory Access
pagenum: 108; title: Memory Caches
pagenum: 108; title: Summary
pagenum: 109; label: 6
title: Software Development
pagenum: 111; label: 6.1
title: Introduction
pagenum: 111; title: The Software Design Process
pagenum: 111; title: Software Design
pagenum: 114; title: Algorithm Design
pagenum: 115; title: Pseudo-code
pagenum: 116; label: 6.2
title: Computer Programming
pagenum: 117; title: Choosing a Language
pagenum: 119; title: Documentation
pagenum: 120; title: Program Structure
pagenum: 121; label: 6.3
title: Development Systems
pagenum: 122; title: Mainframe Environments
pagenum: 123; title: Dedicated Development Systems
pagenum: 125; title: Personal Computer Add-ons
pagenum: 126; label: 7
title: HLL Software Design and Examples
pagenum: 128; label: 7.1
title: Introduction to Pascal
pagenum: 128; title: Good Programming Techniques
pagenum: 129; title: The Pascal-to-Computer Interface
pagenum: 129; title: User-defined Blocks
pagenum: 129; title: Data Variables
pagenum: 130; title: Turbo Pascal
pagenum: 132; label: 7.2
title: Introduction to C
pagenum: 132; title: Programming
pagenum: 132; title: The Seven Elements of C
pagenum: 132; title: Data Types
pagenum: 133; title: Identifiers
pagenum: 133; title: Assignment (=)
pagenum: 133; title: Arithmetic Operators
pagenum: 134; title: Bit Operators
pagenum: 134; title: Combined Operators
pagenum: 134; title: Address Operators
pagenum: 134; title: Input of Data
pagenum: 134; title: Relational Operators
pagenum: 136; title: Logical Operators
pagenum: 136; title: Functions
pagenum: 137; title: Global Declarations
pagenum: 137; title: The Switch Statement
pagenum: 138; title: Arrays
pagenum: 138; title: Files
pagenum: 138; title: Data Elements
pagenum: 138; title: End-of-file
pagenum: 140; title: Single Character I/O
pagenum: 140; label: 7.3
title: Case Study 1: Matrix Multiplication
pagenum: 140; title: Multiplying Two 4 x 4 Matrices
pagenum: 140; title: Converting the Specification into a Program Design
pagenum: 141; title: Generating Test Data
pagenum: 142; title: User Interface
pagenum: 145; title: Condensed Program
pagenum: 146; title: Comparison of Compilers and Execution Speed
pagenum: 147; title: Further Testing: Faulty Input Data
pagenum: 148; title: Typical Fault-sensitive Points
pagenum: 149; title: HLL Errors
pagenum: 150; title: Full Test Data
pagenum: 151; title: Compiler Switches
pagenum: 151; title: The C HLL
pagenum: 152; label: 7.4
title: Case Study 2: Setup Program for PC/AT
pagenum: 154; title: Specification
pagenum: 155; title: Pseudo-code Program
pagenum: 157; title: Program Listing
pagenum: 158; title: Sample Display Screens
pagenum: 164; title: Summary
pagenum: 164; title: Index
pagenum: 165