IEEE standard Verilog hardware description language
By: sponsor, Design Automation Standards Committee of the IEEE Computer Society.
Contributors: IEEE Computer Society. Design Automation Standards Subcommittee.; IEEE Standards Association.; IEEE Standards Board.
Series: IEEE Std -- 1364-2001.; IEEE std -- 1364-2001.
Publisher: Institute of Electrical and Electronics Engineers
Published: 2001
Place of publication: New York
Language: eng
Number of pages: 778
Subjects: Verilog (Computer hardware description language) -- Standards
Other titles: Verilog hardware description language.; IEEE Std 1364-2001.
Description: "The Verilog Hardware Description Language (HDL) is defined in this standard. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. The primary audiences for this standard are the implementors of tools supporting the language and advanced users of the language."
Notes: "Approved 17 March 2001, IEEE-SA Standards Board."

"IEEE Std 1364-2001 (revision of IEEE Std 1364-1995)."

Includes bibliographical references.