The Naval Postgraduate School secure archival storage system, Part II
Subtitle: Segment and process management implementation
By: Lyle A. Cox, Roger R. Schell, and Sonja L. Perdue
Contributors: Schell, Roger R.; Perdue, Sonja L.; Naval Postgraduate School (U.S.)
Publisher: Naval Postgraduate School
Published: 1981
Place of publication: Monterey, Calif
Language: eng
Number of pages: 408
Subjects: Electronic data processing departments; Access control; Computer networks; Computers; Microprocessors; Information storage and retrieval systems; SASS (Computer system); Security measures
Description: The security kernel technology has provided the technical foundation for highly reliable protection of computerized information. However, the operating system implementations face two significant challenges: providing (1) adequate computational resources for applications tasks, and (2) a clean, straightforward structure whose correctness can be easily reviewed. This paper presents the experience on an ongoing security kernel implementation using the Advanced Micro Devices 4116 single-board computer based on the Z8002 microprocessor. The performance issues of process switching, domain changing, and multiprocessor bus contention are explicitly addressed. The strictly hierarchical (i.e., loop-free) structure provides a series of increasingly capable, separately usable operating system subsets. Security enforcement is structured in two layers: the basic kernel rigorously enforces a non-discretionary (viz., lattice model) policy, while an upper layer provides the access refinements for a discretionary policy. (Author)
Notes: Cover title.

"March 1981."

"NPS-52-81-001."

"Prepared for: Chief of Naval Research; Arlington, Virginia 22217."

Includes bibliographic references (p. 404-405).

"Approved for public release; distribution is unlimited."

Technical report; 1981.