SystemVerilog for Verification
Subtitle: A Guide to Learning the Testbench Language Features
By: by Chris Spear, Greg Tumbush
Contributors: Tumbush, Greg; SpringerLink (Online service)
Edition: 3rd ed. 2012.
Publisher: Springer US
Published: 2012
Place of publication: Boston, MA
Language: eng
Format: [electronic resource] :
ISBN-13: 9781461407157
Subjects: Systems engineering; Circuits and Systems; Computer input-output equipment; Computers; Engineering; Computer-Aided Engineering (CAD, CAE) and Design; Computer engineering; Computer-aided design; Electrical engineering
Table of contents: label: 1
title: Verification Guidelines
pagenum: 1; label: 1.1
title: The Verification Process
pagenum: 2; label: 1.1.1
title: Testing at Different Levels
pagenum: 3; label: 1.1.2
title: The Verification Plan
pagenum: 4; label: 1.2
title: The Verification Methodology Manual
pagenum: 4; label: 1.3
title: Basic Testbench Functionality
pagenum: 5; label: 1.4
title: Directed Testing
pagenum: 5; label: 1.5
title: Methodology Basics
pagenum: 6; label: 1.6
title: Constrained-Random Stimulus
pagenum: 8; label: 1.7
title: What Should You Randomize?
pagenum: 9; label: 1.7.1
title: Device and Environment Configuration
pagenum: 9; label: 1.7.2
title: Input Data
pagenum: 10; label: 1.7.3
title: Protocol Exceptions, Errors, and Violations
pagenum: 10; label: 1.7.4
title: Delays and Synchronization
pagenum: 11; label: 1.7.5
title: Parallel Random Testing
pagenum: 11; label: 1.8
title: Functional Coverage
pagenum: 12; label: 1.8.1
title: Feedback from Functional Coverage to Stimulus
pagenum: 12; label: 1.9
title: Testbench Components
pagenum: 13; label: 1.10
title: Layered Testbench
pagenum: 14; label: 1.10.1
title: A Flat Testbench
pagenum: 14; label: 1.10.2
title: The Signal and Command Layers
pagenum: 17; label: 1.10.3
title: The Functional Layer
pagenum: 17; label: 1.10.4
title: The Scenario Layer
pagenum: 18; label: 1.10.5
title: The Test Layer and Functional Coverage
pagenum: 18; label: 1.11
title: Building a Layered Testbench
pagenum: 19; label: 1.11.1
title: Creating a Simple Driver
pagenum: 20; label: 1.12
title: Simulation Environment Phases
pagenum: 20; label: 1.13
title: Maximum Code Reuse
pagenum: 21; label: 1.14
title: Testbench Performance
pagenum: 22; label: 1.15
title: Conclusion
pagenum: 22; label: 1.16
title: Exercises
pagenum: 23; label: 2
title: Data Types
pagenum: 25; label: 2.1
title: Built-In Data Types
pagenum: 25; label: 2.1.1
title: The Logic Type
pagenum: 26; label: 2.1.2
title: 2-State Data Types
pagenum: 26; label: 2.2
title: Fixed-Size Arrays
pagenum: 27; label: 2.2.1
title: Declaring and Initializing Fixed-Size Arrays
pagenum: 28; label: 2.2.2
title: The Array Literal
pagenum: 29; label: 2.2.3
title: Basic Array Operations - for and foreach
pagenum: 30; label: 2.2.4
title: Basic Array Operations - Copy and Compare
pagenum: 32; label: 2.2.5
title: Bit and Array Subscripts, Together at Last
pagenum: 32; label: 2.2.6
title: Packed Arrays
pagenum: 33; label: 2.2.7
title: Packed Array Examples
pagenum: 33; label: 2.2.8
title: Choosing Between Packed and Unpacked Arrays
pagenum: 34; label: 2.3
title: Dynamic Arrays
pagenum: 35; label: 2.4
title: Queues
pagenum: 36; label: 2.5
title: Associative Arrays
pagenum: 38; label: 2.6
title: Array Methods
pagenum: 41; label: 2.6.1
title: Array Reduction Methods
pagenum: 41; label: 2.6.2
title: Array Locator Methods
pagenum: 42; label: 2.6.3
title: Array Sorting and Ordering
pagenum: 44; label: 2.6.4
title: Building a Scoreboard with Array Locator Methods
pagenum: 45; label: 2.7
title: Choosing a Storage Type
pagenum: 46; label: 2.7.1
title: Flexibility
pagenum: 46; label: 2.7.2
title: Memory Usage
pagenum: 46; label: 2.7.3
title: Speed
pagenum: 47; label: 2.7.4
title: Data Access
pagenum: 47; label: 2.7.5
title: Choosing the Best Data Structure
pagenum: 48; label: 2.8
title: Creating New Types with typedef
pagenum: 48; label: 2.9
title: Creating User-Defined Structures
pagenum: 50; label: 2.9.1
title: Creating a Struct and a New Type
pagenum: 50; label: 2.9.2
title: Initializing a Structure
pagenum: 51; label: 2.9.3
title: Making a Union of Several Types
pagenum: 51; label: 2.9.4
title: Packed Structures
pagenum: 52; label: 2.9.5
title: Choosing Between Packed and Unpacked Structures
pagenum: 52; label: 2.10
title: Packages
pagenum: 53; label: 2.11
title: Type Conversion
pagenum: 54; label: 2.11.1
title: The Static Cast
pagenum: 54; label: 2.11.2
title: The Dynamic Cast
pagenum: 55; label: 2.12
title: Streaming Operators
pagenum: 55; label: 2.13
title: Enumerated Types
pagenum: 57; label: 2.13.1
title: Defining Enumerated Values
pagenum: 58; label: 2.13.2
title: Routines for Enumerated Types
pagenum: 59; label: 2.13.3
title: Converting To and From Enumerated Types
pagenum: 60; label: 2.14
title: Constants
pagenum: 61; label: 2.15
title: Strings
pagenum: 61; label: 2.16
title: Expression Width
pagenum: 62; label: 2.17
title: Conclusion
pagenum: 63; label: 2.18
title: Exercises
pagenum: 64; label: 3
title: Procedural Statements and Routines
pagenum: 69; label: 3.1
title: Procedural Statements
pagenum: 69; label: 3.2
title: Tasks, Functions, and Void Functions
pagenum: 71; label: 3.3
title: Routine Overview
pagenum: 72; label: 3.3.1
title: Routine Begin ... End Removed
pagenum: 72; label: 3.4
title: Routine Arguments
pagenum: 72; label: 3.4.1
title: C-style Routine Arguments
pagenum: 72; label: 3.4.2
title: Argument Direction
pagenum: 73; label: 3.4.3
title: Advanced Argument Types
pagenum: 73; label: 3.4.4
title: Default Value for an Argument
pagenum: 75; label: 3.4.5
title: Passing Arguments by Name
pagenum: 76; label: 3.4.6
title: Common Coding Errors
pagenum: 77; label: 3.5
title: Returning from a Routine
pagenum: 78; label: 3.5.1
title: The Return Statement
pagenum: 78; label: 3.5.2
title: Returning an Array from a Function
pagenum: 78; label: 3.6
title: Local Data Storage
pagenum: 79; label: 3.6.1
title: Automatic Storage
pagenum: 80; label: 3.6.2
title: Variable Initialization
pagenum: 80; label: 3.7
title: Time Values
pagenum: 81; label: 3.7.1
title: Time Units and Precision
pagenum: 81; label: 3.7.2
title: Time Literals
pagenum: 82; label: 3.7.3
title: Time and Variables
pagenum: 82; label: 3.7.4
title: $time vs. $realtime
pagenum: 83; label: 3.8
title: Conclusion
pagenum: 83; label: 3.9
title: Exercises
pagenum: 83; label: 4
title: Connecting the Testbench and Design
pagenum: 87; label: 4.1
title: Separating the Testbench and Design
pagenum: 88; label: 4.1.1
title: Communication Between the Testbench and the DUT
pagenum: 88; label: 4.1.2
title: Communication with Ports
pagenum: 89; label: 4.2
title: The Interface Construct
pagenum: 90; label: 4.2.1
title: Using an Interface to Simplify Connections
pagenum: 91; label: 4.2.2
title: Connecting Interfaces and Ports
pagenum: 93; label: 4.2.3
title: Grouping Signals in an Interface Using Modports
pagenum: 94; label: 4.2.4
title: Using Modports with a Bus Design
pagenum: 95; label: 4.2.5
title: Creating an Interface Monitor
pagenum: 95; label: 4.2.6
title: Interface Trade-Offs
pagenum: 96; label: 4.2.7
title: More Information and Examples
pagenum: 97; label: 4.2.8
title: Logic vs. Wire in an Interface
pagenum: 97; label: 4.3
title: Stimulus Timing
pagenum: 98; label: 4.3.1
title: Controlling Timing of Synchronous Signals with a Clocking Block
pagenum: 98; label: 4.3.2
title: Timing Problems in Verilog
pagenum: 99; label: 4.3.3
title: Testbench-Design Race Condition
pagenum: 100; label: 4.3.4
title: The Program Block and Timing Regions
pagenum: 101; label: 4.3.5
title: Specifying Delays Between the Design and Testbench
pagenum: 103; label: 4.4
title: Interface Driving and Sampling
pagenum: 104; label: 4.4.1
title: Interface Synchronization
pagenum: 104; label: 4.4.2
title: Interface Signal Sample
pagenum: 105; label: 4.4.3
title: Interface Signal Drive
pagenum: 106; label: 4.4.4
title: Driving Interface Signals Through a Clocking Block
pagenum: 106; label: 4.4.5
title: Bidirectional Signals in the Interface
pagenum: 108; label: 4.4.6
title: Specifying Delays in Clocking Blocks
pagenum: 109; label: 4.5
title: Program Block Considerations
pagenum: 110; label: 4.5.1
title: The End of Simulation
pagenum: 110; label: 4.5.2
title: Why Are Always Blocks Not Allowed in a Program?
pagenum: 111; label: 4.5.3
title: The Clock Generator
pagenum: 111; label: 4.6
title: Connecting It All Together
pagenum: 112; label: 4.6.1
title: An Interface in a Port List Must Be Connected
pagenum: 113; label: 4.7
title: Top-Level Scope
pagenum: 114; label: 4.8
title: Program-Module Interactions
pagenum: 115; label: 4.9
title: SystemVerilog Assertions
pagenum: 116; label: 4.9.1
title: Immediate Assertions
pagenum: 116; label: 4.9.2
title: Customizing the Assertion Actions
pagenum: 117; label: 4.9.3
title: Concurrent Assertions
pagenum: 118; label: 4.9.4
title: Exploring Assertions
pagenum: 118; label: 4.10
title: The Four-Port ATM Router
pagenum: 119; label: 4.10.1
title: ATM Router with Ports
pagenum: 119; label: 4.10.2
title: ATM Top Level Module with Ports
pagenum: 120; label: 4.10.3
title: Using Interfaces to Simplify Connections
pagenum: 123; label: 4.10.4
title: ATM Interfaces
pagenum: 124; label: 4.10.5
title: ATM Router Model Using an Interface
pagenum: 124; label: 4.10.6
title: ATM Top-Level Module with Interfaces
pagenum: 125; label: 4.10.7
title: ATM Testbench with Interface
pagenum: 125; label: 4.11
title: The Ref Port Direction
pagenum: 126; label: 4.12
title: Conclusion
pagenum: 127; label: 4.13
title: Exercises
pagenum: 128; label: 5
title: Basic OOP
pagenum: 131; label: 5.1
title: Introduction
pagenum: 131; label: 5.2
title: Think of Nouns, Not Verbs
pagenum: 132; label: 5.3
title: Your First Class
pagenum: 133; label: 5.4
title: Where to Define a Class
pagenum: 133; label: 5.5
title: OOP Terminology
pagenum: 134; label: 5.6
title: Creating New Objects
pagenum: 135; label: 5.6.1
title: Handles and Constructing Objects
pagenum: 135; label: 5.6.2
title: Custom Constructor
pagenum: 136; label: 5.6.3
title: Separating the Declaration and Construction
pagenum: 137; label: 5.6.4
title: The Difference Between new() and new[]
pagenum: 138; label: 5.6.5
title: Getting a Handle on Objects
pagenum: 138; label: 5.7
title: Object Deallocation
pagenum: 139; label: 5.8
title: Using Objects
pagenum: 140; label: 5.9
title: Class Methods
pagenum: 141; label: 5.10
title: Defining Methods Outside of the Class
pagenum: 142; label: 5.11
title: Static Variables vs. Global Variables
pagenum: 143; label: 5.11.1
title: A Simple Static Variable
pagenum: 143; label: 5.11.2
title: Accessing Static Variables Through the Class Name
pagenum: 144; label: 5.11.3
title: Initializing Static Variables
pagenum: 145; label: 5.11.4
title: Static Methods
pagenum: 145; label: 5.12
title: Scoping Rules
pagenum: 146; label: 5.12.1
title: What Is This?
pagenum: 148; label: 5.13
title: Using One Class Inside Another
pagenum: 149; label: 5.13.1
title: How Big or Small Should My Class Be?
pagenum: 151; label: 5.13.2
title: Compilation Order Issue
pagenum: 151; label: 5.14
title: Understanding Dynamic Objects
pagenum: 152; label: 5.14.1
title: Passing Objects and Handles to Methods
pagenum: 152; label: 5.14.2
title: Modifying a Handle in a Task
pagenum: 153; label: 5.14.3
title: Modifying Objects in Flight
pagenum: 154; label: 5.14.4
title: Arrays of Handles
pagenum: 155; label: 5.15
title: Copying Objects
pagenum: 156; label: 5.15.1
title: Copying an Object with the new Operator
pagenum: 156; label: 5.15.2
title: Writing Your Own Simple Copy Function
pagenum: 158; label: 5.15.3
title: Writing a Deep Copy Function
pagenum: 159; label: 5.15.4
title: Packing Objects to and from Arrays Using Streaming Operators
pagenum: 161; label: 5.16
title: Public vs. Local
pagenum: 162; label: 5.17
title: Straying Off Course
pagenum: 163; label: 5.18
title: Building a Testbench
pagenum: 163; label: 5.19
title: Conclusion
pagenum: 164; label: 5.20
title: Exercises
pagenum: 165; label: 6
title: Randomization
pagenum: 169; label: 6.1
title: Introduction
pagenum: 169; label: 6.2
title: What to Randomize
pagenum: 170; label: 6.2.1
title: Device Configuration
pagenum: 170; label: 6.2.2
title: Environment Configuration
pagenum: 171; label: 6.2.3
title: Primary Input Data
pagenum: 171; label: 6.2.4
title: Encapsulated Input Data
pagenum: 171; label: 6.2.5
title: Protocol Exceptions, Errors, and Violations
pagenum: 172; label: 6.2.6
title: Delays
pagenum: 172; label: 6.3
title: Randomization in SystemVerilog
pagenum: 172; label: 6.3.1
title: Simple Class with Random Variables
pagenum: 173; label: 6.3.2
title: Checking the Result from Randomization
pagenum: 174; label: 6.3.3
title: The Constraint Solver
pagenum: 175; label: 6.3.4
title: What Can Be Randomized?
pagenum: 175; label: 6.4
title: Constraint Details
pagenum: 175; label: 6.4.1
title: Constraint Introduction
pagenum: 176; label: 6.4.2
title: Simple Expressions
pagenum: 176; label: 6.4.3
title: Equivalence Expressions
pagenum: 177; label: 6.4.4
title: Weighted Distributions
pagenum: 177; label: 6.4.5
title: Set Membership and the inside Operator
pagenum: 179; label: 6.4.6
title: Using an Array in a Set
pagenum: 180; label: 6.4.7
title: Bidirectional Constraints
pagenum: 183; label: 6.4.8
title: Implication Constraints
pagenum: 184; label: 6.4.9
title: Equivalence Operator
pagenum: 186; label: 6.5
title: Solution Probabilities
pagenum: 186; label: 6.5.1
title: Unconstrained
pagenum: 187; label: 6.5.2
title: Implication
pagenum: 187; label: 6.5.3
title: Implication and Bidirectional Constraints
pagenum: 188; label: 6.5.4
title: Guiding Distribution with solve ... before
pagenum: 189; label: 6.6
title: Controlling Multiple Constraint Blocks
pagenum: 191; label: 6.7
title: Valid Constraints
pagenum: 192; label: 6.8
title: In-Line Constraints
pagenum: 192; label: 6.9
title: The pre_randomize and post_randomize Functions
pagenum: 193; label: 6.9.1
title: Building a Bathtub Distribution
pagenum: 193; label: 6.9.2
title: Note on Void Functions
pagenum: 195; label: 6.10
title: Random Number Functions
pagenum: 195; label: 6.11
title: Constraints Tips and Techniques
pagenum: 196; label: 6.11.1
title: Constraints with Variables
pagenum: 196; label: 6.11.2
title: Using Nonrandom Values
pagenum: 197; label: 6.11.3
title: Checking Values Using Constraints
pagenum: 198; label: 6.11.4
title: Randomizing Individual Variables
pagenum: 198; label: 6.11.5
title: Turn Constraints Off and On
pagenum: 198; label: 6.11.6
title: Specifying a Constraint in a Test Using In-Line Constraints
pagenum: 199; label: 6.11.7
title: Specifying a Constraint in a Test with External Constraints
pagenum: 199; label: 6.11.8
title: Extending a Class
pagenum: 200; label: 6.12
title: Common Randomization Problems
pagenum: 200; label: 6.12.1
title: Use Signed Variables with Care
pagenum: 201; label: 6.12.2
title: Solver Performance Tips
pagenum: 202; label: 6.12.3
title: Choose the Right Arithmetic Operator to Boost Efficiency
pagenum: 202; label: 6.13
title: Iterative and Array Constraints
pagenum: 203; label: 6.13.1
title: Array Size
pagenum: 203; label: 6.13.2
title: Sum of Elements
pagenum: 203; label: 6.13.3
title: Issues with Array Constraints
pagenum: 205; label: 6.13.4
title: Constraining Individual Array and Queue Elements
pagenum: 207; label: 6.13.5
title: Generating an Array of Unique Values
pagenum: 208; label: 6.13.6
title: Randomizing an Array of Handles
pagenum: 211; label: 6.14
title: Atomic Stimulus Generation vs. Scenario Generation
pagenum: 211; label: 6.14.1
title: An Atomic Generator with History
pagenum: 212; label: 6.14.2
title: Random Array of Objects
pagenum: 212; label: 6.14.3
title: Combining Sequences
pagenum: 213; label: 6.14.4
title: Randsequence
pagenum: 213; label: 6.15
title: Random Control
pagenum: 215; label: 6.15.1
title: Introduction to randcase
pagenum: 215; label: 6.15.2
title: Building a Decision Tree with randcase
pagenum: 216; label: 6.16
title: Random Number Generators
pagenum: 217; label: 6.16.1
title: Pseudorandom Number Generators
pagenum: 217; label: 6.16.2
title: Random Stability - Multiple Generators
pagenum: 217; label: 6.16.3
title: Random Stability and Hierarchical Seeding
pagenum: 219; label: 6.17
title: Random Device Configuration
pagenum: 220; label: 6.18
title: Conclusion
pagenum: 223; label: 6.19
title: Exercises
pagenum: 224; label: 7
title: Threads and Interprocess Communication
pagenum: 229; label: 7.1
title: Working with Threads
pagenum: 230; label: 7.1.1
title: Using fork ... join and begin ... end
pagenum: 231; label: 7.1.2
title: Spawning Threads with fork ... join none
pagenum: 232; label: 7.1.3
title: Synchronizing Threads with fork ... join any
pagenum: 233; label: 7.1.4
title: Creating Threads in a Class
pagenum: 234; label: 7.1.5
title: Dynamic Threads
pagenum: 235; label: 7.1.6
title: Automatic Variables in Threads
pagenum: 236; label: 7.1.7
title: Waiting for All Spawned Threads
pagenum: 238; label: 7.1.8
title: Sharing Variables Across Threads
pagenum: 239; label: 7.2
title: Disabling Threads
pagenum: 240; label: 7.2.1
title: Disabling a Single Thread
pagenum: 241; label: 7.2.2
title: Disabling Multiple Threads
pagenum: 241; label: 7.2.3
title: Disable a Task that Was Called Multiple Times
pagenum: 243; label: 7.3
title: Interprocess Communication
pagenum: 244; label: 7.4
title: Events
pagenum: 244; label: 7.4.1
title: Blocking on the Edge of an Event
pagenum: 245; label: 7.4.2
title: Waiting for an Event Trigger
pagenum: 245; label: 7.4.3
title: Using Events in a Loop
pagenum: 246; label: 7.4.4
title: Passing Events
pagenum: 247; label: 7.4.5
title: Waiting for Multiple Events
pagenum: 248; label: 7.5
title: Semaphores
pagenum: 250; label: 7.5.1
title: Semaphore Operations
pagenum: 251; label: 7.5.2
title: Semaphores with Multiple Keys
pagenum: 252; label: 7.6
title: Mailboxes
pagenum: 252; label: 7.6.1
title: Mailbox in a Testbench
pagenum: 255; label: 7.6.2
title: Bounded Mailboxes
pagenum: 256; label: 7.6.3
title: Unsynchronized Threads Communicating with a Mailbox
pagenum: 257; label: 7.6.4
title: Synchronized Threads Using a Bounded Mailbox and a Peek
pagenum: 259; label: 7.6.5
title: Synchronized Threads Using a Mailbox and Event
pagenum: 261; label: 7.6.6
title: Synchronized Threads Using Two Mailboxes
pagenum: 262; label: 7.6.7
title: Other Synchronization Techniques
pagenum: 264; label: 7.7
title: Building a Testbench with Threads and IPC
pagenum: 264; label: 7.7.1
title: Basic Transactor
pagenum: 265; label: 7.7.2
title: Configuration Class
pagenum: 266; label: 7.7.3
title: Environment Class
pagenum: 266; label: 7.7.4
title: Test Program
pagenum: 267; label: 7.8
title: Conclusion
pagenum: 268; label: 7.9
title: Exercises
pagenum: 269; label: 8
title: Advanced OOP and Testbench Guidelines
pagenum: 273; label: 8.1
title: Introduction to Inheritance
pagenum: 274; label: 8.1.1
title: Basic Transaction
pagenum: 275; label: 8.1.2
title: Extending the Transaction Class
pagenum: 275; label: 8.1.3
title: More OOP Terminology
pagenum: 277; label: 8.1.4
title: Constructors in Extended Classes
pagenum: 277; label: 8.1.5
title: Driver Class
pagenum: 278; label: 8.1.6
title: Simple Generator Class
pagenum: 279; label: 8.2
title: Blueprint Pattern
pagenum: 280; label: 8.2.1
title: The Environment Class
pagenum: 281; label: 8.2.2
title: A Simple Testbench
pagenum: 282; label: 8.2.3
title: Using the Extended Transaction Class
pagenum: 283; label: 8.2.4
title: Changing Random Constraints with an Extended Class
pagenum: 283; label: 8.3
title: Downcasting and Virtual Methods
pagenum: 284; label: 8.3.1
title: Downcasting with $cast
pagenum: 284; label: 8.3.2
title: Virtual Methods
pagenum: 286; label: 8.3.3
title: Signatures and Polymorphism
pagenum: 288; label: 8.3.4
title: Constructors are Never Virtual
pagenum: 288; label: 8.4
title: Composition, Inheritance, and Alternatives
pagenum: 288; label: 8.4.1
title: Deciding Between Composition and Inheritance
pagenum: 288; label: 8.4.2
title: Problems with Composition
pagenum: 289; label: 8.4.3
title: Problems with Inheritance
pagenum: 291; label: 8.4.4
title: A Real-World Alternative
pagenum: 292; label: 8.5
title: Copying an Object
pagenum: 293; label: 8.5.1
title: Specifying a Destination for Copy
pagenum: 294; label: 8.6
title: Abstract Classes and Pure Virtual Methods
pagenum: 295; label: 8.7
title: Callbacks
pagenum: 297; label: 8.7.1
title: Creating a Callback
pagenum: 298; label: 8.7.2
title: Using a Callback to Inject Disturbances
pagenum: 299; label: 8.7.3
title: A Quick Introduction to Scoreboards
pagenum: 300; label: 8.7.4
title: Connecting to the Scoreboard with a Callback
pagenum: 300; label: 8.7.5
title: Using a Callback to Debug a Transactor
pagenum: 302; label: 8.8
title: Parameterized Classes
pagenum: 302; label: 8.8.1
title: A Simple Stack
pagenum: 302; label: 8.8.2
title: Sharing Parameterized Classes
pagenum: 305; label: 8.8.3
title: Parameterized Class Suggestions
pagenum: 305; label: 8.9
title: Static and Singleton Classes
pagenum: 306; label: 8.9.1
title: Dynamic Class to Print Messages
pagenum: 306; label: 8.9.2
title: Singleton Class to Print Messages
pagenum: 307; label: 8.9.3
title: Configuration Database with Static Parameterized Class
pagenum: 308; label: 8.10
title: Creating a Test Registry
pagenum: 311; label: 8.10.1
title: Test Registry with Static Methods
pagenum: 311; label: 8.10.2
title: Test Registry with a Proxy Class
pagenum: 313; label: 8.10.3
title: UVM Factory Build
pagenum: 319; label: 8.11
title: Conclusion
pagenum: 319; label: 8.12
title: Exercises
pagenum: 320; label: 9
title: Functional Coverage
pagenum: 323; label: 9.1
title: Gathering Coverage Data
pagenum: 324; label: 9.2
title: Coverage Types
pagenum: 326; label: 9.2.1
title: Code Coverage
pagenum: 326; label: 9.2.2
title: Functional Coverage
pagenum: 327; label: 9.2.3
title: Bug Rate
pagenum: 327; label: 9.2.4
title: Assertion Coverage
pagenum: 328; label: 9.3
title: Functional Coverage Strategies
pagenum: 328; label: 9.3.1
title: Gather Information, Not Data
pagenum: 328; label: 9.3.2
title: Only Measure What You Are Going to Use
pagenum: 329; label: 9.3.3
title: Measuring Completeness
pagenum: 329; label: 9.4
title: Simple Functional Coverage Example
pagenum: 330; label: 9.5
title: Anatomy of a Cover Group
pagenum: 333; label: 9.5.1
title: Defining a Cover Group in a Class
pagenum: 334; label: 9.6
title: Triggering a Cover Group
pagenum: 335; label: 9.6.1
title: Sampling Using a Callback
pagenum: 335; label: 9.6.2
title: Cover Group with a User-Defined Sample Argument List
pagenum: 336; label: 9.6.3
title: Cover Group with an Event Trigger
pagenum: 337; label: 9.6.4
title: Triggering on a SystemVerilog Assertion
pagenum: 337; label: 9.7
title: Data Sampling
pagenum: 338; label: 9.7.1
title: Individual Bins and Total Coverage
pagenum: 338; label: 9.7.2
title: Creating Bins Automatically
pagenum: 339; label: 9.7.3
title: Limiting the Number of Automatic Bins Created
pagenum: 339; label: 9.7.4
title: Sampling Expressions
pagenum: 340; label: 9.7.5
title: User-Defined Bins Find a Bug
pagenum: 341; label: 9.7.6
title: Naming the Cover Point Bins
pagenum: 342; label: 9.7.7
title: Conditional Coverage
pagenum: 344; label: 9.7.8
title: Creating Bins for Enumerated Types
pagenum: 345; label: 9.7.9
title: Transition Coverage
pagenum: 345; label: 9.7.10
title: Wildcard States and Transitions
pagenum: 346; label: 9.7.11
title: Ignoring Values
pagenum: 346; label: 9.7.12
title: Illegal Bins
pagenum: 347; label: 9.7.13
title: State Machine Coverage
pagenum: 347; label: 9.8
title: Cross Coverage
pagenum: 348; label: 9.8.1
title: Basic Cross Coverage Example
pagenum: 348; label: 9.8.2
title: Labeling Cross Coverage Bins
pagenum: 349; label: 9.8.3
title: Excluding Cross Coverage Bins
pagenum: 350; label: 9.8.4
title: Excluding Cover Points from the Total Coverage Metric
pagenum: 351; label: 9.8.5
title: Merging Data from Multiple Domains
pagenum: 352; label: 9.8.6
title: Cross Coverage Alternatives
pagenum: 352; label: 9.9
title: Generic Cover Groups
pagenum: 354; label: 9.9.1
title: Pass Cover Group Arguments by Value
pagenum: 354; label: 9.9.2
title: Pass Cover Group Arguments by Reference
pagenum: 355; label: 9.10
title: Coverage Options
pagenum: 355; label: 9.10.1
title: Per-Instance Coverage
pagenum: 355; label: 9.10.2
title: Cover Group Comment
pagenum: 356; label: 9.10.3
title: Coverage Threshold
pagenum: 357; label: 9.10.4
title: Printing the Empty Bins
pagenum: 357; label: 9.10.5
title: Coverage Goal
pagenum: 357; label: 9.11
title: Analyzing Coverage Data
pagenum: 358; label: 9.12
title: Measuring Coverage Statistics During Simulation
pagenum: 359; label: 9.13
title: Conclusion
pagenum: 360; label: 9.14
title: Exercises
pagenum: 360; label: 10
title: Advanced Interfaces
pagenum: 363; label: 10.1
title: Virtual Interfaces with the ATM Router
pagenum: 364; label: 10.1.1
title: The Testbench with Just Physical Interfaces
pagenum: 364; label: 10.1.2
title: Testbench with Virtual Interfaces
pagenum: 366; label: 10.1.3
title: Connecting the Testbench to an Interface in a Port List
pagenum: 369; label: 10.1.4
title: Connecting the Test to an Interface with an XMR
pagenum: 370; label: 10.2
title: Connecting to Multiple Design Configurations
pagenum: 372; label: 10.2.1
title: A Mesh Design
pagenum: 372; label: 10.2.2
title: Using Typedefs with Virtual Interfaces
pagenum: 375; label: 10.2.3
title: Passing Virtual Interface Array Using a Port
pagenum: 376; label: 10.3
title: Parameterized Interfaces and Virtual Interfaces
pagenum: 377; label: 10.4
title: Procedural Code in an Interface
pagenum: 379; label: 10.4.1
title: Interface with Parallel Protocol
pagenum: 380; label: 10.4.2
title: Interface with Serial Protocol
pagenum: 380; label: 10.4.3
title: Limitations of Interface Code
pagenum: 381; label: 10.5
title: Conclusion
pagenum: 382; label: 10.6
title: Exercises
pagenum: 382; label: 11
title: A Complete SystemVerilog Testbench
pagenum: 385; label: 11.1
title: Design Blocks
pagenum: 385; label: 11.2
title: Testbench Blocks
pagenum: 390; label: 11.3
title: Alternate Tests
pagenum: 411; label: 11.3.1
title: Your First Test - Just One Cell
pagenum: 411; label: 11.3.2
title: Randomly Drop Cells
pagenum: 412; label: 11.4
title: Conclusion
pagenum: 413; label: 11.5
title: Exercises
pagenum: 414; label: 12
title: Interfacing with C/C++
pagenum: 415; label: 12.1
title: Passing Simple Values
pagenum: 416; label: 12.1.1
title: Passing Integer and Real Values
pagenum: 416; label: 12.1.2
title: The import Declaration
pagenum: 416; label: 12.1.3
title: Argument Directions
pagenum: 417; label: 12.1.4
title: Argument Types
pagenum: 418; label: 12.1.5
title: Importing a Math Library Routine
pagenum: 419; label: 12.2
title: Connecting to a Simple C Routine
pagenum: 419; label: 12.2.1
title: A Counter with Static Storage
pagenum: 420; label: 12.2.2
title: The chandle Data Type
pagenum: 421; label: 12.2.3
title: Representation of Packed Values
pagenum: 423; label: 12.2.4
title: 4-State Values
pagenum: 424; label: 12.2.5
title: Converting from 2-State to 4-State
pagenum: 426; label: 12.3
title: Connecting to C++
pagenum: 427; label: 12.3.1
title: The Counter in C++
pagenum: 427; label: 12.3.2
title: Static Methods
pagenum: 428; label: 12.3.3
title: Communicating with a Transaction-Level C++ Model
pagenum: 428; label: 12.4
title: Simple Array Sharing
pagenum: 432; label: 12.4.1
title: Single-Dimension Arrays - 2-State
pagenum: 432; label: 12.4.2
title: Single-Dimension Arrays - 4-State
pagenum: 433; label: 12.5
title: Open Arrays
pagenum: 434; label: 12.5.1
title: Basic Open Array
pagenum: 434; label: 12.5.2
title: Open Array Methods
pagenum: 435; label: 12.5.3
title: Passing Unsized Open Arrays
pagenum: 435; label: 12.5.4
title: Packed Open Arrays in DPI
pagenum: 436; label: 12.6
title: Sharing Composite Types
pagenum: 437; label: 12.6.1
title: Passing Structures Between SystemVerilog and C
pagenum: 438; label: 12.6.2
title: Passing Strings Between SystemVerilog and C
pagenum: 439; label: 12.7
title: Pure and Context Imported Methods
pagenum: 440; label: 12.8
title: Communicating from C to SystemVerilog
pagenum: 441; label: 12.8.1
title: A Simple Exported Function
pagenum: 441; label: 12.8.2
title: C Function Calling a SystemVerilog Function
pagenum: 442; label: 12.8.3
title: C Task Calling a SystemVerilog Task
pagenum: 444; label: 12.8.4
title: Calling Methods in Objects
pagenum: 446; label: 12.8.5
title: The Meaning of Context
pagenum: 449; label: 12.8.6
title: Setting the Scope for an Imported Routine
pagenum: 450; label: 12.9
title: Connecting Other Languages
pagenum: 452; label: 12.10
title: Conclusion
pagenum: 453; label: 12.11
title: Exercises
pagenum: 453; title: References
pagenum: 455; title: Index
pagenum: 457