inductively tuned silicon germanide BiCMOS quadrature VCO for clock and data recovery applications.
Published: 2004
Language: eng
Number of pages: 67
Description: An inductively tuned quadrature oscillator for clock and data recovery applications which use a half rate architecture is described in this thesis. The oscillator is based on a delay line architecture with tunable LC delay lines inserted between 2 gain stages to set the operating frequency. The oscillator incorporates a novel inductive tuning scheme by electronically varying magnetic coupling in the LC delay lines. With this method, a large tuning range is achieved which amply covers typical process, temperature and supply voltage spreads. The inductive tuning concept is demonstrated with a test chip fabricated in a 0.5mum SiGe BiCMOS technology. The fabricated oscillator is tunable from 3.75--4.48 GHz giving a tuning range of over 700 MHz or 18% of the center frequency. The measured phase noise is -92.4 dBc/Hz at a 1 MHz offset. The oscillator core dissipates 26.4 mW from a 3.3V supply.
Notes: Adviser:  John Long.

Thesis (M.A.Sc.)--University of Toronto, 2004.

Electronic version licensed for access by U. of T. users.

Source: Masters Abstracts International, Volume: 43-03, page: 0936.

MICR copy on microfiche (1 microfiche).