Verification Techniques for System-Level Design (Systems on Silicon) (Systems on Silicon)
Publisher: Morgan Kaufmann
Published: October 23, 2007
Language: eng
Format: Hardcover
Number of pages: 256
ISBN-13: 9780123706164
Subjects: Circuits & components; Electrical engineering; Technology & Engineering; Technology & Industrial Arts; Science/Mathematics; Electricity; Electronics - Circuits - Integrated; Electronics - Microelectronics; Nonfiction; Technology / Engineering / Electrical; Formal methods (Computer science); Integrated circuits; Systems on a chip; Testing; Verification