IEEE standard for VHDL register transfer level (RTL) synthesis
By: Sponsor, Design Automation Standards Committee of the IEEE Computer Society.
Contributors: IEEE Computer Society. Design Automation Standards Committee.; Institute of Electrical and Electronics Engineers.; IEEE-SA Standards Board.
Series: IEEE Std -- 1076.6-1999.; IEEE std -- 1076.6-1999.
Publisher: Institute of Electrical and Electronics Engineers
Published: 2000
Place of publication: New York, N.Y., USA
Language: eng
Number of pages: 73
Subjects: VHDL (Computer hardware description language) -- Standards
Other titles: Standard for VHDL register transfer level (RTL) synthesis.
Description: A standard syntax and semantics for VHDL register transfer level (RTL) synthesis is defined. The subset of IEEE 1076 (VHDL) that is suitable for RTL synthesis is defined, along with the semantics of that subset for the synthesis domain.
Notes: "IEEE Std 1076.6-1999."

"Approved 16 September 1999, IEEE-SA Standards Board".

"9 March 2000"--Cover.

"SH94792"--Cover.

Includes bibliographical references (p. 3).
Table of contents: class: section