Design of low-power content-addressable memories.
Published: 2006
Place of publication: Toronto, Canada
Language: eng
Number of pages: 89
ISBN-13: 9780494157947
First sentence: A content-addressable memory (CAM) compares input search data against a table of stored data, and returns the address of the matching location.
Description: This thesis explores means of reducing the typical power consumption  of content-addressable memories (CAMs) by implementing a pipelined hierarchical search scheme and using a caching technique. This thesis also reviews the peak power consumption of CAM circuits and architectures in order to determine the conﬁgurations that consume minimum peak power.

First, this thesis proposes a pipelined hierarchical search scheme which maintains the typical power savings on the matchlines of other matchline techniques of about 56%, but has the additional beneﬁt of enabling the creation of a two-level searchline hierarchy that saves 63% searchline power for a combined overall savings of 60%.  The global searchlines (GSLs) are always active, but the local searchlines (LSLs) are 
active only if necessary, saving typical power. To further save power, careful layout and low-swing signaling are used on the GSLs. Measurement results from a testchip demonstrate that this scheme saves 60% of typical searchline power compared to 
conventional searchline driving approaches.

Second, this thesis proposes using a small cache along with a CAM to save power. Streams with temporal locality that cause frequent cache hits eliminate the need to access the larger and higher power CAM. A test chip was fabricated to conﬁrm the functionality of the system. This scheme saves 80% of typical power for a cache hit rate of 90% compared to a conventional system without a cache. 

Finally, this thesis investigates the peak power consumption of a variety of  CAM circuits and techniques and determines several conﬁgurations that consume minimum power. Among these conﬁgurations is the one using pipelined matchlines (with conventional matchline sensing), the conventional searchline driving approach, and the bank-selection architectural technique. The peak power consumption of this conﬁguration is 31% lower than the peak power of the conﬁguration selected to minimize typical power instead of peak power.
Notes: Source: Dissertation Abstracts International, Volume: 67-06, Section: B, page: 3346.

Thesis (Ph.D.)--University of Toronto, 2006.

Electronic version licensed for access by U. of T. users.
Table of contents: pagenum: 1
label: 1
class: chapter
title: Introduction; pagenum: 7
title: Fundamentals of CAM
class: part
label: 2; pagenum: 25
title: Hierarchical Search Scheme
class: part
label: 3; pagenum: 43
title: Caching Technique
class: part
label: 4; pagenum: 57
label: 5
class: part
title: Reducing Peak Power Consumption; pagenum: 81
title: Conclusions and Future Directions
class: part
label: 6