Periodic application of concurrent error detection in processor array architectures
By: Paul Peichuan Chen.
Contributors: United States. National Aeronautics and Space Administration.
Series: [NASA contractor report] -- NASA CR-193217.; NASA contractor report -- NASA CR-193217.
Publisher: Center for Reliable and High-Performance Computing, Coordinated Science Laboratory, College of Engineering, University of Illinois at Urbana-Champaign
Published: 1993
Place of publication: [Urbana, IL]
Language: eng
Format: Microform
Subjects: Signal processing.; Array processors.; Computer architecture.
Notes: Distributed to depository libraries in microfiche.

Shipping list no.: 93-1094-M.

Microfiche. [Washington, D.C. : National Aeronautics and Space Administration, 1993] 2 microfiches.