Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures
By: by Umit Y. Ogras, Radu Marculescu
Contributors: Marculescu, Radu; SpringerLink (Online service)
Series: Lecture Notes in Electrical Engineering -- 184
Publisher: Springer Netherlands; Imprint: Springer
Published: 2013
Place of publication: Dordrecht
Language: eng
Format: [electronic resource] /
Number of pages: 174
ISBN-13: 9789400739581
Subjects: Systems engineering; Engineering; Processor Architectures; Computer science; Circuits and Systems
Description: Traditionally, design space exploration for Systems-on-Chip (SoCs) has focused on the computational aspects of the problem at hand. However, as the number of components on a single chip and their performance continue to increase, the communication architecture plays a major role in the area, performance and energy consumption of the overall system. As a result, a shift from computation-based to communication-based design becomes mandatory. Towards this end, network-on-chip (NoC) communication architectures have emerged recently as a promising alternative to classical bus and point-to-point communication architectures.This book explores outstanding research problems related to modeling, analysis and optimization of NoC communication architectures. More precisely, we present novel design methodologies, software tools and FPGA prototypes to aid the design of application-specific NoCs.
Table of contents: title: Introduction; title: Literature Survey; title: Motivational Example: MPEG-2 Encoder Design; title: Target NoC Platform; title: NoCPerformance Analysis; title: Application-specific NoC Architecture Custimization using Long-range Links; title: Analysis and Optimization of Prediction-based Flow Control in Networks-on-Chip; title: Design and Management of VFI Partition Networks-on-Chip; title: Conclusion; title: Bibliography; title: Appendix A. Tools and FPGA prototype; title: Appendix B. Experiments using the Single-chip Cloud Computer (SCC) Platform.