Digital systems design for testability based on a reed-muller tree-circuit approach
Subtitle: design and application of a CAD system for the minimization design and fault simulation of reed-muller tree-circuits
By: G.V. Loureiro ; supervised by D.H. Green.
Contributors: Green, D.H.; Electrical Engineering and Electronics.
Publisher: UMIST
Published: 1993
Place of publication: Manchester
Language: eng
Notes: Thesis Number: P4685.

Ph.D.