Analog Circuit Design
Subtitle: Fractional-N Synthesizers, Design for Robustness, Line and Bus Drivers (Analog Circuit Design)
Contributors: Arthur H.M. van Roermund (Editor); Michiel Steyaert (Editor); Johan H. Huijsing (Editor)
Edition: 1 edition
Publisher: Springer
Published: October 31, 2003
Language: eng
Format: Hardcover
Number of pages: 410
ISBN-13: 9781402075599
Subjects: Circuits & components; Technology; Electronics - Circuits - Integrated; Design and construction; Technology & Industrial Arts; Science/Mathematics; Linear integrated circuits; Engineering - Electrical & Electronic; Electronics - Circuits - General; Technology / Electronics / Circuits / General; Congresses; Electronic circuit design; Frequency synthesizers
Description: Analog Circuit Design: Fractional-N Synthesizers, Design for Robustness, Line and Bus Drivers<br />Author: Arthur van Roermund, Michiel Steyaert, Johan H. Huijsing<br /> Published by Springer US<br /> ISBN: 978-1-4020-7559-9<br /> DOI: 10.1007/b105729<br /><br />Table of Contents:<p></p><ul><li>Practical Design Aspects in Fractional-N Frequency Synthesis
</li><li>Design and Simulation of Fractional-N Frequency Synthesizers
</li><li>Monolithic CMOS Fractional-N Frequency Synthesizer Design for High Spectral Purity
</li><li>A 19mW 2.2GHz Fully Integrated CMOS Sigma Delta Fractional Synthesiser With 35Hz Frequency Step and Quantization Noise Compensation
</li><li>Implementation Aspects of Fractional-N Techniques in Cellular Handsets
</li><li>Fractional-N Phase Locked Loops and It’s Application in the GSM System
</li><li>ESD for Analogue Circuit Design
</li><li>ESD in Smart Power Processes
</li><li>RF-ESD Co-Design for High Performance CMOS LNAs
</li><li>Improvement of System Robustness Through EMC Optimization
</li><li>Robustness in Analog Design
</li><li>Minimizing Undesired Coupling and Interaction in Mixed Signal ICs.
</li><li>Looking to/for Low Power ADSL Drivers in the DSLAM.
</li><li>Class-AB Low-Distortion drivers for ADSL
</li><li>Class D Self-Oscillating Line Drivers
</li><li>Class G/H Line Drivers for xDSL
</li><li>The USB 2.0 Physical Layer: Standard and Implementation
</li><li>Backplane Transceivers</li></ul>