Circuits for low-power high-speed content-addressable memories.
Published: 2006
Language: eng
Number of pages: 59
ISBN-13: 9780494163429
Description: This thesis presents two techniques to reduce power consumption in content-addressable memories (CAM).In the first technique, we exploit the system stability of the match-lines (MLs) in order to reduce match-line power. In this technique, a negative resistance shunts every ML such that the matched ML becomes unstable, while mismatched MLs remain stable. A small voltage excitation on the ML either grows to VDD (match) or decays to ground (mismatch). This prevents current allocation to the mismatched MLs (except bias), and saves up to 50% of the ML power compared to previous work. The stability-based sensing approaches the minimum achievable ML power.In the second technique, a pipelined search-line architecture segments CAM into stages to reduce the amount of active circuitry. The search propagates down the pipeline until a match is identified, which stops further search and idles the remaining pipeline stages. This saves up to 50% of CAM power compared to conventional architecture, at the cost of search latency.
Notes: Source: Masters Abstracts International, Volume: 44-06, page: 2937.

Thesis (M.A.Sc.)--University of Toronto, 2006.

Electronic version licensed for access by U. of T. users.

ROBARTS MICROTEXT copy on microfiche.