Hierarchical Modeling for VLSI Circuit Testing
By: by Debashis Bhattacharya, John P. Hayes
Contributors: Hayes, John P. (John Patrick), 1944-
Series: The Kluwer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing -- 89; Kluwer international series in engineering and computer science -- 89.
Publisher: Springer US
Published: 1990
Place of publication: Boston, MA
Language: eng
Format: [electronic resource] /
Number of pages: 176
ISBN-13: 9781461288190; 9781461315278
Subjects: Computer engineering; Computer-aided design; Computer science
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