Modelirovanie logicheskikh komponentov vychislitelʹnykh seteĭ
By: [redakor N. Dundina].
Contributors: Dundina, N.
Series: Vychislitelʹnye seti ;; vyp. 1
Publisher: "Zinatne"
Published: 1984
Place of publication: Riga
Language: rus
Number of pages: 94
Subjects: Computer networks.
Notes: Includes bibliographies.
At head of title: Akademii͡a︡ nauk Latviĭskoĭ SSR. Nauchnyĭ sovet po avtomatizat͡s︡ii nauchnykh issledovaniĭ i problemam kibernetiki. Institut ėlektroniki i vychislitelʹnoĭ tekhniki.