Synteza trójwartościowych układów logicznych za pomocą operatora P₃(Z₀,Z₁,Z₂;V₁,V₂)
By: Wiesław Szenajch.
Series: Prace naukowe. Mechanika ;; nr. 24; Prace naukowe.; z. 24.
Publisher: Wydawnictwa Politechniki Warszawskiej
Published: 1974
Place of publication: Warszawa
Language: pol
Number of pages: 101
Subjects: Logic circuits.; Many-valued logic.
Other titles: Sintez trekhznachnykh logicheskikh sistem pri pomoshchi operatora P₃(Z₀,Z₁,Z₂;V₁,V₂); Synthesis of three-valuable logic circuits with the help of operator P₃(Z₀,Z₁,Z₂;V₁,V₂)
Notes: Bibliography: p. 94-98.
Cover title.
Titles on p. [2] of cover: Sintez trekhznachnykh logicheskikh sistem pri pomoshchi operatora P₃(Z₀,Z₁,Z₂;V₁,V₂); The synthesis of three-valuable logic circuits with the help of operator P₃(Z₀,Z₁,Z₂;V₁,V₂)
Summary in English and Russian.