Verification and validation in systems engineering
Subtitle: assessing UML/SysML design models
By: Mourad Debbabi ... [et al.]
Publisher: Springer
Published: 2010
Place of publication: Heidelberg; New York
Language: eng
Number of pages: 248
ISBN-13: 9783642152276
Subjects: Systems engineering; Leistungsbewertung; Softwaremetrie; SysML (Computer science); Software Engineering; Expert systems (Computer science); SysML; Systementwicklung; Verification; UML (Computer science); UML; Validierung; Validation; Verifikation; Programmanalyse
Notes: Includes bibliographical references (p. 227-239) and index.
Table of contents: title: Introduction; title: Architecture frameworks, model-driven architecture, and simulation; title: Unified Modeling Language; title: Systems Modeling Language; title: Verification, Validation, and accreditation; title: Automatic approach for synergistic verification and validation; title: Software engineering metrics in the context of systems engineering; title: Verification and validation of UML behavioral diagrams; title: Probabilistic model checking of SysML activity diagrams; title: Performance analysis of time-constrained SysML activity diagrams; title: Semantic foundation of SysML activity diagrams; title: Soundness of the translation algorithm.