Formal semantics and proof techniques for optimizing VHDL models
By: Kothanda Umamageswaran, Sheetanshu L. Pandey, Philip A. Wilsey.
Contributors: Pandey, Sheetanshu L., 1972-; Wilsey, Philip A., 1958-
Publisher: Kluwer Academic Publishers
Published: 1999
Place of publication: Boston
Language: eng
Number of pages: 158
Subjects: VHDL (Computer hardware description language)
Notes: Includes bibliographical references (p. [151]-155) and index.