Analog-digital simulation of transient-induced logic errors and  upset susceptibility of an advanced control system
By: Victor A. Carreno, G. Choi and R.K. Iyer.
Contributors: Choi, G.; Iyer, Ravishankar K.; United States. National Aeronautics and Space Administration. Scientific and Technical Information Division.
Series: NASA technical memorandum -- 4241.
Publisher: National Aeronautics and Space Administration, Office of Management, Scientific and Technical Information Division; National Technical Information Service, distributor]
Published: 1990
Place of publication: [Washington, DC]; [Springfield, Va
Language: eng
Format: Microform
Subjects: Analog simulation.; Digital simulation.; Error analysis.; Fault tolerance.; Latch-up.; Logic programming.; Single event upsets.
Other titles: Analog digital simulation of transient induced logic errors and upset susceptibility of an advanced control system.
Notes: Distributed to depository libraries in microfiche.

Microfiche. [Washington, D.C. : National Aeronautics and Space Administration, 1991] 1 microfiche.