CMOS wireless transceiver design
By: by Jan Crols, Katholieke Universiteit Leuven, Heverlee, Belgium, Michiel Steyaert, Katholieke Universiteit Leuven, Heverlee, Belgium
Contributors: Steyaert, Michiel, 1959- author
Series: The Kluwer international series in engineering and computer science; International series in engineering and computer science
Published: 2003
Language: eng
Number of pages: 240
ISBN-13: 9781475747843; 9781441951830
Subjects: Complementary Metal oxide semiconductors; Signal processing; Digital techniques; Radio; Transmitter-receivers; Design and construction
Description: The revolution in wireless communications sets new requirements for transceivers (transmitter-receivers). Higher operating frequencies, lower power consumption and very high degree of integration, are new specifications which require design approaches quite different from classical RF design techniques. The integratability and power consumption reduction of the digital component will further improve with the continued downscaling of technologies. This is, however, completely different for the analog transceiver front-end, the component which interfaces between the antenna and the digital signal processor. The analog front-end's integratability and power consumption are closely related to the physical limitations of the transceiver topology and not so much to the scaling of the used technology. CMOS Wireless Transceiver Design is the first book to give a comprehensive treatment of the design of transceivers for use in wireless communication systems. The book overviews existing transceiver design and goes on to introduce new multi-path receiver and transmitter topologies. It also presents a formal methodology for the high-level design of transceiver architectures and fully illustrates its use in the design of a low-IF/direct upconversion GSM transceiver front-end. CMOS Wireless Transceiver Design further demonstrates its practical nature by containing concluding chapters which study both the integration of RF building blocks in CMOS and the capabilities of deep submicron CMOS used in combination with the new transceiver topologies for the implementation of wireless transceiver front-ends in the 1 to 2 GHz range. CMOS Wireless Transceiver Design is essential reading for all researchers and practising engineers working in the design of wireless communication systems requiring highly integrated RF transceivers.
Notes: Includes bibliographical references and index.

Print version record.
Table of contents: title: Symbols, conventions, notations and abbreviations; title: Preface; title: 1. Wireless communications; title: 2. Transmitters and receivers; title: 3. Transceivers in the frequency domain; title: 4. Performance of transceivers; title: 5. High-level synthesis; title: 6. Building blocks for CMOS transceivers; title: 7. Realizing a CMOS transceiver; title: 8. General conclusions; title: Appendices. A-process information; title: Bibliography; title: Index.