Computer Aided Verification
Subtitle: 15th International Conference, CAV 2003, Boulder, CO, USA, July 8-12, 2003, Proceedings (Lecture Notes in Computer Science)
Contributors: Jr., Warren A. Hunt (Editor); Fabio Somenzi (Editor)
Edition: 1 edition
Publisher: Springer
Published: August 13, 2003
Language: eng
Format: Paperback
Number of pages: 462
ISBN-13: 9783540405245
Subjects: Systems analysis & design; Programming - Software Development; Computer Science; Computers; Computers - General Information; Computer Books: General; Programming - Systems Analysis & Design; Logic Design; Computers / Logic Design; automated deduction; computational logic; computer aided verification; formal methods; formal verification; hardware verification; model checking; program verification; systems analysis; systems design; theorem provers
First sentence: Symbolic model checking [8,9] is a method of verifying temporal properties of finite (and sometimes infinite) state systems that relies on a symbolic representation of sets, typically as Binary Decision Diagrams [7] (BDD's).