Tutorial on manufacturing yield evaluation of VLSI/WSI systems
By: [edited by Bruno Ciciani].
Contributors: Ciciani, Bruno.
Publisher: IEEE Computer Society Press
Published: 1994
Place of publication: Los Alamitos, CA
Language: eng
Number of pages: 437
Subjects: Integrated circuits -- Very large scale integration -- Design and construction -- Data processing.; Integrated circuits -- Wafer-scale integration -- Design and construction -- Data processing.; Integrated circuits -- Very large scale integration -- Reliability.; Integrated circuits -- Wafer-scale integration -- Reliability.; Integrated circuits -- Fault tolerance.
Description: Low manufacturing yield and dependability (reliability, availability, and performability) are problems of increasing importance as the densities of integrated circuits increase. This book furnishes you with engineering methodologies so that you can evaluate the cost-benefit ratio of fault-tolerant mechanisms used in VLSI/WSI systems. It focuses in particular on manufacturing fault analysis and yield evaluation.

A practical understanding of these concepts and their application can help to reduce the chance of having device failures.

This book is divided into five chapters. The first chapter introduces and presents an overview of yield enhancement techniques, manufacturing defect and fault modeling, yield evaluation methodologies, and cost-benefit ratio evaluation methodologies of fault-tolerant mechanisms. Each of the other four chapters contains a collection of papers covering these four research areas.

These chapters begin with an introduction to the papers, present abstracts, and provide further references for a complete study of the reprinted papers that follow.