High performance datacenter networks
Subtitle: architectures, algorithms, and opportunities
By: Dennis Abts, John Kim
Contributors: Kim, John
Series: Synthesis lectures on computer architecture -- # 14
Publisher: Morgan & Claypool
Published: 2011
Place of publication: San Rafael, Calif. (1537 Fourth Street, San Rafael, CA 94901 USA)
Language: eng
Format: [electronic resource] :
ISBN-13: 9781608454037; 9781608454020
Subjects: Computer networks; Computer network architectures; Parallel computers
Other titles: Synthesis digital library of engineering and computer science.
Description: Datacenter networks provide the communication substrate for large parallel computer systems that form the ecosystem for high performance computing (HPC) systems and modern Internet applications. The design of new datacenter networks is motivated by an array of applications ranging from communication intensive climatology, complex material simulations and molecular dynamics to such Internet applications as Web search, language translation, collaborative Internet applications, streaming video and voice-over-IP. For both Supercomputing and Cloud Computing the network enables distributed applications to communicate and interoperate in an orchestrated and efficient way.
Notes: Part of: Synthesis digital library of engineering and computer science.

Series from website.

Includes bibliographical references (p. 93-98).

Abstract freely available; full-text restricted to subscribers or individual document purchasers.

Also available in print.

Mode of access: World Wide Web.

System requirements: Adobe Acrobat Reader.
Table of contents: title: Preface; title: Acknowledgments; title: Note to the reader; title: 1. Introduction; title: From supercomputing to cloud computing; title: Beowulf: the cluster is born; title: Overview of parallel programming models; title: Putting it all together; title: Quality of service (QoS) requirements; title: Flow control; title: Lossy flow control; title: Lossless flow control; title: The rise of ethernet; title: Summary; title: 2. Background; title: Interconnection networks; title: Technology trends; title: Topology, routing and flow control; title: Communication stack; title: 3. Topology basics; title: Introduction; title: Types of networks; title: Mesh,torus, and hypercubes; title: Node identifiers; title: K-ary n-cube tradeoffs; title: 4. High-radix topologies; title: Towards high-radix topologies; title: Technology drivers; title: Pin bandwidth; title: Economical optical signaling; title: High-radix topology; title: High-dimension hypercube, mesh, torus; title: Butterfly; title: High-radix folded-clos; title: Flattened butterfly; title: Dragonfly; title: HyperX; title: 5. Routing; title: Routing basics; title: Objectives of a routing algorithm; title: Minimal routing; title: Deterministic routing; title: Oblivious routing; title: Non-minimal routing; title: Valiant's algorithm (VAL); title: Universal global adaptive load-balancing (UGAL); title: Progressive adaptive routing (PAR); title: Dimensionally-adaptive, load-balanced (DAL) routing; title: Indirect adaptive routing; title: Routing algorithm examples; title: Example 1: Folded-clos; title: Example 2: Flattened butterfly; title: Example 3: Dragonfly; title: 6. Scalable switch microarchitecture; title: Router microarchitecture basics; title: Scaling baseline microarchitecture to high radix; title: Fully buffered crossbar; title: Hierarchical crossbar architecture; title: Examples of high-radix routers; title: Cray YARC router; title: Mellanox InfiniScale IV; title: 7. System packaging; title: Packaging hierarchy; title: Power delivery and cooling; title: Topology and packaging locality; title: 8. Case studies; title: Cray BlackWidow multiprocessor; title: BlackWidow node organization; title: High-radix folded-clos network; title: System packaging; title: High-radix fat-tree; title: Packet format; title: Network layer flow control; title: Data-link layer protocol; title: Serializer/deserializer; title: Cray XT multiprocessor; title: 3-D torus; title: Routing; title: Flow control; title: SeaStar router microarchitecture; title: Summary; title: 9. Closing remarks; title: Programming models; title: Wire protocols; title: Opportunities; title: Bibliography; title: Authors' biographies.