Switch-level timing simulation of MOS VLSI circuits
By: by Vasant B. Rao ... [et al.].
Contributors: Rao, Vasant B.
Series: The Kluwer international series in engineering and computer science ;; SECS 66.; VSLI, computer architecture and digital signal processing; Kluwer international series in engineering and computer science ;; SECS 66.; Kluwer international series in engineering and computer science.
Publisher: Kluwer Academic Publishers
Published: 1989
Place of publication: Boston
Language: eng
Number of pages: 209
Subjects: Integrated circuits -- Very large scale integration -- Computer simulation.
Notes: Bibliography: p. [193]-203.
Includes index.