60V VDMOS design and fabrication for automotive applications
Published: 2005
Language: eng
Number of pages: 74
ISBN-13: 9780494164068
Description: This thesis presents the design of a 60V n-channel and p-channel discrete Vertical Double-diffused MOSFETs (VDMOS). Both designs are optimized and the same mask sets are used for their fabrication. Actual device fabrication is carried out by Asahi Kasei Microsystem, Japan. The devices are first optimized for breakdown voltage and on-resistance, followed by choosing a suitable termination technique and cell layout geometry. Process flow for the fabrication is discussed. Simulations for the devices including their physical structures and electrical properties are presented. Unclamped inductive switching simulations are also performed on the n-channel device to discern its ruggedness. Fabrication of the devices is completed and their electrical parameters are extracted, analyzed and compared with simulation results. Measurements show that the n-channel and p-channel devices have breakdown voltages of 66V and -63V respectively, with corresponding specific on-resistances of 1.47m?cm 2 and 4.29m?cm 2 . The device's performance is comparable to similar recent commercially available devices.
Notes: Source: Masters Abstracts International, Volume: 44-06.

Thesis (M.A.Sc.)--University of Toronto, 2005.

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