Computer Architecture and Organization
Publisher: McGraw-Hill Science/Engineering/Math
Published: September 3, 2002
Language: eng
Number of pages: 624
ISBN-13: 9780072861983
Table of contents: title: Preface
pagenum: xiii; label: Chapter 1
title: Computing and Computers
pagenum: 1; title: The Nature of Computing
pagenum: 1; title: The Elements of Computers; title: Limitations of Computers; title: The Evolution of Computers
pagenum: 12; title: The Mechanical Era; title: Electronic Computers; title: The Later Generations; title: The VLSI Era
pagenum: 35; title: Integrated Circuits; title: Processor Architecture; title: System Architecture; title: Summary
pagenum: 56; title: Problems
pagenum: 57; title: References
pagenum: 62; label: Chapter 2
title: Design Methodology
pagenum: 64; title: System Design
pagenum: 64; title: System Representation; title: Design Process; title: The Gate Level; title: The Register Level
pagenum: 83; title: Register-Level Components; title: Programmable Logic Devices; title: Register-Level Design; title: The Processor Level
pagenum: 114; title: Processor-Level Components; title: Processor-Level Design; title: Summary
pagenum: 126; title: Problems
pagenum: 127; title: References
pagenum: 136; label: Chapter 3
title: Processor Basics
pagenum: 137; title: CPU Organization
pagenum: 137; title: Fundamentals; title: Additional Features; title: Data Representation
pagenum: 160; title: Basic Formats; title: Fixed-Point Numbers; title: Floating-Point Numbers; title: Instruction Sets
pagenum: 178; title: Instruction Formats; title: Instruction Types; title: Programming Considerations; title: Summary
pagenum: 211; title: Problems
pagenum: 212; title: References
pagenum: 221; label: Chapter 4
title: Datapath Design
pagenum: 223; title: Fixed-Point Arithmetic
pagenum: 223; title: Addition and Subtraction; title: Multiplication; title: Division; title: Arithmetic-Logic Units
pagenum: 252; title: Combinational ALUs; title: Sequential ALUs; title: Advanced Topics
pagenum: 266; title: Floating-Point Arithmetic; title: Pipeline Processing; title: Summary
pagenum: 292; title: Problems
pagenum: 293; title: References
pagenum: 301; label: Chapter 5
title: Control Design
pagenum: 303; title: Basic Concepts
pagenum: 303; title: Introduction; title: Hardwired Control; title: Design Examples; title: Microprogrammed Control
pagenum: 332; title: Basic Concepts; title: Multiplier Control Unit; title: CPU Control Unit; title: Pipeline Control
pagenum: 364; title: Instruction Pipelines; title: Pipeline Performance; title: Superscalar Processing; title: Summary
pagenum: 390; title: Problems
pagenum: 392; title: References
pagenum: 399; label: Chapter 6
title: Memory Organization
pagenum: 400; title: Memory Technology
pagenum: 400; title: Memory Device Characteristics; title: Random-Access Memories; title: Serial-Access Memories; title: Memory Systems
pagenum: 426; title: Multilevel Memories; title: Address Translation; title: Memory Allocation; title: Caches
pagenum: 452; title: Main Features; title: Address Mapping; title: Structure versus Performance; title: Summary
pagenum: 471; title: Problems
pagenum: 472; title: References
pagenum: 478; label: Chapter 7
title: System Organization
pagenum: 480; title: Communication Methods
pagenum: 480; title: Basic Concepts; title: Bus Control; title: IO and System Control
pagenum: 504; title: Programmed IO; title: DMA and Interrupts; title: IO Processors; title: Operating Systems; title: Parallel Processing
pagenum: 539; title: Processor-Level Parallelism; title: Multiprocessors; title: Fault Tolerance; title: Summary
pagenum: 578; title: Problems
pagenum: 579; title: References
pagenum: 587; title: Index
pagenum: 589