Transistor sizing for timing optimization of combinational digital CMOS circuits
By: Lucas S. Heusler.
Edition: 1. Aufl.
Series: Series in microelectronics,; v. 4
Publisher: Hartung-Gorre
Published: 1990
Place of publication: Konstanz
Language: eng
Number of pages: 102
Subjects: Metal oxide semiconductors, Complementary.; Transistor circuits -- Data processing.; Timing circuits -- Data processing.
Notes: Includes bibliographical references (p. [97]-102).
Thesis (Ph.D.)--Zürich. Techn. Hochsch., 1990.
Abstract also in German.