An FPGA implementation of the microflow architecture
By: by Arif Inamulla Khan.
Series: Master's theses (State University of New York at Binghamton) -- no. 2102
Published: 1995
Language: eng
Number of pages: 118
Subjects: Computer architecture.; Field programmable gate arrays.
Other titles: Microflow architecture
Notes: Thesis (M.S.) -- State University of New York at Binghamton, Watson School of Engineering and Applied Science (Computer Science Department), 1995.

Includes bibliographical references (leaves 87-90).