Memory-based logic synthesis
By: Tsutomu Sasao
Published: 2011
Language: eng
Number of pages: 189
ISBN-13: 9781441981035; 9781441981042
Copyright date: 2011
Subjects: Logic circuits; Semiconductor storage devices; Field programmable gate arrays; Design and construction
Description: "This book describes the synthesis of logic functions using memories. It is useful to design field programmable gate arrays (FPGAs) that contain both small-scale memories, called look-up tables (LUTs), and medium-scale memories, called embedded memories.  This is a valuable reference for both FPGA system designers and CAD tool developers, concerned with logic synthesis for FPGAs.  Anyone using logic gates to design logic circuits, you can benefit from the methods described in this book.  Describes in detail the synthesis of logic functions using memories; Introduces a look-up tables (LUT) cascade as a new architecture for logic synthesis; Shows logic design methods for index generation functions; Introduces C-measure, which specifies the complexity of Boolean functions; Introduces hash-based design methods, which efficiently synthesize index generation functions by pairs of smaller memories and can be applied to IP address tables, packet filtering, terminal access controllers, memory patch circuits, virus scanning circuits, intrusion detection circuits, fault map of memories, code converters and pattern matching"
Notes: Includes bibliographical references (pages 179-186) and index.
Table of contents: title: Introduction; title: Basic elements; title: Definitions and basic properties; title: MUX-based synthesis; title: Cascade-based synthesis; title: Encoding method; title: Functions with small C-measures; title: C-measure of sparse functions; title: Index generation functions; title: Hash-based synthesis; title: Reduction of the number of variables; title: Various realizations; title: Conclusions.