VHDL for simulation, synthesis and formal proofs of hardware
By: edited by Jean Mermet
Series: The Kluwer international series in engineering and computer science -- SECS 183; Kluwer international series in engineering and computer science -- SECS 183.
Publisher: Springer Science+Business Media, B.V.
Published: 1992
Place of publication: Dordrecht
Language: eng
Format: [electronic resource] /
Number of pages: 307
ISBN-13: 9781461535621; 9781461365822
Subjects: VHDL (Computer hardware description language)
Notes: Originally published by Kluwer Academic Publishers in 1992.

Softcover reprint of the hardcover 1st edition 1992.

Includes bibliographical references.
Table of contents: title: pt. I. Simulation; title: pt. II. Synthesis; title: pt. III. Formal verification and semantics; title: pt. IV. System level design and modelling.