olofk/fusesoc — pull request #63 by jeremybennett (2014-11-22 17:30:36+00:00)
Title: Verbose

This adds a --verbose flag. In this case it is used to print out the details of how the Verilator model is being built. However it should be general for any component that wishes to optionally give more information.

The rationale behind this is that for detailed manipulation of Verilator (profiling, coverage etc), you want to run the tool directly. But it is useful for fusesoc to tell you the commands to run.

This is branch is built on top of the monochrome branch. Not good practice, but I needed the monochrome branch to see what I was doing :-)