buserror/simavr — pull request #101 by dougszumski (2014-10-21 20:41:39+00:00)
Title: cores: Adds missing external interrupt for m16/m32

> Async external interrupt (INT2) was missing on m16/32. Since unlike the others
this interrupt uses only 1 bit for sense control avr_extint.* were modified to
support this new mode.