chipKIT32/chipKIT32-MAX — pull request #505 by majenkotech (2014-08-26 21:08:27+00:00)
Title: Changed sample clock from 6Tpb to 22Tpb so external Vref works cleanly

It seems that too high a sample clock breaks ADC readings when using the external Aref+ pin.

Slowing the clock down to ~3.6MHz seems to fix the problem.

See: http://chipkit.net/forum/viewtopic.php?f=17&t=3024