Xilinx/XilinxTclStore — pull request #273 by dpefour (2014-06-25 17:38:44+00:00)
Title: Major updates to insert_buffer.tcl

This update includes:
- compatibility with UltraScale where buffers can have more than 2 pins (incl. control pins)
- added insert_clock_probe
- added rename_net
- all the commands now support command line options
- unplacing/replacing cells in the design is better handled
- others