cylc/cylc — pull request #910 by hjoliver (2014-03-05 01:31:04+00:00)
Title: Removed the sim-mode accelerated clock.

The accelerated simulation-mode clock is a faster wall clock for simulation and dummy mode suites, dating back to the very early pre-suite.rc days of cylc. It allowed me to simulate "caught-up" real time operation in suites with clock-triggered tasks, without having to wait for N hours between cycles. Clock-triggers, log time stamps, etc., are relative to the accelerated clock.

This is pretty much a useless feature now, so I'd like to get rid of the associated complexity to simplify my ISO-8601 changes a little. Simulation mode is not very important anymore because (a) it's now very easy to whip up dummy suites to test almost anything; (b) testing can just be done behind the clock to avoid a wait between cycles; and (c) with ISO-8601 we'll be able to test real-time clock-triggers quickly by using sub-hourly cycling.

My test battery passes.

@matthewrmshin et. al. - if you agree, you can review this and merge it to master now, or if you haven't got time at the moment I can rebase my ISO-8601 branch on top of this so it'll eventually be merged with that.