leaflabs/libmaple — pull request #83 by wesen (2014-02-06 11:58:21+00:00)
Title: always clear ISR DMA bit before even calling handler

So I am a bit unsure about this one. I had this troublesome effect:

1. i was running code with -O0 for a long time (mistake on my part)
2. i switched to -Os -> this led to flakiness in the SPI transfer to the display (flaky timing)
3. i tried to hunt down the exact timing, but couldn't. Basically, if dma.c was compiled with -O2, it worked, with -Os, it didn't
4. i tried some random delay sprinkling, didn't help.

I then realized that I triggered a new DMA transfer inside the IRQ routine, but didn't clear the ISR flag first. I am now wondering why the IRQ handler dispatcher shouldn't always clear it as the first thing, to get acknowledging the IRQ out of the way.

I am maybe missing something?