fsmk/CS-VTU-Lab-Manual — pull request #56 by KarthikNayak (2014-01-09 05:29:04+00:00)
Title: Logic Design lab verilog programs added [3rd Sem]

Added the verilog program's for 3rd semester CSE branch
http://www.armadeus.com/wiki/index.php?title=How_to_make_a_VHDL_design_in_Ubuntu/Debian
this is a nice little tutorial for using verilog code on Ubuntu/Debian