openrisc/orpsoc-cores — pull request #3 by skristiansson (2013-09-12 09:57:21+00:00)
Title: wb_intercon: replace rdt/sdt with wb spec compliant name (dat)

Using non-standard names on signals in a standardised bus is
confusing for users, so that should be avoided.
However, the naming convention (sdt/rdt instead of dat for
slave data), served a purpose. It avoids the issue of two
signals having the same name when interconnectnig cores.

This patch takes a different approach and insert direction
markers into the signal names in modules where interconnect
occurs. The markers are: 'm2s' for 'master to slave' signals
and 's2m' for 'slave to master' signals.