maxnet/a10-meminfo — pull request #2 by oliv3r (2013-06-20 09:21:16+00:00)
Title: Swap PLL1 TUN2 register to proper location

PLL1_tun2 had a wrong comment (0x34) in the original and was swapped to
accomidate this position. Actually the comment was wrong and the
location right, so this patch puts pll1_tun2 to 0x38.
0x34 is now reserved.