github/linguist — pull request #368 by cjdrake (2013-01-31 06:11:58+00:00)
Title: Add Verilog (.vh) and SystemVerilog (.sv, .svh) filename extensions

Most Verilog files use the *.vh extension for header files.

Since the IEEE 1800-2009 SystemVerilog standard, it is common for
hardware and verification files written using the newer language
constructs to use the *.sv extension for design elements, and *.svh for
headers.