foxsi/foxsigse — pull request #25 by LinErinG (2011-10-11 19:38:39+00:00)
Title: Upgraded trigger control system

The break/clear system was replaced with an honest-to-goodness trigger control system.

option: choose whether to force trigger or not from gSE
option: choose length of timeout if using forced-trigger mode
option: choose delay before accepting triggers in ACQ state

The read function was changed so that if there's a bad sync (which means no data is ready to read) the read function does not increase n_events. That way if you request 1000 events, you'll get 1000 real events.

FPGA code VATA451_v10 (Oct 11) was also changed to reflect these changes, and the ADC clock was sped up to 5 MHz.