ku-fpg/kansas-lava — Issue #2: xor2 generates or2 in VHDL
Author: metanest
Created: 2011-12-05 21:51:52+00:00
State: open

folloing is patch

diff --git a/Language/KansasLava/Utils.hs b/Language/KansasLava/Utils.hs
index 47901a5..76a9409 100644
--- a/Language/KansasLava/Utils.hs
+++ b/Language/KansasLava/Utils.hs
@@ -61,7 +61,7 @@ or2 s1 s2 = primXS2 (\ a b -> case (unX a,unX b) of
xor2 :: ( sig ~ Signal i) => sig Bool -> sig Bool -> sig Bool
xor2 s1 s2 = primXS2 (\ a b -> case (unX a,unX b) of
(Just a',Just b') -> optX $ Just (a' /= b')
- _ -> optX $ Nothing ) "or2"
+ _ -> optX $ Nothing ) "xor2"
s1
s2

--